	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function cas_init_one
_cas_init_one:                          ## @cas_init_one
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$56, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r15
	movq	$0, -64(%rbp)
	movl	_cas_init_one.cas_version_printed(%rip), %eax
	leal	1(%rax), %ecx
	movl	%ecx, _cas_init_one.cas_version_printed(%rip)
	testl	%eax, %eax
	jne	LBB0_2
## %bb.1:
	movq	_version@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	leaq	L_.str(%rip), %rdi
	callq	_pr_info
LBB0_2:
	movq	%r15, %rdi
	callq	_pci_enable_device
	testl	%eax, %eax
	je	LBB0_4
## %bb.3:
	movl	%eax, %ebx
	addq	$4, %r15
	leaq	L_.str.1(%rip), %rsi
	movq	%r15, %rdi
	callq	_dev_err
	jmp	LBB0_65
LBB0_4:
	movq	%r15, %rdi
	xorl	%esi, %esi
	callq	_pci_resource_flags
	movq	_IORESOURCE_MEM@GOTPCREL(%rip), %rcx
	testl	%eax, (%rcx)
	je	LBB0_5
## %bb.6:
	movl	$224, %edi
	callq	_alloc_etherdev
	testq	%rax, %rax
	je	LBB0_64
## %bb.7:
	movq	%rax, %r14
	leaq	4(%r15), %rbx
	movq	%rax, %rdi
	movq	%rbx, %rsi
	callq	_SET_NETDEV_DEV
	movl	48(%r14), %esi
	movq	%r15, %rdi
	callq	_pci_request_regions
	testl	%eax, %eax
	je	LBB0_9
## %bb.8:
	leaq	L_.str.3(%rip), %rsi
	movq	%rbx, %rdi
	callq	_dev_err
	jmp	LBB0_63
LBB0_5:
	leaq	4(%r15), %rdi
	leaq	L_.str.2(%rip), %rsi
	callq	_dev_err
	jmp	LBB0_64
LBB0_9:
	movq	%r15, %rdi
	callq	_pci_set_master
	movq	_PCI_COMMAND@GOTPCREL(%rip), %r12
	movl	(%r12), %esi
	leaq	-44(%rbp), %rdx
	movq	%r15, %rdi
	callq	_pci_read_config_word
	movq	_PCI_COMMAND_SERR@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	notl	%edx
	andl	-44(%rbp), %edx
	movq	_PCI_COMMAND_PARITY@GOTPCREL(%rip), %rax
	orl	(%rax), %edx
	movl	%edx, -44(%rbp)
	movl	(%r12), %esi
	movq	%r15, %rdi
	callq	_pci_write_config_word
	movq	%r15, %rdi
	callq	_pci_try_set_mwi
	testq	%rax, %rax
	je	LBB0_11
## %bb.10:
	movq	%r15, %rdi
	callq	_pci_name
	leaq	L_.str.4(%rip), %rdi
	movl	%eax, %esi
	callq	_pr_warn
LBB0_11:
	movq	%r15, %rdi
	callq	_cas_program_bridge
	movq	_PCI_CACHE_LINE_SIZE@GOTPCREL(%rip), %r12
	movl	(%r12), %esi
	leaq	-64(%rbp), %rdx
	movq	%r15, %rdi
	callq	_pci_read_config_byte
	movq	_CAS_PREF_CACHELINE_SIZE@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	cmpq	%rax, -64(%rbp)
	jge	LBB0_12
## %bb.17:
	movq	_SMP_CACHE_BYTES@GOTPCREL(%rip), %rcx
	movq	(%rcx), %r13
	cmpq	%r13, %rax
	cmovlq	%rax, %r13
	movl	(%r12), %esi
	movq	%r15, %rdi
	movq	%r13, %rdx
	callq	_pci_write_config_byte
	testq	%rax, %rax
	je	LBB0_13
## %bb.18:
	leaq	L_.str.5(%rip), %rsi
	movq	%rbx, %rdi
	callq	_dev_err
	jmp	LBB0_62
LBB0_12:
	xorl	%r13d, %r13d
LBB0_13:
	movl	$64, %edi
	callq	_DMA_BIT_MASK
	movq	%r15, %rdi
	movl	%eax, %esi
	callq	_pci_set_dma_mask
	movl	%eax, -76(%rbp)                 ## 4-byte Spill
	testl	%eax, %eax
	je	LBB0_14
## %bb.19:
	movl	$32, %edi
	callq	_DMA_BIT_MASK
	movq	%r15, %rdi
	movl	%eax, %esi
	callq	_pci_set_dma_mask
	testl	%eax, %eax
	je	LBB0_21
## %bb.20:
	leaq	L_.str.7(%rip), %rsi
	jmp	LBB0_16
LBB0_14:
	movl	$64, %edi
	callq	_DMA_BIT_MASK
	movq	%r15, %rdi
	movl	%eax, %esi
	callq	_pci_set_consistent_dma_mask
	testl	%eax, %eax
	js	LBB0_15
LBB0_21:
	movq	%rbx, -72(%rbp)                 ## 8-byte Spill
	movq	%r15, %rdi
	xorl	%esi, %esi
	callq	_pci_resource_len
	movq	%rax, -56(%rbp)                 ## 8-byte Spill
	movq	%r14, %rdi
	callq	_netdev_priv
	movq	%rax, %r12
	movq	%r15, 216(%rax)
	testq	%r13, %r13
	je	LBB0_23
## %bb.22:
	movq	-64(%rbp), %r13
LBB0_23:
	movq	%r13, 208(%r12)
	movq	%r14, 104(%r12)
	movq	_cassini_debug@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	testq	%rax, %rax
	jns	LBB0_25
## %bb.24:
	movq	_CAS_DEF_MSG_ENABLE@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
LBB0_25:
	movq	%rax, 200(%r12)
	movq	_LINK_TRANSITION_UNKNOWN@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 112(%r12)
	movq	$0, 184(%r12)
	leaq	176(%r12), %rdi
	callq	_spin_lock_init
	leaq	172(%r12), %rdi
	callq	_spin_lock_init
	leaq	168(%r12), %rdi
	callq	_spin_lock_init
	movq	_N_TX_RINGS@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	testl	%eax, %eax
	jle	LBB0_28
## %bb.26:
	xorl	%ebx, %ebx
	xorl	%r13d, %r13d
	.p2align	4, 0x90
LBB0_27:                                ## =>This Inner Loop Header: Depth=1
	movq	152(%r12), %rdi
	addq	%rbx, %rdi
	callq	_spin_lock_init
	movq	160(%r12), %rdi
	addq	%rbx, %rdi
	callq	_spin_lock_init
	incq	%r13
	movq	_N_TX_RINGS@GOTPCREL(%rip), %rax
	movslq	(%rax), %rax
	addq	$4, %rbx
	cmpq	%rax, %r13
	jl	LBB0_27
LBB0_28:
	movslq	%eax, %rdi
	shlq	$2, %rdi
	addq	152(%r12), %rdi
	callq	_spin_lock_init
	leaq	40(%r12), %r13
	movq	%r13, %rdi
	callq	_mutex_init
	leaq	144(%r12), %rdi
	movq	_cas_link_timer@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	xorl	%edx, %edx
	callq	_timer_setup
	leaq	140(%r12), %rdi
	xorl	%esi, %esi
	callq	_atomic_set
	leaq	136(%r12), %rdi
	xorl	%esi, %esi
	callq	_atomic_set
	leaq	132(%r12), %rdi
	xorl	%esi, %esi
	callq	_atomic_set
	leaq	128(%r12), %rdi
	xorl	%esi, %esi
	callq	_atomic_set
	leaq	124(%r12), %rdi
	movq	_cas_reset_task@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_INIT_WORK
	movq	_link_mode@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	cmpq	$6, %rax
	jb	LBB0_29
## %bb.30:
	movq	_BMCR_ANENABLE@GOTPCREL(%rip), %rax
	jmp	LBB0_31
LBB0_29:
	movq	_link_modes@GOTPCREL(%rip), %rcx
	shlq	$2, %rax
	addq	(%rcx), %rax
LBB0_31:
	movq	-56(%rbp), %rbx                 ## 8-byte Reload
	movl	(%rax), %eax
	movl	%eax, 120(%r12)
	movq	_link_down@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 116(%r12)
	movq	_LINK_TRANSITION_LINK_DOWN@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 112(%r12)
	movq	104(%r12), %rdi
	callq	_netif_carrier_off
	movq	$0, 96(%r12)
	movq	%r15, %rdi
	xorl	%esi, %esi
	movq	%rbx, %rdx
	callq	_pci_iomap
	movq	%rax, 32(%r12)
	testq	%rax, %rax
	je	LBB0_32
## %bb.33:
	movq	%rbx, (%r12)
	movq	%r15, %rdi
	callq	_pci_save_state
	movq	%r12, %rdi
	callq	_cas_check_pci_invariants
	movq	%r12, %rdi
	callq	_cas_hard_reset
	movq	%r12, %rdi
	xorl	%esi, %esi
	callq	_cas_reset
	movq	%r12, %rdi
	callq	_cas_check_invariants
	testq	%rax, %rax
	je	LBB0_34
LBB0_57:
	movq	%r13, %rdi
	callq	_mutex_lock
	cmpl	$0, 24(%r12)
	je	LBB0_59
## %bb.58:
	movq	%r12, %rdi
	callq	_cas_shutdown
LBB0_59:
	movq	%r13, %rdi
	callq	_mutex_unlock
	movq	32(%r12), %rsi
	movq	%r15, %rdi
	callq	_pci_iounmap
	jmp	LBB0_60
LBB0_32:
	leaq	L_.str.8(%rip), %rsi
	movq	-72(%rbp), %rdi                 ## 8-byte Reload
	callq	_dev_err
LBB0_60:
	movq	_PCI_CACHE_LINE_SIZE@GOTPCREL(%rip), %r12
	jmp	LBB0_61
LBB0_15:
	leaq	L_.str.6(%rip), %rsi
LBB0_16:
	movq	%rbx, %rdi
	callq	_dev_err
LBB0_61:
	movq	%r15, %rdi
	callq	_pci_release_regions
LBB0_62:
	movl	(%r12), %esi
	movq	-64(%rbp), %rdx
	movq	%r15, %rdi
	callq	_pci_write_config_byte
LBB0_63:
	movq	%r14, %rdi
	callq	_free_netdev
LBB0_64:
	movq	%r15, %rdi
	callq	_pci_disable_device
	movq	_ENODEV@GOTPCREL(%rip), %rax
	xorl	%ebx, %ebx
	subl	(%rax), %ebx
LBB0_65:
	movl	%ebx, %eax
	addq	$56, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_34:
	movq	_CAS_FLAG_SATURN@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	testl	%eax, 8(%r12)
	je	LBB0_36
## %bb.35:
	movq	%r12, %rdi
	callq	_cas_saturn_firmware_init
LBB0_36:
	movq	%r12, %rdx
	addq	$44, %rdx
	movq	%r15, %rdi
	movl	$24, %esi
	callq	_pci_alloc_consistent
	movq	%rax, 48(%r12)
	testq	%rax, %rax
	je	LBB0_56
## %bb.37:
	movq	%r13, -56(%rbp)                 ## 8-byte Spill
	movq	_N_TX_RINGS@GOTPCREL(%rip), %rbx
	cmpl	$0, (%rbx)
	jle	LBB0_40
## %bb.38:
	movq	16(%rax), %rcx
	movq	88(%r12), %rdx
	xorl	%esi, %esi
LBB0_39:                                ## =>This Inner Loop Header: Depth=1
	movl	(%rcx,%rsi,4), %edi
	movl	%edi, (%rdx,%rsi,4)
	incq	%rsi
	movslq	(%rbx), %rdi
	cmpq	%rdi, %rsi
	jl	LBB0_39
LBB0_40:
	movq	%r14, -88(%rbp)                 ## 8-byte Spill
	movq	_N_RX_DESC_RINGS@GOTPCREL(%rip), %rcx
	cmpl	$0, (%rcx)
	jle	LBB0_43
## %bb.41:
	movq	8(%rax), %rdx
	movq	80(%r12), %rsi
	xorl	%edi, %edi
LBB0_42:                                ## =>This Inner Loop Header: Depth=1
	movl	(%rdx,%rdi,4), %ebx
	movl	%ebx, (%rsi,%rdi,4)
	incq	%rdi
	movslq	(%rcx), %rbx
	cmpq	%rbx, %rdi
	jl	LBB0_42
LBB0_43:
	movq	_N_RX_COMP_RINGS@GOTPCREL(%rip), %rcx
	cmpl	$0, (%rcx)
	jle	LBB0_46
## %bb.44:
	movq	(%rax), %rax
	movq	72(%r12), %rdx
	xorl	%esi, %esi
LBB0_45:                                ## =>This Inner Loop Header: Depth=1
	movl	(%rax,%rsi,4), %edi
	movl	%edi, (%rdx,%rsi,4)
	incq	%rsi
	movslq	(%rcx), %rdi
	cmpq	%rdi, %rsi
	jl	LBB0_45
LBB0_46:
	movq	_N_RX_FLOWS@GOTPCREL(%rip), %r14
	cmpl	$0, (%r14)
	jle	LBB0_49
## %bb.47:
	xorl	%ebx, %ebx
	xorl	%r13d, %r13d
LBB0_48:                                ## =>This Inner Loop Header: Depth=1
	movq	64(%r12), %rdi
	addq	%rbx, %rdi
	callq	_skb_queue_head_init
	incq	%r13
	movslq	(%r14), %rax
	addq	$4, %rbx
	cmpq	%rax, %r13
	jl	LBB0_48
LBB0_49:
	movq	_cas_netdev_ops@GOTPCREL(%rip), %rax
	movq	-88(%rbp), %r14                 ## 8-byte Reload
	movq	%rax, 40(%r14)
	movq	_cas_ethtool_ops@GOTPCREL(%rip), %rax
	movq	%rax, 32(%r14)
	movq	_CAS_TX_TIMEOUT@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 28(%r14)
	movl	(%r15), %eax
	movl	%eax, 24(%r14)
	movq	$0, 16(%r14)
	movq	_CAS_FLAG_NO_HW_CSUM@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	testl	%eax, 8(%r12)
	jne	LBB0_51
## %bb.50:
	movq	_NETIF_F_HW_CSUM@GOTPCREL(%rip), %rax
	movq	_NETIF_F_SG@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	orl	(%rax), %ecx
	orl	%ecx, (%r14)
LBB0_51:
	cmpl	$0, -76(%rbp)                   ## 4-byte Folded Reload
	movq	-56(%rbp), %r13                 ## 8-byte Reload
	jne	LBB0_53
## %bb.52:
	movq	_NETIF_F_HIGHDMA@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	orl	%eax, (%r14)
LBB0_53:
	movq	_CAS_MIN_MTU@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 12(%r14)
	movq	_CAS_MAX_MTU@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 8(%r14)
	movq	%r14, %rdi
	callq	_register_netdev
	testq	%rax, %rax
	je	LBB0_55
## %bb.54:
	leaq	L_.str.10(%rip), %rsi
	movq	-72(%rbp), %rdi                 ## 8-byte Reload
	callq	_dev_err
	movq	48(%r12), %rdx
	movl	44(%r12), %ecx
	movq	%r15, %rdi
	movl	$24, %esi
	callq	_pci_free_consistent
	jmp	LBB0_57
LBB0_56:
	leaq	L_.str.9(%rip), %rsi
	movq	-72(%rbp), %rdi                 ## 8-byte Reload
	callq	_dev_err
	jmp	LBB0_57
LBB0_55:
	movq	_REG_BIM_CFG@GOTPCREL(%rip), %rax
	movq	(%rax), %rdi
	addq	32(%r12), %rdi
	callq	_readl
	movq	_CAS_FLAG_REG_PLUS@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	andl	8(%r12), %ecx
	leaq	L_.str.13(%rip), %rcx
	leaq	L_.str.12(%rip), %rdx
	cmoveq	%rcx, %rdx
	movq	_BIM_CFG_32BIT@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	andl	%eax, %ecx
	leaq	L_.str.15(%rip), %rsi
	leaq	L_.str.14(%rip), %rcx
	cmoveq	%rsi, %rcx
	movq	_BIM_CFG_66MHZ@GOTPCREL(%rip), %rsi
	andl	(%rsi), %eax
	leaq	L_.str.17(%rip), %rax
	leaq	L_.str.16(%rip), %r8
	cmoveq	%rax, %r8
	movq	16(%r12), %rax
	movq	_CAS_PHY_SERDES@GOTPCREL(%rip), %rsi
	cmpq	(%rsi), %rax
	leaq	L_.str.18(%rip), %rax
	leaq	L_.str.19(%rip), %r9
	cmoveq	%rax, %r9
	movl	(%r15), %eax
	movl	4(%r14), %ebx
	leaq	L_.str.11(%rip), %rsi
	movq	%r14, %rdi
	pushq	%rbx
	pushq	%rax
	callq	_netdev_info
	addq	$16, %rsp
	movq	%r15, %rdi
	movq	%r14, %rsi
	callq	_pci_set_drvdata
	movl	$1, 24(%r12)
	movq	%r12, %rdi
	callq	_cas_entropy_reset
	movq	%r12, %rdi
	callq	_cas_phy_init
	xorl	%ebx, %ebx
	movq	%r12, %rdi
	xorl	%esi, %esi
	callq	_cas_begin_auto_negotiation
	jmp	LBB0_65
	.cfi_endproc
                                        ## -- End function
.zerofill __DATA,__bss,_cas_init_one.cas_version_printed,4,2 ## @cas_init_one.cas_version_printed
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"%s"

	.comm	_version,4,2                    ## @version
L_.str.1:                               ## @.str.1
	.asciz	"Cannot enable PCI device, aborting\n"

	.comm	_IORESOURCE_MEM,4,2             ## @IORESOURCE_MEM
L_.str.2:                               ## @.str.2
	.asciz	"Cannot find proper PCI device base address, aborting\n"

	.comm	_ENODEV,4,2                     ## @ENODEV
	.comm	_ENOMEM,4,2                     ## @ENOMEM
L_.str.3:                               ## @.str.3
	.asciz	"Cannot obtain PCI resources, aborting\n"

	.comm	_PCI_COMMAND,4,2                ## @PCI_COMMAND
	.comm	_PCI_COMMAND_SERR,4,2           ## @PCI_COMMAND_SERR
	.comm	_PCI_COMMAND_PARITY,4,2         ## @PCI_COMMAND_PARITY
L_.str.4:                               ## @.str.4
	.asciz	"Could not enable MWI for %s\n"

	.comm	_PCI_CACHE_LINE_SIZE,4,2        ## @PCI_CACHE_LINE_SIZE
	.comm	_CAS_PREF_CACHELINE_SIZE,8,3    ## @CAS_PREF_CACHELINE_SIZE
	.comm	_SMP_CACHE_BYTES,8,3            ## @SMP_CACHE_BYTES
L_.str.5:                               ## @.str.5
	.asciz	"Could not set PCI cache line size\n"

L_.str.6:                               ## @.str.6
	.asciz	"Unable to obtain 64-bit DMA for consistent allocations\n"

L_.str.7:                               ## @.str.7
	.asciz	"No usable DMA configuration, aborting\n"

	.comm	_cassini_debug,8,3              ## @cassini_debug
	.comm	_CAS_DEF_MSG_ENABLE,8,3         ## @CAS_DEF_MSG_ENABLE
	.comm	_LINK_TRANSITION_UNKNOWN,4,2    ## @LINK_TRANSITION_UNKNOWN
	.comm	_N_TX_RINGS,4,2                 ## @N_TX_RINGS
	.comm	_cas_link_timer,4,2             ## @cas_link_timer
	.comm	_cas_reset_task,4,2             ## @cas_reset_task
	.comm	_link_mode,4,2                  ## @link_mode
	.comm	_link_modes,8,3                 ## @link_modes
	.comm	_BMCR_ANENABLE,4,2              ## @BMCR_ANENABLE
	.comm	_link_down,4,2                  ## @link_down
	.comm	_LINK_TRANSITION_LINK_DOWN,4,2  ## @LINK_TRANSITION_LINK_DOWN
L_.str.8:                               ## @.str.8
	.asciz	"Cannot map device registers, aborting\n"

	.comm	_CAS_FLAG_SATURN,4,2            ## @CAS_FLAG_SATURN
L_.str.9:                               ## @.str.9
	.asciz	"Cannot allocate init block, aborting\n"

	.comm	_N_RX_DESC_RINGS,4,2            ## @N_RX_DESC_RINGS
	.comm	_N_RX_COMP_RINGS,4,2            ## @N_RX_COMP_RINGS
	.comm	_N_RX_FLOWS,4,2                 ## @N_RX_FLOWS
	.comm	_cas_netdev_ops,4,2             ## @cas_netdev_ops
	.comm	_cas_ethtool_ops,4,2            ## @cas_ethtool_ops
	.comm	_CAS_TX_TIMEOUT,4,2             ## @CAS_TX_TIMEOUT
	.comm	_CAS_FLAG_NO_HW_CSUM,4,2        ## @CAS_FLAG_NO_HW_CSUM
	.comm	_NETIF_F_HW_CSUM,4,2            ## @NETIF_F_HW_CSUM
	.comm	_NETIF_F_SG,4,2                 ## @NETIF_F_SG
	.comm	_NETIF_F_HIGHDMA,4,2            ## @NETIF_F_HIGHDMA
	.comm	_CAS_MIN_MTU,4,2                ## @CAS_MIN_MTU
	.comm	_CAS_MAX_MTU,4,2                ## @CAS_MAX_MTU
L_.str.10:                              ## @.str.10
	.asciz	"Cannot register net device, aborting\n"

	.comm	_REG_BIM_CFG,8,3                ## @REG_BIM_CFG
L_.str.11:                              ## @.str.11
	.asciz	"Sun Cassini%s (%sbit/%sMHz PCI/%s) Ethernet[%d] %pM\n"

	.comm	_CAS_FLAG_REG_PLUS,4,2          ## @CAS_FLAG_REG_PLUS
L_.str.12:                              ## @.str.12
	.asciz	"+"

L_.str.13:                              ## @.str.13
	.space	1

	.comm	_BIM_CFG_32BIT,4,2              ## @BIM_CFG_32BIT
L_.str.14:                              ## @.str.14
	.asciz	"32"

L_.str.15:                              ## @.str.15
	.asciz	"64"

	.comm	_BIM_CFG_66MHZ,4,2              ## @BIM_CFG_66MHZ
L_.str.16:                              ## @.str.16
	.asciz	"66"

L_.str.17:                              ## @.str.17
	.asciz	"33"

	.comm	_CAS_PHY_SERDES,8,3             ## @CAS_PHY_SERDES
L_.str.18:                              ## @.str.18
	.asciz	"Fi"

L_.str.19:                              ## @.str.19
	.asciz	"Cu"

	.comm	_cas_poll,4,2                   ## @cas_poll
	.no_dead_strip	_cas_init_one
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function cas_init_one
_cas_init_one:                          ; @cas_init_one
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #112
	.cfi_def_cfa_offset 112
	stp	x28, x27, [sp, #16]             ; 16-byte Folded Spill
	stp	x26, x25, [sp, #32]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #48]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #64]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #80]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #96]             ; 16-byte Folded Spill
	add	x29, sp, #96
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	mov	x19, x0
	str	xzr, [sp]
	adrp	x8, _cas_init_one.cas_version_printed@PAGE
	ldr	w9, [x8, _cas_init_one.cas_version_printed@PAGEOFF]
	add	w10, w9, #1
	str	w10, [x8, _cas_init_one.cas_version_printed@PAGEOFF]
	cbnz	w9, LBB0_2
; %bb.1:
Lloh0:
	adrp	x8, _version@GOTPAGE
Lloh1:
	ldr	x8, [x8, _version@GOTPAGEOFF]
Lloh2:
	ldr	w1, [x8]
Lloh3:
	adrp	x0, l_.str@PAGE
Lloh4:
	add	x0, x0, l_.str@PAGEOFF
	bl	_pr_info
LBB0_2:
	mov	x0, x19
	bl	_pci_enable_device
	cbz	w0, LBB0_4
; %bb.3:
	mov	x20, x0
	add	x0, x19, #4
Lloh5:
	adrp	x1, l_.str.1@PAGE
Lloh6:
	add	x1, x1, l_.str.1@PAGEOFF
	bl	_dev_err
	b	LBB0_34
LBB0_4:
	mov	x0, x19
	mov	w1, #0
	bl	_pci_resource_flags
Lloh7:
	adrp	x8, _IORESOURCE_MEM@GOTPAGE
Lloh8:
	ldr	x8, [x8, _IORESOURCE_MEM@GOTPAGEOFF]
Lloh9:
	ldr	w8, [x8]
	tst	w8, w0
	b.eq	LBB0_8
; %bb.5:
	mov	w0, #224
	bl	_alloc_etherdev
	cbz	x0, LBB0_33
; %bb.6:
	mov	x20, x0
	add	x21, x19, #4
	mov	x1, x21
	bl	_SET_NETDEV_DEV
	ldr	w1, [x20, #48]
	mov	x0, x19
	bl	_pci_request_regions
	cbz	w0, LBB0_9
; %bb.7:
Lloh10:
	adrp	x1, l_.str.3@PAGE
Lloh11:
	add	x1, x1, l_.str.3@PAGEOFF
	mov	x0, x21
	bl	_dev_err
	b	LBB0_32
LBB0_8:
	add	x0, x19, #4
Lloh12:
	adrp	x1, l_.str.2@PAGE
Lloh13:
	add	x1, x1, l_.str.2@PAGEOFF
	bl	_dev_err
	b	LBB0_33
LBB0_9:
	mov	x0, x19
	bl	_pci_set_master
Lloh14:
	adrp	x22, _PCI_COMMAND@GOTPAGE
Lloh15:
	ldr	x22, [x22, _PCI_COMMAND@GOTPAGEOFF]
	ldr	w1, [x22]
	add	x2, sp, #12
	mov	x0, x19
	bl	_pci_read_config_word
Lloh16:
	adrp	x8, _PCI_COMMAND_SERR@GOTPAGE
Lloh17:
	ldr	x8, [x8, _PCI_COMMAND_SERR@GOTPAGEOFF]
Lloh18:
	ldr	w8, [x8]
	ldr	w9, [sp, #12]
	bic	w8, w9, w8
Lloh19:
	adrp	x9, _PCI_COMMAND_PARITY@GOTPAGE
Lloh20:
	ldr	x9, [x9, _PCI_COMMAND_PARITY@GOTPAGEOFF]
Lloh21:
	ldr	w9, [x9]
	orr	w2, w9, w8
	str	w2, [sp, #12]
	ldr	w1, [x22]
	mov	x0, x19
	bl	_pci_write_config_word
	mov	x0, x19
	bl	_pci_try_set_mwi
	cbz	x0, LBB0_11
; %bb.10:
	mov	x0, x19
	bl	_pci_name
	mov	x1, x0
Lloh22:
	adrp	x0, l_.str.4@PAGE
Lloh23:
	add	x0, x0, l_.str.4@PAGEOFF
	bl	_pr_warn
LBB0_11:
	mov	x0, x19
	bl	_cas_program_bridge
Lloh24:
	adrp	x26, _PCI_CACHE_LINE_SIZE@GOTPAGE
Lloh25:
	ldr	x26, [x26, _PCI_CACHE_LINE_SIZE@GOTPAGEOFF]
	ldr	w1, [x26]
	mov	x2, sp
	mov	x0, x19
	bl	_pci_read_config_byte
	ldr	x9, [sp]
Lloh26:
	adrp	x8, _CAS_PREF_CACHELINE_SIZE@GOTPAGE
Lloh27:
	ldr	x8, [x8, _CAS_PREF_CACHELINE_SIZE@GOTPAGEOFF]
Lloh28:
	ldr	x8, [x8]
	cmp	x9, x8
	b.ge	LBB0_14
; %bb.12:
Lloh29:
	adrp	x9, _SMP_CACHE_BYTES@GOTPAGE
Lloh30:
	ldr	x9, [x9, _SMP_CACHE_BYTES@GOTPAGEOFF]
Lloh31:
	ldr	x9, [x9]
	cmp	x8, x9
	csel	x24, x8, x9, lt
	ldr	w1, [x26]
	mov	x0, x19
	mov	x2, x24
	bl	_pci_write_config_byte
	cbz	x0, LBB0_15
; %bb.13:
Lloh32:
	adrp	x1, l_.str.5@PAGE
Lloh33:
	add	x1, x1, l_.str.5@PAGEOFF
	mov	x0, x21
	bl	_dev_err
	b	LBB0_31
LBB0_14:
	mov	x24, #0
LBB0_15:
	mov	w0, #64
	bl	_DMA_BIT_MASK
	mov	x1, x0
	mov	x0, x19
	bl	_pci_set_dma_mask
	mov	x23, x0
	cbz	w0, LBB0_18
; %bb.16:
	mov	w0, #32
	bl	_DMA_BIT_MASK
	mov	x1, x0
	mov	x0, x19
	bl	_pci_set_dma_mask
	cbz	w0, LBB0_19
; %bb.17:
Lloh34:
	adrp	x1, l_.str.7@PAGE
Lloh35:
	add	x1, x1, l_.str.7@PAGEOFF
	b	LBB0_29
LBB0_18:
	mov	w0, #64
	bl	_DMA_BIT_MASK
	mov	x1, x0
	mov	x0, x19
	bl	_pci_set_consistent_dma_mask
	tbnz	w0, #31, LBB0_28
LBB0_19:
	mov	x0, x19
	mov	w1, #0
	bl	_pci_resource_len
	mov	x25, x0
	mov	x0, x20
	bl	_netdev_priv
	mov	x22, x0
	ldr	x8, [sp]
	cmp	x24, #0
	csel	x8, xzr, x8, eq
Lloh36:
	adrp	x9, _cassini_debug@GOTPAGE
Lloh37:
	ldr	x9, [x9, _cassini_debug@GOTPAGEOFF]
Lloh38:
	ldr	x9, [x9]
Lloh39:
	adrp	x10, _CAS_DEF_MSG_ENABLE@GOTPAGE
Lloh40:
	ldr	x10, [x10, _CAS_DEF_MSG_ENABLE@GOTPAGEOFF]
Lloh41:
	ldr	x10, [x10]
	cmp	x9, #0
	csel	x9, x10, x9, lt
	stp	x8, x19, [x0, #208]
	str	x20, [x0, #104]
	str	x9, [x0, #200]
Lloh42:
	adrp	x8, _LINK_TRANSITION_UNKNOWN@GOTPAGE
Lloh43:
	ldr	x8, [x8, _LINK_TRANSITION_UNKNOWN@GOTPAGEOFF]
Lloh44:
	ldr	w8, [x8]
	str	w8, [x0, #112]
	str	xzr, [x0, #184]
	add	x0, x0, #176
	bl	_spin_lock_init
	add	x0, x22, #172
	bl	_spin_lock_init
	add	x0, x22, #168
	bl	_spin_lock_init
Lloh45:
	adrp	x27, _N_TX_RINGS@GOTPAGE
Lloh46:
	ldr	x27, [x27, _N_TX_RINGS@GOTPAGEOFF]
	ldr	w8, [x27]
	cmp	w8, #1
	b.lt	LBB0_22
; %bb.20:
	mov	x24, #0
	mov	x28, #0
LBB0_21:                                ; =>This Inner Loop Header: Depth=1
	ldr	x8, [x22, #152]
	add	x0, x8, x24
	bl	_spin_lock_init
	ldr	x8, [x22, #160]
	add	x0, x8, x24
	bl	_spin_lock_init
	add	x28, x28, #1
	ldrsw	x8, [x27]
	add	x24, x24, #4
	cmp	x28, x8
	b.lt	LBB0_21
LBB0_22:
	ldr	x9, [x22, #152]
	add	x0, x9, w8, sxtw #2
	bl	_spin_lock_init
	add	x24, x22, #40
	mov	x0, x24
	bl	_mutex_init
	add	x0, x22, #144
Lloh47:
	adrp	x8, _cas_link_timer@GOTPAGE
Lloh48:
	ldr	x8, [x8, _cas_link_timer@GOTPAGEOFF]
Lloh49:
	ldr	w1, [x8]
	mov	w2, #0
	bl	_timer_setup
	add	x0, x22, #140
	mov	w1, #0
	bl	_atomic_set
	add	x0, x22, #136
	mov	w1, #0
	bl	_atomic_set
	add	x0, x22, #132
	mov	w1, #0
	bl	_atomic_set
	add	x0, x22, #128
	mov	w1, #0
	bl	_atomic_set
	add	x0, x22, #124
Lloh50:
	adrp	x8, _cas_reset_task@GOTPAGE
Lloh51:
	ldr	x8, [x8, _cas_reset_task@GOTPAGEOFF]
Lloh52:
	ldr	w1, [x8]
	bl	_INIT_WORK
Lloh53:
	adrp	x8, _link_mode@GOTPAGE
Lloh54:
	ldr	x8, [x8, _link_mode@GOTPAGEOFF]
Lloh55:
	adrp	x9, _link_modes@GOTPAGE
Lloh56:
	ldr	x9, [x9, _link_modes@GOTPAGEOFF]
Lloh57:
	ldr	w8, [x8]
Lloh58:
	ldr	x9, [x9]
	add	x9, x9, x8, lsl #2
Lloh59:
	adrp	x10, _BMCR_ANENABLE@GOTPAGE
Lloh60:
	ldr	x10, [x10, _BMCR_ANENABLE@GOTPAGEOFF]
	cmp	w8, #6
	csel	x8, x9, x10, lo
	ldr	w8, [x8]
	str	w8, [x22, #120]
Lloh61:
	adrp	x8, _link_down@GOTPAGE
Lloh62:
	ldr	x8, [x8, _link_down@GOTPAGEOFF]
Lloh63:
	ldr	w8, [x8]
Lloh64:
	adrp	x9, _LINK_TRANSITION_LINK_DOWN@GOTPAGE
Lloh65:
	ldr	x9, [x9, _LINK_TRANSITION_LINK_DOWN@GOTPAGEOFF]
Lloh66:
	ldr	w9, [x9]
	stp	w9, w8, [x22, #112]
	ldr	x0, [x22, #104]
	bl	_netif_carrier_off
	str	xzr, [x22, #96]
	mov	x0, x19
	mov	w1, #0
	mov	x2, x25
	bl	_pci_iomap
	str	x0, [x22, #32]
	cbz	x0, LBB0_27
; %bb.23:
	str	x25, [x22]
	mov	x0, x19
	bl	_pci_save_state
	mov	x0, x22
	bl	_cas_check_pci_invariants
	mov	x0, x22
	bl	_cas_hard_reset
	mov	x0, x22
	mov	w1, #0
	bl	_cas_reset
	mov	x0, x22
	bl	_cas_check_invariants
	cbz	x0, LBB0_35
LBB0_24:
	mov	x0, x24
	bl	_mutex_lock
	ldr	w8, [x22, #24]
	cbz	w8, LBB0_26
; %bb.25:
	mov	x0, x22
	bl	_cas_shutdown
LBB0_26:
	mov	x0, x24
	bl	_mutex_unlock
	ldr	x1, [x22, #32]
	mov	x0, x19
	bl	_pci_iounmap
	b	LBB0_30
LBB0_27:
Lloh67:
	adrp	x1, l_.str.8@PAGE
Lloh68:
	add	x1, x1, l_.str.8@PAGEOFF
	b	LBB0_29
LBB0_28:
Lloh69:
	adrp	x1, l_.str.6@PAGE
Lloh70:
	add	x1, x1, l_.str.6@PAGEOFF
LBB0_29:
	mov	x0, x21
	bl	_dev_err
LBB0_30:
	mov	x0, x19
	bl	_pci_release_regions
LBB0_31:
	ldr	w1, [x26]
	ldr	x2, [sp]
	mov	x0, x19
	bl	_pci_write_config_byte
LBB0_32:
	mov	x0, x20
	bl	_free_netdev
LBB0_33:
	mov	x0, x19
	bl	_pci_disable_device
Lloh71:
	adrp	x8, _ENODEV@GOTPAGE
Lloh72:
	ldr	x8, [x8, _ENODEV@GOTPAGEOFF]
Lloh73:
	ldr	w8, [x8]
	neg	w20, w8
LBB0_34:
	mov	x0, x20
	ldp	x29, x30, [sp, #96]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #80]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #64]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #48]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #32]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #112
	ret
LBB0_35:
	ldr	w8, [x22, #8]
Lloh74:
	adrp	x9, _CAS_FLAG_SATURN@GOTPAGE
Lloh75:
	ldr	x9, [x9, _CAS_FLAG_SATURN@GOTPAGEOFF]
Lloh76:
	ldr	w9, [x9]
	tst	w9, w8
	b.eq	LBB0_37
; %bb.36:
	mov	x0, x22
	bl	_cas_saturn_firmware_init
LBB0_37:
	add	x2, x22, #44
	mov	x0, x19
	mov	w1, #24
	bl	_pci_alloc_consistent
	str	x0, [x22, #48]
	cbz	x0, LBB0_56
; %bb.38:
	ldr	w8, [x27]
	cmp	w8, #1
	b.lt	LBB0_41
; %bb.39:
	mov	x8, #0
	ldr	x9, [x0, #16]
	ldr	x10, [x22, #88]
LBB0_40:                                ; =>This Inner Loop Header: Depth=1
	lsl	x11, x8, #2
	ldr	w12, [x9, x11]
	str	w12, [x10, x11]
	add	x8, x8, #1
	ldrsw	x11, [x27]
	cmp	x8, x11
	b.lt	LBB0_40
LBB0_41:
Lloh77:
	adrp	x8, _N_RX_DESC_RINGS@GOTPAGE
Lloh78:
	ldr	x8, [x8, _N_RX_DESC_RINGS@GOTPAGEOFF]
	ldr	w9, [x8]
	cmp	w9, #1
	b.lt	LBB0_44
; %bb.42:
	mov	x9, #0
	ldr	x10, [x0, #8]
	ldr	x11, [x22, #80]
LBB0_43:                                ; =>This Inner Loop Header: Depth=1
	lsl	x12, x9, #2
	ldr	w13, [x10, x12]
	str	w13, [x11, x12]
	add	x9, x9, #1
	ldrsw	x12, [x8]
	cmp	x9, x12
	b.lt	LBB0_43
LBB0_44:
Lloh79:
	adrp	x8, _N_RX_COMP_RINGS@GOTPAGE
Lloh80:
	ldr	x8, [x8, _N_RX_COMP_RINGS@GOTPAGEOFF]
	ldr	w9, [x8]
	cmp	w9, #1
	b.lt	LBB0_47
; %bb.45:
	mov	x9, #0
	ldr	x10, [x0]
	ldr	x11, [x22, #72]
LBB0_46:                                ; =>This Inner Loop Header: Depth=1
	lsl	x12, x9, #2
	ldr	w13, [x10, x12]
	str	w13, [x11, x12]
	add	x9, x9, #1
	ldrsw	x12, [x8]
	cmp	x9, x12
	b.lt	LBB0_46
LBB0_47:
Lloh81:
	adrp	x25, _N_RX_FLOWS@GOTPAGE
Lloh82:
	ldr	x25, [x25, _N_RX_FLOWS@GOTPAGEOFF]
	ldr	w8, [x25]
	cmp	w8, #1
	b.lt	LBB0_50
; %bb.48:
	mov	x27, #0
	mov	x28, #0
LBB0_49:                                ; =>This Inner Loop Header: Depth=1
	ldr	x8, [x22, #64]
	add	x0, x8, x27
	bl	_skb_queue_head_init
	add	x28, x28, #1
	ldrsw	x8, [x25]
	add	x27, x27, #4
	cmp	x28, x8
	b.lt	LBB0_49
LBB0_50:
Lloh83:
	adrp	x8, _cas_netdev_ops@GOTPAGE
Lloh84:
	ldr	x8, [x8, _cas_netdev_ops@GOTPAGEOFF]
Lloh85:
	adrp	x9, _cas_ethtool_ops@GOTPAGE
Lloh86:
	ldr	x9, [x9, _cas_ethtool_ops@GOTPAGEOFF]
	stp	x9, x8, [x20, #32]
Lloh87:
	adrp	x8, _CAS_TX_TIMEOUT@GOTPAGE
Lloh88:
	ldr	x8, [x8, _CAS_TX_TIMEOUT@GOTPAGEOFF]
Lloh89:
	ldr	w8, [x8]
	ldr	w9, [x19]
	stp	w9, w8, [x20, #24]
	str	xzr, [x20, #16]
	ldr	w8, [x22, #8]
Lloh90:
	adrp	x9, _CAS_FLAG_NO_HW_CSUM@GOTPAGE
Lloh91:
	ldr	x9, [x9, _CAS_FLAG_NO_HW_CSUM@GOTPAGEOFF]
Lloh92:
	ldr	w9, [x9]
	tst	w9, w8
	b.ne	LBB0_52
; %bb.51:
Lloh93:
	adrp	x8, _NETIF_F_HW_CSUM@GOTPAGE
Lloh94:
	ldr	x8, [x8, _NETIF_F_HW_CSUM@GOTPAGEOFF]
Lloh95:
	adrp	x9, _NETIF_F_SG@GOTPAGE
Lloh96:
	ldr	x9, [x9, _NETIF_F_SG@GOTPAGEOFF]
Lloh97:
	ldr	w8, [x8]
Lloh98:
	ldr	w9, [x9]
	orr	w8, w9, w8
	ldr	w9, [x20]
	orr	w8, w8, w9
	str	w8, [x20]
LBB0_52:
	cbnz	w23, LBB0_54
; %bb.53:
Lloh99:
	adrp	x8, _NETIF_F_HIGHDMA@GOTPAGE
Lloh100:
	ldr	x8, [x8, _NETIF_F_HIGHDMA@GOTPAGEOFF]
Lloh101:
	ldr	w8, [x8]
	ldr	w9, [x20]
	orr	w8, w9, w8
	str	w8, [x20]
LBB0_54:
Lloh102:
	adrp	x8, _CAS_MIN_MTU@GOTPAGE
Lloh103:
	ldr	x8, [x8, _CAS_MIN_MTU@GOTPAGEOFF]
Lloh104:
	ldr	w8, [x8]
Lloh105:
	adrp	x9, _CAS_MAX_MTU@GOTPAGE
Lloh106:
	ldr	x9, [x9, _CAS_MAX_MTU@GOTPAGEOFF]
Lloh107:
	ldr	w9, [x9]
	stp	w9, w8, [x20, #8]
	mov	x0, x20
	bl	_register_netdev
	cbz	x0, LBB0_57
; %bb.55:
Lloh108:
	adrp	x1, l_.str.10@PAGE
Lloh109:
	add	x1, x1, l_.str.10@PAGEOFF
	mov	x0, x21
	bl	_dev_err
	ldr	x2, [x22, #48]
	ldr	w3, [x22, #44]
	mov	x0, x19
	mov	w1, #24
	bl	_pci_free_consistent
	b	LBB0_24
LBB0_56:
Lloh110:
	adrp	x1, l_.str.9@PAGE
Lloh111:
	add	x1, x1, l_.str.9@PAGEOFF
	mov	x0, x21
	bl	_dev_err
	b	LBB0_24
LBB0_57:
	ldr	x8, [x22, #32]
Lloh112:
	adrp	x9, _REG_BIM_CFG@GOTPAGE
Lloh113:
	ldr	x9, [x9, _REG_BIM_CFG@GOTPAGEOFF]
Lloh114:
	ldr	x9, [x9]
	add	x0, x9, x8
	bl	_readl
	ldr	w8, [x22, #8]
Lloh115:
	adrp	x9, _CAS_FLAG_REG_PLUS@GOTPAGE
Lloh116:
	ldr	x9, [x9, _CAS_FLAG_REG_PLUS@GOTPAGEOFF]
Lloh117:
	ldr	w9, [x9]
Lloh118:
	adrp	x10, l_.str.12@PAGE
Lloh119:
	add	x10, x10, l_.str.12@PAGEOFF
Lloh120:
	adrp	x11, l_.str.13@PAGE
Lloh121:
	add	x11, x11, l_.str.13@PAGEOFF
	tst	w9, w8
	csel	x2, x11, x10, eq
Lloh122:
	adrp	x8, _BIM_CFG_32BIT@GOTPAGE
Lloh123:
	ldr	x8, [x8, _BIM_CFG_32BIT@GOTPAGEOFF]
Lloh124:
	adrp	x9, l_.str.14@PAGE
Lloh125:
	add	x9, x9, l_.str.14@PAGEOFF
Lloh126:
	adrp	x10, l_.str.15@PAGE
Lloh127:
	add	x10, x10, l_.str.15@PAGEOFF
Lloh128:
	ldr	w8, [x8]
	tst	w8, w0
	csel	x3, x10, x9, eq
Lloh129:
	adrp	x8, _BIM_CFG_66MHZ@GOTPAGE
Lloh130:
	ldr	x8, [x8, _BIM_CFG_66MHZ@GOTPAGEOFF]
Lloh131:
	ldr	w8, [x8]
Lloh132:
	adrp	x9, l_.str.16@PAGE
Lloh133:
	add	x9, x9, l_.str.16@PAGEOFF
Lloh134:
	adrp	x10, l_.str.17@PAGE
Lloh135:
	add	x10, x10, l_.str.17@PAGEOFF
	tst	w8, w0
	csel	x4, x10, x9, eq
	ldr	x8, [x22, #16]
Lloh136:
	adrp	x9, _CAS_PHY_SERDES@GOTPAGE
Lloh137:
	ldr	x9, [x9, _CAS_PHY_SERDES@GOTPAGEOFF]
Lloh138:
	ldr	x9, [x9]
Lloh139:
	adrp	x10, l_.str.19@PAGE
Lloh140:
	add	x10, x10, l_.str.19@PAGEOFF
Lloh141:
	adrp	x11, l_.str.18@PAGE
Lloh142:
	add	x11, x11, l_.str.18@PAGEOFF
	cmp	x8, x9
	csel	x5, x11, x10, eq
	ldr	w6, [x19]
	ldr	w7, [x20, #4]
Lloh143:
	adrp	x1, l_.str.11@PAGE
Lloh144:
	add	x1, x1, l_.str.11@PAGEOFF
	mov	x0, x20
	bl	_netdev_info
	mov	x0, x19
	mov	x1, x20
	bl	_pci_set_drvdata
	mov	w8, #1
	str	w8, [x22, #24]
	mov	x0, x22
	bl	_cas_entropy_reset
	mov	x0, x22
	bl	_cas_phy_init
	mov	x0, x22
	mov	x1, #0
	bl	_cas_begin_auto_negotiation
	mov	w20, #0
	b	LBB0_34
	.loh AdrpAdd	Lloh3, Lloh4
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpAdd	Lloh5, Lloh6
	.loh AdrpLdrGotLdr	Lloh7, Lloh8, Lloh9
	.loh AdrpAdd	Lloh10, Lloh11
	.loh AdrpAdd	Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh19, Lloh20, Lloh21
	.loh AdrpLdrGotLdr	Lloh16, Lloh17, Lloh18
	.loh AdrpLdrGot	Lloh14, Lloh15
	.loh AdrpAdd	Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh26, Lloh27, Lloh28
	.loh AdrpLdrGot	Lloh24, Lloh25
	.loh AdrpLdrGotLdr	Lloh29, Lloh30, Lloh31
	.loh AdrpAdd	Lloh32, Lloh33
	.loh AdrpAdd	Lloh34, Lloh35
	.loh AdrpLdrGot	Lloh45, Lloh46
	.loh AdrpLdrGotLdr	Lloh42, Lloh43, Lloh44
	.loh AdrpLdrGotLdr	Lloh39, Lloh40, Lloh41
	.loh AdrpLdrGotLdr	Lloh36, Lloh37, Lloh38
	.loh AdrpLdrGotLdr	Lloh64, Lloh65, Lloh66
	.loh AdrpLdrGotLdr	Lloh61, Lloh62, Lloh63
	.loh AdrpLdrGot	Lloh59, Lloh60
	.loh AdrpLdrGotLdr	Lloh55, Lloh56, Lloh58
	.loh AdrpLdrGotLdr	Lloh53, Lloh54, Lloh57
	.loh AdrpLdrGotLdr	Lloh50, Lloh51, Lloh52
	.loh AdrpLdrGotLdr	Lloh47, Lloh48, Lloh49
	.loh AdrpAdd	Lloh67, Lloh68
	.loh AdrpAdd	Lloh69, Lloh70
	.loh AdrpLdrGotLdr	Lloh71, Lloh72, Lloh73
	.loh AdrpLdrGotLdr	Lloh74, Lloh75, Lloh76
	.loh AdrpLdrGot	Lloh77, Lloh78
	.loh AdrpLdrGot	Lloh79, Lloh80
	.loh AdrpLdrGot	Lloh81, Lloh82
	.loh AdrpLdrGotLdr	Lloh90, Lloh91, Lloh92
	.loh AdrpLdrGotLdr	Lloh87, Lloh88, Lloh89
	.loh AdrpLdrGot	Lloh85, Lloh86
	.loh AdrpLdrGot	Lloh83, Lloh84
	.loh AdrpLdrGotLdr	Lloh95, Lloh96, Lloh98
	.loh AdrpLdrGotLdr	Lloh93, Lloh94, Lloh97
	.loh AdrpLdrGotLdr	Lloh99, Lloh100, Lloh101
	.loh AdrpLdrGotLdr	Lloh105, Lloh106, Lloh107
	.loh AdrpLdrGotLdr	Lloh102, Lloh103, Lloh104
	.loh AdrpAdd	Lloh108, Lloh109
	.loh AdrpAdd	Lloh110, Lloh111
	.loh AdrpAdd	Lloh143, Lloh144
	.loh AdrpAdd	Lloh141, Lloh142
	.loh AdrpAdd	Lloh139, Lloh140
	.loh AdrpLdrGotLdr	Lloh136, Lloh137, Lloh138
	.loh AdrpAdd	Lloh134, Lloh135
	.loh AdrpAdd	Lloh132, Lloh133
	.loh AdrpLdrGotLdr	Lloh129, Lloh130, Lloh131
	.loh AdrpAdd	Lloh126, Lloh127
	.loh AdrpAdd	Lloh124, Lloh125
	.loh AdrpLdrGotLdr	Lloh122, Lloh123, Lloh128
	.loh AdrpAdd	Lloh120, Lloh121
	.loh AdrpAdd	Lloh118, Lloh119
	.loh AdrpLdrGotLdr	Lloh115, Lloh116, Lloh117
	.loh AdrpLdrGotLdr	Lloh112, Lloh113, Lloh114
	.cfi_endproc
                                        ; -- End function
.zerofill __DATA,__bss,_cas_init_one.cas_version_printed,4,2 ; @cas_init_one.cas_version_printed
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"%s"

	.comm	_version,4,2                    ; @version
l_.str.1:                               ; @.str.1
	.asciz	"Cannot enable PCI device, aborting\n"

	.comm	_IORESOURCE_MEM,4,2             ; @IORESOURCE_MEM
l_.str.2:                               ; @.str.2
	.asciz	"Cannot find proper PCI device base address, aborting\n"

	.comm	_ENODEV,4,2                     ; @ENODEV
	.comm	_ENOMEM,4,2                     ; @ENOMEM
l_.str.3:                               ; @.str.3
	.asciz	"Cannot obtain PCI resources, aborting\n"

	.comm	_PCI_COMMAND,4,2                ; @PCI_COMMAND
	.comm	_PCI_COMMAND_SERR,4,2           ; @PCI_COMMAND_SERR
	.comm	_PCI_COMMAND_PARITY,4,2         ; @PCI_COMMAND_PARITY
l_.str.4:                               ; @.str.4
	.asciz	"Could not enable MWI for %s\n"

	.comm	_PCI_CACHE_LINE_SIZE,4,2        ; @PCI_CACHE_LINE_SIZE
	.comm	_CAS_PREF_CACHELINE_SIZE,8,3    ; @CAS_PREF_CACHELINE_SIZE
	.comm	_SMP_CACHE_BYTES,8,3            ; @SMP_CACHE_BYTES
l_.str.5:                               ; @.str.5
	.asciz	"Could not set PCI cache line size\n"

l_.str.6:                               ; @.str.6
	.asciz	"Unable to obtain 64-bit DMA for consistent allocations\n"

l_.str.7:                               ; @.str.7
	.asciz	"No usable DMA configuration, aborting\n"

	.comm	_cassini_debug,8,3              ; @cassini_debug
	.comm	_CAS_DEF_MSG_ENABLE,8,3         ; @CAS_DEF_MSG_ENABLE
	.comm	_LINK_TRANSITION_UNKNOWN,4,2    ; @LINK_TRANSITION_UNKNOWN
	.comm	_N_TX_RINGS,4,2                 ; @N_TX_RINGS
	.comm	_cas_link_timer,4,2             ; @cas_link_timer
	.comm	_cas_reset_task,4,2             ; @cas_reset_task
	.comm	_link_mode,4,2                  ; @link_mode
	.comm	_link_modes,8,3                 ; @link_modes
	.comm	_BMCR_ANENABLE,4,2              ; @BMCR_ANENABLE
	.comm	_link_down,4,2                  ; @link_down
	.comm	_LINK_TRANSITION_LINK_DOWN,4,2  ; @LINK_TRANSITION_LINK_DOWN
l_.str.8:                               ; @.str.8
	.asciz	"Cannot map device registers, aborting\n"

	.comm	_CAS_FLAG_SATURN,4,2            ; @CAS_FLAG_SATURN
l_.str.9:                               ; @.str.9
	.asciz	"Cannot allocate init block, aborting\n"

	.comm	_N_RX_DESC_RINGS,4,2            ; @N_RX_DESC_RINGS
	.comm	_N_RX_COMP_RINGS,4,2            ; @N_RX_COMP_RINGS
	.comm	_N_RX_FLOWS,4,2                 ; @N_RX_FLOWS
	.comm	_cas_netdev_ops,4,2             ; @cas_netdev_ops
	.comm	_cas_ethtool_ops,4,2            ; @cas_ethtool_ops
	.comm	_CAS_TX_TIMEOUT,4,2             ; @CAS_TX_TIMEOUT
	.comm	_CAS_FLAG_NO_HW_CSUM,4,2        ; @CAS_FLAG_NO_HW_CSUM
	.comm	_NETIF_F_HW_CSUM,4,2            ; @NETIF_F_HW_CSUM
	.comm	_NETIF_F_SG,4,2                 ; @NETIF_F_SG
	.comm	_NETIF_F_HIGHDMA,4,2            ; @NETIF_F_HIGHDMA
	.comm	_CAS_MIN_MTU,4,2                ; @CAS_MIN_MTU
	.comm	_CAS_MAX_MTU,4,2                ; @CAS_MAX_MTU
l_.str.10:                              ; @.str.10
	.asciz	"Cannot register net device, aborting\n"

	.comm	_REG_BIM_CFG,8,3                ; @REG_BIM_CFG
l_.str.11:                              ; @.str.11
	.asciz	"Sun Cassini%s (%sbit/%sMHz PCI/%s) Ethernet[%d] %pM\n"

	.comm	_CAS_FLAG_REG_PLUS,4,2          ; @CAS_FLAG_REG_PLUS
l_.str.12:                              ; @.str.12
	.asciz	"+"

l_.str.13:                              ; @.str.13
	.space	1

	.comm	_BIM_CFG_32BIT,4,2              ; @BIM_CFG_32BIT
l_.str.14:                              ; @.str.14
	.asciz	"32"

l_.str.15:                              ; @.str.15
	.asciz	"64"

	.comm	_BIM_CFG_66MHZ,4,2              ; @BIM_CFG_66MHZ
l_.str.16:                              ; @.str.16
	.asciz	"66"

l_.str.17:                              ; @.str.17
	.asciz	"33"

	.comm	_CAS_PHY_SERDES,8,3             ; @CAS_PHY_SERDES
l_.str.18:                              ; @.str.18
	.asciz	"Fi"

l_.str.19:                              ; @.str.19
	.asciz	"Cu"

	.comm	_cas_poll,4,2                   ; @cas_poll
	.no_dead_strip	_cas_init_one
.subsections_via_symbols
