	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function axienet_dma_err_handler
_axienet_dma_err_handler:               ## @axienet_dma_err_handler
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r12
	movq	_XAE_OPTION_TXEN@GOTPCREL(%rip), %rax
	movq	_XAE_OPTION_RXEN@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	orl	(%rax), %esi
	movq	96(%rdi), %rdi
	notl	%esi
	andl	(%r12), %esi
	movq	%rdi, -48(%rbp)                 ## 8-byte Spill
	callq	_axienet_setoptions
	movq	88(%r12), %rdi
	callq	_mutex_lock
	movq	%r12, %rdi
	callq	_axienet_mdio_disable
	movq	%r12, %rdi
	callq	___axienet_device_reset
	movq	%r12, %rdi
	callq	_axienet_mdio_enable
	movq	88(%r12), %rdi
	callq	_mutex_unlock
	cmpq	$0, 8(%r12)
	je	LBB0_7
## %bb.1:
	xorl	%ebx, %ebx
	movq	_DMA_TO_DEVICE@GOTPCREL(%rip), %r13
	xorl	%r14d, %r14d
	jmp	LBB0_2
	.p2align	4, 0x90
LBB0_6:                                 ##   in Loop: Header=BB0_2 Depth=1
	movl	$0, (%r15,%rbx)
	incq	%r14
	xorps	%xmm0, %xmm0
	movups	%xmm0, 8(%r15,%rbx)
	movups	%xmm0, 24(%r15,%rbx)
	movups	%xmm0, 40(%r15,%rbx)
	movups	%xmm0, 56(%r15,%rbx)
	addq	$72, %rbx
	cmpq	8(%r12), %r14
	jae	LBB0_7
LBB0_2:                                 ## =>This Inner Loop Header: Depth=1
	movq	80(%r12), %r15
	movq	64(%r15,%rbx), %rsi
	testq	%rsi, %rsi
	je	LBB0_4
## %bb.3:                               ##   in Loop: Header=BB0_2 Depth=1
	movq	-48(%rbp), %rax                 ## 8-byte Reload
	movl	(%rax), %edi
	movq	_XAXIDMA_BD_CTRL_LENGTH_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	andl	(%r15,%rbx), %edx
	movl	(%r13), %ecx
	callq	_dma_unmap_single
LBB0_4:                                 ##   in Loop: Header=BB0_2 Depth=1
	movq	56(%r15,%rbx), %rdi
	testq	%rdi, %rdi
	je	LBB0_6
## %bb.5:                               ##   in Loop: Header=BB0_2 Depth=1
	callq	_dev_kfree_skb_irq
	jmp	LBB0_6
LBB0_7:
	movq	16(%r12), %rdx
	testq	%rdx, %rdx
	je	LBB0_15
## %bb.8:
	movq	72(%r12), %rax
	leaq	-1(%rdx), %rsi
	movl	%edx, %ecx
	andl	$7, %ecx
	cmpq	$7, %rsi
	jae	LBB0_10
## %bb.9:
	xorl	%esi, %esi
	jmp	LBB0_12
LBB0_10:
	andq	$-8, %rdx
	leaq	512(%rax), %rdi
	xorl	%esi, %esi
	xorps	%xmm0, %xmm0
	.p2align	4, 0x90
LBB0_11:                                ## =>This Inner Loop Header: Depth=1
	movups	%xmm0, -472(%rdi)
	movups	%xmm0, -488(%rdi)
	movups	%xmm0, -504(%rdi)
	movups	%xmm0, -432(%rdi)
	movups	%xmm0, -416(%rdi)
	movups	%xmm0, -400(%rdi)
	movups	%xmm0, -360(%rdi)
	movups	%xmm0, -344(%rdi)
	movups	%xmm0, -328(%rdi)
	movups	%xmm0, -288(%rdi)
	movups	%xmm0, -272(%rdi)
	movups	%xmm0, -256(%rdi)
	movups	%xmm0, -216(%rdi)
	movups	%xmm0, -200(%rdi)
	movups	%xmm0, -184(%rdi)
	movups	%xmm0, -112(%rdi)
	movups	%xmm0, -128(%rdi)
	movups	%xmm0, -144(%rdi)
	movups	%xmm0, -40(%rdi)
	movups	%xmm0, -56(%rdi)
	movups	%xmm0, -72(%rdi)
	addq	$8, %rsi
	movups	%xmm0, (%rdi)
	movups	%xmm0, 16(%rdi)
	movups	%xmm0, 32(%rdi)
	addq	$576, %rdi                      ## imm = 0x240
	cmpq	%rsi, %rdx
	jne	LBB0_11
LBB0_12:
	testq	%rcx, %rcx
	je	LBB0_15
## %bb.13:
	leaq	(%rsi,%rsi,8), %rdx
	leaq	(%rax,%rdx,8), %rax
	addq	$8, %rax
	shlq	$3, %rcx
	leaq	(%rcx,%rcx,8), %rcx
	xorl	%edx, %edx
	xorps	%xmm0, %xmm0
	.p2align	4, 0x90
LBB0_14:                                ## =>This Inner Loop Header: Depth=1
	movups	%xmm0, 32(%rax,%rdx)
	movups	%xmm0, 16(%rax,%rdx)
	movups	%xmm0, (%rax,%rdx)
	addq	$72, %rdx
	cmpq	%rdx, %rcx
	jne	LBB0_14
LBB0_15:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 48(%r12)
	movq	$0, 64(%r12)
	movq	_XAXIDMA_RX_CR_OFFSET@GOTPCREL(%rip), %rbx
	movl	(%rbx), %esi
	movq	%r12, %rdi
	callq	_axienet_dma_in32
	movq	_XAXIDMA_COALESCE_MASK@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rdx
	notq	%rdx
	andq	%rax, %rdx
	movq	_XAXIDMA_DFT_RX_THRESHOLD@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	movq	_XAXIDMA_COALESCE_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shlq	%cl, %rax
	orq	%rdx, %rax
	movq	_XAXIDMA_DELAY_MASK@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rsi
	notq	%rsi
	andq	%rax, %rsi
	movq	_XAXIDMA_DFT_RX_WAITBOUND@GOTPCREL(%rip), %rax
	movq	(%rax), %rdx
	movq	_XAXIDMA_DELAY_SHIFT@GOTPCREL(%rip), %r15
	movb	(%r15), %cl
	shlq	%cl, %rdx
	orq	%rsi, %rdx
	movq	_XAXIDMA_IRQ_ALL_MASK@GOTPCREL(%rip), %r14
	orq	(%r14), %rdx
	movl	(%rbx), %esi
	movq	%r12, %rdi
	callq	_axienet_dma_out32
	movq	_XAXIDMA_TX_CR_OFFSET@GOTPCREL(%rip), %r13
	movl	(%r13), %esi
	movq	%r12, %rdi
	callq	_axienet_dma_in32
	movq	_XAXIDMA_COALESCE_MASK@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rdx
	movq	_XAXIDMA_COALESCE_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	movq	_XAXIDMA_DFT_TX_THRESHOLD@GOTPCREL(%rip), %rsi
	movq	(%rsi), %rsi
	shlq	%cl, %rsi
	notq	%rdx
	andq	%rax, %rdx
	orq	%rdx, %rsi
	movq	_XAXIDMA_DELAY_MASK@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	notq	%rax
	andq	%rsi, %rax
	movq	_XAXIDMA_DFT_TX_WAITBOUND@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rdx
	movb	(%r15), %cl
	shlq	%cl, %rdx
	orq	%rax, %rdx
	orq	(%r14), %rdx
	movl	(%r13), %esi
	movq	%r12, %rdi
	callq	_axienet_dma_out32
	movq	_XAXIDMA_RX_CDESC_OFFSET@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	24(%r12), %rdx
	movq	%r12, %rdi
	callq	_axienet_dma_out32
	movl	(%rbx), %esi
	movq	%r12, %rdi
	callq	_axienet_dma_in32
	movl	(%rbx), %esi
	movq	_XAXIDMA_CR_RUNSTOP_MASK@GOTPCREL(%rip), %rbx
	orq	(%rbx), %rax
	movq	%r12, %rdi
	movq	%rax, %rdx
	callq	_axienet_dma_out32
	movq	_XAXIDMA_RX_TDESC_OFFSET@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	16(%r12), %rax
	movq	24(%r12), %rcx
	leaq	(%rax,%rax,8), %rax
	leaq	(%rcx,%rax,8), %rdx
	addq	$-72, %rdx
	movq	%r12, %rdi
	callq	_axienet_dma_out32
	movq	_XAXIDMA_TX_CDESC_OFFSET@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	32(%r12), %rdx
	movq	%r12, %rdi
	callq	_axienet_dma_out32
	movl	(%r13), %esi
	movq	%r12, %rdi
	callq	_axienet_dma_in32
	movl	(%r13), %esi
	orq	(%rbx), %rax
	movq	%r12, %rdi
	movq	%rax, %rdx
	callq	_axienet_dma_out32
	movq	_XAE_RCW1_OFFSET@GOTPCREL(%rip), %rbx
	movl	(%rbx), %esi
	movq	%r12, %rdi
	callq	_axienet_ior
	movq	_XAE_RCW1_RX_MASK@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rdx
	notq	%rdx
	andq	%rax, %rdx
	movl	(%rbx), %esi
	movq	%r12, %rdi
	callq	_axienet_iow
	movq	_XAE_IP_OFFSET@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r12, %rdi
	callq	_axienet_ior
	movq	_XAE_INT_RXRJECT_MASK@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rdx
	testq	%rax, %rdx
	je	LBB0_17
## %bb.16:
	movq	_XAE_IS_OFFSET@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r12, %rdi
	callq	_axienet_iow
LBB0_17:
	movq	_XAE_IE_OFFSET@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	cmpq	$0, 40(%r12)
	movl	$0, %edx
	jle	LBB0_19
## %bb.18:
	movq	_XAE_INT_RECV_ERROR_MASK@GOTPCREL(%rip), %rax
	movq	(%rax), %rdx
LBB0_19:
	movq	%r12, %rdi
	callq	_axienet_iow
	movq	_XAE_FCC_OFFSET@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_XAE_FCC_FCRX_MASK@GOTPCREL(%rip), %rax
	movq	(%rax), %rdx
	movq	%r12, %rdi
	callq	_axienet_iow
	movq	_XAE_OPTION_RXEN@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_XAE_OPTION_TXEN@GOTPCREL(%rip), %rax
	orl	(%rax), %esi
	notl	%esi
	andl	(%r12), %esi
	movq	-48(%rbp), %rbx                 ## 8-byte Reload
	movq	%rbx, %rdi
	callq	_axienet_setoptions
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	_axienet_set_mac_address
	movq	%rbx, %rdi
	callq	_axienet_set_multicast_list
	movl	(%r12), %esi
	movq	%rbx, %rdi
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_axienet_setoptions             ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_XAE_OPTION_TXEN,4,2            ## @XAE_OPTION_TXEN
	.comm	_XAE_OPTION_RXEN,4,2            ## @XAE_OPTION_RXEN
	.comm	_XAXIDMA_BD_CTRL_LENGTH_MASK,4,2 ## @XAXIDMA_BD_CTRL_LENGTH_MASK
	.comm	_DMA_TO_DEVICE,4,2              ## @DMA_TO_DEVICE
	.comm	_XAXIDMA_RX_CR_OFFSET,4,2       ## @XAXIDMA_RX_CR_OFFSET
	.comm	_XAXIDMA_COALESCE_MASK,8,3      ## @XAXIDMA_COALESCE_MASK
	.comm	_XAXIDMA_DFT_RX_THRESHOLD,8,3   ## @XAXIDMA_DFT_RX_THRESHOLD
	.comm	_XAXIDMA_COALESCE_SHIFT,8,3     ## @XAXIDMA_COALESCE_SHIFT
	.comm	_XAXIDMA_DELAY_MASK,8,3         ## @XAXIDMA_DELAY_MASK
	.comm	_XAXIDMA_DFT_RX_WAITBOUND,8,3   ## @XAXIDMA_DFT_RX_WAITBOUND
	.comm	_XAXIDMA_DELAY_SHIFT,8,3        ## @XAXIDMA_DELAY_SHIFT
	.comm	_XAXIDMA_IRQ_ALL_MASK,8,3       ## @XAXIDMA_IRQ_ALL_MASK
	.comm	_XAXIDMA_TX_CR_OFFSET,4,2       ## @XAXIDMA_TX_CR_OFFSET
	.comm	_XAXIDMA_DFT_TX_THRESHOLD,8,3   ## @XAXIDMA_DFT_TX_THRESHOLD
	.comm	_XAXIDMA_DFT_TX_WAITBOUND,8,3   ## @XAXIDMA_DFT_TX_WAITBOUND
	.comm	_XAXIDMA_RX_CDESC_OFFSET,4,2    ## @XAXIDMA_RX_CDESC_OFFSET
	.comm	_XAXIDMA_CR_RUNSTOP_MASK,8,3    ## @XAXIDMA_CR_RUNSTOP_MASK
	.comm	_XAXIDMA_RX_TDESC_OFFSET,4,2    ## @XAXIDMA_RX_TDESC_OFFSET
	.comm	_XAXIDMA_TX_CDESC_OFFSET,4,2    ## @XAXIDMA_TX_CDESC_OFFSET
	.comm	_XAE_RCW1_OFFSET,4,2            ## @XAE_RCW1_OFFSET
	.comm	_XAE_RCW1_RX_MASK,8,3           ## @XAE_RCW1_RX_MASK
	.comm	_XAE_IP_OFFSET,4,2              ## @XAE_IP_OFFSET
	.comm	_XAE_INT_RXRJECT_MASK,8,3       ## @XAE_INT_RXRJECT_MASK
	.comm	_XAE_IS_OFFSET,4,2              ## @XAE_IS_OFFSET
	.comm	_XAE_IE_OFFSET,4,2              ## @XAE_IE_OFFSET
	.comm	_XAE_INT_RECV_ERROR_MASK,8,3    ## @XAE_INT_RECV_ERROR_MASK
	.comm	_XAE_FCC_OFFSET,4,2             ## @XAE_FCC_OFFSET
	.comm	_XAE_FCC_FCRX_MASK,8,3          ## @XAE_FCC_FCRX_MASK
	.no_dead_strip	_axienet_dma_err_handler
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function axienet_dma_err_handler
_axienet_dma_err_handler:               ; @axienet_dma_err_handler
	.cfi_startproc
; %bb.0:
	stp	x28, x27, [sp, #-96]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 96
	stp	x26, x25, [sp, #16]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #32]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #48]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #64]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #80]             ; 16-byte Folded Spill
	add	x29, sp, #80
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	mov	x20, x0
	ldr	x19, [x0, #96]
	ldr	w8, [x0]
Lloh0:
	adrp	x9, _XAE_OPTION_TXEN@GOTPAGE
Lloh1:
	ldr	x9, [x9, _XAE_OPTION_TXEN@GOTPAGEOFF]
Lloh2:
	ldr	w9, [x9]
Lloh3:
	adrp	x22, _XAE_OPTION_RXEN@GOTPAGE
Lloh4:
	ldr	x22, [x22, _XAE_OPTION_RXEN@GOTPAGEOFF]
	ldr	w10, [x22]
	orr	w9, w10, w9
	bic	w1, w8, w9
	mov	x0, x19
	bl	_axienet_setoptions
	ldr	x0, [x20, #88]
	bl	_mutex_lock
	mov	x0, x20
	bl	_axienet_mdio_disable
	mov	x0, x20
	bl	___axienet_device_reset
	mov	x0, x20
	bl	_axienet_mdio_enable
	ldr	x0, [x20, #88]
	bl	_mutex_unlock
	ldr	x8, [x20, #8]
	cbz	x8, LBB0_7
; %bb.1:
	mov	x23, #0
	mov	x24, #0
Lloh5:
	adrp	x25, _XAXIDMA_BD_CTRL_LENGTH_MASK@GOTPAGE
Lloh6:
	ldr	x25, [x25, _XAXIDMA_BD_CTRL_LENGTH_MASK@GOTPAGEOFF]
Lloh7:
	adrp	x26, _DMA_TO_DEVICE@GOTPAGE
Lloh8:
	ldr	x26, [x26, _DMA_TO_DEVICE@GOTPAGEOFF]
	b	LBB0_3
LBB0_2:                                 ;   in Loop: Header=BB0_3 Depth=1
	add	x8, x27, x23
	str	wzr, [x8]
	add	x24, x24, #1
	movi.2d	v0, #0000000000000000
	stur	q0, [x8, #8]
	stur	q0, [x8, #24]
	stur	q0, [x8, #40]
	stur	q0, [x8, #56]
	ldr	x8, [x20, #8]
	add	x23, x23, #72
	cmp	x24, x8
	b.hs	LBB0_7
LBB0_3:                                 ; =>This Inner Loop Header: Depth=1
	ldr	x27, [x20, #80]
	add	x28, x27, x23
	ldr	x1, [x28, #64]
	cbz	x1, LBB0_5
; %bb.4:                                ;   in Loop: Header=BB0_3 Depth=1
	ldr	w0, [x19]
	ldr	w8, [x27, x23]
	ldr	w9, [x25]
	and	w2, w9, w8
	ldr	w3, [x26]
	bl	_dma_unmap_single
LBB0_5:                                 ;   in Loop: Header=BB0_3 Depth=1
	ldr	x0, [x28, #56]
	cbz	x0, LBB0_2
; %bb.6:                                ;   in Loop: Header=BB0_3 Depth=1
	bl	_dev_kfree_skb_irq
	b	LBB0_2
LBB0_7:
	ldr	x8, [x20, #16]
	cbz	x8, LBB0_10
; %bb.8:
	ldr	x9, [x20, #72]
	add	x9, x9, #8
	movi.2d	v0, #0000000000000000
LBB0_9:                                 ; =>This Inner Loop Header: Depth=1
	stp	q0, q0, [x9, #16]
	str	q0, [x9], #72
	subs	x8, x8, #1
	b.ne	LBB0_9
LBB0_10:
	stp	xzr, xzr, [x20, #48]
	str	xzr, [x20, #64]
Lloh9:
	adrp	x24, _XAXIDMA_RX_CR_OFFSET@GOTPAGE
Lloh10:
	ldr	x24, [x24, _XAXIDMA_RX_CR_OFFSET@GOTPAGEOFF]
	ldr	w1, [x24]
	mov	x0, x20
	bl	_axienet_dma_in32
Lloh11:
	adrp	x25, _XAXIDMA_COALESCE_MASK@GOTPAGE
Lloh12:
	ldr	x25, [x25, _XAXIDMA_COALESCE_MASK@GOTPAGEOFF]
	ldr	x8, [x25]
Lloh13:
	adrp	x9, _XAXIDMA_DFT_RX_THRESHOLD@GOTPAGE
Lloh14:
	ldr	x9, [x9, _XAXIDMA_DFT_RX_THRESHOLD@GOTPAGEOFF]
	bic	x8, x0, x8
Lloh15:
	ldr	x9, [x9]
Lloh16:
	adrp	x26, _XAXIDMA_COALESCE_SHIFT@GOTPAGE
Lloh17:
	ldr	x26, [x26, _XAXIDMA_COALESCE_SHIFT@GOTPAGEOFF]
	ldr	x10, [x26]
	lsl	x9, x9, x10
	orr	x8, x9, x8
Lloh18:
	adrp	x27, _XAXIDMA_DELAY_MASK@GOTPAGE
Lloh19:
	ldr	x27, [x27, _XAXIDMA_DELAY_MASK@GOTPAGEOFF]
	ldr	x9, [x27]
Lloh20:
	adrp	x10, _XAXIDMA_DFT_RX_WAITBOUND@GOTPAGE
Lloh21:
	ldr	x10, [x10, _XAXIDMA_DFT_RX_WAITBOUND@GOTPAGEOFF]
	bic	x8, x8, x9
Lloh22:
	ldr	x9, [x10]
Lloh23:
	adrp	x28, _XAXIDMA_DELAY_SHIFT@GOTPAGE
Lloh24:
	ldr	x28, [x28, _XAXIDMA_DELAY_SHIFT@GOTPAGEOFF]
	ldr	x10, [x28]
	lsl	x9, x9, x10
	orr	x8, x9, x8
Lloh25:
	adrp	x21, _XAXIDMA_IRQ_ALL_MASK@GOTPAGE
Lloh26:
	ldr	x21, [x21, _XAXIDMA_IRQ_ALL_MASK@GOTPAGEOFF]
	ldr	x9, [x21]
	orr	x2, x8, x9
	ldr	w1, [x24]
	mov	x0, x20
	bl	_axienet_dma_out32
Lloh27:
	adrp	x23, _XAXIDMA_TX_CR_OFFSET@GOTPAGE
Lloh28:
	ldr	x23, [x23, _XAXIDMA_TX_CR_OFFSET@GOTPAGEOFF]
	ldr	w1, [x23]
	mov	x0, x20
	bl	_axienet_dma_in32
	ldr	x8, [x25]
	bic	x8, x0, x8
Lloh29:
	adrp	x9, _XAXIDMA_DFT_TX_THRESHOLD@GOTPAGE
Lloh30:
	ldr	x9, [x9, _XAXIDMA_DFT_TX_THRESHOLD@GOTPAGEOFF]
Lloh31:
	ldr	x9, [x9]
	ldr	x10, [x26]
	lsl	x9, x9, x10
	orr	x8, x9, x8
	ldr	x9, [x27]
	bic	x8, x8, x9
Lloh32:
	adrp	x9, _XAXIDMA_DFT_TX_WAITBOUND@GOTPAGE
Lloh33:
	ldr	x9, [x9, _XAXIDMA_DFT_TX_WAITBOUND@GOTPAGEOFF]
Lloh34:
	ldr	x9, [x9]
	ldr	x10, [x28]
	lsl	x9, x9, x10
	orr	x8, x9, x8
	ldr	x9, [x21]
	orr	x2, x8, x9
	ldr	w1, [x23]
	mov	x0, x20
	bl	_axienet_dma_out32
Lloh35:
	adrp	x8, _XAXIDMA_RX_CDESC_OFFSET@GOTPAGE
Lloh36:
	ldr	x8, [x8, _XAXIDMA_RX_CDESC_OFFSET@GOTPAGEOFF]
Lloh37:
	ldr	w1, [x8]
	ldr	x2, [x20, #24]
	mov	x0, x20
	bl	_axienet_dma_out32
	ldr	w1, [x24]
	mov	x0, x20
	bl	_axienet_dma_in32
	ldr	w1, [x24]
Lloh38:
	adrp	x21, _XAXIDMA_CR_RUNSTOP_MASK@GOTPAGE
Lloh39:
	ldr	x21, [x21, _XAXIDMA_CR_RUNSTOP_MASK@GOTPAGEOFF]
	ldr	x8, [x21]
	orr	x2, x8, x0
	mov	x0, x20
	bl	_axienet_dma_out32
Lloh40:
	adrp	x8, _XAXIDMA_RX_TDESC_OFFSET@GOTPAGE
Lloh41:
	ldr	x8, [x8, _XAXIDMA_RX_TDESC_OFFSET@GOTPAGEOFF]
Lloh42:
	ldr	w1, [x8]
	ldp	x9, x8, [x20, #16]
	mov	w10, #72
	madd	x8, x9, x10, x8
	sub	x2, x8, #72
	mov	x0, x20
	bl	_axienet_dma_out32
Lloh43:
	adrp	x8, _XAXIDMA_TX_CDESC_OFFSET@GOTPAGE
Lloh44:
	ldr	x8, [x8, _XAXIDMA_TX_CDESC_OFFSET@GOTPAGEOFF]
Lloh45:
	ldr	w1, [x8]
	ldr	x2, [x20, #32]
	mov	x0, x20
	bl	_axienet_dma_out32
	ldr	w1, [x23]
	mov	x0, x20
	bl	_axienet_dma_in32
	ldr	w1, [x23]
	ldr	x8, [x21]
	orr	x2, x8, x0
	mov	x0, x20
	bl	_axienet_dma_out32
Lloh46:
	adrp	x21, _XAE_RCW1_OFFSET@GOTPAGE
Lloh47:
	ldr	x21, [x21, _XAE_RCW1_OFFSET@GOTPAGEOFF]
	ldr	w1, [x21]
	mov	x0, x20
	bl	_axienet_ior
Lloh48:
	adrp	x8, _XAE_RCW1_RX_MASK@GOTPAGE
Lloh49:
	ldr	x8, [x8, _XAE_RCW1_RX_MASK@GOTPAGEOFF]
Lloh50:
	ldr	x8, [x8]
	bic	x2, x0, x8
	ldr	w1, [x21]
	mov	x0, x20
	bl	_axienet_iow
Lloh51:
	adrp	x8, _XAE_IP_OFFSET@GOTPAGE
Lloh52:
	ldr	x8, [x8, _XAE_IP_OFFSET@GOTPAGEOFF]
Lloh53:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_axienet_ior
Lloh54:
	adrp	x8, _XAE_INT_RXRJECT_MASK@GOTPAGE
Lloh55:
	ldr	x8, [x8, _XAE_INT_RXRJECT_MASK@GOTPAGEOFF]
Lloh56:
	ldr	x2, [x8]
	tst	x2, x0
	b.eq	LBB0_12
; %bb.11:
Lloh57:
	adrp	x8, _XAE_IS_OFFSET@GOTPAGE
Lloh58:
	ldr	x8, [x8, _XAE_IS_OFFSET@GOTPAGEOFF]
Lloh59:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_axienet_iow
LBB0_12:
Lloh60:
	adrp	x8, _XAE_IE_OFFSET@GOTPAGE
Lloh61:
	ldr	x8, [x8, _XAE_IE_OFFSET@GOTPAGEOFF]
Lloh62:
	ldr	w1, [x8]
	ldr	x8, [x20, #40]
Lloh63:
	adrp	x9, _XAE_INT_RECV_ERROR_MASK@GOTPAGE
Lloh64:
	ldr	x9, [x9, _XAE_INT_RECV_ERROR_MASK@GOTPAGEOFF]
Lloh65:
	ldr	x9, [x9]
	cmp	x8, #0
	csel	x2, x9, xzr, gt
	mov	x0, x20
	bl	_axienet_iow
Lloh66:
	adrp	x8, _XAE_FCC_OFFSET@GOTPAGE
Lloh67:
	ldr	x8, [x8, _XAE_FCC_OFFSET@GOTPAGEOFF]
Lloh68:
	ldr	w1, [x8]
Lloh69:
	adrp	x8, _XAE_FCC_FCRX_MASK@GOTPAGE
Lloh70:
	ldr	x8, [x8, _XAE_FCC_FCRX_MASK@GOTPAGEOFF]
Lloh71:
	ldr	x2, [x8]
	mov	x0, x20
	bl	_axienet_iow
	ldr	w8, [x20]
Lloh72:
	adrp	x9, _XAE_OPTION_TXEN@GOTPAGE
Lloh73:
	ldr	x9, [x9, _XAE_OPTION_TXEN@GOTPAGEOFF]
Lloh74:
	ldr	w9, [x9]
	ldr	w10, [x22]
	orr	w9, w10, w9
	bic	w1, w8, w9
	mov	x0, x19
	bl	_axienet_setoptions
	mov	x0, x19
	mov	x1, #0
	bl	_axienet_set_mac_address
	mov	x0, x19
	bl	_axienet_set_multicast_list
	ldr	w1, [x20]
	mov	x0, x19
	ldp	x29, x30, [sp, #80]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #64]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #48]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #32]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #16]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp], #96             ; 16-byte Folded Reload
	b	_axienet_setoptions
	.loh AdrpLdrGot	Lloh3, Lloh4
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGot	Lloh7, Lloh8
	.loh AdrpLdrGot	Lloh5, Lloh6
	.loh AdrpLdrGotLdr	Lloh54, Lloh55, Lloh56
	.loh AdrpLdrGotLdr	Lloh51, Lloh52, Lloh53
	.loh AdrpLdrGotLdr	Lloh48, Lloh49, Lloh50
	.loh AdrpLdrGot	Lloh46, Lloh47
	.loh AdrpLdrGotLdr	Lloh43, Lloh44, Lloh45
	.loh AdrpLdrGotLdr	Lloh40, Lloh41, Lloh42
	.loh AdrpLdrGot	Lloh38, Lloh39
	.loh AdrpLdrGotLdr	Lloh35, Lloh36, Lloh37
	.loh AdrpLdrGotLdr	Lloh32, Lloh33, Lloh34
	.loh AdrpLdrGotLdr	Lloh29, Lloh30, Lloh31
	.loh AdrpLdrGot	Lloh27, Lloh28
	.loh AdrpLdrGot	Lloh25, Lloh26
	.loh AdrpLdrGot	Lloh23, Lloh24
	.loh AdrpLdrGotLdr	Lloh20, Lloh21, Lloh22
	.loh AdrpLdrGot	Lloh18, Lloh19
	.loh AdrpLdrGot	Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh13, Lloh14, Lloh15
	.loh AdrpLdrGot	Lloh11, Lloh12
	.loh AdrpLdrGot	Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh57, Lloh58, Lloh59
	.loh AdrpLdrGotLdr	Lloh72, Lloh73, Lloh74
	.loh AdrpLdrGotLdr	Lloh69, Lloh70, Lloh71
	.loh AdrpLdrGotLdr	Lloh66, Lloh67, Lloh68
	.loh AdrpLdrGotLdr	Lloh63, Lloh64, Lloh65
	.loh AdrpLdrGotLdr	Lloh60, Lloh61, Lloh62
	.cfi_endproc
                                        ; -- End function
	.comm	_XAE_OPTION_TXEN,4,2            ; @XAE_OPTION_TXEN
	.comm	_XAE_OPTION_RXEN,4,2            ; @XAE_OPTION_RXEN
	.comm	_XAXIDMA_BD_CTRL_LENGTH_MASK,4,2 ; @XAXIDMA_BD_CTRL_LENGTH_MASK
	.comm	_DMA_TO_DEVICE,4,2              ; @DMA_TO_DEVICE
	.comm	_XAXIDMA_RX_CR_OFFSET,4,2       ; @XAXIDMA_RX_CR_OFFSET
	.comm	_XAXIDMA_COALESCE_MASK,8,3      ; @XAXIDMA_COALESCE_MASK
	.comm	_XAXIDMA_DFT_RX_THRESHOLD,8,3   ; @XAXIDMA_DFT_RX_THRESHOLD
	.comm	_XAXIDMA_COALESCE_SHIFT,8,3     ; @XAXIDMA_COALESCE_SHIFT
	.comm	_XAXIDMA_DELAY_MASK,8,3         ; @XAXIDMA_DELAY_MASK
	.comm	_XAXIDMA_DFT_RX_WAITBOUND,8,3   ; @XAXIDMA_DFT_RX_WAITBOUND
	.comm	_XAXIDMA_DELAY_SHIFT,8,3        ; @XAXIDMA_DELAY_SHIFT
	.comm	_XAXIDMA_IRQ_ALL_MASK,8,3       ; @XAXIDMA_IRQ_ALL_MASK
	.comm	_XAXIDMA_TX_CR_OFFSET,4,2       ; @XAXIDMA_TX_CR_OFFSET
	.comm	_XAXIDMA_DFT_TX_THRESHOLD,8,3   ; @XAXIDMA_DFT_TX_THRESHOLD
	.comm	_XAXIDMA_DFT_TX_WAITBOUND,8,3   ; @XAXIDMA_DFT_TX_WAITBOUND
	.comm	_XAXIDMA_RX_CDESC_OFFSET,4,2    ; @XAXIDMA_RX_CDESC_OFFSET
	.comm	_XAXIDMA_CR_RUNSTOP_MASK,8,3    ; @XAXIDMA_CR_RUNSTOP_MASK
	.comm	_XAXIDMA_RX_TDESC_OFFSET,4,2    ; @XAXIDMA_RX_TDESC_OFFSET
	.comm	_XAXIDMA_TX_CDESC_OFFSET,4,2    ; @XAXIDMA_TX_CDESC_OFFSET
	.comm	_XAE_RCW1_OFFSET,4,2            ; @XAE_RCW1_OFFSET
	.comm	_XAE_RCW1_RX_MASK,8,3           ; @XAE_RCW1_RX_MASK
	.comm	_XAE_IP_OFFSET,4,2              ; @XAE_IP_OFFSET
	.comm	_XAE_INT_RXRJECT_MASK,8,3       ; @XAE_INT_RXRJECT_MASK
	.comm	_XAE_IS_OFFSET,4,2              ; @XAE_IS_OFFSET
	.comm	_XAE_IE_OFFSET,4,2              ; @XAE_IE_OFFSET
	.comm	_XAE_INT_RECV_ERROR_MASK,8,3    ; @XAE_INT_RECV_ERROR_MASK
	.comm	_XAE_FCC_OFFSET,4,2             ; @XAE_FCC_OFFSET
	.comm	_XAE_FCC_FCRX_MASK,8,3          ; @XAE_FCC_FCRX_MASK
	.no_dead_strip	_axienet_dma_err_handler
.subsections_via_symbols
