	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_il_set_rxon_channel            ## -- Begin function il_set_rxon_channel
	.p2align	4, 0x90
_il_set_rxon_channel:                   ## @il_set_rxon_channel
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %rbx
	movl	(%rsi), %r15d
	movq	8(%rsi), %r14
	movl	8(%rdi), %edi
	callq	_le16_to_cpu
	cmpq	%r14, %rax
	jne	LBB0_2
## %bb.1:
	cmpl	%r15d, (%rbx)
	je	LBB0_6
LBB0_2:
	movq	%r14, %rdi
	callq	_cpu_to_le16
	movl	%eax, 8(%rbx)
	movq	_NL80211_BAND_5GHZ@GOTPCREL(%rip), %rcx
	movq	_RXON_FLG_BAND_24G_MSK@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	cmpl	(%rcx), %r15d
	jne	LBB0_4
## %bb.3:
	notl	%eax
	andl	%eax, 4(%rbx)
	jmp	LBB0_5
LBB0_4:
	orl	%eax, 4(%rbx)
LBB0_5:
	movl	%r15d, (%rbx)
	leaq	L_.str(%rip), %rdi
	movq	%r14, %rsi
	movl	%r15d, %edx
	callq	_D_INFO
LBB0_6:
	xorl	%eax, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_NL80211_BAND_5GHZ,4,2          ## @NL80211_BAND_5GHZ
	.comm	_RXON_FLG_BAND_24G_MSK,4,2      ## @RXON_FLG_BAND_24G_MSK
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"Staging channel set to %d [%d]\n"

.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_il_set_rxon_channel            ; -- Begin function il_set_rxon_channel
	.p2align	2
_il_set_rxon_channel:                   ; @il_set_rxon_channel
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x21, x0
	ldr	w19, [x1]
	ldr	x20, [x1, #8]
	ldr	w0, [x0, #8]
	bl	_le16_to_cpu
	cmp	x0, x20
	b.ne	LBB0_2
; %bb.1:
	ldr	w8, [x21]
	cmp	w8, w19
	b.eq	LBB0_6
LBB0_2:
	mov	x0, x20
	bl	_cpu_to_le16
Lloh0:
	adrp	x8, _NL80211_BAND_5GHZ@GOTPAGE
Lloh1:
	ldr	x8, [x8, _NL80211_BAND_5GHZ@GOTPAGEOFF]
	str	w0, [x21, #8]
Lloh2:
	ldr	w9, [x8]
Lloh3:
	adrp	x8, _RXON_FLG_BAND_24G_MSK@GOTPAGE
Lloh4:
	ldr	x8, [x8, _RXON_FLG_BAND_24G_MSK@GOTPAGEOFF]
Lloh5:
	ldr	w8, [x8]
	cmp	w19, w9
	b.ne	LBB0_4
; %bb.3:
	ldr	w9, [x21, #4]
	bic	w8, w9, w8
	b	LBB0_5
LBB0_4:
	ldr	w9, [x21, #4]
	orr	w8, w9, w8
LBB0_5:
	stp	w19, w8, [x21]
Lloh6:
	adrp	x0, l_.str@PAGE
Lloh7:
	add	x0, x0, l_.str@PAGEOFF
	mov	x1, x20
	mov	x2, x19
	bl	_D_INFO
LBB0_6:
	mov	w0, #0
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpAdd	Lloh6, Lloh7
	.cfi_endproc
                                        ; -- End function
	.comm	_NL80211_BAND_5GHZ,4,2          ; @NL80211_BAND_5GHZ
	.comm	_RXON_FLG_BAND_24G_MSK,4,2      ; @RXON_FLG_BAND_24G_MSK
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"Staging channel set to %d [%d]\n"

.subsections_via_symbols
