	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function xlgmac_isr
_xlgmac_isr:                            ## @xlgmac_isr
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$40, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rsi, %r14
	movq	_DMA_ISR@GOTPCREL(%rip), %rax
	movq	(%rax), %rdi
	addq	8(%rsi), %rdi
	callq	_readl
	testl	%eax, %eax
	je	LBB0_25
## %bb.1:
	movl	%eax, %r12d
	movq	_intr@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	52(%r14), %edx
	leaq	L_.str(%rip), %rcx
	movq	%r14, %rdi
	movl	%r12d, %r8d
	xorl	%eax, %eax
	callq	_netif_dbg
	movl	(%r14), %eax
	testl	%eax, %eax
	je	LBB0_20
## %bb.2:
	leaq	44(%r14), %rcx
	movq	%rcx, -56(%rbp)                 ## 8-byte Spill
	leaq	16(%r14), %rcx
	movq	%rcx, -72(%rbp)                 ## 8-byte Spill
	movq	_DMA_CH_SR@GOTPCREL(%rip), %r13
	xorl	%ebx, %ebx
	xorl	%r15d, %r15d
	movq	%r14, -64(%rbp)                 ## 8-byte Spill
	movl	%r12d, -44(%rbp)                ## 4-byte Spill
	jmp	LBB0_3
	.p2align	4, 0x90
LBB0_18:                                ##   in Loop: Header=BB0_3 Depth=1
	movl	(%r13), %esi
	movq	-80(%rbp), %rdi                 ## 8-byte Reload
	callq	_XLGMAC_DMA_REG
	movl	%r12d, %edi
	movq	%rax, %rsi
	callq	_writel
	movl	(%r14), %eax
	movl	-44(%rbp), %r12d                ## 4-byte Reload
LBB0_19:                                ##   in Loop: Header=BB0_3 Depth=1
	incq	%r15
	movl	%eax, %ecx
	addq	$4, %rbx
	cmpq	%rcx, %r15
	jae	LBB0_20
LBB0_3:                                 ## =>This Inner Loop Header: Depth=1
	btl	%r15d, %r12d
	jae	LBB0_19
## %bb.4:                               ##   in Loop: Header=BB0_3 Depth=1
	movq	56(%r14), %rdi
	addq	%rbx, %rdi
	movl	(%r13), %esi
	movq	%rdi, -80(%rbp)                 ## 8-byte Spill
	callq	_XLGMAC_DMA_REG
	movq	%rax, %rdi
	callq	_readl
	movl	%eax, %r12d
	movq	_intr@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	52(%r14), %edx
	movq	%r14, %rdi
	leaq	L_.str.1(%rip), %rcx
	movl	%r15d, %r8d
	movl	%r12d, %r9d
	xorl	%eax, %eax
	callq	_netif_dbg
	movq	_DMA_CH_SR_TI_POS@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_DMA_CH_SR_TI_LEN@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movl	%r12d, %edi
	callq	_XLGMAC_GET_REG_BITS
	movq	%r14, %r13
	movl	%eax, %r14d
	movq	_DMA_CH_SR_RI_POS@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_DMA_CH_SR_RI_LEN@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movl	%r12d, %edi
	callq	_XLGMAC_GET_REG_BITS
	cmpl	$0, 48(%r13)
	jne	LBB0_8
## %bb.5:                               ##   in Loop: Header=BB0_3 Depth=1
	orl	%eax, %r14d
	je	LBB0_8
## %bb.6:                               ##   in Loop: Header=BB0_3 Depth=1
	movq	-56(%rbp), %rdi                 ## 8-byte Reload
	callq	_napi_schedule_prep
	testq	%rax, %rax
	je	LBB0_8
## %bb.7:                               ##   in Loop: Header=BB0_3 Depth=1
	movq	-64(%rbp), %r14                 ## 8-byte Reload
	movq	%r14, %rdi
	callq	_xlgmac_disable_rx_tx_ints
	incl	40(%r14)
	movq	-56(%rbp), %rdi                 ## 8-byte Reload
	callq	___napi_schedule_irqoff
	.p2align	4, 0x90
LBB0_8:                                 ##   in Loop: Header=BB0_3 Depth=1
	movq	_DMA_CH_SR_TPS_POS@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_DMA_CH_SR_TPS_LEN@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movl	%r12d, %edi
	callq	_XLGMAC_GET_REG_BITS
	testl	%eax, %eax
	movq	-64(%rbp), %r14                 ## 8-byte Reload
	je	LBB0_10
## %bb.9:                               ##   in Loop: Header=BB0_3 Depth=1
	incl	36(%r14)
LBB0_10:                                ##   in Loop: Header=BB0_3 Depth=1
	movq	_DMA_CH_SR_RPS_POS@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_DMA_CH_SR_RPS_LEN@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movl	%r12d, %edi
	callq	_XLGMAC_GET_REG_BITS
	testl	%eax, %eax
	movq	_DMA_CH_SR@GOTPCREL(%rip), %r13
	je	LBB0_12
## %bb.11:                              ##   in Loop: Header=BB0_3 Depth=1
	incl	32(%r14)
LBB0_12:                                ##   in Loop: Header=BB0_3 Depth=1
	movq	_DMA_CH_SR_TBU_POS@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_DMA_CH_SR_TBU_LEN@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movl	%r12d, %edi
	callq	_XLGMAC_GET_REG_BITS
	testl	%eax, %eax
	je	LBB0_14
## %bb.13:                              ##   in Loop: Header=BB0_3 Depth=1
	incl	28(%r14)
LBB0_14:                                ##   in Loop: Header=BB0_3 Depth=1
	movq	_DMA_CH_SR_RBU_POS@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_DMA_CH_SR_RBU_LEN@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movl	%r12d, %edi
	callq	_XLGMAC_GET_REG_BITS
	testl	%eax, %eax
	je	LBB0_16
## %bb.15:                              ##   in Loop: Header=BB0_3 Depth=1
	incl	24(%r14)
LBB0_16:                                ##   in Loop: Header=BB0_3 Depth=1
	movq	_DMA_CH_SR_FBE_POS@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_DMA_CH_SR_FBE_LEN@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movl	%r12d, %edi
	callq	_XLGMAC_GET_REG_BITS
	testl	%eax, %eax
	je	LBB0_18
## %bb.17:                              ##   in Loop: Header=BB0_3 Depth=1
	incl	20(%r14)
	movq	-72(%rbp), %rdi                 ## 8-byte Reload
	callq	_schedule_work
	jmp	LBB0_18
LBB0_20:
	movq	_DMA_ISR_MACIS_POS@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_DMA_ISR_MACIS_LEN@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movl	%r12d, %edi
	callq	_XLGMAC_GET_REG_BITS
	testl	%eax, %eax
	je	LBB0_25
## %bb.21:
	movq	_MAC_ISR@GOTPCREL(%rip), %rax
	movq	(%rax), %rdi
	addq	8(%r14), %rdi
	callq	_readl
	movq	%r14, %rbx
	movl	%eax, %r14d
	movq	_MAC_ISR_MMCTXIS_POS@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_MAC_ISR_MMCTXIS_LEN@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movl	%r14d, %edi
	callq	_XLGMAC_GET_REG_BITS
	testl	%eax, %eax
	je	LBB0_23
## %bb.22:
	movq	%rbx, %rdi
	callq	*72(%rbx)
LBB0_23:
	movq	_MAC_ISR_MMCRXIS_POS@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_MAC_ISR_MMCRXIS_LEN@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movl	%r14d, %edi
	callq	_XLGMAC_GET_REG_BITS
	testl	%eax, %eax
	je	LBB0_25
## %bb.24:
	movq	%rbx, %rdi
	callq	*64(%rbx)
LBB0_25:
	movq	_IRQ_HANDLED@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	addq	$40, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_DMA_ISR,8,3                    ## @DMA_ISR
	.comm	_IRQ_HANDLED,4,2                ## @IRQ_HANDLED
	.comm	_intr,4,2                       ## @intr
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"DMA_ISR=%#010x\n"

	.comm	_DMA_CH_SR,4,2                  ## @DMA_CH_SR
L_.str.1:                               ## @.str.1
	.asciz	"DMA_CH%u_ISR=%#010x\n"

	.comm	_DMA_CH_SR_TI_POS,4,2           ## @DMA_CH_SR_TI_POS
	.comm	_DMA_CH_SR_TI_LEN,4,2           ## @DMA_CH_SR_TI_LEN
	.comm	_DMA_CH_SR_RI_POS,4,2           ## @DMA_CH_SR_RI_POS
	.comm	_DMA_CH_SR_RI_LEN,4,2           ## @DMA_CH_SR_RI_LEN
	.comm	_DMA_CH_SR_TPS_POS,4,2          ## @DMA_CH_SR_TPS_POS
	.comm	_DMA_CH_SR_TPS_LEN,4,2          ## @DMA_CH_SR_TPS_LEN
	.comm	_DMA_CH_SR_RPS_POS,4,2          ## @DMA_CH_SR_RPS_POS
	.comm	_DMA_CH_SR_RPS_LEN,4,2          ## @DMA_CH_SR_RPS_LEN
	.comm	_DMA_CH_SR_TBU_POS,4,2          ## @DMA_CH_SR_TBU_POS
	.comm	_DMA_CH_SR_TBU_LEN,4,2          ## @DMA_CH_SR_TBU_LEN
	.comm	_DMA_CH_SR_RBU_POS,4,2          ## @DMA_CH_SR_RBU_POS
	.comm	_DMA_CH_SR_RBU_LEN,4,2          ## @DMA_CH_SR_RBU_LEN
	.comm	_DMA_CH_SR_FBE_POS,4,2          ## @DMA_CH_SR_FBE_POS
	.comm	_DMA_CH_SR_FBE_LEN,4,2          ## @DMA_CH_SR_FBE_LEN
	.comm	_DMA_ISR_MACIS_POS,4,2          ## @DMA_ISR_MACIS_POS
	.comm	_DMA_ISR_MACIS_LEN,4,2          ## @DMA_ISR_MACIS_LEN
	.comm	_MAC_ISR,8,3                    ## @MAC_ISR
	.comm	_MAC_ISR_MMCTXIS_POS,4,2        ## @MAC_ISR_MMCTXIS_POS
	.comm	_MAC_ISR_MMCTXIS_LEN,4,2        ## @MAC_ISR_MMCTXIS_LEN
	.comm	_MAC_ISR_MMCRXIS_POS,4,2        ## @MAC_ISR_MMCRXIS_POS
	.comm	_MAC_ISR_MMCRXIS_LEN,4,2        ## @MAC_ISR_MMCRXIS_LEN
	.no_dead_strip	_xlgmac_isr
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function xlgmac_isr
_xlgmac_isr:                            ; @xlgmac_isr
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #112
	.cfi_def_cfa_offset 112
	stp	x28, x27, [sp, #16]             ; 16-byte Folded Spill
	stp	x26, x25, [sp, #32]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #48]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #64]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #80]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #96]             ; 16-byte Folded Spill
	add	x29, sp, #96
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	mov	x19, x1
	ldr	x8, [x1, #8]
Lloh0:
	adrp	x9, _DMA_ISR@GOTPAGE
Lloh1:
	ldr	x9, [x9, _DMA_ISR@GOTPAGEOFF]
Lloh2:
	ldr	x9, [x9]
	add	x0, x9, x8
	bl	_readl
	cbz	w0, LBB0_25
; %bb.1:
	mov	x20, x0
Lloh3:
	adrp	x8, _intr@GOTPAGE
Lloh4:
	ldr	x8, [x8, _intr@GOTPAGEOFF]
Lloh5:
	ldr	w1, [x8]
	ldr	w2, [x19, #52]
Lloh6:
	adrp	x3, l_.str@PAGE
Lloh7:
	add	x3, x3, l_.str@PAGEOFF
	mov	x0, x19
	mov	x4, x20
	bl	_netif_dbg
	ldr	w8, [x19]
	cbz	w8, LBB0_20
; %bb.2:
	mov	x22, #0
	mov	x21, #0
Lloh8:
	adrp	x28, _DMA_CH_SR@GOTPAGE
Lloh9:
	ldr	x28, [x28, _DMA_CH_SR@GOTPAGEOFF]
	add	x9, x19, #44
	str	x9, [sp, #8]                    ; 8-byte Folded Spill
	add	x23, x19, #16
Lloh10:
	adrp	x24, _DMA_CH_SR_FBE_LEN@GOTPAGE
Lloh11:
	ldr	x24, [x24, _DMA_CH_SR_FBE_LEN@GOTPAGEOFF]
	b	LBB0_5
LBB0_3:                                 ;   in Loop: Header=BB0_5 Depth=1
	ldr	w1, [x28]
	mov	x0, x25
	bl	_XLGMAC_DMA_REG
	mov	x1, x0
	mov	x0, x26
	bl	_writel
	ldr	w8, [x19]
LBB0_4:                                 ;   in Loop: Header=BB0_5 Depth=1
	add	x21, x21, #1
	add	x22, x22, #4
	cmp	x21, w8, uxtw
	b.hs	LBB0_20
LBB0_5:                                 ; =>This Inner Loop Header: Depth=1
	lsr	w9, w20, w21
	tbz	w9, #0, LBB0_4
; %bb.6:                                ;   in Loop: Header=BB0_5 Depth=1
	ldr	x8, [x19, #56]
	add	x25, x8, x22
	ldr	w1, [x28]
	mov	x0, x25
	bl	_XLGMAC_DMA_REG
	bl	_readl
	mov	x26, x0
Lloh12:
	adrp	x8, _intr@GOTPAGE
Lloh13:
	ldr	x8, [x8, _intr@GOTPAGEOFF]
Lloh14:
	ldr	w1, [x8]
	ldr	w2, [x19, #52]
	str	x26, [sp]
	mov	x0, x19
Lloh15:
	adrp	x3, l_.str.1@PAGE
Lloh16:
	add	x3, x3, l_.str.1@PAGEOFF
	mov	x4, x21
	bl	_netif_dbg
Lloh17:
	adrp	x8, _DMA_CH_SR_TI_POS@GOTPAGE
Lloh18:
	ldr	x8, [x8, _DMA_CH_SR_TI_POS@GOTPAGEOFF]
Lloh19:
	ldr	w1, [x8]
Lloh20:
	adrp	x8, _DMA_CH_SR_TI_LEN@GOTPAGE
Lloh21:
	ldr	x8, [x8, _DMA_CH_SR_TI_LEN@GOTPAGEOFF]
Lloh22:
	ldr	w2, [x8]
	mov	x0, x26
	bl	_XLGMAC_GET_REG_BITS
	mov	x27, x0
Lloh23:
	adrp	x8, _DMA_CH_SR_RI_POS@GOTPAGE
Lloh24:
	ldr	x8, [x8, _DMA_CH_SR_RI_POS@GOTPAGEOFF]
Lloh25:
	ldr	w1, [x8]
Lloh26:
	adrp	x8, _DMA_CH_SR_RI_LEN@GOTPAGE
Lloh27:
	ldr	x8, [x8, _DMA_CH_SR_RI_LEN@GOTPAGEOFF]
Lloh28:
	ldr	w2, [x8]
	mov	x0, x26
	bl	_XLGMAC_GET_REG_BITS
	ldr	w8, [x19, #48]
	cbnz	w8, LBB0_10
; %bb.7:                                ;   in Loop: Header=BB0_5 Depth=1
	orr	w8, w27, w0
	cbz	w8, LBB0_10
; %bb.8:                                ;   in Loop: Header=BB0_5 Depth=1
	ldr	x0, [sp, #8]                    ; 8-byte Folded Reload
	bl	_napi_schedule_prep
	cbz	x0, LBB0_10
; %bb.9:                                ;   in Loop: Header=BB0_5 Depth=1
	mov	x0, x19
	bl	_xlgmac_disable_rx_tx_ints
	ldr	w8, [x19, #40]
	add	w8, w8, #1
	str	w8, [x19, #40]
	ldr	x0, [sp, #8]                    ; 8-byte Folded Reload
	bl	___napi_schedule_irqoff
LBB0_10:                                ;   in Loop: Header=BB0_5 Depth=1
Lloh29:
	adrp	x8, _DMA_CH_SR_TPS_POS@GOTPAGE
Lloh30:
	ldr	x8, [x8, _DMA_CH_SR_TPS_POS@GOTPAGEOFF]
Lloh31:
	ldr	w1, [x8]
Lloh32:
	adrp	x8, _DMA_CH_SR_TPS_LEN@GOTPAGE
Lloh33:
	ldr	x8, [x8, _DMA_CH_SR_TPS_LEN@GOTPAGEOFF]
Lloh34:
	ldr	w2, [x8]
	mov	x0, x26
	bl	_XLGMAC_GET_REG_BITS
	cbz	w0, LBB0_12
; %bb.11:                               ;   in Loop: Header=BB0_5 Depth=1
	ldr	w8, [x19, #36]
	add	w8, w8, #1
	str	w8, [x19, #36]
LBB0_12:                                ;   in Loop: Header=BB0_5 Depth=1
Lloh35:
	adrp	x8, _DMA_CH_SR_RPS_POS@GOTPAGE
Lloh36:
	ldr	x8, [x8, _DMA_CH_SR_RPS_POS@GOTPAGEOFF]
Lloh37:
	ldr	w1, [x8]
Lloh38:
	adrp	x8, _DMA_CH_SR_RPS_LEN@GOTPAGE
Lloh39:
	ldr	x8, [x8, _DMA_CH_SR_RPS_LEN@GOTPAGEOFF]
Lloh40:
	ldr	w2, [x8]
	mov	x0, x26
	bl	_XLGMAC_GET_REG_BITS
	cbz	w0, LBB0_14
; %bb.13:                               ;   in Loop: Header=BB0_5 Depth=1
	ldr	w8, [x19, #32]
	add	w8, w8, #1
	str	w8, [x19, #32]
LBB0_14:                                ;   in Loop: Header=BB0_5 Depth=1
Lloh41:
	adrp	x8, _DMA_CH_SR_TBU_POS@GOTPAGE
Lloh42:
	ldr	x8, [x8, _DMA_CH_SR_TBU_POS@GOTPAGEOFF]
Lloh43:
	ldr	w1, [x8]
Lloh44:
	adrp	x8, _DMA_CH_SR_TBU_LEN@GOTPAGE
Lloh45:
	ldr	x8, [x8, _DMA_CH_SR_TBU_LEN@GOTPAGEOFF]
Lloh46:
	ldr	w2, [x8]
	mov	x0, x26
	bl	_XLGMAC_GET_REG_BITS
	cbz	w0, LBB0_16
; %bb.15:                               ;   in Loop: Header=BB0_5 Depth=1
	ldr	w8, [x19, #28]
	add	w8, w8, #1
	str	w8, [x19, #28]
LBB0_16:                                ;   in Loop: Header=BB0_5 Depth=1
Lloh47:
	adrp	x8, _DMA_CH_SR_RBU_POS@GOTPAGE
Lloh48:
	ldr	x8, [x8, _DMA_CH_SR_RBU_POS@GOTPAGEOFF]
Lloh49:
	ldr	w1, [x8]
Lloh50:
	adrp	x8, _DMA_CH_SR_RBU_LEN@GOTPAGE
Lloh51:
	ldr	x8, [x8, _DMA_CH_SR_RBU_LEN@GOTPAGEOFF]
Lloh52:
	ldr	w2, [x8]
	mov	x0, x26
	bl	_XLGMAC_GET_REG_BITS
	cbz	w0, LBB0_18
; %bb.17:                               ;   in Loop: Header=BB0_5 Depth=1
	ldr	w8, [x19, #24]
	add	w8, w8, #1
	str	w8, [x19, #24]
LBB0_18:                                ;   in Loop: Header=BB0_5 Depth=1
Lloh53:
	adrp	x8, _DMA_CH_SR_FBE_POS@GOTPAGE
Lloh54:
	ldr	x8, [x8, _DMA_CH_SR_FBE_POS@GOTPAGEOFF]
Lloh55:
	ldr	w1, [x8]
	ldr	w2, [x24]
	mov	x0, x26
	bl	_XLGMAC_GET_REG_BITS
	cbz	w0, LBB0_3
; %bb.19:                               ;   in Loop: Header=BB0_5 Depth=1
	ldr	w8, [x19, #20]
	add	w8, w8, #1
	str	w8, [x19, #20]
	mov	x0, x23
	bl	_schedule_work
	b	LBB0_3
LBB0_20:
Lloh56:
	adrp	x8, _DMA_ISR_MACIS_POS@GOTPAGE
Lloh57:
	ldr	x8, [x8, _DMA_ISR_MACIS_POS@GOTPAGEOFF]
Lloh58:
	ldr	w1, [x8]
Lloh59:
	adrp	x8, _DMA_ISR_MACIS_LEN@GOTPAGE
Lloh60:
	ldr	x8, [x8, _DMA_ISR_MACIS_LEN@GOTPAGEOFF]
Lloh61:
	ldr	w2, [x8]
	mov	x0, x20
	bl	_XLGMAC_GET_REG_BITS
	cbz	w0, LBB0_25
; %bb.21:
	ldr	x8, [x19, #8]
Lloh62:
	adrp	x9, _MAC_ISR@GOTPAGE
Lloh63:
	ldr	x9, [x9, _MAC_ISR@GOTPAGEOFF]
Lloh64:
	ldr	x9, [x9]
	add	x0, x9, x8
	bl	_readl
	mov	x20, x0
Lloh65:
	adrp	x8, _MAC_ISR_MMCTXIS_POS@GOTPAGE
Lloh66:
	ldr	x8, [x8, _MAC_ISR_MMCTXIS_POS@GOTPAGEOFF]
Lloh67:
	ldr	w1, [x8]
Lloh68:
	adrp	x8, _MAC_ISR_MMCTXIS_LEN@GOTPAGE
Lloh69:
	ldr	x8, [x8, _MAC_ISR_MMCTXIS_LEN@GOTPAGEOFF]
Lloh70:
	ldr	w2, [x8]
	bl	_XLGMAC_GET_REG_BITS
	cbz	w0, LBB0_23
; %bb.22:
	ldr	x8, [x19, #72]
	mov	x0, x19
	blr	x8
LBB0_23:
Lloh71:
	adrp	x8, _MAC_ISR_MMCRXIS_POS@GOTPAGE
Lloh72:
	ldr	x8, [x8, _MAC_ISR_MMCRXIS_POS@GOTPAGEOFF]
Lloh73:
	ldr	w1, [x8]
Lloh74:
	adrp	x8, _MAC_ISR_MMCRXIS_LEN@GOTPAGE
Lloh75:
	ldr	x8, [x8, _MAC_ISR_MMCRXIS_LEN@GOTPAGEOFF]
Lloh76:
	ldr	w2, [x8]
	mov	x0, x20
	bl	_XLGMAC_GET_REG_BITS
	cbz	w0, LBB0_25
; %bb.24:
	ldr	x8, [x19, #64]
	mov	x0, x19
	blr	x8
LBB0_25:
Lloh77:
	adrp	x8, _IRQ_HANDLED@GOTPAGE
Lloh78:
	ldr	x8, [x8, _IRQ_HANDLED@GOTPAGEOFF]
Lloh79:
	ldr	w0, [x8]
	ldp	x29, x30, [sp, #96]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #80]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #64]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #48]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #32]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #112
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpAdd	Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGot	Lloh10, Lloh11
	.loh AdrpLdrGot	Lloh8, Lloh9
	.loh AdrpLdrGotLdr	Lloh26, Lloh27, Lloh28
	.loh AdrpLdrGotLdr	Lloh23, Lloh24, Lloh25
	.loh AdrpLdrGotLdr	Lloh20, Lloh21, Lloh22
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh19
	.loh AdrpAdd	Lloh15, Lloh16
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh32, Lloh33, Lloh34
	.loh AdrpLdrGotLdr	Lloh29, Lloh30, Lloh31
	.loh AdrpLdrGotLdr	Lloh38, Lloh39, Lloh40
	.loh AdrpLdrGotLdr	Lloh35, Lloh36, Lloh37
	.loh AdrpLdrGotLdr	Lloh44, Lloh45, Lloh46
	.loh AdrpLdrGotLdr	Lloh41, Lloh42, Lloh43
	.loh AdrpLdrGotLdr	Lloh50, Lloh51, Lloh52
	.loh AdrpLdrGotLdr	Lloh47, Lloh48, Lloh49
	.loh AdrpLdrGotLdr	Lloh53, Lloh54, Lloh55
	.loh AdrpLdrGotLdr	Lloh59, Lloh60, Lloh61
	.loh AdrpLdrGotLdr	Lloh56, Lloh57, Lloh58
	.loh AdrpLdrGotLdr	Lloh68, Lloh69, Lloh70
	.loh AdrpLdrGotLdr	Lloh65, Lloh66, Lloh67
	.loh AdrpLdrGotLdr	Lloh62, Lloh63, Lloh64
	.loh AdrpLdrGotLdr	Lloh74, Lloh75, Lloh76
	.loh AdrpLdrGotLdr	Lloh71, Lloh72, Lloh73
	.loh AdrpLdrGotLdr	Lloh77, Lloh78, Lloh79
	.cfi_endproc
                                        ; -- End function
	.comm	_DMA_ISR,8,3                    ; @DMA_ISR
	.comm	_IRQ_HANDLED,4,2                ; @IRQ_HANDLED
	.comm	_intr,4,2                       ; @intr
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"DMA_ISR=%#010x\n"

	.comm	_DMA_CH_SR,4,2                  ; @DMA_CH_SR
l_.str.1:                               ; @.str.1
	.asciz	"DMA_CH%u_ISR=%#010x\n"

	.comm	_DMA_CH_SR_TI_POS,4,2           ; @DMA_CH_SR_TI_POS
	.comm	_DMA_CH_SR_TI_LEN,4,2           ; @DMA_CH_SR_TI_LEN
	.comm	_DMA_CH_SR_RI_POS,4,2           ; @DMA_CH_SR_RI_POS
	.comm	_DMA_CH_SR_RI_LEN,4,2           ; @DMA_CH_SR_RI_LEN
	.comm	_DMA_CH_SR_TPS_POS,4,2          ; @DMA_CH_SR_TPS_POS
	.comm	_DMA_CH_SR_TPS_LEN,4,2          ; @DMA_CH_SR_TPS_LEN
	.comm	_DMA_CH_SR_RPS_POS,4,2          ; @DMA_CH_SR_RPS_POS
	.comm	_DMA_CH_SR_RPS_LEN,4,2          ; @DMA_CH_SR_RPS_LEN
	.comm	_DMA_CH_SR_TBU_POS,4,2          ; @DMA_CH_SR_TBU_POS
	.comm	_DMA_CH_SR_TBU_LEN,4,2          ; @DMA_CH_SR_TBU_LEN
	.comm	_DMA_CH_SR_RBU_POS,4,2          ; @DMA_CH_SR_RBU_POS
	.comm	_DMA_CH_SR_RBU_LEN,4,2          ; @DMA_CH_SR_RBU_LEN
	.comm	_DMA_CH_SR_FBE_POS,4,2          ; @DMA_CH_SR_FBE_POS
	.comm	_DMA_CH_SR_FBE_LEN,4,2          ; @DMA_CH_SR_FBE_LEN
	.comm	_DMA_ISR_MACIS_POS,4,2          ; @DMA_ISR_MACIS_POS
	.comm	_DMA_ISR_MACIS_LEN,4,2          ; @DMA_ISR_MACIS_LEN
	.comm	_MAC_ISR,8,3                    ; @MAC_ISR
	.comm	_MAC_ISR_MMCTXIS_POS,4,2        ; @MAC_ISR_MMCTXIS_POS
	.comm	_MAC_ISR_MMCTXIS_LEN,4,2        ; @MAC_ISR_MMCTXIS_LEN
	.comm	_MAC_ISR_MMCRXIS_POS,4,2        ; @MAC_ISR_MMCRXIS_POS
	.comm	_MAC_ISR_MMCRXIS_LEN,4,2        ; @MAC_ISR_MMCRXIS_LEN
	.no_dead_strip	_xlgmac_isr
.subsections_via_symbols
