	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function mvpp2_prs_hw_write
_mvpp2_prs_hw_write:                    ## @mvpp2_prs_hw_write
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	(%rsi), %eax
	movq	_MVPP2_PRS_TCAM_SRAM_SIZE@GOTPCREL(%rip), %rcx
	cmpl	(%rcx), %eax
	jge	LBB0_1
## %bb.2:
	movq	%rsi, %r12
	movq	%rdi, %r14
	movq	_MVPP2_PRS_TCAM_INV_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	notl	%eax
	movq	8(%rsi), %rcx
	movq	_MVPP2_PRS_TCAM_INV_WORD@GOTPCREL(%rip), %rdx
	movq	(%rdx), %rdx
	andl	%eax, (%rcx,%rdx,4)
	movq	_MVPP2_PRS_TCAM_IDX_REG@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	(%r12), %edx
	callq	_mvpp2_write
	movq	_MVPP2_PRS_TCAM_WORDS@GOTPCREL(%rip), %r15
	cmpl	$0, (%r15)
	jle	LBB0_5
## %bb.3:
	xorl	%ebx, %ebx
	.p2align	4, 0x90
LBB0_4:                                 ## =>This Inner Loop Header: Depth=1
	movl	%ebx, %edi
	callq	_MVPP2_PRS_TCAM_DATA_REG
	movq	8(%r12), %rcx
	movl	(%rcx,%rbx,4), %edx
	movq	%r14, %rdi
	movl	%eax, %esi
	callq	_mvpp2_write
	incq	%rbx
	movslq	(%r15), %rax
	cmpq	%rax, %rbx
	jl	LBB0_4
LBB0_5:
	movq	_MVPP2_PRS_SRAM_IDX_REG@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	(%r12), %edx
	movq	%r14, %rdi
	callq	_mvpp2_write
	movq	_MVPP2_PRS_SRAM_WORDS@GOTPCREL(%rip), %r13
	cmpl	$0, (%r13)
	jle	LBB0_6
## %bb.7:
	xorl	%r15d, %r15d
	xorl	%ebx, %ebx
	.p2align	4, 0x90
LBB0_8:                                 ## =>This Inner Loop Header: Depth=1
	movl	%ebx, %edi
	callq	_MVPP2_PRS_SRAM_DATA_REG
	movq	16(%r12), %rcx
	movl	(%rcx,%rbx,4), %edx
	movq	%r14, %rdi
	movl	%eax, %esi
	callq	_mvpp2_write
	incq	%rbx
	movslq	(%r13), %rax
	cmpq	%rax, %rbx
	jl	LBB0_8
	jmp	LBB0_9
LBB0_1:
	movq	_EINVAL@GOTPCREL(%rip), %rax
	xorl	%r15d, %r15d
	subl	(%rax), %r15d
	jmp	LBB0_9
LBB0_6:
	xorl	%r15d, %r15d
LBB0_9:
	movl	%r15d, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_MVPP2_PRS_TCAM_SRAM_SIZE,4,2   ## @MVPP2_PRS_TCAM_SRAM_SIZE
	.comm	_EINVAL,4,2                     ## @EINVAL
	.comm	_MVPP2_PRS_TCAM_INV_MASK,4,2    ## @MVPP2_PRS_TCAM_INV_MASK
	.comm	_MVPP2_PRS_TCAM_INV_WORD,8,3    ## @MVPP2_PRS_TCAM_INV_WORD
	.comm	_MVPP2_PRS_TCAM_IDX_REG,4,2     ## @MVPP2_PRS_TCAM_IDX_REG
	.comm	_MVPP2_PRS_TCAM_WORDS,4,2       ## @MVPP2_PRS_TCAM_WORDS
	.comm	_MVPP2_PRS_SRAM_IDX_REG,4,2     ## @MVPP2_PRS_SRAM_IDX_REG
	.comm	_MVPP2_PRS_SRAM_WORDS,4,2       ## @MVPP2_PRS_SRAM_WORDS
	.no_dead_strip	_mvpp2_prs_hw_write
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function mvpp2_prs_hw_write
_mvpp2_prs_hw_write:                    ; @mvpp2_prs_hw_write
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	ldr	w8, [x1]
Lloh0:
	adrp	x9, _MVPP2_PRS_TCAM_SRAM_SIZE@GOTPAGE
Lloh1:
	ldr	x9, [x9, _MVPP2_PRS_TCAM_SRAM_SIZE@GOTPAGEOFF]
Lloh2:
	ldr	w9, [x9]
	cmp	w8, w9
	b.ge	LBB0_8
; %bb.1:
	mov	x19, x1
	mov	x20, x0
Lloh3:
	adrp	x8, _MVPP2_PRS_TCAM_INV_MASK@GOTPAGE
Lloh4:
	ldr	x8, [x8, _MVPP2_PRS_TCAM_INV_MASK@GOTPAGEOFF]
Lloh5:
	ldr	w8, [x8]
Lloh6:
	adrp	x9, _MVPP2_PRS_TCAM_INV_WORD@GOTPAGE
Lloh7:
	ldr	x9, [x9, _MVPP2_PRS_TCAM_INV_WORD@GOTPAGEOFF]
	ldr	x10, [x1, #8]
Lloh8:
	ldr	x9, [x9]
	lsl	x9, x9, #2
	ldr	w11, [x10, x9]
	bic	w8, w11, w8
	str	w8, [x10, x9]
Lloh9:
	adrp	x8, _MVPP2_PRS_TCAM_IDX_REG@GOTPAGE
Lloh10:
	ldr	x8, [x8, _MVPP2_PRS_TCAM_IDX_REG@GOTPAGEOFF]
Lloh11:
	ldr	w1, [x8]
	ldr	w2, [x19]
	bl	_mvpp2_write
Lloh12:
	adrp	x22, _MVPP2_PRS_TCAM_WORDS@GOTPAGE
Lloh13:
	ldr	x22, [x22, _MVPP2_PRS_TCAM_WORDS@GOTPAGEOFF]
	ldr	w8, [x22]
	cmp	w8, #1
	b.lt	LBB0_4
; %bb.2:
	mov	x21, #0
LBB0_3:                                 ; =>This Inner Loop Header: Depth=1
	mov	x0, x21
	bl	_MVPP2_PRS_TCAM_DATA_REG
	mov	x1, x0
	ldr	x8, [x19, #8]
	ldr	w2, [x8, x21, lsl #2]
	mov	x0, x20
	bl	_mvpp2_write
	add	x21, x21, #1
	ldrsw	x8, [x22]
	cmp	x21, x8
	b.lt	LBB0_3
LBB0_4:
Lloh14:
	adrp	x8, _MVPP2_PRS_SRAM_IDX_REG@GOTPAGE
Lloh15:
	ldr	x8, [x8, _MVPP2_PRS_SRAM_IDX_REG@GOTPAGEOFF]
Lloh16:
	ldr	w1, [x8]
	ldr	w2, [x19]
	mov	x0, x20
	bl	_mvpp2_write
Lloh17:
	adrp	x22, _MVPP2_PRS_SRAM_WORDS@GOTPAGE
Lloh18:
	ldr	x22, [x22, _MVPP2_PRS_SRAM_WORDS@GOTPAGEOFF]
	ldr	w8, [x22]
	cmp	w8, #1
	b.lt	LBB0_7
; %bb.5:
	mov	x21, #0
LBB0_6:                                 ; =>This Inner Loop Header: Depth=1
	mov	x0, x21
	bl	_MVPP2_PRS_SRAM_DATA_REG
	mov	x1, x0
	ldr	x8, [x19, #16]
	ldr	w2, [x8, x21, lsl #2]
	mov	x0, x20
	bl	_mvpp2_write
	add	x21, x21, #1
	ldrsw	x8, [x22]
	cmp	x21, x8
	b.lt	LBB0_6
LBB0_7:
	mov	w0, #0
	b	LBB0_9
LBB0_8:
Lloh19:
	adrp	x8, _EINVAL@GOTPAGE
Lloh20:
	ldr	x8, [x8, _EINVAL@GOTPAGEOFF]
Lloh21:
	ldr	w8, [x8]
	neg	w0, w8
LBB0_9:
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGot	Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGot	Lloh17, Lloh18
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh16
	.loh AdrpLdrGotLdr	Lloh19, Lloh20, Lloh21
	.cfi_endproc
                                        ; -- End function
	.comm	_MVPP2_PRS_TCAM_SRAM_SIZE,4,2   ; @MVPP2_PRS_TCAM_SRAM_SIZE
	.comm	_EINVAL,4,2                     ; @EINVAL
	.comm	_MVPP2_PRS_TCAM_INV_MASK,4,2    ; @MVPP2_PRS_TCAM_INV_MASK
	.comm	_MVPP2_PRS_TCAM_INV_WORD,8,3    ; @MVPP2_PRS_TCAM_INV_WORD
	.comm	_MVPP2_PRS_TCAM_IDX_REG,4,2     ; @MVPP2_PRS_TCAM_IDX_REG
	.comm	_MVPP2_PRS_TCAM_WORDS,4,2       ; @MVPP2_PRS_TCAM_WORDS
	.comm	_MVPP2_PRS_SRAM_IDX_REG,4,2     ; @MVPP2_PRS_SRAM_IDX_REG
	.comm	_MVPP2_PRS_SRAM_WORDS,4,2       ; @MVPP2_PRS_SRAM_WORDS
	.no_dead_strip	_mvpp2_prs_hw_write
.subsections_via_symbols
