	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function ocelot_port_attr_mc_set
_ocelot_port_attr_mc_set:               ## @ocelot_port_attr_mc_set
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%esi, %r15d
	movq	%rdi, %rbx
	movq	8(%rdi), %r14
	movq	_ANA_PORT_CPU_FWD_CFG@GOTPCREL(%rip), %r12
	movl	(%r12), %esi
	movl	(%rdi), %edx
	movq	%r14, %rdi
	callq	_ocelot_read_gix
	movq	_ANA_PORT_CPU_FWD_CFG_CPU_IGMP_REDIR_ENA@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	movq	_ANA_PORT_CPU_FWD_CFG_CPU_MLD_REDIR_ENA@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	testl	%r15d, %r15d
	je	LBB0_2
## %bb.1:
	movq	_ANA_PORT_CPU_FWD_CFG_CPU_IPMC_CTRL_COPY_ENA@GOTPCREL(%rip), %rdx
	orl	%eax, %esi
	orl	%ecx, %esi
	orl	(%rdx), %esi
	jmp	LBB0_3
LBB0_2:
	orl	%esi, %ecx
	movq	_ANA_PORT_CPU_FWD_CFG_CPU_IPMC_CTRL_COPY_ENA@GOTPCREL(%rip), %rdx
	orl	(%rdx), %ecx
	notl	%ecx
	andl	%ecx, %eax
	movl	%eax, %esi
LBB0_3:
	movl	(%r12), %edx
	movl	(%rbx), %ecx
	movq	%r14, %rdi
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_ocelot_write_gix               ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_ANA_PORT_CPU_FWD_CFG,4,2       ## @ANA_PORT_CPU_FWD_CFG
	.comm	_ANA_PORT_CPU_FWD_CFG_CPU_IGMP_REDIR_ENA,4,2 ## @ANA_PORT_CPU_FWD_CFG_CPU_IGMP_REDIR_ENA
	.comm	_ANA_PORT_CPU_FWD_CFG_CPU_MLD_REDIR_ENA,4,2 ## @ANA_PORT_CPU_FWD_CFG_CPU_MLD_REDIR_ENA
	.comm	_ANA_PORT_CPU_FWD_CFG_CPU_IPMC_CTRL_COPY_ENA,4,2 ## @ANA_PORT_CPU_FWD_CFG_CPU_IPMC_CTRL_COPY_ENA
	.no_dead_strip	_ocelot_port_attr_mc_set
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function ocelot_port_attr_mc_set
_ocelot_port_attr_mc_set:               ; @ocelot_port_attr_mc_set
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x21, x1
	mov	x20, x0
	ldr	x19, [x0, #8]
Lloh0:
	adrp	x22, _ANA_PORT_CPU_FWD_CFG@GOTPAGE
Lloh1:
	ldr	x22, [x22, _ANA_PORT_CPU_FWD_CFG@GOTPAGEOFF]
	ldr	w1, [x22]
	ldr	w2, [x0]
	mov	x0, x19
	bl	_ocelot_read_gix
Lloh2:
	adrp	x8, _ANA_PORT_CPU_FWD_CFG_CPU_IGMP_REDIR_ENA@GOTPAGE
Lloh3:
	ldr	x8, [x8, _ANA_PORT_CPU_FWD_CFG_CPU_IGMP_REDIR_ENA@GOTPAGEOFF]
Lloh4:
	ldr	w8, [x8]
Lloh5:
	adrp	x9, _ANA_PORT_CPU_FWD_CFG_CPU_MLD_REDIR_ENA@GOTPAGE
Lloh6:
	ldr	x9, [x9, _ANA_PORT_CPU_FWD_CFG_CPU_MLD_REDIR_ENA@GOTPAGEOFF]
Lloh7:
	ldr	w9, [x9]
	cbz	w21, LBB0_2
; %bb.1:
Lloh8:
	adrp	x10, _ANA_PORT_CPU_FWD_CFG_CPU_IPMC_CTRL_COPY_ENA@GOTPAGE
Lloh9:
	ldr	x10, [x10, _ANA_PORT_CPU_FWD_CFG_CPU_IPMC_CTRL_COPY_ENA@GOTPAGEOFF]
Lloh10:
	ldr	w10, [x10]
	orr	w8, w8, w0
	orr	w8, w8, w9
	orr	w1, w8, w10
	b	LBB0_3
LBB0_2:
	orr	w8, w9, w8
Lloh11:
	adrp	x9, _ANA_PORT_CPU_FWD_CFG_CPU_IPMC_CTRL_COPY_ENA@GOTPAGE
Lloh12:
	ldr	x9, [x9, _ANA_PORT_CPU_FWD_CFG_CPU_IPMC_CTRL_COPY_ENA@GOTPAGEOFF]
Lloh13:
	ldr	w9, [x9]
	orr	w8, w8, w9
	bic	w1, w0, w8
LBB0_3:
	ldr	w2, [x22]
	ldr	w3, [x20]
	mov	x0, x19
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	_ocelot_write_gix
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.cfi_endproc
                                        ; -- End function
	.comm	_ANA_PORT_CPU_FWD_CFG,4,2       ; @ANA_PORT_CPU_FWD_CFG
	.comm	_ANA_PORT_CPU_FWD_CFG_CPU_IGMP_REDIR_ENA,4,2 ; @ANA_PORT_CPU_FWD_CFG_CPU_IGMP_REDIR_ENA
	.comm	_ANA_PORT_CPU_FWD_CFG_CPU_MLD_REDIR_ENA,4,2 ; @ANA_PORT_CPU_FWD_CFG_CPU_MLD_REDIR_ENA
	.comm	_ANA_PORT_CPU_FWD_CFG_CPU_IPMC_CTRL_COPY_ENA,4,2 ; @ANA_PORT_CPU_FWD_CFG_CPU_IPMC_CTRL_COPY_ENA
	.no_dead_strip	_ocelot_port_attr_mc_set
.subsections_via_symbols
