	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function pcie_message_numbers
_pcie_message_numbers:                  ## @pcie_message_numbers
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%r8, %r14
	movl	%esi, %r12d
	movq	%rdi, %r15
	movq	_PCIE_PORT_SERVICE_PME@GOTPCREL(%rip), %rax
	movq	_PCIE_PORT_SERVICE_HP@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	orl	(%rax), %ecx
	movq	_PCIE_PORT_SERVICE_BWNOTIF@GOTPCREL(%rip), %rax
	orl	(%rax), %ecx
	testl	%esi, %ecx
	je	LBB0_1
## %bb.2:
	movq	%rdx, %r13
	movq	_PCI_EXP_FLAGS@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	leaq	-44(%rbp), %rdx
	movq	%r15, %rdi
	callq	_pcie_capability_read_word
	movq	_PCI_EXP_FLAGS_IRQ@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	andl	-44(%rbp), %ebx
	sarl	$9, %ebx
	movl	%ebx, (%r13)
	incl	%ebx
	jmp	LBB0_3
LBB0_1:
	xorl	%ebx, %ebx
LBB0_3:
	movq	_PCIE_PORT_SERVICE_DPC@GOTPCREL(%rip), %rax
	testl	%r12d, (%rax)
	je	LBB0_6
## %bb.4:
	movq	_PCI_EXT_CAP_ID_DPC@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r15, %rdi
	callq	_pci_find_ext_capability
	testl	%eax, %eax
	je	LBB0_6
## %bb.5:
	movq	_PCI_EXP_DPC_CAP@GOTPCREL(%rip), %rcx
	addl	(%rcx), %eax
	leaq	-44(%rbp), %rdx
	movq	%r15, %rdi
	movl	%eax, %esi
	callq	_pci_read_config_word
	movq	_PCI_EXP_DPC_IRQ@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	andl	-44(%rbp), %esi
	movl	%esi, (%r14)
	incl	%esi
	movl	%ebx, %edi
	callq	_max
	movl	%eax, %ebx
LBB0_6:
	movl	%ebx, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_PCIE_PORT_SERVICE_PME,4,2      ## @PCIE_PORT_SERVICE_PME
	.comm	_PCIE_PORT_SERVICE_HP,4,2       ## @PCIE_PORT_SERVICE_HP
	.comm	_PCIE_PORT_SERVICE_BWNOTIF,4,2  ## @PCIE_PORT_SERVICE_BWNOTIF
	.comm	_PCI_EXP_FLAGS,4,2              ## @PCI_EXP_FLAGS
	.comm	_PCI_EXP_FLAGS_IRQ,4,2          ## @PCI_EXP_FLAGS_IRQ
	.comm	_PCIE_PORT_SERVICE_DPC,4,2      ## @PCIE_PORT_SERVICE_DPC
	.comm	_PCI_EXT_CAP_ID_DPC,4,2         ## @PCI_EXT_CAP_ID_DPC
	.comm	_PCI_EXP_DPC_CAP,4,2            ## @PCI_EXP_DPC_CAP
	.comm	_PCI_EXP_DPC_IRQ,4,2            ## @PCI_EXP_DPC_IRQ
	.comm	_PCIE_PORT_SERVICE_AER,4,2      ## @PCIE_PORT_SERVICE_AER
	.comm	_PCI_ERR_ROOT_AER_IRQ,4,2       ## @PCI_ERR_ROOT_AER_IRQ
	.comm	_PCI_ERR_ROOT_STATUS,4,2        ## @PCI_ERR_ROOT_STATUS
	.no_dead_strip	_pcie_message_numbers
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function pcie_message_numbers
_pcie_message_numbers:                  ; @pcie_message_numbers
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #64
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x4
	mov	x22, x1
	mov	x20, x0
Lloh0:
	adrp	x8, _PCIE_PORT_SERVICE_PME@GOTPAGE
Lloh1:
	ldr	x8, [x8, _PCIE_PORT_SERVICE_PME@GOTPAGEOFF]
Lloh2:
	ldr	w8, [x8]
Lloh3:
	adrp	x9, _PCIE_PORT_SERVICE_HP@GOTPAGE
Lloh4:
	ldr	x9, [x9, _PCIE_PORT_SERVICE_HP@GOTPAGEOFF]
Lloh5:
	ldr	w9, [x9]
	orr	w8, w9, w8
Lloh6:
	adrp	x9, _PCIE_PORT_SERVICE_BWNOTIF@GOTPAGE
Lloh7:
	ldr	x9, [x9, _PCIE_PORT_SERVICE_BWNOTIF@GOTPAGEOFF]
Lloh8:
	ldr	w9, [x9]
	orr	w8, w8, w9
	tst	w8, w1
	b.eq	LBB0_2
; %bb.1:
	mov	x21, x2
Lloh9:
	adrp	x8, _PCI_EXP_FLAGS@GOTPAGE
Lloh10:
	ldr	x8, [x8, _PCI_EXP_FLAGS@GOTPAGEOFF]
Lloh11:
	ldr	w1, [x8]
	add	x2, sp, #12
	mov	x0, x20
	bl	_pcie_capability_read_word
Lloh12:
	adrp	x8, _PCI_EXP_FLAGS_IRQ@GOTPAGE
Lloh13:
	ldr	x8, [x8, _PCI_EXP_FLAGS_IRQ@GOTPAGEOFF]
	ldr	w9, [sp, #12]
Lloh14:
	ldr	w8, [x8]
	and	w8, w8, w9
	asr	w8, w8, #9
	str	w8, [x21]
	add	w21, w8, #1
	b	LBB0_3
LBB0_2:
	mov	w21, #0
LBB0_3:
Lloh15:
	adrp	x8, _PCIE_PORT_SERVICE_DPC@GOTPAGE
Lloh16:
	ldr	x8, [x8, _PCIE_PORT_SERVICE_DPC@GOTPAGEOFF]
Lloh17:
	ldr	w8, [x8]
	tst	w8, w22
	b.eq	LBB0_6
; %bb.4:
Lloh18:
	adrp	x8, _PCI_EXT_CAP_ID_DPC@GOTPAGE
Lloh19:
	ldr	x8, [x8, _PCI_EXT_CAP_ID_DPC@GOTPAGEOFF]
Lloh20:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_pci_find_ext_capability
	cbz	w0, LBB0_6
; %bb.5:
Lloh21:
	adrp	x8, _PCI_EXP_DPC_CAP@GOTPAGE
Lloh22:
	ldr	x8, [x8, _PCI_EXP_DPC_CAP@GOTPAGEOFF]
Lloh23:
	ldr	w8, [x8]
	add	w1, w8, w0
	add	x2, sp, #12
	mov	x0, x20
	bl	_pci_read_config_word
	ldr	w8, [sp, #12]
Lloh24:
	adrp	x9, _PCI_EXP_DPC_IRQ@GOTPAGE
Lloh25:
	ldr	x9, [x9, _PCI_EXP_DPC_IRQ@GOTPAGEOFF]
Lloh26:
	ldr	w9, [x9]
	and	w8, w9, w8
	str	w8, [x19]
	add	w1, w8, #1
	mov	x0, x21
	bl	_max
	mov	x21, x0
LBB0_6:
	mov	x0, x21
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #64
	ret
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.cfi_endproc
                                        ; -- End function
	.comm	_PCIE_PORT_SERVICE_PME,4,2      ; @PCIE_PORT_SERVICE_PME
	.comm	_PCIE_PORT_SERVICE_HP,4,2       ; @PCIE_PORT_SERVICE_HP
	.comm	_PCIE_PORT_SERVICE_BWNOTIF,4,2  ; @PCIE_PORT_SERVICE_BWNOTIF
	.comm	_PCI_EXP_FLAGS,4,2              ; @PCI_EXP_FLAGS
	.comm	_PCI_EXP_FLAGS_IRQ,4,2          ; @PCI_EXP_FLAGS_IRQ
	.comm	_PCIE_PORT_SERVICE_DPC,4,2      ; @PCIE_PORT_SERVICE_DPC
	.comm	_PCI_EXT_CAP_ID_DPC,4,2         ; @PCI_EXT_CAP_ID_DPC
	.comm	_PCI_EXP_DPC_CAP,4,2            ; @PCI_EXP_DPC_CAP
	.comm	_PCI_EXP_DPC_IRQ,4,2            ; @PCI_EXP_DPC_IRQ
	.comm	_PCIE_PORT_SERVICE_AER,4,2      ; @PCIE_PORT_SERVICE_AER
	.comm	_PCI_ERR_ROOT_AER_IRQ,4,2       ; @PCI_ERR_ROOT_AER_IRQ
	.comm	_PCI_ERR_ROOT_STATUS,4,2        ; @PCI_ERR_ROOT_STATUS
	.no_dead_strip	_pcie_message_numbers
.subsections_via_symbols
