	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function rockchip_emmc_phy_power_on
_rockchip_emmc_phy_power_on:            ## @rockchip_emmc_phy_power_on
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r14
	callq	_phy_get_drvdata
	movq	%rax, %rbx
	movl	(%rax), %edi
	movl	16(%rax), %r15d
	movq	_GRF_EMMCPHY_CON6@GOTPCREL(%rip), %rax
	movq	(%rax), %r12
	addq	8(%rbx), %r12
	movq	_PHYCTRL_DR_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_PHYCTRL_DR_SHIFT@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	callq	_HIWORD_UPDATE
	movl	%r15d, %edi
	movq	%r12, %rsi
	movl	%eax, %edx
	callq	_regmap_write
	movl	16(%rbx), %r15d
	movq	_GRF_EMMCPHY_CON0@GOTPCREL(%rip), %r13
	movq	(%r13), %r12
	addq	8(%rbx), %r12
	movq	_PHYCTRL_OTAPDLYENA@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_PHYCTRL_OTAPDLYENA_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_PHYCTRL_OTAPDLYENA_SHIFT@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	callq	_HIWORD_UPDATE
	movl	%r15d, %edi
	movq	%r12, %rsi
	movl	%eax, %edx
	callq	_regmap_write
	movl	16(%rbx), %r15d
	movq	(%r13), %r12
	addq	8(%rbx), %r12
	movq	_PHYCTRL_OTAPDLYSEL_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_PHYCTRL_OTAPDLYSEL_SHIFT@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movl	$4, %edi
	callq	_HIWORD_UPDATE
	movl	%r15d, %edi
	movq	%r12, %rsi
	movl	%eax, %edx
	callq	_regmap_write
	movq	_PHYCTRL_PDB_PWR_ON@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_rockchip_emmc_phy_power        ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_GRF_EMMCPHY_CON6,8,3           ## @GRF_EMMCPHY_CON6
	.comm	_PHYCTRL_DR_MASK,4,2            ## @PHYCTRL_DR_MASK
	.comm	_PHYCTRL_DR_SHIFT,4,2           ## @PHYCTRL_DR_SHIFT
	.comm	_GRF_EMMCPHY_CON0,8,3           ## @GRF_EMMCPHY_CON0
	.comm	_PHYCTRL_OTAPDLYENA,4,2         ## @PHYCTRL_OTAPDLYENA
	.comm	_PHYCTRL_OTAPDLYENA_MASK,4,2    ## @PHYCTRL_OTAPDLYENA_MASK
	.comm	_PHYCTRL_OTAPDLYENA_SHIFT,4,2   ## @PHYCTRL_OTAPDLYENA_SHIFT
	.comm	_PHYCTRL_OTAPDLYSEL_MASK,4,2    ## @PHYCTRL_OTAPDLYSEL_MASK
	.comm	_PHYCTRL_OTAPDLYSEL_SHIFT,4,2   ## @PHYCTRL_OTAPDLYSEL_SHIFT
	.comm	_PHYCTRL_PDB_PWR_ON,4,2         ## @PHYCTRL_PDB_PWR_ON
	.no_dead_strip	_rockchip_emmc_phy_power_on
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function rockchip_emmc_phy_power_on
_rockchip_emmc_phy_power_on:            ; @rockchip_emmc_phy_power_on
	.cfi_startproc
; %bb.0:
	stp	x24, x23, [sp, #-64]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x19, x0
	bl	_phy_get_drvdata
	mov	x20, x0
	ldr	w21, [x0, #16]
	ldr	x8, [x0, #8]
Lloh0:
	adrp	x9, _GRF_EMMCPHY_CON6@GOTPAGE
Lloh1:
	ldr	x9, [x9, _GRF_EMMCPHY_CON6@GOTPAGEOFF]
Lloh2:
	ldr	x9, [x9]
	add	x22, x9, x8
	ldr	w0, [x0]
Lloh3:
	adrp	x8, _PHYCTRL_DR_MASK@GOTPAGE
Lloh4:
	ldr	x8, [x8, _PHYCTRL_DR_MASK@GOTPAGEOFF]
Lloh5:
	ldr	w1, [x8]
Lloh6:
	adrp	x8, _PHYCTRL_DR_SHIFT@GOTPAGE
Lloh7:
	ldr	x8, [x8, _PHYCTRL_DR_SHIFT@GOTPAGEOFF]
Lloh8:
	ldr	w2, [x8]
	bl	_HIWORD_UPDATE
	mov	x2, x0
	mov	x0, x21
	mov	x1, x22
	bl	_regmap_write
	ldr	w21, [x20, #16]
Lloh9:
	adrp	x23, _GRF_EMMCPHY_CON0@GOTPAGE
Lloh10:
	ldr	x23, [x23, _GRF_EMMCPHY_CON0@GOTPAGEOFF]
	ldr	x8, [x20, #8]
	ldr	x9, [x23]
	add	x22, x9, x8
Lloh11:
	adrp	x8, _PHYCTRL_OTAPDLYENA@GOTPAGE
Lloh12:
	ldr	x8, [x8, _PHYCTRL_OTAPDLYENA@GOTPAGEOFF]
Lloh13:
	ldr	w0, [x8]
Lloh14:
	adrp	x8, _PHYCTRL_OTAPDLYENA_MASK@GOTPAGE
Lloh15:
	ldr	x8, [x8, _PHYCTRL_OTAPDLYENA_MASK@GOTPAGEOFF]
Lloh16:
	ldr	w1, [x8]
Lloh17:
	adrp	x8, _PHYCTRL_OTAPDLYENA_SHIFT@GOTPAGE
Lloh18:
	ldr	x8, [x8, _PHYCTRL_OTAPDLYENA_SHIFT@GOTPAGEOFF]
Lloh19:
	ldr	w2, [x8]
	bl	_HIWORD_UPDATE
	mov	x2, x0
	mov	x0, x21
	mov	x1, x22
	bl	_regmap_write
	ldr	w21, [x20, #16]
	ldr	x8, [x20, #8]
	ldr	x9, [x23]
	add	x20, x9, x8
Lloh20:
	adrp	x8, _PHYCTRL_OTAPDLYSEL_MASK@GOTPAGE
Lloh21:
	ldr	x8, [x8, _PHYCTRL_OTAPDLYSEL_MASK@GOTPAGEOFF]
Lloh22:
	ldr	w1, [x8]
Lloh23:
	adrp	x8, _PHYCTRL_OTAPDLYSEL_SHIFT@GOTPAGE
Lloh24:
	ldr	x8, [x8, _PHYCTRL_OTAPDLYSEL_SHIFT@GOTPAGEOFF]
Lloh25:
	ldr	w2, [x8]
	mov	w0, #4
	bl	_HIWORD_UPDATE
	mov	x2, x0
	mov	x0, x21
	mov	x1, x20
	bl	_regmap_write
Lloh26:
	adrp	x8, _PHYCTRL_PDB_PWR_ON@GOTPAGE
Lloh27:
	ldr	x8, [x8, _PHYCTRL_PDB_PWR_ON@GOTPAGEOFF]
Lloh28:
	ldr	w1, [x8]
	mov	x0, x19
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	b	_rockchip_emmc_phy_power
	.loh AdrpLdrGotLdr	Lloh26, Lloh27, Lloh28
	.loh AdrpLdrGotLdr	Lloh23, Lloh24, Lloh25
	.loh AdrpLdrGotLdr	Lloh20, Lloh21, Lloh22
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh19
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh16
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpLdrGot	Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_GRF_EMMCPHY_CON6,8,3           ; @GRF_EMMCPHY_CON6
	.comm	_PHYCTRL_DR_MASK,4,2            ; @PHYCTRL_DR_MASK
	.comm	_PHYCTRL_DR_SHIFT,4,2           ; @PHYCTRL_DR_SHIFT
	.comm	_GRF_EMMCPHY_CON0,8,3           ; @GRF_EMMCPHY_CON0
	.comm	_PHYCTRL_OTAPDLYENA,4,2         ; @PHYCTRL_OTAPDLYENA
	.comm	_PHYCTRL_OTAPDLYENA_MASK,4,2    ; @PHYCTRL_OTAPDLYENA_MASK
	.comm	_PHYCTRL_OTAPDLYENA_SHIFT,4,2   ; @PHYCTRL_OTAPDLYENA_SHIFT
	.comm	_PHYCTRL_OTAPDLYSEL_MASK,4,2    ; @PHYCTRL_OTAPDLYSEL_MASK
	.comm	_PHYCTRL_OTAPDLYSEL_SHIFT,4,2   ; @PHYCTRL_OTAPDLYSEL_SHIFT
	.comm	_PHYCTRL_PDB_PWR_ON,4,2         ; @PHYCTRL_PDB_PWR_ON
	.no_dead_strip	_rockchip_emmc_phy_power_on
.subsections_via_symbols
