	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function register_devlink_port
_register_devlink_port:                 ## @register_devlink_port
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$40, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rsi, %r15
	movq	%rdi, %rbx
	callq	_priv_to_devlink
	movq	%rax, %r14
	movq	8(%r15), %r13
	xorps	%xmm0, %xmm0
	movaps	%xmm0, -64(%rbp)
	movq	%rbx, %rdi
	movq	%r15, %rsi
	callq	_is_devlink_port_supported
	testl	%eax, %eax
	je	LBB0_1
## %bb.2:
	movl	16(%r15), %edi
	leaq	-64(%rbp), %rsi
	callq	_mlx5e_rep_get_port_parent_id
	movl	(%r13), %eax
	movq	_MLX5_VPORT_UPLINK@GOTPCREL(%rip), %rcx
	cmpl	(%rcx), %eax
	jne	LBB0_4
## %bb.3:
	movq	_DEVLINK_PORT_FLAVOUR_PHYSICAL@GOTPCREL(%rip), %rax
	movl	(%rax), %r12d
	movq	(%rbx), %rax
	movl	(%rax), %edi
	callq	_PCI_FUNC
	movq	-56(%rbp), %r9
	movl	-64(%rbp), %ecx
	movl	%ecx, (%rsp)
	movq	%r15, %rdi
	movl	%r12d, %esi
	movl	%eax, %edx
	xorl	%ecx, %ecx
	xorl	%r8d, %r8d
	callq	_devlink_port_attrs_set
	jmp	LBB0_9
LBB0_1:
	xorl	%eax, %eax
	jmp	LBB0_11
LBB0_4:
	movq	_MLX5_VPORT_PF@GOTPCREL(%rip), %rcx
	cmpl	(%rcx), %eax
	jne	LBB0_6
## %bb.5:
	movq	-56(%rbp), %rsi
	movl	-64(%rbp), %edx
	movq	(%rbx), %rax
	movl	(%rax), %ecx
	movq	%r15, %rdi
	callq	_devlink_port_attrs_pci_pf_set
	movl	(%r13), %edx
	jmp	LBB0_10
LBB0_6:
	movl	8(%rbx), %edi
	movq	8(%r15), %rax
	movl	(%rax), %esi
	callq	_mlx5_eswitch_is_vf_vport
	testq	%rax, %rax
	je	LBB0_7
## %bb.8:
	movq	-56(%rbp), %rsi
	movl	-64(%rbp), %edx
	movq	(%rbx), %rax
	movl	(%rax), %ecx
	movl	(%r13), %r8d
	decl	%r8d
	movq	%r15, %rdi
	callq	_devlink_port_attrs_pci_vf_set
LBB0_9:
	movl	(%r13), %esi
	movq	%rbx, %rdi
	callq	_vport_to_devlink_port_index
	movl	%eax, %edx
LBB0_10:
	movq	%r14, %rdi
	movq	%r15, %rsi
	callq	_devlink_port_register
LBB0_11:
	addq	$40, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_7:
	xorl	%edx, %edx
	jmp	LBB0_10
	.cfi_endproc
                                        ## -- End function
	.comm	_MLX5_VPORT_UPLINK,4,2          ## @MLX5_VPORT_UPLINK
	.comm	_DEVLINK_PORT_FLAVOUR_PHYSICAL,4,2 ## @DEVLINK_PORT_FLAVOUR_PHYSICAL
	.comm	_MLX5_VPORT_PF,4,2              ## @MLX5_VPORT_PF
	.no_dead_strip	_register_devlink_port
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function register_devlink_port
_register_devlink_port:                 ; @register_devlink_port
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #80
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x19, x1
	mov	x21, x0
	bl	_priv_to_devlink
	mov	x20, x0
	ldr	x23, [x19, #8]
	stp	xzr, xzr, [sp]
	mov	x0, x21
	mov	x1, x19
	bl	_is_devlink_port_supported
	cbz	w0, LBB0_9
; %bb.1:
	ldr	w0, [x19, #16]
	mov	x1, sp
	bl	_mlx5e_rep_get_port_parent_id
	ldr	w8, [x23]
Lloh0:
	adrp	x9, _MLX5_VPORT_UPLINK@GOTPAGE
Lloh1:
	ldr	x9, [x9, _MLX5_VPORT_UPLINK@GOTPAGEOFF]
Lloh2:
	ldr	w9, [x9]
	cmp	w8, w9
	b.ne	LBB0_3
; %bb.2:
Lloh3:
	adrp	x8, _DEVLINK_PORT_FLAVOUR_PHYSICAL@GOTPAGE
Lloh4:
	ldr	x8, [x8, _DEVLINK_PORT_FLAVOUR_PHYSICAL@GOTPAGEOFF]
Lloh5:
	ldr	w22, [x8]
	ldr	x8, [x21]
	ldr	w0, [x8]
	bl	_PCI_FUNC
	mov	x2, x0
	ldr	x5, [sp, #8]
	ldr	w6, [sp]
	mov	x0, x19
	mov	x1, x22
	mov	w3, #0
	mov	w4, #0
	bl	_devlink_port_attrs_set
	b	LBB0_7
LBB0_3:
Lloh6:
	adrp	x9, _MLX5_VPORT_PF@GOTPAGE
Lloh7:
	ldr	x9, [x9, _MLX5_VPORT_PF@GOTPAGEOFF]
Lloh8:
	ldr	w9, [x9]
	cmp	w8, w9
	b.ne	LBB0_5
; %bb.4:
	ldr	x1, [sp, #8]
	ldr	w2, [sp]
	ldr	x8, [x21]
	ldr	w3, [x8]
	mov	x0, x19
	bl	_devlink_port_attrs_pci_pf_set
	ldr	w2, [x23]
	b	LBB0_8
LBB0_5:
	ldr	w0, [x21, #8]
	ldr	x8, [x19, #8]
	ldr	w1, [x8]
	bl	_mlx5_eswitch_is_vf_vport
	cbz	x0, LBB0_10
; %bb.6:
	ldr	x1, [sp, #8]
	ldr	w2, [sp]
	ldr	x8, [x21]
	ldr	w3, [x8]
	ldr	w8, [x23]
	sub	w4, w8, #1
	mov	x0, x19
	bl	_devlink_port_attrs_pci_vf_set
LBB0_7:
	ldr	w1, [x23]
	mov	x0, x21
	bl	_vport_to_devlink_port_index
	mov	x2, x0
LBB0_8:
	mov	x0, x20
	mov	x1, x19
	bl	_devlink_port_register
LBB0_9:
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #80
	ret
LBB0_10:
	mov	w2, #0
	b	LBB0_8
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.cfi_endproc
                                        ; -- End function
	.comm	_MLX5_VPORT_UPLINK,4,2          ; @MLX5_VPORT_UPLINK
	.comm	_DEVLINK_PORT_FLAVOUR_PHYSICAL,4,2 ; @DEVLINK_PORT_FLAVOUR_PHYSICAL
	.comm	_MLX5_VPORT_PF,4,2              ; @MLX5_VPORT_PF
	.no_dead_strip	_register_devlink_port
.subsections_via_symbols
