	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_mvpp2_prs_vid_enable_filtering ## -- Begin function mvpp2_prs_vid_enable_filtering
	.p2align	4, 0x90
_mvpp2_prs_vid_enable_filtering:        ## @mvpp2_prs_vid_enable_filtering
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r13
	movl	(%rdi), %edi
	callq	_MVPP2_PRS_VID_PORT_DFLT
	movl	%eax, %ebx
	movq	8(%r13), %r15
	movq	(%r15), %rax
	movl	%ebx, %ecx
	cmpq	$0, (%rax,%rcx,8)
	jne	LBB0_5
## %bb.1:
	leaq	-48(%rbp), %r14
	movq	%r14, %rdi
	xorl	%esi, %esi
	movl	$4, %edx
	callq	_memset
	movl	%ebx, -48(%rbp)
	movl	(%r13), %edi
	callq	_MVPP2_MH_REG
	movq	%r15, %rdi
	movl	%eax, %esi
	callq	_mvpp2_read
	movq	_MVPP2_DSA_EXTENDED@GOTPCREL(%rip), %rcx
	andl	(%rcx), %eax
	jne	LBB0_2
## %bb.3:
	movq	_MVPP2_VLAN_TAG_LEN@GOTPCREL(%rip), %rax
	jmp	LBB0_4
LBB0_2:
	movq	_MVPP2_VLAN_TAG_EDSA_LEN@GOTPCREL(%rip), %rax
LBB0_4:
	movl	(%rax), %r12d
	movq	_MVPP2_PRS_LU_VID@GOTPCREL(%rip), %rbx
	movl	(%rbx), %esi
	movq	%r14, %rdi
	callq	_mvpp2_prs_tcam_lu_set
	movq	%r14, %rdi
	xorl	%esi, %esi
	callq	_mvpp2_prs_tcam_port_map_set
	movl	(%r13), %esi
	movq	%r14, %rdi
	movl	$1, %edx
	callq	_mvpp2_prs_tcam_port_set
	movq	_MVPP2_PRS_LU_L2@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	callq	_mvpp2_prs_sram_next_lu_set
	movq	_MVPP2_PRS_SRAM_OP_SEL_SHIFT_ADD@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r14, %rdi
	movl	%r12d, %esi
	callq	_mvpp2_prs_sram_shift_set
	movq	_MVPP2_PRS_RI_DROP_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r14, %rdi
	movl	%edx, %esi
	callq	_mvpp2_prs_sram_ri_update
	movq	_MVPP2_PRS_SRAM_AI_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r14, %rdi
	xorl	%esi, %esi
	callq	_mvpp2_prs_sram_ai_update
	movl	-48(%rbp), %esi
	movl	(%rbx), %edx
	movq	%r15, %rdi
	callq	_mvpp2_prs_shadow_set
	movq	%r15, %rdi
	movq	%r14, %rsi
	callq	_mvpp2_prs_hw_write
LBB0_5:
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_MVPP2_DSA_EXTENDED,4,2         ## @MVPP2_DSA_EXTENDED
	.comm	_MVPP2_VLAN_TAG_EDSA_LEN,4,2    ## @MVPP2_VLAN_TAG_EDSA_LEN
	.comm	_MVPP2_VLAN_TAG_LEN,4,2         ## @MVPP2_VLAN_TAG_LEN
	.comm	_MVPP2_PRS_LU_VID,4,2           ## @MVPP2_PRS_LU_VID
	.comm	_MVPP2_PRS_LU_L2,4,2            ## @MVPP2_PRS_LU_L2
	.comm	_MVPP2_PRS_SRAM_OP_SEL_SHIFT_ADD,4,2 ## @MVPP2_PRS_SRAM_OP_SEL_SHIFT_ADD
	.comm	_MVPP2_PRS_RI_DROP_MASK,4,2     ## @MVPP2_PRS_RI_DROP_MASK
	.comm	_MVPP2_PRS_SRAM_AI_MASK,4,2     ## @MVPP2_PRS_SRAM_AI_MASK
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_mvpp2_prs_vid_enable_filtering ; -- Begin function mvpp2_prs_vid_enable_filtering
	.p2align	2
_mvpp2_prs_vid_enable_filtering:        ; @mvpp2_prs_vid_enable_filtering
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #64
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x20, x0
	ldr	w0, [x0]
	bl	_MVPP2_PRS_VID_PORT_DFLT
	ldr	x19, [x20, #8]
	ldr	x8, [x19]
	ldr	x8, [x8, w0, uxtw #3]
	cbnz	x8, LBB0_2
; %bb.1:
	mov	x21, x0
	add	x0, sp, #8
	mov	w1, #0
	mov	w2, #4
	bl	_memset
	str	w21, [sp, #8]
	ldr	w0, [x20]
	bl	_MVPP2_MH_REG
	mov	x1, x0
	mov	x0, x19
	bl	_mvpp2_read
Lloh0:
	adrp	x8, _MVPP2_DSA_EXTENDED@GOTPAGE
Lloh1:
	ldr	x8, [x8, _MVPP2_DSA_EXTENDED@GOTPAGEOFF]
Lloh2:
	ldr	w8, [x8]
Lloh3:
	adrp	x9, _MVPP2_VLAN_TAG_LEN@GOTPAGE
Lloh4:
	ldr	x9, [x9, _MVPP2_VLAN_TAG_LEN@GOTPAGEOFF]
Lloh5:
	adrp	x10, _MVPP2_VLAN_TAG_EDSA_LEN@GOTPAGE
Lloh6:
	ldr	x10, [x10, _MVPP2_VLAN_TAG_EDSA_LEN@GOTPAGEOFF]
	tst	w8, w0
	csel	x8, x9, x10, eq
	ldr	w21, [x8]
Lloh7:
	adrp	x22, _MVPP2_PRS_LU_VID@GOTPAGE
Lloh8:
	ldr	x22, [x22, _MVPP2_PRS_LU_VID@GOTPAGEOFF]
	ldr	w1, [x22]
	add	x0, sp, #8
	bl	_mvpp2_prs_tcam_lu_set
	add	x0, sp, #8
	mov	w1, #0
	bl	_mvpp2_prs_tcam_port_map_set
	ldr	w1, [x20]
	add	x0, sp, #8
	mov	w2, #1
	bl	_mvpp2_prs_tcam_port_set
Lloh9:
	adrp	x8, _MVPP2_PRS_LU_L2@GOTPAGE
Lloh10:
	ldr	x8, [x8, _MVPP2_PRS_LU_L2@GOTPAGEOFF]
Lloh11:
	ldr	w1, [x8]
	add	x0, sp, #8
	bl	_mvpp2_prs_sram_next_lu_set
Lloh12:
	adrp	x8, _MVPP2_PRS_SRAM_OP_SEL_SHIFT_ADD@GOTPAGE
Lloh13:
	ldr	x8, [x8, _MVPP2_PRS_SRAM_OP_SEL_SHIFT_ADD@GOTPAGEOFF]
Lloh14:
	ldr	w2, [x8]
	add	x0, sp, #8
	mov	x1, x21
	bl	_mvpp2_prs_sram_shift_set
Lloh15:
	adrp	x8, _MVPP2_PRS_RI_DROP_MASK@GOTPAGE
Lloh16:
	ldr	x8, [x8, _MVPP2_PRS_RI_DROP_MASK@GOTPAGEOFF]
Lloh17:
	ldr	w1, [x8]
	add	x0, sp, #8
	mov	x2, x1
	bl	_mvpp2_prs_sram_ri_update
Lloh18:
	adrp	x8, _MVPP2_PRS_SRAM_AI_MASK@GOTPAGE
Lloh19:
	ldr	x8, [x8, _MVPP2_PRS_SRAM_AI_MASK@GOTPAGEOFF]
Lloh20:
	ldr	w2, [x8]
	add	x0, sp, #8
	mov	w1, #0
	bl	_mvpp2_prs_sram_ai_update
	ldr	w1, [sp, #8]
	ldr	w2, [x22]
	mov	x0, x19
	bl	_mvpp2_prs_shadow_set
	add	x1, sp, #8
	mov	x0, x19
	bl	_mvpp2_prs_hw_write
LBB0_2:
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #64
	ret
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGot	Lloh7, Lloh8
	.loh AdrpLdrGot	Lloh5, Lloh6
	.loh AdrpLdrGot	Lloh3, Lloh4
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_MVPP2_DSA_EXTENDED,4,2         ; @MVPP2_DSA_EXTENDED
	.comm	_MVPP2_VLAN_TAG_EDSA_LEN,4,2    ; @MVPP2_VLAN_TAG_EDSA_LEN
	.comm	_MVPP2_VLAN_TAG_LEN,4,2         ; @MVPP2_VLAN_TAG_LEN
	.comm	_MVPP2_PRS_LU_VID,4,2           ; @MVPP2_PRS_LU_VID
	.comm	_MVPP2_PRS_LU_L2,4,2            ; @MVPP2_PRS_LU_L2
	.comm	_MVPP2_PRS_SRAM_OP_SEL_SHIFT_ADD,4,2 ; @MVPP2_PRS_SRAM_OP_SEL_SHIFT_ADD
	.comm	_MVPP2_PRS_RI_DROP_MASK,4,2     ; @MVPP2_PRS_RI_DROP_MASK
	.comm	_MVPP2_PRS_SRAM_AI_MASK,4,2     ; @MVPP2_PRS_SRAM_AI_MASK
.subsections_via_symbols
