	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function ath5k_hw_rf_gainf_corr
_ath5k_hw_rf_gainf_corr:                ## @ath5k_hw_rf_gainf_corr
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	(%rdi), %rax
	movq	_AR5K_RF5112@GOTPCREL(%rip), %rcx
	xorl	%r14d, %r14d
	cmpq	(%rcx), %rax
	jne	LBB0_11
## %bb.1:
	movq	%rdi, %rbx
	movq	8(%rdi), %rax
	movq	_AR5K_SREV_RAD_5112A@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jle	LBB0_11
## %bb.2:
	movq	_rf_regs_5112a@GOTPCREL(%rip), %rax
	movq	(%rax), %r15
	movq	%r15, %rdi
	callq	_ARRAY_SIZE
	movl	%eax, 40(%rbx)
	cmpq	$0, 32(%rbx)
	je	LBB0_11
## %bb.3:
	movq	_rfgain_opt_5112@GOTPCREL(%rip), %rax
	movq	(%rax), %r12
	movq	16(%rbx), %r13
	movl	$0, 24(%rbx)
	movq	_AR5K_RF_MIXVGA_OVR@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	xorl	%r14d, %r14d
	movq	%rbx, %rdi
	movq	%r15, %rsi
	xorl	%edx, %edx
	xorl	%r8d, %r8d
	callq	_ath5k_hw_rfb_op
	cmpl	$1, %eax
	jne	LBB0_11
## %bb.4:
	movq	_AR5K_RF_MIXGAIN_STEP@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movq	%rbx, %rdi
	movq	%r15, %rsi
	xorl	%edx, %edx
	xorl	%r8d, %r8d
	callq	_ath5k_hw_rfb_op
	movl	%eax, %r14d
	movq	(%r12,%r13,8), %rax
	movl	(%rax), %eax
	cmpl	$1, %eax
	je	LBB0_10
## %bb.5:
	cmpl	$2, %eax
	je	LBB0_8
## %bb.6:
	cmpl	$3, %eax
	jne	LBB0_9
## %bb.7:
	addl	%r14d, %r14d
	jmp	LBB0_10
LBB0_8:
	addl	%r14d, %r14d
	addl	$-10, %r14d
	jmp	LBB0_10
LBB0_9:
	xorl	%r14d, %r14d
LBB0_10:
	movl	%r14d, 24(%rbx)
LBB0_11:
	movl	%r14d, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_AR5K_RF5112,8,3                ## @AR5K_RF5112
	.comm	_AR5K_SREV_RAD_5112A,8,3        ## @AR5K_SREV_RAD_5112A
	.comm	_rfgain_opt_5112,8,3            ## @rfgain_opt_5112
	.comm	_rf_regs_5112a,8,3              ## @rf_regs_5112a
	.comm	_AR5K_RF_MIXVGA_OVR,4,2         ## @AR5K_RF_MIXVGA_OVR
	.comm	_AR5K_RF_MIXGAIN_STEP,4,2       ## @AR5K_RF_MIXGAIN_STEP
	.no_dead_strip	_ath5k_hw_rf_gainf_corr
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function ath5k_hw_rf_gainf_corr
_ath5k_hw_rf_gainf_corr:                ; @ath5k_hw_rf_gainf_corr
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	ldr	x8, [x0]
Lloh0:
	adrp	x9, _AR5K_RF5112@GOTPAGE
Lloh1:
	ldr	x9, [x9, _AR5K_RF5112@GOTPAGEOFF]
Lloh2:
	ldr	x9, [x9]
	cmp	x8, x9
	b.ne	LBB0_8
; %bb.1:
	mov	x19, x0
	ldr	x8, [x0, #8]
Lloh3:
	adrp	x9, _AR5K_SREV_RAD_5112A@GOTPAGE
Lloh4:
	ldr	x9, [x9, _AR5K_SREV_RAD_5112A@GOTPAGEOFF]
Lloh5:
	ldr	x9, [x9]
	cmp	x8, x9
	b.le	LBB0_8
; %bb.2:
Lloh6:
	adrp	x8, _rf_regs_5112a@GOTPAGE
Lloh7:
	ldr	x8, [x8, _rf_regs_5112a@GOTPAGEOFF]
Lloh8:
	ldr	x20, [x8]
	mov	x0, x20
	bl	_ARRAY_SIZE
	str	w0, [x19, #40]
	ldr	x8, [x19, #32]
	cbz	x8, LBB0_8
; %bb.3:
Lloh9:
	adrp	x8, _rfgain_opt_5112@GOTPAGE
Lloh10:
	ldr	x8, [x8, _rfgain_opt_5112@GOTPAGEOFF]
Lloh11:
	ldr	x21, [x8]
	ldr	x22, [x19, #16]
	str	wzr, [x19, #24]
Lloh12:
	adrp	x8, _AR5K_RF_MIXVGA_OVR@GOTPAGE
Lloh13:
	ldr	x8, [x8, _AR5K_RF_MIXVGA_OVR@GOTPAGEOFF]
Lloh14:
	ldr	w3, [x8]
	mov	x0, x19
	mov	x1, x20
	mov	w2, #0
	mov	w4, #0
	bl	_ath5k_hw_rfb_op
	mov	x8, x0
	mov	w0, #0
	cmp	w8, #1
	b.ne	LBB0_9
; %bb.4:
Lloh15:
	adrp	x8, _AR5K_RF_MIXGAIN_STEP@GOTPAGE
Lloh16:
	ldr	x8, [x8, _AR5K_RF_MIXGAIN_STEP@GOTPAGEOFF]
Lloh17:
	ldr	w3, [x8]
	mov	x0, x19
	mov	x1, x20
	mov	w2, #0
	mov	w4, #0
	bl	_ath5k_hw_rfb_op
	ldr	x8, [x21, x22, lsl #3]
	ldr	w8, [x8]
	cmp	w8, #1
	b.eq	LBB0_12
; %bb.5:
	cmp	w8, #2
	b.eq	LBB0_10
; %bb.6:
	cmp	w8, #3
	b.ne	LBB0_11
; %bb.7:
	lsl	w0, w0, #1
	b	LBB0_12
LBB0_8:
	mov	w0, #0
LBB0_9:
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
LBB0_10:
	lsl	w8, w0, #1
	sub	w0, w8, #10
	b	LBB0_12
LBB0_11:
	mov	w0, #0
LBB0_12:
	str	w0, [x19, #24]
	b	LBB0_9
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.cfi_endproc
                                        ; -- End function
	.comm	_AR5K_RF5112,8,3                ; @AR5K_RF5112
	.comm	_AR5K_SREV_RAD_5112A,8,3        ; @AR5K_SREV_RAD_5112A
	.comm	_rfgain_opt_5112,8,3            ; @rfgain_opt_5112
	.comm	_rf_regs_5112a,8,3              ; @rf_regs_5112a
	.comm	_AR5K_RF_MIXVGA_OVR,4,2         ; @AR5K_RF_MIXVGA_OVR
	.comm	_AR5K_RF_MIXGAIN_STEP,4,2       ; @AR5K_RF_MIXGAIN_STEP
	.no_dead_strip	_ath5k_hw_rf_gainf_corr
.subsections_via_symbols
