	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function tegra124_usb2_phy_power_on
_tegra124_usb2_phy_power_on:            ## @tegra124_usb2_phy_power_on
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$40, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r13
	callq	_phy_get_drvdata
	movq	%rax, %rbx
	movq	%rax, %rdi
	callq	_to_usb2_lane
	movq	%rax, -72(%rbp)                 ## 8-byte Spill
	movq	8(%rbx), %rdi
	callq	_to_usb2_pad
	movq	%rax, %r12
	movq	8(%rbx), %rax
	movq	(%rax), %r15
	movl	(%rbx), %r14d
	movq	%r15, %rdi
	movl	%r14d, %esi
	callq	_tegra_xusb_find_usb2_port
	testq	%rax, %rax
	je	LBB0_1
## %bb.2:
	movq	%r12, -56(%rbp)                 ## 8-byte Spill
	movq	%r15, %rdi
	movq	%rax, -64(%rbp)                 ## 8-byte Spill
	callq	_to_tegra124_xusb_padctl
	movq	%rax, %r13
	movq	%rax, -48(%rbp)                 ## 8-byte Spill
	movq	_XUSB_PADCTL_USB2_BIAS_PAD_CTL0@GOTPCREL(%rip), %r12
	movl	(%r12), %esi
	movq	%r15, %rdi
	callq	_padctl_readl
	movq	_XUSB_PADCTL_USB2_BIAS_PAD_CTL0_HS_SQUELCH_LEVEL_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	movq	_XUSB_PADCTL_USB2_BIAS_PAD_CTL0_HS_SQUELCH_LEVEL_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %r8b
	movl	%r8d, %ecx
	shll	%cl, %esi
	movq	_XUSB_PADCTL_USB2_BIAS_PAD_CTL0_HS_DISCON_LEVEL_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edi
	movq	_XUSB_PADCTL_USB2_BIAS_PAD_CTL0_HS_DISCON_LEVEL_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %bl
	movl	%ebx, %ecx
	shll	%cl, %edi
	orl	%esi, %edi
	notl	%edi
	movl	(%r13), %edx
	movl	%r8d, %ecx
	shll	%cl, %edx
	movq	_XUSB_PADCTL_USB2_BIAS_PAD_CTL0_HS_DISCON_LEVEL_VAL@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	movl	%ebx, %ecx
	shll	%cl, %esi
	andl	%eax, %edi
	orl	%edi, %esi
	orl	%edx, %esi
	movl	(%r12), %edx
	movq	%r15, %rdi
	callq	_padctl_writel
	movq	_XUSB_PADCTL_USB2_PORT_CAP@GOTPCREL(%rip), %r12
	movl	(%r12), %esi
	movq	%r15, %rdi
	callq	_padctl_readl
	movl	%eax, %r13d
	movq	_XUSB_PADCTL_USB2_PORT_CAP_PORT_CAP_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	movl	%r14d, %edi
	callq	_XUSB_PADCTL_USB2_PORT_CAP_PORTX_CAP_SHIFT
	movl	%eax, %ecx
	shll	%cl, %ebx
	notl	%ebx
	andl	%r13d, %ebx
	movq	_XUSB_PADCTL_USB2_PORT_CAP_HOST@GOTPCREL(%rip), %rax
	movl	(%rax), %r13d
	movl	%r14d, %edi
	callq	_XUSB_PADCTL_USB2_PORT_CAP_PORTX_CAP_SHIFT
	movl	%eax, %ecx
	shll	%cl, %r13d
	orl	%ebx, %r13d
	movl	(%r12), %edx
	movq	%r15, %rdi
	movl	%r13d, %esi
	callq	_padctl_writel
	movl	%r14d, %edi
	callq	_XUSB_PADCTL_USB2_OTG_PADX_CTL0
	movq	%r15, %rdi
	movl	%eax, %esi
	callq	_padctl_readl
	movq	_XUSB_PADCTL_USB2_OTG_PAD_CTL0_HS_CURR_LEVEL_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edi
	movq	_XUSB_PADCTL_USB2_OTG_PAD_CTL0_HS_CURR_LEVEL_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %r8b
	movl	%r8d, %ecx
	shll	%cl, %edi
	movq	_XUSB_PADCTL_USB2_OTG_PAD_CTL0_HS_SLEW_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	movq	_XUSB_PADCTL_USB2_OTG_PAD_CTL0_HS_SLEW_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %r9b
	movl	%r9d, %ecx
	shll	%cl, %edx
	movq	_XUSB_PADCTL_USB2_OTG_PAD_CTL0_LS_RSLEW_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	movq	_XUSB_PADCTL_USB2_OTG_PAD_CTL0_LS_RSLEW_SHIFT@GOTPCREL(%rip), %rbx
	movb	(%rbx), %cl
	shll	%cl, %esi
	orl	%edi, %edx
	orl	%edx, %esi
	movq	_XUSB_PADCTL_USB2_OTG_PAD_CTL0_PD@GOTPCREL(%rip), %rcx
	orl	(%rcx), %esi
	movq	_XUSB_PADCTL_USB2_OTG_PAD_CTL0_PD2@GOTPCREL(%rip), %rcx
	orl	(%rcx), %esi
	movq	_XUSB_PADCTL_USB2_OTG_PAD_CTL0_PD_ZI@GOTPCREL(%rip), %rcx
	orl	(%rcx), %esi
	movq	-48(%rbp), %rcx                 ## 8-byte Reload
	movq	8(%rcx), %rcx
	movq	-72(%rbp), %rdx                 ## 8-byte Reload
	movl	(%rdx), %r13d
	addl	(%rcx,%r14,4), %r13d
	movl	%r8d, %ecx
	shll	%cl, %r13d
	notl	%esi
	andl	%eax, %esi
	movq	_XUSB_PADCTL_USB2_OTG_PAD_CTL0_HS_SLEW_VAL@GOTPCREL(%rip), %rax
	movl	(%rax), %r12d
	movl	%r9d, %ecx
	shll	%cl, %r12d
	orl	%esi, %r12d
	movl	%r14d, %edi
	callq	_XUSB_PADCTL_USB2_OTG_PAD_CTL0_LS_RSLEW_VAL
	movb	(%rbx), %cl
	shll	%cl, %eax
	orl	%eax, %r12d
	orl	%r13d, %r12d
	movl	%r14d, %edi
	callq	_XUSB_PADCTL_USB2_OTG_PADX_CTL0
	movq	%r15, %rdi
	movl	%r12d, %esi
	movl	%eax, %edx
	callq	_padctl_writel
	movl	%r14d, %edi
	callq	_XUSB_PADCTL_USB2_OTG_PADX_CTL1
	movq	%r15, %rdi
	movl	%eax, %esi
	callq	_padctl_readl
	movq	_XUSB_PADCTL_USB2_OTG_PAD_CTL1_TERM_RANGE_ADJ_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edi
	movq	_XUSB_PADCTL_USB2_OTG_PAD_CTL1_TERM_RANGE_ADJ_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %r8b
	movl	%r8d, %ecx
	shll	%cl, %edi
	movq	_XUSB_PADCTL_USB2_OTG_PAD_CTL1_HS_IREF_CAP_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	movq	_XUSB_PADCTL_USB2_OTG_PAD_CTL1_HS_IREF_CAP_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %dl
	movl	%edx, %ecx
	shll	%cl, %esi
	orl	%edi, %esi
	movq	_XUSB_PADCTL_USB2_OTG_PAD_CTL1_PD_DR@GOTPCREL(%rip), %rcx
	orl	(%rcx), %esi
	movq	_XUSB_PADCTL_USB2_OTG_PAD_CTL1_PD_CHRP_FORCE_POWERUP@GOTPCREL(%rip), %rcx
	orl	(%rcx), %esi
	movq	_XUSB_PADCTL_USB2_OTG_PAD_CTL1_PD_DISC_FORCE_POWERUP@GOTPCREL(%rip), %rcx
	orl	(%rcx), %esi
	movq	-48(%rbp), %rbx                 ## 8-byte Reload
	movl	16(%rbx), %edi
	movl	%r8d, %ecx
	shll	%cl, %edi
	movl	20(%rbx), %ebx
	movl	%edx, %ecx
	shll	%cl, %ebx
	notl	%esi
	andl	%eax, %esi
	orl	%edi, %ebx
	orl	%esi, %ebx
	movl	%r14d, %edi
	callq	_XUSB_PADCTL_USB2_OTG_PADX_CTL1
	movq	%r15, %rdi
	movl	%ebx, %esi
	movl	%eax, %edx
	callq	_padctl_writel
	movq	-64(%rbp), %rax                 ## 8-byte Reload
	movl	(%rax), %edi
	callq	_regulator_enable
	testl	%eax, %eax
	jne	LBB0_6
## %bb.3:
	movq	_XUSB_PADCTL_USB2_BIAS_PAD_CTL0@GOTPCREL(%rip), %r14
	movq	-56(%rbp), %rbx                 ## 8-byte Reload
	movq	%rbx, %rdi
	callq	_mutex_lock
	movl	4(%rbx), %eax
	leal	1(%rax), %ecx
	movl	%ecx, 4(%rbx)
	testl	%eax, %eax
	jg	LBB0_5
## %bb.4:
	movl	(%r14), %esi
	movq	%r15, %rdi
	callq	_padctl_readl
	movq	_XUSB_PADCTL_USB2_BIAS_PAD_CTL0_PD@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	notl	%esi
	andl	%eax, %esi
	movl	(%r14), %edx
	movq	%r15, %rdi
	callq	_padctl_writel
LBB0_5:
	movq	%rbx, %rdi
	callq	_mutex_unlock
	xorl	%eax, %eax
	jmp	LBB0_6
LBB0_1:
	leaq	L_.str(%rip), %rsi
	movq	%r13, %rdi
	movl	%r14d, %edx
	callq	_dev_err
	movq	_ENODEV@GOTPCREL(%rip), %rcx
	xorl	%eax, %eax
	subl	(%rcx), %eax
LBB0_6:
	addq	$40, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"no port found for USB2 lane %u\n"

	.comm	_ENODEV,4,2                     ## @ENODEV
	.comm	_XUSB_PADCTL_USB2_BIAS_PAD_CTL0,4,2 ## @XUSB_PADCTL_USB2_BIAS_PAD_CTL0
	.comm	_XUSB_PADCTL_USB2_BIAS_PAD_CTL0_HS_SQUELCH_LEVEL_MASK,4,2 ## @XUSB_PADCTL_USB2_BIAS_PAD_CTL0_HS_SQUELCH_LEVEL_MASK
	.comm	_XUSB_PADCTL_USB2_BIAS_PAD_CTL0_HS_SQUELCH_LEVEL_SHIFT,4,2 ## @XUSB_PADCTL_USB2_BIAS_PAD_CTL0_HS_SQUELCH_LEVEL_SHIFT
	.comm	_XUSB_PADCTL_USB2_BIAS_PAD_CTL0_HS_DISCON_LEVEL_MASK,4,2 ## @XUSB_PADCTL_USB2_BIAS_PAD_CTL0_HS_DISCON_LEVEL_MASK
	.comm	_XUSB_PADCTL_USB2_BIAS_PAD_CTL0_HS_DISCON_LEVEL_SHIFT,4,2 ## @XUSB_PADCTL_USB2_BIAS_PAD_CTL0_HS_DISCON_LEVEL_SHIFT
	.comm	_XUSB_PADCTL_USB2_BIAS_PAD_CTL0_HS_DISCON_LEVEL_VAL,4,2 ## @XUSB_PADCTL_USB2_BIAS_PAD_CTL0_HS_DISCON_LEVEL_VAL
	.comm	_XUSB_PADCTL_USB2_PORT_CAP,4,2  ## @XUSB_PADCTL_USB2_PORT_CAP
	.comm	_XUSB_PADCTL_USB2_PORT_CAP_PORT_CAP_MASK,4,2 ## @XUSB_PADCTL_USB2_PORT_CAP_PORT_CAP_MASK
	.comm	_XUSB_PADCTL_USB2_PORT_CAP_HOST,4,2 ## @XUSB_PADCTL_USB2_PORT_CAP_HOST
	.comm	_XUSB_PADCTL_USB2_OTG_PAD_CTL0_HS_CURR_LEVEL_MASK,4,2 ## @XUSB_PADCTL_USB2_OTG_PAD_CTL0_HS_CURR_LEVEL_MASK
	.comm	_XUSB_PADCTL_USB2_OTG_PAD_CTL0_HS_CURR_LEVEL_SHIFT,4,2 ## @XUSB_PADCTL_USB2_OTG_PAD_CTL0_HS_CURR_LEVEL_SHIFT
	.comm	_XUSB_PADCTL_USB2_OTG_PAD_CTL0_HS_SLEW_MASK,4,2 ## @XUSB_PADCTL_USB2_OTG_PAD_CTL0_HS_SLEW_MASK
	.comm	_XUSB_PADCTL_USB2_OTG_PAD_CTL0_HS_SLEW_SHIFT,4,2 ## @XUSB_PADCTL_USB2_OTG_PAD_CTL0_HS_SLEW_SHIFT
	.comm	_XUSB_PADCTL_USB2_OTG_PAD_CTL0_LS_RSLEW_MASK,4,2 ## @XUSB_PADCTL_USB2_OTG_PAD_CTL0_LS_RSLEW_MASK
	.comm	_XUSB_PADCTL_USB2_OTG_PAD_CTL0_LS_RSLEW_SHIFT,4,2 ## @XUSB_PADCTL_USB2_OTG_PAD_CTL0_LS_RSLEW_SHIFT
	.comm	_XUSB_PADCTL_USB2_OTG_PAD_CTL0_PD,4,2 ## @XUSB_PADCTL_USB2_OTG_PAD_CTL0_PD
	.comm	_XUSB_PADCTL_USB2_OTG_PAD_CTL0_PD2,4,2 ## @XUSB_PADCTL_USB2_OTG_PAD_CTL0_PD2
	.comm	_XUSB_PADCTL_USB2_OTG_PAD_CTL0_PD_ZI,4,2 ## @XUSB_PADCTL_USB2_OTG_PAD_CTL0_PD_ZI
	.comm	_XUSB_PADCTL_USB2_OTG_PAD_CTL0_HS_SLEW_VAL,4,2 ## @XUSB_PADCTL_USB2_OTG_PAD_CTL0_HS_SLEW_VAL
	.comm	_XUSB_PADCTL_USB2_OTG_PAD_CTL1_TERM_RANGE_ADJ_MASK,4,2 ## @XUSB_PADCTL_USB2_OTG_PAD_CTL1_TERM_RANGE_ADJ_MASK
	.comm	_XUSB_PADCTL_USB2_OTG_PAD_CTL1_TERM_RANGE_ADJ_SHIFT,4,2 ## @XUSB_PADCTL_USB2_OTG_PAD_CTL1_TERM_RANGE_ADJ_SHIFT
	.comm	_XUSB_PADCTL_USB2_OTG_PAD_CTL1_HS_IREF_CAP_MASK,4,2 ## @XUSB_PADCTL_USB2_OTG_PAD_CTL1_HS_IREF_CAP_MASK
	.comm	_XUSB_PADCTL_USB2_OTG_PAD_CTL1_HS_IREF_CAP_SHIFT,4,2 ## @XUSB_PADCTL_USB2_OTG_PAD_CTL1_HS_IREF_CAP_SHIFT
	.comm	_XUSB_PADCTL_USB2_OTG_PAD_CTL1_PD_DR,4,2 ## @XUSB_PADCTL_USB2_OTG_PAD_CTL1_PD_DR
	.comm	_XUSB_PADCTL_USB2_OTG_PAD_CTL1_PD_CHRP_FORCE_POWERUP,4,2 ## @XUSB_PADCTL_USB2_OTG_PAD_CTL1_PD_CHRP_FORCE_POWERUP
	.comm	_XUSB_PADCTL_USB2_OTG_PAD_CTL1_PD_DISC_FORCE_POWERUP,4,2 ## @XUSB_PADCTL_USB2_OTG_PAD_CTL1_PD_DISC_FORCE_POWERUP
	.comm	_XUSB_PADCTL_USB2_BIAS_PAD_CTL0_PD,4,2 ## @XUSB_PADCTL_USB2_BIAS_PAD_CTL0_PD
	.no_dead_strip	_tegra124_usb2_phy_power_on
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function tegra124_usb2_phy_power_on
_tegra124_usb2_phy_power_on:            ; @tegra124_usb2_phy_power_on
	.cfi_startproc
; %bb.0:
	stp	x28, x27, [sp, #-96]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 96
	stp	x26, x25, [sp, #16]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #32]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #48]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #64]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #80]             ; 16-byte Folded Spill
	add	x29, sp, #80
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	mov	x23, x0
	bl	_phy_get_drvdata
	mov	x21, x0
	bl	_to_usb2_lane
	mov	x24, x0
	ldr	x0, [x21, #8]
	bl	_to_usb2_pad
	mov	x19, x0
	ldr	x8, [x21, #8]
	ldr	x20, [x8]
	ldr	w21, [x21]
	mov	x0, x20
	mov	x1, x21
	bl	_tegra_xusb_find_usb2_port
	cbz	x0, LBB0_5
; %bb.1:
	mov	x22, x0
	mov	x0, x20
	bl	_to_tegra124_xusb_padctl
	mov	x23, x0
Lloh0:
	adrp	x26, _XUSB_PADCTL_USB2_BIAS_PAD_CTL0@GOTPAGE
Lloh1:
	ldr	x26, [x26, _XUSB_PADCTL_USB2_BIAS_PAD_CTL0@GOTPAGEOFF]
	ldr	w1, [x26]
	mov	x0, x20
	bl	_padctl_readl
Lloh2:
	adrp	x8, _XUSB_PADCTL_USB2_BIAS_PAD_CTL0_HS_SQUELCH_LEVEL_MASK@GOTPAGE
Lloh3:
	ldr	x8, [x8, _XUSB_PADCTL_USB2_BIAS_PAD_CTL0_HS_SQUELCH_LEVEL_MASK@GOTPAGEOFF]
Lloh4:
	ldr	w8, [x8]
Lloh5:
	adrp	x9, _XUSB_PADCTL_USB2_BIAS_PAD_CTL0_HS_SQUELCH_LEVEL_SHIFT@GOTPAGE
Lloh6:
	ldr	x9, [x9, _XUSB_PADCTL_USB2_BIAS_PAD_CTL0_HS_SQUELCH_LEVEL_SHIFT@GOTPAGEOFF]
Lloh7:
	ldr	w9, [x9]
	lsl	w8, w8, w9
Lloh8:
	adrp	x10, _XUSB_PADCTL_USB2_BIAS_PAD_CTL0_HS_DISCON_LEVEL_MASK@GOTPAGE
Lloh9:
	ldr	x10, [x10, _XUSB_PADCTL_USB2_BIAS_PAD_CTL0_HS_DISCON_LEVEL_MASK@GOTPAGEOFF]
Lloh10:
	ldr	w10, [x10]
Lloh11:
	adrp	x11, _XUSB_PADCTL_USB2_BIAS_PAD_CTL0_HS_DISCON_LEVEL_SHIFT@GOTPAGE
Lloh12:
	ldr	x11, [x11, _XUSB_PADCTL_USB2_BIAS_PAD_CTL0_HS_DISCON_LEVEL_SHIFT@GOTPAGEOFF]
Lloh13:
	ldr	w11, [x11]
	lsl	w10, w10, w11
	orr	w8, w10, w8
	bic	w8, w0, w8
	ldr	w10, [x23]
Lloh14:
	adrp	x12, _XUSB_PADCTL_USB2_BIAS_PAD_CTL0_HS_DISCON_LEVEL_VAL@GOTPAGE
Lloh15:
	ldr	x12, [x12, _XUSB_PADCTL_USB2_BIAS_PAD_CTL0_HS_DISCON_LEVEL_VAL@GOTPAGEOFF]
	lsl	w9, w10, w9
Lloh16:
	ldr	w10, [x12]
	lsl	w10, w10, w11
	orr	w9, w10, w9
	orr	w1, w9, w8
	ldr	w2, [x26]
	mov	x0, x20
	bl	_padctl_writel
Lloh17:
	adrp	x27, _XUSB_PADCTL_USB2_PORT_CAP@GOTPAGE
Lloh18:
	ldr	x27, [x27, _XUSB_PADCTL_USB2_PORT_CAP@GOTPAGEOFF]
	ldr	w1, [x27]
	mov	x0, x20
	bl	_padctl_readl
	mov	x25, x0
Lloh19:
	adrp	x8, _XUSB_PADCTL_USB2_PORT_CAP_PORT_CAP_MASK@GOTPAGE
Lloh20:
	ldr	x8, [x8, _XUSB_PADCTL_USB2_PORT_CAP_PORT_CAP_MASK@GOTPAGEOFF]
Lloh21:
	ldr	w28, [x8]
	mov	x0, x21
	bl	_XUSB_PADCTL_USB2_PORT_CAP_PORTX_CAP_SHIFT
	lsl	w8, w28, w0
	bic	w25, w25, w8
Lloh22:
	adrp	x8, _XUSB_PADCTL_USB2_PORT_CAP_HOST@GOTPAGE
Lloh23:
	ldr	x8, [x8, _XUSB_PADCTL_USB2_PORT_CAP_HOST@GOTPAGEOFF]
Lloh24:
	ldr	w28, [x8]
	mov	x0, x21
	bl	_XUSB_PADCTL_USB2_PORT_CAP_PORTX_CAP_SHIFT
	lsl	w8, w28, w0
	orr	w1, w8, w25
	ldr	w2, [x27]
	mov	x0, x20
	bl	_padctl_writel
	mov	x0, x21
	bl	_XUSB_PADCTL_USB2_OTG_PADX_CTL0
	mov	x1, x0
	mov	x0, x20
	bl	_padctl_readl
Lloh25:
	adrp	x8, _XUSB_PADCTL_USB2_OTG_PAD_CTL0_HS_CURR_LEVEL_MASK@GOTPAGE
Lloh26:
	ldr	x8, [x8, _XUSB_PADCTL_USB2_OTG_PAD_CTL0_HS_CURR_LEVEL_MASK@GOTPAGEOFF]
Lloh27:
	ldr	w8, [x8]
Lloh28:
	adrp	x9, _XUSB_PADCTL_USB2_OTG_PAD_CTL0_HS_CURR_LEVEL_SHIFT@GOTPAGE
Lloh29:
	ldr	x9, [x9, _XUSB_PADCTL_USB2_OTG_PAD_CTL0_HS_CURR_LEVEL_SHIFT@GOTPAGEOFF]
Lloh30:
	ldr	w9, [x9]
	lsl	w8, w8, w9
Lloh31:
	adrp	x10, _XUSB_PADCTL_USB2_OTG_PAD_CTL0_HS_SLEW_MASK@GOTPAGE
Lloh32:
	ldr	x10, [x10, _XUSB_PADCTL_USB2_OTG_PAD_CTL0_HS_SLEW_MASK@GOTPAGEOFF]
Lloh33:
	ldr	w10, [x10]
Lloh34:
	adrp	x11, _XUSB_PADCTL_USB2_OTG_PAD_CTL0_HS_SLEW_SHIFT@GOTPAGE
Lloh35:
	ldr	x11, [x11, _XUSB_PADCTL_USB2_OTG_PAD_CTL0_HS_SLEW_SHIFT@GOTPAGEOFF]
Lloh36:
	ldr	w11, [x11]
	lsl	w10, w10, w11
	orr	w8, w10, w8
Lloh37:
	adrp	x10, _XUSB_PADCTL_USB2_OTG_PAD_CTL0_LS_RSLEW_MASK@GOTPAGE
Lloh38:
	ldr	x10, [x10, _XUSB_PADCTL_USB2_OTG_PAD_CTL0_LS_RSLEW_MASK@GOTPAGEOFF]
Lloh39:
	ldr	w10, [x10]
Lloh40:
	adrp	x25, _XUSB_PADCTL_USB2_OTG_PAD_CTL0_LS_RSLEW_SHIFT@GOTPAGE
Lloh41:
	ldr	x25, [x25, _XUSB_PADCTL_USB2_OTG_PAD_CTL0_LS_RSLEW_SHIFT@GOTPAGEOFF]
	ldr	w12, [x25]
	lsl	w10, w10, w12
Lloh42:
	adrp	x12, _XUSB_PADCTL_USB2_OTG_PAD_CTL0_PD@GOTPAGE
Lloh43:
	ldr	x12, [x12, _XUSB_PADCTL_USB2_OTG_PAD_CTL0_PD@GOTPAGEOFF]
	orr	w8, w8, w10
Lloh44:
	ldr	w10, [x12]
	orr	w8, w8, w10
Lloh45:
	adrp	x10, _XUSB_PADCTL_USB2_OTG_PAD_CTL0_PD2@GOTPAGE
Lloh46:
	ldr	x10, [x10, _XUSB_PADCTL_USB2_OTG_PAD_CTL0_PD2@GOTPAGEOFF]
Lloh47:
	ldr	w10, [x10]
	orr	w8, w8, w10
Lloh48:
	adrp	x10, _XUSB_PADCTL_USB2_OTG_PAD_CTL0_PD_ZI@GOTPAGE
Lloh49:
	ldr	x10, [x10, _XUSB_PADCTL_USB2_OTG_PAD_CTL0_PD_ZI@GOTPAGEOFF]
Lloh50:
	ldr	w10, [x10]
	orr	w8, w8, w10
	bic	w8, w0, w8
	ldr	x10, [x23, #8]
	ldr	w10, [x10, x21, lsl #2]
	ldr	w12, [x24]
	add	w10, w12, w10
	lsl	w9, w10, w9
	orr	w8, w9, w8
Lloh51:
	adrp	x9, _XUSB_PADCTL_USB2_OTG_PAD_CTL0_HS_SLEW_VAL@GOTPAGE
Lloh52:
	ldr	x9, [x9, _XUSB_PADCTL_USB2_OTG_PAD_CTL0_HS_SLEW_VAL@GOTPAGEOFF]
Lloh53:
	ldr	w9, [x9]
	lsl	w9, w9, w11
	orr	w24, w8, w9
	mov	x0, x21
	bl	_XUSB_PADCTL_USB2_OTG_PAD_CTL0_LS_RSLEW_VAL
	ldr	w8, [x25]
	lsl	w8, w0, w8
	orr	w24, w24, w8
	mov	x0, x21
	bl	_XUSB_PADCTL_USB2_OTG_PADX_CTL0
	mov	x2, x0
	mov	x0, x20
	mov	x1, x24
	bl	_padctl_writel
	mov	x0, x21
	bl	_XUSB_PADCTL_USB2_OTG_PADX_CTL1
	mov	x1, x0
	mov	x0, x20
	bl	_padctl_readl
Lloh54:
	adrp	x8, _XUSB_PADCTL_USB2_OTG_PAD_CTL1_TERM_RANGE_ADJ_MASK@GOTPAGE
Lloh55:
	ldr	x8, [x8, _XUSB_PADCTL_USB2_OTG_PAD_CTL1_TERM_RANGE_ADJ_MASK@GOTPAGEOFF]
Lloh56:
	adrp	x9, _XUSB_PADCTL_USB2_OTG_PAD_CTL1_TERM_RANGE_ADJ_SHIFT@GOTPAGE
Lloh57:
	ldr	x9, [x9, _XUSB_PADCTL_USB2_OTG_PAD_CTL1_TERM_RANGE_ADJ_SHIFT@GOTPAGEOFF]
Lloh58:
	ldr	w8, [x8]
Lloh59:
	ldr	w9, [x9]
	lsl	w8, w8, w9
Lloh60:
	adrp	x10, _XUSB_PADCTL_USB2_OTG_PAD_CTL1_HS_IREF_CAP_MASK@GOTPAGE
Lloh61:
	ldr	x10, [x10, _XUSB_PADCTL_USB2_OTG_PAD_CTL1_HS_IREF_CAP_MASK@GOTPAGEOFF]
Lloh62:
	ldr	w10, [x10]
Lloh63:
	adrp	x11, _XUSB_PADCTL_USB2_OTG_PAD_CTL1_HS_IREF_CAP_SHIFT@GOTPAGE
Lloh64:
	ldr	x11, [x11, _XUSB_PADCTL_USB2_OTG_PAD_CTL1_HS_IREF_CAP_SHIFT@GOTPAGEOFF]
Lloh65:
	ldr	w11, [x11]
	lsl	w10, w10, w11
Lloh66:
	adrp	x12, _XUSB_PADCTL_USB2_OTG_PAD_CTL1_PD_DR@GOTPAGE
Lloh67:
	ldr	x12, [x12, _XUSB_PADCTL_USB2_OTG_PAD_CTL1_PD_DR@GOTPAGEOFF]
	orr	w8, w10, w8
Lloh68:
	ldr	w10, [x12]
	orr	w8, w8, w10
Lloh69:
	adrp	x10, _XUSB_PADCTL_USB2_OTG_PAD_CTL1_PD_CHRP_FORCE_POWERUP@GOTPAGE
Lloh70:
	ldr	x10, [x10, _XUSB_PADCTL_USB2_OTG_PAD_CTL1_PD_CHRP_FORCE_POWERUP@GOTPAGEOFF]
Lloh71:
	ldr	w10, [x10]
	orr	w8, w8, w10
Lloh72:
	adrp	x10, _XUSB_PADCTL_USB2_OTG_PAD_CTL1_PD_DISC_FORCE_POWERUP@GOTPAGE
Lloh73:
	ldr	x10, [x10, _XUSB_PADCTL_USB2_OTG_PAD_CTL1_PD_DISC_FORCE_POWERUP@GOTPAGEOFF]
Lloh74:
	ldr	w10, [x10]
	orr	w8, w8, w10
	bic	w8, w0, w8
	ldp	w10, w12, [x23, #16]
	lsl	w9, w10, w9
	lsl	w10, w12, w11
	orr	w9, w10, w9
	orr	w23, w9, w8
	mov	x0, x21
	bl	_XUSB_PADCTL_USB2_OTG_PADX_CTL1
	mov	x2, x0
	mov	x0, x20
	mov	x1, x23
	bl	_padctl_writel
	ldr	w0, [x22]
	bl	_regulator_enable
	cbnz	w0, LBB0_6
; %bb.2:
	mov	x0, x19
	bl	_mutex_lock
	ldr	w8, [x19, #4]
	add	w9, w8, #1
	str	w9, [x19, #4]
	cmp	w8, #0
	b.gt	LBB0_4
; %bb.3:
	ldr	w1, [x26]
	mov	x0, x20
	bl	_padctl_readl
Lloh75:
	adrp	x8, _XUSB_PADCTL_USB2_BIAS_PAD_CTL0_PD@GOTPAGE
Lloh76:
	ldr	x8, [x8, _XUSB_PADCTL_USB2_BIAS_PAD_CTL0_PD@GOTPAGEOFF]
Lloh77:
	ldr	w8, [x8]
	bic	w1, w0, w8
	ldr	w2, [x26]
	mov	x0, x20
	bl	_padctl_writel
LBB0_4:
	mov	x0, x19
	bl	_mutex_unlock
	mov	w0, #0
	b	LBB0_6
LBB0_5:
Lloh78:
	adrp	x1, l_.str@PAGE
Lloh79:
	add	x1, x1, l_.str@PAGEOFF
	mov	x0, x23
	mov	x2, x21
	bl	_dev_err
Lloh80:
	adrp	x8, _ENODEV@GOTPAGE
Lloh81:
	ldr	x8, [x8, _ENODEV@GOTPAGEOFF]
Lloh82:
	ldr	w8, [x8]
	neg	w0, w8
LBB0_6:
	ldp	x29, x30, [sp, #80]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #64]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #48]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #32]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #16]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp], #96             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh72, Lloh73, Lloh74
	.loh AdrpLdrGotLdr	Lloh69, Lloh70, Lloh71
	.loh AdrpLdrGotLdr	Lloh66, Lloh67, Lloh68
	.loh AdrpLdrGotLdr	Lloh63, Lloh64, Lloh65
	.loh AdrpLdrGotLdr	Lloh60, Lloh61, Lloh62
	.loh AdrpLdrGotLdr	Lloh56, Lloh57, Lloh59
	.loh AdrpLdrGotLdr	Lloh54, Lloh55, Lloh58
	.loh AdrpLdrGotLdr	Lloh51, Lloh52, Lloh53
	.loh AdrpLdrGotLdr	Lloh48, Lloh49, Lloh50
	.loh AdrpLdrGotLdr	Lloh45, Lloh46, Lloh47
	.loh AdrpLdrGotLdr	Lloh42, Lloh43, Lloh44
	.loh AdrpLdrGot	Lloh40, Lloh41
	.loh AdrpLdrGotLdr	Lloh37, Lloh38, Lloh39
	.loh AdrpLdrGotLdr	Lloh34, Lloh35, Lloh36
	.loh AdrpLdrGotLdr	Lloh31, Lloh32, Lloh33
	.loh AdrpLdrGotLdr	Lloh28, Lloh29, Lloh30
	.loh AdrpLdrGotLdr	Lloh25, Lloh26, Lloh27
	.loh AdrpLdrGotLdr	Lloh22, Lloh23, Lloh24
	.loh AdrpLdrGotLdr	Lloh19, Lloh20, Lloh21
	.loh AdrpLdrGot	Lloh17, Lloh18
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh16
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh75, Lloh76, Lloh77
	.loh AdrpLdrGotLdr	Lloh80, Lloh81, Lloh82
	.loh AdrpAdd	Lloh78, Lloh79
	.cfi_endproc
                                        ; -- End function
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"no port found for USB2 lane %u\n"

	.comm	_ENODEV,4,2                     ; @ENODEV
	.comm	_XUSB_PADCTL_USB2_BIAS_PAD_CTL0,4,2 ; @XUSB_PADCTL_USB2_BIAS_PAD_CTL0
	.comm	_XUSB_PADCTL_USB2_BIAS_PAD_CTL0_HS_SQUELCH_LEVEL_MASK,4,2 ; @XUSB_PADCTL_USB2_BIAS_PAD_CTL0_HS_SQUELCH_LEVEL_MASK
	.comm	_XUSB_PADCTL_USB2_BIAS_PAD_CTL0_HS_SQUELCH_LEVEL_SHIFT,4,2 ; @XUSB_PADCTL_USB2_BIAS_PAD_CTL0_HS_SQUELCH_LEVEL_SHIFT
	.comm	_XUSB_PADCTL_USB2_BIAS_PAD_CTL0_HS_DISCON_LEVEL_MASK,4,2 ; @XUSB_PADCTL_USB2_BIAS_PAD_CTL0_HS_DISCON_LEVEL_MASK
	.comm	_XUSB_PADCTL_USB2_BIAS_PAD_CTL0_HS_DISCON_LEVEL_SHIFT,4,2 ; @XUSB_PADCTL_USB2_BIAS_PAD_CTL0_HS_DISCON_LEVEL_SHIFT
	.comm	_XUSB_PADCTL_USB2_BIAS_PAD_CTL0_HS_DISCON_LEVEL_VAL,4,2 ; @XUSB_PADCTL_USB2_BIAS_PAD_CTL0_HS_DISCON_LEVEL_VAL
	.comm	_XUSB_PADCTL_USB2_PORT_CAP,4,2  ; @XUSB_PADCTL_USB2_PORT_CAP
	.comm	_XUSB_PADCTL_USB2_PORT_CAP_PORT_CAP_MASK,4,2 ; @XUSB_PADCTL_USB2_PORT_CAP_PORT_CAP_MASK
	.comm	_XUSB_PADCTL_USB2_PORT_CAP_HOST,4,2 ; @XUSB_PADCTL_USB2_PORT_CAP_HOST
	.comm	_XUSB_PADCTL_USB2_OTG_PAD_CTL0_HS_CURR_LEVEL_MASK,4,2 ; @XUSB_PADCTL_USB2_OTG_PAD_CTL0_HS_CURR_LEVEL_MASK
	.comm	_XUSB_PADCTL_USB2_OTG_PAD_CTL0_HS_CURR_LEVEL_SHIFT,4,2 ; @XUSB_PADCTL_USB2_OTG_PAD_CTL0_HS_CURR_LEVEL_SHIFT
	.comm	_XUSB_PADCTL_USB2_OTG_PAD_CTL0_HS_SLEW_MASK,4,2 ; @XUSB_PADCTL_USB2_OTG_PAD_CTL0_HS_SLEW_MASK
	.comm	_XUSB_PADCTL_USB2_OTG_PAD_CTL0_HS_SLEW_SHIFT,4,2 ; @XUSB_PADCTL_USB2_OTG_PAD_CTL0_HS_SLEW_SHIFT
	.comm	_XUSB_PADCTL_USB2_OTG_PAD_CTL0_LS_RSLEW_MASK,4,2 ; @XUSB_PADCTL_USB2_OTG_PAD_CTL0_LS_RSLEW_MASK
	.comm	_XUSB_PADCTL_USB2_OTG_PAD_CTL0_LS_RSLEW_SHIFT,4,2 ; @XUSB_PADCTL_USB2_OTG_PAD_CTL0_LS_RSLEW_SHIFT
	.comm	_XUSB_PADCTL_USB2_OTG_PAD_CTL0_PD,4,2 ; @XUSB_PADCTL_USB2_OTG_PAD_CTL0_PD
	.comm	_XUSB_PADCTL_USB2_OTG_PAD_CTL0_PD2,4,2 ; @XUSB_PADCTL_USB2_OTG_PAD_CTL0_PD2
	.comm	_XUSB_PADCTL_USB2_OTG_PAD_CTL0_PD_ZI,4,2 ; @XUSB_PADCTL_USB2_OTG_PAD_CTL0_PD_ZI
	.comm	_XUSB_PADCTL_USB2_OTG_PAD_CTL0_HS_SLEW_VAL,4,2 ; @XUSB_PADCTL_USB2_OTG_PAD_CTL0_HS_SLEW_VAL
	.comm	_XUSB_PADCTL_USB2_OTG_PAD_CTL1_TERM_RANGE_ADJ_MASK,4,2 ; @XUSB_PADCTL_USB2_OTG_PAD_CTL1_TERM_RANGE_ADJ_MASK
	.comm	_XUSB_PADCTL_USB2_OTG_PAD_CTL1_TERM_RANGE_ADJ_SHIFT,4,2 ; @XUSB_PADCTL_USB2_OTG_PAD_CTL1_TERM_RANGE_ADJ_SHIFT
	.comm	_XUSB_PADCTL_USB2_OTG_PAD_CTL1_HS_IREF_CAP_MASK,4,2 ; @XUSB_PADCTL_USB2_OTG_PAD_CTL1_HS_IREF_CAP_MASK
	.comm	_XUSB_PADCTL_USB2_OTG_PAD_CTL1_HS_IREF_CAP_SHIFT,4,2 ; @XUSB_PADCTL_USB2_OTG_PAD_CTL1_HS_IREF_CAP_SHIFT
	.comm	_XUSB_PADCTL_USB2_OTG_PAD_CTL1_PD_DR,4,2 ; @XUSB_PADCTL_USB2_OTG_PAD_CTL1_PD_DR
	.comm	_XUSB_PADCTL_USB2_OTG_PAD_CTL1_PD_CHRP_FORCE_POWERUP,4,2 ; @XUSB_PADCTL_USB2_OTG_PAD_CTL1_PD_CHRP_FORCE_POWERUP
	.comm	_XUSB_PADCTL_USB2_OTG_PAD_CTL1_PD_DISC_FORCE_POWERUP,4,2 ; @XUSB_PADCTL_USB2_OTG_PAD_CTL1_PD_DISC_FORCE_POWERUP
	.comm	_XUSB_PADCTL_USB2_BIAS_PAD_CTL0_PD,4,2 ; @XUSB_PADCTL_USB2_BIAS_PAD_CTL0_PD
	.no_dead_strip	_tegra124_usb2_phy_power_on
.subsections_via_symbols
