	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function il3945_rx_init
_il3945_rx_init:                        ## @il3945_rx_init
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r14
	pushq	%rbx
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	movq	%rsi, %rbx
	movq	%rdi, %r14
	xorl	%edi, %edi
	callq	_FH39_RCSR_RBD_BASE
	movl	(%rbx), %edx
	movq	%r14, %rdi
	movl	%eax, %esi
	callq	_il_wr
	xorl	%edi, %edi
	callq	_FH39_RCSR_RPTR_ADDR
	movl	4(%rbx), %edx
	movq	%r14, %rdi
	movl	%eax, %esi
	callq	_il_wr
	xorl	%edi, %edi
	callq	_FH39_RCSR_WPTR
	movq	%r14, %rdi
	movl	%eax, %esi
	xorl	%edx, %edx
	callq	_il_wr
	xorl	%edi, %edi
	callq	_FH39_RCSR_CONFIG
	movq	_FH39_RCSR_RX_CONFIG_REG_VAL_DMA_CHNL_EN_ENABLE@GOTPCREL(%rip), %rcx
	movq	_FH39_RCSR_RX_CONFIG_REG_VAL_RDRBD_EN_ENABLE@GOTPCREL(%rip), %rdx
	movl	(%rdx), %esi
	orl	(%rcx), %esi
	movq	_FH39_RCSR_RX_CONFIG_REG_BIT_WR_STTS_EN@GOTPCREL(%rip), %rcx
	orl	(%rcx), %esi
	movq	_FH39_RCSR_RX_CONFIG_REG_VAL_MAX_FRAG_SIZE_128@GOTPCREL(%rip), %rdi
	movq	_FH39_RCSR_RX_CONFIG_REG_POS_RBDC_SIZE@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	movq	_RX_QUEUE_SIZE_LOG@GOTPCREL(%rip), %rdx
	movl	(%rdx), %edx
	shll	%cl, %edx
	orl	(%rdi), %esi
	orl	%esi, %edx
	movq	_FH39_RCSR_RX_CONFIG_REG_VAL_IRQ_DEST_INT_HOST@GOTPCREL(%rip), %rcx
	orl	(%rcx), %edx
	movq	_FH39_RCSR_RX_CONFIG_REG_POS_IRQ_RBTH@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	btsl	%ecx, %edx
	movq	_FH39_RCSR_RX_CONFIG_REG_VAL_MSG_MODE_FH@GOTPCREL(%rip), %rcx
	orl	(%rcx), %edx
	movq	%r14, %rdi
	movl	%eax, %esi
	callq	_il_wr
	movq	_FH39_RSSR_CTRL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	callq	_il_rd
	xorl	%eax, %eax
	popq	%rbx
	popq	%r14
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_FH39_RCSR_RX_CONFIG_REG_VAL_DMA_CHNL_EN_ENABLE,4,2 ## @FH39_RCSR_RX_CONFIG_REG_VAL_DMA_CHNL_EN_ENABLE
	.comm	_FH39_RCSR_RX_CONFIG_REG_VAL_RDRBD_EN_ENABLE,4,2 ## @FH39_RCSR_RX_CONFIG_REG_VAL_RDRBD_EN_ENABLE
	.comm	_FH39_RCSR_RX_CONFIG_REG_BIT_WR_STTS_EN,4,2 ## @FH39_RCSR_RX_CONFIG_REG_BIT_WR_STTS_EN
	.comm	_FH39_RCSR_RX_CONFIG_REG_VAL_MAX_FRAG_SIZE_128,4,2 ## @FH39_RCSR_RX_CONFIG_REG_VAL_MAX_FRAG_SIZE_128
	.comm	_RX_QUEUE_SIZE_LOG,4,2          ## @RX_QUEUE_SIZE_LOG
	.comm	_FH39_RCSR_RX_CONFIG_REG_POS_RBDC_SIZE,4,2 ## @FH39_RCSR_RX_CONFIG_REG_POS_RBDC_SIZE
	.comm	_FH39_RCSR_RX_CONFIG_REG_VAL_IRQ_DEST_INT_HOST,4,2 ## @FH39_RCSR_RX_CONFIG_REG_VAL_IRQ_DEST_INT_HOST
	.comm	_FH39_RCSR_RX_CONFIG_REG_POS_IRQ_RBTH,4,2 ## @FH39_RCSR_RX_CONFIG_REG_POS_IRQ_RBTH
	.comm	_FH39_RCSR_RX_CONFIG_REG_VAL_MSG_MODE_FH,4,2 ## @FH39_RCSR_RX_CONFIG_REG_VAL_MSG_MODE_FH
	.comm	_FH39_RSSR_CTRL,4,2             ## @FH39_RSSR_CTRL
	.no_dead_strip	_il3945_rx_init
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function il3945_rx_init
_il3945_rx_init:                        ; @il3945_rx_init
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x20, x1
	mov	x19, x0
	mov	w0, #0
	bl	_FH39_RCSR_RBD_BASE
	mov	x1, x0
	ldr	w2, [x20]
	mov	x0, x19
	bl	_il_wr
	mov	w0, #0
	bl	_FH39_RCSR_RPTR_ADDR
	mov	x1, x0
	ldr	w2, [x20, #4]
	mov	x0, x19
	bl	_il_wr
	mov	w0, #0
	bl	_FH39_RCSR_WPTR
	mov	x1, x0
	mov	x0, x19
	mov	w2, #0
	bl	_il_wr
	mov	w0, #0
	bl	_FH39_RCSR_CONFIG
	mov	x1, x0
Lloh0:
	adrp	x8, _FH39_RCSR_RX_CONFIG_REG_VAL_DMA_CHNL_EN_ENABLE@GOTPAGE
Lloh1:
	ldr	x8, [x8, _FH39_RCSR_RX_CONFIG_REG_VAL_DMA_CHNL_EN_ENABLE@GOTPAGEOFF]
Lloh2:
	ldr	w8, [x8]
Lloh3:
	adrp	x9, _FH39_RCSR_RX_CONFIG_REG_VAL_RDRBD_EN_ENABLE@GOTPAGE
Lloh4:
	ldr	x9, [x9, _FH39_RCSR_RX_CONFIG_REG_VAL_RDRBD_EN_ENABLE@GOTPAGEOFF]
Lloh5:
	ldr	w9, [x9]
	orr	w8, w9, w8
Lloh6:
	adrp	x9, _FH39_RCSR_RX_CONFIG_REG_BIT_WR_STTS_EN@GOTPAGE
Lloh7:
	ldr	x9, [x9, _FH39_RCSR_RX_CONFIG_REG_BIT_WR_STTS_EN@GOTPAGEOFF]
Lloh8:
	ldr	w9, [x9]
	orr	w8, w8, w9
Lloh9:
	adrp	x9, _FH39_RCSR_RX_CONFIG_REG_VAL_MAX_FRAG_SIZE_128@GOTPAGE
Lloh10:
	ldr	x9, [x9, _FH39_RCSR_RX_CONFIG_REG_VAL_MAX_FRAG_SIZE_128@GOTPAGEOFF]
Lloh11:
	ldr	w9, [x9]
	orr	w8, w8, w9
Lloh12:
	adrp	x9, _RX_QUEUE_SIZE_LOG@GOTPAGE
Lloh13:
	ldr	x9, [x9, _RX_QUEUE_SIZE_LOG@GOTPAGEOFF]
Lloh14:
	adrp	x10, _FH39_RCSR_RX_CONFIG_REG_POS_RBDC_SIZE@GOTPAGE
Lloh15:
	ldr	x10, [x10, _FH39_RCSR_RX_CONFIG_REG_POS_RBDC_SIZE@GOTPAGEOFF]
Lloh16:
	ldr	w9, [x9]
Lloh17:
	ldr	w10, [x10]
	lsl	w9, w9, w10
	orr	w8, w8, w9
Lloh18:
	adrp	x9, _FH39_RCSR_RX_CONFIG_REG_VAL_IRQ_DEST_INT_HOST@GOTPAGE
Lloh19:
	ldr	x9, [x9, _FH39_RCSR_RX_CONFIG_REG_VAL_IRQ_DEST_INT_HOST@GOTPAGEOFF]
Lloh20:
	ldr	w9, [x9]
	orr	w8, w8, w9
Lloh21:
	adrp	x9, _FH39_RCSR_RX_CONFIG_REG_POS_IRQ_RBTH@GOTPAGE
Lloh22:
	ldr	x9, [x9, _FH39_RCSR_RX_CONFIG_REG_POS_IRQ_RBTH@GOTPAGEOFF]
Lloh23:
	ldr	w9, [x9]
	mov	w10, #1
	lsl	w9, w10, w9
	orr	w8, w8, w9
Lloh24:
	adrp	x9, _FH39_RCSR_RX_CONFIG_REG_VAL_MSG_MODE_FH@GOTPAGE
Lloh25:
	ldr	x9, [x9, _FH39_RCSR_RX_CONFIG_REG_VAL_MSG_MODE_FH@GOTPAGEOFF]
Lloh26:
	ldr	w9, [x9]
	orr	w2, w8, w9
	mov	x0, x19
	bl	_il_wr
Lloh27:
	adrp	x8, _FH39_RSSR_CTRL@GOTPAGE
Lloh28:
	ldr	x8, [x8, _FH39_RSSR_CTRL@GOTPAGEOFF]
Lloh29:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_il_rd
	mov	w0, #0
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh27, Lloh28, Lloh29
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh17
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh16
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_FH39_RCSR_RX_CONFIG_REG_VAL_DMA_CHNL_EN_ENABLE,4,2 ; @FH39_RCSR_RX_CONFIG_REG_VAL_DMA_CHNL_EN_ENABLE
	.comm	_FH39_RCSR_RX_CONFIG_REG_VAL_RDRBD_EN_ENABLE,4,2 ; @FH39_RCSR_RX_CONFIG_REG_VAL_RDRBD_EN_ENABLE
	.comm	_FH39_RCSR_RX_CONFIG_REG_BIT_WR_STTS_EN,4,2 ; @FH39_RCSR_RX_CONFIG_REG_BIT_WR_STTS_EN
	.comm	_FH39_RCSR_RX_CONFIG_REG_VAL_MAX_FRAG_SIZE_128,4,2 ; @FH39_RCSR_RX_CONFIG_REG_VAL_MAX_FRAG_SIZE_128
	.comm	_RX_QUEUE_SIZE_LOG,4,2          ; @RX_QUEUE_SIZE_LOG
	.comm	_FH39_RCSR_RX_CONFIG_REG_POS_RBDC_SIZE,4,2 ; @FH39_RCSR_RX_CONFIG_REG_POS_RBDC_SIZE
	.comm	_FH39_RCSR_RX_CONFIG_REG_VAL_IRQ_DEST_INT_HOST,4,2 ; @FH39_RCSR_RX_CONFIG_REG_VAL_IRQ_DEST_INT_HOST
	.comm	_FH39_RCSR_RX_CONFIG_REG_POS_IRQ_RBTH,4,2 ; @FH39_RCSR_RX_CONFIG_REG_POS_IRQ_RBTH
	.comm	_FH39_RCSR_RX_CONFIG_REG_VAL_MSG_MODE_FH,4,2 ; @FH39_RCSR_RX_CONFIG_REG_VAL_MSG_MODE_FH
	.comm	_FH39_RSSR_CTRL,4,2             ; @FH39_RSSR_CTRL
	.no_dead_strip	_il3945_rx_init
.subsections_via_symbols
