	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function mvpp2_prs_ip4_cast
_mvpp2_prs_ip4_cast:                    ## @mvpp2_prs_ip4_cast
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%esi, %r15d
	movq	%rdi, %r14
	movq	_MVPP2_PE_FIRST_FREE_TID@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_MVPP2_PE_LAST_FREE_TID@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	callq	_mvpp2_prs_tcam_first_free
	movl	%eax, %ebx
	testl	%eax, %eax
	js	LBB0_7
## %bb.1:
	leaq	-48(%rbp), %r12
	movq	%r12, %rdi
	xorl	%esi, %esi
	movl	$4, %edx
	callq	_memset
	movq	_MVPP2_PRS_LU_IP4@GOTPCREL(%rip), %r13
	movl	(%r13), %esi
	movq	%r12, %rdi
	callq	_mvpp2_prs_tcam_lu_set
	movl	%ebx, -48(%rbp)
	movzwl	%r15w, %eax
	cmpl	$129, %eax
	je	LBB0_5
## %bb.2:
	cmpl	$128, %eax
	jne	LBB0_4
## %bb.3:
	movq	_MVPP2_PRS_IPV4_MC@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	_MVPP2_PRS_IPV4_MC_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	leaq	-48(%rbp), %rdi
	xorl	%esi, %esi
	callq	_mvpp2_prs_tcam_data_byte_set
	movq	_MVPP2_PRS_RI_L3_MCAST@GOTPCREL(%rip), %rax
	jmp	LBB0_6
LBB0_5:
	movq	_MVPP2_PRS_IPV4_BC_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	leaq	-48(%rbp), %r15
	movq	%r15, %rdi
	xorl	%esi, %esi
	movl	%ebx, %edx
	movl	%ebx, %ecx
	callq	_mvpp2_prs_tcam_data_byte_set
	movq	%r15, %rdi
	movl	$1, %esi
	movl	%ebx, %edx
	movl	%ebx, %ecx
	callq	_mvpp2_prs_tcam_data_byte_set
	movq	%r15, %rdi
	movl	$2, %esi
	movl	%ebx, %edx
	movl	%ebx, %ecx
	callq	_mvpp2_prs_tcam_data_byte_set
	movq	%r15, %rdi
	movl	$3, %esi
	movl	%ebx, %edx
	movl	%ebx, %ecx
	callq	_mvpp2_prs_tcam_data_byte_set
	movq	_MVPP2_PRS_RI_L3_BCAST@GOTPCREL(%rip), %rax
LBB0_6:
	movl	(%rax), %esi
	movq	_MVPP2_PRS_RI_L3_ADDR_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	leaq	-48(%rbp), %rbx
	movq	%rbx, %rdi
	callq	_mvpp2_prs_sram_ri_update
	movq	_MVPP2_PRS_LU_FLOWS@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_mvpp2_prs_sram_next_lu_set
	movq	_MVPP2_PRS_SRAM_LU_GEN_BIT@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	movl	$1, %edx
	callq	_mvpp2_prs_sram_bits_set
	movq	_MVPP2_PRS_IPV4_DIP_AI_BIT@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	movl	%edx, %esi
	callq	_mvpp2_prs_tcam_ai_update
	movq	_MVPP2_PRS_PORT_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_mvpp2_prs_tcam_port_map_set
	movl	-48(%rbp), %esi
	movl	(%r13), %edx
	movq	%r14, %rdi
	callq	_mvpp2_prs_shadow_set
	movq	%r14, %rdi
	movq	%rbx, %rsi
	callq	_mvpp2_prs_hw_write
	xorl	%ebx, %ebx
	jmp	LBB0_7
LBB0_4:
	movq	_EINVAL@GOTPCREL(%rip), %rax
	xorl	%ebx, %ebx
	subl	(%rax), %ebx
LBB0_7:
	movl	%ebx, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_MVPP2_PE_FIRST_FREE_TID,4,2    ## @MVPP2_PE_FIRST_FREE_TID
	.comm	_MVPP2_PE_LAST_FREE_TID,4,2     ## @MVPP2_PE_LAST_FREE_TID
	.comm	_MVPP2_PRS_LU_IP4,4,2           ## @MVPP2_PRS_LU_IP4
	.comm	_MVPP2_PRS_IPV4_MC,4,2          ## @MVPP2_PRS_IPV4_MC
	.comm	_MVPP2_PRS_IPV4_MC_MASK,4,2     ## @MVPP2_PRS_IPV4_MC_MASK
	.comm	_MVPP2_PRS_RI_L3_MCAST,4,2      ## @MVPP2_PRS_RI_L3_MCAST
	.comm	_MVPP2_PRS_RI_L3_ADDR_MASK,4,2  ## @MVPP2_PRS_RI_L3_ADDR_MASK
	.comm	_MVPP2_PRS_IPV4_BC_MASK,4,2     ## @MVPP2_PRS_IPV4_BC_MASK
	.comm	_MVPP2_PRS_RI_L3_BCAST,4,2      ## @MVPP2_PRS_RI_L3_BCAST
	.comm	_EINVAL,4,2                     ## @EINVAL
	.comm	_MVPP2_PRS_LU_FLOWS,4,2         ## @MVPP2_PRS_LU_FLOWS
	.comm	_MVPP2_PRS_SRAM_LU_GEN_BIT,4,2  ## @MVPP2_PRS_SRAM_LU_GEN_BIT
	.comm	_MVPP2_PRS_IPV4_DIP_AI_BIT,4,2  ## @MVPP2_PRS_IPV4_DIP_AI_BIT
	.comm	_MVPP2_PRS_PORT_MASK,4,2        ## @MVPP2_PRS_PORT_MASK
	.no_dead_strip	_mvpp2_prs_ip4_cast
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function mvpp2_prs_ip4_cast
_mvpp2_prs_ip4_cast:                    ; @mvpp2_prs_ip4_cast
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #64
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x20, x1
	mov	x19, x0
Lloh0:
	adrp	x8, _MVPP2_PE_FIRST_FREE_TID@GOTPAGE
Lloh1:
	ldr	x8, [x8, _MVPP2_PE_FIRST_FREE_TID@GOTPAGEOFF]
Lloh2:
	ldr	w1, [x8]
Lloh3:
	adrp	x8, _MVPP2_PE_LAST_FREE_TID@GOTPAGE
Lloh4:
	ldr	x8, [x8, _MVPP2_PE_LAST_FREE_TID@GOTPAGEOFF]
Lloh5:
	ldr	w2, [x8]
	bl	_mvpp2_prs_tcam_first_free
	mov	x21, x0
	tbnz	w0, #31, LBB0_7
; %bb.1:
	add	x0, sp, #8
	mov	w1, #0
	mov	w2, #4
	bl	_memset
Lloh6:
	adrp	x22, _MVPP2_PRS_LU_IP4@GOTPAGE
Lloh7:
	ldr	x22, [x22, _MVPP2_PRS_LU_IP4@GOTPAGEOFF]
	ldr	w1, [x22]
	add	x0, sp, #8
	bl	_mvpp2_prs_tcam_lu_set
	str	w21, [sp, #8]
	cmp	w20, #129
	b.eq	LBB0_4
; %bb.2:
	cmp	w20, #128
	b.ne	LBB0_6
; %bb.3:
Lloh8:
	adrp	x8, _MVPP2_PRS_IPV4_MC@GOTPAGE
Lloh9:
	ldr	x8, [x8, _MVPP2_PRS_IPV4_MC@GOTPAGEOFF]
Lloh10:
	ldr	w2, [x8]
Lloh11:
	adrp	x8, _MVPP2_PRS_IPV4_MC_MASK@GOTPAGE
Lloh12:
	ldr	x8, [x8, _MVPP2_PRS_IPV4_MC_MASK@GOTPAGEOFF]
Lloh13:
	ldr	w3, [x8]
	add	x0, sp, #8
	mov	w1, #0
	bl	_mvpp2_prs_tcam_data_byte_set
Lloh14:
	adrp	x8, _MVPP2_PRS_RI_L3_MCAST@GOTPAGE
Lloh15:
	ldr	x8, [x8, _MVPP2_PRS_RI_L3_MCAST@GOTPAGEOFF]
	b	LBB0_5
LBB0_4:
Lloh16:
	adrp	x8, _MVPP2_PRS_IPV4_BC_MASK@GOTPAGE
Lloh17:
	ldr	x8, [x8, _MVPP2_PRS_IPV4_BC_MASK@GOTPAGEOFF]
Lloh18:
	ldr	w20, [x8]
	add	x0, sp, #8
	mov	w1, #0
	mov	x2, x20
	mov	x3, x20
	bl	_mvpp2_prs_tcam_data_byte_set
	add	x0, sp, #8
	mov	w1, #1
	mov	x2, x20
	mov	x3, x20
	bl	_mvpp2_prs_tcam_data_byte_set
	add	x0, sp, #8
	mov	w1, #2
	mov	x2, x20
	mov	x3, x20
	bl	_mvpp2_prs_tcam_data_byte_set
	add	x0, sp, #8
	mov	w1, #3
	mov	x2, x20
	mov	x3, x20
	bl	_mvpp2_prs_tcam_data_byte_set
Lloh19:
	adrp	x8, _MVPP2_PRS_RI_L3_BCAST@GOTPAGE
Lloh20:
	ldr	x8, [x8, _MVPP2_PRS_RI_L3_BCAST@GOTPAGEOFF]
LBB0_5:
	ldr	w1, [x8]
Lloh21:
	adrp	x8, _MVPP2_PRS_RI_L3_ADDR_MASK@GOTPAGE
Lloh22:
	ldr	x8, [x8, _MVPP2_PRS_RI_L3_ADDR_MASK@GOTPAGEOFF]
Lloh23:
	ldr	w2, [x8]
	add	x0, sp, #8
	bl	_mvpp2_prs_sram_ri_update
Lloh24:
	adrp	x8, _MVPP2_PRS_LU_FLOWS@GOTPAGE
Lloh25:
	ldr	x8, [x8, _MVPP2_PRS_LU_FLOWS@GOTPAGEOFF]
Lloh26:
	ldr	w1, [x8]
	add	x0, sp, #8
	bl	_mvpp2_prs_sram_next_lu_set
Lloh27:
	adrp	x8, _MVPP2_PRS_SRAM_LU_GEN_BIT@GOTPAGE
Lloh28:
	ldr	x8, [x8, _MVPP2_PRS_SRAM_LU_GEN_BIT@GOTPAGEOFF]
Lloh29:
	ldr	w1, [x8]
	add	x0, sp, #8
	mov	w2, #1
	bl	_mvpp2_prs_sram_bits_set
Lloh30:
	adrp	x8, _MVPP2_PRS_IPV4_DIP_AI_BIT@GOTPAGE
Lloh31:
	ldr	x8, [x8, _MVPP2_PRS_IPV4_DIP_AI_BIT@GOTPAGEOFF]
Lloh32:
	ldr	w1, [x8]
	add	x0, sp, #8
	mov	x2, x1
	bl	_mvpp2_prs_tcam_ai_update
Lloh33:
	adrp	x8, _MVPP2_PRS_PORT_MASK@GOTPAGE
Lloh34:
	ldr	x8, [x8, _MVPP2_PRS_PORT_MASK@GOTPAGEOFF]
Lloh35:
	ldr	w1, [x8]
	add	x0, sp, #8
	bl	_mvpp2_prs_tcam_port_map_set
	ldr	w1, [sp, #8]
	ldr	w2, [x22]
	mov	x0, x19
	bl	_mvpp2_prs_shadow_set
	add	x1, sp, #8
	mov	x0, x19
	bl	_mvpp2_prs_hw_write
	mov	w21, #0
	b	LBB0_7
LBB0_6:
Lloh36:
	adrp	x8, _EINVAL@GOTPAGE
Lloh37:
	ldr	x8, [x8, _EINVAL@GOTPAGEOFF]
Lloh38:
	ldr	w8, [x8]
	neg	w21, w8
LBB0_7:
	mov	x0, x21
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #64
	ret
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGot	Lloh6, Lloh7
	.loh AdrpLdrGot	Lloh14, Lloh15
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGot	Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh16, Lloh17, Lloh18
	.loh AdrpLdrGotLdr	Lloh33, Lloh34, Lloh35
	.loh AdrpLdrGotLdr	Lloh30, Lloh31, Lloh32
	.loh AdrpLdrGotLdr	Lloh27, Lloh28, Lloh29
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh36, Lloh37, Lloh38
	.cfi_endproc
                                        ; -- End function
	.comm	_MVPP2_PE_FIRST_FREE_TID,4,2    ; @MVPP2_PE_FIRST_FREE_TID
	.comm	_MVPP2_PE_LAST_FREE_TID,4,2     ; @MVPP2_PE_LAST_FREE_TID
	.comm	_MVPP2_PRS_LU_IP4,4,2           ; @MVPP2_PRS_LU_IP4
	.comm	_MVPP2_PRS_IPV4_MC,4,2          ; @MVPP2_PRS_IPV4_MC
	.comm	_MVPP2_PRS_IPV4_MC_MASK,4,2     ; @MVPP2_PRS_IPV4_MC_MASK
	.comm	_MVPP2_PRS_RI_L3_MCAST,4,2      ; @MVPP2_PRS_RI_L3_MCAST
	.comm	_MVPP2_PRS_RI_L3_ADDR_MASK,4,2  ; @MVPP2_PRS_RI_L3_ADDR_MASK
	.comm	_MVPP2_PRS_IPV4_BC_MASK,4,2     ; @MVPP2_PRS_IPV4_BC_MASK
	.comm	_MVPP2_PRS_RI_L3_BCAST,4,2      ; @MVPP2_PRS_RI_L3_BCAST
	.comm	_EINVAL,4,2                     ; @EINVAL
	.comm	_MVPP2_PRS_LU_FLOWS,4,2         ; @MVPP2_PRS_LU_FLOWS
	.comm	_MVPP2_PRS_SRAM_LU_GEN_BIT,4,2  ; @MVPP2_PRS_SRAM_LU_GEN_BIT
	.comm	_MVPP2_PRS_IPV4_DIP_AI_BIT,4,2  ; @MVPP2_PRS_IPV4_DIP_AI_BIT
	.comm	_MVPP2_PRS_PORT_MASK,4,2        ; @MVPP2_PRS_PORT_MASK
	.no_dead_strip	_mvpp2_prs_ip4_cast
.subsections_via_symbols
