	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function pcie_write_mrrs
_pcie_write_mrrs:                       ## @pcie_write_mrrs
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	_pcie_bus_config@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	movq	_PCIE_BUS_PERFORMANCE@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jne	LBB0_10
## %bb.1:
	movq	%rdi, %r14
	callq	_pcie_get_mps
	movl	%eax, %r12d
	movq	%r14, %rdi
	callq	_pcie_get_readrq
	cmpl	$128, %r12d
	jl	LBB0_2
## %bb.3:
	cmpl	%eax, %r12d
	je	LBB0_4
## %bb.5:
	leaq	L_.str(%rip), %r15
	.p2align	4, 0x90
LBB0_6:                                 ## =>This Inner Loop Header: Depth=1
	movq	%r14, %rdi
	movl	%r12d, %esi
	callq	_pcie_set_readrq
	testl	%eax, %eax
	je	LBB0_10
## %bb.7:                               ##   in Loop: Header=BB0_6 Depth=1
	movq	%r14, %rdi
	movq	%r15, %rsi
	callq	_pci_warn
	movl	%r12d, %ebx
	shrl	%ebx
	movq	%r14, %rdi
	callq	_pcie_get_readrq
	cmpl	$256, %r12d                     ## imm = 0x100
	jb	LBB0_9
## %bb.8:                               ##   in Loop: Header=BB0_6 Depth=1
	movl	%ebx, %r12d
	cmpl	%eax, %ebx
	jne	LBB0_6
	jmp	LBB0_9
LBB0_2:
	movl	%r12d, %ebx
LBB0_9:
	cmpl	$127, %ebx
	jg	LBB0_10
LBB0_11:
	leaq	L_.str.1(%rip), %rsi
	movq	%r14, %rdi
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_pci_err                        ## TAILCALL
LBB0_4:
	movl	%r12d, %ebx
	cmpl	$127, %ebx
	jle	LBB0_11
LBB0_10:
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_pcie_bus_config,8,3            ## @pcie_bus_config
	.comm	_PCIE_BUS_PERFORMANCE,8,3       ## @PCIE_BUS_PERFORMANCE
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"Failed attempting to set the MRRS\n"

L_.str.1:                               ## @.str.1
	.asciz	"MRRS was unable to be configured with a safe value.  If problems are experienced, try running with pci=pcie_bus_safe\n"

	.no_dead_strip	_pcie_write_mrrs
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function pcie_write_mrrs
_pcie_write_mrrs:                       ; @pcie_write_mrrs
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
Lloh0:
	adrp	x8, _pcie_bus_config@GOTPAGE
Lloh1:
	ldr	x8, [x8, _pcie_bus_config@GOTPAGEOFF]
Lloh2:
	ldr	x8, [x8]
Lloh3:
	adrp	x9, _PCIE_BUS_PERFORMANCE@GOTPAGE
Lloh4:
	ldr	x9, [x9, _PCIE_BUS_PERFORMANCE@GOTPAGEOFF]
Lloh5:
	ldr	x9, [x9]
	cmp	x8, x9
	b.ne	LBB0_11
; %bb.1:
	mov	x19, x0
	bl	_pcie_get_mps
	mov	x20, x0
	mov	x0, x19
	bl	_pcie_get_readrq
	cmp	w20, #128
	b.lt	LBB0_7
; %bb.2:
	cmp	w20, w0
	b.eq	LBB0_10
; %bb.3:
Lloh6:
	adrp	x21, l_.str@PAGE
Lloh7:
	add	x21, x21, l_.str@PAGEOFF
LBB0_4:                                 ; =>This Inner Loop Header: Depth=1
	mov	x0, x19
	mov	x1, x20
	bl	_pcie_set_readrq
	cbz	w0, LBB0_11
; %bb.5:                                ;   in Loop: Header=BB0_4 Depth=1
	mov	x0, x19
	mov	x1, x21
	bl	_pci_warn
	lsr	w22, w20, #1
	mov	x0, x19
	bl	_pcie_get_readrq
	cmp	w20, #256
	b.lo	LBB0_8
; %bb.6:                                ;   in Loop: Header=BB0_4 Depth=1
	mov	x20, x22
	cmp	w22, w0
	b.ne	LBB0_4
	b	LBB0_8
LBB0_7:
	mov	x22, x20
LBB0_8:
	cmp	w22, #127
	b.gt	LBB0_11
LBB0_9:
Lloh8:
	adrp	x1, l_.str.1@PAGE
Lloh9:
	add	x1, x1, l_.str.1@PAGEOFF
	mov	x0, x19
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	_pci_err
LBB0_10:
	mov	x22, x20
	cmp	w22, #127
	b.le	LBB0_9
LBB0_11:
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpAdd	Lloh6, Lloh7
	.loh AdrpAdd	Lloh8, Lloh9
	.cfi_endproc
                                        ; -- End function
	.comm	_pcie_bus_config,8,3            ; @pcie_bus_config
	.comm	_PCIE_BUS_PERFORMANCE,8,3       ; @PCIE_BUS_PERFORMANCE
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"Failed attempting to set the MRRS\n"

l_.str.1:                               ; @.str.1
	.asciz	"MRRS was unable to be configured with a safe value.  If problems are experienced, try running with pci=pcie_bus_safe\n"

	.no_dead_strip	_pcie_write_mrrs
.subsections_via_symbols
