	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_pci_enable_rom                 ## -- Begin function pci_enable_rom
	.p2align	4, 0x90
_pci_enable_rom:                        ## @pci_enable_rom
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r14
	pushq	%rbx
	subq	$16, %rsp
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	movq	8(%rdi), %rax
	movq	_PCI_ROM_RESOURCE@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rcx
	movl	(%rax,%rcx,4), %edx
	testl	%edx, %edx
	je	LBB0_1
## %bb.2:
	movq	_IORESOURCE_ROM_SHADOW@GOTPCREL(%rip), %rsi
	xorl	%r14d, %r14d
	testl	%edx, (%rsi)
	jne	LBB0_4
## %bb.3:
	movq	%rdi, %rbx
	leaq	(%rax,%rcx,4), %rdx
	movl	4(%rdi), %edi
	leaq	-24(%rbp), %rsi
	callq	_pcibios_resource_to_bus
	movl	(%rbx), %esi
	leaq	-20(%rbp), %rdx
	movq	%rbx, %rdi
	callq	_pci_read_config_dword
	movq	_PCI_ROM_ADDRESS_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	notl	%edx
	andl	-20(%rbp), %edx
	movq	_PCI_ROM_ADDRESS_ENABLE@GOTPCREL(%rip), %rax
	orl	-24(%rbp), %edx
	orl	(%rax), %edx
	movl	%edx, -20(%rbp)
	movl	(%rbx), %esi
	movq	%rbx, %rdi
	callq	_pci_write_config_dword
	jmp	LBB0_4
LBB0_1:
	movl	$-1, %r14d
LBB0_4:
	movl	%r14d, %eax
	addq	$16, %rsp
	popq	%rbx
	popq	%r14
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_PCI_ROM_RESOURCE,8,3           ## @PCI_ROM_RESOURCE
	.comm	_IORESOURCE_ROM_SHADOW,4,2      ## @IORESOURCE_ROM_SHADOW
	.comm	_PCI_ROM_ADDRESS_MASK,4,2       ## @PCI_ROM_ADDRESS_MASK
	.comm	_PCI_ROM_ADDRESS_ENABLE,4,2     ## @PCI_ROM_ADDRESS_ENABLE
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_pci_enable_rom                 ; -- Begin function pci_enable_rom
	.p2align	2
_pci_enable_rom:                        ; @pci_enable_rom
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #48
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	ldr	x8, [x0, #8]
Lloh0:
	adrp	x9, _PCI_ROM_RESOURCE@GOTPAGE
Lloh1:
	ldr	x9, [x9, _PCI_ROM_RESOURCE@GOTPAGEOFF]
Lloh2:
	ldr	x9, [x9]
	add	x2, x8, x9, lsl #2
	ldr	w8, [x2]
	cbz	w8, LBB0_4
; %bb.1:
Lloh3:
	adrp	x9, _IORESOURCE_ROM_SHADOW@GOTPAGE
Lloh4:
	ldr	x9, [x9, _IORESOURCE_ROM_SHADOW@GOTPAGEOFF]
Lloh5:
	ldr	w9, [x9]
	tst	w9, w8
	b.ne	LBB0_3
; %bb.2:
	mov	x19, x0
	ldr	w0, [x0, #4]
	add	x1, sp, #8
	bl	_pcibios_resource_to_bus
	ldr	w1, [x19]
	add	x2, sp, #4
	mov	x0, x19
	bl	_pci_read_config_dword
Lloh6:
	adrp	x8, _PCI_ROM_ADDRESS_MASK@GOTPAGE
Lloh7:
	ldr	x8, [x8, _PCI_ROM_ADDRESS_MASK@GOTPAGEOFF]
Lloh8:
	ldr	w8, [x8]
	ldp	w9, w10, [sp, #4]
	bic	w8, w9, w8
Lloh9:
	adrp	x9, _PCI_ROM_ADDRESS_ENABLE@GOTPAGE
Lloh10:
	ldr	x9, [x9, _PCI_ROM_ADDRESS_ENABLE@GOTPAGEOFF]
Lloh11:
	ldr	w9, [x9]
	orr	w8, w10, w8
	orr	w2, w8, w9
	str	w2, [sp, #4]
	ldr	w1, [x19]
	mov	x0, x19
	bl	_pci_write_config_dword
LBB0_3:
	mov	w0, #0
	b	LBB0_5
LBB0_4:
	mov	w0, #-1
LBB0_5:
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #48
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.cfi_endproc
                                        ; -- End function
	.comm	_PCI_ROM_RESOURCE,8,3           ; @PCI_ROM_RESOURCE
	.comm	_IORESOURCE_ROM_SHADOW,4,2      ; @IORESOURCE_ROM_SHADOW
	.comm	_PCI_ROM_ADDRESS_MASK,4,2       ; @PCI_ROM_ADDRESS_MASK
	.comm	_PCI_ROM_ADDRESS_ENABLE,4,2     ; @PCI_ROM_ADDRESS_ENABLE
.subsections_via_symbols
