	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function mvpp2_prs_dsa_tag_ethertype_set
_mvpp2_prs_dsa_tag_ethertype_set:       ## @mvpp2_prs_dsa_tag_ethertype_set
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$24, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%ecx, %ebx
	movl	%edx, %r14d
	movq	%rdi, %r13
	testl	%r8d, %r8d
	movl	%esi, -60(%rbp)                 ## 4-byte Spill
	je	LBB0_5
## %bb.1:
	testl	%ebx, %ebx
	jne	LBB0_2
## %bb.3:
	movq	_MVPP2_PE_ETYPE_EDSA_UNTAGGED@GOTPCREL(%rip), %rax
	jmp	LBB0_4
LBB0_5:
	testl	%ebx, %ebx
	jne	LBB0_6
## %bb.7:
	movq	_MVPP2_PE_ETYPE_DSA_UNTAGGED@GOTPCREL(%rip), %rax
	jmp	LBB0_8
LBB0_2:
	movq	_MVPP2_PE_ETYPE_EDSA_TAGGED@GOTPCREL(%rip), %rax
LBB0_4:
	movl	(%rax), %r15d
	xorl	%edx, %edx
	movl	$10, %r12d
	jmp	LBB0_9
LBB0_6:
	movq	_MVPP2_PE_ETYPE_DSA_TAGGED@GOTPCREL(%rip), %rax
LBB0_8:
	movl	(%rax), %r15d
	movq	_MVPP2_PRS_PORT_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movl	$6, %r12d
LBB0_9:
	movq	(%r13), %rax
	movslq	%r15d, %rcx
	cmpq	$0, (%rax,%rcx,8)
	je	LBB0_11
## %bb.10:
	leaq	-48(%rbp), %rsi
	movq	%r13, %rdi
	movl	%r15d, %edx
	callq	_mvpp2_prs_init_from_hw
	jmp	LBB0_15
LBB0_11:
	movl	%edx, -52(%rbp)                 ## 4-byte Spill
	movl	%r14d, -56(%rbp)                ## 4-byte Spill
	leaq	-48(%rbp), %r14
	movq	%r14, %rdi
	xorl	%esi, %esi
	movl	$4, %edx
	callq	_memset
	movq	_MVPP2_PRS_LU_DSA@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	callq	_mvpp2_prs_tcam_lu_set
	movl	%r15d, -48(%rbp)
	movq	_ETH_P_EDSA@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r14, %rdi
	xorl	%esi, %esi
	callq	_mvpp2_prs_match_etype
	movq	%r14, %rdi
	movl	$2, %esi
	xorl	%edx, %edx
	callq	_mvpp2_prs_match_etype
	movq	_MVPP2_PRS_RI_DSA_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r14, %rdi
	movl	%edx, %esi
	callq	_mvpp2_prs_sram_ri_update
	movq	_MVPP2_ETH_TYPE_LEN@GOTPCREL(%rip), %r15
	addq	(%r15), %r12
	movq	_MVPP2_PRS_SRAM_OP_SEL_SHIFT_ADD@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r14, %rdi
	movq	%r12, %rsi
	callq	_mvpp2_prs_sram_shift_set
	movl	-48(%rbp), %esi
	movq	_MVPP2_PRS_LU_DSA@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r13, %rdi
	callq	_mvpp2_prs_shadow_set
	testl	%ebx, %ebx
	je	LBB0_13
## %bb.12:
	movq	(%r15), %rsi
	addq	$5, %rsi
	movq	_MVPP2_PRS_TCAM_DSA_TAGGED_BIT@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	leaq	-48(%rbp), %r14
	movq	%r14, %rdi
	movl	%ecx, %edx
	callq	_mvpp2_prs_tcam_data_byte_set
	movq	_MVPP2_PRS_SRAM_AI_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r14, %rdi
	xorl	%esi, %esi
	callq	_mvpp2_prs_sram_ai_update
	movq	_MVPP2_PRS_LU_VLAN@GOTPCREL(%rip), %rax
	jmp	LBB0_14
LBB0_13:
	movq	_MVPP2_PRS_RI_VLAN_NONE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_MVPP2_PRS_RI_VLAN_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	leaq	-48(%rbp), %rdi
	callq	_mvpp2_prs_sram_ri_update
	movq	_MVPP2_PRS_LU_L2@GOTPCREL(%rip), %rax
LBB0_14:
	movl	(%rax), %esi
	leaq	-48(%rbp), %r14
	movq	%r14, %rdi
	callq	_mvpp2_prs_sram_next_lu_set
	movq	%r14, %rdi
	movl	-52(%rbp), %esi                 ## 4-byte Reload
	callq	_mvpp2_prs_tcam_port_map_set
	movl	-56(%rbp), %r14d                ## 4-byte Reload
LBB0_15:
	leaq	-48(%rbp), %rbx
	movq	%rbx, %rdi
	movl	-60(%rbp), %esi                 ## 4-byte Reload
	movl	%r14d, %edx
	callq	_mvpp2_prs_tcam_port_set
	movq	%r13, %rdi
	movq	%rbx, %rsi
	callq	_mvpp2_prs_hw_write
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_MVPP2_PE_ETYPE_EDSA_TAGGED,4,2 ## @MVPP2_PE_ETYPE_EDSA_TAGGED
	.comm	_MVPP2_PE_ETYPE_EDSA_UNTAGGED,4,2 ## @MVPP2_PE_ETYPE_EDSA_UNTAGGED
	.comm	_MVPP2_PE_ETYPE_DSA_TAGGED,4,2  ## @MVPP2_PE_ETYPE_DSA_TAGGED
	.comm	_MVPP2_PE_ETYPE_DSA_UNTAGGED,4,2 ## @MVPP2_PE_ETYPE_DSA_UNTAGGED
	.comm	_MVPP2_PRS_PORT_MASK,4,2        ## @MVPP2_PRS_PORT_MASK
	.comm	_MVPP2_PRS_LU_DSA,4,2           ## @MVPP2_PRS_LU_DSA
	.comm	_ETH_P_EDSA,4,2                 ## @ETH_P_EDSA
	.comm	_MVPP2_PRS_RI_DSA_MASK,4,2      ## @MVPP2_PRS_RI_DSA_MASK
	.comm	_MVPP2_ETH_TYPE_LEN,8,3         ## @MVPP2_ETH_TYPE_LEN
	.comm	_MVPP2_PRS_SRAM_OP_SEL_SHIFT_ADD,4,2 ## @MVPP2_PRS_SRAM_OP_SEL_SHIFT_ADD
	.comm	_MVPP2_PRS_TCAM_DSA_TAGGED_BIT,4,2 ## @MVPP2_PRS_TCAM_DSA_TAGGED_BIT
	.comm	_MVPP2_PRS_SRAM_AI_MASK,4,2     ## @MVPP2_PRS_SRAM_AI_MASK
	.comm	_MVPP2_PRS_LU_VLAN,4,2          ## @MVPP2_PRS_LU_VLAN
	.comm	_MVPP2_PRS_RI_VLAN_NONE,4,2     ## @MVPP2_PRS_RI_VLAN_NONE
	.comm	_MVPP2_PRS_RI_VLAN_MASK,4,2     ## @MVPP2_PRS_RI_VLAN_MASK
	.comm	_MVPP2_PRS_LU_L2,4,2            ## @MVPP2_PRS_LU_L2
	.no_dead_strip	_mvpp2_prs_dsa_tag_ethertype_set
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function mvpp2_prs_dsa_tag_ethertype_set
_mvpp2_prs_dsa_tag_ethertype_set:       ; @mvpp2_prs_dsa_tag_ethertype_set
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #96
	.cfi_def_cfa_offset 96
	stp	x26, x25, [sp, #16]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #32]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #48]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #64]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #80]             ; 16-byte Folded Spill
	add	x29, sp, #80
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	mov	x23, x3
	mov	x20, x2
	mov	x21, x1
	mov	x19, x0
	cbz	w4, LBB0_2
; %bb.1:
	mov	w22, #0
Lloh0:
	adrp	x8, _MVPP2_PE_ETYPE_EDSA_TAGGED@GOTPAGE
Lloh1:
	ldr	x8, [x8, _MVPP2_PE_ETYPE_EDSA_TAGGED@GOTPAGEOFF]
Lloh2:
	adrp	x9, _MVPP2_PE_ETYPE_EDSA_UNTAGGED@GOTPAGE
Lloh3:
	ldr	x9, [x9, _MVPP2_PE_ETYPE_EDSA_UNTAGGED@GOTPAGEOFF]
	cmp	w23, #0
	csel	x8, x9, x8, eq
	ldr	w24, [x8]
	mov	w25, #10
	b	LBB0_3
LBB0_2:
Lloh4:
	adrp	x8, _MVPP2_PE_ETYPE_DSA_TAGGED@GOTPAGE
Lloh5:
	ldr	x8, [x8, _MVPP2_PE_ETYPE_DSA_TAGGED@GOTPAGEOFF]
Lloh6:
	adrp	x9, _MVPP2_PE_ETYPE_DSA_UNTAGGED@GOTPAGE
Lloh7:
	ldr	x9, [x9, _MVPP2_PE_ETYPE_DSA_UNTAGGED@GOTPAGEOFF]
	cmp	w23, #0
	csel	x8, x9, x8, eq
	ldr	w24, [x8]
Lloh8:
	adrp	x8, _MVPP2_PRS_PORT_MASK@GOTPAGE
Lloh9:
	ldr	x8, [x8, _MVPP2_PRS_PORT_MASK@GOTPAGEOFF]
Lloh10:
	ldr	w22, [x8]
	mov	w25, #6
LBB0_3:
	ldr	x8, [x19]
	ldr	x8, [x8, w24, sxtw #3]
	cbz	x8, LBB0_5
; %bb.4:
	add	x1, sp, #8
	mov	x0, x19
	mov	x2, x24
	bl	_mvpp2_prs_init_from_hw
	b	LBB0_9
LBB0_5:
	add	x0, sp, #8
	mov	w1, #0
	mov	w2, #4
	bl	_memset
Lloh11:
	adrp	x26, _MVPP2_PRS_LU_DSA@GOTPAGE
Lloh12:
	ldr	x26, [x26, _MVPP2_PRS_LU_DSA@GOTPAGEOFF]
	ldr	w1, [x26]
	add	x0, sp, #8
	bl	_mvpp2_prs_tcam_lu_set
	str	w24, [sp, #8]
Lloh13:
	adrp	x8, _ETH_P_EDSA@GOTPAGE
Lloh14:
	ldr	x8, [x8, _ETH_P_EDSA@GOTPAGEOFF]
Lloh15:
	ldr	w2, [x8]
	add	x0, sp, #8
	mov	w1, #0
	bl	_mvpp2_prs_match_etype
	add	x0, sp, #8
	mov	w1, #2
	mov	w2, #0
	bl	_mvpp2_prs_match_etype
Lloh16:
	adrp	x8, _MVPP2_PRS_RI_DSA_MASK@GOTPAGE
Lloh17:
	ldr	x8, [x8, _MVPP2_PRS_RI_DSA_MASK@GOTPAGEOFF]
Lloh18:
	ldr	w1, [x8]
	add	x0, sp, #8
	mov	x2, x1
	bl	_mvpp2_prs_sram_ri_update
Lloh19:
	adrp	x24, _MVPP2_ETH_TYPE_LEN@GOTPAGE
Lloh20:
	ldr	x24, [x24, _MVPP2_ETH_TYPE_LEN@GOTPAGEOFF]
	ldr	x8, [x24]
	add	x1, x25, x8
Lloh21:
	adrp	x8, _MVPP2_PRS_SRAM_OP_SEL_SHIFT_ADD@GOTPAGE
Lloh22:
	ldr	x8, [x8, _MVPP2_PRS_SRAM_OP_SEL_SHIFT_ADD@GOTPAGEOFF]
Lloh23:
	ldr	w2, [x8]
	add	x0, sp, #8
	bl	_mvpp2_prs_sram_shift_set
	ldr	w1, [sp, #8]
	ldr	w2, [x26]
	mov	x0, x19
	bl	_mvpp2_prs_shadow_set
	cbz	w23, LBB0_7
; %bb.6:
	ldr	x8, [x24]
	add	x1, x8, #5
Lloh24:
	adrp	x8, _MVPP2_PRS_TCAM_DSA_TAGGED_BIT@GOTPAGE
Lloh25:
	ldr	x8, [x8, _MVPP2_PRS_TCAM_DSA_TAGGED_BIT@GOTPAGEOFF]
Lloh26:
	ldr	w2, [x8]
	add	x0, sp, #8
	mov	x3, x2
	bl	_mvpp2_prs_tcam_data_byte_set
Lloh27:
	adrp	x8, _MVPP2_PRS_SRAM_AI_MASK@GOTPAGE
Lloh28:
	ldr	x8, [x8, _MVPP2_PRS_SRAM_AI_MASK@GOTPAGEOFF]
Lloh29:
	ldr	w2, [x8]
	add	x0, sp, #8
	mov	w1, #0
	bl	_mvpp2_prs_sram_ai_update
Lloh30:
	adrp	x8, _MVPP2_PRS_LU_VLAN@GOTPAGE
Lloh31:
	ldr	x8, [x8, _MVPP2_PRS_LU_VLAN@GOTPAGEOFF]
	b	LBB0_8
LBB0_7:
Lloh32:
	adrp	x8, _MVPP2_PRS_RI_VLAN_NONE@GOTPAGE
Lloh33:
	ldr	x8, [x8, _MVPP2_PRS_RI_VLAN_NONE@GOTPAGEOFF]
Lloh34:
	ldr	w1, [x8]
Lloh35:
	adrp	x8, _MVPP2_PRS_RI_VLAN_MASK@GOTPAGE
Lloh36:
	ldr	x8, [x8, _MVPP2_PRS_RI_VLAN_MASK@GOTPAGEOFF]
Lloh37:
	ldr	w2, [x8]
	add	x0, sp, #8
	bl	_mvpp2_prs_sram_ri_update
Lloh38:
	adrp	x8, _MVPP2_PRS_LU_L2@GOTPAGE
Lloh39:
	ldr	x8, [x8, _MVPP2_PRS_LU_L2@GOTPAGEOFF]
LBB0_8:
	ldr	w1, [x8]
	add	x0, sp, #8
	bl	_mvpp2_prs_sram_next_lu_set
	add	x0, sp, #8
	mov	x1, x22
	bl	_mvpp2_prs_tcam_port_map_set
LBB0_9:
	add	x0, sp, #8
	mov	x1, x21
	mov	x2, x20
	bl	_mvpp2_prs_tcam_port_set
	add	x1, sp, #8
	mov	x0, x19
	bl	_mvpp2_prs_hw_write
	ldp	x29, x30, [sp, #80]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #64]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #48]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #32]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #96
	ret
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGot	Lloh6, Lloh7
	.loh AdrpLdrGot	Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGot	Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh16, Lloh17, Lloh18
	.loh AdrpLdrGotLdr	Lloh13, Lloh14, Lloh15
	.loh AdrpLdrGot	Lloh11, Lloh12
	.loh AdrpLdrGot	Lloh30, Lloh31
	.loh AdrpLdrGotLdr	Lloh27, Lloh28, Lloh29
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.loh AdrpLdrGot	Lloh38, Lloh39
	.loh AdrpLdrGotLdr	Lloh35, Lloh36, Lloh37
	.loh AdrpLdrGotLdr	Lloh32, Lloh33, Lloh34
	.cfi_endproc
                                        ; -- End function
	.comm	_MVPP2_PE_ETYPE_EDSA_TAGGED,4,2 ; @MVPP2_PE_ETYPE_EDSA_TAGGED
	.comm	_MVPP2_PE_ETYPE_EDSA_UNTAGGED,4,2 ; @MVPP2_PE_ETYPE_EDSA_UNTAGGED
	.comm	_MVPP2_PE_ETYPE_DSA_TAGGED,4,2  ; @MVPP2_PE_ETYPE_DSA_TAGGED
	.comm	_MVPP2_PE_ETYPE_DSA_UNTAGGED,4,2 ; @MVPP2_PE_ETYPE_DSA_UNTAGGED
	.comm	_MVPP2_PRS_PORT_MASK,4,2        ; @MVPP2_PRS_PORT_MASK
	.comm	_MVPP2_PRS_LU_DSA,4,2           ; @MVPP2_PRS_LU_DSA
	.comm	_ETH_P_EDSA,4,2                 ; @ETH_P_EDSA
	.comm	_MVPP2_PRS_RI_DSA_MASK,4,2      ; @MVPP2_PRS_RI_DSA_MASK
	.comm	_MVPP2_ETH_TYPE_LEN,8,3         ; @MVPP2_ETH_TYPE_LEN
	.comm	_MVPP2_PRS_SRAM_OP_SEL_SHIFT_ADD,4,2 ; @MVPP2_PRS_SRAM_OP_SEL_SHIFT_ADD
	.comm	_MVPP2_PRS_TCAM_DSA_TAGGED_BIT,4,2 ; @MVPP2_PRS_TCAM_DSA_TAGGED_BIT
	.comm	_MVPP2_PRS_SRAM_AI_MASK,4,2     ; @MVPP2_PRS_SRAM_AI_MASK
	.comm	_MVPP2_PRS_LU_VLAN,4,2          ; @MVPP2_PRS_LU_VLAN
	.comm	_MVPP2_PRS_RI_VLAN_NONE,4,2     ; @MVPP2_PRS_RI_VLAN_NONE
	.comm	_MVPP2_PRS_RI_VLAN_MASK,4,2     ; @MVPP2_PRS_RI_VLAN_MASK
	.comm	_MVPP2_PRS_LU_L2,4,2            ; @MVPP2_PRS_LU_L2
	.no_dead_strip	_mvpp2_prs_dsa_tag_ethertype_set
.subsections_via_symbols
