	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function npcm7xx_gpio_register
_npcm7xx_gpio_register:                 ## @npcm7xx_gpio_register
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	cmpl	$0, (%rdi)
	jle	LBB0_13
## %bb.1:
	movq	%rdi, %r15
	xorl	%ebx, %ebx
	movq	_IRQ_TYPE_NONE@GOTPCREL(%rip), %r13
	xorl	%r14d, %r14d
	.p2align	4, 0x90
LBB0_2:                                 ## =>This Inner Loop Header: Depth=1
	movl	16(%r15), %edi
	movq	8(%r15), %rdx
	addq	%rbx, %rdx
	movq	%rdx, %rsi
	callq	_devm_gpiochip_add_data
	testl	%eax, %eax
	jne	LBB0_3
## %bb.7:                               ##   in Loop: Header=BB0_2 Depth=1
	movq	8(%r15), %r12
	addq	%rbx, %r12
	movl	16(%r15), %edi
	callq	_dev_name
	movq	8(%r15), %rcx
	movl	16(%rcx,%rbx), %edx
	movl	(%rcx,%rbx), %r8d
	movl	4(%rcx,%rbx), %ecx
	movq	%r12, %rdi
	movl	%eax, %esi
	callq	_gpiochip_add_pin_range
	testl	%eax, %eax
	js	LBB0_8
## %bb.10:                              ##   in Loop: Header=BB0_2 Depth=1
	movq	8(%r15), %rdi
	leaq	(%rdi,%rbx), %rsi
	addq	$12, %rsi
	addq	%rbx, %rdi
	movq	_handle_level_irq@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movl	(%r13), %r8d
	xorl	%edx, %edx
	callq	_gpiochip_irqchip_add
	testl	%eax, %eax
	js	LBB0_11
## %bb.12:                              ##   in Loop: Header=BB0_2 Depth=1
	movq	8(%r15), %rax
	leaq	(%rax,%rbx), %rdi
	leaq	(%rax,%rbx), %rsi
	addq	$12, %rsi
	movl	8(%rax,%rbx), %edx
	movq	_npcmgpio_irq_handler@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	callq	_gpiochip_set_chained_irqchip
	incq	%r14
	movslq	(%r15), %rax
	addq	$20, %rbx
	cmpq	%rax, %r14
	jl	LBB0_2
LBB0_13:
	xorl	%r12d, %r12d
	jmp	LBB0_14
LBB0_3:
	movl	%eax, %r12d
	movl	16(%r15), %edi
	leaq	L_.str(%rip), %rsi
	movl	%r14d, %edx
	callq	_dev_err
	testl	%r14d, %r14d
	jne	LBB0_5
	jmp	LBB0_14
LBB0_8:
	movl	%eax, %r12d
	movl	16(%r15), %edi
	leaq	L_.str.1(%rip), %rsi
	jmp	LBB0_9
LBB0_11:
	movl	%eax, %r12d
	movl	16(%r15), %edi
	leaq	L_.str.2(%rip), %rsi
LBB0_9:
	movl	%r14d, %edx
	callq	_dev_err
	addq	8(%r15), %rbx
	movq	%rbx, %rdi
	callq	_gpiochip_remove
	testl	%r14d, %r14d
	je	LBB0_14
LBB0_5:
	movl	%r14d, %eax
	leaq	1(%rax), %r14
	leaq	(%rax,%rax,4), %rax
	leaq	-20(,%rax,4), %rbx
	.p2align	4, 0x90
LBB0_6:                                 ## =>This Inner Loop Header: Depth=1
	movq	8(%r15), %rdi
	addq	%rbx, %rdi
	callq	_gpiochip_remove
	decq	%r14
	addq	$-20, %rbx
	cmpq	$1, %r14
	ja	LBB0_6
LBB0_14:
	movl	%r12d, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"Failed to add GPIO chip %u\n"

L_.str.1:                               ## @.str.1
	.asciz	"Failed to add GPIO bank %u\n"

	.comm	_handle_level_irq,4,2           ## @handle_level_irq
	.comm	_IRQ_TYPE_NONE,4,2              ## @IRQ_TYPE_NONE
L_.str.2:                               ## @.str.2
	.asciz	"Failed to add IRQ chip %u\n"

	.comm	_npcmgpio_irq_handler,4,2       ## @npcmgpio_irq_handler
	.no_dead_strip	_npcm7xx_gpio_register
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function npcm7xx_gpio_register
_npcm7xx_gpio_register:                 ; @npcm7xx_gpio_register
	.cfi_startproc
; %bb.0:
	stp	x26, x25, [sp, #-80]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	ldr	w8, [x0]
	cmp	w8, #1
	b.lt	LBB0_6
; %bb.1:
	mov	x19, x0
	mov	x22, #0
	mov	x20, #0
Lloh0:
	adrp	x23, _handle_level_irq@GOTPAGE
Lloh1:
	ldr	x23, [x23, _handle_level_irq@GOTPAGEOFF]
Lloh2:
	adrp	x24, _IRQ_TYPE_NONE@GOTPAGE
Lloh3:
	ldr	x24, [x24, _IRQ_TYPE_NONE@GOTPAGEOFF]
Lloh4:
	adrp	x25, _npcmgpio_irq_handler@GOTPAGE
Lloh5:
	ldr	x25, [x25, _npcmgpio_irq_handler@GOTPAGEOFF]
LBB0_2:                                 ; =>This Inner Loop Header: Depth=1
	ldr	w0, [x19, #16]
	ldr	x8, [x19, #8]
	add	x1, x8, x22
	mov	x2, x1
	bl	_devm_gpiochip_add_data
	cbnz	w0, LBB0_7
; %bb.3:                                ;   in Loop: Header=BB0_2 Depth=1
	ldr	x8, [x19, #8]
	add	x21, x8, x22
	ldr	w0, [x19, #16]
	bl	_dev_name
	mov	x1, x0
	ldr	x8, [x19, #8]
	add	x8, x8, x22
	ldr	w2, [x8, #16]
	ldp	w4, w3, [x8]
	mov	x0, x21
	bl	_gpiochip_add_pin_range
	tbnz	w0, #31, LBB0_8
; %bb.4:                                ;   in Loop: Header=BB0_2 Depth=1
	ldr	x8, [x19, #8]
	add	x0, x8, x22
	add	x1, x0, #12
	ldr	w3, [x23]
	ldr	w4, [x24]
	mov	w2, #0
	bl	_gpiochip_irqchip_add
	tbnz	w0, #31, LBB0_9
; %bb.5:                                ;   in Loop: Header=BB0_2 Depth=1
	ldr	x8, [x19, #8]
	add	x0, x8, x22
	add	x1, x0, #12
	ldr	w2, [x0, #8]
	ldr	w3, [x25]
	bl	_gpiochip_set_chained_irqchip
	add	x20, x20, #1
	ldrsw	x8, [x19]
	add	x22, x22, #20
	cmp	x20, x8
	b.lt	LBB0_2
LBB0_6:
	mov	w21, #0
	b	LBB0_13
LBB0_7:
	mov	x21, x0
	ldr	w0, [x19, #16]
Lloh6:
	adrp	x1, l_.str@PAGE
Lloh7:
	add	x1, x1, l_.str@PAGEOFF
	mov	x2, x20
	bl	_dev_err
	cbnz	w20, LBB0_11
	b	LBB0_13
LBB0_8:
	mov	x21, x0
	ldr	w0, [x19, #16]
Lloh8:
	adrp	x1, l_.str.1@PAGE
Lloh9:
	add	x1, x1, l_.str.1@PAGEOFF
	b	LBB0_10
LBB0_9:
	mov	x21, x0
	ldr	w0, [x19, #16]
Lloh10:
	adrp	x1, l_.str.2@PAGE
Lloh11:
	add	x1, x1, l_.str.2@PAGEOFF
LBB0_10:
	mov	x2, x20
	bl	_dev_err
	ldr	x8, [x19, #8]
	add	x0, x8, x22
	bl	_gpiochip_remove
	cbz	w20, LBB0_13
LBB0_11:
	mov	w8, w20
	add	x22, x8, #1
	mov	w8, #20
	mov	x9, #-20
	umaddl	x20, w20, w8, x9
LBB0_12:                                ; =>This Inner Loop Header: Depth=1
	ldr	x8, [x19, #8]
	add	x0, x8, x20
	bl	_gpiochip_remove
	sub	x22, x22, #1
	sub	x20, x20, #20
	cmp	x22, #1
	b.hi	LBB0_12
LBB0_13:
	mov	x0, x21
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp], #80             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGot	Lloh4, Lloh5
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpAdd	Lloh6, Lloh7
	.loh AdrpAdd	Lloh8, Lloh9
	.loh AdrpAdd	Lloh10, Lloh11
	.cfi_endproc
                                        ; -- End function
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"Failed to add GPIO chip %u\n"

l_.str.1:                               ; @.str.1
	.asciz	"Failed to add GPIO bank %u\n"

	.comm	_handle_level_irq,4,2           ; @handle_level_irq
	.comm	_IRQ_TYPE_NONE,4,2              ; @IRQ_TYPE_NONE
l_.str.2:                               ; @.str.2
	.asciz	"Failed to add IRQ chip %u\n"

	.comm	_npcmgpio_irq_handler,4,2       ; @npcmgpio_irq_handler
	.no_dead_strip	_npcm7xx_gpio_register
.subsections_via_symbols
