	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function pcie_init_service_irqs
_pcie_init_service_irqs:                ## @pcie_init_service_irqs
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%edx, %r15d
	movq	%rsi, %r13
	movq	%rdi, %r14
	movq	_PCIE_PORT_DEVICE_MAXSERVICES@GOTPCREL(%rip), %r12
	cmpl	$0, (%r12)
	jle	LBB0_3
## %bb.1:
	xorl	%eax, %eax
	.p2align	4, 0x90
LBB0_2:                                 ## =>This Inner Loop Header: Depth=1
	movl	$-1, (%r13,%rax,4)
	incq	%rax
	movslq	(%r12), %rcx
	cmpq	%rcx, %rax
	jl	LBB0_2
LBB0_3:
	movq	_PCIE_PORT_SERVICE_PME@GOTPCREL(%rip), %rax
	testl	%r15d, (%rax)
	je	LBB0_5
## %bb.4:
	xorl	%eax, %eax
	callq	_pcie_pme_no_msi
	testq	%rax, %rax
	jne	LBB0_6
LBB0_5:
	movq	%r14, %rdi
	movq	%r13, %rsi
	movl	%r15d, %edx
	callq	_pcie_port_enable_irq_vec
	testq	%rax, %rax
	je	LBB0_12
LBB0_6:
	movq	_PCI_IRQ_LEGACY@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movq	%r14, %rdi
	movl	$1, %esi
	movl	$1, %edx
	callq	_pci_alloc_irq_vectors
	testl	%eax, %eax
	js	LBB0_10
## %bb.7:
	cmpl	$0, (%r12)
	jle	LBB0_12
## %bb.8:
	xorl	%r15d, %r15d
	xorl	%ebx, %ebx
	.p2align	4, 0x90
LBB0_9:                                 ## =>This Inner Loop Header: Depth=1
	movq	%r14, %rdi
	xorl	%esi, %esi
	callq	_pci_irq_vector
	movl	%eax, (%r13,%rbx,4)
	incq	%rbx
	movslq	(%r12), %rax
	cmpq	%rax, %rbx
	jl	LBB0_9
	jmp	LBB0_13
LBB0_12:
	xorl	%r15d, %r15d
	jmp	LBB0_13
LBB0_10:
	movq	_ENODEV@GOTPCREL(%rip), %rax
	xorl	%r15d, %r15d
	subl	(%rax), %r15d
LBB0_13:
	movl	%r15d, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_PCIE_PORT_DEVICE_MAXSERVICES,4,2 ## @PCIE_PORT_DEVICE_MAXSERVICES
	.comm	_PCIE_PORT_SERVICE_PME,4,2      ## @PCIE_PORT_SERVICE_PME
	.comm	_PCI_IRQ_LEGACY,4,2             ## @PCI_IRQ_LEGACY
	.comm	_ENODEV,4,2                     ## @ENODEV
	.no_dead_strip	_pcie_init_service_irqs
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function pcie_init_service_irqs
_pcie_init_service_irqs:                ; @pcie_init_service_irqs
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x21, x2
	mov	x19, x1
	mov	x20, x0
Lloh0:
	adrp	x22, _PCIE_PORT_DEVICE_MAXSERVICES@GOTPAGE
Lloh1:
	ldr	x22, [x22, _PCIE_PORT_DEVICE_MAXSERVICES@GOTPAGEOFF]
	ldr	w8, [x22]
	cmp	w8, #1
	b.lt	LBB0_3
; %bb.1:
	mov	x8, #0
	mov	w9, #-1
LBB0_2:                                 ; =>This Inner Loop Header: Depth=1
	str	w9, [x19, x8, lsl #2]
	add	x8, x8, #1
	ldrsw	x10, [x22]
	cmp	x8, x10
	b.lt	LBB0_2
LBB0_3:
Lloh2:
	adrp	x8, _PCIE_PORT_SERVICE_PME@GOTPAGE
Lloh3:
	ldr	x8, [x8, _PCIE_PORT_SERVICE_PME@GOTPAGEOFF]
Lloh4:
	ldr	w8, [x8]
	tst	w8, w21
	b.eq	LBB0_5
; %bb.4:
	bl	_pcie_pme_no_msi
	cbnz	x0, LBB0_6
LBB0_5:
	mov	x0, x20
	mov	x1, x19
	mov	x2, x21
	bl	_pcie_port_enable_irq_vec
	cbz	x0, LBB0_12
LBB0_6:
Lloh5:
	adrp	x8, _PCI_IRQ_LEGACY@GOTPAGE
Lloh6:
	ldr	x8, [x8, _PCI_IRQ_LEGACY@GOTPAGEOFF]
Lloh7:
	ldr	w3, [x8]
	mov	x0, x20
	mov	w1, #1
	mov	w2, #1
	bl	_pci_alloc_irq_vectors
	tbnz	w0, #31, LBB0_11
; %bb.7:
	ldr	w8, [x22]
	cmp	w8, #1
	b.lt	LBB0_10
; %bb.8:
	mov	x21, #0
LBB0_9:                                 ; =>This Inner Loop Header: Depth=1
	mov	x0, x20
	mov	w1, #0
	bl	_pci_irq_vector
	str	w0, [x19, x21, lsl #2]
	add	x21, x21, #1
	ldrsw	x8, [x22]
	cmp	x21, x8
	b.lt	LBB0_9
LBB0_10:
	mov	w0, #0
	b	LBB0_12
LBB0_11:
Lloh8:
	adrp	x8, _ENODEV@GOTPAGE
Lloh9:
	ldr	x8, [x8, _ENODEV@GOTPAGEOFF]
Lloh10:
	ldr	w8, [x8]
	neg	w0, w8
LBB0_12:
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.cfi_endproc
                                        ; -- End function
	.comm	_PCIE_PORT_DEVICE_MAXSERVICES,4,2 ; @PCIE_PORT_DEVICE_MAXSERVICES
	.comm	_PCIE_PORT_SERVICE_PME,4,2      ; @PCIE_PORT_SERVICE_PME
	.comm	_PCI_IRQ_LEGACY,4,2             ; @PCI_IRQ_LEGACY
	.comm	_ENODEV,4,2                     ; @ENODEV
	.no_dead_strip	_pcie_init_service_irqs
.subsections_via_symbols
