	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function ath10k_pci_force_wake
_ath10k_pci_force_wake:                 ## @ath10k_pci_force_wake
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r15
	callq	_ath10k_pci_priv
	xorl	%ebx, %ebx
	cmpq	$0, 16(%rax)
	jne	LBB0_5
## %bb.1:
	movq	%rax, %r12
	movq	%rax, %r14
	addq	$4, %r14
	movq	%r14, %rdi
	callq	_spin_lock_irqsave
	xorl	%ebx, %ebx
	cmpl	$0, (%r12)
	jne	LBB0_4
## %bb.2:
	movq	_PCIE_SOC_WAKE_V_MASK@GOTPCREL(%rip), %rax
	movq	_PCIE_LOCAL_BASE_ADDRESS@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rsi
	addq	8(%r12), %rsi
	movl	(%rax), %edi
	movq	_PCIE_SOC_WAKE_ADDRESS@GOTPCREL(%rip), %rax
	addq	(%rax), %rsi
	callq	_iowrite32
	movq	%r15, %rdi
	callq	_ath10k_pci_wake_wait
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	LBB0_4
## %bb.3:
	movl	$1, (%r12)
	xorl	%ebx, %ebx
LBB0_4:
	movq	%r14, %rdi
	callq	_spin_unlock_irqrestore
LBB0_5:
	movl	%ebx, %eax
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_PCIE_SOC_WAKE_V_MASK,4,2       ## @PCIE_SOC_WAKE_V_MASK
	.comm	_PCIE_LOCAL_BASE_ADDRESS,8,3    ## @PCIE_LOCAL_BASE_ADDRESS
	.comm	_PCIE_SOC_WAKE_ADDRESS,8,3      ## @PCIE_SOC_WAKE_ADDRESS
	.no_dead_strip	_ath10k_pci_force_wake
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function ath10k_pci_force_wake
_ath10k_pci_force_wake:                 ; @ath10k_pci_force_wake
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x21, x0
	bl	_ath10k_pci_priv
	ldr	x8, [x0, #16]
	cbz	x8, LBB0_2
; %bb.1:
	mov	w21, #0
	b	LBB0_7
LBB0_2:
	mov	x20, x0
	add	x19, x0, #4
	mov	x0, x19
	bl	_spin_lock_irqsave
	ldr	w8, [x20]
	cbz	w8, LBB0_4
; %bb.3:
	mov	w21, #0
	b	LBB0_6
LBB0_4:
Lloh0:
	adrp	x8, _PCIE_SOC_WAKE_V_MASK@GOTPAGE
Lloh1:
	ldr	x8, [x8, _PCIE_SOC_WAKE_V_MASK@GOTPAGEOFF]
Lloh2:
	ldr	w0, [x8]
	ldr	x8, [x20, #8]
Lloh3:
	adrp	x9, _PCIE_LOCAL_BASE_ADDRESS@GOTPAGE
Lloh4:
	ldr	x9, [x9, _PCIE_LOCAL_BASE_ADDRESS@GOTPAGEOFF]
Lloh5:
	ldr	x9, [x9]
Lloh6:
	adrp	x10, _PCIE_SOC_WAKE_ADDRESS@GOTPAGE
Lloh7:
	ldr	x10, [x10, _PCIE_SOC_WAKE_ADDRESS@GOTPAGEOFF]
Lloh8:
	ldr	x10, [x10]
	add	x8, x9, x8
	add	x1, x8, x10
	bl	_iowrite32
	mov	x0, x21
	bl	_ath10k_pci_wake_wait
	mov	x21, x0
	cbnz	w0, LBB0_6
; %bb.5:
	mov	w8, #1
	str	w8, [x20]
LBB0_6:
	mov	x0, x19
	bl	_spin_unlock_irqrestore
LBB0_7:
	mov	x0, x21
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_PCIE_SOC_WAKE_V_MASK,4,2       ; @PCIE_SOC_WAKE_V_MASK
	.comm	_PCIE_LOCAL_BASE_ADDRESS,8,3    ; @PCIE_LOCAL_BASE_ADDRESS
	.comm	_PCIE_SOC_WAKE_ADDRESS,8,3      ; @PCIE_SOC_WAKE_ADDRESS
	.no_dead_strip	_ath10k_pci_force_wake
.subsections_via_symbols
