	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function mt2712_set_delay
_mt2712_set_delay:                      ## @mt2712_set_delay
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r15
	callq	_mt2712_delay_ps2stage
	movl	(%r15), %eax
	leal	-129(%rax), %ecx
	cmpl	$4, %ecx
	jae	LBB0_1
## %bb.8:
	movq	_ETH_FINE_DLY_GTXC@GOTPCREL(%rip), %rax
	movq	_ETH_FINE_DLY_RXC@GOTPCREL(%rip), %rcx
	movl	(%rcx), %r14d
	orl	(%rax), %r14d
	movq	_ETH_DLY_GTXC_ENABLE@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	xorl	%esi, %esi
	cmpl	$0, 16(%r15)
	setne	%sil
	callq	_FIELD_PREP
	movl	%eax, %r12d
	movq	_ETH_DLY_GTXC_STAGES@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	16(%r15), %esi
	callq	_FIELD_PREP
	movl	%eax, %r13d
	orl	%r12d, %r13d
	movq	_ETH_DLY_GTXC_INV@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	20(%r15), %esi
	callq	_FIELD_PREP
	movl	%eax, %r12d
	movq	_ETH_DLY_RXC_ENABLE@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	xorl	%esi, %esi
	cmpl	$0, 24(%r15)
	setne	%sil
	callq	_FIELD_PREP
	movl	%eax, %ebx
	orl	%r12d, %ebx
	orl	%r13d, %ebx
	movq	_ETH_DLY_RXC_STAGES@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	24(%r15), %esi
	callq	_FIELD_PREP
	movl	%eax, %r12d
	movq	_ETH_DLY_RXC_INV@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	28(%r15), %esi
	callq	_FIELD_PREP
	movl	%eax, %r13d
	orl	%r12d, %r13d
	orl	%ebx, %r13d
LBB0_9:
	movl	4(%r15), %edi
	movq	_PERI_ETH_DLY@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	%r13d, %edx
	callq	_regmap_write
	movl	4(%r15), %edi
	movq	_PERI_ETH_DLY_FINE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	%r14d, %edx
	callq	_regmap_write
	xorl	%eax, %eax
LBB0_10:
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_1:
	cmpl	$128, %eax
	je	LBB0_4
## %bb.2:
	cmpl	$133, %eax
	jne	LBB0_7
## %bb.3:
	movq	_ETH_DLY_TXC_ENABLE@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	xorl	%esi, %esi
	cmpl	$0, 16(%r15)
	setne	%sil
	callq	_FIELD_PREP
	movl	%eax, %r14d
	movq	_ETH_DLY_TXC_STAGES@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	16(%r15), %esi
	callq	_FIELD_PREP
	movl	%eax, %ebx
	orl	%r14d, %ebx
	movq	_ETH_DLY_TXC_INV@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	20(%r15), %esi
	callq	_FIELD_PREP
	movl	%eax, %r14d
	movq	_ETH_DLY_RXC_ENABLE@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	xorl	%esi, %esi
	cmpl	$0, 24(%r15)
	setne	%sil
	callq	_FIELD_PREP
	movl	%eax, %r12d
	orl	%r14d, %r12d
	orl	%ebx, %r12d
	movq	_ETH_DLY_RXC_STAGES@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	24(%r15), %esi
	callq	_FIELD_PREP
	movl	%eax, %r14d
	movq	_ETH_DLY_RXC_INV@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	28(%r15), %esi
	callq	_FIELD_PREP
	movl	%eax, %r13d
	orl	%r14d, %r13d
	orl	%r12d, %r13d
	xorl	%r14d, %r14d
	jmp	LBB0_9
LBB0_4:
	xorl	%esi, %esi
	cmpl	$0, 24(%r15)
	setne	%sil
	cmpl	$0, 12(%r15)
	movq	_ETH_DLY_RXC_ENABLE@GOTPCREL(%rip), %rax
	cmoveq	_ETH_DLY_TXC_ENABLE@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_ETH_DLY_RXC_STAGES@GOTPCREL(%rip), %rbx
	cmoveq	_ETH_DLY_TXC_STAGES@GOTPCREL(%rip), %rbx
	movq	_ETH_DLY_RXC_INV@GOTPCREL(%rip), %r12
	cmoveq	_ETH_DLY_TXC_INV@GOTPCREL(%rip), %r12
	callq	_FIELD_PREP
	movl	%eax, %r14d
	movl	(%rbx), %edi
	movl	24(%r15), %esi
	callq	_FIELD_PREP
	movl	%eax, %r13d
	orl	%r14d, %r13d
	movl	(%r12), %edi
	movl	28(%r15), %esi
	callq	_FIELD_PREP
	movl	20(%r15), %r14d
	testl	%r14d, %r14d
	je	LBB0_6
## %bb.5:
	movq	_ETH_RMII_DLY_TX_INV@GOTPCREL(%rip), %rcx
	movl	(%rcx), %r14d
LBB0_6:
	orl	%eax, %r13d
	jmp	LBB0_9
LBB0_7:
	movl	8(%r15), %edi
	leaq	L_.str(%rip), %rsi
	callq	_dev_err
	movq	_EINVAL@GOTPCREL(%rip), %rcx
	xorl	%eax, %eax
	subl	(%rcx), %eax
	jmp	LBB0_10
	.cfi_endproc
                                        ## -- End function
	.comm	_ETH_DLY_TXC_ENABLE,4,2         ## @ETH_DLY_TXC_ENABLE
	.comm	_ETH_DLY_TXC_STAGES,4,2         ## @ETH_DLY_TXC_STAGES
	.comm	_ETH_DLY_TXC_INV,4,2            ## @ETH_DLY_TXC_INV
	.comm	_ETH_DLY_RXC_ENABLE,4,2         ## @ETH_DLY_RXC_ENABLE
	.comm	_ETH_DLY_RXC_STAGES,4,2         ## @ETH_DLY_RXC_STAGES
	.comm	_ETH_DLY_RXC_INV,4,2            ## @ETH_DLY_RXC_INV
	.comm	_ETH_RMII_DLY_TX_INV,4,2        ## @ETH_RMII_DLY_TX_INV
	.comm	_ETH_FINE_DLY_GTXC,4,2          ## @ETH_FINE_DLY_GTXC
	.comm	_ETH_FINE_DLY_RXC,4,2           ## @ETH_FINE_DLY_RXC
	.comm	_ETH_DLY_GTXC_ENABLE,4,2        ## @ETH_DLY_GTXC_ENABLE
	.comm	_ETH_DLY_GTXC_STAGES,4,2        ## @ETH_DLY_GTXC_STAGES
	.comm	_ETH_DLY_GTXC_INV,4,2           ## @ETH_DLY_GTXC_INV
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"phy interface not supported\n"

	.comm	_EINVAL,4,2                     ## @EINVAL
	.comm	_PERI_ETH_DLY,4,2               ## @PERI_ETH_DLY
	.comm	_PERI_ETH_DLY_FINE,4,2          ## @PERI_ETH_DLY_FINE
	.no_dead_strip	_mt2712_set_delay
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function mt2712_set_delay
_mt2712_set_delay:                      ; @mt2712_set_delay
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x0
	bl	_mt2712_delay_ps2stage
	ldr	w8, [x19]
	sub	w9, w8, #129
	cmp	w9, #4
	b.hs	LBB0_2
; %bb.1:
Lloh0:
	adrp	x8, _ETH_FINE_DLY_GTXC@GOTPAGE
Lloh1:
	ldr	x8, [x8, _ETH_FINE_DLY_GTXC@GOTPAGEOFF]
Lloh2:
	ldr	w8, [x8]
Lloh3:
	adrp	x9, _ETH_FINE_DLY_RXC@GOTPAGE
Lloh4:
	ldr	x9, [x9, _ETH_FINE_DLY_RXC@GOTPAGEOFF]
Lloh5:
	ldr	w9, [x9]
	orr	w20, w9, w8
Lloh6:
	adrp	x8, _ETH_DLY_GTXC_ENABLE@GOTPAGE
Lloh7:
	ldr	x8, [x8, _ETH_DLY_GTXC_ENABLE@GOTPAGEOFF]
Lloh8:
	ldr	w0, [x8]
	ldr	w8, [x19, #16]
	cmp	w8, #0
	cset	w1, ne
	bl	_FIELD_PREP
	mov	x21, x0
Lloh9:
	adrp	x8, _ETH_DLY_GTXC_STAGES@GOTPAGE
Lloh10:
	ldr	x8, [x8, _ETH_DLY_GTXC_STAGES@GOTPAGEOFF]
Lloh11:
	ldr	w0, [x8]
	ldr	w1, [x19, #16]
	bl	_FIELD_PREP
	orr	w21, w0, w21
Lloh12:
	adrp	x8, _ETH_DLY_GTXC_INV@GOTPAGE
Lloh13:
	ldr	x8, [x8, _ETH_DLY_GTXC_INV@GOTPAGEOFF]
Lloh14:
	ldr	w0, [x8]
	ldr	w1, [x19, #20]
	bl	_FIELD_PREP
	orr	w21, w21, w0
Lloh15:
	adrp	x8, _ETH_DLY_RXC_ENABLE@GOTPAGE
Lloh16:
	ldr	x8, [x8, _ETH_DLY_RXC_ENABLE@GOTPAGEOFF]
Lloh17:
	ldr	w0, [x8]
	ldr	w8, [x19, #24]
	cmp	w8, #0
	cset	w1, ne
	bl	_FIELD_PREP
	orr	w21, w21, w0
Lloh18:
	adrp	x8, _ETH_DLY_RXC_STAGES@GOTPAGE
Lloh19:
	ldr	x8, [x8, _ETH_DLY_RXC_STAGES@GOTPAGEOFF]
Lloh20:
	ldr	w0, [x8]
	ldr	w1, [x19, #24]
	bl	_FIELD_PREP
	orr	w21, w21, w0
Lloh21:
	adrp	x8, _ETH_DLY_RXC_INV@GOTPAGE
Lloh22:
	ldr	x8, [x8, _ETH_DLY_RXC_INV@GOTPAGEOFF]
Lloh23:
	ldr	w0, [x8]
	ldr	w1, [x19, #28]
	bl	_FIELD_PREP
	orr	w2, w21, w0
	b	LBB0_6
LBB0_2:
	cmp	w8, #128
	b.eq	LBB0_5
; %bb.3:
	cmp	w8, #133
	b.ne	LBB0_8
; %bb.4:
Lloh24:
	adrp	x8, _ETH_DLY_TXC_ENABLE@GOTPAGE
Lloh25:
	ldr	x8, [x8, _ETH_DLY_TXC_ENABLE@GOTPAGEOFF]
Lloh26:
	ldr	w0, [x8]
	ldr	w8, [x19, #16]
	cmp	w8, #0
	cset	w1, ne
	bl	_FIELD_PREP
	mov	x20, x0
Lloh27:
	adrp	x8, _ETH_DLY_TXC_STAGES@GOTPAGE
Lloh28:
	ldr	x8, [x8, _ETH_DLY_TXC_STAGES@GOTPAGEOFF]
Lloh29:
	ldr	w0, [x8]
	ldr	w1, [x19, #16]
	bl	_FIELD_PREP
	orr	w20, w0, w20
Lloh30:
	adrp	x8, _ETH_DLY_TXC_INV@GOTPAGE
Lloh31:
	ldr	x8, [x8, _ETH_DLY_TXC_INV@GOTPAGEOFF]
Lloh32:
	ldr	w0, [x8]
	ldr	w1, [x19, #20]
	bl	_FIELD_PREP
	orr	w20, w20, w0
Lloh33:
	adrp	x8, _ETH_DLY_RXC_ENABLE@GOTPAGE
Lloh34:
	ldr	x8, [x8, _ETH_DLY_RXC_ENABLE@GOTPAGEOFF]
Lloh35:
	ldr	w0, [x8]
	ldr	w8, [x19, #24]
	cmp	w8, #0
	cset	w1, ne
	bl	_FIELD_PREP
	orr	w20, w20, w0
Lloh36:
	adrp	x8, _ETH_DLY_RXC_STAGES@GOTPAGE
Lloh37:
	ldr	x8, [x8, _ETH_DLY_RXC_STAGES@GOTPAGEOFF]
Lloh38:
	ldr	w0, [x8]
	ldr	w1, [x19, #24]
	bl	_FIELD_PREP
	orr	w21, w20, w0
Lloh39:
	adrp	x8, _ETH_DLY_RXC_INV@GOTPAGE
Lloh40:
	ldr	x8, [x8, _ETH_DLY_RXC_INV@GOTPAGEOFF]
Lloh41:
	ldr	w0, [x8]
	ldr	w1, [x19, #28]
	bl	_FIELD_PREP
	mov	w20, #0
	orr	w2, w21, w0
	b	LBB0_6
LBB0_5:
	ldr	w8, [x19, #12]
Lloh42:
	adrp	x9, _ETH_DLY_TXC_ENABLE@GOTPAGE
Lloh43:
	ldr	x9, [x9, _ETH_DLY_TXC_ENABLE@GOTPAGEOFF]
Lloh44:
	adrp	x10, _ETH_DLY_RXC_ENABLE@GOTPAGE
Lloh45:
	ldr	x10, [x10, _ETH_DLY_RXC_ENABLE@GOTPAGEOFF]
	ldr	w11, [x19, #24]
	cmp	w11, #0
	cset	w1, ne
	cmp	w8, #0
	csel	x8, x9, x10, eq
	ldr	w0, [x8]
Lloh46:
	adrp	x8, _ETH_DLY_TXC_STAGES@GOTPAGE
Lloh47:
	ldr	x8, [x8, _ETH_DLY_TXC_STAGES@GOTPAGEOFF]
Lloh48:
	adrp	x9, _ETH_DLY_RXC_STAGES@GOTPAGE
Lloh49:
	ldr	x9, [x9, _ETH_DLY_RXC_STAGES@GOTPAGEOFF]
Lloh50:
	adrp	x10, _ETH_DLY_TXC_INV@GOTPAGE
Lloh51:
	ldr	x10, [x10, _ETH_DLY_TXC_INV@GOTPAGEOFF]
	csel	x21, x8, x9, eq
Lloh52:
	adrp	x8, _ETH_DLY_RXC_INV@GOTPAGE
Lloh53:
	ldr	x8, [x8, _ETH_DLY_RXC_INV@GOTPAGEOFF]
	csel	x22, x10, x8, eq
	bl	_FIELD_PREP
	mov	x20, x0
	ldr	w0, [x21]
	ldr	w1, [x19, #24]
	bl	_FIELD_PREP
	orr	w20, w0, w20
	ldr	w0, [x22]
	ldr	w1, [x19, #28]
	bl	_FIELD_PREP
	orr	w2, w20, w0
	ldr	w8, [x19, #20]
Lloh54:
	adrp	x9, _ETH_RMII_DLY_TX_INV@GOTPAGE
Lloh55:
	ldr	x9, [x9, _ETH_RMII_DLY_TX_INV@GOTPAGEOFF]
Lloh56:
	ldr	w9, [x9]
	cmp	w8, #0
	csel	w20, wzr, w9, eq
LBB0_6:
	ldr	w0, [x19, #4]
Lloh57:
	adrp	x8, _PERI_ETH_DLY@GOTPAGE
Lloh58:
	ldr	x8, [x8, _PERI_ETH_DLY@GOTPAGEOFF]
Lloh59:
	ldr	w1, [x8]
	bl	_regmap_write
	ldr	w0, [x19, #4]
Lloh60:
	adrp	x8, _PERI_ETH_DLY_FINE@GOTPAGE
Lloh61:
	ldr	x8, [x8, _PERI_ETH_DLY_FINE@GOTPAGEOFF]
Lloh62:
	ldr	w1, [x8]
	mov	x2, x20
	bl	_regmap_write
	mov	w0, #0
LBB0_7:
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
LBB0_8:
	ldr	w0, [x19, #8]
Lloh63:
	adrp	x1, l_.str@PAGE
Lloh64:
	add	x1, x1, l_.str@PAGEOFF
	bl	_dev_err
Lloh65:
	adrp	x8, _EINVAL@GOTPAGE
Lloh66:
	ldr	x8, [x8, _EINVAL@GOTPAGEOFF]
Lloh67:
	ldr	w8, [x8]
	neg	w0, w8
	b	LBB0_7
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh39, Lloh40, Lloh41
	.loh AdrpLdrGotLdr	Lloh36, Lloh37, Lloh38
	.loh AdrpLdrGotLdr	Lloh33, Lloh34, Lloh35
	.loh AdrpLdrGotLdr	Lloh30, Lloh31, Lloh32
	.loh AdrpLdrGotLdr	Lloh27, Lloh28, Lloh29
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.loh AdrpLdrGotLdr	Lloh54, Lloh55, Lloh56
	.loh AdrpLdrGot	Lloh52, Lloh53
	.loh AdrpLdrGot	Lloh50, Lloh51
	.loh AdrpLdrGot	Lloh48, Lloh49
	.loh AdrpLdrGot	Lloh46, Lloh47
	.loh AdrpLdrGot	Lloh44, Lloh45
	.loh AdrpLdrGot	Lloh42, Lloh43
	.loh AdrpLdrGotLdr	Lloh60, Lloh61, Lloh62
	.loh AdrpLdrGotLdr	Lloh57, Lloh58, Lloh59
	.loh AdrpLdrGotLdr	Lloh65, Lloh66, Lloh67
	.loh AdrpAdd	Lloh63, Lloh64
	.cfi_endproc
                                        ; -- End function
	.comm	_ETH_DLY_TXC_ENABLE,4,2         ; @ETH_DLY_TXC_ENABLE
	.comm	_ETH_DLY_TXC_STAGES,4,2         ; @ETH_DLY_TXC_STAGES
	.comm	_ETH_DLY_TXC_INV,4,2            ; @ETH_DLY_TXC_INV
	.comm	_ETH_DLY_RXC_ENABLE,4,2         ; @ETH_DLY_RXC_ENABLE
	.comm	_ETH_DLY_RXC_STAGES,4,2         ; @ETH_DLY_RXC_STAGES
	.comm	_ETH_DLY_RXC_INV,4,2            ; @ETH_DLY_RXC_INV
	.comm	_ETH_RMII_DLY_TX_INV,4,2        ; @ETH_RMII_DLY_TX_INV
	.comm	_ETH_FINE_DLY_GTXC,4,2          ; @ETH_FINE_DLY_GTXC
	.comm	_ETH_FINE_DLY_RXC,4,2           ; @ETH_FINE_DLY_RXC
	.comm	_ETH_DLY_GTXC_ENABLE,4,2        ; @ETH_DLY_GTXC_ENABLE
	.comm	_ETH_DLY_GTXC_STAGES,4,2        ; @ETH_DLY_GTXC_STAGES
	.comm	_ETH_DLY_GTXC_INV,4,2           ; @ETH_DLY_GTXC_INV
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"phy interface not supported\n"

	.comm	_EINVAL,4,2                     ; @EINVAL
	.comm	_PERI_ETH_DLY,4,2               ; @PERI_ETH_DLY
	.comm	_PERI_ETH_DLY_FINE,4,2          ; @PERI_ETH_DLY_FINE
	.no_dead_strip	_mt2712_set_delay
.subsections_via_symbols
