	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function pci_vc_do_save_buffer
_pci_vc_do_save_buffer:                 ## @pci_vc_do_save_buffer
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$56, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%esi, %r15d
	movq	%rdi, -56(%rbp)                 ## 8-byte Spill
	movb	$1, %bl
	testq	%rdx, %rdx
	movl	%ecx, -60(%rbp)                 ## 4-byte Spill
	je	LBB0_1
## %bb.4:
	movq	8(%rdx), %r13
	testq	%r13, %r13
	je	LBB0_1
## %bb.5:
	movq	(%rdx), %r14
	xorl	%ebx, %ebx
	movq	-56(%rbp), %r12                 ## 8-byte Reload
	movq	%r12, %rdi
	movl	%r15d, %esi
	xorl	%edx, %edx
	callq	_pci_vc_do_save_buffer
	cltq
	cmpq	%rax, %r14
	je	LBB0_2
## %bb.6:
	leaq	L_.str(%rip), %rsi
	movq	%r12, %rdi
	movl	%r15d, %edx
	callq	_pci_err
	movq	_ENOMEM@GOTPCREL(%rip), %rax
	subl	(%rax), %ebx
	jmp	LBB0_48
LBB0_1:
	xorl	%r13d, %r13d
LBB0_2:
	movq	_PCI_VC_PORT_CAP1@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	addl	%r15d, %esi
	leaq	-80(%rbp), %rdx
	movq	-56(%rbp), %rdi                 ## 8-byte Reload
	callq	_pci_read_config_dword
	movl	-80(%rbp), %edx
	movq	_PCI_VC_CAP1_EVCC@GOTPCREL(%rip), %rax
	movl	%r15d, %ecx
	movl	(%rax), %r15d
	andl	%edx, %r15d
	movq	_PCI_VC_CAP1_LPEVCC@GOTPCREL(%rip), %rax
	movl	(%rax), %r14d
	andl	%edx, %r14d
	shrl	$4, %r14d
	movq	_PCI_VC_CAP1_ARB_SIZE@GOTPCREL(%rip), %rax
	andl	(%rax), %edx
	testb	%bl, %bl
	movl	%ecx, -44(%rbp)                 ## 4-byte Spill
	movl	%edx, -64(%rbp)                 ## 4-byte Spill
	je	LBB0_7
## %bb.3:
	xorl	%edx, %edx
	movq	-56(%rbp), %rbx                 ## 8-byte Reload
	testb	%r14b, %r14b
	je	LBB0_12
LBB0_13:
	movq	%rdx, %r12
	movq	_PCI_VC_PORT_CAP2@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	addl	-44(%rbp), %esi                 ## 4-byte Folded Reload
	leaq	-72(%rbp), %rdx
	movq	%rbx, %rdi
	callq	_pci_read_config_dword
	movl	-72(%rbp), %eax
	movq	_PCI_VC_CAP2_ARB_OFF@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	andl	%eax, %esi
	sarl	$20, %esi
	andl	$-16, %esi
	je	LBB0_14
## %bb.15:
	movq	_PCI_VC_CAP2_128_PHASE@GOTPCREL(%rip), %rdx
	movl	$128, %ecx
	testl	%eax, (%rdx)
	movq	%r12, %rdx
	jne	LBB0_18
## %bb.16:
	movq	_PCI_VC_CAP2_64_PHASE@GOTPCREL(%rip), %rdi
	movl	$64, %ecx
	testl	%eax, (%rdi)
	jne	LBB0_18
## %bb.17:
	movq	_PCI_VC_CAP2_32_PHASE@GOTPCREL(%rip), %rdi
	xorl	%ecx, %ecx
	testl	%eax, (%rdi)
	setne	%cl
	shll	$5, %ecx
LBB0_18:
	movsbl	%r14b, %eax
	incl	%eax
	imull	%ecx, %eax
	movzwl	%ax, %ecx
	shrl	$15, %ecx
	addl	%eax, %ecx
	movswl	%cx, %ebx
	shrl	%ebx
	movl	%eax, %ecx
	orl	$1, %ecx
	cmpl	$3, %ecx
	jb	LBB0_23
## %bb.19:
	testq	%rdx, %rdx
	je	LBB0_23
## %bb.20:
	addl	-44(%rbp), %esi                 ## 4-byte Folded Reload
	leal	7(%rax), %ecx
	testw	%ax, %ax
	cmovnsl	%eax, %ecx
	movswl	%cx, %ecx
	sarl	$3, %ecx
	movq	-56(%rbp), %rdi                 ## 8-byte Reload
	movq	%rdx, %r14
	movl	-60(%rbp), %r12d                ## 4-byte Reload
	movl	%r12d, %r8d
	callq	_pci_vc_save_restore_dwords
	testl	%r12d, %r12d
	jne	LBB0_22
## %bb.21:
	movq	-56(%rbp), %rdi                 ## 8-byte Reload
	movl	-44(%rbp), %esi                 ## 4-byte Reload
	callq	_pci_vc_load_arb_table
LBB0_22:
	movswq	%bx, %rax
	leaq	(%r14,%rax,4), %rdx
LBB0_23:
	addl	$4, %ebx
	movswl	%bx, %r14d
	movq	-56(%rbp), %rbx                 ## 8-byte Reload
	testb	$-128, %r15b
	je	LBB0_25
	jmp	LBB0_47
LBB0_7:
	movslq	%ecx, %rsi
	movq	_PCI_VC_PORT_CTRL@GOTPCREL(%rip), %rax
	addq	(%rax), %rsi
	cmpl	$0, -60(%rbp)                   ## 4-byte Folded Reload
	je	LBB0_9
## %bb.8:
	movq	-56(%rbp), %rbx                 ## 8-byte Reload
	movq	%rbx, %rdi
	movq	%r13, %r12
	movq	%r13, %rdx
	callq	_pci_read_config_word
	jmp	LBB0_10
LBB0_14:
	movl	$4, %r14d
	movq	%r12, %rdx
	testb	$-128, %r15b
	je	LBB0_25
	jmp	LBB0_47
LBB0_9:
	movq	%r13, %r12
	movl	(%r13), %edx
	movq	-56(%rbp), %rbx                 ## 8-byte Reload
	movq	%rbx, %rdi
	callq	_pci_write_config_word
LBB0_10:
	addq	$16, %r12
	movq	%r12, %rdx
	testb	%r14b, %r14b
	jne	LBB0_13
LBB0_12:
	movl	$4, %r14d
	testb	$-128, %r15b
	jne	LBB0_47
LBB0_25:
	movl	-64(%rbp), %ecx                 ## 4-byte Reload
	sarl	$10, %ecx
	movzbl	%r15b, %eax
	movl	$16777216, %esi                 ## imm = 0x1000000
                                        ## kill: def $cl killed $cl killed $ecx
	shll	%cl, %esi
	sarl	$24, %esi
	movl	%esi, -76(%rbp)                 ## 4-byte Spill
	incl	%eax
	movl	%eax, -64(%rbp)                 ## 4-byte Spill
	xorl	%r12d, %r12d
	movl	-44(%rbp), %r15d                ## 4-byte Reload
	jmp	LBB0_26
	.p2align	4, 0x90
LBB0_37:                                ##   in Loop: Header=BB0_26 Depth=1
	xorl	%edx, %edx
LBB0_46:                                ##   in Loop: Header=BB0_26 Depth=1
	addl	$4, %r14d
	incl	%r12d
	cmpl	%r12d, -64(%rbp)                ## 4-byte Folded Reload
	je	LBB0_47
LBB0_26:                                ## =>This Inner Loop Header: Depth=1
	movq	%rdx, %r13
	movq	_PCI_VC_RES_CAP@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	addl	%r15d, %eax
	movq	_PCI_CAP_VC_PER_VC_SIZEOF@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	imull	%r12d, %esi
	addl	%eax, %esi
	movq	%rbx, %rdi
	leaq	-72(%rbp), %rdx
	callq	_pci_read_config_dword
	movl	-72(%rbp), %ecx
	movq	_PCI_VC_RES_CAP_ARB_OFF@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	andl	%ecx, %esi
	sarl	$20, %esi
	andl	$-16, %esi
	je	LBB0_27
## %bb.28:                              ##   in Loop: Header=BB0_26 Depth=1
	movl	$256, %eax                      ## imm = 0x100
	movq	_PCI_VC_RES_CAP_256_PHASE@GOTPCREL(%rip), %rdx
	testl	%ecx, (%rdx)
	jne	LBB0_32
## %bb.29:                              ##   in Loop: Header=BB0_26 Depth=1
	movq	_PCI_VC_RES_CAP_128_PHASE_TB@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	_PCI_VC_RES_CAP_128_PHASE@GOTPCREL(%rip), %rax
	orl	(%rax), %edx
	movl	$128, %eax
	testl	%ecx, %edx
	jne	LBB0_32
## %bb.30:                              ##   in Loop: Header=BB0_26 Depth=1
	movl	$64, %eax
	movq	_PCI_VC_RES_CAP_64_PHASE@GOTPCREL(%rip), %rdx
	testl	%ecx, (%rdx)
	jne	LBB0_32
## %bb.31:                              ##   in Loop: Header=BB0_26 Depth=1
	xorl	%eax, %eax
	movq	_PCI_VC_RES_CAP_32_PHASE@GOTPCREL(%rip), %rdx
	testl	%ecx, (%rdx)
	setne	%al
	shll	$5, %eax
	.p2align	4, 0x90
LBB0_32:                                ##   in Loop: Header=BB0_26 Depth=1
	imull	-76(%rbp), %eax                 ## 4-byte Folded Reload
	leal	7(%rax), %ecx
	testw	%ax, %ax
	cmovnsl	%eax, %ecx
	movswl	%cx, %ebx
	sarl	$3, %ebx
	movl	%eax, %ecx
	orl	$7, %ecx
	cmpl	$15, %ecx
	movq	%r13, %rdx
	jb	LBB0_35
## %bb.33:                              ##   in Loop: Header=BB0_26 Depth=1
	testq	%rdx, %rdx
	je	LBB0_35
## %bb.34:                              ##   in Loop: Header=BB0_26 Depth=1
	addl	%r15d, %esi
	leal	31(%rax), %ecx
	testw	%ax, %ax
	cmovnsl	%eax, %ecx
	movswl	%cx, %ecx
	sarl	$5, %ecx
	movq	-56(%rbp), %rdi                 ## 8-byte Reload
	movl	-60(%rbp), %r8d                 ## 4-byte Reload
	callq	_pci_vc_save_restore_dwords
	movq	%r13, %rdx
	movslq	%ebx, %rax
	leaq	(,%rax,4), %rdx
	addq	%r13, %rdx
LBB0_35:                                ##   in Loop: Header=BB0_26 Depth=1
	addl	%ebx, %r14d
	movq	-56(%rbp), %rbx                 ## 8-byte Reload
	testq	%rdx, %rdx
	jne	LBB0_38
	jmp	LBB0_37
	.p2align	4, 0x90
LBB0_27:                                ##   in Loop: Header=BB0_26 Depth=1
	movq	%r13, %rdx
	testq	%rdx, %rdx
	je	LBB0_37
LBB0_38:                                ##   in Loop: Header=BB0_26 Depth=1
	movq	_PCI_VC_RES_CTRL@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	addl	%r15d, %eax
	movq	_PCI_CAP_VC_PER_VC_SIZEOF@GOTPCREL(%rip), %rcx
	movl	(%rcx), %r15d
	imull	%r12d, %r15d
	addl	%eax, %r15d
	movl	-60(%rbp), %eax                 ## 4-byte Reload
	testl	%eax, %eax
	je	LBB0_40
## %bb.39:                              ##   in Loop: Header=BB0_26 Depth=1
	movq	%rbx, %r13
	movq	%rbx, %rdi
	movl	%r15d, %esi
	movq	%rdx, %rbx
	callq	_pci_read_config_dword
	movl	-44(%rbp), %r15d                ## 4-byte Reload
	jmp	LBB0_45
	.p2align	4, 0x90
LBB0_40:                                ##   in Loop: Header=BB0_26 Depth=1
	movq	%rbx, %r13
	movq	%rdx, -88(%rbp)                 ## 8-byte Spill
	movl	(%rdx), %ebx
	movq	%r13, %rdi
	movl	%r15d, %esi
	leaq	-68(%rbp), %rdx
	callq	_pci_read_config_dword
	movl	-68(%rbp), %edx
	xorl	%ebx, %edx
	movq	_PCI_VC_RES_CTRL_ENABLE@GOTPCREL(%rip), %rax
	andl	(%rax), %edx
	xorl	%ebx, %edx
	movl	%edx, -68(%rbp)
	movq	%r13, %rdi
	movl	%r15d, %esi
	callq	_pci_write_config_dword
	movq	_PCI_VC_RES_CTRL_ARB_SELECT@GOTPCREL(%rip), %rax
	testl	%ebx, (%rax)
	movl	-44(%rbp), %r15d                ## 4-byte Reload
	je	LBB0_42
## %bb.41:                              ##   in Loop: Header=BB0_26 Depth=1
	movq	%r13, %rdi
	movl	%r15d, %esi
	movl	%r12d, %edx
	callq	_pci_vc_load_port_arb_table
LBB0_42:                                ##   in Loop: Header=BB0_26 Depth=1
	xorl	-68(%rbp), %ebx
	movq	_PCI_VC_RES_CTRL_ENABLE@GOTPCREL(%rip), %rax
	testl	%ebx, (%rax)
	je	LBB0_44
## %bb.43:                              ##   in Loop: Header=BB0_26 Depth=1
	movq	%r13, %rdi
	movl	%r15d, %esi
	movl	%r12d, %edx
	callq	_pci_vc_enable
LBB0_44:                                ##   in Loop: Header=BB0_26 Depth=1
	movq	-88(%rbp), %rbx                 ## 8-byte Reload
LBB0_45:                                ##   in Loop: Header=BB0_26 Depth=1
	addq	$16, %rbx
	movq	%rbx, %rdx
	movq	%r13, %rbx
	jmp	LBB0_46
LBB0_47:
	xorl	%ebx, %ebx
	testq	%rdx, %rdx
	cmovel	%r14d, %ebx
LBB0_48:
	movl	%ebx, %eax
	addq	$56, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"VC save buffer size does not match @0x%x\n"

	.comm	_ENOMEM,4,2                     ## @ENOMEM
	.comm	_PCI_VC_PORT_CAP1,4,2           ## @PCI_VC_PORT_CAP1
	.comm	_PCI_VC_CAP1_EVCC,4,2           ## @PCI_VC_CAP1_EVCC
	.comm	_PCI_VC_CAP1_LPEVCC,4,2         ## @PCI_VC_CAP1_LPEVCC
	.comm	_PCI_VC_CAP1_ARB_SIZE,4,2       ## @PCI_VC_CAP1_ARB_SIZE
	.comm	_PCI_VC_PORT_CTRL,8,3           ## @PCI_VC_PORT_CTRL
	.comm	_PCI_VC_PORT_CAP2,4,2           ## @PCI_VC_PORT_CAP2
	.comm	_PCI_VC_CAP2_ARB_OFF,4,2        ## @PCI_VC_CAP2_ARB_OFF
	.comm	_PCI_VC_CAP2_128_PHASE,4,2      ## @PCI_VC_CAP2_128_PHASE
	.comm	_PCI_VC_CAP2_64_PHASE,4,2       ## @PCI_VC_CAP2_64_PHASE
	.comm	_PCI_VC_CAP2_32_PHASE,4,2       ## @PCI_VC_CAP2_32_PHASE
	.comm	_PCI_VC_RES_CAP,4,2             ## @PCI_VC_RES_CAP
	.comm	_PCI_CAP_VC_PER_VC_SIZEOF,4,2   ## @PCI_CAP_VC_PER_VC_SIZEOF
	.comm	_PCI_VC_RES_CAP_ARB_OFF,4,2     ## @PCI_VC_RES_CAP_ARB_OFF
	.comm	_PCI_VC_RES_CAP_256_PHASE,4,2   ## @PCI_VC_RES_CAP_256_PHASE
	.comm	_PCI_VC_RES_CAP_128_PHASE,4,2   ## @PCI_VC_RES_CAP_128_PHASE
	.comm	_PCI_VC_RES_CAP_128_PHASE_TB,4,2 ## @PCI_VC_RES_CAP_128_PHASE_TB
	.comm	_PCI_VC_RES_CAP_64_PHASE,4,2    ## @PCI_VC_RES_CAP_64_PHASE
	.comm	_PCI_VC_RES_CAP_32_PHASE,4,2    ## @PCI_VC_RES_CAP_32_PHASE
	.comm	_PCI_VC_RES_CTRL,4,2            ## @PCI_VC_RES_CTRL
	.comm	_PCI_VC_RES_CTRL_ENABLE,4,2     ## @PCI_VC_RES_CTRL_ENABLE
	.comm	_PCI_VC_RES_CTRL_ARB_SELECT,4,2 ## @PCI_VC_RES_CTRL_ARB_SELECT
	.no_dead_strip	_pci_vc_do_save_buffer
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function pci_vc_do_save_buffer
_pci_vc_do_save_buffer:                 ; @pci_vc_do_save_buffer
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #112
	.cfi_def_cfa_offset 112
	stp	x28, x27, [sp, #16]             ; 16-byte Folded Spill
	stp	x26, x25, [sp, #32]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #48]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #64]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #80]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #96]             ; 16-byte Folded Spill
	add	x29, sp, #96
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	str	w3, [sp]                        ; 4-byte Folded Spill
	mov	x19, x1
	mov	x20, x0
	cbz	x2, LBB0_4
; %bb.1:
	ldr	x22, [x2, #8]
	cbz	x22, LBB0_5
; %bb.2:
	ldr	x21, [x2]
	mov	x0, x20
	mov	x1, x19
	mov	x2, #0
	ldr	w3, [sp]                        ; 4-byte Folded Reload
	bl	_pci_vc_do_save_buffer
	cmp	x21, w0, sxtw
	b.ne	LBB0_10
; %bb.3:
	mov	w25, #0
	b	LBB0_6
LBB0_4:
	mov	x22, #0
LBB0_5:
	mov	w25, #1
LBB0_6:
Lloh0:
	adrp	x8, _PCI_VC_PORT_CAP1@GOTPAGE
Lloh1:
	ldr	x8, [x8, _PCI_VC_PORT_CAP1@GOTPAGEOFF]
Lloh2:
	ldr	w8, [x8]
	add	w1, w8, w19
	add	x2, sp, #12
	mov	x0, x20
	bl	_pci_read_config_dword
	ldr	w24, [sp, #12]
Lloh3:
	adrp	x8, _PCI_VC_CAP1_EVCC@GOTPAGE
Lloh4:
	ldr	x8, [x8, _PCI_VC_CAP1_EVCC@GOTPAGEOFF]
Lloh5:
	ldr	w8, [x8]
Lloh6:
	adrp	x9, _PCI_VC_CAP1_LPEVCC@GOTPAGE
Lloh7:
	ldr	x9, [x9, _PCI_VC_CAP1_LPEVCC@GOTPAGEOFF]
	and	w26, w8, w24
Lloh8:
	ldr	w8, [x9]
	and	w23, w8, w24
Lloh9:
	adrp	x8, _PCI_VC_CAP1_ARB_SIZE@GOTPAGE
Lloh10:
	ldr	x8, [x8, _PCI_VC_CAP1_ARB_SIZE@GOTPAGEOFF]
Lloh11:
	ldr	w27, [x8]
	tbz	w25, #0, LBB0_8
; %bb.7:
	mov	x22, #0
	ubfx	w8, w23, #4, #8
	cbnz	w8, LBB0_13
	b	LBB0_16
LBB0_8:
Lloh12:
	adrp	x8, _PCI_VC_PORT_CTRL@GOTPAGE
Lloh13:
	ldr	x8, [x8, _PCI_VC_PORT_CTRL@GOTPAGEOFF]
Lloh14:
	ldr	x8, [x8]
	add	x1, x8, w19, sxtw
	ldr	w8, [sp]                        ; 4-byte Folded Reload
	cbz	w8, LBB0_11
; %bb.9:
	mov	x0, x20
	mov	x2, x22
	bl	_pci_read_config_word
	b	LBB0_12
LBB0_10:
Lloh15:
	adrp	x1, l_.str@PAGE
Lloh16:
	add	x1, x1, l_.str@PAGEOFF
	mov	x0, x20
	mov	x2, x19
	bl	_pci_err
Lloh17:
	adrp	x8, _ENOMEM@GOTPAGE
Lloh18:
	ldr	x8, [x8, _ENOMEM@GOTPAGEOFF]
Lloh19:
	ldr	w8, [x8]
	neg	w0, w8
	b	LBB0_48
LBB0_11:
	ldr	w2, [x22]
	mov	x0, x20
	bl	_pci_write_config_word
LBB0_12:
	add	x22, x22, #16
	ubfx	w8, w23, #4, #8
	cbz	w8, LBB0_16
LBB0_13:
Lloh20:
	adrp	x8, _PCI_VC_PORT_CAP2@GOTPAGE
Lloh21:
	ldr	x8, [x8, _PCI_VC_PORT_CAP2@GOTPAGEOFF]
Lloh22:
	ldr	w8, [x8]
	add	w1, w8, w19
	add	x2, sp, #8
	mov	x0, x20
	bl	_pci_read_config_dword
	ldr	w10, [sp, #8]
Lloh23:
	adrp	x8, _PCI_VC_CAP2_ARB_OFF@GOTPAGE
Lloh24:
	ldr	x8, [x8, _PCI_VC_CAP2_ARB_OFF@GOTPAGEOFF]
Lloh25:
	ldr	w8, [x8]
	and	w8, w8, w10
	asr	w8, w8, #20
	ands	w8, w8, #0xfffffff0
	b.eq	LBB0_16
; %bb.14:
	lsr	w9, w23, #4
Lloh26:
	adrp	x11, _PCI_VC_CAP2_128_PHASE@GOTPAGE
Lloh27:
	ldr	x11, [x11, _PCI_VC_CAP2_128_PHASE@GOTPAGEOFF]
Lloh28:
	ldr	w11, [x11]
	tst	w11, w10
	b.eq	LBB0_17
; %bb.15:
	mov	w10, #128
	b	LBB0_20
LBB0_16:
	mov	w25, #4
	tbz	w26, #7, LBB0_25
	b	LBB0_47
LBB0_17:
Lloh29:
	adrp	x11, _PCI_VC_CAP2_64_PHASE@GOTPAGE
Lloh30:
	ldr	x11, [x11, _PCI_VC_CAP2_64_PHASE@GOTPAGEOFF]
Lloh31:
	ldr	w11, [x11]
	tst	w11, w10
	b.eq	LBB0_19
; %bb.18:
	mov	w10, #64
	b	LBB0_20
LBB0_19:
Lloh32:
	adrp	x11, _PCI_VC_CAP2_32_PHASE@GOTPAGE
Lloh33:
	ldr	x11, [x11, _PCI_VC_CAP2_32_PHASE@GOTPAGEOFF]
Lloh34:
	ldr	w11, [x11]
	tst	w11, w10
	cset	w10, ne
	lsl	w10, w10, #5
LBB0_20:
	sxtb	w9, w9
	madd	w9, w10, w9, w10
	and	w10, w9, #0x8000
	add	w10, w9, w10, lsr #15
	sbfx	w23, w10, #1, #15
	orr	w10, w9, #0x1
	cmp	w10, #3
	ccmp	x22, #0, #4, hs
	b.eq	LBB0_24
; %bb.21:
	sxth	w10, w9
	add	w1, w8, w19
	ubfx	w8, w10, #28, #3
	add	w8, w9, w8
	sbfx	w3, w8, #3, #13
	mov	x0, x20
	mov	x2, x22
	ldr	w21, [sp]                       ; 4-byte Folded Reload
	mov	x4, x21
	bl	_pci_vc_save_restore_dwords
	cbnz	w21, LBB0_23
; %bb.22:
	mov	x0, x20
	mov	x1, x19
	bl	_pci_vc_load_arb_table
LBB0_23:
	add	x22, x22, w23, sxtw #2
LBB0_24:
	add	w25, w23, #4
	tbnz	w26, #7, LBB0_47
LBB0_25:
	mov	w23, #0
	and	w8, w27, w24
	asr	w8, w8, #10
	and	w9, w26, #0xff
	mov	w10, #16777216
	lsl	w8, w10, w8
	asr	w27, w8, #24
	add	w28, w9, #1
Lloh35:
	adrp	x26, _PCI_CAP_VC_PER_VC_SIZEOF@GOTPAGE
Lloh36:
	ldr	x26, [x26, _PCI_CAP_VC_PER_VC_SIZEOF@GOTPAGEOFF]
	b	LBB0_29
LBB0_26:                                ;   in Loop: Header=BB0_29 Depth=1
	mov	x0, x20
	mov	x1, x24
	mov	x2, x22
	bl	_pci_read_config_dword
LBB0_27:                                ;   in Loop: Header=BB0_29 Depth=1
	add	x22, x22, #16
LBB0_28:                                ;   in Loop: Header=BB0_29 Depth=1
	add	w25, w25, #4
	add	w23, w23, #1
	cmp	w28, w23
	b.eq	LBB0_47
LBB0_29:                                ; =>This Inner Loop Header: Depth=1
Lloh37:
	adrp	x8, _PCI_VC_RES_CAP@GOTPAGE
Lloh38:
	ldr	x8, [x8, _PCI_VC_RES_CAP@GOTPAGEOFF]
Lloh39:
	ldr	w8, [x8]
	add	w8, w8, w19
	ldr	w9, [x26]
	madd	w1, w9, w23, w8
	add	x2, sp, #8
	mov	x0, x20
	bl	_pci_read_config_dword
	ldr	w9, [sp, #8]
Lloh40:
	adrp	x8, _PCI_VC_RES_CAP_ARB_OFF@GOTPAGE
Lloh41:
	ldr	x8, [x8, _PCI_VC_RES_CAP_ARB_OFF@GOTPAGEOFF]
Lloh42:
	ldr	w8, [x8]
	and	w8, w8, w9
	asr	w8, w8, #20
	ands	w8, w8, #0xfffffff0
	b.eq	LBB0_41
; %bb.30:                               ;   in Loop: Header=BB0_29 Depth=1
Lloh43:
	adrp	x10, _PCI_VC_RES_CAP_256_PHASE@GOTPAGE
Lloh44:
	ldr	x10, [x10, _PCI_VC_RES_CAP_256_PHASE@GOTPAGEOFF]
Lloh45:
	ldr	w10, [x10]
	tst	w10, w9
	b.eq	LBB0_32
; %bb.31:                               ;   in Loop: Header=BB0_29 Depth=1
	mov	w9, #256
	b	LBB0_37
LBB0_32:                                ;   in Loop: Header=BB0_29 Depth=1
Lloh46:
	adrp	x10, _PCI_VC_RES_CAP_128_PHASE@GOTPAGE
Lloh47:
	ldr	x10, [x10, _PCI_VC_RES_CAP_128_PHASE@GOTPAGEOFF]
Lloh48:
	ldr	w10, [x10]
Lloh49:
	adrp	x11, _PCI_VC_RES_CAP_128_PHASE_TB@GOTPAGE
Lloh50:
	ldr	x11, [x11, _PCI_VC_RES_CAP_128_PHASE_TB@GOTPAGEOFF]
Lloh51:
	ldr	w11, [x11]
	orr	w10, w11, w10
	tst	w10, w9
	b.eq	LBB0_34
; %bb.33:                               ;   in Loop: Header=BB0_29 Depth=1
	mov	w9, #128
	b	LBB0_37
LBB0_34:                                ;   in Loop: Header=BB0_29 Depth=1
Lloh52:
	adrp	x10, _PCI_VC_RES_CAP_64_PHASE@GOTPAGE
Lloh53:
	ldr	x10, [x10, _PCI_VC_RES_CAP_64_PHASE@GOTPAGEOFF]
Lloh54:
	ldr	w10, [x10]
	tst	w10, w9
	b.eq	LBB0_36
; %bb.35:                               ;   in Loop: Header=BB0_29 Depth=1
	mov	w9, #64
	b	LBB0_37
LBB0_36:                                ;   in Loop: Header=BB0_29 Depth=1
Lloh55:
	adrp	x10, _PCI_VC_RES_CAP_32_PHASE@GOTPAGE
Lloh56:
	ldr	x10, [x10, _PCI_VC_RES_CAP_32_PHASE@GOTPAGEOFF]
Lloh57:
	ldr	w10, [x10]
	tst	w10, w9
	cset	w9, ne
	lsl	w9, w9, #5
LBB0_37:                                ;   in Loop: Header=BB0_29 Depth=1
	mul	w9, w9, w27
	sxth	w10, w9
	ubfx	w11, w10, #28, #3
	add	w11, w9, w11
	sbfx	w21, w11, #3, #13
	orr	w11, w9, #0x7
	cmp	w11, #15
	b.lo	LBB0_40
; %bb.38:                               ;   in Loop: Header=BB0_29 Depth=1
	cbz	x22, LBB0_40
; %bb.39:                               ;   in Loop: Header=BB0_29 Depth=1
	add	w1, w8, w19
	ubfx	w8, w10, #26, #5
	add	w8, w9, w8
	sbfx	w3, w8, #5, #11
	mov	x0, x20
	mov	x2, x22
	ldr	w4, [sp]                        ; 4-byte Folded Reload
	bl	_pci_vc_save_restore_dwords
	add	x22, x22, w21, sxtw #2
LBB0_40:                                ;   in Loop: Header=BB0_29 Depth=1
	add	w25, w25, w21
LBB0_41:                                ;   in Loop: Header=BB0_29 Depth=1
	cbz	x22, LBB0_28
; %bb.42:                               ;   in Loop: Header=BB0_29 Depth=1
Lloh58:
	adrp	x8, _PCI_VC_RES_CTRL@GOTPAGE
Lloh59:
	ldr	x8, [x8, _PCI_VC_RES_CTRL@GOTPAGEOFF]
Lloh60:
	ldr	w8, [x8]
	add	w8, w8, w19
	ldr	w9, [x26]
	madd	w24, w9, w23, w8
	ldr	w8, [sp]                        ; 4-byte Folded Reload
	cbnz	w8, LBB0_26
; %bb.43:                               ;   in Loop: Header=BB0_29 Depth=1
	ldr	w21, [x22]
	add	x2, sp, #4
	mov	x0, x20
	mov	x1, x24
	bl	_pci_read_config_dword
Lloh61:
	adrp	x8, _PCI_VC_RES_CTRL_ENABLE@GOTPAGE
Lloh62:
	ldr	x8, [x8, _PCI_VC_RES_CTRL_ENABLE@GOTPAGEOFF]
Lloh63:
	ldr	w8, [x8]
	ldr	w9, [sp, #4]
	and	w9, w9, w8
	bic	w8, w21, w8
	orr	w2, w9, w8
	str	w2, [sp, #4]
	mov	x0, x20
	mov	x1, x24
	bl	_pci_write_config_dword
Lloh64:
	adrp	x8, _PCI_VC_RES_CTRL_ARB_SELECT@GOTPAGE
Lloh65:
	ldr	x8, [x8, _PCI_VC_RES_CTRL_ARB_SELECT@GOTPAGEOFF]
Lloh66:
	ldr	w8, [x8]
	tst	w8, w21
	b.eq	LBB0_45
; %bb.44:                               ;   in Loop: Header=BB0_29 Depth=1
	mov	x0, x20
	mov	x1, x19
	mov	x2, x23
	bl	_pci_vc_load_port_arb_table
LBB0_45:                                ;   in Loop: Header=BB0_29 Depth=1
	ldr	w8, [sp, #4]
	eor	w8, w8, w21
Lloh67:
	adrp	x9, _PCI_VC_RES_CTRL_ENABLE@GOTPAGE
Lloh68:
	ldr	x9, [x9, _PCI_VC_RES_CTRL_ENABLE@GOTPAGEOFF]
Lloh69:
	ldr	w9, [x9]
	tst	w8, w9
	b.eq	LBB0_27
; %bb.46:                               ;   in Loop: Header=BB0_29 Depth=1
	mov	x0, x20
	mov	x1, x19
	mov	x2, x23
	bl	_pci_vc_enable
	b	LBB0_27
LBB0_47:
	cmp	x22, #0
	csel	w0, w25, wzr, eq
LBB0_48:
	ldp	x29, x30, [sp, #96]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #80]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #64]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #48]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #32]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #112
	ret
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh19
	.loh AdrpAdd	Lloh15, Lloh16
	.loh AdrpLdrGotLdr	Lloh23, Lloh24, Lloh25
	.loh AdrpLdrGotLdr	Lloh20, Lloh21, Lloh22
	.loh AdrpLdrGotLdr	Lloh26, Lloh27, Lloh28
	.loh AdrpLdrGotLdr	Lloh29, Lloh30, Lloh31
	.loh AdrpLdrGotLdr	Lloh32, Lloh33, Lloh34
	.loh AdrpLdrGot	Lloh35, Lloh36
	.loh AdrpLdrGotLdr	Lloh40, Lloh41, Lloh42
	.loh AdrpLdrGotLdr	Lloh37, Lloh38, Lloh39
	.loh AdrpLdrGotLdr	Lloh43, Lloh44, Lloh45
	.loh AdrpLdrGotLdr	Lloh49, Lloh50, Lloh51
	.loh AdrpLdrGotLdr	Lloh46, Lloh47, Lloh48
	.loh AdrpLdrGotLdr	Lloh52, Lloh53, Lloh54
	.loh AdrpLdrGotLdr	Lloh55, Lloh56, Lloh57
	.loh AdrpLdrGotLdr	Lloh58, Lloh59, Lloh60
	.loh AdrpLdrGotLdr	Lloh64, Lloh65, Lloh66
	.loh AdrpLdrGotLdr	Lloh61, Lloh62, Lloh63
	.loh AdrpLdrGotLdr	Lloh67, Lloh68, Lloh69
	.cfi_endproc
                                        ; -- End function
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"VC save buffer size does not match @0x%x\n"

	.comm	_ENOMEM,4,2                     ; @ENOMEM
	.comm	_PCI_VC_PORT_CAP1,4,2           ; @PCI_VC_PORT_CAP1
	.comm	_PCI_VC_CAP1_EVCC,4,2           ; @PCI_VC_CAP1_EVCC
	.comm	_PCI_VC_CAP1_LPEVCC,4,2         ; @PCI_VC_CAP1_LPEVCC
	.comm	_PCI_VC_CAP1_ARB_SIZE,4,2       ; @PCI_VC_CAP1_ARB_SIZE
	.comm	_PCI_VC_PORT_CTRL,8,3           ; @PCI_VC_PORT_CTRL
	.comm	_PCI_VC_PORT_CAP2,4,2           ; @PCI_VC_PORT_CAP2
	.comm	_PCI_VC_CAP2_ARB_OFF,4,2        ; @PCI_VC_CAP2_ARB_OFF
	.comm	_PCI_VC_CAP2_128_PHASE,4,2      ; @PCI_VC_CAP2_128_PHASE
	.comm	_PCI_VC_CAP2_64_PHASE,4,2       ; @PCI_VC_CAP2_64_PHASE
	.comm	_PCI_VC_CAP2_32_PHASE,4,2       ; @PCI_VC_CAP2_32_PHASE
	.comm	_PCI_VC_RES_CAP,4,2             ; @PCI_VC_RES_CAP
	.comm	_PCI_CAP_VC_PER_VC_SIZEOF,4,2   ; @PCI_CAP_VC_PER_VC_SIZEOF
	.comm	_PCI_VC_RES_CAP_ARB_OFF,4,2     ; @PCI_VC_RES_CAP_ARB_OFF
	.comm	_PCI_VC_RES_CAP_256_PHASE,4,2   ; @PCI_VC_RES_CAP_256_PHASE
	.comm	_PCI_VC_RES_CAP_128_PHASE,4,2   ; @PCI_VC_RES_CAP_128_PHASE
	.comm	_PCI_VC_RES_CAP_128_PHASE_TB,4,2 ; @PCI_VC_RES_CAP_128_PHASE_TB
	.comm	_PCI_VC_RES_CAP_64_PHASE,4,2    ; @PCI_VC_RES_CAP_64_PHASE
	.comm	_PCI_VC_RES_CAP_32_PHASE,4,2    ; @PCI_VC_RES_CAP_32_PHASE
	.comm	_PCI_VC_RES_CTRL,4,2            ; @PCI_VC_RES_CTRL
	.comm	_PCI_VC_RES_CTRL_ENABLE,4,2     ; @PCI_VC_RES_CTRL_ENABLE
	.comm	_PCI_VC_RES_CTRL_ARB_SELECT,4,2 ; @PCI_VC_RES_CTRL_ARB_SELECT
	.no_dead_strip	_pci_vc_do_save_buffer
.subsections_via_symbols
