	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function sh_eth_tsu_init
_sh_eth_tsu_init:                       ## @sh_eth_tsu_init
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r14
	pushq	%rbx
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	movq	%rdi, %rbx
	movq	(%rdi), %rax
	cmpl	$0, (%rax)
	je	LBB0_1
## %bb.2:
	movq	_TSU_FWEN0@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	xorl	%r14d, %r14d
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	_sh_eth_tsu_write
	movq	_TSU_FWEN1@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	_sh_eth_tsu_write
	movq	_TSU_FCM@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	_sh_eth_tsu_write
	movq	_TSU_BSYSL0@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	movl	$12, %esi
	callq	_sh_eth_tsu_write
	movq	_TSU_BSYSL1@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	movl	$12, %esi
	callq	_sh_eth_tsu_write
	movq	_TSU_PRISL0@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	_sh_eth_tsu_write
	movq	_TSU_PRISL1@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	_sh_eth_tsu_write
	movq	_TSU_FWSL0@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	_sh_eth_tsu_write
	movq	_TSU_FWSL1@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	_sh_eth_tsu_write
	movq	_TSU_FWSLC_POSTENU@GOTPCREL(%rip), %rax
	movq	_TSU_FWSLC_POSTENL@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	orl	(%rax), %esi
	movq	_TSU_FWSLC@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	callq	_sh_eth_tsu_write
	movq	_TSU_QTAGM0@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	_sh_eth_tsu_write
	movq	_TSU_QTAGM1@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	_sh_eth_tsu_write
	movq	_TSU_FWSR@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	_sh_eth_tsu_write
	movq	_TSU_FWINMK@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	_sh_eth_tsu_write
	movq	_TSU_TEN@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	_sh_eth_tsu_write
	movq	_TSU_POST1@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	_sh_eth_tsu_write
	movq	_TSU_POST2@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	_sh_eth_tsu_write
	movq	_TSU_POST3@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	_sh_eth_tsu_write
	movq	_TSU_POST4@GOTPCREL(%rip), %rax
	jmp	LBB0_3
LBB0_1:
	movq	_TSU_TEN@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	_sh_eth_tsu_write
	movq	_TSU_FWSLC_POSTENU@GOTPCREL(%rip), %rax
	movq	_TSU_FWSLC_POSTENL@GOTPCREL(%rip), %rcx
	movl	(%rcx), %r14d
	orl	(%rax), %r14d
	movq	_TSU_FWSLC@GOTPCREL(%rip), %rax
LBB0_3:
	movl	(%rax), %edx
	movq	%rbx, %rdi
	movl	%r14d, %esi
	popq	%rbx
	popq	%r14
	popq	%rbp
	jmp	_sh_eth_tsu_write               ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_TSU_TEN,4,2                    ## @TSU_TEN
	.comm	_TSU_FWSLC_POSTENU,4,2          ## @TSU_FWSLC_POSTENU
	.comm	_TSU_FWSLC_POSTENL,4,2          ## @TSU_FWSLC_POSTENL
	.comm	_TSU_FWSLC,4,2                  ## @TSU_FWSLC
	.comm	_TSU_FWEN0,4,2                  ## @TSU_FWEN0
	.comm	_TSU_FWEN1,4,2                  ## @TSU_FWEN1
	.comm	_TSU_FCM,4,2                    ## @TSU_FCM
	.comm	_TSU_BSYSL0,4,2                 ## @TSU_BSYSL0
	.comm	_TSU_BSYSL1,4,2                 ## @TSU_BSYSL1
	.comm	_TSU_PRISL0,4,2                 ## @TSU_PRISL0
	.comm	_TSU_PRISL1,4,2                 ## @TSU_PRISL1
	.comm	_TSU_FWSL0,4,2                  ## @TSU_FWSL0
	.comm	_TSU_FWSL1,4,2                  ## @TSU_FWSL1
	.comm	_TSU_QTAGM0,4,2                 ## @TSU_QTAGM0
	.comm	_TSU_QTAGM1,4,2                 ## @TSU_QTAGM1
	.comm	_TSU_FWSR,4,2                   ## @TSU_FWSR
	.comm	_TSU_FWINMK,4,2                 ## @TSU_FWINMK
	.comm	_TSU_POST1,4,2                  ## @TSU_POST1
	.comm	_TSU_POST2,4,2                  ## @TSU_POST2
	.comm	_TSU_POST3,4,2                  ## @TSU_POST3
	.comm	_TSU_POST4,4,2                  ## @TSU_POST4
	.no_dead_strip	_sh_eth_tsu_init
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function sh_eth_tsu_init
_sh_eth_tsu_init:                       ; @sh_eth_tsu_init
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x19, x0
	ldr	x8, [x0]
	ldr	w8, [x8]
	cbz	w8, LBB0_2
; %bb.1:
Lloh0:
	adrp	x8, _TSU_FWEN0@GOTPAGE
Lloh1:
	ldr	x8, [x8, _TSU_FWEN0@GOTPAGEOFF]
Lloh2:
	ldr	w2, [x8]
	mov	x0, x19
	mov	w1, #0
	bl	_sh_eth_tsu_write
Lloh3:
	adrp	x8, _TSU_FWEN1@GOTPAGE
Lloh4:
	ldr	x8, [x8, _TSU_FWEN1@GOTPAGEOFF]
Lloh5:
	ldr	w2, [x8]
	mov	x0, x19
	mov	w1, #0
	bl	_sh_eth_tsu_write
Lloh6:
	adrp	x8, _TSU_FCM@GOTPAGE
Lloh7:
	ldr	x8, [x8, _TSU_FCM@GOTPAGEOFF]
Lloh8:
	ldr	w2, [x8]
	mov	x0, x19
	mov	w1, #0
	bl	_sh_eth_tsu_write
Lloh9:
	adrp	x8, _TSU_BSYSL0@GOTPAGE
Lloh10:
	ldr	x8, [x8, _TSU_BSYSL0@GOTPAGEOFF]
Lloh11:
	ldr	w2, [x8]
	mov	x0, x19
	mov	w1, #12
	bl	_sh_eth_tsu_write
Lloh12:
	adrp	x8, _TSU_BSYSL1@GOTPAGE
Lloh13:
	ldr	x8, [x8, _TSU_BSYSL1@GOTPAGEOFF]
Lloh14:
	ldr	w2, [x8]
	mov	x0, x19
	mov	w1, #12
	bl	_sh_eth_tsu_write
Lloh15:
	adrp	x8, _TSU_PRISL0@GOTPAGE
Lloh16:
	ldr	x8, [x8, _TSU_PRISL0@GOTPAGEOFF]
Lloh17:
	ldr	w2, [x8]
	mov	x0, x19
	mov	w1, #0
	bl	_sh_eth_tsu_write
Lloh18:
	adrp	x8, _TSU_PRISL1@GOTPAGE
Lloh19:
	ldr	x8, [x8, _TSU_PRISL1@GOTPAGEOFF]
Lloh20:
	ldr	w2, [x8]
	mov	x0, x19
	mov	w1, #0
	bl	_sh_eth_tsu_write
Lloh21:
	adrp	x8, _TSU_FWSL0@GOTPAGE
Lloh22:
	ldr	x8, [x8, _TSU_FWSL0@GOTPAGEOFF]
Lloh23:
	ldr	w2, [x8]
	mov	x0, x19
	mov	w1, #0
	bl	_sh_eth_tsu_write
Lloh24:
	adrp	x8, _TSU_FWSL1@GOTPAGE
Lloh25:
	ldr	x8, [x8, _TSU_FWSL1@GOTPAGEOFF]
Lloh26:
	ldr	w2, [x8]
	mov	x0, x19
	mov	w1, #0
	bl	_sh_eth_tsu_write
Lloh27:
	adrp	x8, _TSU_FWSLC_POSTENU@GOTPAGE
Lloh28:
	ldr	x8, [x8, _TSU_FWSLC_POSTENU@GOTPAGEOFF]
Lloh29:
	adrp	x9, _TSU_FWSLC_POSTENL@GOTPAGE
Lloh30:
	ldr	x9, [x9, _TSU_FWSLC_POSTENL@GOTPAGEOFF]
Lloh31:
	ldr	w8, [x8]
Lloh32:
	ldr	w9, [x9]
	orr	w1, w9, w8
Lloh33:
	adrp	x8, _TSU_FWSLC@GOTPAGE
Lloh34:
	ldr	x8, [x8, _TSU_FWSLC@GOTPAGEOFF]
Lloh35:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_sh_eth_tsu_write
Lloh36:
	adrp	x8, _TSU_QTAGM0@GOTPAGE
Lloh37:
	ldr	x8, [x8, _TSU_QTAGM0@GOTPAGEOFF]
Lloh38:
	ldr	w2, [x8]
	mov	x0, x19
	mov	w1, #0
	bl	_sh_eth_tsu_write
Lloh39:
	adrp	x8, _TSU_QTAGM1@GOTPAGE
Lloh40:
	ldr	x8, [x8, _TSU_QTAGM1@GOTPAGEOFF]
Lloh41:
	ldr	w2, [x8]
	mov	x0, x19
	mov	w1, #0
	bl	_sh_eth_tsu_write
Lloh42:
	adrp	x8, _TSU_FWSR@GOTPAGE
Lloh43:
	ldr	x8, [x8, _TSU_FWSR@GOTPAGEOFF]
Lloh44:
	ldr	w2, [x8]
	mov	x0, x19
	mov	w1, #0
	bl	_sh_eth_tsu_write
Lloh45:
	adrp	x8, _TSU_FWINMK@GOTPAGE
Lloh46:
	ldr	x8, [x8, _TSU_FWINMK@GOTPAGEOFF]
Lloh47:
	ldr	w2, [x8]
	mov	x0, x19
	mov	w1, #0
	bl	_sh_eth_tsu_write
Lloh48:
	adrp	x8, _TSU_TEN@GOTPAGE
Lloh49:
	ldr	x8, [x8, _TSU_TEN@GOTPAGEOFF]
Lloh50:
	ldr	w2, [x8]
	mov	x0, x19
	mov	w1, #0
	bl	_sh_eth_tsu_write
Lloh51:
	adrp	x8, _TSU_POST1@GOTPAGE
Lloh52:
	ldr	x8, [x8, _TSU_POST1@GOTPAGEOFF]
Lloh53:
	ldr	w2, [x8]
	mov	x0, x19
	mov	w1, #0
	bl	_sh_eth_tsu_write
Lloh54:
	adrp	x8, _TSU_POST2@GOTPAGE
Lloh55:
	ldr	x8, [x8, _TSU_POST2@GOTPAGEOFF]
Lloh56:
	ldr	w2, [x8]
	mov	x0, x19
	mov	w1, #0
	bl	_sh_eth_tsu_write
Lloh57:
	adrp	x8, _TSU_POST3@GOTPAGE
Lloh58:
	ldr	x8, [x8, _TSU_POST3@GOTPAGEOFF]
Lloh59:
	ldr	w2, [x8]
	mov	x0, x19
	mov	w1, #0
	bl	_sh_eth_tsu_write
	mov	w1, #0
Lloh60:
	adrp	x8, _TSU_POST4@GOTPAGE
Lloh61:
	ldr	x8, [x8, _TSU_POST4@GOTPAGEOFF]
	b	LBB0_3
LBB0_2:
Lloh62:
	adrp	x8, _TSU_TEN@GOTPAGE
Lloh63:
	ldr	x8, [x8, _TSU_TEN@GOTPAGEOFF]
Lloh64:
	ldr	w2, [x8]
	mov	x0, x19
	mov	w1, #0
	bl	_sh_eth_tsu_write
Lloh65:
	adrp	x8, _TSU_FWSLC_POSTENU@GOTPAGE
Lloh66:
	ldr	x8, [x8, _TSU_FWSLC_POSTENU@GOTPAGEOFF]
Lloh67:
	ldr	w8, [x8]
Lloh68:
	adrp	x9, _TSU_FWSLC_POSTENL@GOTPAGE
Lloh69:
	ldr	x9, [x9, _TSU_FWSLC_POSTENL@GOTPAGEOFF]
Lloh70:
	ldr	w9, [x9]
	orr	w1, w9, w8
Lloh71:
	adrp	x8, _TSU_FWSLC@GOTPAGE
Lloh72:
	ldr	x8, [x8, _TSU_FWSLC@GOTPAGEOFF]
LBB0_3:
	ldr	w2, [x8]
	mov	x0, x19
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	b	_sh_eth_tsu_write
	.loh AdrpLdrGot	Lloh60, Lloh61
	.loh AdrpLdrGotLdr	Lloh57, Lloh58, Lloh59
	.loh AdrpLdrGotLdr	Lloh54, Lloh55, Lloh56
	.loh AdrpLdrGotLdr	Lloh51, Lloh52, Lloh53
	.loh AdrpLdrGotLdr	Lloh48, Lloh49, Lloh50
	.loh AdrpLdrGotLdr	Lloh45, Lloh46, Lloh47
	.loh AdrpLdrGotLdr	Lloh42, Lloh43, Lloh44
	.loh AdrpLdrGotLdr	Lloh39, Lloh40, Lloh41
	.loh AdrpLdrGotLdr	Lloh36, Lloh37, Lloh38
	.loh AdrpLdrGotLdr	Lloh33, Lloh34, Lloh35
	.loh AdrpLdrGotLdr	Lloh29, Lloh30, Lloh32
	.loh AdrpLdrGotLdr	Lloh27, Lloh28, Lloh31
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGot	Lloh71, Lloh72
	.loh AdrpLdrGotLdr	Lloh68, Lloh69, Lloh70
	.loh AdrpLdrGotLdr	Lloh65, Lloh66, Lloh67
	.loh AdrpLdrGotLdr	Lloh62, Lloh63, Lloh64
	.cfi_endproc
                                        ; -- End function
	.comm	_TSU_TEN,4,2                    ; @TSU_TEN
	.comm	_TSU_FWSLC_POSTENU,4,2          ; @TSU_FWSLC_POSTENU
	.comm	_TSU_FWSLC_POSTENL,4,2          ; @TSU_FWSLC_POSTENL
	.comm	_TSU_FWSLC,4,2                  ; @TSU_FWSLC
	.comm	_TSU_FWEN0,4,2                  ; @TSU_FWEN0
	.comm	_TSU_FWEN1,4,2                  ; @TSU_FWEN1
	.comm	_TSU_FCM,4,2                    ; @TSU_FCM
	.comm	_TSU_BSYSL0,4,2                 ; @TSU_BSYSL0
	.comm	_TSU_BSYSL1,4,2                 ; @TSU_BSYSL1
	.comm	_TSU_PRISL0,4,2                 ; @TSU_PRISL0
	.comm	_TSU_PRISL1,4,2                 ; @TSU_PRISL1
	.comm	_TSU_FWSL0,4,2                  ; @TSU_FWSL0
	.comm	_TSU_FWSL1,4,2                  ; @TSU_FWSL1
	.comm	_TSU_QTAGM0,4,2                 ; @TSU_QTAGM0
	.comm	_TSU_QTAGM1,4,2                 ; @TSU_QTAGM1
	.comm	_TSU_FWSR,4,2                   ; @TSU_FWSR
	.comm	_TSU_FWINMK,4,2                 ; @TSU_FWINMK
	.comm	_TSU_POST1,4,2                  ; @TSU_POST1
	.comm	_TSU_POST2,4,2                  ; @TSU_POST2
	.comm	_TSU_POST3,4,2                  ; @TSU_POST3
	.comm	_TSU_POST4,4,2                  ; @TSU_POST4
	.no_dead_strip	_sh_eth_tsu_init
.subsections_via_symbols
