	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function mlx5e_grp_pcie_fill_stats
_mlx5e_grp_pcie_fill_stats:             ## @mlx5e_grp_pcie_fill_stats
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$24, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%edx, %ebx
	movq	%rsi, %r14
	movq	%rdi, %r12
	movl	4(%rdi), %edi
	movq	_pcie_performance_group@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_MLX5_CAP_MCAM_FEATURE
	testq	%rax, %rax
	movq	%r14, -56(%rbp)                 ## 8-byte Spill
	je	LBB0_5
## %bb.1:
	movq	_NUM_PCIE_PERF_COUNTERS@GOTPCREL(%rip), %r13
	cmpl	$0, (%r13)
	jle	LBB0_5
## %bb.2:
	movl	%ebx, -44(%rbp)                 ## 4-byte Spill
	movslq	%ebx, %rax
	leaq	(%r14,%rax,4), %r15
	xorl	%ebx, %ebx
	movq	_pcie_perf_stats_desc@GOTPCREL(%rip), %r14
	.p2align	4, 0x90
LBB0_3:                                 ## =>This Inner Loop Header: Depth=1
	movl	(%r14), %esi
	movq	%r12, %rdi
	movl	%ebx, %edx
	callq	_MLX5E_READ_CTR32_BE
	movl	%eax, (%r15,%rbx,4)
	incq	%rbx
	cmpl	(%r13), %ebx
	jl	LBB0_3
## %bb.4:
	movl	-44(%rbp), %eax                 ## 4-byte Reload
	addl	%ebx, %eax
	movl	%eax, %ebx
	movq	-56(%rbp), %r14                 ## 8-byte Reload
LBB0_5:
	movl	4(%r12), %edi
	movq	_tx_overflow_buffer_pkt@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_MLX5_CAP_MCAM_FEATURE
	testq	%rax, %rax
	je	LBB0_10
## %bb.6:
	movq	_NUM_PCIE_PERF_COUNTERS64@GOTPCREL(%rip), %r13
	cmpl	$0, (%r13)
	jle	LBB0_10
## %bb.7:
	movl	%ebx, -44(%rbp)                 ## 4-byte Spill
	movslq	%ebx, %rax
	leaq	(%r14,%rax,4), %r15
	xorl	%ebx, %ebx
	movq	_pcie_perf_stats_desc64@GOTPCREL(%rip), %r14
	.p2align	4, 0x90
LBB0_8:                                 ## =>This Inner Loop Header: Depth=1
	movl	(%r14), %esi
	movq	%r12, %rdi
	movl	%ebx, %edx
	callq	_MLX5E_READ_CTR64_BE
	movl	%eax, (%r15,%rbx,4)
	incq	%rbx
	cmpl	(%r13), %ebx
	jl	LBB0_8
## %bb.9:
	movl	-44(%rbp), %eax                 ## 4-byte Reload
	addl	%ebx, %eax
	movl	%eax, %ebx
	movq	-56(%rbp), %r14                 ## 8-byte Reload
LBB0_10:
	movl	4(%r12), %edi
	movq	_pcie_outbound_stalled@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_MLX5_CAP_MCAM_FEATURE
	testq	%rax, %rax
	je	LBB0_15
## %bb.11:
	movq	_NUM_PCIE_PERF_STALL_COUNTERS@GOTPCREL(%rip), %r13
	cmpl	$0, (%r13)
	jle	LBB0_15
## %bb.12:
	movl	%ebx, -44(%rbp)                 ## 4-byte Spill
	movslq	%ebx, %rax
	leaq	(%r14,%rax,4), %r15
	xorl	%ebx, %ebx
	movq	_pcie_perf_stall_stats_desc@GOTPCREL(%rip), %r14
	.p2align	4, 0x90
LBB0_13:                                ## =>This Inner Loop Header: Depth=1
	movl	(%r14), %esi
	movq	%r12, %rdi
	movl	%ebx, %edx
	callq	_MLX5E_READ_CTR32_BE
	movl	%eax, (%r15,%rbx,4)
	incq	%rbx
	cmpl	(%r13), %ebx
	jl	LBB0_13
## %bb.14:
	movl	-44(%rbp), %eax                 ## 4-byte Reload
	addl	%ebx, %eax
	movl	%eax, %ebx
LBB0_15:
	movl	%ebx, %eax
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_pcie_performance_group,4,2     ## @pcie_performance_group
	.comm	_NUM_PCIE_PERF_COUNTERS,4,2     ## @NUM_PCIE_PERF_COUNTERS
	.comm	_pcie_perf_stats_desc,4,2       ## @pcie_perf_stats_desc
	.comm	_tx_overflow_buffer_pkt,4,2     ## @tx_overflow_buffer_pkt
	.comm	_NUM_PCIE_PERF_COUNTERS64,4,2   ## @NUM_PCIE_PERF_COUNTERS64
	.comm	_pcie_perf_stats_desc64,4,2     ## @pcie_perf_stats_desc64
	.comm	_pcie_outbound_stalled,4,2      ## @pcie_outbound_stalled
	.comm	_NUM_PCIE_PERF_STALL_COUNTERS,4,2 ## @NUM_PCIE_PERF_STALL_COUNTERS
	.comm	_pcie_perf_stall_stats_desc,4,2 ## @pcie_perf_stall_stats_desc
	.no_dead_strip	_mlx5e_grp_pcie_fill_stats
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function mlx5e_grp_pcie_fill_stats
_mlx5e_grp_pcie_fill_stats:             ; @mlx5e_grp_pcie_fill_stats
	.cfi_startproc
; %bb.0:
	stp	x26, x25, [sp, #-80]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	mov	x19, x2
	mov	x21, x1
	mov	x20, x0
	ldr	w0, [x0, #4]
Lloh0:
	adrp	x8, _pcie_performance_group@GOTPAGE
Lloh1:
	ldr	x8, [x8, _pcie_performance_group@GOTPAGEOFF]
Lloh2:
	ldr	w1, [x8]
	bl	_MLX5_CAP_MCAM_FEATURE
Lloh3:
	adrp	x23, _NUM_PCIE_PERF_COUNTERS@GOTPAGE
Lloh4:
	ldr	x23, [x23, _NUM_PCIE_PERF_COUNTERS@GOTPAGEOFF]
	ldr	w8, [x23]
	cmp	x0, #0
	ccmp	w8, #1, #8, ne
	b.lt	LBB0_4
; %bb.1:
	mov	x22, #0
	add	x24, x21, w19, sxtw #2
Lloh5:
	adrp	x25, _pcie_perf_stats_desc@GOTPAGE
Lloh6:
	ldr	x25, [x25, _pcie_perf_stats_desc@GOTPAGEOFF]
LBB0_2:                                 ; =>This Inner Loop Header: Depth=1
	ldr	w1, [x25]
	mov	x0, x20
	mov	x2, x22
	bl	_MLX5E_READ_CTR32_BE
	str	w0, [x24, x22, lsl #2]
	ldr	w8, [x23]
	add	x22, x22, #1
	cmp	w22, w8
	b.lt	LBB0_2
; %bb.3:
	add	w19, w19, w22
LBB0_4:
	ldr	w0, [x20, #4]
Lloh7:
	adrp	x8, _tx_overflow_buffer_pkt@GOTPAGE
Lloh8:
	ldr	x8, [x8, _tx_overflow_buffer_pkt@GOTPAGEOFF]
Lloh9:
	ldr	w1, [x8]
	bl	_MLX5_CAP_MCAM_FEATURE
Lloh10:
	adrp	x23, _NUM_PCIE_PERF_COUNTERS64@GOTPAGE
Lloh11:
	ldr	x23, [x23, _NUM_PCIE_PERF_COUNTERS64@GOTPAGEOFF]
	ldr	w8, [x23]
	cmp	x0, #0
	ccmp	w8, #1, #8, ne
	b.lt	LBB0_8
; %bb.5:
	mov	x22, #0
	add	x24, x21, w19, sxtw #2
Lloh12:
	adrp	x25, _pcie_perf_stats_desc64@GOTPAGE
Lloh13:
	ldr	x25, [x25, _pcie_perf_stats_desc64@GOTPAGEOFF]
LBB0_6:                                 ; =>This Inner Loop Header: Depth=1
	ldr	w1, [x25]
	mov	x0, x20
	mov	x2, x22
	bl	_MLX5E_READ_CTR64_BE
	str	w0, [x24, x22, lsl #2]
	ldr	w8, [x23]
	add	x22, x22, #1
	cmp	w22, w8
	b.lt	LBB0_6
; %bb.7:
	add	w19, w19, w22
LBB0_8:
	ldr	w0, [x20, #4]
Lloh14:
	adrp	x8, _pcie_outbound_stalled@GOTPAGE
Lloh15:
	ldr	x8, [x8, _pcie_outbound_stalled@GOTPAGEOFF]
Lloh16:
	ldr	w1, [x8]
	bl	_MLX5_CAP_MCAM_FEATURE
Lloh17:
	adrp	x23, _NUM_PCIE_PERF_STALL_COUNTERS@GOTPAGE
Lloh18:
	ldr	x23, [x23, _NUM_PCIE_PERF_STALL_COUNTERS@GOTPAGEOFF]
	ldr	w8, [x23]
	cmp	x0, #0
	ccmp	w8, #1, #8, ne
	b.lt	LBB0_12
; %bb.9:
	mov	x22, #0
	add	x21, x21, w19, sxtw #2
Lloh19:
	adrp	x24, _pcie_perf_stall_stats_desc@GOTPAGE
Lloh20:
	ldr	x24, [x24, _pcie_perf_stall_stats_desc@GOTPAGEOFF]
LBB0_10:                                ; =>This Inner Loop Header: Depth=1
	ldr	w1, [x24]
	mov	x0, x20
	mov	x2, x22
	bl	_MLX5E_READ_CTR32_BE
	str	w0, [x21, x22, lsl #2]
	ldr	w8, [x23]
	add	x22, x22, #1
	cmp	w22, w8
	b.lt	LBB0_10
; %bb.11:
	add	w19, w19, w22
LBB0_12:
	mov	x0, x19
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp], #80             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGot	Lloh3, Lloh4
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGot	Lloh5, Lloh6
	.loh AdrpLdrGot	Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh7, Lloh8, Lloh9
	.loh AdrpLdrGot	Lloh12, Lloh13
	.loh AdrpLdrGot	Lloh17, Lloh18
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh16
	.loh AdrpLdrGot	Lloh19, Lloh20
	.cfi_endproc
                                        ; -- End function
	.comm	_pcie_performance_group,4,2     ; @pcie_performance_group
	.comm	_NUM_PCIE_PERF_COUNTERS,4,2     ; @NUM_PCIE_PERF_COUNTERS
	.comm	_pcie_perf_stats_desc,4,2       ; @pcie_perf_stats_desc
	.comm	_tx_overflow_buffer_pkt,4,2     ; @tx_overflow_buffer_pkt
	.comm	_NUM_PCIE_PERF_COUNTERS64,4,2   ; @NUM_PCIE_PERF_COUNTERS64
	.comm	_pcie_perf_stats_desc64,4,2     ; @pcie_perf_stats_desc64
	.comm	_pcie_outbound_stalled,4,2      ; @pcie_outbound_stalled
	.comm	_NUM_PCIE_PERF_STALL_COUNTERS,4,2 ; @NUM_PCIE_PERF_STALL_COUNTERS
	.comm	_pcie_perf_stall_stats_desc,4,2 ; @pcie_perf_stall_stats_desc
	.no_dead_strip	_mlx5e_grp_pcie_fill_stats
.subsections_via_symbols
