	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_mt7603_wtbl_init               ## -- Begin function mt7603_wtbl_init
	.p2align	4, 0x90
_mt7603_wtbl_init:                      ## @mt7603_wtbl_init
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$24, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rcx, %r14
	movl	%edx, %r12d
	movq	%rdi, %r15
	movl	%esi, -48(%rbp)                 ## 4-byte Spill
	movl	%esi, %edi
	callq	_mt7603_wtbl1_addr
	movq	%rax, -56(%rbp)                 ## 8-byte Spill
	xorl	%ebx, %ebx
	testq	%r14, %r14
	je	LBB0_1
## %bb.2:
	movq	_MT_WTBL1_W0_ADDR_HI@GOTPCREL(%rip), %rax
	movl	(%rax), %r13d
	leaq	4(%r14), %rdi
	callq	_get_unaligned_le16
	movl	%r13d, %edi
	movl	%eax, %esi
	callq	_FIELD_PREP
	movq	%rax, %r13
	movq	_MT_WTBL1_W1_ADDR_LO@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, -44(%rbp)                 ## 4-byte Spill
	movq	%r14, %rdi
	callq	_get_unaligned_le32
	movl	-44(%rbp), %edi                 ## 4-byte Reload
	movl	%eax, %esi
	callq	_FIELD_PREP
	movq	%rax, %r14
	jmp	LBB0_3
LBB0_1:
	xorl	%r13d, %r13d
	xorl	%r14d, %r14d
LBB0_3:
	testl	%r12d, %r12d
	movq	_MT_WTBL1_W0_RX_CHECK_A1@GOTPCREL(%rip), %rax
	cmovlel	%ebx, %r12d
	movl	$0, %ecx
	movq	(%rax), %rbx
	cmovsq	%rcx, %rbx
	movq	_MT_WTBL1_W0_MUAR_IDX@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	%r12d, %esi
	callq	_FIELD_PREP
	orq	%rax, %r13
	orq	%rbx, %r13
	movq	_MT_WTBL_UPDATE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_MT_WTBL_UPDATE_BUSY@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r15, %rdi
	xorl	%ecx, %ecx
	movl	$5000, %r8d                     ## imm = 0x1388
	callq	_mt76_poll
	movq	%r15, %rdi
	movq	-56(%rbp), %rbx                 ## 8-byte Reload
	movq	%rbx, %rsi
	movq	%r13, %rdx
	callq	_mt76_set
	leaq	4(%rbx), %rsi
	movq	%r15, %rdi
	movq	%r14, %rdx
	callq	_mt76_set
	addq	$8, %rbx
	movq	_MT_WTBL1_W2_ADMISSION_CONTROL@GOTPCREL(%rip), %rax
	movq	(%rax), %rdx
	movq	%r15, %rdi
	movq	%rbx, %rsi
	callq	_mt76_set
	movl	$3, %edi
	xorl	%esi, %esi
	callq	_GENMASK
	movq	%r15, %rdi
	movl	%eax, %esi
	callq	_mt76_stop_tx_ac
	movl	-48(%rbp), %r13d                ## 4-byte Reload
	movl	%r13d, %edi
	callq	_mt7603_wtbl2_addr
	movq	_MT_WTBL2_SIZE@GOTPCREL(%rip), %r14
	cmpl	$0, (%r14)
	jle	LBB0_6
## %bb.4:
	movq	%rax, %r12
	xorl	%ebx, %ebx
	.p2align	4, 0x90
LBB0_5:                                 ## =>This Inner Loop Header: Depth=1
	leaq	(%r12,%rbx), %rsi
	movq	%r15, %rdi
	xorl	%edx, %edx
	callq	_mt76_wr
	addq	$4, %rbx
	cmpl	%ebx, (%r14)
	jg	LBB0_5
LBB0_6:
	movq	_MT_WTBL_UPDATE_WTBL2@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r15, %rdi
	movl	%r13d, %esi
	callq	_mt7603_wtbl_update
	movl	$3, %edi
	xorl	%esi, %esi
	callq	_GENMASK
	movq	%r15, %rdi
	movl	%eax, %esi
	callq	_mt76_start_tx_ac
	movl	%r13d, %edi
	callq	_mt7603_wtbl3_addr
	movq	_MT_WTBL3_SIZE@GOTPCREL(%rip), %r14
	cmpl	$0, (%r14)
	jle	LBB0_9
## %bb.7:
	movq	%rax, %r12
	xorl	%ebx, %ebx
	.p2align	4, 0x90
LBB0_8:                                 ## =>This Inner Loop Header: Depth=1
	leaq	(%r12,%rbx), %rsi
	movq	%r15, %rdi
	xorl	%edx, %edx
	callq	_mt76_wr
	addq	$4, %rbx
	cmpl	%ebx, (%r14)
	jg	LBB0_8
LBB0_9:
	movl	%r13d, %edi
	callq	_mt7603_wtbl4_addr
	movq	_MT_WTBL4_SIZE@GOTPCREL(%rip), %r14
	cmpl	$0, (%r14)
	jle	LBB0_12
## %bb.10:
	movq	%rax, %r12
	xorl	%ebx, %ebx
	.p2align	4, 0x90
LBB0_11:                                ## =>This Inner Loop Header: Depth=1
	leaq	(%r12,%rbx), %rsi
	movq	%r15, %rdi
	xorl	%edx, %edx
	callq	_mt76_wr
	addq	$4, %rbx
	cmpl	%ebx, (%r14)
	jg	LBB0_11
LBB0_12:
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_MT_WTBL1_W0_ADDR_HI,4,2        ## @MT_WTBL1_W0_ADDR_HI
	.comm	_MT_WTBL1_W1_ADDR_LO,4,2        ## @MT_WTBL1_W1_ADDR_LO
	.comm	_MT_WTBL1_W0_RX_CHECK_A1,8,3    ## @MT_WTBL1_W0_RX_CHECK_A1
	.comm	_MT_WTBL1_W0_MUAR_IDX,4,2       ## @MT_WTBL1_W0_MUAR_IDX
	.comm	_MT_WTBL_UPDATE,4,2             ## @MT_WTBL_UPDATE
	.comm	_MT_WTBL_UPDATE_BUSY,4,2        ## @MT_WTBL_UPDATE_BUSY
	.comm	_MT_WTBL1_W2_ADMISSION_CONTROL,8,3 ## @MT_WTBL1_W2_ADMISSION_CONTROL
	.comm	_MT_WTBL2_SIZE,4,2              ## @MT_WTBL2_SIZE
	.comm	_MT_WTBL_UPDATE_WTBL2,4,2       ## @MT_WTBL_UPDATE_WTBL2
	.comm	_MT_WTBL3_SIZE,4,2              ## @MT_WTBL3_SIZE
	.comm	_MT_WTBL4_SIZE,4,2              ## @MT_WTBL4_SIZE
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_mt7603_wtbl_init               ; -- Begin function mt7603_wtbl_init
	.p2align	2
_mt7603_wtbl_init:                      ; @mt7603_wtbl_init
	.cfi_startproc
; %bb.0:
	stp	x26, x25, [sp, #-80]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	mov	x23, x3
	mov	x22, x2
	mov	x20, x1
	mov	x19, x0
	mov	x0, x1
	bl	_mt7603_wtbl1_addr
	mov	x21, x0
	cbz	x23, LBB0_2
; %bb.1:
Lloh0:
	adrp	x8, _MT_WTBL1_W0_ADDR_HI@GOTPAGE
Lloh1:
	ldr	x8, [x8, _MT_WTBL1_W0_ADDR_HI@GOTPAGEOFF]
Lloh2:
	ldr	w24, [x8]
	add	x0, x23, #4
	bl	_get_unaligned_le16
	mov	x1, x0
	mov	x0, x24
	bl	_FIELD_PREP
	mov	x24, x0
Lloh3:
	adrp	x8, _MT_WTBL1_W1_ADDR_LO@GOTPAGE
Lloh4:
	ldr	x8, [x8, _MT_WTBL1_W1_ADDR_LO@GOTPAGEOFF]
Lloh5:
	ldr	w25, [x8]
	mov	x0, x23
	bl	_get_unaligned_le32
	mov	x1, x0
	mov	x0, x25
	bl	_FIELD_PREP
	mov	x23, x0
	b	LBB0_3
LBB0_2:
	mov	x24, #0
LBB0_3:
Lloh6:
	adrp	x8, _MT_WTBL1_W0_RX_CHECK_A1@GOTPAGE
Lloh7:
	ldr	x8, [x8, _MT_WTBL1_W0_RX_CHECK_A1@GOTPAGEOFF]
Lloh8:
	ldr	x8, [x8]
	cmp	w22, #0
	csel	w1, w22, wzr, gt
	csel	x8, xzr, x8, lt
	orr	x22, x8, x24
Lloh9:
	adrp	x8, _MT_WTBL1_W0_MUAR_IDX@GOTPAGE
Lloh10:
	ldr	x8, [x8, _MT_WTBL1_W0_MUAR_IDX@GOTPAGEOFF]
Lloh11:
	ldr	w0, [x8]
	bl	_FIELD_PREP
	orr	x22, x22, x0
Lloh12:
	adrp	x8, _MT_WTBL_UPDATE@GOTPAGE
Lloh13:
	ldr	x8, [x8, _MT_WTBL_UPDATE@GOTPAGEOFF]
Lloh14:
	ldr	w1, [x8]
Lloh15:
	adrp	x8, _MT_WTBL_UPDATE_BUSY@GOTPAGE
Lloh16:
	ldr	x8, [x8, _MT_WTBL_UPDATE_BUSY@GOTPAGEOFF]
Lloh17:
	ldr	w2, [x8]
	mov	x0, x19
	mov	w3, #0
	mov	w4, #5000
	bl	_mt76_poll
	mov	x0, x19
	mov	x1, x21
	mov	x2, x22
	bl	_mt76_set
	add	x1, x21, #4
	mov	x0, x19
	mov	x2, x23
	bl	_mt76_set
	add	x1, x21, #8
Lloh18:
	adrp	x8, _MT_WTBL1_W2_ADMISSION_CONTROL@GOTPAGE
Lloh19:
	ldr	x8, [x8, _MT_WTBL1_W2_ADMISSION_CONTROL@GOTPAGEOFF]
Lloh20:
	ldr	x2, [x8]
	mov	x0, x19
	bl	_mt76_set
	mov	w0, #3
	mov	w1, #0
	bl	_GENMASK
	mov	x1, x0
	mov	x0, x19
	bl	_mt76_stop_tx_ac
	mov	x0, x20
	bl	_mt7603_wtbl2_addr
Lloh21:
	adrp	x22, _MT_WTBL2_SIZE@GOTPAGE
Lloh22:
	ldr	x22, [x22, _MT_WTBL2_SIZE@GOTPAGEOFF]
	ldr	w8, [x22]
	cmp	w8, #1
	b.lt	LBB0_6
; %bb.4:
	mov	x21, x0
	mov	x23, #0
LBB0_5:                                 ; =>This Inner Loop Header: Depth=1
	add	x1, x21, x23
	mov	x0, x19
	mov	w2, #0
	bl	_mt76_wr
	add	x23, x23, #4
	ldr	w8, [x22]
	cmp	w8, w23
	b.gt	LBB0_5
LBB0_6:
Lloh23:
	adrp	x8, _MT_WTBL_UPDATE_WTBL2@GOTPAGE
Lloh24:
	ldr	x8, [x8, _MT_WTBL_UPDATE_WTBL2@GOTPAGEOFF]
Lloh25:
	ldr	w2, [x8]
	mov	x0, x19
	mov	x1, x20
	bl	_mt7603_wtbl_update
	mov	w0, #3
	mov	w1, #0
	bl	_GENMASK
	mov	x1, x0
	mov	x0, x19
	bl	_mt76_start_tx_ac
	mov	x0, x20
	bl	_mt7603_wtbl3_addr
Lloh26:
	adrp	x22, _MT_WTBL3_SIZE@GOTPAGE
Lloh27:
	ldr	x22, [x22, _MT_WTBL3_SIZE@GOTPAGEOFF]
	ldr	w8, [x22]
	cmp	w8, #1
	b.lt	LBB0_9
; %bb.7:
	mov	x21, x0
	mov	x23, #0
LBB0_8:                                 ; =>This Inner Loop Header: Depth=1
	add	x1, x21, x23
	mov	x0, x19
	mov	w2, #0
	bl	_mt76_wr
	add	x23, x23, #4
	ldr	w8, [x22]
	cmp	w8, w23
	b.gt	LBB0_8
LBB0_9:
	mov	x0, x20
	bl	_mt7603_wtbl4_addr
Lloh28:
	adrp	x21, _MT_WTBL4_SIZE@GOTPAGE
Lloh29:
	ldr	x21, [x21, _MT_WTBL4_SIZE@GOTPAGEOFF]
	ldr	w8, [x21]
	cmp	w8, #1
	b.lt	LBB0_12
; %bb.10:
	mov	x20, x0
	mov	x22, #0
LBB0_11:                                ; =>This Inner Loop Header: Depth=1
	add	x1, x20, x22
	mov	x0, x19
	mov	w2, #0
	bl	_mt76_wr
	add	x22, x22, #4
	ldr	w8, [x21]
	cmp	w8, w22
	b.gt	LBB0_11
LBB0_12:
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp], #80             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGot	Lloh21, Lloh22
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGot	Lloh26, Lloh27
	.loh AdrpLdrGotLdr	Lloh23, Lloh24, Lloh25
	.loh AdrpLdrGot	Lloh28, Lloh29
	.cfi_endproc
                                        ; -- End function
	.comm	_MT_WTBL1_W0_ADDR_HI,4,2        ; @MT_WTBL1_W0_ADDR_HI
	.comm	_MT_WTBL1_W1_ADDR_LO,4,2        ; @MT_WTBL1_W1_ADDR_LO
	.comm	_MT_WTBL1_W0_RX_CHECK_A1,8,3    ; @MT_WTBL1_W0_RX_CHECK_A1
	.comm	_MT_WTBL1_W0_MUAR_IDX,4,2       ; @MT_WTBL1_W0_MUAR_IDX
	.comm	_MT_WTBL_UPDATE,4,2             ; @MT_WTBL_UPDATE
	.comm	_MT_WTBL_UPDATE_BUSY,4,2        ; @MT_WTBL_UPDATE_BUSY
	.comm	_MT_WTBL1_W2_ADMISSION_CONTROL,8,3 ; @MT_WTBL1_W2_ADMISSION_CONTROL
	.comm	_MT_WTBL2_SIZE,4,2              ; @MT_WTBL2_SIZE
	.comm	_MT_WTBL_UPDATE_WTBL2,4,2       ; @MT_WTBL_UPDATE_WTBL2
	.comm	_MT_WTBL3_SIZE,4,2              ; @MT_WTBL3_SIZE
	.comm	_MT_WTBL4_SIZE,4,2              ; @MT_WTBL4_SIZE
.subsections_via_symbols
