	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_ath5k_hw_pcu_init              ## -- Begin function ath5k_hw_pcu_init
	.p2align	4, 0x90
_ath5k_hw_pcu_init:                     ## @ath5k_hw_pcu_init
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%esi, %r14d
	movq	%rdi, %rbx
	callq	_ath5k_hw_set_bssid
	movq	%rbx, %rdi
	movl	%r14d, %esi
	callq	_ath5k_hw_set_opmode
	movq	(%rbx), %rax
	movq	_AR5K_AR5212@GOTPCREL(%rip), %r15
	cmpq	(%r15), %rax
	jne	LBB0_3
## %bb.1:
	cmpq	$0, 32(%rbx)
	je	LBB0_3
## %bb.2:
	movq	%rbx, %rdi
	callq	_ath5k_hw_write_rate_duration
LBB0_3:
	movq	_AR5K_TUNE_RSSI_THRES@GOTPCREL(%rip), %rax
	movq	_AR5K_TUNE_BMISS_THRES@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	movq	_AR5K_RSSI_THR_BMISS_S@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shll	%cl, %esi
	orl	(%rax), %esi
	movq	_AR5K_RSSI_THR@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	callq	_ath5k_hw_reg_write
	movq	8(%rbx), %rax
	movq	_AR5K_SREV_AR2413@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jl	LBB0_5
## %bb.4:
	movq	_AR5K_MIC_QOS_CTL@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	movl	$65706, %esi                    ## imm = 0x100AA
	callq	_ath5k_hw_reg_write
	movq	_AR5K_MIC_QOS_SEL@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	movl	$12816, %esi                    ## imm = 0x3210
	callq	_ath5k_hw_reg_write
LBB0_5:
	movq	(%rbx), %rax
	cmpq	(%r15), %rax
	jne	LBB0_7
## %bb.6:
	movq	_AR5K_QOS_NOACK_2BIT_VALUES@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	$2, %edi
	callq	_AR5K_REG_SM
	movl	%eax, %r14d
	movq	_AR5K_QOS_NOACK_BIT_OFFSET@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	$5, %edi
	callq	_AR5K_REG_SM
	orl	%eax, %r14d
	movq	_AR5K_QOS_NOACK_BYTE_OFFSET@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	xorl	%edi, %edi
	callq	_AR5K_REG_SM
	orl	%eax, %r14d
	movq	_AR5K_QOS_NOACK@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	movl	%r14d, %esi
	callq	_ath5k_hw_reg_write
LBB0_7:
	movq	16(%rbx), %rsi
	testq	%rsi, %rsi
	jle	LBB0_9
## %bb.8:
	movq	%rbx, %rdi
	callq	_ath5k_hw_set_coverage_class
LBB0_9:
	movq	(%rbx), %rax
	cmpq	(%r15), %rax
	jne	LBB0_12
## %bb.10:
	movq	_AR5K_STA_ID1_BASE_RATE_11B@GOTPCREL(%rip), %rax
	movq	_AR5K_STA_ID1_ACKCTS_6MB@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	orl	(%rax), %edx
	cmpq	$0, 24(%rbx)
	movq	_AR5K_STA_ID1@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	je	LBB0_11
## %bb.13:
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_AR5K_REG_DISABLE_BITS          ## TAILCALL
LBB0_12:
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_11:
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_AR5K_REG_ENABLE_BITS           ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_AR5K_AR5212,8,3                ## @AR5K_AR5212
	.comm	_AR5K_TUNE_RSSI_THRES,4,2       ## @AR5K_TUNE_RSSI_THRES
	.comm	_AR5K_TUNE_BMISS_THRES,4,2      ## @AR5K_TUNE_BMISS_THRES
	.comm	_AR5K_RSSI_THR_BMISS_S,4,2      ## @AR5K_RSSI_THR_BMISS_S
	.comm	_AR5K_RSSI_THR,4,2              ## @AR5K_RSSI_THR
	.comm	_AR5K_SREV_AR2413,8,3           ## @AR5K_SREV_AR2413
	.comm	_AR5K_MIC_QOS_CTL,4,2           ## @AR5K_MIC_QOS_CTL
	.comm	_AR5K_MIC_QOS_SEL,4,2           ## @AR5K_MIC_QOS_SEL
	.comm	_AR5K_QOS_NOACK_2BIT_VALUES,4,2 ## @AR5K_QOS_NOACK_2BIT_VALUES
	.comm	_AR5K_QOS_NOACK_BIT_OFFSET,4,2  ## @AR5K_QOS_NOACK_BIT_OFFSET
	.comm	_AR5K_QOS_NOACK_BYTE_OFFSET,4,2 ## @AR5K_QOS_NOACK_BYTE_OFFSET
	.comm	_AR5K_QOS_NOACK,4,2             ## @AR5K_QOS_NOACK
	.comm	_AR5K_STA_ID1_BASE_RATE_11B,4,2 ## @AR5K_STA_ID1_BASE_RATE_11B
	.comm	_AR5K_STA_ID1_ACKCTS_6MB,4,2    ## @AR5K_STA_ID1_ACKCTS_6MB
	.comm	_AR5K_STA_ID1,4,2               ## @AR5K_STA_ID1
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_ath5k_hw_pcu_init              ; -- Begin function ath5k_hw_pcu_init
	.p2align	2
_ath5k_hw_pcu_init:                     ; @ath5k_hw_pcu_init
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x20, x1
	mov	x19, x0
	bl	_ath5k_hw_set_bssid
	mov	x0, x19
	mov	x1, x20
	bl	_ath5k_hw_set_opmode
	ldr	x8, [x19]
Lloh0:
	adrp	x21, _AR5K_AR5212@GOTPAGE
Lloh1:
	ldr	x21, [x21, _AR5K_AR5212@GOTPAGEOFF]
	ldr	x9, [x21]
	cmp	x8, x9
	b.ne	LBB0_3
; %bb.1:
	ldr	x8, [x19, #32]
	cbz	x8, LBB0_3
; %bb.2:
	mov	x0, x19
	bl	_ath5k_hw_write_rate_duration
LBB0_3:
Lloh2:
	adrp	x8, _AR5K_TUNE_RSSI_THRES@GOTPAGE
Lloh3:
	ldr	x8, [x8, _AR5K_TUNE_RSSI_THRES@GOTPAGEOFF]
Lloh4:
	ldr	w8, [x8]
Lloh5:
	adrp	x9, _AR5K_TUNE_BMISS_THRES@GOTPAGE
Lloh6:
	ldr	x9, [x9, _AR5K_TUNE_BMISS_THRES@GOTPAGEOFF]
Lloh7:
	ldr	w9, [x9]
Lloh8:
	adrp	x10, _AR5K_RSSI_THR_BMISS_S@GOTPAGE
Lloh9:
	ldr	x10, [x10, _AR5K_RSSI_THR_BMISS_S@GOTPAGEOFF]
Lloh10:
	ldr	w10, [x10]
	lsl	w9, w9, w10
	orr	w1, w9, w8
Lloh11:
	adrp	x8, _AR5K_RSSI_THR@GOTPAGE
Lloh12:
	ldr	x8, [x8, _AR5K_RSSI_THR@GOTPAGEOFF]
Lloh13:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_ath5k_hw_reg_write
	ldr	x8, [x19, #8]
Lloh14:
	adrp	x9, _AR5K_SREV_AR2413@GOTPAGE
Lloh15:
	ldr	x9, [x9, _AR5K_SREV_AR2413@GOTPAGEOFF]
Lloh16:
	ldr	x9, [x9]
	cmp	x8, x9
	b.lt	LBB0_5
; %bb.4:
Lloh17:
	adrp	x8, _AR5K_MIC_QOS_CTL@GOTPAGE
Lloh18:
	ldr	x8, [x8, _AR5K_MIC_QOS_CTL@GOTPAGEOFF]
Lloh19:
	ldr	w2, [x8]
	mov	x0, x19
	mov	w1, #170
	movk	w1, #1, lsl #16
	bl	_ath5k_hw_reg_write
Lloh20:
	adrp	x8, _AR5K_MIC_QOS_SEL@GOTPAGE
Lloh21:
	ldr	x8, [x8, _AR5K_MIC_QOS_SEL@GOTPAGEOFF]
Lloh22:
	ldr	w2, [x8]
	mov	x0, x19
	mov	w1, #12816
	bl	_ath5k_hw_reg_write
LBB0_5:
	ldr	x8, [x19]
	ldr	x9, [x21]
	cmp	x8, x9
	b.ne	LBB0_7
; %bb.6:
Lloh23:
	adrp	x8, _AR5K_QOS_NOACK_2BIT_VALUES@GOTPAGE
Lloh24:
	ldr	x8, [x8, _AR5K_QOS_NOACK_2BIT_VALUES@GOTPAGEOFF]
Lloh25:
	ldr	w1, [x8]
	mov	w0, #2
	bl	_AR5K_REG_SM
	mov	x20, x0
Lloh26:
	adrp	x8, _AR5K_QOS_NOACK_BIT_OFFSET@GOTPAGE
Lloh27:
	ldr	x8, [x8, _AR5K_QOS_NOACK_BIT_OFFSET@GOTPAGEOFF]
Lloh28:
	ldr	w1, [x8]
	mov	w0, #5
	bl	_AR5K_REG_SM
	orr	w20, w0, w20
Lloh29:
	adrp	x8, _AR5K_QOS_NOACK_BYTE_OFFSET@GOTPAGE
Lloh30:
	ldr	x8, [x8, _AR5K_QOS_NOACK_BYTE_OFFSET@GOTPAGEOFF]
Lloh31:
	ldr	w1, [x8]
	mov	w0, #0
	bl	_AR5K_REG_SM
	orr	w1, w20, w0
Lloh32:
	adrp	x8, _AR5K_QOS_NOACK@GOTPAGE
Lloh33:
	ldr	x8, [x8, _AR5K_QOS_NOACK@GOTPAGEOFF]
Lloh34:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_ath5k_hw_reg_write
LBB0_7:
	ldr	x1, [x19, #16]
	cmp	x1, #1
	b.lt	LBB0_9
; %bb.8:
	mov	x0, x19
	bl	_ath5k_hw_set_coverage_class
LBB0_9:
	ldr	x8, [x19]
	ldr	x9, [x21]
	cmp	x8, x9
	b.ne	LBB0_12
; %bb.10:
Lloh35:
	adrp	x8, _AR5K_STA_ID1_BASE_RATE_11B@GOTPAGE
Lloh36:
	ldr	x8, [x8, _AR5K_STA_ID1_BASE_RATE_11B@GOTPAGEOFF]
Lloh37:
	ldr	w8, [x8]
Lloh38:
	adrp	x9, _AR5K_STA_ID1_ACKCTS_6MB@GOTPAGE
Lloh39:
	ldr	x9, [x9, _AR5K_STA_ID1_ACKCTS_6MB@GOTPAGEOFF]
Lloh40:
	ldr	w9, [x9]
	orr	w2, w9, w8
	ldr	x8, [x19, #24]
Lloh41:
	adrp	x9, _AR5K_STA_ID1@GOTPAGE
Lloh42:
	ldr	x9, [x9, _AR5K_STA_ID1@GOTPAGEOFF]
Lloh43:
	ldr	w1, [x9]
	mov	x0, x19
	cbz	x8, LBB0_13
; %bb.11:
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	_AR5K_REG_DISABLE_BITS
LBB0_12:
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
LBB0_13:
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	_AR5K_REG_ENABLE_BITS
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh16
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGotLdr	Lloh20, Lloh21, Lloh22
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh19
	.loh AdrpLdrGotLdr	Lloh32, Lloh33, Lloh34
	.loh AdrpLdrGotLdr	Lloh29, Lloh30, Lloh31
	.loh AdrpLdrGotLdr	Lloh26, Lloh27, Lloh28
	.loh AdrpLdrGotLdr	Lloh23, Lloh24, Lloh25
	.loh AdrpLdrGotLdr	Lloh41, Lloh42, Lloh43
	.loh AdrpLdrGotLdr	Lloh38, Lloh39, Lloh40
	.loh AdrpLdrGotLdr	Lloh35, Lloh36, Lloh37
	.cfi_endproc
                                        ; -- End function
	.comm	_AR5K_AR5212,8,3                ; @AR5K_AR5212
	.comm	_AR5K_TUNE_RSSI_THRES,4,2       ; @AR5K_TUNE_RSSI_THRES
	.comm	_AR5K_TUNE_BMISS_THRES,4,2      ; @AR5K_TUNE_BMISS_THRES
	.comm	_AR5K_RSSI_THR_BMISS_S,4,2      ; @AR5K_RSSI_THR_BMISS_S
	.comm	_AR5K_RSSI_THR,4,2              ; @AR5K_RSSI_THR
	.comm	_AR5K_SREV_AR2413,8,3           ; @AR5K_SREV_AR2413
	.comm	_AR5K_MIC_QOS_CTL,4,2           ; @AR5K_MIC_QOS_CTL
	.comm	_AR5K_MIC_QOS_SEL,4,2           ; @AR5K_MIC_QOS_SEL
	.comm	_AR5K_QOS_NOACK_2BIT_VALUES,4,2 ; @AR5K_QOS_NOACK_2BIT_VALUES
	.comm	_AR5K_QOS_NOACK_BIT_OFFSET,4,2  ; @AR5K_QOS_NOACK_BIT_OFFSET
	.comm	_AR5K_QOS_NOACK_BYTE_OFFSET,4,2 ; @AR5K_QOS_NOACK_BYTE_OFFSET
	.comm	_AR5K_QOS_NOACK,4,2             ; @AR5K_QOS_NOACK
	.comm	_AR5K_STA_ID1_BASE_RATE_11B,4,2 ; @AR5K_STA_ID1_BASE_RATE_11B
	.comm	_AR5K_STA_ID1_ACKCTS_6MB,4,2    ; @AR5K_STA_ID1_ACKCTS_6MB
	.comm	_AR5K_STA_ID1,4,2               ; @AR5K_STA_ID1
.subsections_via_symbols
