	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function pearl_hhbm_init
_pearl_hhbm_init:                       ## @pearl_hhbm_init
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r14
	movl	(%rdi), %edi
	callq	_PCIE_HHBM_CONFIG
	movl	%eax, %edi
	callq	_readl
	movl	%eax, %r15d
	movq	_HHBM_CONFIG_SOFT_RESET@GOTPCREL(%rip), %rbx
	orl	(%rbx), %r15d
	movl	(%r14), %edi
	callq	_PCIE_HHBM_CONFIG
	movl	%r15d, %edi
	movl	%eax, %esi
	callq	_writel
	movl	$50, %edi
	movl	$100, %esi
	callq	_usleep_range
	movl	(%rbx), %ebx
	notl	%ebx
	andl	%r15d, %ebx
	movl	(%r14), %edi
	callq	_PCIE_HHBM_CONFIG
	movl	%ebx, %edi
	movl	%eax, %esi
	callq	_writel
	movl	(%r14), %edi
	movl	4(%r14), %ebx
	callq	_PCIE_HHBM_Q_LIMIT_REG
	movl	%ebx, %edi
	movl	%eax, %esi
	callq	_writel
	xorl	%eax, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_HHBM_CONFIG_SOFT_RESET,4,2     ## @HHBM_CONFIG_SOFT_RESET
	.comm	_HHBM_64BIT,4,2                 ## @HHBM_64BIT
	.no_dead_strip	_pearl_hhbm_init
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function pearl_hhbm_init
_pearl_hhbm_init:                       ; @pearl_hhbm_init
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x0
	ldr	w0, [x0]
	bl	_PCIE_HHBM_CONFIG
	bl	_readl
Lloh0:
	adrp	x21, _HHBM_CONFIG_SOFT_RESET@GOTPAGE
Lloh1:
	ldr	x21, [x21, _HHBM_CONFIG_SOFT_RESET@GOTPAGEOFF]
	ldr	w8, [x21]
	orr	w20, w8, w0
	ldr	w0, [x19]
	bl	_PCIE_HHBM_CONFIG
	mov	x1, x0
	mov	x0, x20
	bl	_writel
	mov	w0, #50
	mov	w1, #100
	bl	_usleep_range
	ldr	w8, [x21]
	bic	w20, w20, w8
	ldr	w0, [x19]
	bl	_PCIE_HHBM_CONFIG
	mov	x1, x0
	mov	x0, x20
	bl	_writel
	ldp	w0, w20, [x19]
	bl	_PCIE_HHBM_Q_LIMIT_REG
	mov	x1, x0
	mov	x0, x20
	bl	_writel
	mov	w0, #0
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGot	Lloh0, Lloh1
	.cfi_endproc
                                        ; -- End function
	.comm	_HHBM_CONFIG_SOFT_RESET,4,2     ; @HHBM_CONFIG_SOFT_RESET
	.comm	_HHBM_64BIT,4,2                 ; @HHBM_64BIT
	.no_dead_strip	_pearl_hhbm_init
.subsections_via_symbols
