	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_pcie_bandwidth_available       ## -- Begin function pcie_bandwidth_available
	.p2align	4, 0x90
_pcie_bandwidth_available:              ## @pcie_bandwidth_available
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$24, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdx, %r12
	movq	%rdi, %rbx
	testq	%rdx, %rdx
	je	LBB0_2
## %bb.1:
	movq	_PCI_SPEED_UNKNOWN@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, (%r12)
LBB0_2:
	testq	%rcx, %rcx
	je	LBB0_4
## %bb.3:
	movq	_PCIE_LNK_WIDTH_UNKNOWN@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, (%rcx)
LBB0_4:
	testq	%rbx, %rbx
	je	LBB0_5
## %bb.6:
	movq	%rsi, -48(%rbp)                 ## 8-byte Spill
	movq	%rcx, -56(%rbp)                 ## 8-byte Spill
	xorl	%r13d, %r13d
	jmp	LBB0_7
	.p2align	4, 0x90
LBB0_15:                                ##   in Loop: Header=BB0_7 Depth=1
	movl	%eax, %r13d
LBB0_16:                                ##   in Loop: Header=BB0_7 Depth=1
	movq	%rbx, %rdi
	callq	_pci_upstream_bridge
	movq	%rax, %rbx
	testq	%rax, %rax
	je	LBB0_17
LBB0_7:                                 ## =>This Inner Loop Header: Depth=1
	movq	_PCI_EXP_LNKSTA@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	leaq	-64(%rbp), %rdx
	callq	_pcie_capability_read_word
	movq	_pcie_link_speed@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	movq	-64(%rbp), %r14
	movq	_PCI_EXP_LNKSTA_CLS@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rcx
	andq	%r14, %rcx
	movl	(%rax,%rcx,4), %r15d
	movq	_PCI_EXP_LNKSTA_NLW@GOTPCREL(%rip), %rax
	andq	(%rax), %r14
	movq	_PCI_EXP_LNKSTA_NLW_SHIFT@GOTPCREL(%rip), %rax
	movzbl	(%rax), %ecx
	shrq	%cl, %r14
	movl	%r15d, %edi
	callq	_PCIE_SPEED2MBS_ENC
	imull	%r14d, %eax
	testl	%r13d, %r13d
	je	LBB0_9
## %bb.8:                               ##   in Loop: Header=BB0_7 Depth=1
	cmpl	%r13d, %eax
	jg	LBB0_16
LBB0_9:                                 ##   in Loop: Header=BB0_7 Depth=1
	movq	-48(%rbp), %rcx                 ## 8-byte Reload
	testq	%rcx, %rcx
	je	LBB0_11
## %bb.10:                              ##   in Loop: Header=BB0_7 Depth=1
	movq	%rbx, (%rcx)
LBB0_11:                                ##   in Loop: Header=BB0_7 Depth=1
	testq	%r12, %r12
	movq	-56(%rbp), %rcx                 ## 8-byte Reload
	je	LBB0_13
## %bb.12:                              ##   in Loop: Header=BB0_7 Depth=1
	movl	%r15d, (%r12)
LBB0_13:                                ##   in Loop: Header=BB0_7 Depth=1
	testq	%rcx, %rcx
	je	LBB0_15
## %bb.14:                              ##   in Loop: Header=BB0_7 Depth=1
	movl	%r14d, (%rcx)
	jmp	LBB0_15
LBB0_5:
	xorl	%r13d, %r13d
LBB0_17:
	movl	%r13d, %eax
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_PCI_SPEED_UNKNOWN,4,2          ## @PCI_SPEED_UNKNOWN
	.comm	_PCIE_LNK_WIDTH_UNKNOWN,4,2     ## @PCIE_LNK_WIDTH_UNKNOWN
	.comm	_PCI_EXP_LNKSTA,4,2             ## @PCI_EXP_LNKSTA
	.comm	_pcie_link_speed,8,3            ## @pcie_link_speed
	.comm	_PCI_EXP_LNKSTA_CLS,8,3         ## @PCI_EXP_LNKSTA_CLS
	.comm	_PCI_EXP_LNKSTA_NLW,8,3         ## @PCI_EXP_LNKSTA_NLW
	.comm	_PCI_EXP_LNKSTA_NLW_SHIFT,8,3   ## @PCI_EXP_LNKSTA_NLW_SHIFT
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_pcie_bandwidth_available       ; -- Begin function pcie_bandwidth_available
	.p2align	2
_pcie_bandwidth_available:              ; @pcie_bandwidth_available
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #112
	.cfi_def_cfa_offset 112
	stp	x28, x27, [sp, #16]             ; 16-byte Folded Spill
	stp	x26, x25, [sp, #32]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #48]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #64]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #80]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #96]             ; 16-byte Folded Spill
	add	x29, sp, #96
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	mov	x19, x3
	mov	x20, x2
	mov	x21, x1
	mov	x22, x0
	cbz	x2, LBB0_2
; %bb.1:
Lloh0:
	adrp	x8, _PCI_SPEED_UNKNOWN@GOTPAGE
Lloh1:
	ldr	x8, [x8, _PCI_SPEED_UNKNOWN@GOTPAGEOFF]
Lloh2:
	ldr	w8, [x8]
	str	w8, [x20]
LBB0_2:
	cbz	x19, LBB0_4
; %bb.3:
Lloh3:
	adrp	x8, _PCIE_LNK_WIDTH_UNKNOWN@GOTPAGE
Lloh4:
	ldr	x8, [x8, _PCIE_LNK_WIDTH_UNKNOWN@GOTPAGEOFF]
Lloh5:
	ldr	w8, [x8]
	str	w8, [x19]
LBB0_4:
	mov	w23, #0
	cbz	x22, LBB0_16
; %bb.5:
Lloh6:
	adrp	x27, _PCI_EXP_LNKSTA_CLS@GOTPAGE
Lloh7:
	ldr	x27, [x27, _PCI_EXP_LNKSTA_CLS@GOTPAGEOFF]
Lloh8:
	adrp	x28, _PCI_EXP_LNKSTA_NLW@GOTPAGE
Lloh9:
	ldr	x28, [x28, _PCI_EXP_LNKSTA_NLW@GOTPAGEOFF]
Lloh10:
	adrp	x25, _PCI_EXP_LNKSTA_NLW_SHIFT@GOTPAGE
Lloh11:
	ldr	x25, [x25, _PCI_EXP_LNKSTA_NLW_SHIFT@GOTPAGEOFF]
	b	LBB0_8
LBB0_6:                                 ;   in Loop: Header=BB0_8 Depth=1
	mov	x23, x8
LBB0_7:                                 ;   in Loop: Header=BB0_8 Depth=1
	mov	x0, x22
	bl	_pci_upstream_bridge
	mov	x22, x0
	cbz	x0, LBB0_16
LBB0_8:                                 ; =>This Inner Loop Header: Depth=1
Lloh12:
	adrp	x8, _PCI_EXP_LNKSTA@GOTPAGE
Lloh13:
	ldr	x8, [x8, _PCI_EXP_LNKSTA@GOTPAGEOFF]
Lloh14:
	ldr	w1, [x8]
	add	x2, sp, #8
	mov	x0, x22
	bl	_pcie_capability_read_word
Lloh15:
	adrp	x8, _pcie_link_speed@GOTPAGE
Lloh16:
	ldr	x8, [x8, _pcie_link_speed@GOTPAGEOFF]
Lloh17:
	ldr	x8, [x8]
	ldr	x9, [sp, #8]
	ldr	x10, [x27]
	and	x10, x10, x9
	ldr	w24, [x8, x10, lsl #2]
	ldr	x8, [x28]
	and	x8, x8, x9
	ldr	x9, [x25]
	lsr	x26, x8, x9
	mov	x0, x24
	bl	_PCIE_SPEED2MBS_ENC
	mul	w8, w0, w26
	cbz	w23, LBB0_10
; %bb.9:                                ;   in Loop: Header=BB0_8 Depth=1
	cmp	w8, w23
	b.gt	LBB0_7
LBB0_10:                                ;   in Loop: Header=BB0_8 Depth=1
	cbz	x21, LBB0_12
; %bb.11:                               ;   in Loop: Header=BB0_8 Depth=1
	str	x22, [x21]
LBB0_12:                                ;   in Loop: Header=BB0_8 Depth=1
	cbz	x20, LBB0_14
; %bb.13:                               ;   in Loop: Header=BB0_8 Depth=1
	str	w24, [x20]
LBB0_14:                                ;   in Loop: Header=BB0_8 Depth=1
	cbz	x19, LBB0_6
; %bb.15:                               ;   in Loop: Header=BB0_8 Depth=1
	str	w26, [x19]
	b	LBB0_6
LBB0_16:
	mov	x0, x23
	ldp	x29, x30, [sp, #96]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #80]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #64]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #48]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #32]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #112
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGot	Lloh10, Lloh11
	.loh AdrpLdrGot	Lloh8, Lloh9
	.loh AdrpLdrGot	Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.cfi_endproc
                                        ; -- End function
	.comm	_PCI_SPEED_UNKNOWN,4,2          ; @PCI_SPEED_UNKNOWN
	.comm	_PCIE_LNK_WIDTH_UNKNOWN,4,2     ; @PCIE_LNK_WIDTH_UNKNOWN
	.comm	_PCI_EXP_LNKSTA,4,2             ; @PCI_EXP_LNKSTA
	.comm	_pcie_link_speed,8,3            ; @pcie_link_speed
	.comm	_PCI_EXP_LNKSTA_CLS,8,3         ; @PCI_EXP_LNKSTA_CLS
	.comm	_PCI_EXP_LNKSTA_NLW,8,3         ; @PCI_EXP_LNKSTA_NLW
	.comm	_PCI_EXP_LNKSTA_NLW_SHIFT,8,3   ; @PCI_EXP_LNKSTA_NLW_SHIFT
.subsections_via_symbols
