	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_mlx5e_build_nic_params         ## -- Begin function mlx5e_build_nic_params
	.p2align	4, 0x90
_mlx5e_build_nic_params:                ## @mlx5e_build_nic_params
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$24, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rcx, %rbx
	movq	%rdx, -48(%rbp)                 ## 8-byte Spill
	movq	%rsi, -56(%rbp)                 ## 8-byte Spill
	movq	%rdi, %r15
	movq	%r9, 88(%rcx)
	movq	_MLX5E_ETH_HARD_MTU@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 80(%rcx)
	movq	%r8, 40(%rcx)
	movl	$1, (%rcx)
	xorl	%eax, %eax
	callq	_is_kdump_kernel
	testq	%rax, %rax
	jne	LBB0_1
## %bb.2:
	movq	_MLX5E_PARAMS_DEFAULT_LOG_SQ_SIZE@GOTPCREL(%rip), %rax
	jmp	LBB0_3
LBB0_1:
	movq	_MLX5E_PARAMS_MINIMUM_LOG_SQ_SIZE@GOTPCREL(%rip), %rax
LBB0_3:
	movl	(%rax), %eax
	movl	%eax, 76(%rbx)
	movq	_MLX5E_PFLAG_XDP_TX_MPWQE@GOTPCREL(%rip), %rax
	movl	(%rax), %r13d
	movq	_enhanced_multi_pkt_send_wqe@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r15, %rdi
	callq	_MLX5_CAP_ETH
	movq	%rbx, %rdi
	movl	%r13d, %esi
	movl	%eax, %edx
	callq	_MLX5E_SET_PFLAG
	movl	$0, 4(%rbx)
	movq	_cqe_compression@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r15, %rdi
	callq	_MLX5_CAP_GEN
	testq	%rax, %rax
	je	LBB0_6
## %bb.4:
	movq	_vport_group_manager@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r15, %rdi
	callq	_MLX5_CAP_GEN
	testq	%rax, %rax
	je	LBB0_6
## %bb.5:
	movq	%r15, %rdi
	callq	_slow_pci_heuristic
	movl	%eax, 4(%rbx)
LBB0_6:
	movq	_MLX5E_PFLAG_RX_CQE_COMPRESS@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	4(%rbx), %edx
	movq	%rbx, %rdi
	callq	_MLX5E_SET_PFLAG
	movq	_MLX5E_PFLAG_RX_NO_CSUM_COMPLETE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	xorl	%edx, %edx
	callq	_MLX5E_SET_PFLAG
	movq	%r15, %rdi
	movq	%rbx, %rsi
	callq	_mlx5e_build_rq_params
	movq	8(%rbx), %rax
	movq	_MLX5_WQ_TYPE_LINKED_LIST_STRIDING_RQ@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jne	LBB0_9
## %bb.7:
	movq	%r15, %rdi
	movq	%rbx, %rsi
	xorl	%edx, %edx
	callq	_mlx5e_rx_mpwqe_is_linear_skb
	testl	%eax, %eax
	jne	LBB0_9
## %bb.8:
	movq	%r15, %rdi
	callq	_slow_pci_heuristic
	xorl	%ecx, %ecx
	testl	%eax, %eax
	sete	%cl
	movl	%ecx, 16(%rbx)
LBB0_9:
	movq	_MLX5E_DEFAULT_LRO_TIMEOUT@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r15, %rdi
	callq	_mlx5e_choose_lro_timeout
	movl	%eax, 72(%rbx)
	movq	_cq_period_start_from_cqe@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r15, %rdi
	callq	_MLX5_CAP_GEN
	movq	_MLX5_CQ_PERIOD_MODE_START_FROM_EQE@GOTPCREL(%rip), %r14
	movq	%r14, %rcx
	testq	%rax, %rax
	je	LBB0_11
## %bb.10:
	movq	_MLX5_CQ_PERIOD_MODE_START_FROM_CQE@GOTPCREL(%rip), %rcx
LBB0_11:
	movl	(%rcx), %r13d
	movq	_cq_moderation@GOTPCREL(%rip), %r12
	movl	(%r12), %esi
	movq	%r15, %rdi
	callq	_MLX5_CAP_GEN
	movq	%rax, 64(%rbx)
	movl	(%r12), %esi
	movq	%r15, %rdi
	callq	_MLX5_CAP_GEN
	movq	%rax, 56(%rbx)
	movq	%rbx, %rdi
	movl	%r13d, %esi
	callq	_mlx5e_set_rx_cq_mode_params
	movl	(%r14), %esi
	movq	%rbx, %rdi
	callq	_mlx5e_set_tx_cq_mode_params
	leaq	48(%rbx), %rsi
	movq	%r15, %rdi
	callq	_mlx5_query_min_inline
	movq	40(%rbx), %rsi
	movq	-48(%rbp), %rdi                 ## 8-byte Reload
	callq	_mlx5e_build_rss_params
	movq	%r15, %rdi
	callq	_mlx5e_tunnel_inner_ft_supported
	movl	%eax, 32(%rbx)
	movq	-56(%rbp), %rax                 ## 8-byte Reload
	movq	%rax, 24(%rbx)
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_MLX5E_ETH_HARD_MTU,4,2         ## @MLX5E_ETH_HARD_MTU
	.comm	_MLX5E_PARAMS_MINIMUM_LOG_SQ_SIZE,4,2 ## @MLX5E_PARAMS_MINIMUM_LOG_SQ_SIZE
	.comm	_MLX5E_PARAMS_DEFAULT_LOG_SQ_SIZE,4,2 ## @MLX5E_PARAMS_DEFAULT_LOG_SQ_SIZE
	.comm	_MLX5E_PFLAG_XDP_TX_MPWQE,4,2   ## @MLX5E_PFLAG_XDP_TX_MPWQE
	.comm	_enhanced_multi_pkt_send_wqe,4,2 ## @enhanced_multi_pkt_send_wqe
	.comm	_cqe_compression,4,2            ## @cqe_compression
	.comm	_vport_group_manager,4,2        ## @vport_group_manager
	.comm	_MLX5E_PFLAG_RX_CQE_COMPRESS,4,2 ## @MLX5E_PFLAG_RX_CQE_COMPRESS
	.comm	_MLX5E_PFLAG_RX_NO_CSUM_COMPLETE,4,2 ## @MLX5E_PFLAG_RX_NO_CSUM_COMPLETE
	.comm	_MLX5_WQ_TYPE_LINKED_LIST_STRIDING_RQ,8,3 ## @MLX5_WQ_TYPE_LINKED_LIST_STRIDING_RQ
	.comm	_MLX5E_DEFAULT_LRO_TIMEOUT,4,2  ## @MLX5E_DEFAULT_LRO_TIMEOUT
	.comm	_cq_period_start_from_cqe,4,2   ## @cq_period_start_from_cqe
	.comm	_MLX5_CQ_PERIOD_MODE_START_FROM_CQE,4,2 ## @MLX5_CQ_PERIOD_MODE_START_FROM_CQE
	.comm	_MLX5_CQ_PERIOD_MODE_START_FROM_EQE,4,2 ## @MLX5_CQ_PERIOD_MODE_START_FROM_EQE
	.comm	_cq_moderation,4,2              ## @cq_moderation
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_mlx5e_build_nic_params         ; -- Begin function mlx5e_build_nic_params
	.p2align	2
_mlx5e_build_nic_params:                ; @mlx5e_build_nic_params
	.cfi_startproc
; %bb.0:
	stp	x26, x25, [sp, #-80]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	mov	x19, x3
	mov	x22, x2
	mov	x20, x1
	mov	x21, x0
Lloh0:
	adrp	x8, _MLX5E_ETH_HARD_MTU@GOTPAGE
Lloh1:
	ldr	x8, [x8, _MLX5E_ETH_HARD_MTU@GOTPAGEOFF]
	str	x5, [x3, #88]
Lloh2:
	ldr	w8, [x8]
	str	w8, [x3, #80]
	str	x4, [x3, #40]
	mov	w8, #1
	str	w8, [x3]
	bl	_is_kdump_kernel
Lloh3:
	adrp	x8, _MLX5E_PARAMS_MINIMUM_LOG_SQ_SIZE@GOTPAGE
Lloh4:
	ldr	x8, [x8, _MLX5E_PARAMS_MINIMUM_LOG_SQ_SIZE@GOTPAGEOFF]
Lloh5:
	adrp	x9, _MLX5E_PARAMS_DEFAULT_LOG_SQ_SIZE@GOTPAGE
Lloh6:
	ldr	x9, [x9, _MLX5E_PARAMS_DEFAULT_LOG_SQ_SIZE@GOTPAGEOFF]
	cmp	x0, #0
	csel	x8, x9, x8, eq
	ldr	w8, [x8]
	str	w8, [x19, #76]
Lloh7:
	adrp	x8, _MLX5E_PFLAG_XDP_TX_MPWQE@GOTPAGE
Lloh8:
	ldr	x8, [x8, _MLX5E_PFLAG_XDP_TX_MPWQE@GOTPAGEOFF]
Lloh9:
	ldr	w23, [x8]
Lloh10:
	adrp	x8, _enhanced_multi_pkt_send_wqe@GOTPAGE
Lloh11:
	ldr	x8, [x8, _enhanced_multi_pkt_send_wqe@GOTPAGEOFF]
Lloh12:
	ldr	w1, [x8]
	mov	x0, x21
	bl	_MLX5_CAP_ETH
	mov	x2, x0
	mov	x0, x19
	mov	x1, x23
	bl	_MLX5E_SET_PFLAG
	str	wzr, [x19, #4]
Lloh13:
	adrp	x8, _cqe_compression@GOTPAGE
Lloh14:
	ldr	x8, [x8, _cqe_compression@GOTPAGEOFF]
Lloh15:
	ldr	w1, [x8]
	mov	x0, x21
	bl	_MLX5_CAP_GEN
	cbz	x0, LBB0_3
; %bb.1:
Lloh16:
	adrp	x8, _vport_group_manager@GOTPAGE
Lloh17:
	ldr	x8, [x8, _vport_group_manager@GOTPAGEOFF]
Lloh18:
	ldr	w1, [x8]
	mov	x0, x21
	bl	_MLX5_CAP_GEN
	cbz	x0, LBB0_3
; %bb.2:
	mov	x0, x21
	bl	_slow_pci_heuristic
	str	w0, [x19, #4]
LBB0_3:
Lloh19:
	adrp	x8, _MLX5E_PFLAG_RX_CQE_COMPRESS@GOTPAGE
Lloh20:
	ldr	x8, [x8, _MLX5E_PFLAG_RX_CQE_COMPRESS@GOTPAGEOFF]
Lloh21:
	ldr	w1, [x8]
	ldr	w2, [x19, #4]
	mov	x0, x19
	bl	_MLX5E_SET_PFLAG
Lloh22:
	adrp	x8, _MLX5E_PFLAG_RX_NO_CSUM_COMPLETE@GOTPAGE
Lloh23:
	ldr	x8, [x8, _MLX5E_PFLAG_RX_NO_CSUM_COMPLETE@GOTPAGEOFF]
Lloh24:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #0
	bl	_MLX5E_SET_PFLAG
	mov	x0, x21
	mov	x1, x19
	bl	_mlx5e_build_rq_params
	ldr	x8, [x19, #8]
Lloh25:
	adrp	x9, _MLX5_WQ_TYPE_LINKED_LIST_STRIDING_RQ@GOTPAGE
Lloh26:
	ldr	x9, [x9, _MLX5_WQ_TYPE_LINKED_LIST_STRIDING_RQ@GOTPAGEOFF]
Lloh27:
	ldr	x9, [x9]
	cmp	x8, x9
	b.ne	LBB0_6
; %bb.4:
	mov	x0, x21
	mov	x1, x19
	mov	x2, #0
	bl	_mlx5e_rx_mpwqe_is_linear_skb
	cbnz	w0, LBB0_6
; %bb.5:
	mov	x0, x21
	bl	_slow_pci_heuristic
	cmp	w0, #0
	cset	w8, eq
	str	w8, [x19, #16]
LBB0_6:
Lloh28:
	adrp	x8, _MLX5E_DEFAULT_LRO_TIMEOUT@GOTPAGE
Lloh29:
	ldr	x8, [x8, _MLX5E_DEFAULT_LRO_TIMEOUT@GOTPAGEOFF]
Lloh30:
	ldr	w1, [x8]
	mov	x0, x21
	bl	_mlx5e_choose_lro_timeout
	str	w0, [x19, #72]
Lloh31:
	adrp	x8, _cq_period_start_from_cqe@GOTPAGE
Lloh32:
	ldr	x8, [x8, _cq_period_start_from_cqe@GOTPAGEOFF]
Lloh33:
	ldr	w1, [x8]
	mov	x0, x21
	bl	_MLX5_CAP_GEN
Lloh34:
	adrp	x8, _MLX5_CQ_PERIOD_MODE_START_FROM_CQE@GOTPAGE
Lloh35:
	ldr	x8, [x8, _MLX5_CQ_PERIOD_MODE_START_FROM_CQE@GOTPAGEOFF]
Lloh36:
	adrp	x24, _MLX5_CQ_PERIOD_MODE_START_FROM_EQE@GOTPAGE
Lloh37:
	ldr	x24, [x24, _MLX5_CQ_PERIOD_MODE_START_FROM_EQE@GOTPAGEOFF]
	cmp	x0, #0
	csel	x8, x24, x8, eq
	ldr	w23, [x8]
Lloh38:
	adrp	x25, _cq_moderation@GOTPAGE
Lloh39:
	ldr	x25, [x25, _cq_moderation@GOTPAGEOFF]
	ldr	w1, [x25]
	mov	x0, x21
	bl	_MLX5_CAP_GEN
	str	x0, [x19, #64]
	ldr	w1, [x25]
	mov	x0, x21
	bl	_MLX5_CAP_GEN
	str	x0, [x19, #56]
	mov	x0, x19
	mov	x1, x23
	bl	_mlx5e_set_rx_cq_mode_params
	ldr	w1, [x24]
	mov	x0, x19
	bl	_mlx5e_set_tx_cq_mode_params
	add	x1, x19, #48
	mov	x0, x21
	bl	_mlx5_query_min_inline
	ldr	x1, [x19, #40]
	mov	x0, x22
	bl	_mlx5e_build_rss_params
	mov	x0, x21
	bl	_mlx5e_tunnel_inner_ft_supported
	str	w0, [x19, #32]
	str	x20, [x19, #24]
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp], #80             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh13, Lloh14, Lloh15
	.loh AdrpLdrGotLdr	Lloh10, Lloh11, Lloh12
	.loh AdrpLdrGotLdr	Lloh7, Lloh8, Lloh9
	.loh AdrpLdrGot	Lloh5, Lloh6
	.loh AdrpLdrGot	Lloh3, Lloh4
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh16, Lloh17, Lloh18
	.loh AdrpLdrGotLdr	Lloh25, Lloh26, Lloh27
	.loh AdrpLdrGotLdr	Lloh22, Lloh23, Lloh24
	.loh AdrpLdrGotLdr	Lloh19, Lloh20, Lloh21
	.loh AdrpLdrGot	Lloh38, Lloh39
	.loh AdrpLdrGot	Lloh36, Lloh37
	.loh AdrpLdrGot	Lloh34, Lloh35
	.loh AdrpLdrGotLdr	Lloh31, Lloh32, Lloh33
	.loh AdrpLdrGotLdr	Lloh28, Lloh29, Lloh30
	.cfi_endproc
                                        ; -- End function
	.comm	_MLX5E_ETH_HARD_MTU,4,2         ; @MLX5E_ETH_HARD_MTU
	.comm	_MLX5E_PARAMS_MINIMUM_LOG_SQ_SIZE,4,2 ; @MLX5E_PARAMS_MINIMUM_LOG_SQ_SIZE
	.comm	_MLX5E_PARAMS_DEFAULT_LOG_SQ_SIZE,4,2 ; @MLX5E_PARAMS_DEFAULT_LOG_SQ_SIZE
	.comm	_MLX5E_PFLAG_XDP_TX_MPWQE,4,2   ; @MLX5E_PFLAG_XDP_TX_MPWQE
	.comm	_enhanced_multi_pkt_send_wqe,4,2 ; @enhanced_multi_pkt_send_wqe
	.comm	_cqe_compression,4,2            ; @cqe_compression
	.comm	_vport_group_manager,4,2        ; @vport_group_manager
	.comm	_MLX5E_PFLAG_RX_CQE_COMPRESS,4,2 ; @MLX5E_PFLAG_RX_CQE_COMPRESS
	.comm	_MLX5E_PFLAG_RX_NO_CSUM_COMPLETE,4,2 ; @MLX5E_PFLAG_RX_NO_CSUM_COMPLETE
	.comm	_MLX5_WQ_TYPE_LINKED_LIST_STRIDING_RQ,8,3 ; @MLX5_WQ_TYPE_LINKED_LIST_STRIDING_RQ
	.comm	_MLX5E_DEFAULT_LRO_TIMEOUT,4,2  ; @MLX5E_DEFAULT_LRO_TIMEOUT
	.comm	_cq_period_start_from_cqe,4,2   ; @cq_period_start_from_cqe
	.comm	_MLX5_CQ_PERIOD_MODE_START_FROM_CQE,4,2 ; @MLX5_CQ_PERIOD_MODE_START_FROM_CQE
	.comm	_MLX5_CQ_PERIOD_MODE_START_FROM_EQE,4,2 ; @MLX5_CQ_PERIOD_MODE_START_FROM_EQE
	.comm	_cq_moderation,4,2              ; @cq_moderation
.subsections_via_symbols
