	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_mlx5_fpga_init                 ## -- Begin function mlx5_fpga_init
	.p2align	4, 0x90
_mlx5_fpga_init:                        ## @mlx5_fpga_init
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r14
	pushq	%rbx
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	movq	%rdi, %rbx
	movq	_fpga@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_MLX5_CAP_GEN
	testl	%eax, %eax
	je	LBB0_1
## %bb.2:
	leaq	L_.str.1(%rip), %rsi
	movq	%rbx, %rdi
	callq	_mlx5_core_dbg
	xorl	%r14d, %r14d
	xorl	%eax, %eax
	callq	_mlx5_fpga_device_alloc
	testq	%rax, %rax
	je	LBB0_3
## %bb.4:
	movq	%rbx, (%rax)
	movq	%rax, (%rbx)
	jmp	LBB0_5
LBB0_1:
	leaq	L_.str(%rip), %rsi
	movq	%rbx, %rdi
	callq	_mlx5_core_dbg
	xorl	%r14d, %r14d
	jmp	LBB0_5
LBB0_3:
	movq	_ENOMEM@GOTPCREL(%rip), %rax
	xorl	%r14d, %r14d
	subl	(%rax), %r14d
LBB0_5:
	movl	%r14d, %eax
	popq	%rbx
	popq	%r14
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_fpga,4,2                       ## @fpga
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"FPGA capability not present\n"

L_.str.1:                               ## @.str.1
	.asciz	"Initializing FPGA\n"

	.comm	_ENOMEM,4,2                     ## @ENOMEM
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_mlx5_fpga_init                 ; -- Begin function mlx5_fpga_init
	.p2align	2
_mlx5_fpga_init:                        ; @mlx5_fpga_init
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x19, x0
Lloh0:
	adrp	x8, _fpga@GOTPAGE
Lloh1:
	ldr	x8, [x8, _fpga@GOTPAGEOFF]
Lloh2:
	ldr	w1, [x8]
	bl	_MLX5_CAP_GEN
	cbz	w0, LBB0_3
; %bb.1:
Lloh3:
	adrp	x1, l_.str.1@PAGE
Lloh4:
	add	x1, x1, l_.str.1@PAGEOFF
	mov	x0, x19
	bl	_mlx5_core_dbg
	bl	_mlx5_fpga_device_alloc
	cbz	x0, LBB0_4
; %bb.2:
	mov	x8, x0
	mov	w0, #0
	str	x19, [x8]
	str	x8, [x19]
	b	LBB0_5
LBB0_3:
Lloh5:
	adrp	x1, l_.str@PAGE
Lloh6:
	add	x1, x1, l_.str@PAGEOFF
	mov	x0, x19
	bl	_mlx5_core_dbg
	mov	w0, #0
	b	LBB0_5
LBB0_4:
Lloh7:
	adrp	x8, _ENOMEM@GOTPAGE
Lloh8:
	ldr	x8, [x8, _ENOMEM@GOTPAGEOFF]
Lloh9:
	ldr	w8, [x8]
	neg	w0, w8
LBB0_5:
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpAdd	Lloh3, Lloh4
	.loh AdrpAdd	Lloh5, Lloh6
	.loh AdrpLdrGotLdr	Lloh7, Lloh8, Lloh9
	.cfi_endproc
                                        ; -- End function
	.comm	_fpga,4,2                       ; @fpga
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"FPGA capability not present\n"

l_.str.1:                               ; @.str.1
	.asciz	"Initializing FPGA\n"

	.comm	_ENOMEM,4,2                     ; @ENOMEM
.subsections_via_symbols
