	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function mvpp2_rxq_deinit
_mvpp2_rxq_deinit:                      ## @mvpp2_rxq_deinit
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rsi, %rbx
	movq	%rdi, %r14
	callq	_mvpp2_rxq_drop_pkts
	movq	32(%rbx), %rdx
	testq	%rdx, %rdx
	je	LBB0_2
## %bb.1:
	movq	8(%r14), %rax
	movl	(%rax), %edi
	movq	_MVPP2_DESC_ALIGNED_SIZE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	imull	(%rbx), %esi
	movq	8(%rbx), %rcx
	callq	_dma_free_coherent
LBB0_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 24(%rbx)
	movups	%xmm0, 8(%rbx)
	movl	(%r14), %r15d
	movl	4(%rbx), %edi
	callq	_MVPP2_RXQ_STATUS_REG
	movl	%r15d, %edi
	movl	%eax, %esi
	xorl	%edx, %edx
	callq	_mvpp2_write
	movl	(%r14), %r15d
	xorl	%eax, %eax
	callq	_get_cpu
	movl	%r15d, %edi
	movl	%eax, %esi
	callq	_mvpp2_cpu_to_thread
	movl	%eax, %r15d
	movl	(%r14), %edi
	movq	_MVPP2_RXQ_NUM_REG@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movl	4(%rbx), %ecx
	movl	%r15d, %esi
	callq	_mvpp2_thread_write
	movl	(%r14), %edi
	movq	_MVPP2_RXQ_DESC_ADDR_REG@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movl	%r15d, %esi
	xorl	%ecx, %ecx
	callq	_mvpp2_thread_write
	movl	(%r14), %edi
	movq	_MVPP2_RXQ_DESC_SIZE_REG@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movl	%r15d, %esi
	xorl	%ecx, %ecx
	callq	_mvpp2_thread_write
	xorl	%eax, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_put_cpu                        ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_MVPP2_DESC_ALIGNED_SIZE,4,2    ## @MVPP2_DESC_ALIGNED_SIZE
	.comm	_MVPP2_RXQ_NUM_REG,4,2          ## @MVPP2_RXQ_NUM_REG
	.comm	_MVPP2_RXQ_DESC_ADDR_REG,4,2    ## @MVPP2_RXQ_DESC_ADDR_REG
	.comm	_MVPP2_RXQ_DESC_SIZE_REG,4,2    ## @MVPP2_RXQ_DESC_SIZE_REG
	.no_dead_strip	_mvpp2_rxq_deinit
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function mvpp2_rxq_deinit
_mvpp2_rxq_deinit:                      ; @mvpp2_rxq_deinit
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x20, x1
	mov	x19, x0
	bl	_mvpp2_rxq_drop_pkts
	ldr	x2, [x20, #32]
	cbz	x2, LBB0_2
; %bb.1:
	ldr	x8, [x19, #8]
	ldr	w0, [x8]
	ldr	w8, [x20]
Lloh0:
	adrp	x9, _MVPP2_DESC_ALIGNED_SIZE@GOTPAGE
Lloh1:
	ldr	x9, [x9, _MVPP2_DESC_ALIGNED_SIZE@GOTPAGEOFF]
Lloh2:
	ldr	w9, [x9]
	mul	w1, w9, w8
	ldr	x3, [x20, #8]
	bl	_dma_free_coherent
LBB0_2:
	movi.2d	v0, #0000000000000000
	stur	q0, [x20, #24]
	stur	q0, [x20, #8]
	ldr	w21, [x19]
	ldr	w0, [x20, #4]
	bl	_MVPP2_RXQ_STATUS_REG
	mov	x1, x0
	mov	x0, x21
	mov	w2, #0
	bl	_mvpp2_write
	ldr	w21, [x19]
	bl	_get_cpu
	mov	x1, x0
	mov	x0, x21
	bl	_mvpp2_cpu_to_thread
	mov	x21, x0
	ldr	w0, [x19]
Lloh3:
	adrp	x8, _MVPP2_RXQ_NUM_REG@GOTPAGE
Lloh4:
	ldr	x8, [x8, _MVPP2_RXQ_NUM_REG@GOTPAGEOFF]
Lloh5:
	ldr	w2, [x8]
	ldr	w3, [x20, #4]
	mov	x1, x21
	bl	_mvpp2_thread_write
	ldr	w0, [x19]
Lloh6:
	adrp	x8, _MVPP2_RXQ_DESC_ADDR_REG@GOTPAGE
Lloh7:
	ldr	x8, [x8, _MVPP2_RXQ_DESC_ADDR_REG@GOTPAGEOFF]
Lloh8:
	ldr	w2, [x8]
	mov	x1, x21
	mov	w3, #0
	bl	_mvpp2_thread_write
	ldr	w0, [x19]
Lloh9:
	adrp	x8, _MVPP2_RXQ_DESC_SIZE_REG@GOTPAGE
Lloh10:
	ldr	x8, [x8, _MVPP2_RXQ_DESC_SIZE_REG@GOTPAGEOFF]
Lloh11:
	ldr	w2, [x8]
	mov	x1, x21
	mov	w3, #0
	bl	_mvpp2_thread_write
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	_put_cpu
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.cfi_endproc
                                        ; -- End function
	.comm	_MVPP2_DESC_ALIGNED_SIZE,4,2    ; @MVPP2_DESC_ALIGNED_SIZE
	.comm	_MVPP2_RXQ_NUM_REG,4,2          ; @MVPP2_RXQ_NUM_REG
	.comm	_MVPP2_RXQ_DESC_ADDR_REG,4,2    ; @MVPP2_RXQ_DESC_ADDR_REG
	.comm	_MVPP2_RXQ_DESC_SIZE_REG,4,2    ; @MVPP2_RXQ_DESC_SIZE_REG
	.no_dead_strip	_mvpp2_rxq_deinit
.subsections_via_symbols
