	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function rt61pci_load_firmware
_rt61pci_load_firmware:                 ## @rt61pci_load_firmware
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$24, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdx, %r12
	movq	%rsi, %r15
	movq	%rdi, %r13
	movl	$100, %ebx
	movq	_MAC_CSR0@GOTPCREL(%rip), %r14
	.p2align	4, 0x90
LBB0_1:                                 ## =>This Inner Loop Header: Depth=1
	movl	(%r14), %esi
	movq	%r13, %rdi
	callq	_rt2x00mmio_register_read
	testl	%eax, %eax
	jne	LBB0_5
## %bb.2:                               ##   in Loop: Header=BB0_1 Depth=1
	movl	$1, %edi
	callq	_msleep
	decl	%ebx
	jne	LBB0_1
## %bb.3:
	leaq	L_.str(%rip), %rsi
	jmp	LBB0_4
LBB0_5:
	movl	$0, -44(%rbp)
	movq	_MCU_CNTL_CSR_RESET@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rax, %rbx
	movq	%r12, -56(%rbp)                 ## 8-byte Spill
	leaq	-44(%rbp), %r12
	movq	%r12, %rdi
	movl	$1, %edx
	callq	_rt2x00_set_field32
	movq	_MCU_CNTL_CSR@GOTPCREL(%rip), %r14
	movl	(%r14), %esi
	movl	-44(%rbp), %edx
	movq	%r13, %rdi
	callq	_rt2x00mmio_register_write
	movq	_M2H_CMD_DONE_CSR@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r13, %rdi
	movl	$-1, %edx
	callq	_rt2x00mmio_register_write
	movq	_H2M_MAILBOX_CSR@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r13, %rdi
	xorl	%edx, %edx
	callq	_rt2x00mmio_register_write
	movq	_HOST_CMD_CSR@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r13, %rdi
	xorl	%edx, %edx
	callq	_rt2x00mmio_register_write
	movl	$0, -44(%rbp)
	movl	(%rbx), %esi
	movq	%r12, %rdi
	movl	$1, %edx
	callq	_rt2x00_set_field32
	movq	_MCU_CNTL_CSR_SELECT_BANK@GOTPCREL(%rip), %rbx
	movl	(%rbx), %esi
	movq	%r12, %rdi
	movl	$1, %edx
	callq	_rt2x00_set_field32
	movl	(%r14), %esi
	movl	-44(%rbp), %edx
	movq	%r13, %rdi
	callq	_rt2x00mmio_register_write
	movq	_FIRMWARE_IMAGE_BASE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r13, %rdi
	movq	%r15, %rdx
	movq	-56(%rbp), %rcx                 ## 8-byte Reload
	callq	_rt2x00mmio_register_multiwrite
	movl	(%rbx), %esi
	movq	%r12, %rdi
	xorl	%edx, %edx
	callq	_rt2x00_set_field32
	movl	(%r14), %esi
	movl	-44(%rbp), %edx
	movq	%r13, %rdi
	callq	_rt2x00mmio_register_write
	movq	_MCU_CNTL_CSR_RESET@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r12, %rdi
	xorl	%edx, %edx
	callq	_rt2x00_set_field32
	movl	(%r14), %esi
	movl	-44(%rbp), %edx
	movq	%r13, %rdi
	callq	_rt2x00mmio_register_write
	movl	$100, %ebx
	movq	_MCU_CNTL_CSR_READY@GOTPCREL(%rip), %r12
	.p2align	4, 0x90
LBB0_6:                                 ## =>This Inner Loop Header: Depth=1
	movl	(%r14), %esi
	movq	%r13, %rdi
	callq	_rt2x00mmio_register_read
	movl	%eax, -44(%rbp)
	movl	(%r12), %esi
	movl	%eax, %edi
	callq	_rt2x00_get_field32
	movq	%rax, %r15
	movl	$1, %edi
	callq	_msleep
	testq	%r15, %r15
	jne	LBB0_9
## %bb.7:                               ##   in Loop: Header=BB0_6 Depth=1
	decl	%ebx
	jne	LBB0_6
## %bb.8:
	leaq	L_.str.1(%rip), %rsi
LBB0_4:
	movq	%r13, %rdi
	callq	_rt2x00_err
	movq	_EBUSY@GOTPCREL(%rip), %rax
	xorl	%r15d, %r15d
	subl	(%rax), %r15d
	jmp	LBB0_10
LBB0_9:
	movl	$0, -44(%rbp)
	movq	_MAC_CSR1_SOFT_RESET@GOTPCREL(%rip), %r15
	movl	(%r15), %esi
	leaq	-44(%rbp), %r14
	movq	%r14, %rdi
	movl	$1, %edx
	callq	_rt2x00_set_field32
	movq	_MAC_CSR1_BBP_RESET@GOTPCREL(%rip), %r12
	movl	(%r12), %esi
	movq	%r14, %rdi
	movl	$1, %edx
	callq	_rt2x00_set_field32
	movq	_MAC_CSR1@GOTPCREL(%rip), %rbx
	movl	(%rbx), %esi
	movl	-44(%rbp), %edx
	movq	%r13, %rdi
	callq	_rt2x00mmio_register_write
	movl	(%rbx), %esi
	movq	%r13, %rdi
	callq	_rt2x00mmio_register_read
	movl	%eax, -44(%rbp)
	movl	(%r15), %esi
	xorl	%r15d, %r15d
	movq	%r14, %rdi
	xorl	%edx, %edx
	callq	_rt2x00_set_field32
	movl	(%r12), %esi
	movq	%r14, %rdi
	xorl	%edx, %edx
	callq	_rt2x00_set_field32
	movl	(%rbx), %esi
	movl	-44(%rbp), %edx
	movq	%r13, %rdi
	callq	_rt2x00mmio_register_write
	movl	(%rbx), %esi
	movq	%r13, %rdi
	callq	_rt2x00mmio_register_read
	movl	%eax, -44(%rbp)
	movq	_MAC_CSR1_HOST_READY@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	movl	$1, %edx
	callq	_rt2x00_set_field32
	movl	(%rbx), %esi
	movl	-44(%rbp), %edx
	movq	%r13, %rdi
	callq	_rt2x00mmio_register_write
LBB0_10:
	movl	%r15d, %eax
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_MAC_CSR0,4,2                   ## @MAC_CSR0
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"Unstable hardware\n"

	.comm	_EBUSY,4,2                      ## @EBUSY
	.comm	_MCU_CNTL_CSR_RESET,4,2         ## @MCU_CNTL_CSR_RESET
	.comm	_MCU_CNTL_CSR,4,2               ## @MCU_CNTL_CSR
	.comm	_M2H_CMD_DONE_CSR,4,2           ## @M2H_CMD_DONE_CSR
	.comm	_H2M_MAILBOX_CSR,4,2            ## @H2M_MAILBOX_CSR
	.comm	_HOST_CMD_CSR,4,2               ## @HOST_CMD_CSR
	.comm	_MCU_CNTL_CSR_SELECT_BANK,4,2   ## @MCU_CNTL_CSR_SELECT_BANK
	.comm	_FIRMWARE_IMAGE_BASE,4,2        ## @FIRMWARE_IMAGE_BASE
	.comm	_MCU_CNTL_CSR_READY,4,2         ## @MCU_CNTL_CSR_READY
L_.str.1:                               ## @.str.1
	.asciz	"MCU Control register not ready\n"

	.comm	_MAC_CSR1_SOFT_RESET,4,2        ## @MAC_CSR1_SOFT_RESET
	.comm	_MAC_CSR1_BBP_RESET,4,2         ## @MAC_CSR1_BBP_RESET
	.comm	_MAC_CSR1,4,2                   ## @MAC_CSR1
	.comm	_MAC_CSR1_HOST_READY,4,2        ## @MAC_CSR1_HOST_READY
	.no_dead_strip	_rt61pci_load_firmware
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function rt61pci_load_firmware
_rt61pci_load_firmware:                 ; @rt61pci_load_firmware
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #80
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x20, x2
	mov	x21, x1
	mov	x19, x0
	mov	w22, #100
Lloh0:
	adrp	x23, _MAC_CSR0@GOTPAGE
Lloh1:
	ldr	x23, [x23, _MAC_CSR0@GOTPAGEOFF]
LBB0_1:                                 ; =>This Inner Loop Header: Depth=1
	ldr	w1, [x23]
	mov	x0, x19
	bl	_rt2x00mmio_register_read
	cbnz	w0, LBB0_4
; %bb.2:                                ;   in Loop: Header=BB0_1 Depth=1
	mov	w0, #1
	bl	_msleep
	subs	w22, w22, #1
	b.ne	LBB0_1
; %bb.3:
Lloh2:
	adrp	x1, l_.str@PAGE
Lloh3:
	add	x1, x1, l_.str@PAGEOFF
	b	LBB0_8
LBB0_4:
	str	wzr, [sp, #12]
Lloh4:
	adrp	x23, _MCU_CNTL_CSR_RESET@GOTPAGE
Lloh5:
	ldr	x23, [x23, _MCU_CNTL_CSR_RESET@GOTPAGEOFF]
	ldr	w1, [x23]
	add	x0, sp, #12
	mov	w2, #1
	bl	_rt2x00_set_field32
Lloh6:
	adrp	x22, _MCU_CNTL_CSR@GOTPAGE
Lloh7:
	ldr	x22, [x22, _MCU_CNTL_CSR@GOTPAGEOFF]
	ldr	w1, [x22]
	ldr	w2, [sp, #12]
	mov	x0, x19
	bl	_rt2x00mmio_register_write
Lloh8:
	adrp	x8, _M2H_CMD_DONE_CSR@GOTPAGE
Lloh9:
	ldr	x8, [x8, _M2H_CMD_DONE_CSR@GOTPAGEOFF]
Lloh10:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #-1
	bl	_rt2x00mmio_register_write
Lloh11:
	adrp	x8, _H2M_MAILBOX_CSR@GOTPAGE
Lloh12:
	ldr	x8, [x8, _H2M_MAILBOX_CSR@GOTPAGEOFF]
Lloh13:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #0
	bl	_rt2x00mmio_register_write
Lloh14:
	adrp	x8, _HOST_CMD_CSR@GOTPAGE
Lloh15:
	ldr	x8, [x8, _HOST_CMD_CSR@GOTPAGEOFF]
Lloh16:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #0
	bl	_rt2x00mmio_register_write
	str	wzr, [sp, #12]
	ldr	w1, [x23]
	add	x0, sp, #12
	mov	w2, #1
	bl	_rt2x00_set_field32
Lloh17:
	adrp	x24, _MCU_CNTL_CSR_SELECT_BANK@GOTPAGE
Lloh18:
	ldr	x24, [x24, _MCU_CNTL_CSR_SELECT_BANK@GOTPAGEOFF]
	ldr	w1, [x24]
	add	x0, sp, #12
	mov	w2, #1
	bl	_rt2x00_set_field32
	ldr	w1, [x22]
	ldr	w2, [sp, #12]
	mov	x0, x19
	bl	_rt2x00mmio_register_write
Lloh19:
	adrp	x8, _FIRMWARE_IMAGE_BASE@GOTPAGE
Lloh20:
	ldr	x8, [x8, _FIRMWARE_IMAGE_BASE@GOTPAGEOFF]
Lloh21:
	ldr	w1, [x8]
	mov	x0, x19
	mov	x2, x21
	mov	x3, x20
	bl	_rt2x00mmio_register_multiwrite
	ldr	w1, [x24]
	add	x0, sp, #12
	mov	w2, #0
	bl	_rt2x00_set_field32
	ldr	w1, [x22]
	ldr	w2, [sp, #12]
	mov	x0, x19
	bl	_rt2x00mmio_register_write
	ldr	w1, [x23]
	add	x0, sp, #12
	mov	w2, #0
	bl	_rt2x00_set_field32
	ldr	w1, [x22]
	ldr	w2, [sp, #12]
	mov	x0, x19
	bl	_rt2x00mmio_register_write
	mov	w21, #100
Lloh22:
	adrp	x23, _MCU_CNTL_CSR_READY@GOTPAGE
Lloh23:
	ldr	x23, [x23, _MCU_CNTL_CSR_READY@GOTPAGEOFF]
LBB0_5:                                 ; =>This Inner Loop Header: Depth=1
	ldr	w1, [x22]
	mov	x0, x19
	bl	_rt2x00mmio_register_read
	str	w0, [sp, #12]
	ldr	w1, [x23]
	bl	_rt2x00_get_field32
	mov	x20, x0
	mov	w0, #1
	bl	_msleep
	cbnz	x20, LBB0_9
; %bb.6:                                ;   in Loop: Header=BB0_5 Depth=1
	subs	w21, w21, #1
	b.ne	LBB0_5
; %bb.7:
Lloh24:
	adrp	x1, l_.str.1@PAGE
Lloh25:
	add	x1, x1, l_.str.1@PAGEOFF
LBB0_8:
	mov	x0, x19
	bl	_rt2x00_err
Lloh26:
	adrp	x8, _EBUSY@GOTPAGE
Lloh27:
	ldr	x8, [x8, _EBUSY@GOTPAGEOFF]
Lloh28:
	ldr	w8, [x8]
	neg	w0, w8
	b	LBB0_10
LBB0_9:
	str	wzr, [sp, #12]
Lloh29:
	adrp	x20, _MAC_CSR1_SOFT_RESET@GOTPAGE
Lloh30:
	ldr	x20, [x20, _MAC_CSR1_SOFT_RESET@GOTPAGEOFF]
	ldr	w1, [x20]
	add	x0, sp, #12
	mov	w2, #1
	bl	_rt2x00_set_field32
Lloh31:
	adrp	x21, _MAC_CSR1_BBP_RESET@GOTPAGE
Lloh32:
	ldr	x21, [x21, _MAC_CSR1_BBP_RESET@GOTPAGEOFF]
	ldr	w1, [x21]
	add	x0, sp, #12
	mov	w2, #1
	bl	_rt2x00_set_field32
Lloh33:
	adrp	x22, _MAC_CSR1@GOTPAGE
Lloh34:
	ldr	x22, [x22, _MAC_CSR1@GOTPAGEOFF]
	ldr	w1, [x22]
	ldr	w2, [sp, #12]
	mov	x0, x19
	bl	_rt2x00mmio_register_write
	ldr	w1, [x22]
	mov	x0, x19
	bl	_rt2x00mmio_register_read
	str	w0, [sp, #12]
	ldr	w1, [x20]
	add	x0, sp, #12
	mov	w2, #0
	bl	_rt2x00_set_field32
	ldr	w1, [x21]
	add	x0, sp, #12
	mov	w2, #0
	bl	_rt2x00_set_field32
	ldr	w1, [x22]
	ldr	w2, [sp, #12]
	mov	x0, x19
	bl	_rt2x00mmio_register_write
	ldr	w1, [x22]
	mov	x0, x19
	bl	_rt2x00mmio_register_read
	str	w0, [sp, #12]
Lloh35:
	adrp	x8, _MAC_CSR1_HOST_READY@GOTPAGE
Lloh36:
	ldr	x8, [x8, _MAC_CSR1_HOST_READY@GOTPAGEOFF]
Lloh37:
	ldr	w1, [x8]
	add	x0, sp, #12
	mov	w2, #1
	bl	_rt2x00_set_field32
	ldr	w1, [x22]
	ldr	w2, [sp, #12]
	mov	x0, x19
	bl	_rt2x00mmio_register_write
	mov	w0, #0
LBB0_10:
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #80
	ret
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpAdd	Lloh2, Lloh3
	.loh AdrpLdrGot	Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh19, Lloh20, Lloh21
	.loh AdrpLdrGot	Lloh17, Lloh18
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh16
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGot	Lloh6, Lloh7
	.loh AdrpLdrGot	Lloh4, Lloh5
	.loh AdrpAdd	Lloh24, Lloh25
	.loh AdrpLdrGotLdr	Lloh26, Lloh27, Lloh28
	.loh AdrpLdrGotLdr	Lloh35, Lloh36, Lloh37
	.loh AdrpLdrGot	Lloh33, Lloh34
	.loh AdrpLdrGot	Lloh31, Lloh32
	.loh AdrpLdrGot	Lloh29, Lloh30
	.cfi_endproc
                                        ; -- End function
	.comm	_MAC_CSR0,4,2                   ; @MAC_CSR0
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"Unstable hardware\n"

	.comm	_EBUSY,4,2                      ; @EBUSY
	.comm	_MCU_CNTL_CSR_RESET,4,2         ; @MCU_CNTL_CSR_RESET
	.comm	_MCU_CNTL_CSR,4,2               ; @MCU_CNTL_CSR
	.comm	_M2H_CMD_DONE_CSR,4,2           ; @M2H_CMD_DONE_CSR
	.comm	_H2M_MAILBOX_CSR,4,2            ; @H2M_MAILBOX_CSR
	.comm	_HOST_CMD_CSR,4,2               ; @HOST_CMD_CSR
	.comm	_MCU_CNTL_CSR_SELECT_BANK,4,2   ; @MCU_CNTL_CSR_SELECT_BANK
	.comm	_FIRMWARE_IMAGE_BASE,4,2        ; @FIRMWARE_IMAGE_BASE
	.comm	_MCU_CNTL_CSR_READY,4,2         ; @MCU_CNTL_CSR_READY
l_.str.1:                               ; @.str.1
	.asciz	"MCU Control register not ready\n"

	.comm	_MAC_CSR1_SOFT_RESET,4,2        ; @MAC_CSR1_SOFT_RESET
	.comm	_MAC_CSR1_BBP_RESET,4,2         ; @MAC_CSR1_BBP_RESET
	.comm	_MAC_CSR1,4,2                   ; @MAC_CSR1
	.comm	_MAC_CSR1_HOST_READY,4,2        ; @MAC_CSR1_HOST_READY
	.no_dead_strip	_rt61pci_load_firmware
.subsections_via_symbols
