	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function kirin_pcie_phy_init
_kirin_pcie_phy_init:                   ## @kirin_pcie_phy_init
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %rbx
	movq	(%rdi), %rax
	movq	(%rax), %r14
	movq	_PCIE_APB_PHY_CTRL1@GOTPCREL(%rip), %r15
	movl	(%r15), %esi
	callq	_kirin_apb_phy_readl
	movq	_PHY_REF_PAD_BIT@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	notl	%esi
	andl	%eax, %esi
	movl	(%r15), %edx
	movq	%rbx, %rdi
	callq	_kirin_apb_phy_writel
	movq	_PCIE_APB_PHY_CTRL0@GOTPCREL(%rip), %r12
	movl	(%r12), %esi
	movq	%rbx, %rdi
	callq	_kirin_apb_phy_readl
	movq	_PHY_PWR_DOWN_BIT@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	notl	%esi
	andl	%eax, %esi
	movl	(%r12), %edx
	movq	%rbx, %rdi
	callq	_kirin_apb_phy_writel
	movq	_TIME_PHY_PD_MIN@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_TIME_PHY_PD_MAX@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_usleep_range
	movl	(%r15), %esi
	movq	%rbx, %rdi
	callq	_kirin_apb_phy_readl
	movq	_PHY_RST_ACK_BIT@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	notl	%esi
	andl	%eax, %esi
	movl	(%r15), %edx
	movq	%rbx, %rdi
	callq	_kirin_apb_phy_writel
	movq	_PIPE_CLK_WAIT_MIN@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_PIPE_CLK_WAIT_MAX@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_usleep_range
	movq	_PCIE_APB_PHY_STATUS0@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_kirin_apb_phy_readl
	movq	_PIPE_CLK_STABLE@GOTPCREL(%rip), %rcx
	testl	%eax, (%rcx)
	je	LBB0_1
## %bb.2:
	leaq	L_.str(%rip), %rsi
	movq	%r14, %rdi
	callq	_dev_err
	movq	_EINVAL@GOTPCREL(%rip), %rcx
	xorl	%eax, %eax
	subl	(%rcx), %eax
	jmp	LBB0_3
LBB0_1:
	xorl	%eax, %eax
LBB0_3:
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_PCIE_APB_PHY_CTRL1,4,2         ## @PCIE_APB_PHY_CTRL1
	.comm	_PHY_REF_PAD_BIT,4,2            ## @PHY_REF_PAD_BIT
	.comm	_PCIE_APB_PHY_CTRL0,4,2         ## @PCIE_APB_PHY_CTRL0
	.comm	_PHY_PWR_DOWN_BIT,4,2           ## @PHY_PWR_DOWN_BIT
	.comm	_TIME_PHY_PD_MIN,4,2            ## @TIME_PHY_PD_MIN
	.comm	_TIME_PHY_PD_MAX,4,2            ## @TIME_PHY_PD_MAX
	.comm	_PHY_RST_ACK_BIT,4,2            ## @PHY_RST_ACK_BIT
	.comm	_PIPE_CLK_WAIT_MIN,4,2          ## @PIPE_CLK_WAIT_MIN
	.comm	_PIPE_CLK_WAIT_MAX,4,2          ## @PIPE_CLK_WAIT_MAX
	.comm	_PCIE_APB_PHY_STATUS0,4,2       ## @PCIE_APB_PHY_STATUS0
	.comm	_PIPE_CLK_STABLE,4,2            ## @PIPE_CLK_STABLE
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"PIPE clk is not stable\n"

	.comm	_EINVAL,4,2                     ## @EINVAL
	.no_dead_strip	_kirin_pcie_phy_init
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function kirin_pcie_phy_init
_kirin_pcie_phy_init:                   ; @kirin_pcie_phy_init
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x20, x0
	ldr	x8, [x0]
	ldr	x19, [x8]
Lloh0:
	adrp	x21, _PCIE_APB_PHY_CTRL1@GOTPAGE
Lloh1:
	ldr	x21, [x21, _PCIE_APB_PHY_CTRL1@GOTPAGEOFF]
	ldr	w1, [x21]
	bl	_kirin_apb_phy_readl
Lloh2:
	adrp	x8, _PHY_REF_PAD_BIT@GOTPAGE
Lloh3:
	ldr	x8, [x8, _PHY_REF_PAD_BIT@GOTPAGEOFF]
Lloh4:
	ldr	w8, [x8]
	bic	w1, w0, w8
	ldr	w2, [x21]
	mov	x0, x20
	bl	_kirin_apb_phy_writel
Lloh5:
	adrp	x22, _PCIE_APB_PHY_CTRL0@GOTPAGE
Lloh6:
	ldr	x22, [x22, _PCIE_APB_PHY_CTRL0@GOTPAGEOFF]
	ldr	w1, [x22]
	mov	x0, x20
	bl	_kirin_apb_phy_readl
Lloh7:
	adrp	x8, _PHY_PWR_DOWN_BIT@GOTPAGE
Lloh8:
	ldr	x8, [x8, _PHY_PWR_DOWN_BIT@GOTPAGEOFF]
Lloh9:
	ldr	w8, [x8]
	bic	w1, w0, w8
	ldr	w2, [x22]
	mov	x0, x20
	bl	_kirin_apb_phy_writel
Lloh10:
	adrp	x8, _TIME_PHY_PD_MIN@GOTPAGE
Lloh11:
	ldr	x8, [x8, _TIME_PHY_PD_MIN@GOTPAGEOFF]
Lloh12:
	ldr	w0, [x8]
Lloh13:
	adrp	x8, _TIME_PHY_PD_MAX@GOTPAGE
Lloh14:
	ldr	x8, [x8, _TIME_PHY_PD_MAX@GOTPAGEOFF]
Lloh15:
	ldr	w1, [x8]
	bl	_usleep_range
	ldr	w1, [x21]
	mov	x0, x20
	bl	_kirin_apb_phy_readl
Lloh16:
	adrp	x8, _PHY_RST_ACK_BIT@GOTPAGE
Lloh17:
	ldr	x8, [x8, _PHY_RST_ACK_BIT@GOTPAGEOFF]
Lloh18:
	ldr	w8, [x8]
	bic	w1, w0, w8
	ldr	w2, [x21]
	mov	x0, x20
	bl	_kirin_apb_phy_writel
Lloh19:
	adrp	x8, _PIPE_CLK_WAIT_MIN@GOTPAGE
Lloh20:
	ldr	x8, [x8, _PIPE_CLK_WAIT_MIN@GOTPAGEOFF]
Lloh21:
	ldr	w0, [x8]
Lloh22:
	adrp	x8, _PIPE_CLK_WAIT_MAX@GOTPAGE
Lloh23:
	ldr	x8, [x8, _PIPE_CLK_WAIT_MAX@GOTPAGEOFF]
Lloh24:
	ldr	w1, [x8]
	bl	_usleep_range
Lloh25:
	adrp	x8, _PCIE_APB_PHY_STATUS0@GOTPAGE
Lloh26:
	ldr	x8, [x8, _PCIE_APB_PHY_STATUS0@GOTPAGEOFF]
Lloh27:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_kirin_apb_phy_readl
Lloh28:
	adrp	x8, _PIPE_CLK_STABLE@GOTPAGE
Lloh29:
	ldr	x8, [x8, _PIPE_CLK_STABLE@GOTPAGEOFF]
Lloh30:
	ldr	w8, [x8]
	tst	w8, w0
	b.eq	LBB0_2
; %bb.1:
Lloh31:
	adrp	x1, l_.str@PAGE
Lloh32:
	add	x1, x1, l_.str@PAGEOFF
	mov	x0, x19
	bl	_dev_err
Lloh33:
	adrp	x8, _EINVAL@GOTPAGE
Lloh34:
	ldr	x8, [x8, _EINVAL@GOTPAGEOFF]
Lloh35:
	ldr	w8, [x8]
	neg	w0, w8
	b	LBB0_3
LBB0_2:
	mov	w0, #0
LBB0_3:
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh28, Lloh29, Lloh30
	.loh AdrpLdrGotLdr	Lloh25, Lloh26, Lloh27
	.loh AdrpLdrGotLdr	Lloh22, Lloh23, Lloh24
	.loh AdrpLdrGotLdr	Lloh19, Lloh20, Lloh21
	.loh AdrpLdrGotLdr	Lloh16, Lloh17, Lloh18
	.loh AdrpLdrGotLdr	Lloh13, Lloh14, Lloh15
	.loh AdrpLdrGotLdr	Lloh10, Lloh11, Lloh12
	.loh AdrpLdrGotLdr	Lloh7, Lloh8, Lloh9
	.loh AdrpLdrGot	Lloh5, Lloh6
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh33, Lloh34, Lloh35
	.loh AdrpAdd	Lloh31, Lloh32
	.cfi_endproc
                                        ; -- End function
	.comm	_PCIE_APB_PHY_CTRL1,4,2         ; @PCIE_APB_PHY_CTRL1
	.comm	_PHY_REF_PAD_BIT,4,2            ; @PHY_REF_PAD_BIT
	.comm	_PCIE_APB_PHY_CTRL0,4,2         ; @PCIE_APB_PHY_CTRL0
	.comm	_PHY_PWR_DOWN_BIT,4,2           ; @PHY_PWR_DOWN_BIT
	.comm	_TIME_PHY_PD_MIN,4,2            ; @TIME_PHY_PD_MIN
	.comm	_TIME_PHY_PD_MAX,4,2            ; @TIME_PHY_PD_MAX
	.comm	_PHY_RST_ACK_BIT,4,2            ; @PHY_RST_ACK_BIT
	.comm	_PIPE_CLK_WAIT_MIN,4,2          ; @PIPE_CLK_WAIT_MIN
	.comm	_PIPE_CLK_WAIT_MAX,4,2          ; @PIPE_CLK_WAIT_MAX
	.comm	_PCIE_APB_PHY_STATUS0,4,2       ; @PCIE_APB_PHY_STATUS0
	.comm	_PIPE_CLK_STABLE,4,2            ; @PIPE_CLK_STABLE
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"PIPE clk is not stable\n"

	.comm	_EINVAL,4,2                     ; @EINVAL
	.no_dead_strip	_kirin_pcie_phy_init
.subsections_via_symbols
