	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function rockchip_interrupts_register
_rockchip_interrupts_register:          ## @rockchip_interrupts_register
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$24, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	(%rsi), %r14
	cmpl	$0, (%r14)
	jle	LBB0_15
## %bb.1:
	movq	%rdi, %r12
	movq	_IRQ_NOREQUEST@GOTPCREL(%rip), %rax
	movq	_IRQ_NOPROBE@GOTPCREL(%rip), %rcx
	movl	(%rcx), %r13d
	orl	(%rax), %r13d
	movq	_IRQ_NOAUTOEN@GOTPCREL(%rip), %rax
	orl	(%rax), %r13d
	movq	8(%r14), %rbx
	xorl	%r15d, %r15d
	movq	%rdi, -56(%rbp)                 ## 8-byte Spill
	movl	%r13d, -44(%rbp)                ## 4-byte Spill
	jmp	LBB0_2
	.p2align	4, 0x90
LBB0_3:                                 ##   in Loop: Header=BB0_2 Depth=1
	movl	24(%rbx), %edx
	movq	%r12, %rdi
	leaq	L_.str(%rip), %rsi
	callq	_dev_warn
LBB0_14:                                ##   in Loop: Header=BB0_2 Depth=1
	incl	%r15d
	addq	$40, %rbx
	cmpl	(%r14), %r15d
	jge	LBB0_15
LBB0_2:                                 ## =>This Loop Header: Depth=1
                                        ##     Child Loop BB0_12 Depth 2
	cmpl	$0, 32(%rbx)
	je	LBB0_3
## %bb.4:                               ##   in Loop: Header=BB0_2 Depth=1
	movl	(%rbx), %edi
	callq	_clk_enable
	testl	%eax, %eax
	je	LBB0_6
## %bb.5:                               ##   in Loop: Header=BB0_2 Depth=1
	movl	24(%rbx), %edx
	movq	%r12, %rdi
	leaq	L_.str.1(%rip), %rsi
	callq	_dev_err
	jmp	LBB0_14
	.p2align	4, 0x90
LBB0_6:                                 ##   in Loop: Header=BB0_2 Depth=1
	movl	28(%rbx), %edi
	movl	$32, %esi
	movq	_irq_generic_chip_ops@GOTPCREL(%rip), %rdx
	xorl	%ecx, %ecx
	callq	_irq_domain_add_linear
	movl	%eax, 4(%rbx)
	testl	%eax, %eax
	je	LBB0_7
## %bb.9:                               ##   in Loop: Header=BB0_2 Depth=1
	movq	_handle_level_irq@GOTPCREL(%rip), %rcx
	movl	(%rcx), %r8d
	movq	_IRQ_GC_INIT_MASK_CACHE@GOTPCREL(%rip), %rcx
	movl	(%rcx), %r10d
	movl	%eax, %edi
	movl	$32, %esi
	movl	$1, %edx
	leaq	L_.str.3(%rip), %rcx
	movl	%r13d, %r9d
	pushq	%r10
	pushq	$0
	callq	_irq_alloc_domain_generic_chips
	addq	$16, %rsp
	testl	%eax, %eax
	je	LBB0_11
## %bb.10:                              ##   in Loop: Header=BB0_2 Depth=1
	movl	24(%rbx), %edx
	movq	%r12, %rdi
	leaq	L_.str.4(%rip), %rsi
	callq	_dev_err
	movl	4(%rbx), %edi
	callq	_irq_domain_remove
	jmp	LBB0_8
LBB0_7:                                 ##   in Loop: Header=BB0_2 Depth=1
	movl	24(%rbx), %edx
	movq	%r12, %rdi
	leaq	L_.str.2(%rip), %rsi
	callq	_dev_warn
LBB0_8:                                 ##   in Loop: Header=BB0_2 Depth=1
	movl	(%rbx), %edi
	callq	_clk_disable
	jmp	LBB0_14
LBB0_11:                                ##   in Loop: Header=BB0_2 Depth=1
	movq	_GPIO_INTMASK@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	addq	16(%rbx), %rsi
	movl	$-1, %edi
	callq	_writel_relaxed
	movq	_GPIO_INTEN@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	addq	16(%rbx), %rsi
	movl	$-1, %edi
	callq	_writel_relaxed
	movl	4(%rbx), %edi
	xorl	%r12d, %r12d
	xorl	%esi, %esi
	callq	_irq_get_domain_generic_chip
	movq	%rax, %r13
	movq	16(%rbx), %rax
	movq	%rax, 24(%r13)
	movq	%rbx, 16(%r13)
	movq	_GPIO_INTMASK@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	movq	8(%r13), %rcx
	movq	%rax, 48(%rcx)
	movq	_GPIO_PORTS_EOI@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 40(%rcx)
	movq	_irq_gc_ack_set_bit@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 32(%rcx)
	movq	_irq_gc_mask_set_bit@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 28(%rcx)
	movq	_irq_gc_mask_clr_bit@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 24(%rcx)
	movq	_rockchip_irq_enable@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 20(%rcx)
	movq	_rockchip_irq_disable@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 16(%rcx)
	movq	_irq_gc_set_wake@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 12(%rcx)
	movq	_rockchip_irq_suspend@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 8(%rcx)
	movq	_rockchip_irq_resume@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 4(%rcx)
	movq	_rockchip_irq_set_type@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, (%rcx)
	movl	12(%rbx), %edi
	callq	_IRQ_MSK
	movl	%eax, (%r13)
	movl	8(%rbx), %edi
	movq	_rockchip_irq_demux@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdx
	callq	_irq_set_chained_handler_and_data
	.p2align	4, 0x90
LBB0_12:                                ##   Parent Loop BB0_2 Depth=1
                                        ## =>  This Inner Loop Header: Depth=2
	movl	4(%rbx), %edi
	movl	%r12d, %esi
	callq	_irq_create_mapping
	incl	%r12d
	cmpl	$32, %r12d
	jne	LBB0_12
## %bb.13:                              ##   in Loop: Header=BB0_2 Depth=1
	movl	(%rbx), %edi
	callq	_clk_disable
	movq	-56(%rbp), %r12                 ## 8-byte Reload
	movl	-44(%rbp), %r13d                ## 4-byte Reload
	jmp	LBB0_14
LBB0_15:
	xorl	%eax, %eax
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_IRQ_NOREQUEST,4,2              ## @IRQ_NOREQUEST
	.comm	_IRQ_NOPROBE,4,2                ## @IRQ_NOPROBE
	.comm	_IRQ_NOAUTOEN,4,2               ## @IRQ_NOAUTOEN
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"bank %s is not valid\n"

L_.str.1:                               ## @.str.1
	.asciz	"failed to enable clock for bank %s\n"

	.comm	_irq_generic_chip_ops,4,2       ## @irq_generic_chip_ops
L_.str.2:                               ## @.str.2
	.asciz	"could not initialize irq domain for bank %s\n"

L_.str.3:                               ## @.str.3
	.asciz	"rockchip_gpio_irq"

	.comm	_handle_level_irq,4,2           ## @handle_level_irq
	.comm	_IRQ_GC_INIT_MASK_CACHE,4,2     ## @IRQ_GC_INIT_MASK_CACHE
L_.str.4:                               ## @.str.4
	.asciz	"could not alloc generic chips for bank %s\n"

	.comm	_GPIO_INTMASK,8,3               ## @GPIO_INTMASK
	.comm	_GPIO_INTEN,8,3                 ## @GPIO_INTEN
	.comm	_GPIO_PORTS_EOI,4,2             ## @GPIO_PORTS_EOI
	.comm	_irq_gc_ack_set_bit,4,2         ## @irq_gc_ack_set_bit
	.comm	_irq_gc_mask_set_bit,4,2        ## @irq_gc_mask_set_bit
	.comm	_irq_gc_mask_clr_bit,4,2        ## @irq_gc_mask_clr_bit
	.comm	_rockchip_irq_enable,4,2        ## @rockchip_irq_enable
	.comm	_rockchip_irq_disable,4,2       ## @rockchip_irq_disable
	.comm	_irq_gc_set_wake,4,2            ## @irq_gc_set_wake
	.comm	_rockchip_irq_suspend,4,2       ## @rockchip_irq_suspend
	.comm	_rockchip_irq_resume,4,2        ## @rockchip_irq_resume
	.comm	_rockchip_irq_set_type,4,2      ## @rockchip_irq_set_type
	.comm	_rockchip_irq_demux,4,2         ## @rockchip_irq_demux
	.no_dead_strip	_rockchip_interrupts_register
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function rockchip_interrupts_register
_rockchip_interrupts_register:          ; @rockchip_interrupts_register
	.cfi_startproc
; %bb.0:
	stp	x28, x27, [sp, #-96]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 96
	stp	x26, x25, [sp, #16]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #32]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #48]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #64]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #80]             ; 16-byte Folded Spill
	add	x29, sp, #80
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	ldr	x24, [x1]
	ldr	w8, [x24]
	cmp	w8, #1
	b.lt	LBB0_15
; %bb.1:
	mov	x19, x0
	mov	w26, #0
Lloh0:
	adrp	x8, _IRQ_NOREQUEST@GOTPAGE
Lloh1:
	ldr	x8, [x8, _IRQ_NOREQUEST@GOTPAGEOFF]
Lloh2:
	ldr	w8, [x8]
Lloh3:
	adrp	x9, _IRQ_NOPROBE@GOTPAGE
Lloh4:
	ldr	x9, [x9, _IRQ_NOPROBE@GOTPAGEOFF]
Lloh5:
	ldr	w9, [x9]
	orr	w8, w9, w8
Lloh6:
	adrp	x9, _IRQ_NOAUTOEN@GOTPAGE
Lloh7:
	ldr	x9, [x9, _IRQ_NOAUTOEN@GOTPAGEOFF]
Lloh8:
	ldr	w9, [x9]
	orr	w20, w8, w9
	ldr	x21, [x24, #8]
Lloh9:
	adrp	x22, l_.str@PAGE
Lloh10:
	add	x22, x22, l_.str@PAGEOFF
Lloh11:
	adrp	x23, _irq_generic_chip_ops@GOTPAGE
Lloh12:
	ldr	x23, [x23, _irq_generic_chip_ops@GOTPAGEOFF]
Lloh13:
	adrp	x28, l_.str.2@PAGE
Lloh14:
	add	x28, x28, l_.str.2@PAGEOFF
Lloh15:
	adrp	x25, _handle_level_irq@GOTPAGE
Lloh16:
	ldr	x25, [x25, _handle_level_irq@GOTPAGEOFF]
Lloh17:
	adrp	x27, _IRQ_GC_INIT_MASK_CACHE@GOTPAGE
Lloh18:
	ldr	x27, [x27, _IRQ_GC_INIT_MASK_CACHE@GOTPAGEOFF]
	b	LBB0_4
LBB0_2:                                 ;   in Loop: Header=BB0_4 Depth=1
	ldr	w2, [x21, #24]
	mov	x0, x19
	mov	x1, x22
	bl	_dev_warn
LBB0_3:                                 ;   in Loop: Header=BB0_4 Depth=1
	add	w26, w26, #1
	add	x21, x21, #40
	ldr	w8, [x24]
	cmp	w26, w8
	b.ge	LBB0_15
LBB0_4:                                 ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_13 Depth 2
	ldr	w8, [x21, #32]
	cbz	w8, LBB0_2
; %bb.5:                                ;   in Loop: Header=BB0_4 Depth=1
	ldr	w0, [x21]
	bl	_clk_enable
	cbz	w0, LBB0_7
; %bb.6:                                ;   in Loop: Header=BB0_4 Depth=1
	ldr	w2, [x21, #24]
	mov	x0, x19
Lloh19:
	adrp	x1, l_.str.1@PAGE
Lloh20:
	add	x1, x1, l_.str.1@PAGEOFF
	bl	_dev_err
	b	LBB0_3
LBB0_7:                                 ;   in Loop: Header=BB0_4 Depth=1
	ldr	w0, [x21, #28]
	mov	w1, #32
	mov	x2, x23
	mov	x3, #0
	bl	_irq_domain_add_linear
	str	w0, [x21, #4]
	cbz	w0, LBB0_10
; %bb.8:                                ;   in Loop: Header=BB0_4 Depth=1
	ldr	w4, [x25]
	ldr	w7, [x27]
	mov	w1, #32
	mov	w2, #1
Lloh21:
	adrp	x3, l_.str.3@PAGE
Lloh22:
	add	x3, x3, l_.str.3@PAGEOFF
	mov	x5, x20
	mov	w6, #0
	bl	_irq_alloc_domain_generic_chips
	cbz	w0, LBB0_12
; %bb.9:                                ;   in Loop: Header=BB0_4 Depth=1
	ldr	w2, [x21, #24]
	mov	x0, x19
Lloh23:
	adrp	x1, l_.str.4@PAGE
Lloh24:
	add	x1, x1, l_.str.4@PAGEOFF
	bl	_dev_err
	ldr	w0, [x21, #4]
	bl	_irq_domain_remove
	b	LBB0_11
LBB0_10:                                ;   in Loop: Header=BB0_4 Depth=1
	ldr	w2, [x21, #24]
	mov	x0, x19
	mov	x1, x28
	bl	_dev_warn
LBB0_11:                                ;   in Loop: Header=BB0_4 Depth=1
	ldr	w0, [x21]
	bl	_clk_disable
	b	LBB0_3
LBB0_12:                                ;   in Loop: Header=BB0_4 Depth=1
	mov	x22, x20
	mov	x20, x23
	mov	x23, x25
	mov	x25, x28
	ldr	x8, [x21, #16]
Lloh25:
	adrp	x27, _GPIO_INTMASK@GOTPAGE
Lloh26:
	ldr	x27, [x27, _GPIO_INTMASK@GOTPAGEOFF]
	ldr	x9, [x27]
	add	x1, x9, x8
	mov	w0, #-1
	bl	_writel_relaxed
	ldr	x8, [x21, #16]
Lloh27:
	adrp	x9, _GPIO_INTEN@GOTPAGE
Lloh28:
	ldr	x9, [x9, _GPIO_INTEN@GOTPAGEOFF]
Lloh29:
	ldr	x9, [x9]
	add	x1, x9, x8
	mov	w0, #-1
	bl	_writel_relaxed
	ldr	w0, [x21, #4]
	mov	w1, #0
	bl	_irq_get_domain_generic_chip
	mov	x28, x0
	ldr	x8, [x21, #16]
	stp	x21, x8, [x0, #16]
	ldr	x8, [x27]
	ldr	x9, [x0, #8]
	str	x8, [x9, #48]
Lloh30:
	adrp	x8, _GPIO_PORTS_EOI@GOTPAGE
Lloh31:
	ldr	x8, [x8, _GPIO_PORTS_EOI@GOTPAGEOFF]
Lloh32:
	ldr	w8, [x8]
	str	w8, [x9, #40]
Lloh33:
	adrp	x8, _irq_gc_ack_set_bit@GOTPAGE
Lloh34:
	ldr	x8, [x8, _irq_gc_ack_set_bit@GOTPAGEOFF]
Lloh35:
	ldr	w8, [x8]
	str	w8, [x9, #32]
Lloh36:
	adrp	x8, _irq_gc_mask_set_bit@GOTPAGE
Lloh37:
	ldr	x8, [x8, _irq_gc_mask_set_bit@GOTPAGEOFF]
Lloh38:
	ldr	w8, [x8]
Lloh39:
	adrp	x10, _irq_gc_mask_clr_bit@GOTPAGE
Lloh40:
	ldr	x10, [x10, _irq_gc_mask_clr_bit@GOTPAGEOFF]
Lloh41:
	ldr	w10, [x10]
	stp	w10, w8, [x9, #24]
Lloh42:
	adrp	x8, _rockchip_irq_enable@GOTPAGE
Lloh43:
	ldr	x8, [x8, _rockchip_irq_enable@GOTPAGEOFF]
Lloh44:
	ldr	w8, [x8]
Lloh45:
	adrp	x10, _rockchip_irq_disable@GOTPAGE
Lloh46:
	ldr	x10, [x10, _rockchip_irq_disable@GOTPAGEOFF]
Lloh47:
	ldr	w10, [x10]
	stp	w10, w8, [x9, #16]
Lloh48:
	adrp	x8, _irq_gc_set_wake@GOTPAGE
Lloh49:
	ldr	x8, [x8, _irq_gc_set_wake@GOTPAGEOFF]
Lloh50:
	ldr	w8, [x8]
Lloh51:
	adrp	x10, _rockchip_irq_suspend@GOTPAGE
Lloh52:
	ldr	x10, [x10, _rockchip_irq_suspend@GOTPAGEOFF]
Lloh53:
	ldr	w10, [x10]
	stp	w10, w8, [x9, #8]
Lloh54:
	adrp	x8, _rockchip_irq_resume@GOTPAGE
Lloh55:
	ldr	x8, [x8, _rockchip_irq_resume@GOTPAGEOFF]
Lloh56:
	ldr	w8, [x8]
Lloh57:
	adrp	x10, _rockchip_irq_set_type@GOTPAGE
Lloh58:
	ldr	x10, [x10, _rockchip_irq_set_type@GOTPAGEOFF]
Lloh59:
	ldr	w10, [x10]
	stp	w10, w8, [x9]
	ldr	w0, [x21, #12]
	bl	_IRQ_MSK
	str	w0, [x28]
	ldr	w0, [x21, #8]
Lloh60:
	adrp	x8, _rockchip_irq_demux@GOTPAGE
Lloh61:
	ldr	x8, [x8, _rockchip_irq_demux@GOTPAGEOFF]
Lloh62:
	ldr	w1, [x8]
	mov	x2, x21
	bl	_irq_set_chained_handler_and_data
	mov	w28, #0
LBB0_13:                                ;   Parent Loop BB0_4 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	ldr	w0, [x21, #4]
	mov	x1, x28
	bl	_irq_create_mapping
	add	w28, w28, #1
	cmp	w28, #32
	b.ne	LBB0_13
; %bb.14:                               ;   in Loop: Header=BB0_4 Depth=1
	ldr	w0, [x21]
	bl	_clk_disable
	mov	x28, x25
	mov	x25, x23
	mov	x23, x20
	mov	x20, x22
Lloh63:
	adrp	x22, l_.str@PAGE
Lloh64:
	add	x22, x22, l_.str@PAGEOFF
Lloh65:
	adrp	x27, _IRQ_GC_INIT_MASK_CACHE@GOTPAGE
Lloh66:
	ldr	x27, [x27, _IRQ_GC_INIT_MASK_CACHE@GOTPAGEOFF]
	b	LBB0_3
LBB0_15:
	mov	w0, #0
	ldp	x29, x30, [sp, #80]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #64]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #48]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #32]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #16]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp], #96             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGot	Lloh17, Lloh18
	.loh AdrpLdrGot	Lloh15, Lloh16
	.loh AdrpAdd	Lloh13, Lloh14
	.loh AdrpLdrGot	Lloh11, Lloh12
	.loh AdrpAdd	Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpAdd	Lloh19, Lloh20
	.loh AdrpAdd	Lloh21, Lloh22
	.loh AdrpAdd	Lloh23, Lloh24
	.loh AdrpLdrGotLdr	Lloh60, Lloh61, Lloh62
	.loh AdrpLdrGotLdr	Lloh57, Lloh58, Lloh59
	.loh AdrpLdrGotLdr	Lloh54, Lloh55, Lloh56
	.loh AdrpLdrGotLdr	Lloh51, Lloh52, Lloh53
	.loh AdrpLdrGotLdr	Lloh48, Lloh49, Lloh50
	.loh AdrpLdrGotLdr	Lloh45, Lloh46, Lloh47
	.loh AdrpLdrGotLdr	Lloh42, Lloh43, Lloh44
	.loh AdrpLdrGotLdr	Lloh39, Lloh40, Lloh41
	.loh AdrpLdrGotLdr	Lloh36, Lloh37, Lloh38
	.loh AdrpLdrGotLdr	Lloh33, Lloh34, Lloh35
	.loh AdrpLdrGotLdr	Lloh30, Lloh31, Lloh32
	.loh AdrpLdrGotLdr	Lloh27, Lloh28, Lloh29
	.loh AdrpLdrGot	Lloh25, Lloh26
	.loh AdrpLdrGot	Lloh65, Lloh66
	.loh AdrpAdd	Lloh63, Lloh64
	.cfi_endproc
                                        ; -- End function
	.comm	_IRQ_NOREQUEST,4,2              ; @IRQ_NOREQUEST
	.comm	_IRQ_NOPROBE,4,2                ; @IRQ_NOPROBE
	.comm	_IRQ_NOAUTOEN,4,2               ; @IRQ_NOAUTOEN
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"bank %s is not valid\n"

l_.str.1:                               ; @.str.1
	.asciz	"failed to enable clock for bank %s\n"

	.comm	_irq_generic_chip_ops,4,2       ; @irq_generic_chip_ops
l_.str.2:                               ; @.str.2
	.asciz	"could not initialize irq domain for bank %s\n"

l_.str.3:                               ; @.str.3
	.asciz	"rockchip_gpio_irq"

	.comm	_handle_level_irq,4,2           ; @handle_level_irq
	.comm	_IRQ_GC_INIT_MASK_CACHE,4,2     ; @IRQ_GC_INIT_MASK_CACHE
l_.str.4:                               ; @.str.4
	.asciz	"could not alloc generic chips for bank %s\n"

	.comm	_GPIO_INTMASK,8,3               ; @GPIO_INTMASK
	.comm	_GPIO_INTEN,8,3                 ; @GPIO_INTEN
	.comm	_GPIO_PORTS_EOI,4,2             ; @GPIO_PORTS_EOI
	.comm	_irq_gc_ack_set_bit,4,2         ; @irq_gc_ack_set_bit
	.comm	_irq_gc_mask_set_bit,4,2        ; @irq_gc_mask_set_bit
	.comm	_irq_gc_mask_clr_bit,4,2        ; @irq_gc_mask_clr_bit
	.comm	_rockchip_irq_enable,4,2        ; @rockchip_irq_enable
	.comm	_rockchip_irq_disable,4,2       ; @rockchip_irq_disable
	.comm	_irq_gc_set_wake,4,2            ; @irq_gc_set_wake
	.comm	_rockchip_irq_suspend,4,2       ; @rockchip_irq_suspend
	.comm	_rockchip_irq_resume,4,2        ; @rockchip_irq_resume
	.comm	_rockchip_irq_set_type,4,2      ; @rockchip_irq_set_type
	.comm	_rockchip_irq_demux,4,2         ; @rockchip_irq_demux
	.no_dead_strip	_rockchip_interrupts_register
.subsections_via_symbols
