	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function rt2800_config_channel_rf7620
_rt2800_config_channel_rf7620:          ## @rt2800_config_channel_rf7620
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$24, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdx, %r15
	movq	%rsi, %r14
	movq	%rdi, %r12
	movq	16(%rdi), %rax
	movq	%rax, -56(%rbp)                 ## 8-byte Spill
	movl	$13, %esi
	callq	_rt2800_rfcsr_read
	movl	%eax, -44(%rbp)
	movq	_RFCSR13_RDIV_MT7620@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	movq	%r12, %rdi
	callq	_rt2800_clk_is_20mhz
	xorl	%ecx, %ecx
	testq	%rax, %rax
	setne	%cl
	leal	(%rcx,%rcx,2), %edx
	leaq	-44(%rbp), %r13
	movq	%r13, %rdi
	movl	%ebx, %esi
	callq	_rt2x00_set_field8
	movl	-44(%rbp), %edx
	movq	%r12, %rdi
	movl	$13, %esi
	callq	_rt2800_rfcsr_write
	movq	%r12, %rdi
	movl	$20, %esi
	callq	_rt2800_rfcsr_read
	movzbl	(%r15), %edx
	movl	%edx, -44(%rbp)
	movq	%r12, %rdi
	movl	$20, %esi
	callq	_rt2800_rfcsr_write
	movq	%r12, %rdi
	movl	$21, %esi
	callq	_rt2800_rfcsr_read
	movl	%eax, -44(%rbp)
	movq	_RFCSR21_BIT1@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r13, %rdi
	xorl	%edx, %edx
	callq	_rt2x00_set_field8
	movl	-44(%rbp), %edx
	movq	%r12, %rdi
	movl	$21, %esi
	callq	_rt2800_rfcsr_write
	movq	%r12, %rdi
	movl	$16, %esi
	callq	_rt2800_rfcsr_read
	movl	%eax, -44(%rbp)
	movq	_RFCSR16_RF_PLL_FREQ_SEL_MT7620@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r13, %rdi
	xorl	%edx, %edx
	callq	_rt2x00_set_field8
	movl	-44(%rbp), %edx
	movq	%r12, %rdi
	movl	$16, %esi
	callq	_rt2800_rfcsr_write
	movq	%r12, %rdi
	movl	$22, %esi
	callq	_rt2800_rfcsr_read
	movl	%eax, -44(%rbp)
	movq	_RFCSR22_FREQPLAN_D_MT7620@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r13, %rdi
	xorl	%edx, %edx
	callq	_rt2x00_set_field8
	movl	-44(%rbp), %edx
	movq	%r12, %rdi
	movl	$22, %esi
	callq	_rt2800_rfcsr_write
	movq	%r12, %rdi
	movl	$17, %esi
	callq	_rt2800_rfcsr_read
	movl	4(%r15), %edx
	movl	%edx, -44(%rbp)
	movq	%r12, %rdi
	movl	$17, %esi
	callq	_rt2800_rfcsr_write
	movq	%r12, %rdi
	movl	$18, %esi
	callq	_rt2800_rfcsr_read
	movl	8(%r15), %edx
	movl	%edx, -44(%rbp)
	movq	%r12, %rdi
	movl	$18, %esi
	callq	_rt2800_rfcsr_write
	movq	%r12, %rdi
	movl	$19, %esi
	callq	_rt2800_rfcsr_read
	movl	%eax, -44(%rbp)
	movq	_RFCSR19_K@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	12(%r15), %edx
	movq	%r13, %rdi
	callq	_rt2x00_set_field8
	movl	-44(%rbp), %edx
	movq	%r12, %rdi
	movl	$19, %esi
	callq	_rt2800_rfcsr_write
	movq	%r12, %rdi
	movl	$16, %esi
	callq	_rt2800_rfcsr_read
	movl	%eax, -44(%rbp)
	movq	_RFCSR16_SDM_MODE_MT7620@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r13, %rdi
	movl	$128, %edx
	callq	_rt2x00_set_field8
	movl	-44(%rbp), %edx
	movq	%r12, %rdi
	movl	$16, %esi
	callq	_rt2800_rfcsr_write
	movq	%r12, %rdi
	movl	$21, %esi
	callq	_rt2800_rfcsr_read
	movl	%eax, -44(%rbp)
	movq	_RFCSR21_BIT8@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r13, %rdi
	movl	$1, %edx
	callq	_rt2x00_set_field8
	movl	-44(%rbp), %edx
	movq	%r12, %rdi
	movl	$21, %esi
	callq	_rt2800_rfcsr_write
	movq	%r12, %rdi
	movl	$1, %esi
	callq	_rt2800_rfcsr_read
	movl	%eax, -44(%rbp)
	movq	_RFCSR1_TX2_EN_MT7620@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	xorl	%edx, %edx
	cmpl	$1, 4(%r12)
	setne	%dl
	movq	%r13, %rdi
	callq	_rt2x00_set_field8
	movl	-44(%rbp), %edx
	movq	%r12, %rdi
	movl	$1, %esi
	callq	_rt2800_rfcsr_write
	movq	%r12, %rdi
	movl	$2, %esi
	callq	_rt2800_rfcsr_read
	movl	%eax, -44(%rbp)
	movq	_RFCSR2_TX2_EN_MT7620@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	xorl	%edx, %edx
	cmpl	$1, 4(%r12)
	setne	%dl
	movq	%r13, %rdi
	callq	_rt2x00_set_field8
	movq	_RFCSR2_RX2_EN_MT7620@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	xorl	%edx, %edx
	cmpl	$1, 8(%r12)
	setne	%dl
	movq	%r13, %rdi
	callq	_rt2x00_set_field8
	movl	-44(%rbp), %edx
	movq	%r12, %rdi
	movl	$2, %esi
	callq	_rt2800_rfcsr_write
	movq	%r12, %rdi
	movl	$42, %esi
	callq	_rt2800_rfcsr_read
	movl	%eax, -44(%rbp)
	movq	_RFCSR42_TX2_EN_MT7620@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	xorl	%edx, %edx
	cmpl	$1, 4(%r12)
	setne	%dl
	movq	%r13, %rdi
	callq	_rt2x00_set_field8
	movl	-44(%rbp), %edx
	movq	%r12, %rdi
	movl	$42, %esi
	callq	_rt2800_rfcsr_write
	movq	%r14, %rdi
	callq	_conf_is_ht40
	xorl	%r13d, %r13d
	xorl	%ebx, %ebx
	testq	%rax, %rax
	setne	%r13b
	sete	%bl
	shll	$4, %ebx
	addl	$16, %ebx
	shll	$2, %r13d
	movq	%r12, %rdi
	movl	$6, %esi
	movl	%ebx, %edx
	callq	_rt2800_rfcsr_write_dccal
	movq	%r12, %rdi
	movl	$7, %esi
	movl	%ebx, %edx
	callq	_rt2800_rfcsr_write_dccal
	movq	%r12, %rdi
	movl	$8, %esi
	movl	%r13d, %edx
	callq	_rt2800_rfcsr_write_dccal
	movq	%r12, %rdi
	movl	$58, %esi
	movl	%ebx, %edx
	callq	_rt2800_rfcsr_write_dccal
	movq	%r12, %rdi
	movl	$59, %esi
	movl	%ebx, %edx
	callq	_rt2800_rfcsr_write_dccal
	movq	%r14, %rdi
	callq	_conf_is_ht40
	xorl	%ebx, %ebx
	testq	%rax, %rax
	sete	%bl
	shll	$5, %ebx
	orl	$8, %ebx
	movq	%r12, %rdi
	movl	$58, %esi
	movl	%ebx, %edx
	callq	_rt2800_rfcsr_write_dccal
	movq	%r12, %rdi
	movl	$59, %esi
	movl	%ebx, %edx
	callq	_rt2800_rfcsr_write_dccal
	movq	%r12, %rdi
	movl	$28, %esi
	callq	_rt2800_rfcsr_read
	movl	%eax, -44(%rbp)
	movq	_RFCSR28_CH11_HT40@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	movq	%r14, %rdi
	callq	_conf_is_ht40
	xorl	%edx, %edx
	testq	%rax, %rax
	je	LBB0_2
## %bb.1:
	xorl	%edx, %edx
	cmpl	$11, 16(%r15)
	sete	%dl
LBB0_2:
	leaq	-44(%rbp), %rdi
	movl	%ebx, %esi
	callq	_rt2x00_set_field8
	movl	-44(%rbp), %edx
	movq	%r12, %rdi
	movl	$28, %esi
	callq	_rt2800_rfcsr_write
	movq	_DEVICE_STATE_SCANNING@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	%r12, %rsi
	callq	_test_bit
	testl	%eax, %eax
	jne	LBB0_4
## %bb.3:
	movq	%r14, %rdi
	callq	_conf_is_ht40
	xorl	%ecx, %ecx
	testq	%rax, %rax
	sete	%cl
	movq	-56(%rbp), %rax                 ## 8-byte Reload
	movl	(%rax,%rcx,8), %r15d
	movl	4(%rax,%rcx,8), %r14d
	movq	%r12, %rdi
	movl	$5, %esi
	movl	$6, %edx
	callq	_rt2800_rfcsr_read_bank
	andl	$-64, %eax
	orl	%r15d, %eax
	movl	%eax, -44(%rbp)
	movq	%r12, %rdi
	movl	$5, %esi
	movl	$6, %edx
	movl	%eax, %ecx
	callq	_rt2800_rfcsr_write_bank
	movq	%r12, %rdi
	movl	$5, %esi
	movl	$7, %edx
	callq	_rt2800_rfcsr_read_bank
	andl	$-64, %eax
	orl	%r15d, %eax
	movl	%eax, -44(%rbp)
	movq	%r12, %rdi
	movl	$5, %esi
	movl	$7, %edx
	movl	%eax, %ecx
	callq	_rt2800_rfcsr_write_bank
	movq	%r12, %rdi
	movl	$7, %esi
	movl	$6, %edx
	callq	_rt2800_rfcsr_read_bank
	andl	$-64, %eax
	orl	%r15d, %eax
	movl	%eax, -44(%rbp)
	movq	%r12, %rdi
	movl	$7, %esi
	movl	$6, %edx
	movl	%eax, %ecx
	callq	_rt2800_rfcsr_write_bank
	movq	%r12, %rdi
	movl	$7, %esi
	movl	$7, %edx
	callq	_rt2800_rfcsr_read_bank
	andl	$-64, %eax
	orl	%eax, %r15d
	movl	%r15d, -44(%rbp)
	movq	%r12, %rdi
	movl	$7, %esi
	movl	$7, %edx
	movl	%r15d, %ecx
	callq	_rt2800_rfcsr_write_bank
	movq	%r12, %rdi
	movl	$5, %esi
	movl	$58, %edx
	callq	_rt2800_rfcsr_read_bank
	andl	$-64, %eax
	orl	%r14d, %eax
	movl	%eax, -44(%rbp)
	movq	%r12, %rdi
	movl	$5, %esi
	movl	$58, %edx
	movl	%eax, %ecx
	callq	_rt2800_rfcsr_write_bank
	movq	%r12, %rdi
	movl	$5, %esi
	movl	$59, %edx
	callq	_rt2800_rfcsr_read_bank
	andl	$-64, %eax
	orl	%r14d, %eax
	movl	%eax, -44(%rbp)
	movq	%r12, %rdi
	movl	$5, %esi
	movl	$59, %edx
	movl	%eax, %ecx
	callq	_rt2800_rfcsr_write_bank
	movq	%r12, %rdi
	movl	$7, %esi
	movl	$58, %edx
	callq	_rt2800_rfcsr_read_bank
	andl	$-64, %eax
	orl	%r14d, %eax
	movl	%eax, -44(%rbp)
	movq	%r12, %rdi
	movl	$7, %esi
	movl	$58, %edx
	movl	%eax, %ecx
	callq	_rt2800_rfcsr_write_bank
	movq	%r12, %rdi
	movl	$7, %esi
	movl	$59, %edx
	callq	_rt2800_rfcsr_read_bank
	andl	$-64, %eax
	orl	%eax, %r14d
	movl	%r14d, -44(%rbp)
	movq	%r12, %rdi
	movl	$7, %esi
	movl	$59, %edx
	movl	%r14d, %ecx
	callq	_rt2800_rfcsr_write_bank
LBB0_4:
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_RFCSR13_RDIV_MT7620,4,2        ## @RFCSR13_RDIV_MT7620
	.comm	_RFCSR21_BIT1,4,2               ## @RFCSR21_BIT1
	.comm	_RFCSR16_RF_PLL_FREQ_SEL_MT7620,4,2 ## @RFCSR16_RF_PLL_FREQ_SEL_MT7620
	.comm	_RFCSR22_FREQPLAN_D_MT7620,4,2  ## @RFCSR22_FREQPLAN_D_MT7620
	.comm	_RFCSR19_K,4,2                  ## @RFCSR19_K
	.comm	_RFCSR16_SDM_MODE_MT7620,4,2    ## @RFCSR16_SDM_MODE_MT7620
	.comm	_RFCSR21_BIT8,4,2               ## @RFCSR21_BIT8
	.comm	_RFCSR1_TX2_EN_MT7620,4,2       ## @RFCSR1_TX2_EN_MT7620
	.comm	_RFCSR2_TX2_EN_MT7620,4,2       ## @RFCSR2_TX2_EN_MT7620
	.comm	_RFCSR2_RX2_EN_MT7620,4,2       ## @RFCSR2_RX2_EN_MT7620
	.comm	_RFCSR42_TX2_EN_MT7620,4,2      ## @RFCSR42_TX2_EN_MT7620
	.comm	_RFCSR28_CH11_HT40,4,2          ## @RFCSR28_CH11_HT40
	.comm	_DEVICE_STATE_SCANNING,4,2      ## @DEVICE_STATE_SCANNING
	.no_dead_strip	_rt2800_config_channel_rf7620
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function rt2800_config_channel_rf7620
_rt2800_config_channel_rf7620:          ; @rt2800_config_channel_rf7620
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #96
	.cfi_def_cfa_offset 96
	stp	x26, x25, [sp, #16]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #32]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #48]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #64]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #80]             ; 16-byte Folded Spill
	add	x29, sp, #80
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	mov	x21, x2
	mov	x20, x1
	mov	x19, x0
	ldr	x24, [x0, #16]
	mov	w1, #13
	bl	_rt2800_rfcsr_read
	str	w0, [sp, #12]
Lloh0:
	adrp	x8, _RFCSR13_RDIV_MT7620@GOTPAGE
Lloh1:
	ldr	x8, [x8, _RFCSR13_RDIV_MT7620@GOTPAGEOFF]
Lloh2:
	ldr	w22, [x8]
	mov	x0, x19
	bl	_rt2800_clk_is_20mhz
	cmp	x0, #0
	mov	w8, #3
	csel	w2, wzr, w8, eq
	add	x0, sp, #12
	mov	x1, x22
	bl	_rt2x00_set_field8
	ldr	w2, [sp, #12]
	mov	x0, x19
	mov	w1, #13
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #20
	bl	_rt2800_rfcsr_read
	ldrb	w2, [x21]
	str	w2, [sp, #12]
	mov	x0, x19
	mov	w1, #20
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #21
	bl	_rt2800_rfcsr_read
	str	w0, [sp, #12]
Lloh3:
	adrp	x8, _RFCSR21_BIT1@GOTPAGE
Lloh4:
	ldr	x8, [x8, _RFCSR21_BIT1@GOTPAGEOFF]
Lloh5:
	ldr	w1, [x8]
	add	x0, sp, #12
	mov	w2, #0
	bl	_rt2x00_set_field8
	ldr	w2, [sp, #12]
	mov	x0, x19
	mov	w1, #21
	bl	_rt2800_rfcsr_write
	mov	w22, #16
	mov	x0, x19
	mov	w1, #16
	bl	_rt2800_rfcsr_read
	str	w0, [sp, #12]
Lloh6:
	adrp	x8, _RFCSR16_RF_PLL_FREQ_SEL_MT7620@GOTPAGE
Lloh7:
	ldr	x8, [x8, _RFCSR16_RF_PLL_FREQ_SEL_MT7620@GOTPAGEOFF]
Lloh8:
	ldr	w1, [x8]
	add	x0, sp, #12
	mov	w2, #0
	bl	_rt2x00_set_field8
	ldr	w2, [sp, #12]
	mov	x0, x19
	mov	w1, #16
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #22
	bl	_rt2800_rfcsr_read
	str	w0, [sp, #12]
Lloh9:
	adrp	x8, _RFCSR22_FREQPLAN_D_MT7620@GOTPAGE
Lloh10:
	ldr	x8, [x8, _RFCSR22_FREQPLAN_D_MT7620@GOTPAGEOFF]
Lloh11:
	ldr	w1, [x8]
	add	x0, sp, #12
	mov	w2, #0
	bl	_rt2x00_set_field8
	ldr	w2, [sp, #12]
	mov	x0, x19
	mov	w1, #22
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #17
	bl	_rt2800_rfcsr_read
	ldr	w2, [x21, #4]
	str	w2, [sp, #12]
	mov	x0, x19
	mov	w1, #17
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #18
	bl	_rt2800_rfcsr_read
	ldr	w2, [x21, #8]
	str	w2, [sp, #12]
	mov	x0, x19
	mov	w1, #18
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #19
	bl	_rt2800_rfcsr_read
	str	w0, [sp, #12]
Lloh12:
	adrp	x8, _RFCSR19_K@GOTPAGE
Lloh13:
	ldr	x8, [x8, _RFCSR19_K@GOTPAGEOFF]
Lloh14:
	ldr	w1, [x8]
	ldr	w2, [x21, #12]
	add	x0, sp, #12
	bl	_rt2x00_set_field8
	ldr	w2, [sp, #12]
	mov	x0, x19
	mov	w1, #19
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #16
	bl	_rt2800_rfcsr_read
	str	w0, [sp, #12]
Lloh15:
	adrp	x8, _RFCSR16_SDM_MODE_MT7620@GOTPAGE
Lloh16:
	ldr	x8, [x8, _RFCSR16_SDM_MODE_MT7620@GOTPAGEOFF]
Lloh17:
	ldr	w1, [x8]
	add	x0, sp, #12
	mov	w2, #128
	bl	_rt2x00_set_field8
	ldr	w2, [sp, #12]
	mov	x0, x19
	mov	w1, #16
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #21
	bl	_rt2800_rfcsr_read
	str	w0, [sp, #12]
Lloh18:
	adrp	x8, _RFCSR21_BIT8@GOTPAGE
Lloh19:
	ldr	x8, [x8, _RFCSR21_BIT8@GOTPAGEOFF]
Lloh20:
	ldr	w1, [x8]
	add	x0, sp, #12
	mov	w2, #1
	bl	_rt2x00_set_field8
	ldr	w2, [sp, #12]
	mov	x0, x19
	mov	w1, #21
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #1
	bl	_rt2800_rfcsr_read
	str	w0, [sp, #12]
Lloh21:
	adrp	x8, _RFCSR1_TX2_EN_MT7620@GOTPAGE
Lloh22:
	ldr	x8, [x8, _RFCSR1_TX2_EN_MT7620@GOTPAGEOFF]
Lloh23:
	ldr	w1, [x8]
	ldr	w8, [x19, #4]
	cmp	w8, #1
	cset	w2, ne
	add	x0, sp, #12
	bl	_rt2x00_set_field8
	ldr	w2, [sp, #12]
	mov	x0, x19
	mov	w1, #1
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #2
	bl	_rt2800_rfcsr_read
	str	w0, [sp, #12]
Lloh24:
	adrp	x8, _RFCSR2_TX2_EN_MT7620@GOTPAGE
Lloh25:
	ldr	x8, [x8, _RFCSR2_TX2_EN_MT7620@GOTPAGEOFF]
Lloh26:
	ldr	w1, [x8]
	ldr	w8, [x19, #4]
	cmp	w8, #1
	cset	w2, ne
	add	x0, sp, #12
	bl	_rt2x00_set_field8
Lloh27:
	adrp	x8, _RFCSR2_RX2_EN_MT7620@GOTPAGE
Lloh28:
	ldr	x8, [x8, _RFCSR2_RX2_EN_MT7620@GOTPAGEOFF]
Lloh29:
	ldr	w1, [x8]
	ldr	w8, [x19, #8]
	cmp	w8, #1
	cset	w2, ne
	add	x0, sp, #12
	bl	_rt2x00_set_field8
	ldr	w2, [sp, #12]
	mov	x0, x19
	mov	w1, #2
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #42
	bl	_rt2800_rfcsr_read
	str	w0, [sp, #12]
Lloh30:
	adrp	x8, _RFCSR42_TX2_EN_MT7620@GOTPAGE
Lloh31:
	ldr	x8, [x8, _RFCSR42_TX2_EN_MT7620@GOTPAGEOFF]
Lloh32:
	ldr	w1, [x8]
	ldr	w8, [x19, #4]
	cmp	w8, #1
	cset	w2, ne
	add	x0, sp, #12
	bl	_rt2x00_set_field8
	ldr	w2, [sp, #12]
	mov	x0, x19
	mov	w1, #42
	bl	_rt2800_rfcsr_write
	mov	x0, x20
	bl	_conf_is_ht40
	cmp	x0, #0
	cset	w8, ne
	mov	w9, #32
	csel	w22, w9, w22, eq
	lsl	w23, w8, #2
	mov	x0, x19
	mov	w1, #6
	mov	x2, x22
	bl	_rt2800_rfcsr_write_dccal
	mov	x0, x19
	mov	w1, #7
	mov	x2, x22
	bl	_rt2800_rfcsr_write_dccal
	mov	w25, #8
	mov	x0, x19
	mov	w1, #8
	mov	x2, x23
	bl	_rt2800_rfcsr_write_dccal
	mov	x0, x19
	mov	w1, #58
	mov	x2, x22
	bl	_rt2800_rfcsr_write_dccal
	mov	x0, x19
	mov	w1, #59
	mov	x2, x22
	bl	_rt2800_rfcsr_write_dccal
	mov	x0, x20
	bl	_conf_is_ht40
	cmp	x0, #0
	mov	w8, #40
	csel	w22, w8, w25, eq
	mov	x0, x19
	mov	w1, #58
	mov	x2, x22
	bl	_rt2800_rfcsr_write_dccal
	mov	x0, x19
	mov	w1, #59
	mov	x2, x22
	bl	_rt2800_rfcsr_write_dccal
	mov	x0, x19
	mov	w1, #28
	bl	_rt2800_rfcsr_read
	str	w0, [sp, #12]
Lloh33:
	adrp	x8, _RFCSR28_CH11_HT40@GOTPAGE
Lloh34:
	ldr	x8, [x8, _RFCSR28_CH11_HT40@GOTPAGEOFF]
Lloh35:
	ldr	w22, [x8]
	mov	x0, x20
	bl	_conf_is_ht40
	cbz	x0, LBB0_2
; %bb.1:
	ldr	w8, [x21, #16]
	cmp	w8, #11
	cset	w2, eq
	b	LBB0_3
LBB0_2:
	mov	w2, #0
LBB0_3:
	add	x0, sp, #12
	mov	x1, x22
	bl	_rt2x00_set_field8
	ldr	w2, [sp, #12]
	mov	x0, x19
	mov	w1, #28
	bl	_rt2800_rfcsr_write
Lloh36:
	adrp	x8, _DEVICE_STATE_SCANNING@GOTPAGE
Lloh37:
	ldr	x8, [x8, _DEVICE_STATE_SCANNING@GOTPAGEOFF]
Lloh38:
	ldr	w0, [x8]
	mov	x1, x19
	bl	_test_bit
	cbnz	w0, LBB0_5
; %bb.4:
	mov	x0, x20
	bl	_conf_is_ht40
	mov	w8, #4
	mov	w9, #12
	cmp	x0, #0
	csel	x8, x9, x8, eq
	cset	w9, eq
	lsl	x9, x9, #3
	ldr	w20, [x24, x8]
	ldr	w21, [x24, x9]
	mov	x0, x19
	mov	w1, #5
	mov	w2, #6
	bl	_rt2800_rfcsr_read_bank
	and	w8, w0, #0xffffffc0
	orr	w3, w8, w21
	str	w3, [sp, #12]
	mov	x0, x19
	mov	w1, #5
	mov	w2, #6
	bl	_rt2800_rfcsr_write_bank
	mov	x0, x19
	mov	w1, #5
	mov	w2, #7
	bl	_rt2800_rfcsr_read_bank
	and	w8, w0, #0xffffffc0
	orr	w3, w8, w21
	str	w3, [sp, #12]
	mov	x0, x19
	mov	w1, #5
	mov	w2, #7
	bl	_rt2800_rfcsr_write_bank
	mov	x0, x19
	mov	w1, #7
	mov	w2, #6
	bl	_rt2800_rfcsr_read_bank
	and	w8, w0, #0xffffffc0
	orr	w3, w8, w21
	str	w3, [sp, #12]
	mov	x0, x19
	mov	w1, #7
	mov	w2, #6
	bl	_rt2800_rfcsr_write_bank
	mov	x0, x19
	mov	w1, #7
	mov	w2, #7
	bl	_rt2800_rfcsr_read_bank
	and	w8, w0, #0xffffffc0
	orr	w3, w8, w21
	str	w3, [sp, #12]
	mov	x0, x19
	mov	w1, #7
	mov	w2, #7
	bl	_rt2800_rfcsr_write_bank
	mov	x0, x19
	mov	w1, #5
	mov	w2, #58
	bl	_rt2800_rfcsr_read_bank
	and	w8, w0, #0xffffffc0
	orr	w3, w8, w20
	str	w3, [sp, #12]
	mov	x0, x19
	mov	w1, #5
	mov	w2, #58
	bl	_rt2800_rfcsr_write_bank
	mov	x0, x19
	mov	w1, #5
	mov	w2, #59
	bl	_rt2800_rfcsr_read_bank
	and	w8, w0, #0xffffffc0
	orr	w3, w8, w20
	str	w3, [sp, #12]
	mov	x0, x19
	mov	w1, #5
	mov	w2, #59
	bl	_rt2800_rfcsr_write_bank
	mov	x0, x19
	mov	w1, #7
	mov	w2, #58
	bl	_rt2800_rfcsr_read_bank
	and	w8, w0, #0xffffffc0
	orr	w3, w8, w20
	str	w3, [sp, #12]
	mov	x0, x19
	mov	w1, #7
	mov	w2, #58
	bl	_rt2800_rfcsr_write_bank
	mov	x0, x19
	mov	w1, #7
	mov	w2, #59
	bl	_rt2800_rfcsr_read_bank
	and	w8, w0, #0xffffffc0
	orr	w3, w8, w20
	str	w3, [sp, #12]
	mov	x0, x19
	mov	w1, #7
	mov	w2, #59
	bl	_rt2800_rfcsr_write_bank
LBB0_5:
	ldp	x29, x30, [sp, #80]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #64]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #48]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #32]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #96
	ret
	.loh AdrpLdrGotLdr	Lloh33, Lloh34, Lloh35
	.loh AdrpLdrGotLdr	Lloh30, Lloh31, Lloh32
	.loh AdrpLdrGotLdr	Lloh27, Lloh28, Lloh29
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh36, Lloh37, Lloh38
	.cfi_endproc
                                        ; -- End function
	.comm	_RFCSR13_RDIV_MT7620,4,2        ; @RFCSR13_RDIV_MT7620
	.comm	_RFCSR21_BIT1,4,2               ; @RFCSR21_BIT1
	.comm	_RFCSR16_RF_PLL_FREQ_SEL_MT7620,4,2 ; @RFCSR16_RF_PLL_FREQ_SEL_MT7620
	.comm	_RFCSR22_FREQPLAN_D_MT7620,4,2  ; @RFCSR22_FREQPLAN_D_MT7620
	.comm	_RFCSR19_K,4,2                  ; @RFCSR19_K
	.comm	_RFCSR16_SDM_MODE_MT7620,4,2    ; @RFCSR16_SDM_MODE_MT7620
	.comm	_RFCSR21_BIT8,4,2               ; @RFCSR21_BIT8
	.comm	_RFCSR1_TX2_EN_MT7620,4,2       ; @RFCSR1_TX2_EN_MT7620
	.comm	_RFCSR2_TX2_EN_MT7620,4,2       ; @RFCSR2_TX2_EN_MT7620
	.comm	_RFCSR2_RX2_EN_MT7620,4,2       ; @RFCSR2_RX2_EN_MT7620
	.comm	_RFCSR42_TX2_EN_MT7620,4,2      ; @RFCSR42_TX2_EN_MT7620
	.comm	_RFCSR28_CH11_HT40,4,2          ; @RFCSR28_CH11_HT40
	.comm	_DEVICE_STATE_SCANNING,4,2      ; @DEVICE_STATE_SCANNING
	.no_dead_strip	_rt2800_config_channel_rf7620
.subsections_via_symbols
