	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function mt7623_bonding_disable
_mt7623_bonding_disable:                ## @mt7623_bonding_disable
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -24
	callq	_platform_get_drvdata
	movq	%rax, %rbx
	movq	_PIN_BOND_REG0@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	_BOND_PCIE_CLR@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movq	%rbx, %rdi
	xorl	%esi, %esi
	movl	%ecx, %r8d
	callq	_mtk_rmw
	movq	_PIN_BOND_REG1@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	_BOND_I2S_CLR@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movq	%rbx, %rdi
	xorl	%esi, %esi
	movl	%ecx, %r8d
	callq	_mtk_rmw
	movq	_PIN_BOND_REG2@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	_BOND_MSDC0E_CLR@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movq	%rbx, %rdi
	xorl	%esi, %esi
	movl	%ecx, %r8d
	addq	$8, %rsp
	popq	%rbx
	popq	%rbp
	jmp	_mtk_rmw                        ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_PIN_BOND_REG0,4,2              ## @PIN_BOND_REG0
	.comm	_BOND_PCIE_CLR,4,2              ## @BOND_PCIE_CLR
	.comm	_PIN_BOND_REG1,4,2              ## @PIN_BOND_REG1
	.comm	_BOND_I2S_CLR,4,2               ## @BOND_I2S_CLR
	.comm	_PIN_BOND_REG2,4,2              ## @PIN_BOND_REG2
	.comm	_BOND_MSDC0E_CLR,4,2            ## @BOND_MSDC0E_CLR
	.no_dead_strip	_mt7623_bonding_disable
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function mt7623_bonding_disable
_mt7623_bonding_disable:                ; @mt7623_bonding_disable
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	bl	_platform_get_drvdata
	mov	x19, x0
Lloh0:
	adrp	x8, _PIN_BOND_REG0@GOTPAGE
Lloh1:
	ldr	x8, [x8, _PIN_BOND_REG0@GOTPAGEOFF]
Lloh2:
	ldr	w2, [x8]
Lloh3:
	adrp	x8, _BOND_PCIE_CLR@GOTPAGE
Lloh4:
	ldr	x8, [x8, _BOND_PCIE_CLR@GOTPAGEOFF]
Lloh5:
	ldr	w3, [x8]
	mov	w1, #0
	mov	x4, x3
	bl	_mtk_rmw
Lloh6:
	adrp	x8, _PIN_BOND_REG1@GOTPAGE
Lloh7:
	ldr	x8, [x8, _PIN_BOND_REG1@GOTPAGEOFF]
Lloh8:
	ldr	w2, [x8]
Lloh9:
	adrp	x8, _BOND_I2S_CLR@GOTPAGE
Lloh10:
	ldr	x8, [x8, _BOND_I2S_CLR@GOTPAGEOFF]
Lloh11:
	ldr	w3, [x8]
	mov	x0, x19
	mov	w1, #0
	mov	x4, x3
	bl	_mtk_rmw
Lloh12:
	adrp	x8, _PIN_BOND_REG2@GOTPAGE
Lloh13:
	ldr	x8, [x8, _PIN_BOND_REG2@GOTPAGEOFF]
Lloh14:
	ldr	w2, [x8]
Lloh15:
	adrp	x8, _BOND_MSDC0E_CLR@GOTPAGE
Lloh16:
	ldr	x8, [x8, _BOND_MSDC0E_CLR@GOTPAGEOFF]
Lloh17:
	ldr	w3, [x8]
	mov	x0, x19
	mov	w1, #0
	mov	x4, x3
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	b	_mtk_rmw
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_PIN_BOND_REG0,4,2              ; @PIN_BOND_REG0
	.comm	_BOND_PCIE_CLR,4,2              ; @BOND_PCIE_CLR
	.comm	_PIN_BOND_REG1,4,2              ; @PIN_BOND_REG1
	.comm	_BOND_I2S_CLR,4,2               ; @BOND_I2S_CLR
	.comm	_PIN_BOND_REG2,4,2              ; @PIN_BOND_REG2
	.comm	_BOND_MSDC0E_CLR,4,2            ; @BOND_MSDC0E_CLR
	.no_dead_strip	_mt7623_bonding_disable
.subsections_via_symbols
