	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function pmic_gpio_populate
_pmic_gpio_populate:                    ## @pmic_gpio_populate
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rsi, %r15
	movq	%rdi, %r14
	movq	_PMIC_GPIO_REG_TYPE@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	callq	_pmic_gpio_read
	movl	%eax, %r12d
	testl	%eax, %eax
	js	LBB0_44
## %bb.1:
	movq	_PMIC_GPIO_TYPE@GOTPCREL(%rip), %rax
	cmpl	(%rax), %r12d
	jne	LBB0_2
## %bb.3:
	movq	_PMIC_GPIO_REG_SUBTYPE@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r14, %rdi
	movq	%r15, %rsi
	callq	_pmic_gpio_read
	movl	%eax, %r12d
	testl	%eax, %eax
	js	LBB0_44
## %bb.4:
	movl	%r12d, %eax
	addl	$-128, %eax
	cmpl	$5, %eax
	ja	LBB0_17
## %bb.5:
	leaq	LJTI0_0(%rip), %rcx
	movslq	(%rcx,%rax,4), %rax
	addq	%rcx, %rax
	jmpq	*%rax
LBB0_16:
	movabsq	$8589934593, %rax               ## imm = 0x200000001
	jmp	LBB0_15
LBB0_2:
	movl	(%r14), %edi
	movl	60(%r15), %ecx
	leaq	L_.str(%rip), %rsi
	xorl	%ebx, %ebx
	movl	%r12d, %edx
	xorl	%eax, %eax
	callq	_dev_err
LBB0_18:
	movq	_ENODEV@GOTPCREL(%rip), %rax
	subl	(%rax), %ebx
	movl	%ebx, %r12d
LBB0_44:
	movl	%r12d, %eax
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_17:
	movl	(%r14), %edi
	leaq	L_.str.1(%rip), %rsi
	xorl	%ebx, %ebx
	movl	%r12d, %edx
	xorl	%eax, %eax
	callq	_dev_err
	jmp	LBB0_18
LBB0_14:
	movabsq	$4294967297, %rax               ## imm = 0x100000001
LBB0_15:
	movq	%rax, (%r15)
	movl	$1, 8(%r15)
	cmpl	$0, 8(%r15)
	jne	LBB0_11
	jmp	LBB0_19
LBB0_8:
	movl	$1, (%r15)
LBB0_9:
	movl	$8, 4(%r15)
	cmpl	$0, 8(%r15)
	je	LBB0_19
LBB0_11:
	movq	_PMIC_GPIO_REG_LV_MV_DIG_OUT_SOURCE_CTL@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r14, %rdi
	movq	%r15, %rsi
	callq	_pmic_gpio_read
	movl	%eax, %r12d
	testl	%eax, %eax
	js	LBB0_44
## %bb.12:
	movq	_PMIC_GPIO_LV_MV_OUTPUT_INVERT@GOTPCREL(%rip), %rax
	xorl	%ecx, %ecx
	movl	(%rax), %eax
	andl	%r12d, %eax
	setne	%cl
	movl	%ecx, 12(%r15)
	movq	_PMIC_GPIO_LV_MV_OUTPUT_SOURCE_SEL_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	andl	%r12d, %eax
	movl	%eax, 16(%r15)
	movq	_PMIC_GPIO_REG_MODE_CTL@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r14, %rdi
	movq	%r15, %rsi
	callq	_pmic_gpio_read
	movl	%eax, %r12d
	testl	%eax, %eax
	js	LBB0_44
## %bb.13:
	movq	_PMIC_GPIO_REG_LV_MV_MODE_DIR_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	andl	%r12d, %eax
	jmp	LBB0_21
LBB0_6:
	movl	$1, (%r15)
LBB0_7:
	movl	$4, 4(%r15)
	cmpl	$0, 8(%r15)
	jne	LBB0_11
LBB0_19:
	movq	_PMIC_GPIO_REG_MODE_CTL@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r14, %rdi
	movq	%r15, %rsi
	callq	_pmic_gpio_read
	movl	%eax, %r12d
	testl	%eax, %eax
	js	LBB0_44
## %bb.20:
	movq	_PMIC_GPIO_REG_MODE_VALUE_SHIFT@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	andl	%r12d, %eax
	movl	%eax, 12(%r15)
	movq	_PMIC_GPIO_REG_MODE_DIR_SHIFT@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	movl	%r12d, %eax
	shrl	%cl, %eax
	movq	_PMIC_GPIO_REG_MODE_DIR_MASK@GOTPCREL(%rip), %rcx
	andl	(%rcx), %eax
	movq	_PMIC_GPIO_REG_MODE_FUNCTION_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shrl	%cl, %r12d
	movq	_PMIC_GPIO_REG_MODE_FUNCTION_MASK@GOTPCREL(%rip), %rcx
	andl	(%rcx), %r12d
	movl	%r12d, 16(%r15)
LBB0_21:
	addl	$-134, %eax
	cmpl	$3, %eax
	ja	LBB0_28
## %bb.22:
	leaq	LJTI0_1(%rip), %rcx
	movslq	(%rcx,%rax,4), %rax
	addq	%rcx, %rax
	jmpq	*%rax
LBB0_23:
	movabsq	$4294967296, %rax               ## imm = 0x100000000
	movq	%rax, 20(%r15)
	jmp	LBB0_30
LBB0_28:
	movl	(%r14), %edi
	leaq	L_.str.2(%rip), %rsi
	xorl	%r12d, %r12d
	xorl	%eax, %eax
	callq	_dev_err
	movq	_ENODEV@GOTPCREL(%rip), %rax
	subl	(%rax), %r12d
	jmp	LBB0_44
LBB0_24:
	movabsq	$4294967297, %rax               ## imm = 0x100000001
	movq	%rax, 20(%r15)
	jmp	LBB0_30
LBB0_29:
	movq	$1, 20(%r15)
	jmp	LBB0_30
LBB0_25:
	cmpl	$0, 8(%r15)
	je	LBB0_26
## %bb.27:
	movl	$1, 28(%r15)
LBB0_30:
	movq	_PMIC_GPIO_REG_DIG_VIN_CTL@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r14, %rdi
	movq	%r15, %rsi
	callq	_pmic_gpio_read
	movl	%eax, %r12d
	testl	%eax, %eax
	js	LBB0_44
## %bb.31:
	movq	_PMIC_GPIO_REG_VIN_SHIFT@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	shrl	%cl, %r12d
	movq	_PMIC_GPIO_REG_VIN_MASK@GOTPCREL(%rip), %rax
	andl	(%rax), %r12d
	movl	%r12d, 32(%r15)
	movq	_PMIC_GPIO_REG_DIG_PULL_CTL@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r14, %rdi
	movq	%r15, %rsi
	callq	_pmic_gpio_read
	movl	%eax, %r12d
	testl	%eax, %eax
	js	LBB0_44
## %bb.32:
	movq	_PMIC_GPIO_REG_PULL_SHIFT@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	shrl	%cl, %r12d
	movq	_PMIC_GPIO_REG_PULL_MASK@GOTPCREL(%rip), %rax
	andl	(%rax), %r12d
	movl	%r12d, 36(%r15)
	movq	_PMIC_GPIO_REG_DIG_IN_CTL@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r14, %rdi
	movq	%r15, %rsi
	callq	_pmic_gpio_read
	movl	%eax, %r12d
	testl	%eax, %eax
	js	LBB0_44
## %bb.33:
	cmpl	$0, 8(%r15)
	je	LBB0_37
## %bb.34:
	movq	_PMIC_GPIO_LV_MV_DIG_IN_DTEST_EN@GOTPCREL(%rip), %rax
	testl	%r12d, (%rax)
	je	LBB0_35
## %bb.36:
	movq	_PMIC_GPIO_LV_MV_DIG_IN_DTEST_SEL_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	andl	%r12d, %eax
	jmp	LBB0_38
LBB0_26:
	movq	_ENODEV@GOTPCREL(%rip), %rax
	xorl	%r12d, %r12d
	subl	(%rax), %r12d
	jmp	LBB0_44
LBB0_37:
	bsfl	%r12d, %ecx
	movl	$-1, %eax
	cmovnel	%ecx, %eax
LBB0_38:
	incl	%eax
	jmp	LBB0_39
LBB0_35:
	xorl	%eax, %eax
LBB0_39:
	movl	%eax, 40(%r15)
	movq	_PMIC_GPIO_REG_DIG_OUT_CTL@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r14, %rdi
	movq	%r15, %rsi
	callq	_pmic_gpio_read
	movl	%eax, %r12d
	testl	%eax, %eax
	js	LBB0_44
## %bb.40:
	movq	_PMIC_GPIO_REG_OUT_STRENGTH_SHIFT@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	movl	%r12d, %eax
	shrl	%cl, %eax
	movq	_PMIC_GPIO_REG_OUT_STRENGTH_MASK@GOTPCREL(%rip), %rcx
	andl	(%rcx), %eax
	movl	%eax, 44(%r15)
	movq	_PMIC_GPIO_REG_OUT_TYPE_SHIFT@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	shrl	%cl, %r12d
	movq	_PMIC_GPIO_REG_OUT_TYPE_MASK@GOTPCREL(%rip), %rax
	andl	(%rax), %r12d
	movl	%r12d, 48(%r15)
	cmpl	$0, 8(%r15)
	je	LBB0_43
## %bb.41:
	movq	_PMIC_GPIO_REG_LV_MV_ANA_PASS_THRU_SEL@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r14, %rdi
	movq	%r15, %rsi
	callq	_pmic_gpio_read
	movl	%eax, %r12d
	testl	%eax, %eax
	js	LBB0_44
## %bb.42:
	movq	_PMIC_GPIO_LV_MV_ANA_MUX_SEL_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	andl	%r12d, %eax
	incl	%eax
	movl	%eax, 52(%r15)
LBB0_43:
	movl	$1, 56(%r15)
	xorl	%r12d, %r12d
	jmp	LBB0_44
	.cfi_endproc
	.p2align	2, 0x90
	.data_region jt32
.set L0_0_set_16, LBB0_16-LJTI0_0
.set L0_0_set_14, LBB0_14-LJTI0_0
.set L0_0_set_8, LBB0_8-LJTI0_0
.set L0_0_set_6, LBB0_6-LJTI0_0
.set L0_0_set_9, LBB0_9-LJTI0_0
.set L0_0_set_7, LBB0_7-LJTI0_0
LJTI0_0:
	.long	L0_0_set_16
	.long	L0_0_set_14
	.long	L0_0_set_8
	.long	L0_0_set_6
	.long	L0_0_set_9
	.long	L0_0_set_7
.set L0_1_set_23, LBB0_23-LJTI0_1
.set L0_1_set_24, LBB0_24-LJTI0_1
.set L0_1_set_29, LBB0_29-LJTI0_1
.set L0_1_set_25, LBB0_25-LJTI0_1
LJTI0_1:
	.long	L0_1_set_23
	.long	L0_1_set_24
	.long	L0_1_set_29
	.long	L0_1_set_25
	.end_data_region
                                        ## -- End function
	.comm	_PMIC_GPIO_REG_TYPE,4,2         ## @PMIC_GPIO_REG_TYPE
	.comm	_PMIC_GPIO_TYPE,4,2             ## @PMIC_GPIO_TYPE
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"incorrect block type 0x%x at 0x%x\n"

	.comm	_ENODEV,4,2                     ## @ENODEV
	.comm	_PMIC_GPIO_REG_SUBTYPE,4,2      ## @PMIC_GPIO_REG_SUBTYPE
L_.str.1:                               ## @.str.1
	.asciz	"unknown GPIO type 0x%x\n"

	.comm	_PMIC_GPIO_REG_LV_MV_DIG_OUT_SOURCE_CTL,4,2 ## @PMIC_GPIO_REG_LV_MV_DIG_OUT_SOURCE_CTL
	.comm	_PMIC_GPIO_LV_MV_OUTPUT_INVERT,4,2 ## @PMIC_GPIO_LV_MV_OUTPUT_INVERT
	.comm	_PMIC_GPIO_LV_MV_OUTPUT_SOURCE_SEL_MASK,4,2 ## @PMIC_GPIO_LV_MV_OUTPUT_SOURCE_SEL_MASK
	.comm	_PMIC_GPIO_REG_MODE_CTL,4,2     ## @PMIC_GPIO_REG_MODE_CTL
	.comm	_PMIC_GPIO_REG_LV_MV_MODE_DIR_MASK,4,2 ## @PMIC_GPIO_REG_LV_MV_MODE_DIR_MASK
	.comm	_PMIC_GPIO_REG_MODE_VALUE_SHIFT,4,2 ## @PMIC_GPIO_REG_MODE_VALUE_SHIFT
	.comm	_PMIC_GPIO_REG_MODE_DIR_SHIFT,4,2 ## @PMIC_GPIO_REG_MODE_DIR_SHIFT
	.comm	_PMIC_GPIO_REG_MODE_DIR_MASK,4,2 ## @PMIC_GPIO_REG_MODE_DIR_MASK
	.comm	_PMIC_GPIO_REG_MODE_FUNCTION_SHIFT,4,2 ## @PMIC_GPIO_REG_MODE_FUNCTION_SHIFT
	.comm	_PMIC_GPIO_REG_MODE_FUNCTION_MASK,4,2 ## @PMIC_GPIO_REG_MODE_FUNCTION_MASK
L_.str.2:                               ## @.str.2
	.asciz	"unknown GPIO direction\n"

	.comm	_PMIC_GPIO_REG_DIG_VIN_CTL,4,2  ## @PMIC_GPIO_REG_DIG_VIN_CTL
	.comm	_PMIC_GPIO_REG_VIN_SHIFT,4,2    ## @PMIC_GPIO_REG_VIN_SHIFT
	.comm	_PMIC_GPIO_REG_VIN_MASK,4,2     ## @PMIC_GPIO_REG_VIN_MASK
	.comm	_PMIC_GPIO_REG_DIG_PULL_CTL,4,2 ## @PMIC_GPIO_REG_DIG_PULL_CTL
	.comm	_PMIC_GPIO_REG_PULL_SHIFT,4,2   ## @PMIC_GPIO_REG_PULL_SHIFT
	.comm	_PMIC_GPIO_REG_PULL_MASK,4,2    ## @PMIC_GPIO_REG_PULL_MASK
	.comm	_PMIC_GPIO_REG_DIG_IN_CTL,4,2   ## @PMIC_GPIO_REG_DIG_IN_CTL
	.comm	_PMIC_GPIO_LV_MV_DIG_IN_DTEST_EN,4,2 ## @PMIC_GPIO_LV_MV_DIG_IN_DTEST_EN
	.comm	_PMIC_GPIO_LV_MV_DIG_IN_DTEST_SEL_MASK,4,2 ## @PMIC_GPIO_LV_MV_DIG_IN_DTEST_SEL_MASK
	.comm	_PMIC_GPIO_REG_DIG_OUT_CTL,4,2  ## @PMIC_GPIO_REG_DIG_OUT_CTL
	.comm	_PMIC_GPIO_REG_OUT_STRENGTH_SHIFT,4,2 ## @PMIC_GPIO_REG_OUT_STRENGTH_SHIFT
	.comm	_PMIC_GPIO_REG_OUT_STRENGTH_MASK,4,2 ## @PMIC_GPIO_REG_OUT_STRENGTH_MASK
	.comm	_PMIC_GPIO_REG_OUT_TYPE_SHIFT,4,2 ## @PMIC_GPIO_REG_OUT_TYPE_SHIFT
	.comm	_PMIC_GPIO_REG_OUT_TYPE_MASK,4,2 ## @PMIC_GPIO_REG_OUT_TYPE_MASK
	.comm	_PMIC_GPIO_REG_LV_MV_ANA_PASS_THRU_SEL,4,2 ## @PMIC_GPIO_REG_LV_MV_ANA_PASS_THRU_SEL
	.comm	_PMIC_GPIO_LV_MV_ANA_MUX_SEL_MASK,4,2 ## @PMIC_GPIO_LV_MV_ANA_MUX_SEL_MASK
	.no_dead_strip	_pmic_gpio_populate
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.section	__TEXT,__literal8,8byte_literals
	.p2align	3                               ; -- Begin function pmic_gpio_populate
lCPI0_0:
	.long	1                               ; 0x1
	.long	2                               ; 0x2
lCPI0_1:
	.long	0                               ; 0x0
	.long	1                               ; 0x1
lCPI0_2:
	.long	1                               ; 0x1
	.long	0                               ; 0x0
	.section	__TEXT,__text,regular,pure_instructions
	.p2align	2
_pmic_gpio_populate:                    ; @pmic_gpio_populate
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #48
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x19, x1
	mov	x20, x0
Lloh0:
	adrp	x8, _PMIC_GPIO_REG_TYPE@GOTPAGE
Lloh1:
	ldr	x8, [x8, _PMIC_GPIO_REG_TYPE@GOTPAGEOFF]
Lloh2:
	ldr	w2, [x8]
	bl	_pmic_gpio_read
                                        ; kill: def $w0 killed $w0 def $x0
	tbnz	w0, #31, LBB0_10
; %bb.1:
Lloh3:
	adrp	x8, _PMIC_GPIO_TYPE@GOTPAGE
Lloh4:
	ldr	x8, [x8, _PMIC_GPIO_TYPE@GOTPAGEOFF]
Lloh5:
	ldr	w8, [x8]
	cmp	w0, w8
	b.ne	LBB0_6
; %bb.2:
Lloh6:
	adrp	x8, _PMIC_GPIO_REG_SUBTYPE@GOTPAGE
Lloh7:
	ldr	x8, [x8, _PMIC_GPIO_REG_SUBTYPE@GOTPAGEOFF]
Lloh8:
	ldr	w2, [x8]
	mov	x0, x20
	mov	x1, x19
	bl	_pmic_gpio_read
                                        ; kill: def $w0 killed $w0 def $x0
	tbnz	w0, #31, LBB0_10
; %bb.3:
	sub	w8, w0, #128
	cmp	w8, #5
	b.hi	LBB0_11
; %bb.4:
Lloh9:
	adrp	x9, lJTI0_0@PAGE
Lloh10:
	add	x9, x9, lJTI0_0@PAGEOFF
	adr	x10, LBB0_5
	ldrb	w11, [x9, x8]
	add	x10, x10, x11, lsl #2
	br	x10
LBB0_5:
Lloh11:
	adrp	x8, lCPI0_0@PAGE
Lloh12:
	ldr	d0, [x8, lCPI0_0@PAGEOFF]
	b	LBB0_13
LBB0_6:
	ldr	w8, [x20]
	ldr	w9, [x19, #60]
	stp	x0, x9, [sp]
Lloh13:
	adrp	x1, l_.str@PAGE
Lloh14:
	add	x1, x1, l_.str@PAGEOFF
LBB0_7:
	mov	x0, x8
LBB0_8:
	bl	_dev_err
LBB0_9:
Lloh15:
	adrp	x8, _ENODEV@GOTPAGE
Lloh16:
	ldr	x8, [x8, _ENODEV@GOTPAGEOFF]
Lloh17:
	ldr	w8, [x8]
	neg	w0, w8
LBB0_10:
                                        ; kill: def $w0 killed $w0 killed $x0
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #48
	ret
LBB0_11:
	ldr	w8, [x20]
                                        ; kill: def $w0 killed $w0 killed $x0 def $x0
	str	x0, [sp]
Lloh18:
	adrp	x1, l_.str.1@PAGE
Lloh19:
	add	x1, x1, l_.str.1@PAGEOFF
	b	LBB0_7
LBB0_12:
	movi.2s	v0, #1
LBB0_13:
	str	d0, [x19]
	mov	w8, #1
	str	w8, [x19, #8]
	ldr	w8, [x19, #8]
	cbnz	w8, LBB0_21
LBB0_14:
Lloh20:
	adrp	x8, _PMIC_GPIO_REG_MODE_CTL@GOTPAGE
Lloh21:
	ldr	x8, [x8, _PMIC_GPIO_REG_MODE_CTL@GOTPAGEOFF]
Lloh22:
	ldr	w2, [x8]
	mov	x0, x20
	mov	x1, x19
	bl	_pmic_gpio_read
                                        ; kill: def $w0 killed $w0 def $x0
	tbnz	w0, #31, LBB0_10
; %bb.15:
Lloh23:
	adrp	x8, _PMIC_GPIO_REG_MODE_VALUE_SHIFT@GOTPAGE
Lloh24:
	ldr	x8, [x8, _PMIC_GPIO_REG_MODE_VALUE_SHIFT@GOTPAGEOFF]
Lloh25:
	ldr	w8, [x8]
	and	w9, w8, w0
Lloh26:
	adrp	x8, _PMIC_GPIO_REG_MODE_DIR_SHIFT@GOTPAGE
Lloh27:
	ldr	x8, [x8, _PMIC_GPIO_REG_MODE_DIR_SHIFT@GOTPAGEOFF]
Lloh28:
	ldr	w8, [x8]
	lsr	w8, w0, w8
Lloh29:
	adrp	x10, _PMIC_GPIO_REG_MODE_DIR_MASK@GOTPAGE
Lloh30:
	ldr	x10, [x10, _PMIC_GPIO_REG_MODE_DIR_MASK@GOTPAGEOFF]
Lloh31:
	ldr	w10, [x10]
	and	w8, w8, w10
Lloh32:
	adrp	x10, _PMIC_GPIO_REG_MODE_FUNCTION_SHIFT@GOTPAGE
Lloh33:
	ldr	x10, [x10, _PMIC_GPIO_REG_MODE_FUNCTION_SHIFT@GOTPAGEOFF]
Lloh34:
	ldr	w10, [x10]
	lsr	w10, w0, w10
Lloh35:
	adrp	x11, _PMIC_GPIO_REG_MODE_FUNCTION_MASK@GOTPAGE
Lloh36:
	ldr	x11, [x11, _PMIC_GPIO_REG_MODE_FUNCTION_MASK@GOTPAGEOFF]
Lloh37:
	ldr	w11, [x11]
	and	w10, w11, w10
	stp	w9, w10, [x19, #12]
	b	LBB0_24
LBB0_16:
	mov	w8, #1
	str	w8, [x19]
LBB0_17:
	mov	w8, #8
	b	LBB0_20
LBB0_18:
	mov	w8, #1
	str	w8, [x19]
LBB0_19:
	mov	w8, #4
LBB0_20:
	str	w8, [x19, #4]
	ldr	w8, [x19, #8]
	cbz	w8, LBB0_14
LBB0_21:
Lloh38:
	adrp	x8, _PMIC_GPIO_REG_LV_MV_DIG_OUT_SOURCE_CTL@GOTPAGE
Lloh39:
	ldr	x8, [x8, _PMIC_GPIO_REG_LV_MV_DIG_OUT_SOURCE_CTL@GOTPAGEOFF]
Lloh40:
	ldr	w2, [x8]
	mov	x0, x20
	mov	x1, x19
	bl	_pmic_gpio_read
                                        ; kill: def $w0 killed $w0 def $x0
	tbnz	w0, #31, LBB0_10
; %bb.22:
Lloh41:
	adrp	x8, _PMIC_GPIO_LV_MV_OUTPUT_INVERT@GOTPAGE
Lloh42:
	ldr	x8, [x8, _PMIC_GPIO_LV_MV_OUTPUT_INVERT@GOTPAGEOFF]
Lloh43:
	ldr	w8, [x8]
	tst	w8, w0
	cset	w8, ne
Lloh44:
	adrp	x9, _PMIC_GPIO_LV_MV_OUTPUT_SOURCE_SEL_MASK@GOTPAGE
Lloh45:
	ldr	x9, [x9, _PMIC_GPIO_LV_MV_OUTPUT_SOURCE_SEL_MASK@GOTPAGEOFF]
Lloh46:
	ldr	w9, [x9]
	and	w9, w9, w0
	stp	w8, w9, [x19, #12]
Lloh47:
	adrp	x8, _PMIC_GPIO_REG_MODE_CTL@GOTPAGE
Lloh48:
	ldr	x8, [x8, _PMIC_GPIO_REG_MODE_CTL@GOTPAGEOFF]
Lloh49:
	ldr	w2, [x8]
	mov	x0, x20
	mov	x1, x19
	bl	_pmic_gpio_read
                                        ; kill: def $w0 killed $w0 def $x0
	tbnz	w0, #31, LBB0_10
; %bb.23:
Lloh50:
	adrp	x8, _PMIC_GPIO_REG_LV_MV_MODE_DIR_MASK@GOTPAGE
Lloh51:
	ldr	x8, [x8, _PMIC_GPIO_REG_LV_MV_MODE_DIR_MASK@GOTPAGEOFF]
Lloh52:
	ldr	w8, [x8]
	and	w8, w8, w0
LBB0_24:
	sub	w8, w8, #134
	cmp	w8, #3
	b.hi	LBB0_27
; %bb.25:
Lloh53:
	adrp	x9, lJTI0_1@PAGE
Lloh54:
	add	x9, x9, lJTI0_1@PAGEOFF
	adr	x10, LBB0_26
	ldrb	w11, [x9, x8]
	add	x10, x10, x11, lsl #2
	br	x10
LBB0_26:
Lloh55:
	adrp	x8, lCPI0_1@PAGE
Lloh56:
	ldr	d0, [x8, lCPI0_1@PAGEOFF]
	b	LBB0_30
LBB0_27:
	ldr	w0, [x20]
Lloh57:
	adrp	x1, l_.str.2@PAGE
Lloh58:
	add	x1, x1, l_.str.2@PAGEOFF
	b	LBB0_8
LBB0_28:
	movi.2s	v0, #1
	b	LBB0_30
LBB0_29:
Lloh59:
	adrp	x8, lCPI0_2@PAGE
Lloh60:
	ldr	d0, [x8, lCPI0_2@PAGEOFF]
LBB0_30:
	stur	d0, [x19, #20]
LBB0_31:
Lloh61:
	adrp	x8, _PMIC_GPIO_REG_DIG_VIN_CTL@GOTPAGE
Lloh62:
	ldr	x8, [x8, _PMIC_GPIO_REG_DIG_VIN_CTL@GOTPAGEOFF]
Lloh63:
	ldr	w2, [x8]
	mov	x0, x20
	mov	x1, x19
	bl	_pmic_gpio_read
                                        ; kill: def $w0 killed $w0 def $x0
	tbnz	w0, #31, LBB0_10
; %bb.32:
Lloh64:
	adrp	x8, _PMIC_GPIO_REG_VIN_SHIFT@GOTPAGE
Lloh65:
	ldr	x8, [x8, _PMIC_GPIO_REG_VIN_SHIFT@GOTPAGEOFF]
Lloh66:
	ldr	w8, [x8]
	lsr	w8, w0, w8
Lloh67:
	adrp	x9, _PMIC_GPIO_REG_VIN_MASK@GOTPAGE
Lloh68:
	ldr	x9, [x9, _PMIC_GPIO_REG_VIN_MASK@GOTPAGEOFF]
Lloh69:
	ldr	w9, [x9]
	and	w8, w9, w8
	str	w8, [x19, #32]
Lloh70:
	adrp	x8, _PMIC_GPIO_REG_DIG_PULL_CTL@GOTPAGE
Lloh71:
	ldr	x8, [x8, _PMIC_GPIO_REG_DIG_PULL_CTL@GOTPAGEOFF]
Lloh72:
	ldr	w2, [x8]
	mov	x0, x20
	mov	x1, x19
	bl	_pmic_gpio_read
                                        ; kill: def $w0 killed $w0 def $x0
	tbnz	w0, #31, LBB0_10
; %bb.33:
Lloh73:
	adrp	x8, _PMIC_GPIO_REG_PULL_SHIFT@GOTPAGE
Lloh74:
	ldr	x8, [x8, _PMIC_GPIO_REG_PULL_SHIFT@GOTPAGEOFF]
Lloh75:
	ldr	w8, [x8]
	lsr	w8, w0, w8
Lloh76:
	adrp	x9, _PMIC_GPIO_REG_PULL_MASK@GOTPAGE
Lloh77:
	ldr	x9, [x9, _PMIC_GPIO_REG_PULL_MASK@GOTPAGEOFF]
Lloh78:
	ldr	w9, [x9]
	and	w8, w9, w8
	str	w8, [x19, #36]
Lloh79:
	adrp	x8, _PMIC_GPIO_REG_DIG_IN_CTL@GOTPAGE
Lloh80:
	ldr	x8, [x8, _PMIC_GPIO_REG_DIG_IN_CTL@GOTPAGEOFF]
Lloh81:
	ldr	w2, [x8]
	mov	x0, x20
	mov	x1, x19
	bl	_pmic_gpio_read
                                        ; kill: def $w0 killed $w0 def $x0
	tbnz	w0, #31, LBB0_10
; %bb.34:
	ldr	w8, [x19, #8]
	cbz	w8, LBB0_39
; %bb.35:
Lloh82:
	adrp	x8, _PMIC_GPIO_LV_MV_DIG_IN_DTEST_EN@GOTPAGE
Lloh83:
	ldr	x8, [x8, _PMIC_GPIO_LV_MV_DIG_IN_DTEST_EN@GOTPAGEOFF]
Lloh84:
	ldr	w8, [x8]
	tst	w8, w0
	b.eq	LBB0_40
; %bb.36:
Lloh85:
	adrp	x8, _PMIC_GPIO_LV_MV_DIG_IN_DTEST_SEL_MASK@GOTPAGE
Lloh86:
	ldr	x8, [x8, _PMIC_GPIO_LV_MV_DIG_IN_DTEST_SEL_MASK@GOTPAGEOFF]
Lloh87:
	ldr	w8, [x8]
	and	w8, w8, w0
	add	w8, w8, #1
	b	LBB0_41
LBB0_37:
	ldr	w8, [x19, #8]
	cbz	w8, LBB0_9
; %bb.38:
	mov	w8, #1
	str	w8, [x19, #28]
	b	LBB0_31
LBB0_39:
	rbit	w8, w0
	clz	w8, w8
	cmp	w0, #0
	csinc	w8, wzr, w8, eq
	b	LBB0_41
LBB0_40:
	mov	w8, #0
LBB0_41:
	str	w8, [x19, #40]
Lloh88:
	adrp	x8, _PMIC_GPIO_REG_DIG_OUT_CTL@GOTPAGE
Lloh89:
	ldr	x8, [x8, _PMIC_GPIO_REG_DIG_OUT_CTL@GOTPAGEOFF]
Lloh90:
	ldr	w2, [x8]
	mov	x0, x20
	mov	x1, x19
	bl	_pmic_gpio_read
                                        ; kill: def $w0 killed $w0 def $x0
	tbnz	w0, #31, LBB0_10
; %bb.42:
Lloh91:
	adrp	x8, _PMIC_GPIO_REG_OUT_STRENGTH_SHIFT@GOTPAGE
Lloh92:
	ldr	x8, [x8, _PMIC_GPIO_REG_OUT_STRENGTH_SHIFT@GOTPAGEOFF]
Lloh93:
	ldr	w8, [x8]
	lsr	w8, w0, w8
Lloh94:
	adrp	x9, _PMIC_GPIO_REG_OUT_STRENGTH_MASK@GOTPAGE
Lloh95:
	ldr	x9, [x9, _PMIC_GPIO_REG_OUT_STRENGTH_MASK@GOTPAGEOFF]
Lloh96:
	ldr	w9, [x9]
	and	w8, w9, w8
Lloh97:
	adrp	x9, _PMIC_GPIO_REG_OUT_TYPE_SHIFT@GOTPAGE
Lloh98:
	ldr	x9, [x9, _PMIC_GPIO_REG_OUT_TYPE_SHIFT@GOTPAGEOFF]
Lloh99:
	ldr	w9, [x9]
Lloh100:
	adrp	x10, _PMIC_GPIO_REG_OUT_TYPE_MASK@GOTPAGE
Lloh101:
	ldr	x10, [x10, _PMIC_GPIO_REG_OUT_TYPE_MASK@GOTPAGEOFF]
	lsr	w9, w0, w9
Lloh102:
	ldr	w10, [x10]
	and	w9, w10, w9
	stp	w8, w9, [x19, #44]
	ldr	w8, [x19, #8]
	cbz	w8, LBB0_45
; %bb.43:
Lloh103:
	adrp	x8, _PMIC_GPIO_REG_LV_MV_ANA_PASS_THRU_SEL@GOTPAGE
Lloh104:
	ldr	x8, [x8, _PMIC_GPIO_REG_LV_MV_ANA_PASS_THRU_SEL@GOTPAGEOFF]
Lloh105:
	ldr	w2, [x8]
	mov	x0, x20
	mov	x1, x19
	bl	_pmic_gpio_read
                                        ; kill: def $w0 killed $w0 def $x0
	tbnz	w0, #31, LBB0_10
; %bb.44:
Lloh106:
	adrp	x8, _PMIC_GPIO_LV_MV_ANA_MUX_SEL_MASK@GOTPAGE
Lloh107:
	ldr	x8, [x8, _PMIC_GPIO_LV_MV_ANA_MUX_SEL_MASK@GOTPAGEOFF]
Lloh108:
	ldr	w8, [x8]
	and	w8, w8, w0
	add	w8, w8, #1
	str	w8, [x19, #52]
LBB0_45:
	mov	w0, #0
	mov	w8, #1
	str	w8, [x19, #56]
	b	LBB0_10
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpAdd	Lloh9, Lloh10
	.loh AdrpLdr	Lloh11, Lloh12
	.loh AdrpAdd	Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpAdd	Lloh18, Lloh19
	.loh AdrpLdrGotLdr	Lloh20, Lloh21, Lloh22
	.loh AdrpLdrGotLdr	Lloh35, Lloh36, Lloh37
	.loh AdrpLdrGotLdr	Lloh32, Lloh33, Lloh34
	.loh AdrpLdrGotLdr	Lloh29, Lloh30, Lloh31
	.loh AdrpLdrGotLdr	Lloh26, Lloh27, Lloh28
	.loh AdrpLdrGotLdr	Lloh23, Lloh24, Lloh25
	.loh AdrpLdrGotLdr	Lloh38, Lloh39, Lloh40
	.loh AdrpLdrGotLdr	Lloh47, Lloh48, Lloh49
	.loh AdrpLdrGotLdr	Lloh44, Lloh45, Lloh46
	.loh AdrpLdrGotLdr	Lloh41, Lloh42, Lloh43
	.loh AdrpLdrGotLdr	Lloh50, Lloh51, Lloh52
	.loh AdrpAdd	Lloh53, Lloh54
	.loh AdrpLdr	Lloh55, Lloh56
	.loh AdrpAdd	Lloh57, Lloh58
	.loh AdrpLdr	Lloh59, Lloh60
	.loh AdrpLdrGotLdr	Lloh61, Lloh62, Lloh63
	.loh AdrpLdrGotLdr	Lloh70, Lloh71, Lloh72
	.loh AdrpLdrGotLdr	Lloh67, Lloh68, Lloh69
	.loh AdrpLdrGotLdr	Lloh64, Lloh65, Lloh66
	.loh AdrpLdrGotLdr	Lloh79, Lloh80, Lloh81
	.loh AdrpLdrGotLdr	Lloh76, Lloh77, Lloh78
	.loh AdrpLdrGotLdr	Lloh73, Lloh74, Lloh75
	.loh AdrpLdrGotLdr	Lloh82, Lloh83, Lloh84
	.loh AdrpLdrGotLdr	Lloh85, Lloh86, Lloh87
	.loh AdrpLdrGotLdr	Lloh88, Lloh89, Lloh90
	.loh AdrpLdrGotLdr	Lloh100, Lloh101, Lloh102
	.loh AdrpLdrGotLdr	Lloh97, Lloh98, Lloh99
	.loh AdrpLdrGotLdr	Lloh94, Lloh95, Lloh96
	.loh AdrpLdrGotLdr	Lloh91, Lloh92, Lloh93
	.loh AdrpLdrGotLdr	Lloh103, Lloh104, Lloh105
	.loh AdrpLdrGotLdr	Lloh106, Lloh107, Lloh108
	.cfi_endproc
	.section	__TEXT,__const
lJTI0_0:
	.byte	(LBB0_5-LBB0_5)>>2
	.byte	(LBB0_12-LBB0_5)>>2
	.byte	(LBB0_16-LBB0_5)>>2
	.byte	(LBB0_18-LBB0_5)>>2
	.byte	(LBB0_17-LBB0_5)>>2
	.byte	(LBB0_19-LBB0_5)>>2
lJTI0_1:
	.byte	(LBB0_26-LBB0_26)>>2
	.byte	(LBB0_28-LBB0_26)>>2
	.byte	(LBB0_29-LBB0_26)>>2
	.byte	(LBB0_37-LBB0_26)>>2
                                        ; -- End function
	.comm	_PMIC_GPIO_REG_TYPE,4,2         ; @PMIC_GPIO_REG_TYPE
	.comm	_PMIC_GPIO_TYPE,4,2             ; @PMIC_GPIO_TYPE
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"incorrect block type 0x%x at 0x%x\n"

	.comm	_ENODEV,4,2                     ; @ENODEV
	.comm	_PMIC_GPIO_REG_SUBTYPE,4,2      ; @PMIC_GPIO_REG_SUBTYPE
l_.str.1:                               ; @.str.1
	.asciz	"unknown GPIO type 0x%x\n"

	.comm	_PMIC_GPIO_REG_LV_MV_DIG_OUT_SOURCE_CTL,4,2 ; @PMIC_GPIO_REG_LV_MV_DIG_OUT_SOURCE_CTL
	.comm	_PMIC_GPIO_LV_MV_OUTPUT_INVERT,4,2 ; @PMIC_GPIO_LV_MV_OUTPUT_INVERT
	.comm	_PMIC_GPIO_LV_MV_OUTPUT_SOURCE_SEL_MASK,4,2 ; @PMIC_GPIO_LV_MV_OUTPUT_SOURCE_SEL_MASK
	.comm	_PMIC_GPIO_REG_MODE_CTL,4,2     ; @PMIC_GPIO_REG_MODE_CTL
	.comm	_PMIC_GPIO_REG_LV_MV_MODE_DIR_MASK,4,2 ; @PMIC_GPIO_REG_LV_MV_MODE_DIR_MASK
	.comm	_PMIC_GPIO_REG_MODE_VALUE_SHIFT,4,2 ; @PMIC_GPIO_REG_MODE_VALUE_SHIFT
	.comm	_PMIC_GPIO_REG_MODE_DIR_SHIFT,4,2 ; @PMIC_GPIO_REG_MODE_DIR_SHIFT
	.comm	_PMIC_GPIO_REG_MODE_DIR_MASK,4,2 ; @PMIC_GPIO_REG_MODE_DIR_MASK
	.comm	_PMIC_GPIO_REG_MODE_FUNCTION_SHIFT,4,2 ; @PMIC_GPIO_REG_MODE_FUNCTION_SHIFT
	.comm	_PMIC_GPIO_REG_MODE_FUNCTION_MASK,4,2 ; @PMIC_GPIO_REG_MODE_FUNCTION_MASK
l_.str.2:                               ; @.str.2
	.asciz	"unknown GPIO direction\n"

	.comm	_PMIC_GPIO_REG_DIG_VIN_CTL,4,2  ; @PMIC_GPIO_REG_DIG_VIN_CTL
	.comm	_PMIC_GPIO_REG_VIN_SHIFT,4,2    ; @PMIC_GPIO_REG_VIN_SHIFT
	.comm	_PMIC_GPIO_REG_VIN_MASK,4,2     ; @PMIC_GPIO_REG_VIN_MASK
	.comm	_PMIC_GPIO_REG_DIG_PULL_CTL,4,2 ; @PMIC_GPIO_REG_DIG_PULL_CTL
	.comm	_PMIC_GPIO_REG_PULL_SHIFT,4,2   ; @PMIC_GPIO_REG_PULL_SHIFT
	.comm	_PMIC_GPIO_REG_PULL_MASK,4,2    ; @PMIC_GPIO_REG_PULL_MASK
	.comm	_PMIC_GPIO_REG_DIG_IN_CTL,4,2   ; @PMIC_GPIO_REG_DIG_IN_CTL
	.comm	_PMIC_GPIO_LV_MV_DIG_IN_DTEST_EN,4,2 ; @PMIC_GPIO_LV_MV_DIG_IN_DTEST_EN
	.comm	_PMIC_GPIO_LV_MV_DIG_IN_DTEST_SEL_MASK,4,2 ; @PMIC_GPIO_LV_MV_DIG_IN_DTEST_SEL_MASK
	.comm	_PMIC_GPIO_REG_DIG_OUT_CTL,4,2  ; @PMIC_GPIO_REG_DIG_OUT_CTL
	.comm	_PMIC_GPIO_REG_OUT_STRENGTH_SHIFT,4,2 ; @PMIC_GPIO_REG_OUT_STRENGTH_SHIFT
	.comm	_PMIC_GPIO_REG_OUT_STRENGTH_MASK,4,2 ; @PMIC_GPIO_REG_OUT_STRENGTH_MASK
	.comm	_PMIC_GPIO_REG_OUT_TYPE_SHIFT,4,2 ; @PMIC_GPIO_REG_OUT_TYPE_SHIFT
	.comm	_PMIC_GPIO_REG_OUT_TYPE_MASK,4,2 ; @PMIC_GPIO_REG_OUT_TYPE_MASK
	.comm	_PMIC_GPIO_REG_LV_MV_ANA_PASS_THRU_SEL,4,2 ; @PMIC_GPIO_REG_LV_MV_ANA_PASS_THRU_SEL
	.comm	_PMIC_GPIO_LV_MV_ANA_MUX_SEL_MASK,4,2 ; @PMIC_GPIO_LV_MV_ANA_MUX_SEL_MASK
	.no_dead_strip	_pmic_gpio_populate
.subsections_via_symbols
