	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function carl9170_init_phy_from_eeprom
_carl9170_init_phy_from_eeprom:         ## @carl9170_init_phy_from_eeprom
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$24, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%edx, %r12d
	movq	8(%rdi), %r13
	movl	%esi, -44(%rbp)                 ## 4-byte Spill
	movslq	%esi, %rbx
	movq	%rdi, -64(%rbp)                 ## 8-byte Spill
	callq	_carl9170_regwrite_begin
	movq	_AR9170_PHY_REG_SWITCH_COM@GOTPCREL(%rip), %rax
	movl	(%rax), %r15d
	leaq	(%rbx,%rbx,2), %r14
	shlq	$5, %r14
	movl	88(%r13,%r14), %edi
	callq	_le32_to_cpu
	movl	%r15d, %edi
	movl	%eax, %esi
	callq	_carl9170_regwrite
	movq	_AR9170_PHY_REG_SWITCH_CHAIN_0@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	movq	80(%r13,%r14), %rax
	movl	(%rax), %edi
	callq	_le32_to_cpu
	movl	%ebx, %edi
	movl	%eax, %esi
	callq	_carl9170_regwrite
	movq	_AR9170_PHY_REG_SWITCH_CHAIN_2@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	movq	80(%r13,%r14), %rax
	movl	4(%rax), %edi
	callq	_le32_to_cpu
	movl	%ebx, %edi
	movl	%eax, %esi
	callq	_carl9170_regwrite
	testl	%r12d, %r12d
	jne	LBB0_2
## %bb.1:
	movq	_AR9170_PHY_REG_SETTLING@GOTPCREL(%rip), %r15
	movl	(%r15), %edi
	movl	-44(%rbp), %esi                 ## 4-byte Reload
	xorl	%edx, %edx
	callq	_carl9170_def_val
	movl	%eax, %ebx
	movq	_AR9170_PHY_SETTLING_SWITCH@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	(%r13,%r14), %edx
	movl	%ebx, %esi
	callq	_SET_VAL
	movl	(%r15), %edi
	movl	%ebx, %esi
	callq	_carl9170_regwrite
LBB0_2:
	movq	_AR9170_PHY_REG_DESIRED_SZ@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	-44(%rbp), %r15d                ## 4-byte Reload
	movl	%r15d, %esi
	movl	%r12d, %edx
	callq	_carl9170_def_val
	movl	%eax, %ebx
	movq	_AR9170_PHY_DESIRED_SZ_PGA@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	4(%r13,%r14), %edx
	movl	%ebx, %esi
	callq	_SET_VAL
	movq	_AR9170_PHY_DESIRED_SZ_ADC@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	8(%r13,%r14), %edx
	movl	%ebx, %esi
	callq	_SET_VAL
	movq	_AR9170_PHY_REG_DESIRED_SZ@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	%ebx, %esi
	callq	_carl9170_regwrite
	movq	_AR9170_PHY_REG_RF_CTL4@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	%r15d, %esi
	movl	%r12d, %edx
	callq	_carl9170_def_val
	movl	%eax, %ebx
	movq	_AR9170_PHY_RF_CTL4_TX_END_XPAB_OFF@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	12(%r13,%r14), %edx
	movl	%ebx, %esi
	callq	_SET_VAL
	movq	_AR9170_PHY_RF_CTL4_TX_END_XPAA_OFF@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	12(%r13,%r14), %edx
	movl	%ebx, %esi
	callq	_SET_VAL
	movq	_AR9170_PHY_RF_CTL4_FRAME_XPAB_ON@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	16(%r13,%r14), %edx
	movl	%ebx, %esi
	callq	_SET_VAL
	movq	_AR9170_PHY_RF_CTL4_FRAME_XPAA_ON@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	16(%r13,%r14), %edx
	movl	%ebx, %esi
	callq	_SET_VAL
	movq	_AR9170_PHY_REG_RF_CTL4@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	%ebx, %esi
	callq	_carl9170_regwrite
	movq	_AR9170_PHY_REG_RF_CTL3@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	%r15d, %esi
	movl	%r12d, %edx
	callq	_carl9170_def_val
	movl	%eax, %ebx
	movq	_AR9170_PHY_RF_CTL3_TX_END_TO_A2_RX_ON@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	20(%r13,%r14), %edx
	movl	%ebx, %esi
	callq	_SET_VAL
	movq	_AR9170_PHY_REG_RF_CTL3@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	%ebx, %esi
	callq	_carl9170_regwrite
	movl	$1869924, %edi                  ## imm = 0x1C8864
	movl	%r15d, %esi
	movl	%r12d, %edx
	callq	_carl9170_def_val
	andl	$-520193, %eax                  ## imm = 0xFFF80FFF
	movl	24(%r13,%r14), %esi
	shll	$12, %esi
	orl	%eax, %esi
	movl	$1869924, %edi                  ## imm = 0x1C8864
	callq	_carl9170_regwrite
	movq	_AR9170_PHY_REG_RXGAIN@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	%r15d, %esi
	movl	%r12d, %edx
	callq	_carl9170_def_val
	movl	%eax, %ebx
	movq	_AR9170_PHY_RXGAIN_TXRX_ATTEN@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	32(%r13,%r14), %rax
	movl	(%rax), %edx
	movl	%ebx, %esi
	callq	_SET_VAL
	movq	_AR9170_PHY_REG_RXGAIN@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	%ebx, %esi
	callq	_carl9170_regwrite
	movq	_AR9170_PHY_REG_RXGAIN_CHAIN_2@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	%r15d, %esi
	movl	%r12d, %edx
	callq	_carl9170_def_val
	movl	%eax, %ebx
	movq	_AR9170_PHY_RXGAIN_TXRX_ATTEN@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	32(%r13,%r14), %rax
	movl	4(%rax), %edx
	movl	%ebx, %esi
	callq	_SET_VAL
	movq	_AR9170_PHY_REG_RXGAIN_CHAIN_2@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	%ebx, %esi
	callq	_carl9170_regwrite
	movq	_AR9170_PHY_REG_GAIN_2GHZ@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	%r15d, %esi
	movl	%r12d, -48(%rbp)                ## 4-byte Spill
	movl	%r12d, %edx
	callq	_carl9170_def_val
	movl	%eax, %ebx
	movq	_AR9170_PHY_GAIN_2GHZ_RXTX_MARGIN@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	leaq	(%r14,%r13), %rax
	addq	$40, %rax
	movq	%rax, -56(%rbp)                 ## 8-byte Spill
	movq	40(%r13,%r14), %rax
	movl	(%rax), %edx
	movl	%ebx, %esi
	callq	_SET_VAL
	testl	%r15d, %r15d
	jne	LBB0_4
## %bb.3:
	movq	_AR9170_PHY_GAIN_2GHZ_BSW_MARGIN@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	48(%r13,%r14), %rax
	movl	(%rax), %edx
	movl	%ebx, %esi
	callq	_SET_VAL
LBB0_4:
	movq	_AR9170_PHY_REG_GAIN_2GHZ@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	%ebx, %esi
	callq	_carl9170_regwrite
	movq	_AR9170_PHY_REG_GAIN_2GHZ_CHAIN_2@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	-44(%rbp), %r12d                ## 4-byte Reload
	movl	%r12d, %esi
	movl	-48(%rbp), %r15d                ## 4-byte Reload
	movl	%r15d, %edx
	callq	_carl9170_def_val
	movl	%eax, %ebx
	movq	_AR9170_PHY_GAIN_2GHZ_RXTX_MARGIN@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	-56(%rbp), %rax                 ## 8-byte Reload
	movq	(%rax), %rax
	movl	4(%rax), %edx
	movl	%ebx, %esi
	callq	_SET_VAL
	movq	_AR9170_PHY_REG_GAIN_2GHZ_CHAIN_2@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	%ebx, %esi
	callq	_carl9170_regwrite
	xorl	%edi, %edi
	callq	_AR9170_PHY_REG_TIMING_CTRL4
	movl	%eax, %edi
	movl	%r12d, %esi
	movl	%r15d, %edx
	callq	_carl9170_def_val
	movl	%eax, %ebx
	movq	_AR9170_PHY_TIMING_CTRL4_IQCORR_Q_I_COFF@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	56(%r13,%r14), %rax
	movl	(%rax), %edx
	movl	%ebx, %esi
	callq	_SET_VAL
	movq	_AR9170_PHY_TIMING_CTRL4_IQCORR_Q_Q_COFF@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	64(%r13,%r14), %rax
	movl	(%rax), %edx
	movl	%ebx, %esi
	callq	_SET_VAL
	xorl	%edi, %edi
	callq	_AR9170_PHY_REG_TIMING_CTRL4
	movl	%eax, %edi
	movl	%ebx, %esi
	callq	_carl9170_regwrite
	movl	$2, %edi
	callq	_AR9170_PHY_REG_TIMING_CTRL4
	movl	%eax, %edi
	movl	%r12d, %esi
	movl	%r15d, %edx
	callq	_carl9170_def_val
	movl	%eax, %ebx
	movq	_AR9170_PHY_TIMING_CTRL4_IQCORR_Q_I_COFF@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	56(%r13,%r14), %rax
	movl	4(%rax), %edx
	movl	%ebx, %esi
	callq	_SET_VAL
	movq	_AR9170_PHY_TIMING_CTRL4_IQCORR_Q_Q_COFF@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	64(%r13,%r14), %rax
	movl	4(%rax), %edx
	movl	%ebx, %esi
	callq	_SET_VAL
	movl	$2, %edi
	callq	_AR9170_PHY_REG_TIMING_CTRL4
	movl	%eax, %edi
	movl	%ebx, %esi
	callq	_carl9170_regwrite
	movq	_AR9170_PHY_REG_TPCRG1@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	%r12d, %esi
	movl	%r15d, %edx
	callq	_carl9170_def_val
	movl	%eax, %ebx
	movq	_AR9170_PHY_TPCRG1_PD_GAIN_1@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	72(%r13,%r14), %eax
	andl	$15, %eax
	leaq	_carl9170_init_phy_from_eeprom.xpd2pd(%rip), %r15
	movl	(%r15,%rax,4), %edx
	andl	$3, %edx
	movl	%ebx, %esi
	callq	_SET_VAL
	movq	_AR9170_PHY_TPCRG1_PD_GAIN_2@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	72(%r13,%r14), %eax
	andl	$15, %eax
	movl	(%r15,%rax,4), %edx
	sarl	$2, %edx
	movl	%ebx, %esi
	callq	_SET_VAL
	movq	_AR9170_PHY_REG_TPCRG1@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	%ebx, %esi
	callq	_carl9170_regwrite
	movq	_AR9170_PHY_REG_RX_CHAINMASK@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	-64(%rbp), %rbx                 ## 8-byte Reload
	movl	(%rbx), %esi
	callq	_carl9170_regwrite
	movq	_AR9170_PHY_REG_CAL_CHAINMASK@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	(%rbx), %esi
	callq	_carl9170_regwrite
	xorl	%eax, %eax
	callq	_carl9170_regwrite_finish
	xorl	%eax, %eax
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_carl9170_regwrite_result       ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.section	__TEXT,__const
	.p2align	4                               ## @carl9170_init_phy_from_eeprom.xpd2pd
_carl9170_init_phy_from_eeprom.xpd2pd:
	.long	2                               ## 0x2
	.long	2                               ## 0x2
	.long	2                               ## 0x2
	.long	1                               ## 0x1
	.long	2                               ## 0x2
	.long	2                               ## 0x2
	.long	6                               ## 0x6
	.long	2                               ## 0x2
	.long	2                               ## 0x2
	.long	3                               ## 0x3
	.long	7                               ## 0x7
	.long	2                               ## 0x2
	.long	11                              ## 0xb
	.long	2                               ## 0x2
	.long	2                               ## 0x2
	.long	2                               ## 0x2

	.comm	_AR9170_PHY_REG_SWITCH_COM,4,2  ## @AR9170_PHY_REG_SWITCH_COM
	.comm	_AR9170_PHY_REG_SWITCH_CHAIN_0,4,2 ## @AR9170_PHY_REG_SWITCH_CHAIN_0
	.comm	_AR9170_PHY_REG_SWITCH_CHAIN_2,4,2 ## @AR9170_PHY_REG_SWITCH_CHAIN_2
	.comm	_AR9170_PHY_REG_SETTLING,4,2    ## @AR9170_PHY_REG_SETTLING
	.comm	_AR9170_PHY_SETTLING_SWITCH,4,2 ## @AR9170_PHY_SETTLING_SWITCH
	.comm	_AR9170_PHY_REG_DESIRED_SZ,4,2  ## @AR9170_PHY_REG_DESIRED_SZ
	.comm	_AR9170_PHY_DESIRED_SZ_PGA,4,2  ## @AR9170_PHY_DESIRED_SZ_PGA
	.comm	_AR9170_PHY_DESIRED_SZ_ADC,4,2  ## @AR9170_PHY_DESIRED_SZ_ADC
	.comm	_AR9170_PHY_REG_RF_CTL4,4,2     ## @AR9170_PHY_REG_RF_CTL4
	.comm	_AR9170_PHY_RF_CTL4_TX_END_XPAB_OFF,4,2 ## @AR9170_PHY_RF_CTL4_TX_END_XPAB_OFF
	.comm	_AR9170_PHY_RF_CTL4_TX_END_XPAA_OFF,4,2 ## @AR9170_PHY_RF_CTL4_TX_END_XPAA_OFF
	.comm	_AR9170_PHY_RF_CTL4_FRAME_XPAB_ON,4,2 ## @AR9170_PHY_RF_CTL4_FRAME_XPAB_ON
	.comm	_AR9170_PHY_RF_CTL4_FRAME_XPAA_ON,4,2 ## @AR9170_PHY_RF_CTL4_FRAME_XPAA_ON
	.comm	_AR9170_PHY_REG_RF_CTL3,4,2     ## @AR9170_PHY_REG_RF_CTL3
	.comm	_AR9170_PHY_RF_CTL3_TX_END_TO_A2_RX_ON,4,2 ## @AR9170_PHY_RF_CTL3_TX_END_TO_A2_RX_ON
	.comm	_AR9170_PHY_REG_RXGAIN,4,2      ## @AR9170_PHY_REG_RXGAIN
	.comm	_AR9170_PHY_RXGAIN_TXRX_ATTEN,4,2 ## @AR9170_PHY_RXGAIN_TXRX_ATTEN
	.comm	_AR9170_PHY_REG_RXGAIN_CHAIN_2,4,2 ## @AR9170_PHY_REG_RXGAIN_CHAIN_2
	.comm	_AR9170_PHY_REG_GAIN_2GHZ,4,2   ## @AR9170_PHY_REG_GAIN_2GHZ
	.comm	_AR9170_PHY_GAIN_2GHZ_RXTX_MARGIN,4,2 ## @AR9170_PHY_GAIN_2GHZ_RXTX_MARGIN
	.comm	_AR9170_PHY_GAIN_2GHZ_BSW_MARGIN,4,2 ## @AR9170_PHY_GAIN_2GHZ_BSW_MARGIN
	.comm	_AR9170_PHY_REG_GAIN_2GHZ_CHAIN_2,4,2 ## @AR9170_PHY_REG_GAIN_2GHZ_CHAIN_2
	.comm	_AR9170_PHY_TIMING_CTRL4_IQCORR_Q_I_COFF,4,2 ## @AR9170_PHY_TIMING_CTRL4_IQCORR_Q_I_COFF
	.comm	_AR9170_PHY_TIMING_CTRL4_IQCORR_Q_Q_COFF,4,2 ## @AR9170_PHY_TIMING_CTRL4_IQCORR_Q_Q_COFF
	.comm	_AR9170_PHY_REG_TPCRG1,4,2      ## @AR9170_PHY_REG_TPCRG1
	.comm	_AR9170_PHY_TPCRG1_PD_GAIN_1,4,2 ## @AR9170_PHY_TPCRG1_PD_GAIN_1
	.comm	_AR9170_PHY_TPCRG1_PD_GAIN_2,4,2 ## @AR9170_PHY_TPCRG1_PD_GAIN_2
	.comm	_AR9170_PHY_REG_RX_CHAINMASK,4,2 ## @AR9170_PHY_REG_RX_CHAINMASK
	.comm	_AR9170_PHY_REG_CAL_CHAINMASK,4,2 ## @AR9170_PHY_REG_CAL_CHAINMASK
	.no_dead_strip	_carl9170_init_phy_from_eeprom
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function carl9170_init_phy_from_eeprom
_carl9170_init_phy_from_eeprom:         ; @carl9170_init_phy_from_eeprom
	.cfi_startproc
; %bb.0:
	stp	x28, x27, [sp, #-96]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 96
	stp	x26, x25, [sp, #16]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #32]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #48]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #64]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #80]             ; 16-byte Folded Spill
	add	x29, sp, #80
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	mov	x20, x2
	mov	x21, x1
	mov	x19, x0
	ldr	x23, [x0, #8]
	sxtw	x24, w21
	bl	_carl9170_regwrite_begin
Lloh0:
	adrp	x8, _AR9170_PHY_REG_SWITCH_COM@GOTPAGE
Lloh1:
	ldr	x8, [x8, _AR9170_PHY_REG_SWITCH_COM@GOTPAGEOFF]
Lloh2:
	ldr	w22, [x8]
	mov	w8, #96
	smaddl	x25, w21, w8, x23
	ldr	w0, [x25, #88]
	bl	_le32_to_cpu
	mov	x1, x0
	mov	x0, x22
	bl	_carl9170_regwrite
Lloh3:
	adrp	x8, _AR9170_PHY_REG_SWITCH_CHAIN_0@GOTPAGE
Lloh4:
	ldr	x8, [x8, _AR9170_PHY_REG_SWITCH_CHAIN_0@GOTPAGEOFF]
Lloh5:
	ldr	w22, [x8]
	ldr	x8, [x25, #80]
	ldr	w0, [x8]
	bl	_le32_to_cpu
	mov	x1, x0
	mov	x0, x22
	bl	_carl9170_regwrite
Lloh6:
	adrp	x8, _AR9170_PHY_REG_SWITCH_CHAIN_2@GOTPAGE
Lloh7:
	ldr	x8, [x8, _AR9170_PHY_REG_SWITCH_CHAIN_2@GOTPAGEOFF]
Lloh8:
	ldr	w22, [x8]
	ldr	x8, [x25, #80]
	ldr	w0, [x8, #4]
	bl	_le32_to_cpu
	mov	x1, x0
	mov	x0, x22
	bl	_carl9170_regwrite
	cbnz	w20, LBB0_2
; %bb.1:
Lloh9:
	adrp	x25, _AR9170_PHY_REG_SETTLING@GOTPAGE
Lloh10:
	ldr	x25, [x25, _AR9170_PHY_REG_SETTLING@GOTPAGEOFF]
	ldr	w0, [x25]
	mov	x1, x21
	mov	w2, #0
	bl	_carl9170_def_val
	mov	x22, x0
Lloh11:
	adrp	x8, _AR9170_PHY_SETTLING_SWITCH@GOTPAGE
Lloh12:
	ldr	x8, [x8, _AR9170_PHY_SETTLING_SWITCH@GOTPAGEOFF]
Lloh13:
	ldr	w0, [x8]
	mov	w8, #96
	mul	x8, x24, x8
	ldr	w2, [x23, x8]
	mov	x1, x22
	bl	_SET_VAL
	ldr	w0, [x25]
	mov	x1, x22
	bl	_carl9170_regwrite
LBB0_2:
Lloh14:
	adrp	x26, _AR9170_PHY_REG_DESIRED_SZ@GOTPAGE
Lloh15:
	ldr	x26, [x26, _AR9170_PHY_REG_DESIRED_SZ@GOTPAGEOFF]
	ldr	w0, [x26]
	mov	x1, x21
	mov	x2, x20
	bl	_carl9170_def_val
	mov	x22, x0
Lloh16:
	adrp	x8, _AR9170_PHY_DESIRED_SZ_PGA@GOTPAGE
Lloh17:
	ldr	x8, [x8, _AR9170_PHY_DESIRED_SZ_PGA@GOTPAGEOFF]
Lloh18:
	ldr	w0, [x8]
	mov	w8, #96
	madd	x25, x24, x8, x23
	ldr	w2, [x25, #4]
	mov	x1, x22
	bl	_SET_VAL
Lloh19:
	adrp	x8, _AR9170_PHY_DESIRED_SZ_ADC@GOTPAGE
Lloh20:
	ldr	x8, [x8, _AR9170_PHY_DESIRED_SZ_ADC@GOTPAGEOFF]
Lloh21:
	ldr	w0, [x8]
	ldr	w2, [x25, #8]
	mov	x1, x22
	bl	_SET_VAL
	ldr	w0, [x26]
	mov	x1, x22
	bl	_carl9170_regwrite
Lloh22:
	adrp	x26, _AR9170_PHY_REG_RF_CTL4@GOTPAGE
Lloh23:
	ldr	x26, [x26, _AR9170_PHY_REG_RF_CTL4@GOTPAGEOFF]
	ldr	w0, [x26]
	mov	x1, x21
	mov	x2, x20
	bl	_carl9170_def_val
	mov	x22, x0
Lloh24:
	adrp	x8, _AR9170_PHY_RF_CTL4_TX_END_XPAB_OFF@GOTPAGE
Lloh25:
	ldr	x8, [x8, _AR9170_PHY_RF_CTL4_TX_END_XPAB_OFF@GOTPAGEOFF]
Lloh26:
	ldr	w0, [x8]
	ldr	w2, [x25, #12]
	mov	x1, x22
	bl	_SET_VAL
Lloh27:
	adrp	x8, _AR9170_PHY_RF_CTL4_TX_END_XPAA_OFF@GOTPAGE
Lloh28:
	ldr	x8, [x8, _AR9170_PHY_RF_CTL4_TX_END_XPAA_OFF@GOTPAGEOFF]
Lloh29:
	ldr	w0, [x8]
	ldr	w2, [x25, #12]
	mov	x1, x22
	bl	_SET_VAL
Lloh30:
	adrp	x8, _AR9170_PHY_RF_CTL4_FRAME_XPAB_ON@GOTPAGE
Lloh31:
	ldr	x8, [x8, _AR9170_PHY_RF_CTL4_FRAME_XPAB_ON@GOTPAGEOFF]
Lloh32:
	ldr	w0, [x8]
	ldr	w2, [x25, #16]
	mov	x1, x22
	bl	_SET_VAL
Lloh33:
	adrp	x8, _AR9170_PHY_RF_CTL4_FRAME_XPAA_ON@GOTPAGE
Lloh34:
	ldr	x8, [x8, _AR9170_PHY_RF_CTL4_FRAME_XPAA_ON@GOTPAGEOFF]
Lloh35:
	ldr	w0, [x8]
	ldr	w2, [x25, #16]
	mov	x1, x22
	bl	_SET_VAL
	ldr	w0, [x26]
	mov	x1, x22
	bl	_carl9170_regwrite
Lloh36:
	adrp	x26, _AR9170_PHY_REG_RF_CTL3@GOTPAGE
Lloh37:
	ldr	x26, [x26, _AR9170_PHY_REG_RF_CTL3@GOTPAGEOFF]
	ldr	w0, [x26]
	mov	x1, x21
	mov	x2, x20
	bl	_carl9170_def_val
	mov	x22, x0
Lloh38:
	adrp	x8, _AR9170_PHY_RF_CTL3_TX_END_TO_A2_RX_ON@GOTPAGE
Lloh39:
	ldr	x8, [x8, _AR9170_PHY_RF_CTL3_TX_END_TO_A2_RX_ON@GOTPAGEOFF]
Lloh40:
	ldr	w0, [x8]
	ldr	w2, [x25, #20]
	mov	x1, x22
	bl	_SET_VAL
	ldr	w0, [x26]
	mov	x1, x22
	bl	_carl9170_regwrite
	mov	w0, #34916
	movk	w0, #28, lsl #16
	mov	x1, x21
	mov	x2, x20
	bl	_carl9170_def_val
	and	w8, w0, #0xfff80fff
	ldr	w9, [x25, #24]
	orr	w1, w8, w9, lsl #12
	mov	w0, #34916
	movk	w0, #28, lsl #16
	bl	_carl9170_regwrite
Lloh41:
	adrp	x26, _AR9170_PHY_REG_RXGAIN@GOTPAGE
Lloh42:
	ldr	x26, [x26, _AR9170_PHY_REG_RXGAIN@GOTPAGEOFF]
	ldr	w0, [x26]
	mov	x1, x21
	mov	x2, x20
	bl	_carl9170_def_val
	mov	x22, x0
Lloh43:
	adrp	x27, _AR9170_PHY_RXGAIN_TXRX_ATTEN@GOTPAGE
Lloh44:
	ldr	x27, [x27, _AR9170_PHY_RXGAIN_TXRX_ATTEN@GOTPAGEOFF]
	ldr	w0, [x27]
	ldr	x8, [x25, #32]
	ldr	w2, [x8]
	mov	x1, x22
	bl	_SET_VAL
	ldr	w0, [x26]
	mov	x1, x22
	bl	_carl9170_regwrite
Lloh45:
	adrp	x26, _AR9170_PHY_REG_RXGAIN_CHAIN_2@GOTPAGE
Lloh46:
	ldr	x26, [x26, _AR9170_PHY_REG_RXGAIN_CHAIN_2@GOTPAGEOFF]
	ldr	w0, [x26]
	mov	x1, x21
	mov	x2, x20
	bl	_carl9170_def_val
	mov	x22, x0
	ldr	w0, [x27]
	ldr	x8, [x25, #32]
	ldr	w2, [x8, #4]
	mov	x1, x22
	bl	_SET_VAL
	ldr	w0, [x26]
	mov	x1, x22
	bl	_carl9170_regwrite
Lloh47:
	adrp	x27, _AR9170_PHY_REG_GAIN_2GHZ@GOTPAGE
Lloh48:
	ldr	x27, [x27, _AR9170_PHY_REG_GAIN_2GHZ@GOTPAGEOFF]
	ldr	w0, [x27]
	mov	x1, x21
	mov	x2, x20
	bl	_carl9170_def_val
	mov	x22, x0
Lloh49:
	adrp	x26, _AR9170_PHY_GAIN_2GHZ_RXTX_MARGIN@GOTPAGE
Lloh50:
	ldr	x26, [x26, _AR9170_PHY_GAIN_2GHZ_RXTX_MARGIN@GOTPAGEOFF]
	ldr	w0, [x26]
	ldr	x8, [x25, #40]!
	ldr	w2, [x8]
	mov	x1, x22
	bl	_SET_VAL
	cbnz	w21, LBB0_4
; %bb.3:
Lloh51:
	adrp	x8, _AR9170_PHY_GAIN_2GHZ_BSW_MARGIN@GOTPAGE
Lloh52:
	ldr	x8, [x8, _AR9170_PHY_GAIN_2GHZ_BSW_MARGIN@GOTPAGEOFF]
Lloh53:
	ldr	w0, [x8]
	mov	w8, #96
	madd	x8, x24, x8, x23
	ldr	x8, [x8, #48]
	ldr	w2, [x8]
	mov	x1, x22
	bl	_SET_VAL
LBB0_4:
	ldr	w0, [x27]
	mov	x1, x22
	bl	_carl9170_regwrite
Lloh54:
	adrp	x27, _AR9170_PHY_REG_GAIN_2GHZ_CHAIN_2@GOTPAGE
Lloh55:
	ldr	x27, [x27, _AR9170_PHY_REG_GAIN_2GHZ_CHAIN_2@GOTPAGEOFF]
	ldr	w0, [x27]
	mov	x1, x21
	mov	x2, x20
	bl	_carl9170_def_val
	mov	x22, x0
	ldr	w0, [x26]
	ldr	x8, [x25]
	ldr	w2, [x8, #4]
	mov	x1, x22
	bl	_SET_VAL
	ldr	w0, [x27]
	mov	x1, x22
	bl	_carl9170_regwrite
	mov	w0, #0
	bl	_AR9170_PHY_REG_TIMING_CTRL4
	mov	x1, x21
	mov	x2, x20
	bl	_carl9170_def_val
	mov	x22, x0
Lloh56:
	adrp	x25, _AR9170_PHY_TIMING_CTRL4_IQCORR_Q_I_COFF@GOTPAGE
Lloh57:
	ldr	x25, [x25, _AR9170_PHY_TIMING_CTRL4_IQCORR_Q_I_COFF@GOTPAGEOFF]
	ldr	w0, [x25]
	mov	w8, #96
	madd	x23, x24, x8, x23
	ldr	x8, [x23, #56]
	ldr	w2, [x8]
	mov	x1, x22
	bl	_SET_VAL
Lloh58:
	adrp	x24, _AR9170_PHY_TIMING_CTRL4_IQCORR_Q_Q_COFF@GOTPAGE
Lloh59:
	ldr	x24, [x24, _AR9170_PHY_TIMING_CTRL4_IQCORR_Q_Q_COFF@GOTPAGEOFF]
	ldr	w0, [x24]
	ldr	x8, [x23, #64]
	ldr	w2, [x8]
	mov	x1, x22
	bl	_SET_VAL
	mov	w0, #0
	bl	_AR9170_PHY_REG_TIMING_CTRL4
	mov	x1, x22
	bl	_carl9170_regwrite
	mov	w0, #2
	bl	_AR9170_PHY_REG_TIMING_CTRL4
	mov	x1, x21
	mov	x2, x20
	bl	_carl9170_def_val
	mov	x22, x0
	ldr	w0, [x25]
	ldr	x8, [x23, #56]
	ldr	w2, [x8, #4]
	mov	x1, x22
	bl	_SET_VAL
	ldr	w0, [x24]
	ldr	x8, [x23, #64]
	ldr	w2, [x8, #4]
	mov	x1, x22
	bl	_SET_VAL
	mov	w0, #2
	bl	_AR9170_PHY_REG_TIMING_CTRL4
	mov	x1, x22
	bl	_carl9170_regwrite
Lloh60:
	adrp	x22, _AR9170_PHY_REG_TPCRG1@GOTPAGE
Lloh61:
	ldr	x22, [x22, _AR9170_PHY_REG_TPCRG1@GOTPAGEOFF]
	ldr	w0, [x22]
	mov	x1, x21
	mov	x2, x20
	bl	_carl9170_def_val
	mov	x20, x0
Lloh62:
	adrp	x8, _AR9170_PHY_TPCRG1_PD_GAIN_1@GOTPAGE
Lloh63:
	ldr	x8, [x8, _AR9170_PHY_TPCRG1_PD_GAIN_1@GOTPAGEOFF]
Lloh64:
	ldr	w0, [x8]
	ldr	w8, [x23, #72]
	and	x8, x8, #0xf
Lloh65:
	adrp	x21, _carl9170_init_phy_from_eeprom.xpd2pd@PAGE
Lloh66:
	add	x21, x21, _carl9170_init_phy_from_eeprom.xpd2pd@PAGEOFF
	ldr	w8, [x21, x8, lsl #2]
	and	w2, w8, #0x3
	mov	x1, x20
	bl	_SET_VAL
Lloh67:
	adrp	x8, _AR9170_PHY_TPCRG1_PD_GAIN_2@GOTPAGE
Lloh68:
	ldr	x8, [x8, _AR9170_PHY_TPCRG1_PD_GAIN_2@GOTPAGEOFF]
Lloh69:
	ldr	w0, [x8]
	ldr	w8, [x23, #72]
	and	x8, x8, #0xf
	ldr	w8, [x21, x8, lsl #2]
	asr	w2, w8, #2
	mov	x1, x20
	bl	_SET_VAL
	ldr	w0, [x22]
	mov	x1, x20
	bl	_carl9170_regwrite
Lloh70:
	adrp	x8, _AR9170_PHY_REG_RX_CHAINMASK@GOTPAGE
Lloh71:
	ldr	x8, [x8, _AR9170_PHY_REG_RX_CHAINMASK@GOTPAGEOFF]
Lloh72:
	ldr	w0, [x8]
	ldr	w1, [x19]
	bl	_carl9170_regwrite
Lloh73:
	adrp	x8, _AR9170_PHY_REG_CAL_CHAINMASK@GOTPAGE
Lloh74:
	ldr	x8, [x8, _AR9170_PHY_REG_CAL_CHAINMASK@GOTPAGEOFF]
Lloh75:
	ldr	w0, [x8]
	ldr	w1, [x19]
	bl	_carl9170_regwrite
	bl	_carl9170_regwrite_finish
	ldp	x29, x30, [sp, #80]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #64]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #48]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #32]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #16]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp], #96             ; 16-byte Folded Reload
	b	_carl9170_regwrite_result
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpLdrGot	Lloh9, Lloh10
	.loh AdrpLdrGot	Lloh49, Lloh50
	.loh AdrpLdrGot	Lloh47, Lloh48
	.loh AdrpLdrGot	Lloh45, Lloh46
	.loh AdrpLdrGot	Lloh43, Lloh44
	.loh AdrpLdrGot	Lloh41, Lloh42
	.loh AdrpLdrGotLdr	Lloh38, Lloh39, Lloh40
	.loh AdrpLdrGot	Lloh36, Lloh37
	.loh AdrpLdrGotLdr	Lloh33, Lloh34, Lloh35
	.loh AdrpLdrGotLdr	Lloh30, Lloh31, Lloh32
	.loh AdrpLdrGotLdr	Lloh27, Lloh28, Lloh29
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.loh AdrpLdrGot	Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh19, Lloh20, Lloh21
	.loh AdrpLdrGotLdr	Lloh16, Lloh17, Lloh18
	.loh AdrpLdrGot	Lloh14, Lloh15
	.loh AdrpLdrGotLdr	Lloh51, Lloh52, Lloh53
	.loh AdrpLdrGotLdr	Lloh73, Lloh74, Lloh75
	.loh AdrpLdrGotLdr	Lloh70, Lloh71, Lloh72
	.loh AdrpLdrGotLdr	Lloh67, Lloh68, Lloh69
	.loh AdrpAdd	Lloh65, Lloh66
	.loh AdrpLdrGotLdr	Lloh62, Lloh63, Lloh64
	.loh AdrpLdrGot	Lloh60, Lloh61
	.loh AdrpLdrGot	Lloh58, Lloh59
	.loh AdrpLdrGot	Lloh56, Lloh57
	.loh AdrpLdrGot	Lloh54, Lloh55
	.cfi_endproc
                                        ; -- End function
	.section	__TEXT,__const
	.p2align	2                               ; @carl9170_init_phy_from_eeprom.xpd2pd
_carl9170_init_phy_from_eeprom.xpd2pd:
	.long	2                               ; 0x2
	.long	2                               ; 0x2
	.long	2                               ; 0x2
	.long	1                               ; 0x1
	.long	2                               ; 0x2
	.long	2                               ; 0x2
	.long	6                               ; 0x6
	.long	2                               ; 0x2
	.long	2                               ; 0x2
	.long	3                               ; 0x3
	.long	7                               ; 0x7
	.long	2                               ; 0x2
	.long	11                              ; 0xb
	.long	2                               ; 0x2
	.long	2                               ; 0x2
	.long	2                               ; 0x2

	.comm	_AR9170_PHY_REG_SWITCH_COM,4,2  ; @AR9170_PHY_REG_SWITCH_COM
	.comm	_AR9170_PHY_REG_SWITCH_CHAIN_0,4,2 ; @AR9170_PHY_REG_SWITCH_CHAIN_0
	.comm	_AR9170_PHY_REG_SWITCH_CHAIN_2,4,2 ; @AR9170_PHY_REG_SWITCH_CHAIN_2
	.comm	_AR9170_PHY_REG_SETTLING,4,2    ; @AR9170_PHY_REG_SETTLING
	.comm	_AR9170_PHY_SETTLING_SWITCH,4,2 ; @AR9170_PHY_SETTLING_SWITCH
	.comm	_AR9170_PHY_REG_DESIRED_SZ,4,2  ; @AR9170_PHY_REG_DESIRED_SZ
	.comm	_AR9170_PHY_DESIRED_SZ_PGA,4,2  ; @AR9170_PHY_DESIRED_SZ_PGA
	.comm	_AR9170_PHY_DESIRED_SZ_ADC,4,2  ; @AR9170_PHY_DESIRED_SZ_ADC
	.comm	_AR9170_PHY_REG_RF_CTL4,4,2     ; @AR9170_PHY_REG_RF_CTL4
	.comm	_AR9170_PHY_RF_CTL4_TX_END_XPAB_OFF,4,2 ; @AR9170_PHY_RF_CTL4_TX_END_XPAB_OFF
	.comm	_AR9170_PHY_RF_CTL4_TX_END_XPAA_OFF,4,2 ; @AR9170_PHY_RF_CTL4_TX_END_XPAA_OFF
	.comm	_AR9170_PHY_RF_CTL4_FRAME_XPAB_ON,4,2 ; @AR9170_PHY_RF_CTL4_FRAME_XPAB_ON
	.comm	_AR9170_PHY_RF_CTL4_FRAME_XPAA_ON,4,2 ; @AR9170_PHY_RF_CTL4_FRAME_XPAA_ON
	.comm	_AR9170_PHY_REG_RF_CTL3,4,2     ; @AR9170_PHY_REG_RF_CTL3
	.comm	_AR9170_PHY_RF_CTL3_TX_END_TO_A2_RX_ON,4,2 ; @AR9170_PHY_RF_CTL3_TX_END_TO_A2_RX_ON
	.comm	_AR9170_PHY_REG_RXGAIN,4,2      ; @AR9170_PHY_REG_RXGAIN
	.comm	_AR9170_PHY_RXGAIN_TXRX_ATTEN,4,2 ; @AR9170_PHY_RXGAIN_TXRX_ATTEN
	.comm	_AR9170_PHY_REG_RXGAIN_CHAIN_2,4,2 ; @AR9170_PHY_REG_RXGAIN_CHAIN_2
	.comm	_AR9170_PHY_REG_GAIN_2GHZ,4,2   ; @AR9170_PHY_REG_GAIN_2GHZ
	.comm	_AR9170_PHY_GAIN_2GHZ_RXTX_MARGIN,4,2 ; @AR9170_PHY_GAIN_2GHZ_RXTX_MARGIN
	.comm	_AR9170_PHY_GAIN_2GHZ_BSW_MARGIN,4,2 ; @AR9170_PHY_GAIN_2GHZ_BSW_MARGIN
	.comm	_AR9170_PHY_REG_GAIN_2GHZ_CHAIN_2,4,2 ; @AR9170_PHY_REG_GAIN_2GHZ_CHAIN_2
	.comm	_AR9170_PHY_TIMING_CTRL4_IQCORR_Q_I_COFF,4,2 ; @AR9170_PHY_TIMING_CTRL4_IQCORR_Q_I_COFF
	.comm	_AR9170_PHY_TIMING_CTRL4_IQCORR_Q_Q_COFF,4,2 ; @AR9170_PHY_TIMING_CTRL4_IQCORR_Q_Q_COFF
	.comm	_AR9170_PHY_REG_TPCRG1,4,2      ; @AR9170_PHY_REG_TPCRG1
	.comm	_AR9170_PHY_TPCRG1_PD_GAIN_1,4,2 ; @AR9170_PHY_TPCRG1_PD_GAIN_1
	.comm	_AR9170_PHY_TPCRG1_PD_GAIN_2,4,2 ; @AR9170_PHY_TPCRG1_PD_GAIN_2
	.comm	_AR9170_PHY_REG_RX_CHAINMASK,4,2 ; @AR9170_PHY_REG_RX_CHAINMASK
	.comm	_AR9170_PHY_REG_CAL_CHAINMASK,4,2 ; @AR9170_PHY_REG_CAL_CHAINMASK
	.no_dead_strip	_carl9170_init_phy_from_eeprom
.subsections_via_symbols
