	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function iwl_pcie_rxq_check_wrptr
_iwl_pcie_rxq_check_wrptr:              ## @iwl_pcie_rxq_check_wrptr
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$24, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %rbx
	callq	_IWL_TRANS_GET_PCIE_TRANS
	movq	%rax, -56(%rbp)                 ## 8-byte Spill
	movq	%rbx, -48(%rbp)                 ## 8-byte Spill
	movl	(%rbx), %eax
	testl	%eax, %eax
	jle	LBB0_5
## %bb.1:
	xorl	%ebx, %ebx
	xorl	%r14d, %r14d
	movq	-48(%rbp), %r12                 ## 8-byte Reload
	jmp	LBB0_2
	.p2align	4, 0x90
LBB0_4:                                 ##   in Loop: Header=BB0_2 Depth=1
	incq	%r14
	movslq	%eax, %rcx
	addq	$8, %rbx
	cmpq	%rcx, %r14
	jge	LBB0_5
LBB0_2:                                 ## =>This Inner Loop Header: Depth=1
	movq	-56(%rbp), %rcx                 ## 8-byte Reload
	movq	(%rcx), %r15
	cmpl	$0, (%r15,%rbx)
	je	LBB0_4
## %bb.3:                               ##   in Loop: Header=BB0_2 Depth=1
	leaq	(%r15,%rbx), %rax
	movq	%rax, -64(%rbp)                 ## 8-byte Spill
	leaq	(%r15,%rbx), %r13
	addq	$4, %r13
	movq	%r13, %rdi
	callq	_spin_lock
	movq	%r12, %rdi
	movq	-64(%rbp), %rsi                 ## 8-byte Reload
	callq	_iwl_pcie_rxq_inc_wr_ptr
	movl	$0, (%r15,%rbx)
	movq	%r13, %rdi
	callq	_spin_unlock
	movl	(%r12), %eax
	jmp	LBB0_4
LBB0_5:
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.no_dead_strip	_iwl_pcie_rxq_check_wrptr
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function iwl_pcie_rxq_check_wrptr
_iwl_pcie_rxq_check_wrptr:              ; @iwl_pcie_rxq_check_wrptr
	.cfi_startproc
; %bb.0:
	stp	x24, x23, [sp, #-64]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x19, x0
	bl	_IWL_TRANS_GET_PCIE_TRANS
	ldr	w8, [x19]
	cmp	w8, #1
	b.lt	LBB0_5
; %bb.1:
	mov	x20, x0
	mov	x23, #0
	mov	x24, #0
	b	LBB0_3
LBB0_2:                                 ;   in Loop: Header=BB0_3 Depth=1
	add	x24, x24, #1
	add	x23, x23, #8
	cmp	x24, w8, sxtw
	b.ge	LBB0_5
LBB0_3:                                 ; =>This Inner Loop Header: Depth=1
	ldr	x9, [x20]
	add	x21, x9, x23
	ldr	w9, [x21]
	cbz	w9, LBB0_2
; %bb.4:                                ;   in Loop: Header=BB0_3 Depth=1
	add	x22, x21, #4
	mov	x0, x22
	bl	_spin_lock
	mov	x0, x19
	mov	x1, x21
	bl	_iwl_pcie_rxq_inc_wr_ptr
	str	wzr, [x21]
	mov	x0, x22
	bl	_spin_unlock
	ldr	w8, [x19]
	b	LBB0_2
LBB0_5:
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	ret
	.cfi_endproc
                                        ; -- End function
	.no_dead_strip	_iwl_pcie_rxq_check_wrptr
.subsections_via_symbols
