	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_mlx5_init_clock                ## -- Begin function mlx5_init_clock
	.p2align	4, 0x90
_mlx5_init_clock:                       ## @mlx5_init_clock
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %rbx
	movq	$0, -32(%rbp)
	movq	_device_frequency_khz@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_MLX5_CAP_GEN
	testl	%eax, %eax
	je	LBB0_13
## %bb.1:
	movl	%eax, %r15d
	leaq	104(%rbx), %rdi
	callq	_seqlock_init
	movq	_read_internal_timer@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	leaq	72(%rbx), %r14
	movl	%eax, 84(%rbx)
	movq	_MLX5_CYCLES_SHIFT@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	%esi, 72(%rbx)
	movl	%r15d, %edi
	callq	_clocksource_khz2mult
	movl	%eax, 80(%rbx)
	movl	%eax, 88(%rbx)
	movl	$41, %edi
	callq	_CLOCKSOURCE_MASK
	movl	%eax, 76(%rbx)
	movq	%rbx, 96(%rbx)
	leaq	60(%rbx), %r15
	xorl	%eax, %eax
	callq	_ktime_get_real
	movl	%eax, %edi
	callq	_ktime_to_ns
	movq	%r15, %rdi
	movq	%r14, %rsi
	movl	%eax, %edx
	callq	_timecounter_init
	movl	80(%rbx), %esi
	movabsq	$9223372036854775807, %rdi      ## imm = 0x7FFFFFFFFFFFFFFF
	callq	_div64_u64
	movq	%rax, %r15
	movl	76(%rbx), %edi
	movl	$3, %esi
	callq	_div_u64
	movq	%r15, %rdi
	movl	%eax, %esi
	callq	_min
	leaq	-32(%rbp), %rcx
	movq	%r14, %rdi
	movq	%rax, %rsi
	xorl	%edx, %edx
	callq	_cyclecounter_cyc2ns
	movq	%rax, %r14
	movq	_NSEC_PER_SEC@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movq	_HZ@GOTPCREL(%rip), %rcx
	cltd
	idivl	(%rcx)
	movq	%r14, %rdi
	movl	%eax, %esi
	callq	_do_div
	movq	%r14, 48(%rbx)
	movq	_GFP_KERNEL@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_get_zeroed_page
	movq	%rax, 8(%rbx)
	testq	%rax, %rax
	je	LBB0_3
## %bb.2:
	movl	68(%rbx), %ecx
	movl	%ecx, 28(%rax)
	movl	64(%rbx), %ecx
	movl	%ecx, 24(%rax)
	movl	76(%rbx), %ecx
	movl	%ecx, 20(%rax)
	movl	88(%rbx), %ecx
	movl	%ecx, 16(%rax)
	movl	72(%rbx), %ecx
	movl	%ecx, 12(%rax)
	movl	60(%rbx), %ecx
	movl	%ecx, 8(%rax)
	movq	48(%rbx), %rcx
	movq	%rcx, (%rax)
LBB0_3:
	leaq	56(%rbx), %rdi
	movq	_mlx5_pps_out@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_INIT_WORK
	leaq	40(%rbx), %r14
	movq	_mlx5_timestamp_overflow@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	callq	_INIT_DELAYED_WORK
	cmpq	$0, 48(%rbx)
	je	LBB0_5
## %bb.4:
	movq	%r14, %rdi
	xorl	%esi, %esi
	callq	_schedule_delayed_work
	jmp	LBB0_6
LBB0_13:
	leaq	L_.str(%rip), %rsi
	movq	%rbx, %rdi
	xorl	%eax, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_mlx5_core_warn                 ## TAILCALL
LBB0_5:
	leaq	L_.str.1(%rip), %rsi
	movq	%rbx, %rdi
	xorl	%eax, %eax
	callq	_mlx5_core_warn
LBB0_6:
	leaq	32(%rbx), %r15
	movq	_mlx5_ptp_clock_info@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	movq	%rax, 32(%rbx)
	movq	%rbx, %rdi
	callq	_MLX5_PPS_CAP
	testq	%rax, %rax
	je	LBB0_8
## %bb.7:
	movq	%rbx, %rdi
	callq	_mlx5_get_pps_caps
LBB0_8:
	leaq	16(%rbx), %r14
	cmpq	$0, (%r15)
	je	LBB0_10
## %bb.9:
	movq	%r14, %rdi
	callq	_mlx5_init_pin_config
LBB0_10:
	movq	(%rbx), %rsi
	movq	%r15, %rdi
	callq	_ptp_clock_register
	movq	%rax, 24(%rbx)
	movq	%rax, %rdi
	callq	_IS_ERR
	testq	%rax, %rax
	je	LBB0_12
## %bb.11:
	movq	24(%rbx), %rdi
	callq	_PTR_ERR
	leaq	L_.str.2(%rip), %rsi
	movq	%rbx, %rdi
	movl	%eax, %edx
	xorl	%eax, %eax
	callq	_mlx5_core_warn
	movq	$0, 24(%rbx)
LBB0_12:
	movq	_mlx5_pps_event@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_PPS_EVENT@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r14, %rdi
	callq	_MLX5_NB_INIT
	movq	%rbx, %rdi
	movq	%r14, %rsi
	callq	_mlx5_eq_notifier_register
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_device_frequency_khz,4,2       ## @device_frequency_khz
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"invalid device_frequency_khz, aborting HW clock init\n"

	.comm	_read_internal_timer,4,2        ## @read_internal_timer
	.comm	_MLX5_CYCLES_SHIFT,4,2          ## @MLX5_CYCLES_SHIFT
	.comm	_NSEC_PER_SEC,4,2               ## @NSEC_PER_SEC
	.comm	_HZ,4,2                         ## @HZ
	.comm	_GFP_KERNEL,4,2                 ## @GFP_KERNEL
	.comm	_mlx5_pps_out,4,2               ## @mlx5_pps_out
	.comm	_mlx5_timestamp_overflow,4,2    ## @mlx5_timestamp_overflow
L_.str.1:                               ## @.str.1
	.asciz	"invalid overflow period, overflow_work is not scheduled\n"

	.comm	_mlx5_ptp_clock_info,8,3        ## @mlx5_ptp_clock_info
L_.str.2:                               ## @.str.2
	.asciz	"ptp_clock_register failed %ld\n"

	.comm	_mlx5_pps_event,4,2             ## @mlx5_pps_event
	.comm	_PPS_EVENT,4,2                  ## @PPS_EVENT
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_mlx5_init_clock                ; -- Begin function mlx5_init_clock
	.p2align	2
_mlx5_init_clock:                       ; @mlx5_init_clock
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #64
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x0
	str	xzr, [sp, #8]
Lloh0:
	adrp	x8, _device_frequency_khz@GOTPAGE
Lloh1:
	ldr	x8, [x8, _device_frequency_khz@GOTPAGEOFF]
Lloh2:
	ldr	w1, [x8]
	bl	_MLX5_CAP_GEN
	cbz	w0, LBB0_5
; %bb.1:
	mov	x21, x0
	add	x0, x19, #104
	bl	_seqlock_init
Lloh3:
	adrp	x8, _read_internal_timer@GOTPAGE
Lloh4:
	ldr	x8, [x8, _read_internal_timer@GOTPAGEOFF]
Lloh5:
	ldr	w8, [x8]
	str	w8, [x19, #84]
Lloh6:
	adrp	x8, _MLX5_CYCLES_SHIFT@GOTPAGE
Lloh7:
	ldr	x8, [x8, _MLX5_CYCLES_SHIFT@GOTPAGEOFF]
Lloh8:
	ldr	w1, [x8]
	mov	x20, x19
	str	w1, [x20, #72]!
	mov	x0, x21
	bl	_clocksource_khz2mult
	str	w0, [x19, #80]
	str	w0, [x19, #88]
	mov	w0, #41
	bl	_CLOCKSOURCE_MASK
	str	w0, [x19, #76]
	str	x19, [x19, #96]
	add	x21, x19, #60
	bl	_ktime_get_real
	bl	_ktime_to_ns
	mov	x2, x0
	mov	x0, x21
	mov	x1, x20
	bl	_timecounter_init
	ldr	w1, [x19, #80]
	mov	x0, #9223372036854775807
	bl	_div64_u64
	mov	x21, x0
	ldr	w0, [x19, #76]
	mov	w1, #3
	bl	_div_u64
	mov	x1, x0
	mov	x0, x21
	bl	_min
	mov	x1, x0
	add	x3, sp, #8
	mov	x0, x20
	mov	x2, #0
	bl	_cyclecounter_cyc2ns
	mov	x20, x0
Lloh9:
	adrp	x8, _NSEC_PER_SEC@GOTPAGE
Lloh10:
	ldr	x8, [x8, _NSEC_PER_SEC@GOTPAGEOFF]
Lloh11:
	ldr	w8, [x8]
Lloh12:
	adrp	x9, _HZ@GOTPAGE
Lloh13:
	ldr	x9, [x9, _HZ@GOTPAGEOFF]
Lloh14:
	ldr	w9, [x9]
	sdiv	w1, w8, w9
	bl	_do_div
	str	x20, [x19, #48]
Lloh15:
	adrp	x8, _GFP_KERNEL@GOTPAGE
Lloh16:
	ldr	x8, [x8, _GFP_KERNEL@GOTPAGEOFF]
Lloh17:
	ldr	w0, [x8]
	bl	_get_zeroed_page
	str	x0, [x19, #8]
	cbz	x0, LBB0_3
; %bb.2:
	ldr	d0, [x19, #64]
	str	d0, [x0, #24]
	ldr	w8, [x19, #88]
	ldp	w10, w9, [x19, #72]
	stp	w8, w9, [x0, #16]
	ldr	w8, [x19, #60]
	stp	w8, w10, [x0, #8]
	ldr	x8, [x19, #48]
	str	x8, [x0]
LBB0_3:
	add	x0, x19, #56
Lloh18:
	adrp	x8, _mlx5_pps_out@GOTPAGE
Lloh19:
	ldr	x8, [x8, _mlx5_pps_out@GOTPAGEOFF]
Lloh20:
	ldr	w1, [x8]
	bl	_INIT_WORK
	add	x20, x19, #40
Lloh21:
	adrp	x8, _mlx5_timestamp_overflow@GOTPAGE
Lloh22:
	ldr	x8, [x8, _mlx5_timestamp_overflow@GOTPAGEOFF]
Lloh23:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_INIT_DELAYED_WORK
	ldr	x8, [x19, #48]
	cbz	x8, LBB0_6
; %bb.4:
	mov	x0, x20
	mov	w1, #0
	bl	_schedule_delayed_work
	b	LBB0_7
LBB0_5:
Lloh24:
	adrp	x1, l_.str@PAGE
Lloh25:
	add	x1, x1, l_.str@PAGEOFF
	mov	x0, x19
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #64
	b	_mlx5_core_warn
LBB0_6:
Lloh26:
	adrp	x1, l_.str.1@PAGE
Lloh27:
	add	x1, x1, l_.str.1@PAGEOFF
	mov	x0, x19
	bl	_mlx5_core_warn
LBB0_7:
	add	x20, x19, #16
Lloh28:
	adrp	x8, _mlx5_ptp_clock_info@GOTPAGE
Lloh29:
	ldr	x8, [x8, _mlx5_ptp_clock_info@GOTPAGEOFF]
Lloh30:
	ldr	x8, [x8]
	mov	x21, x19
	str	x8, [x21, #32]!
	mov	x0, x19
	bl	_MLX5_PPS_CAP
	cbz	x0, LBB0_9
; %bb.8:
	mov	x0, x19
	bl	_mlx5_get_pps_caps
LBB0_9:
	ldr	x8, [x21]
	cbz	x8, LBB0_11
; %bb.10:
	mov	x0, x20
	bl	_mlx5_init_pin_config
LBB0_11:
	ldr	x1, [x19]
	mov	x0, x21
	bl	_ptp_clock_register
	str	x0, [x19, #24]
	bl	_IS_ERR
	cbz	x0, LBB0_13
; %bb.12:
	ldr	x0, [x19, #24]
	bl	_PTR_ERR
                                        ; kill: def $w0 killed $w0 def $x0
	str	x0, [sp]
Lloh31:
	adrp	x1, l_.str.2@PAGE
Lloh32:
	add	x1, x1, l_.str.2@PAGEOFF
	mov	x0, x19
	bl	_mlx5_core_warn
	str	xzr, [x19, #24]
LBB0_13:
Lloh33:
	adrp	x8, _mlx5_pps_event@GOTPAGE
Lloh34:
	ldr	x8, [x8, _mlx5_pps_event@GOTPAGEOFF]
Lloh35:
	ldr	w1, [x8]
Lloh36:
	adrp	x8, _PPS_EVENT@GOTPAGE
Lloh37:
	ldr	x8, [x8, _PPS_EVENT@GOTPAGEOFF]
Lloh38:
	ldr	w2, [x8]
	mov	x0, x20
	bl	_MLX5_NB_INIT
	mov	x0, x19
	mov	x1, x20
	bl	_mlx5_eq_notifier_register
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #64
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpAdd	Lloh24, Lloh25
	.loh AdrpAdd	Lloh26, Lloh27
	.loh AdrpLdrGotLdr	Lloh28, Lloh29, Lloh30
	.loh AdrpAdd	Lloh31, Lloh32
	.loh AdrpLdrGotLdr	Lloh36, Lloh37, Lloh38
	.loh AdrpLdrGotLdr	Lloh33, Lloh34, Lloh35
	.cfi_endproc
                                        ; -- End function
	.comm	_device_frequency_khz,4,2       ; @device_frequency_khz
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"invalid device_frequency_khz, aborting HW clock init\n"

	.comm	_read_internal_timer,4,2        ; @read_internal_timer
	.comm	_MLX5_CYCLES_SHIFT,4,2          ; @MLX5_CYCLES_SHIFT
	.comm	_NSEC_PER_SEC,4,2               ; @NSEC_PER_SEC
	.comm	_HZ,4,2                         ; @HZ
	.comm	_GFP_KERNEL,4,2                 ; @GFP_KERNEL
	.comm	_mlx5_pps_out,4,2               ; @mlx5_pps_out
	.comm	_mlx5_timestamp_overflow,4,2    ; @mlx5_timestamp_overflow
l_.str.1:                               ; @.str.1
	.asciz	"invalid overflow period, overflow_work is not scheduled\n"

	.comm	_mlx5_ptp_clock_info,8,3        ; @mlx5_ptp_clock_info
l_.str.2:                               ; @.str.2
	.asciz	"ptp_clock_register failed %ld\n"

	.comm	_mlx5_pps_event,4,2             ; @mlx5_pps_event
	.comm	_PPS_EVENT,4,2                  ; @PPS_EVENT
.subsections_via_symbols
