	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_mt76x2_phy_tssi_compensate     ## -- Begin function mt76x2_phy_tssi_compensate
	.p2align	4, 0x90
_mt76x2_phy_tssi_compensate:            ## @mt76x2_phy_tssi_compensate
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	subq	$40, %rsp
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	24(%rdi), %r14
	pxor	%xmm0, %xmm0
	movdqa	%xmm0, -48(%rbp)
	movq	$0, -32(%rbp)
	cmpl	$0, 8(%rdi)
	je	LBB0_10
## %bb.1:
	movq	%rdi, %rbx
	cmpl	$0, (%rdi)
	je	LBB0_2
## %bb.3:
	movq	_CORE@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	$34, %esi
	callq	_MT_BBP
	movq	%rbx, %rdi
	movl	%eax, %esi
	callq	_mt76_rr
	movl	%eax, %r15d
	movl	$4, %edi
	callq	_BIT
	testl	%r15d, %eax
	jne	LBB0_10
## %bb.4:
	movl	$0, (%rbx)
	leaq	-56(%rbp), %rsi
	movq	%rbx, %rdi
	movq	%r14, %rdx
	callq	_mt76x2_get_power_info
	movl	4(%r14), %esi
	movq	%rbx, %rdi
	callq	_mt76x02_ext_pa_enabled
	testq	%rax, %rax
	je	LBB0_6
## %bb.5:
	movl	$1, -44(%rbp)
LBB0_6:
	movl	$1, %edi
	callq	_BIT
	movl	%eax, -48(%rbp)
	movq	-56(%rbp), %rax
	movdqu	(%rax), %xmm0
	pshufd	$78, %xmm0, %xmm0               ## xmm0 = xmm0[2,3,0,1]
	movdqu	%xmm0, -40(%rbp)
	leaq	-48(%rbp), %rsi
	movq	%rbx, %rdi
	callq	_mt76x2_mcu_tssi_comp
	cmpl	$0, -44(%rbp)
	jne	LBB0_10
## %bb.7:
	cmpl	$0, 4(%rbx)
	jne	LBB0_10
## %bb.8:
	cmpq	$0, 16(%rbx)
	jne	LBB0_10
## %bb.9:
	movl	$10000, %edi                    ## imm = 0x2710
	movl	$20000, %esi                    ## imm = 0x4E20
	callq	_usleep_range
	movq	_MCU_CAL_DPD@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	(%r14), %edx
	movq	%rbx, %rdi
	callq	_mt76x02_mcu_calibrate
	movl	$1, 4(%rbx)
	jmp	LBB0_10
LBB0_2:
	xorl	%edi, %edi
	callq	_BIT
	movl	%eax, -48(%rbp)
	leaq	-48(%rbp), %rsi
	movq	%rbx, %rdi
	callq	_mt76x2_mcu_tssi_comp
	movl	$1, (%rbx)
LBB0_10:
	addq	$40, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_CORE,4,2                       ## @CORE
	.comm	_MCU_CAL_DPD,4,2                ## @MCU_CAL_DPD
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_mt76x2_phy_tssi_compensate     ; -- Begin function mt76x2_phy_tssi_compensate
	.p2align	2
_mt76x2_phy_tssi_compensate:            ; @mt76x2_phy_tssi_compensate
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #80
	.cfi_def_cfa_offset 80
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	ldr	x20, [x0, #24]
	stp	xzr, xzr, [sp]
	str	xzr, [sp, #16]
	ldr	w8, [x0, #8]
	cbz	w8, LBB0_10
; %bb.1:
	mov	x19, x0
	ldr	w8, [x0]
	cbz	w8, LBB0_9
; %bb.2:
Lloh0:
	adrp	x8, _CORE@GOTPAGE
Lloh1:
	ldr	x8, [x8, _CORE@GOTPAGEOFF]
Lloh2:
	ldr	w0, [x8]
	mov	w1, #34
	bl	_MT_BBP
	mov	x1, x0
	mov	x0, x19
	bl	_mt76_rr
	mov	x21, x0
	mov	w0, #4
	bl	_BIT
	tst	w0, w21
	b.ne	LBB0_10
; %bb.3:
	str	wzr, [x19]
	add	x1, sp, #24
	mov	x0, x19
	mov	x2, x20
	bl	_mt76x2_get_power_info
	ldr	w1, [x20, #4]
	mov	x0, x19
	bl	_mt76x02_ext_pa_enabled
	cbz	x0, LBB0_5
; %bb.4:
	mov	w8, #1
	str	w8, [sp, #4]
LBB0_5:
	mov	w0, #1
	bl	_BIT
	str	w0, [sp]
	ldr	x8, [sp, #24]
	ldr	q0, [x8]
	ext.16b	v0, v0, v0, #8
	stur	q0, [sp, #8]
	mov	x1, sp
	mov	x0, x19
	bl	_mt76x2_mcu_tssi_comp
	ldr	w8, [sp, #4]
	cbnz	w8, LBB0_10
; %bb.6:
	ldr	w8, [x19, #4]
	cbnz	w8, LBB0_10
; %bb.7:
	ldr	x8, [x19, #16]
	cbnz	x8, LBB0_10
; %bb.8:
	mov	w0, #10000
	mov	w1, #20000
	bl	_usleep_range
Lloh3:
	adrp	x8, _MCU_CAL_DPD@GOTPAGE
Lloh4:
	ldr	x8, [x8, _MCU_CAL_DPD@GOTPAGEOFF]
Lloh5:
	ldr	w1, [x8]
	ldr	w2, [x20]
	mov	x0, x19
	bl	_mt76x02_mcu_calibrate
	mov	w8, #1
	str	w8, [x19, #4]
	b	LBB0_10
LBB0_9:
	mov	w0, #0
	bl	_BIT
	str	w0, [sp]
	mov	x1, sp
	mov	x0, x19
	bl	_mt76x2_mcu_tssi_comp
	mov	w8, #1
	str	w8, [x19]
LBB0_10:
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	add	sp, sp, #80
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.cfi_endproc
                                        ; -- End function
	.comm	_CORE,4,2                       ; @CORE
	.comm	_MCU_CAL_DPD,4,2                ; @MCU_CAL_DPD
.subsections_via_symbols
