	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function advk_pci_bridge_emul_pcie_conf_read
_advk_pci_bridge_emul_pcie_conf_read:   ## @advk_pci_bridge_emul_pcie_conf_read
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
                                        ## kill: def $esi killed $esi def $rsi
	leal	-128(%rsi), %eax
	cmpl	$7, %eax
	ja	LBB0_1
## %bb.2:
	movq	%rdx, %r14
	movq	(%rdi), %rbx
	leaq	LJTI0_0(%rip), %rcx
	movslq	(%rcx,%rax,4), %rax
	addq	%rcx, %rax
	jmpq	*%rax
LBB0_7:
	movq	_PCIE_CORE_PCIEXP_CAP@GOTPCREL(%rip), %rax
	addl	(%rax), %esi
	movq	%rbx, %rdi
                                        ## kill: def $esi killed $esi killed $rsi
	callq	_advk_readl
LBB0_8:
	movl	%eax, (%r14)
	movq	_PCI_BRIDGE_EMUL_HANDLED@GOTPCREL(%rip), %rax
LBB0_9:
	movl	(%rax), %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_4:
	movq	_PCIE_ISR0_MASK_REG@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_advk_readl
	movq	_PCIE_MSG_PM_PME_MASK@GOTPCREL(%rip), %rcx
	andl	(%rcx), %eax
	je	LBB0_8
## %bb.5:
	movq	_PCI_EXP_RTCTL_PMEIE@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	jmp	LBB0_8
LBB0_1:
	movq	_PCI_BRIDGE_EMUL_NOT_HANDLED@GOTPCREL(%rip), %rax
	jmp	LBB0_9
LBB0_3:
	movq	_PCI_EXP_SLTSTA_PDS@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	shll	$16, %eax
	jmp	LBB0_8
LBB0_6:
	movq	_PCIE_ISR0_REG@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_advk_readl
	movl	%eax, %r15d
	movq	_PCIE_MSG_LOG_REG@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_advk_readl
	movq	_PCIE_MSG_PM_PME_MASK@GOTPCREL(%rip), %rcx
	andl	(%rcx), %r15d
	shll	$16, %r15d
	sarl	$16, %eax
	orl	%r15d, %eax
	jmp	LBB0_8
	.cfi_endproc
	.p2align	2, 0x90
	.data_region jt32
.set L0_0_set_3, LBB0_3-LJTI0_0
.set L0_0_set_6, LBB0_6-LJTI0_0
.set L0_0_set_4, LBB0_4-LJTI0_0
.set L0_0_set_7, LBB0_7-LJTI0_0
LJTI0_0:
	.long	L0_0_set_3
	.long	L0_0_set_6
	.long	L0_0_set_4
	.long	L0_0_set_7
	.long	L0_0_set_7
	.long	L0_0_set_7
	.long	L0_0_set_7
	.long	L0_0_set_7
	.end_data_region
                                        ## -- End function
	.comm	_PCI_EXP_SLTSTA_PDS,4,2         ## @PCI_EXP_SLTSTA_PDS
	.comm	_PCI_BRIDGE_EMUL_HANDLED,4,2    ## @PCI_BRIDGE_EMUL_HANDLED
	.comm	_PCIE_ISR0_MASK_REG,4,2         ## @PCIE_ISR0_MASK_REG
	.comm	_PCIE_MSG_PM_PME_MASK,4,2       ## @PCIE_MSG_PM_PME_MASK
	.comm	_PCI_EXP_RTCTL_PMEIE,4,2        ## @PCI_EXP_RTCTL_PMEIE
	.comm	_PCIE_ISR0_REG,4,2              ## @PCIE_ISR0_REG
	.comm	_PCIE_MSG_LOG_REG,4,2           ## @PCIE_MSG_LOG_REG
	.comm	_PCIE_CORE_PCIEXP_CAP,4,2       ## @PCIE_CORE_PCIEXP_CAP
	.comm	_PCI_BRIDGE_EMUL_NOT_HANDLED,4,2 ## @PCI_BRIDGE_EMUL_NOT_HANDLED
	.no_dead_strip	_advk_pci_bridge_emul_pcie_conf_read
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function advk_pci_bridge_emul_pcie_conf_read
_advk_pci_bridge_emul_pcie_conf_read:   ; @advk_pci_bridge_emul_pcie_conf_read
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	sub	w8, w1, #128
	cmp	w8, #7
	b.hi	LBB0_5
; %bb.1:
	mov	x19, x2
	ldr	x20, [x0]
Lloh0:
	adrp	x9, lJTI0_0@PAGE
Lloh1:
	add	x9, x9, lJTI0_0@PAGEOFF
	adr	x10, LBB0_2
	ldrb	w11, [x9, x8]
	add	x10, x10, x11, lsl #2
	br	x10
LBB0_2:
Lloh2:
	adrp	x8, _PCIE_CORE_PCIEXP_CAP@GOTPAGE
Lloh3:
	ldr	x8, [x8, _PCIE_CORE_PCIEXP_CAP@GOTPAGEOFF]
Lloh4:
	ldr	w8, [x8]
	add	w1, w8, w1
	mov	x0, x20
	bl	_advk_readl
LBB0_3:
	str	w0, [x19]
Lloh5:
	adrp	x8, _PCI_BRIDGE_EMUL_HANDLED@GOTPAGE
Lloh6:
	ldr	x8, [x8, _PCI_BRIDGE_EMUL_HANDLED@GOTPAGEOFF]
LBB0_4:
	ldr	w0, [x8]
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
LBB0_5:
Lloh7:
	adrp	x8, _PCI_BRIDGE_EMUL_NOT_HANDLED@GOTPAGE
Lloh8:
	ldr	x8, [x8, _PCI_BRIDGE_EMUL_NOT_HANDLED@GOTPAGEOFF]
	b	LBB0_4
LBB0_6:
Lloh9:
	adrp	x8, _PCI_EXP_SLTSTA_PDS@GOTPAGE
Lloh10:
	ldr	x8, [x8, _PCI_EXP_SLTSTA_PDS@GOTPAGEOFF]
Lloh11:
	ldr	w8, [x8]
	lsl	w0, w8, #16
	b	LBB0_3
LBB0_7:
Lloh12:
	adrp	x8, _PCIE_ISR0_REG@GOTPAGE
Lloh13:
	ldr	x8, [x8, _PCIE_ISR0_REG@GOTPAGEOFF]
Lloh14:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_advk_readl
	mov	x21, x0
Lloh15:
	adrp	x8, _PCIE_MSG_LOG_REG@GOTPAGE
Lloh16:
	ldr	x8, [x8, _PCIE_MSG_LOG_REG@GOTPAGEOFF]
Lloh17:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_advk_readl
Lloh18:
	adrp	x8, _PCIE_MSG_PM_PME_MASK@GOTPAGE
Lloh19:
	ldr	x8, [x8, _PCIE_MSG_PM_PME_MASK@GOTPAGEOFF]
Lloh20:
	ldr	w8, [x8]
	and	w8, w8, w21
	lsl	w8, w8, #16
	orr	w0, w8, w0, asr #16
	b	LBB0_3
LBB0_8:
Lloh21:
	adrp	x8, _PCIE_ISR0_MASK_REG@GOTPAGE
Lloh22:
	ldr	x8, [x8, _PCIE_ISR0_MASK_REG@GOTPAGEOFF]
Lloh23:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_advk_readl
Lloh24:
	adrp	x8, _PCIE_MSG_PM_PME_MASK@GOTPAGE
Lloh25:
	ldr	x8, [x8, _PCIE_MSG_PM_PME_MASK@GOTPAGEOFF]
Lloh26:
	ldr	w8, [x8]
Lloh27:
	adrp	x9, _PCI_EXP_RTCTL_PMEIE@GOTPAGE
Lloh28:
	ldr	x9, [x9, _PCI_EXP_RTCTL_PMEIE@GOTPAGEOFF]
Lloh29:
	ldr	w9, [x9]
	tst	w8, w0
	csel	w0, wzr, w9, eq
	b	LBB0_3
	.loh AdrpAdd	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGot	Lloh5, Lloh6
	.loh AdrpLdrGot	Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh27, Lloh28, Lloh29
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.cfi_endproc
	.section	__TEXT,__const
lJTI0_0:
	.byte	(LBB0_6-LBB0_2)>>2
	.byte	(LBB0_7-LBB0_2)>>2
	.byte	(LBB0_8-LBB0_2)>>2
	.byte	(LBB0_2-LBB0_2)>>2
	.byte	(LBB0_2-LBB0_2)>>2
	.byte	(LBB0_2-LBB0_2)>>2
	.byte	(LBB0_2-LBB0_2)>>2
	.byte	(LBB0_2-LBB0_2)>>2
                                        ; -- End function
	.comm	_PCI_EXP_SLTSTA_PDS,4,2         ; @PCI_EXP_SLTSTA_PDS
	.comm	_PCI_BRIDGE_EMUL_HANDLED,4,2    ; @PCI_BRIDGE_EMUL_HANDLED
	.comm	_PCIE_ISR0_MASK_REG,4,2         ; @PCIE_ISR0_MASK_REG
	.comm	_PCIE_MSG_PM_PME_MASK,4,2       ; @PCIE_MSG_PM_PME_MASK
	.comm	_PCI_EXP_RTCTL_PMEIE,4,2        ; @PCI_EXP_RTCTL_PMEIE
	.comm	_PCIE_ISR0_REG,4,2              ; @PCIE_ISR0_REG
	.comm	_PCIE_MSG_LOG_REG,4,2           ; @PCIE_MSG_LOG_REG
	.comm	_PCIE_CORE_PCIEXP_CAP,4,2       ; @PCIE_CORE_PCIEXP_CAP
	.comm	_PCI_BRIDGE_EMUL_NOT_HANDLED,4,2 ; @PCI_BRIDGE_EMUL_NOT_HANDLED
	.no_dead_strip	_advk_pci_bridge_emul_pcie_conf_read
.subsections_via_symbols
