	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_mt76x2_phy_set_txpower         ## -- Begin function mt76x2_phy_set_txpower
	.p2align	4, 0x90
_mt76x2_phy_set_txpower:                ## @mt76x2_phy_set_txpower
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	subq	$32, %rsp
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r14
	movl	32(%rdi), %r12d
	movq	40(%rdi), %r15
	movl	$0, -40(%rbp)
	leaq	-64(%rbp), %rsi
	movq	%r15, %rdx
	callq	_mt76x2_get_power_info
	movq	_NL80211_CHAN_WIDTH_40@GOTPCREL(%rip), %rax
	cmpl	(%rax), %r12d
	jne	LBB0_2
## %bb.1:
	movl	-64(%rbp), %ebx
	jmp	LBB0_4
LBB0_2:
	movq	_NL80211_CHAN_WIDTH_80@GOTPCREL(%rip), %rax
	xorl	%ebx, %ebx
	cmpl	(%rax), %r12d
	jne	LBB0_4
## %bb.3:
	movl	-60(%rbp), %ebx
LBB0_4:
	leaq	-40(%rbp), %r12
	movq	%r14, %rdi
	movq	%r12, %rsi
	movq	%r15, %rdx
	callq	_mt76x2_get_rate_power
	addl	-56(%rbp), %ebx
	movq	%r12, %rdi
	movl	%ebx, %esi
	callq	_mt76x02_add_rate_power_offset
	movl	24(%r14), %esi
	movq	%r12, %rdi
	callq	_mt76x02_limit_rate_power
	movq	%r12, %rdi
	callq	_mt76x02_get_max_rate_power
	movl	%eax, 20(%r14)
	movq	%r12, %rdi
	callq	_mt76x2_get_min_rate_power
	movl	%eax, %r12d
	movl	%eax, %ebx
	subl	-56(%rbp), %ebx
	movq	-48(%rbp), %rax
	movl	(%rax), %r15d
	addl	%ebx, %r15d
	addl	4(%rax), %r15d
	addl	8(%rax), %ebx
	addl	12(%rax), %ebx
	movl	%r15d, %edi
	movl	%ebx, %esi
	callq	_min
	testl	%eax, %eax
	js	LBB0_5
## %bb.6:
	cmpl	$48, %eax
	jb	LBB0_8
## %bb.7:
	subl	%eax, %r12d
	addl	$47, %r12d
	movl	$47, %ebx
	movl	$47, %r15d
	jmp	LBB0_8
LBB0_5:
	subl	%eax, %r12d
	subl	%eax, %r15d
	subl	%eax, %ebx
LBB0_8:
	negl	%r12d
	leaq	-40(%rbp), %rdi
	movl	%r12d, %esi
	callq	_mt76x02_add_rate_power_offset
	movl	-56(%rbp), %eax
	movl	%eax, (%r14)
	movq	-48(%rbp), %rax
	movl	%r15d, %ecx
	subl	(%rax), %ecx
	movq	8(%r14), %rdx
	movl	%ecx, (%rdx)
	movl	%ebx, %ecx
	subl	(%rax), %ecx
	movl	%ecx, 4(%rdx)
	movl	-40(%rbp), %eax
	movl	%eax, 16(%r14)
	movq	%r14, %rdi
	movl	%r15d, %esi
	movl	%ebx, %edx
	callq	_mt76x02_phy_set_txpower
	addq	$32, %rsp
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_NL80211_CHAN_WIDTH_40,4,2      ## @NL80211_CHAN_WIDTH_40
	.comm	_NL80211_CHAN_WIDTH_80,4,2      ## @NL80211_CHAN_WIDTH_80
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_mt76x2_phy_set_txpower         ; -- Begin function mt76x2_phy_set_txpower
	.p2align	2
_mt76x2_phy_set_txpower:                ; @mt76x2_phy_set_txpower
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #80
	.cfi_def_cfa_offset 80
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x0
	ldr	w21, [x0, #32]
	ldr	x20, [x0, #40]
	str	wzr, [sp]
	add	x1, sp, #8
	mov	x2, x20
	bl	_mt76x2_get_power_info
Lloh0:
	adrp	x8, _NL80211_CHAN_WIDTH_40@GOTPAGE
Lloh1:
	ldr	x8, [x8, _NL80211_CHAN_WIDTH_40@GOTPAGEOFF]
Lloh2:
	ldr	w8, [x8]
	cmp	w21, w8
	b.ne	LBB0_2
; %bb.1:
	ldr	w21, [sp, #8]
	b	LBB0_5
LBB0_2:
Lloh3:
	adrp	x8, _NL80211_CHAN_WIDTH_80@GOTPAGE
Lloh4:
	ldr	x8, [x8, _NL80211_CHAN_WIDTH_80@GOTPAGEOFF]
Lloh5:
	ldr	w8, [x8]
	cmp	w21, w8
	b.ne	LBB0_4
; %bb.3:
	ldr	w21, [sp, #12]
	b	LBB0_5
LBB0_4:
	mov	w21, #0
LBB0_5:
	mov	x1, sp
	mov	x0, x19
	mov	x2, x20
	bl	_mt76x2_get_rate_power
	ldr	w8, [sp, #16]
	add	w1, w8, w21
	mov	x0, sp
	bl	_mt76x02_add_rate_power_offset
	ldr	w1, [x19, #24]
	mov	x0, sp
	bl	_mt76x02_limit_rate_power
	mov	x0, sp
	bl	_mt76x02_get_max_rate_power
	str	w0, [x19, #20]
	mov	x0, sp
	bl	_mt76x2_get_min_rate_power
	mov	x20, x0
	ldr	w8, [sp, #16]
	ldr	x9, [sp, #24]
	ldp	w10, w11, [x9]
	sub	w8, w0, w8
	add	w10, w10, w8
	add	w21, w10, w11
	ldp	w10, w9, [x9, #8]
	add	w8, w10, w8
	add	w22, w8, w9
	mov	x0, x21
	mov	x1, x22
	bl	_min
	sub	w8, w20, w0
	add	w9, w8, #47
	mov	w10, #47
	cmp	w0, #48
	csel	w11, w22, w10, lo
	csel	w9, w20, w9, lo
	csel	w10, w21, w10, lo
	sub	w12, w21, w0
	sub	w13, w22, w0
	tst	w0, #0x80000000
	csel	w20, w11, w13, eq
	csel	w8, w9, w8, eq
	csel	w21, w10, w12, eq
	neg	w1, w8
	mov	x0, sp
	bl	_mt76x02_add_rate_power_offset
	ldr	w8, [sp, #16]
	str	w8, [x19]
	ldr	x8, [sp, #24]
	ldr	w9, [x8]
	sub	w9, w21, w9
	ldr	x10, [x19, #8]
	str	w9, [x10]
	ldr	w8, [x8]
	sub	w8, w20, w8
	str	w8, [x10, #4]
	ldr	w8, [sp]
	str	w8, [x19, #16]
	mov	x0, x19
	mov	x1, x21
	mov	x2, x20
	bl	_mt76x02_phy_set_txpower
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	add	sp, sp, #80
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.cfi_endproc
                                        ; -- End function
	.comm	_NL80211_CHAN_WIDTH_40,4,2      ; @NL80211_CHAN_WIDTH_40
	.comm	_NL80211_CHAN_WIDTH_80,4,2      ; @NL80211_CHAN_WIDTH_80
.subsections_via_symbols
