	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function tegra124_pcie_phy_power_on
_tegra124_pcie_phy_power_on:            ## @tegra124_pcie_phy_power_on
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$24, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	callq	_phy_get_drvdata
	movq	%rax, -56(%rbp)                 ## 8-byte Spill
	movq	8(%rax), %rax
	movq	(%rax), %r12
	movq	_ETIMEDOUT@GOTPCREL(%rip), %rax
	xorl	%ecx, %ecx
	subl	(%rax), %ecx
	movl	%ecx, -44(%rbp)                 ## 4-byte Spill
	movq	_XUSB_PADCTL_IOPHY_PLL_P0_CTL1@GOTPCREL(%rip), %r13
	movl	(%r13), %esi
	movq	%r12, %rdi
	callq	_padctl_readl
	movq	_XUSB_PADCTL_IOPHY_PLL_P0_CTL1_REFCLK_SEL_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	notl	%esi
	andl	%eax, %esi
	movl	(%r13), %edx
	movq	%r12, %rdi
	callq	_padctl_writel
	movq	_XUSB_PADCTL_IOPHY_PLL_P0_CTL2@GOTPCREL(%rip), %rbx
	movl	(%rbx), %esi
	movq	%r12, %rdi
	callq	_padctl_readl
	movq	_XUSB_PADCTL_IOPHY_PLL_P0_CTL2_REFCLKBUF_EN@GOTPCREL(%rip), %rcx
	movq	_XUSB_PADCTL_IOPHY_PLL_P0_CTL2_TXCLKREF_EN@GOTPCREL(%rip), %rdx
	orl	(%rcx), %eax
	orl	(%rdx), %eax
	movq	_XUSB_PADCTL_IOPHY_PLL_P0_CTL2_TXCLKREF_SEL@GOTPCREL(%rip), %rcx
	orl	(%rcx), %eax
	movl	(%rbx), %edx
	movq	%r12, %rdi
	movl	%eax, %esi
	callq	_padctl_writel
	movl	(%r13), %esi
	movq	%r12, %rdi
	callq	_padctl_readl
	movq	_XUSB_PADCTL_IOPHY_PLL_P0_CTL1_PLL_RST@GOTPCREL(%rip), %rcx
	orl	(%rcx), %eax
	movl	(%r13), %edx
	movq	%r12, %rdi
	movl	%eax, %esi
	callq	_padctl_writel
	movq	_jiffies@GOTPCREL(%rip), %r15
	movq	(%r15), %r14
	movl	$50, %edi
	callq	_msecs_to_jiffies
	movq	%rax, %rbx
	addq	%r14, %rbx
	movq	(%r15), %rdi
	movq	%rbx, %rsi
	callq	_time_before
	testq	%rax, %rax
	je	LBB0_5
## %bb.1:
	movq	_XUSB_PADCTL_IOPHY_PLL_P0_CTL1_PLL0_LOCKDET@GOTPCREL(%rip), %r14
	.p2align	4, 0x90
LBB0_2:                                 ## =>This Inner Loop Header: Depth=1
	movl	(%r13), %esi
	movq	%r12, %rdi
	callq	_padctl_readl
	testl	%eax, (%r14)
	jne	LBB0_3
## %bb.4:                               ##   in Loop: Header=BB0_2 Depth=1
	movl	$100, %edi
	movl	$200, %esi
	callq	_usleep_range
	movq	(%r15), %rdi
	movq	%rbx, %rsi
	callq	_time_before
	testq	%rax, %rax
	jne	LBB0_2
LBB0_5:
	movl	-44(%rbp), %r15d                ## 4-byte Reload
	jmp	LBB0_6
LBB0_3:
	xorl	%r15d, %r15d
LBB0_6:
	movq	-56(%rbp), %r13                 ## 8-byte Reload
	movq	_XUSB_PADCTL_USB3_PAD_MUX@GOTPCREL(%rip), %r14
	movl	(%r14), %esi
	movq	%r12, %rdi
	callq	_padctl_readl
	movl	%eax, %ebx
	movl	(%r13), %edi
	callq	_XUSB_PADCTL_USB3_PAD_MUX_PCIE_IDDQ_DISABLE
	orl	%eax, %ebx
	movl	(%r14), %edx
	movq	%r12, %rdi
	movl	%ebx, %esi
	callq	_padctl_writel
	movl	%r15d, %eax
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_ETIMEDOUT,4,2                  ## @ETIMEDOUT
	.comm	_XUSB_PADCTL_IOPHY_PLL_P0_CTL1,4,2 ## @XUSB_PADCTL_IOPHY_PLL_P0_CTL1
	.comm	_XUSB_PADCTL_IOPHY_PLL_P0_CTL1_REFCLK_SEL_MASK,4,2 ## @XUSB_PADCTL_IOPHY_PLL_P0_CTL1_REFCLK_SEL_MASK
	.comm	_XUSB_PADCTL_IOPHY_PLL_P0_CTL2,4,2 ## @XUSB_PADCTL_IOPHY_PLL_P0_CTL2
	.comm	_XUSB_PADCTL_IOPHY_PLL_P0_CTL2_REFCLKBUF_EN,4,2 ## @XUSB_PADCTL_IOPHY_PLL_P0_CTL2_REFCLKBUF_EN
	.comm	_XUSB_PADCTL_IOPHY_PLL_P0_CTL2_TXCLKREF_EN,4,2 ## @XUSB_PADCTL_IOPHY_PLL_P0_CTL2_TXCLKREF_EN
	.comm	_XUSB_PADCTL_IOPHY_PLL_P0_CTL2_TXCLKREF_SEL,4,2 ## @XUSB_PADCTL_IOPHY_PLL_P0_CTL2_TXCLKREF_SEL
	.comm	_XUSB_PADCTL_IOPHY_PLL_P0_CTL1_PLL_RST,4,2 ## @XUSB_PADCTL_IOPHY_PLL_P0_CTL1_PLL_RST
	.comm	_jiffies,8,3                    ## @jiffies
	.comm	_XUSB_PADCTL_IOPHY_PLL_P0_CTL1_PLL0_LOCKDET,4,2 ## @XUSB_PADCTL_IOPHY_PLL_P0_CTL1_PLL0_LOCKDET
	.comm	_XUSB_PADCTL_USB3_PAD_MUX,4,2   ## @XUSB_PADCTL_USB3_PAD_MUX
	.no_dead_strip	_tegra124_pcie_phy_power_on
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function tegra124_pcie_phy_power_on
_tegra124_pcie_phy_power_on:            ; @tegra124_pcie_phy_power_on
	.cfi_startproc
; %bb.0:
	stp	x26, x25, [sp, #-80]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	bl	_phy_get_drvdata
	mov	x21, x0
	ldr	x8, [x0, #8]
Lloh0:
	adrp	x9, _ETIMEDOUT@GOTPAGE
Lloh1:
	ldr	x9, [x9, _ETIMEDOUT@GOTPAGEOFF]
	ldr	x19, [x8]
Lloh2:
	ldr	w8, [x9]
	neg	w20, w8
Lloh3:
	adrp	x23, _XUSB_PADCTL_IOPHY_PLL_P0_CTL1@GOTPAGE
Lloh4:
	ldr	x23, [x23, _XUSB_PADCTL_IOPHY_PLL_P0_CTL1@GOTPAGEOFF]
	ldr	w1, [x23]
	mov	x0, x19
	bl	_padctl_readl
Lloh5:
	adrp	x8, _XUSB_PADCTL_IOPHY_PLL_P0_CTL1_REFCLK_SEL_MASK@GOTPAGE
Lloh6:
	ldr	x8, [x8, _XUSB_PADCTL_IOPHY_PLL_P0_CTL1_REFCLK_SEL_MASK@GOTPAGEOFF]
Lloh7:
	ldr	w8, [x8]
	bic	w1, w0, w8
	ldr	w2, [x23]
	mov	x0, x19
	bl	_padctl_writel
Lloh8:
	adrp	x22, _XUSB_PADCTL_IOPHY_PLL_P0_CTL2@GOTPAGE
Lloh9:
	ldr	x22, [x22, _XUSB_PADCTL_IOPHY_PLL_P0_CTL2@GOTPAGEOFF]
	ldr	w1, [x22]
	mov	x0, x19
	bl	_padctl_readl
Lloh10:
	adrp	x8, _XUSB_PADCTL_IOPHY_PLL_P0_CTL2_REFCLKBUF_EN@GOTPAGE
Lloh11:
	ldr	x8, [x8, _XUSB_PADCTL_IOPHY_PLL_P0_CTL2_REFCLKBUF_EN@GOTPAGEOFF]
Lloh12:
	ldr	w8, [x8]
Lloh13:
	adrp	x9, _XUSB_PADCTL_IOPHY_PLL_P0_CTL2_TXCLKREF_EN@GOTPAGE
Lloh14:
	ldr	x9, [x9, _XUSB_PADCTL_IOPHY_PLL_P0_CTL2_TXCLKREF_EN@GOTPAGEOFF]
Lloh15:
	adrp	x10, _XUSB_PADCTL_IOPHY_PLL_P0_CTL2_TXCLKREF_SEL@GOTPAGE
Lloh16:
	ldr	x10, [x10, _XUSB_PADCTL_IOPHY_PLL_P0_CTL2_TXCLKREF_SEL@GOTPAGEOFF]
Lloh17:
	ldr	w9, [x9]
Lloh18:
	ldr	w10, [x10]
	orr	w8, w8, w0
	orr	w8, w8, w9
	orr	w1, w8, w10
	ldr	w2, [x22]
	mov	x0, x19
	bl	_padctl_writel
	ldr	w1, [x23]
	mov	x0, x19
	bl	_padctl_readl
Lloh19:
	adrp	x8, _XUSB_PADCTL_IOPHY_PLL_P0_CTL1_PLL_RST@GOTPAGE
Lloh20:
	ldr	x8, [x8, _XUSB_PADCTL_IOPHY_PLL_P0_CTL1_PLL_RST@GOTPAGEOFF]
Lloh21:
	ldr	w8, [x8]
	orr	w1, w8, w0
	ldr	w2, [x23]
	mov	x0, x19
	bl	_padctl_writel
Lloh22:
	adrp	x24, _jiffies@GOTPAGE
Lloh23:
	ldr	x24, [x24, _jiffies@GOTPAGEOFF]
	ldr	x22, [x24]
	mov	w0, #50
	bl	_msecs_to_jiffies
	add	x22, x0, x22
	ldr	x0, [x24]
	mov	x1, x22
	bl	_time_before
	cbz	x0, LBB0_5
; %bb.1:
Lloh24:
	adrp	x25, _XUSB_PADCTL_IOPHY_PLL_P0_CTL1_PLL0_LOCKDET@GOTPAGE
Lloh25:
	ldr	x25, [x25, _XUSB_PADCTL_IOPHY_PLL_P0_CTL1_PLL0_LOCKDET@GOTPAGEOFF]
LBB0_2:                                 ; =>This Inner Loop Header: Depth=1
	ldr	w1, [x23]
	mov	x0, x19
	bl	_padctl_readl
	ldr	w8, [x25]
	tst	w8, w0
	b.ne	LBB0_4
; %bb.3:                                ;   in Loop: Header=BB0_2 Depth=1
	mov	w0, #100
	mov	w1, #200
	bl	_usleep_range
	ldr	x0, [x24]
	mov	x1, x22
	bl	_time_before
	cbnz	x0, LBB0_2
	b	LBB0_5
LBB0_4:
	mov	w20, #0
LBB0_5:
Lloh26:
	adrp	x23, _XUSB_PADCTL_USB3_PAD_MUX@GOTPAGE
Lloh27:
	ldr	x23, [x23, _XUSB_PADCTL_USB3_PAD_MUX@GOTPAGEOFF]
	ldr	w1, [x23]
	mov	x0, x19
	bl	_padctl_readl
	mov	x22, x0
	ldr	w0, [x21]
	bl	_XUSB_PADCTL_USB3_PAD_MUX_PCIE_IDDQ_DISABLE
	orr	w1, w0, w22
	ldr	w2, [x23]
	mov	x0, x19
	bl	_padctl_writel
	mov	x0, x20
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp], #80             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGot	Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh19, Lloh20, Lloh21
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh18
	.loh AdrpLdrGotLdr	Lloh13, Lloh14, Lloh17
	.loh AdrpLdrGotLdr	Lloh10, Lloh11, Lloh12
	.loh AdrpLdrGot	Lloh8, Lloh9
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGot	Lloh3, Lloh4
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGot	Lloh24, Lloh25
	.loh AdrpLdrGot	Lloh26, Lloh27
	.cfi_endproc
                                        ; -- End function
	.comm	_ETIMEDOUT,4,2                  ; @ETIMEDOUT
	.comm	_XUSB_PADCTL_IOPHY_PLL_P0_CTL1,4,2 ; @XUSB_PADCTL_IOPHY_PLL_P0_CTL1
	.comm	_XUSB_PADCTL_IOPHY_PLL_P0_CTL1_REFCLK_SEL_MASK,4,2 ; @XUSB_PADCTL_IOPHY_PLL_P0_CTL1_REFCLK_SEL_MASK
	.comm	_XUSB_PADCTL_IOPHY_PLL_P0_CTL2,4,2 ; @XUSB_PADCTL_IOPHY_PLL_P0_CTL2
	.comm	_XUSB_PADCTL_IOPHY_PLL_P0_CTL2_REFCLKBUF_EN,4,2 ; @XUSB_PADCTL_IOPHY_PLL_P0_CTL2_REFCLKBUF_EN
	.comm	_XUSB_PADCTL_IOPHY_PLL_P0_CTL2_TXCLKREF_EN,4,2 ; @XUSB_PADCTL_IOPHY_PLL_P0_CTL2_TXCLKREF_EN
	.comm	_XUSB_PADCTL_IOPHY_PLL_P0_CTL2_TXCLKREF_SEL,4,2 ; @XUSB_PADCTL_IOPHY_PLL_P0_CTL2_TXCLKREF_SEL
	.comm	_XUSB_PADCTL_IOPHY_PLL_P0_CTL1_PLL_RST,4,2 ; @XUSB_PADCTL_IOPHY_PLL_P0_CTL1_PLL_RST
	.comm	_jiffies,8,3                    ; @jiffies
	.comm	_XUSB_PADCTL_IOPHY_PLL_P0_CTL1_PLL0_LOCKDET,4,2 ; @XUSB_PADCTL_IOPHY_PLL_P0_CTL1_PLL0_LOCKDET
	.comm	_XUSB_PADCTL_USB3_PAD_MUX,4,2   ; @XUSB_PADCTL_USB3_PAD_MUX
	.no_dead_strip	_tegra124_pcie_phy_power_on
.subsections_via_symbols
