	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function mwifiex_pcie_process_cmd_complete
_mwifiex_pcie_process_cmd_complete:     ## @mwifiex_pcie_process_cmd_complete
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r12
	movq	32(%rdi), %r13
	movq	(%r13), %r14
	movq	24(%r13), %r15
	movq	_CMD@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	leaq	L_.str(%rip), %rdx
	callq	_mwifiex_dbg
	cmpq	$0, 16(%r12)
	je	LBB0_2
## %bb.1:
	movq	_PCI_DMA_FROMDEVICE@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r12, %rdi
	movq	%r14, %rsi
	callq	_mwifiex_unmap_pci_memory
	jmp	LBB0_3
LBB0_2:
	movq	%r15, %rbx
	movl	8(%r13), %r15d
	movq	%r14, %rdi
	callq	_MWIFIEX_SKB_DMA_ADDR
	movq	_MWIFIEX_UPLD_SIZE@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rdx
	movq	_PCI_DMA_FROMDEVICE@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	movl	%r15d, %edi
	movq	%rbx, %r15
	movl	%eax, %esi
	callq	_pci_dma_sync_single_for_cpu
LBB0_3:
	movq	16(%r13), %rsi
	testq	%rsi, %rsi
	je	LBB0_5
## %bb.4:
	movq	_PCI_DMA_TODEVICE@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r12, %rdi
	callq	_mwifiex_unmap_pci_memory
	movq	16(%r13), %rdi
	callq	_dev_kfree_skb_any
	movq	$0, 16(%r13)
LBB0_5:
	movl	8(%r14), %edi
	callq	_get_unaligned_le16
	movl	%eax, %ebx
	movq	_MWIFIEX_UPLD_SIZE@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	subq	(%r14), %rsi
	movq	%r14, %rdi
	callq	_skb_put
	movq	%r14, %rdi
	movl	%ebx, %esi
	callq	_skb_trim
	cmpq	$0, 16(%r12)
	je	LBB0_6
## %bb.36:
	movq	%r12, %rdi
	callq	_mwifiex_pcie_ok_to_access_hw
	testq	%rax, %rax
	je	LBB0_34
## %bb.37:
	movl	24(%r12), %esi
	movq	%r14, %rdi
	callq	_skb_pull
	movq	16(%r12), %rax
	movq	%r14, (%rax)
	movl	$1, 8(%r12)
	movq	$0, (%r13)
	movl	4(%r15), %esi
	movq	%r12, %rdi
	xorl	%edx, %edx
	callq	_mwifiex_write_reg
	testq	%rax, %rax
	je	LBB0_39
## %bb.38:
	movq	_ERROR@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	leaq	L_.str.3(%rip), %rdx
	jmp	LBB0_9
LBB0_6:
	movq	(%r12), %rax
	movq	_PS_STATE_SLEEP_CFM@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jne	LBB0_32
## %bb.7:
	movq	%r15, -48(%rbp)                 ## 8-byte Spill
	movl	8(%r13), %ebx
	movq	%r14, %rdi
	callq	_MWIFIEX_SKB_DMA_ADDR
	movq	_MWIFIEX_SLEEP_COOKIE_SIZE@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	movq	_PCI_DMA_FROMDEVICE@GOTPCREL(%rip), %r15
	movl	(%r15), %ecx
	movl	%ebx, %edi
	movl	%eax, %esi
	callq	_pci_dma_sync_single_for_device
	movq	_PCIE_CPU_INT_EVENT@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_CPU_INTR_SLEEP_CFM_DONE@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r12, %rdi
	callq	_mwifiex_write_reg
	testq	%rax, %rax
	je	LBB0_10
## %bb.8:
	movq	_ERROR@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	leaq	L_.str.1(%rip), %rdx
	jmp	LBB0_9
LBB0_32:
	movq	_ERROR@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	leaq	L_.str.2(%rip), %rdx
	movq	%r12, %rdi
	callq	_mwifiex_dbg
	movq	_MWIFIEX_UPLD_SIZE@GOTPCREL(%rip), %r13
	jmp	LBB0_33
LBB0_39:
	movl	(%r15), %esi
	movq	%r12, %rdi
	xorl	%edx, %edx
	callq	_mwifiex_write_reg
	testq	%rax, %rax
	je	LBB0_34
## %bb.40:
	movq	_ERROR@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	leaq	L_.str.4(%rip), %rdx
LBB0_9:
	movq	%r12, %rdi
	callq	_mwifiex_dbg
	movl	$-1, %eax
	jmp	LBB0_35
LBB0_10:
	movq	_MWIFIEX_MAX_DELAY_COUNT@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r12, %rdi
	callq	_mwifiex_delay_for_sleep_cookie
	movl	(%r15), %edx
	movq	%r12, %rdi
	movq	%r14, %rsi
	callq	_mwifiex_unmap_pci_memory
	movl	24(%r12), %esi
	movq	%r14, %rdi
	callq	_skb_pull
	movq	-48(%rbp), %rbx                 ## 8-byte Reload
	cmpq	$0, 8(%rbx)
	movq	_MWIFIEX_UPLD_SIZE@GOTPCREL(%rip), %r13
	je	LBB0_31
## %bb.11:
	movq	%r12, %rdi
	callq	_mwifiex_pcie_ok_to_access_hw
	testq	%rax, %rax
	je	LBB0_31
## %bb.12:
	movl	$50, %edi
	movl	$60, %esi
	callq	_usleep_range
	cmpq	$0, 8(%rbx)
	je	LBB0_31
## %bb.13:
	movq	%r12, %rdi
	callq	_mwifiex_pcie_ok_to_access_hw
	testq	%rax, %rax
	je	LBB0_31
## %bb.14:
	movl	$50, %edi
	movl	$60, %esi
	callq	_usleep_range
	cmpq	$0, 8(%rbx)
	je	LBB0_31
## %bb.15:
	movq	%r12, %rdi
	callq	_mwifiex_pcie_ok_to_access_hw
	testq	%rax, %rax
	je	LBB0_31
## %bb.16:
	movl	$50, %edi
	movl	$60, %esi
	callq	_usleep_range
	cmpq	$0, 8(%rbx)
	je	LBB0_31
## %bb.17:
	movq	%r12, %rdi
	callq	_mwifiex_pcie_ok_to_access_hw
	testq	%rax, %rax
	je	LBB0_31
## %bb.18:
	movl	$50, %edi
	movl	$60, %esi
	callq	_usleep_range
	cmpq	$0, 8(%rbx)
	je	LBB0_31
## %bb.19:
	movq	%r12, %rdi
	callq	_mwifiex_pcie_ok_to_access_hw
	testq	%rax, %rax
	je	LBB0_31
## %bb.20:
	movl	$50, %edi
	movl	$60, %esi
	callq	_usleep_range
	cmpq	$0, 8(%rbx)
	je	LBB0_31
## %bb.21:
	movq	%r12, %rdi
	callq	_mwifiex_pcie_ok_to_access_hw
	testq	%rax, %rax
	je	LBB0_31
## %bb.22:
	movl	$50, %edi
	movl	$60, %esi
	callq	_usleep_range
	cmpq	$0, 8(%rbx)
	je	LBB0_31
## %bb.23:
	movq	%r12, %rdi
	callq	_mwifiex_pcie_ok_to_access_hw
	testq	%rax, %rax
	je	LBB0_31
## %bb.24:
	movl	$50, %edi
	movl	$60, %esi
	callq	_usleep_range
	cmpq	$0, 8(%rbx)
	je	LBB0_31
## %bb.25:
	movq	%r12, %rdi
	callq	_mwifiex_pcie_ok_to_access_hw
	testq	%rax, %rax
	je	LBB0_31
## %bb.26:
	movl	$50, %edi
	movl	$60, %esi
	callq	_usleep_range
	cmpq	$0, 8(%rbx)
	je	LBB0_31
## %bb.27:
	movq	%r12, %rdi
	callq	_mwifiex_pcie_ok_to_access_hw
	testq	%rax, %rax
	je	LBB0_31
## %bb.28:
	movl	$50, %edi
	movl	$60, %esi
	callq	_usleep_range
	cmpq	$0, 8(%rbx)
	je	LBB0_31
## %bb.29:
	movq	%r12, %rdi
	callq	_mwifiex_pcie_ok_to_access_hw
	testq	%rax, %rax
	je	LBB0_31
## %bb.30:
	movl	$50, %edi
	movl	$60, %esi
	callq	_usleep_range
LBB0_31:
	movq	%r12, %rdi
	callq	_mwifiex_pcie_enable_host_int
	movl	8(%r14), %esi
	movq	(%r14), %rdx
	movq	%r12, %rdi
	callq	_mwifiex_process_sleep_confirm_resp
LBB0_33:
	movl	28(%r12), %ebx
	movl	8(%r14), %r15d
	movq	_u32@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_MWIFIEX_SIZE_OF_CMD_BUFFER@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	(%r14), %rdx
	callq	_min_t
	movl	%ebx, %edi
	movl	%r15d, %esi
	movl	%eax, %edx
	callq	_memcpy
	movl	24(%r12), %esi
	movq	%r14, %rdi
	callq	_skb_push
	movq	(%r13), %rdx
	movq	_PCI_DMA_FROMDEVICE@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movq	%r12, %rdi
	movq	%r14, %rsi
	callq	_mwifiex_map_pci_memory
	movq	%rax, %rcx
	movl	$-1, %eax
	testq	%rcx, %rcx
	jne	LBB0_35
LBB0_34:
	xorl	%eax, %eax
LBB0_35:
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_CMD,4,2                        ## @CMD
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"info: Rx CMD Response\n"

	.comm	_PCI_DMA_FROMDEVICE,4,2         ## @PCI_DMA_FROMDEVICE
	.comm	_MWIFIEX_UPLD_SIZE,8,3          ## @MWIFIEX_UPLD_SIZE
	.comm	_PCI_DMA_TODEVICE,4,2           ## @PCI_DMA_TODEVICE
	.comm	_PS_STATE_SLEEP_CFM,8,3         ## @PS_STATE_SLEEP_CFM
	.comm	_MWIFIEX_SLEEP_COOKIE_SIZE,4,2  ## @MWIFIEX_SLEEP_COOKIE_SIZE
	.comm	_PCIE_CPU_INT_EVENT,4,2         ## @PCIE_CPU_INT_EVENT
	.comm	_CPU_INTR_SLEEP_CFM_DONE,4,2    ## @CPU_INTR_SLEEP_CFM_DONE
	.comm	_ERROR,4,2                      ## @ERROR
L_.str.1:                               ## @.str.1
	.asciz	"Write register failed\n"

	.comm	_MWIFIEX_MAX_DELAY_COUNT,4,2    ## @MWIFIEX_MAX_DELAY_COUNT
L_.str.2:                               ## @.str.2
	.asciz	"There is no command but got cmdrsp\n"

	.comm	_u32,4,2                        ## @u32
	.comm	_MWIFIEX_SIZE_OF_CMD_BUFFER,4,2 ## @MWIFIEX_SIZE_OF_CMD_BUFFER
L_.str.3:                               ## @.str.3
	.asciz	"cmd_done: failed to clear cmd_rsp_addr_lo\n"

L_.str.4:                               ## @.str.4
	.asciz	"cmd_done: failed to clear cmd_rsp_addr_hi\n"

	.no_dead_strip	_mwifiex_pcie_process_cmd_complete
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function mwifiex_pcie_process_cmd_complete
_mwifiex_pcie_process_cmd_complete:     ; @mwifiex_pcie_process_cmd_complete
	.cfi_startproc
; %bb.0:
	stp	x26, x25, [sp, #-80]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	mov	x19, x0
	ldr	x25, [x0, #32]
	ldr	x22, [x25, #24]
	ldr	x20, [x25]
Lloh0:
	adrp	x8, _CMD@GOTPAGE
Lloh1:
	ldr	x8, [x8, _CMD@GOTPAGEOFF]
Lloh2:
	ldr	w1, [x8]
Lloh3:
	adrp	x2, l_.str@PAGE
Lloh4:
	add	x2, x2, l_.str@PAGEOFF
	bl	_mwifiex_dbg
	ldr	x8, [x19, #16]
Lloh5:
	adrp	x23, _MWIFIEX_UPLD_SIZE@GOTPAGE
Lloh6:
	ldr	x23, [x23, _MWIFIEX_UPLD_SIZE@GOTPAGEOFF]
Lloh7:
	adrp	x24, _PCI_DMA_FROMDEVICE@GOTPAGE
Lloh8:
	ldr	x24, [x24, _PCI_DMA_FROMDEVICE@GOTPAGEOFF]
	cbz	x8, LBB0_7
; %bb.1:
	ldr	w2, [x24]
	mov	x0, x19
	mov	x1, x20
	bl	_mwifiex_unmap_pci_memory
	ldr	x1, [x25, #16]
	cbz	x1, LBB0_3
LBB0_2:
Lloh9:
	adrp	x8, _PCI_DMA_TODEVICE@GOTPAGE
Lloh10:
	ldr	x8, [x8, _PCI_DMA_TODEVICE@GOTPAGEOFF]
Lloh11:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_mwifiex_unmap_pci_memory
	ldr	x0, [x25, #16]
	bl	_dev_kfree_skb_any
	str	xzr, [x25, #16]
LBB0_3:
	ldr	w0, [x20, #8]
	bl	_get_unaligned_le16
	mov	x21, x0
	ldr	x8, [x23]
	ldr	x9, [x20]
	sub	x1, x8, x9
	mov	x0, x20
	bl	_skb_put
	mov	x0, x20
	mov	x1, x21
	bl	_skb_trim
	ldr	x8, [x19, #16]
	cbz	x8, LBB0_8
; %bb.4:
	mov	x0, x19
	bl	_mwifiex_pcie_ok_to_access_hw
	cbz	x0, LBB0_39
; %bb.5:
	ldr	w1, [x19, #24]
	mov	x0, x20
	bl	_skb_pull
	ldr	x8, [x19, #16]
	str	x20, [x8]
	mov	w8, #1
	str	w8, [x19, #8]
	str	xzr, [x25]
	ldr	w1, [x22, #4]
	mov	x0, x19
	mov	w2, #0
	bl	_mwifiex_write_reg
	cbz	x0, LBB0_12
; %bb.6:
Lloh12:
	adrp	x8, _ERROR@GOTPAGE
Lloh13:
	ldr	x8, [x8, _ERROR@GOTPAGEOFF]
Lloh14:
	ldr	w1, [x8]
Lloh15:
	adrp	x2, l_.str.3@PAGE
Lloh16:
	add	x2, x2, l_.str.3@PAGEOFF
	b	LBB0_14
LBB0_7:
	ldr	w21, [x25, #8]
	mov	x0, x20
	bl	_MWIFIEX_SKB_DMA_ADDR
	mov	x1, x0
	ldr	x2, [x23]
	ldr	w3, [x24]
	mov	x0, x21
	bl	_pci_dma_sync_single_for_cpu
	ldr	x1, [x25, #16]
	cbnz	x1, LBB0_2
	b	LBB0_3
LBB0_8:
	ldr	x8, [x19]
Lloh17:
	adrp	x9, _PS_STATE_SLEEP_CFM@GOTPAGE
Lloh18:
	ldr	x9, [x9, _PS_STATE_SLEEP_CFM@GOTPAGEOFF]
Lloh19:
	ldr	x9, [x9]
	cmp	x8, x9
	b.ne	LBB0_11
; %bb.9:
	ldr	w21, [x25, #8]
	mov	x0, x20
	bl	_MWIFIEX_SKB_DMA_ADDR
	mov	x1, x0
Lloh20:
	adrp	x8, _MWIFIEX_SLEEP_COOKIE_SIZE@GOTPAGE
Lloh21:
	ldr	x8, [x8, _MWIFIEX_SLEEP_COOKIE_SIZE@GOTPAGEOFF]
Lloh22:
	ldr	w2, [x8]
	ldr	w3, [x24]
	mov	x0, x21
	bl	_pci_dma_sync_single_for_device
Lloh23:
	adrp	x8, _PCIE_CPU_INT_EVENT@GOTPAGE
Lloh24:
	ldr	x8, [x8, _PCIE_CPU_INT_EVENT@GOTPAGEOFF]
Lloh25:
	ldr	w1, [x8]
Lloh26:
	adrp	x8, _CPU_INTR_SLEEP_CFM_DONE@GOTPAGE
Lloh27:
	ldr	x8, [x8, _CPU_INTR_SLEEP_CFM_DONE@GOTPAGEOFF]
Lloh28:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_mwifiex_write_reg
	cbz	x0, LBB0_15
; %bb.10:
Lloh29:
	adrp	x8, _ERROR@GOTPAGE
Lloh30:
	ldr	x8, [x8, _ERROR@GOTPAGEOFF]
Lloh31:
	ldr	w1, [x8]
Lloh32:
	adrp	x2, l_.str.1@PAGE
Lloh33:
	add	x2, x2, l_.str.1@PAGEOFF
	b	LBB0_14
LBB0_11:
Lloh34:
	adrp	x8, _ERROR@GOTPAGE
Lloh35:
	ldr	x8, [x8, _ERROR@GOTPAGEOFF]
Lloh36:
	ldr	w1, [x8]
Lloh37:
	adrp	x2, l_.str.2@PAGE
Lloh38:
	add	x2, x2, l_.str.2@PAGEOFF
	mov	x0, x19
	bl	_mwifiex_dbg
	b	LBB0_37
LBB0_12:
	ldr	w1, [x22]
	mov	x0, x19
	mov	w2, #0
	bl	_mwifiex_write_reg
	cbz	x0, LBB0_39
; %bb.13:
Lloh39:
	adrp	x8, _ERROR@GOTPAGE
Lloh40:
	ldr	x8, [x8, _ERROR@GOTPAGEOFF]
Lloh41:
	ldr	w1, [x8]
Lloh42:
	adrp	x2, l_.str.4@PAGE
Lloh43:
	add	x2, x2, l_.str.4@PAGEOFF
LBB0_14:
	mov	x0, x19
	bl	_mwifiex_dbg
	mov	w0, #-1
	b	LBB0_40
LBB0_15:
Lloh44:
	adrp	x8, _MWIFIEX_MAX_DELAY_COUNT@GOTPAGE
Lloh45:
	ldr	x8, [x8, _MWIFIEX_MAX_DELAY_COUNT@GOTPAGEOFF]
Lloh46:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_mwifiex_delay_for_sleep_cookie
	ldr	w2, [x24]
	mov	x0, x19
	mov	x1, x20
	bl	_mwifiex_unmap_pci_memory
	ldr	w1, [x19, #24]
	mov	x0, x20
	bl	_skb_pull
	ldr	x8, [x22, #8]
	cbz	x8, LBB0_36
; %bb.16:
	mov	x0, x19
	bl	_mwifiex_pcie_ok_to_access_hw
	cbz	x0, LBB0_36
; %bb.17:
	mov	w0, #50
	mov	w1, #60
	bl	_usleep_range
	ldr	x8, [x22, #8]
	cbz	x8, LBB0_36
; %bb.18:
	mov	x0, x19
	bl	_mwifiex_pcie_ok_to_access_hw
	cbz	x0, LBB0_36
; %bb.19:
	mov	w0, #50
	mov	w1, #60
	bl	_usleep_range
	ldr	x8, [x22, #8]
	cbz	x8, LBB0_36
; %bb.20:
	mov	x0, x19
	bl	_mwifiex_pcie_ok_to_access_hw
	cbz	x0, LBB0_36
; %bb.21:
	mov	w0, #50
	mov	w1, #60
	bl	_usleep_range
	ldr	x8, [x22, #8]
	cbz	x8, LBB0_36
; %bb.22:
	mov	x0, x19
	bl	_mwifiex_pcie_ok_to_access_hw
	cbz	x0, LBB0_36
; %bb.23:
	mov	w0, #50
	mov	w1, #60
	bl	_usleep_range
	ldr	x8, [x22, #8]
	cbz	x8, LBB0_36
; %bb.24:
	mov	x0, x19
	bl	_mwifiex_pcie_ok_to_access_hw
	cbz	x0, LBB0_36
; %bb.25:
	mov	w0, #50
	mov	w1, #60
	bl	_usleep_range
	ldr	x8, [x22, #8]
	cbz	x8, LBB0_36
; %bb.26:
	mov	x0, x19
	bl	_mwifiex_pcie_ok_to_access_hw
	cbz	x0, LBB0_36
; %bb.27:
	mov	w0, #50
	mov	w1, #60
	bl	_usleep_range
	ldr	x8, [x22, #8]
	cbz	x8, LBB0_36
; %bb.28:
	mov	x0, x19
	bl	_mwifiex_pcie_ok_to_access_hw
	cbz	x0, LBB0_36
; %bb.29:
	mov	w0, #50
	mov	w1, #60
	bl	_usleep_range
	ldr	x8, [x22, #8]
	cbz	x8, LBB0_36
; %bb.30:
	mov	x0, x19
	bl	_mwifiex_pcie_ok_to_access_hw
	cbz	x0, LBB0_36
; %bb.31:
	mov	w0, #50
	mov	w1, #60
	bl	_usleep_range
	ldr	x8, [x22, #8]
	cbz	x8, LBB0_36
; %bb.32:
	mov	x0, x19
	bl	_mwifiex_pcie_ok_to_access_hw
	cbz	x0, LBB0_36
; %bb.33:
	mov	w0, #50
	mov	w1, #60
	bl	_usleep_range
	ldr	x8, [x22, #8]
	cbz	x8, LBB0_36
; %bb.34:
	mov	x0, x19
	bl	_mwifiex_pcie_ok_to_access_hw
	cbz	x0, LBB0_36
; %bb.35:
	mov	w0, #50
	mov	w1, #60
	bl	_usleep_range
LBB0_36:
	mov	x0, x19
	bl	_mwifiex_pcie_enable_host_int
	ldr	w1, [x20, #8]
	ldr	x2, [x20]
	mov	x0, x19
	bl	_mwifiex_process_sleep_confirm_resp
LBB0_37:
	ldr	w21, [x19, #28]
Lloh47:
	adrp	x8, _u32@GOTPAGE
Lloh48:
	ldr	x8, [x8, _u32@GOTPAGEOFF]
	ldr	w22, [x20, #8]
Lloh49:
	ldr	w0, [x8]
Lloh50:
	adrp	x8, _MWIFIEX_SIZE_OF_CMD_BUFFER@GOTPAGE
Lloh51:
	ldr	x8, [x8, _MWIFIEX_SIZE_OF_CMD_BUFFER@GOTPAGEOFF]
Lloh52:
	ldr	w1, [x8]
	ldr	x2, [x20]
	bl	_min_t
	mov	x2, x0
	mov	x0, x21
	mov	x1, x22
	bl	_memcpy
	ldr	w1, [x19, #24]
	mov	x0, x20
	bl	_skb_push
	ldr	x2, [x23]
	ldr	w3, [x24]
	mov	x0, x19
	mov	x1, x20
	bl	_mwifiex_map_pci_memory
	cbz	x0, LBB0_39
; %bb.38:
	mov	w0, #-1
	b	LBB0_40
LBB0_39:
	mov	w0, #0
LBB0_40:
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp], #80             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGot	Lloh7, Lloh8
	.loh AdrpLdrGot	Lloh5, Lloh6
	.loh AdrpAdd	Lloh3, Lloh4
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpAdd	Lloh15, Lloh16
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh19
	.loh AdrpLdrGotLdr	Lloh26, Lloh27, Lloh28
	.loh AdrpLdrGotLdr	Lloh23, Lloh24, Lloh25
	.loh AdrpLdrGotLdr	Lloh20, Lloh21, Lloh22
	.loh AdrpAdd	Lloh32, Lloh33
	.loh AdrpLdrGotLdr	Lloh29, Lloh30, Lloh31
	.loh AdrpAdd	Lloh37, Lloh38
	.loh AdrpLdrGotLdr	Lloh34, Lloh35, Lloh36
	.loh AdrpAdd	Lloh42, Lloh43
	.loh AdrpLdrGotLdr	Lloh39, Lloh40, Lloh41
	.loh AdrpLdrGotLdr	Lloh44, Lloh45, Lloh46
	.loh AdrpLdrGotLdr	Lloh50, Lloh51, Lloh52
	.loh AdrpLdrGotLdr	Lloh47, Lloh48, Lloh49
	.cfi_endproc
                                        ; -- End function
	.comm	_CMD,4,2                        ; @CMD
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"info: Rx CMD Response\n"

	.comm	_PCI_DMA_FROMDEVICE,4,2         ; @PCI_DMA_FROMDEVICE
	.comm	_MWIFIEX_UPLD_SIZE,8,3          ; @MWIFIEX_UPLD_SIZE
	.comm	_PCI_DMA_TODEVICE,4,2           ; @PCI_DMA_TODEVICE
	.comm	_PS_STATE_SLEEP_CFM,8,3         ; @PS_STATE_SLEEP_CFM
	.comm	_MWIFIEX_SLEEP_COOKIE_SIZE,4,2  ; @MWIFIEX_SLEEP_COOKIE_SIZE
	.comm	_PCIE_CPU_INT_EVENT,4,2         ; @PCIE_CPU_INT_EVENT
	.comm	_CPU_INTR_SLEEP_CFM_DONE,4,2    ; @CPU_INTR_SLEEP_CFM_DONE
	.comm	_ERROR,4,2                      ; @ERROR
l_.str.1:                               ; @.str.1
	.asciz	"Write register failed\n"

	.comm	_MWIFIEX_MAX_DELAY_COUNT,4,2    ; @MWIFIEX_MAX_DELAY_COUNT
l_.str.2:                               ; @.str.2
	.asciz	"There is no command but got cmdrsp\n"

	.comm	_u32,4,2                        ; @u32
	.comm	_MWIFIEX_SIZE_OF_CMD_BUFFER,4,2 ; @MWIFIEX_SIZE_OF_CMD_BUFFER
l_.str.3:                               ; @.str.3
	.asciz	"cmd_done: failed to clear cmd_rsp_addr_lo\n"

l_.str.4:                               ; @.str.4
	.asciz	"cmd_done: failed to clear cmd_rsp_addr_hi\n"

	.no_dead_strip	_mwifiex_pcie_process_cmd_complete
.subsections_via_symbols
