	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function iwl_eeprom_release_semaphore
_iwl_eeprom_release_semaphore:          ## @iwl_eeprom_release_semaphore
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	movq	_CSR_HW_IF_CONFIG_REG@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	popq	%rbp
	jmp	_iwl_clear_bit                  ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_CSR_HW_IF_CONFIG_REG,4,2       ## @CSR_HW_IF_CONFIG_REG
	.comm	_CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM,4,2 ## @CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM
	.no_dead_strip	_iwl_eeprom_release_semaphore
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function iwl_eeprom_release_semaphore
_iwl_eeprom_release_semaphore:          ; @iwl_eeprom_release_semaphore
	.cfi_startproc
; %bb.0:
Lloh0:
	adrp	x8, _CSR_HW_IF_CONFIG_REG@GOTPAGE
Lloh1:
	ldr	x8, [x8, _CSR_HW_IF_CONFIG_REG@GOTPAGEOFF]
Lloh2:
	ldr	w1, [x8]
Lloh3:
	adrp	x8, _CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM@GOTPAGE
Lloh4:
	ldr	x8, [x8, _CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM@GOTPAGEOFF]
Lloh5:
	ldr	w2, [x8]
	b	_iwl_clear_bit
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_CSR_HW_IF_CONFIG_REG,4,2       ; @CSR_HW_IF_CONFIG_REG
	.comm	_CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM,4,2 ; @CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM
	.no_dead_strip	_iwl_eeprom_release_semaphore
.subsections_via_symbols
