	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function rt2800_config_channel_rf3052
_rt2800_config_channel_rf3052:          ## @rt2800_config_channel_rf3052
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$56, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdx, %r12
	movq	%rsi, -80(%rbp)                 ## 8-byte Spill
	movq	%rdi, %r14
	movq	16(%rdi), %rbx
	cmpl	$14, (%rdx)
	movq	%rbx, -88(%rbp)                 ## 8-byte Spill
	movq	%rcx, -56(%rbp)                 ## 8-byte Spill
	jg	LBB0_2
## %bb.1:
	movl	(%rbx), %edx
	movq	%r14, %rdi
	movl	$25, %esi
	callq	_rt2800_bbp_write
	movl	4(%rbx), %edx
	jmp	LBB0_3
LBB0_2:
	movq	%r14, %rdi
	movl	$25, %esi
	movl	$9, %edx
	callq	_rt2800_bbp_write
	movl	$255, %edx
LBB0_3:
	movq	%r14, %rdi
	movl	$26, %esi
	callq	_rt2800_bbp_write
	movl	4(%r12), %edx
	movl	$2, %r13d
	movq	%r14, %rdi
	movl	$2, %esi
	callq	_rt2800_rfcsr_write
	movl	8(%r12), %edx
	movq	%r14, %rdi
	movl	$3, %esi
	callq	_rt2800_rfcsr_write
	movq	%r14, %rdi
	movl	$6, %esi
	callq	_rt2800_rfcsr_read
	movl	%eax, -44(%rbp)
	movq	_RFCSR6_R1@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	12(%r12), %edx
	leaq	-44(%rbp), %r15
	movq	%r15, %rdi
	callq	_rt2x00_set_field8
	xorl	%edx, %edx
	cmpl	$15, (%r12)
	setl	%dl
	incl	%edx
	movq	_RFCSR6_TXDIV@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r15, %rdi
	callq	_rt2x00_set_field8
	movl	-44(%rbp), %edx
	movq	%r14, %rdi
	movl	$6, %esi
	callq	_rt2800_rfcsr_write
	movq	%r14, %rdi
	movl	$5, %esi
	callq	_rt2800_rfcsr_read
	movl	%eax, -44(%rbp)
	xorl	%eax, %eax
	cmpl	$15, (%r12)
	setl	%al
	subl	%eax, %r13d
	movq	_RFCSR5_R1@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r15, %rdi
	movl	%r13d, %edx
	callq	_rt2x00_set_field8
	movl	-44(%rbp), %edx
	movq	%r14, %rdi
	movl	$5, %esi
	callq	_rt2800_rfcsr_write
	movq	%r14, %rdi
	movl	$12, %esi
	callq	_rt2800_rfcsr_read
	movl	%eax, -44(%rbp)
	cmpl	$14, (%r12)
	movq	_RFCSR12_DR0@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r12, -64(%rbp)                 ## 8-byte Spill
	leaq	-44(%rbp), %rbx
	movq	%rbx, %rdi
	jg	LBB0_5
## %bb.4:
	movl	$3, %edx
	callq	_rt2x00_set_field8
	movq	_RFCSR12_TX_POWER@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	-56(%rbp), %r15                 ## 8-byte Reload
	movl	(%r15), %edx
	jmp	LBB0_6
LBB0_5:
	movl	$7, %edx
	callq	_rt2x00_set_field8
	movq	_RFCSR12_TX_POWER@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	-56(%rbp), %r15                 ## 8-byte Reload
	movl	(%r15), %eax
	movl	%eax, %ecx
	andl	$3, %ecx
	andl	$12, %eax
	leal	(%rcx,%rax,2), %edx
LBB0_6:
	movq	%rbx, %rdi
	movq	-64(%rbp), %rbx                 ## 8-byte Reload
	callq	_rt2x00_set_field8
	movl	-44(%rbp), %edx
	movq	%r14, %rdi
	movl	$12, %esi
	callq	_rt2800_rfcsr_write
	movq	%r14, %rdi
	movl	$13, %esi
	callq	_rt2800_rfcsr_read
	movl	%eax, -44(%rbp)
	cmpl	$14, (%rbx)
	movq	_RFCSR13_DR0@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	leaq	-44(%rbp), %rbx
	movq	%rbx, %rdi
	jg	LBB0_8
## %bb.7:
	movl	$3, %edx
	callq	_rt2x00_set_field8
	movq	_RFCSR13_TX_POWER@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	4(%r15), %edx
	jmp	LBB0_9
LBB0_8:
	movl	$7, %edx
	callq	_rt2x00_set_field8
	movq	_RFCSR13_TX_POWER@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	4(%r15), %eax
	movl	%eax, %ecx
	andl	$3, %ecx
	andl	$12, %eax
	leal	(%rcx,%rax,2), %edx
LBB0_9:
	movq	%rbx, %rdi
	callq	_rt2x00_set_field8
	movl	-44(%rbp), %edx
	movq	%r14, %rdi
	movl	$13, %esi
	callq	_rt2800_rfcsr_write
	movq	%r14, %rdi
	movl	$1, %esi
	callq	_rt2800_rfcsr_read
	movl	%eax, -44(%rbp)
	movq	_RFCSR1_RX0_PD@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	leaq	-44(%rbp), %rbx
	movq	%rbx, %rdi
	xorl	%edx, %edx
	callq	_rt2x00_set_field8
	movq	_RFCSR1_TX0_PD@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	xorl	%edx, %edx
	callq	_rt2x00_set_field8
	movq	_RFCSR1_RX1_PD@GOTPCREL(%rip), %r15
	movl	(%r15), %esi
	movq	%rbx, %rdi
	xorl	%edx, %edx
	callq	_rt2x00_set_field8
	movq	_RFCSR1_TX1_PD@GOTPCREL(%rip), %r13
	movl	(%r13), %esi
	movq	%rbx, %rdi
	xorl	%edx, %edx
	callq	_rt2x00_set_field8
	movq	_RFCSR1_RX2_PD@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	xorl	%edx, %edx
	callq	_rt2x00_set_field8
	movq	_RFCSR1_TX2_PD@GOTPCREL(%rip), %r12
	movl	(%r12), %esi
	movq	%rbx, %rdi
	xorl	%edx, %edx
	callq	_rt2x00_set_field8
	movq	%r14, %rdi
	callq	_rt2x00_has_cap_bt_coexist
	testq	%rax, %rax
	je	LBB0_13
## %bb.10:
	movq	-64(%rbp), %rax                 ## 8-byte Reload
	cmpl	$14, (%rax)
	jg	LBB0_11
## %bb.12:
	movq	_RFCSR1_RX0_PD@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	leaq	-44(%rbp), %rbx
	movq	%rbx, %rdi
	movl	$1, %edx
	callq	_rt2x00_set_field8
	movq	_RFCSR1_TX0_PD@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	movl	$1, %edx
	callq	_rt2x00_set_field8
LBB0_11:
	movq	_RFCSR1_RX2_PD@GOTPCREL(%rip), %r15
	movq	-88(%rbp), %r13                 ## 8-byte Reload
	movq	-80(%rbp), %rbx                 ## 8-byte Reload
LBB0_19:
	movl	(%r15), %esi
	leaq	-44(%rbp), %rdi
	movl	$1, %edx
	callq	_rt2x00_set_field8
LBB0_20:
	movl	(%r12), %esi
	leaq	-44(%rbp), %rdi
	movl	$1, %edx
	callq	_rt2x00_set_field8
LBB0_21:
	movl	-44(%rbp), %edx
	movq	%r14, %rdi
	movl	$1, %esi
	callq	_rt2800_rfcsr_write
	movq	%r14, %rdi
	movl	$23, %esi
	callq	_rt2800_rfcsr_read
	movl	%eax, -44(%rbp)
	movq	_RFCSR23_FREQ_OFFSET@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	(%r14), %edx
	leaq	-44(%rbp), %rdi
	callq	_rt2x00_set_field8
	movl	-44(%rbp), %edx
	movq	%r14, %rdi
	movl	$23, %esi
	callq	_rt2800_rfcsr_write
	movq	%rbx, %rdi
	callq	_conf_is_ht40
	xorl	%ebx, %ebx
	testq	%rax, %rax
	sete	%bl
	movl	8(%r13,%rbx,4), %edx
	movq	%r14, %rdi
	movl	$24, %esi
	callq	_rt2800_rfcsr_write
	movl	8(%r13,%rbx,4), %edx
	movq	%r14, %rdi
	movl	$31, %esi
	callq	_rt2800_rfcsr_write
	movq	-64(%rbp), %rbx                 ## 8-byte Reload
	cmpl	$14, (%rbx)
	jg	LBB0_23
## %bb.22:
	movq	%r14, %rdi
	movl	$7, %esi
	movl	$216, %edx
	callq	_rt2800_rfcsr_write
	movq	%r14, %rdi
	movl	$9, %esi
	movl	$195, %edx
	callq	_rt2800_rfcsr_write
	movq	%r14, %rdi
	movl	$10, %esi
	movl	$241, %edx
	callq	_rt2800_rfcsr_write
	movq	%r14, %rdi
	movl	$11, %esi
	movl	$185, %edx
	callq	_rt2800_rfcsr_write
	movq	%r14, %rdi
	movl	$15, %esi
	movl	$83, %edx
	callq	_rt2800_rfcsr_write
	movl	$76, -44(%rbp)
	movq	_RFCSR16_TXMIXER_GAIN@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	16(%r13), %edx
	leaq	-44(%rbp), %rdi
	callq	_rt2x00_set_field8
	movl	-44(%rbp), %edx
	movq	%r14, %rdi
	movl	$16, %esi
	callq	_rt2800_rfcsr_write
	movq	%r14, %rdi
	movl	$17, %esi
	movl	$35, %edx
	callq	_rt2800_rfcsr_write
	movl	$155, -56(%rbp)                 ## 4-byte Folded Spill
	xorl	%r15d, %r15d
	movl	$133, %r13d
	movl	$21, %r12d
	movl	$179, %ebx
	movl	$147, %edx
	jmp	LBB0_24
LBB0_23:
	movq	%r14, %rdi
	movl	$7, %esi
	callq	_rt2800_rfcsr_read
	movl	%eax, -44(%rbp)
	movq	_RFCSR7_BIT2@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	leaq	-44(%rbp), %r15
	movq	%r15, %rdi
	movl	$1, %edx
	callq	_rt2x00_set_field8
	movq	_RFCSR7_BIT3@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r15, %rdi
	xorl	%edx, %edx
	callq	_rt2x00_set_field8
	movq	_RFCSR7_BIT4@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r15, %rdi
	movl	$1, %edx
	callq	_rt2x00_set_field8
	movq	_RFCSR7_BITS67@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r15, %rdi
	xorl	%edx, %edx
	callq	_rt2x00_set_field8
	movl	-44(%rbp), %edx
	movq	%r14, %rdi
	movl	$7, %esi
	callq	_rt2800_rfcsr_write
	movq	%r14, %rdi
	movl	$9, %esi
	movl	$192, %edx
	callq	_rt2800_rfcsr_write
	movq	%r14, %rdi
	movl	$10, %esi
	movl	$241, %edx
	callq	_rt2800_rfcsr_write
	movq	%r14, %rdi
	movl	$11, %esi
	xorl	%edx, %edx
	callq	_rt2800_rfcsr_write
	movq	%r14, %rdi
	movl	$15, %esi
	movl	$67, %edx
	callq	_rt2800_rfcsr_write
	movl	$122, -44(%rbp)
	movq	_RFCSR16_TXMIXER_GAIN@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	20(%r13), %edx
	movq	%r15, %rdi
	callq	_rt2x00_set_field8
	movl	-44(%rbp), %edx
	movq	%r14, %rdi
	movl	$16, %esi
	callq	_rt2800_rfcsr_write
	movq	%r14, %rdi
	movl	$17, %esi
	movl	$35, %edx
	callq	_rt2800_rfcsr_write
	movl	(%rbx), %eax
	xorl	%ecx, %ecx
	cmpl	$129, %eax
	setb	%cl
	leal	243(%rcx), %esi
	cmpl	$65, %eax
	leal	114(%rcx,%rcx), %eax
	movl	$183, %edx
	cmovgel	%eax, %edx
	movl	$246, %ebx
	cmovgel	%esi, %ebx
	movl	$61, %r12d
	movl	$1, %r15d
	movl	$1, %eax
	cmovgel	%eax, %r12d
	movl	$159, -56(%rbp)                 ## 4-byte Folded Spill
	movl	$135, %r13d
LBB0_24:
	movq	%r14, %rdi
	movl	$19, %esi
	callq	_rt2800_rfcsr_write
	movq	%r14, %rdi
	movl	$20, %esi
	movl	%ebx, %edx
	callq	_rt2800_rfcsr_write
	movq	%r14, %rdi
	movl	$25, %esi
	movl	%r12d, %edx
	callq	_rt2800_rfcsr_write
	movq	%r14, %rdi
	movl	$26, %esi
	movl	%r13d, %edx
	callq	_rt2800_rfcsr_write
	movq	%r14, %rdi
	movl	$27, %esi
	movl	%r15d, %edx
	callq	_rt2800_rfcsr_write
	movq	%r14, %rdi
	movl	$29, %esi
	movl	-56(%rbp), %edx                 ## 4-byte Reload
	callq	_rt2800_rfcsr_write
	movq	_GPIO_CTRL@GOTPCREL(%rip), %r15
	movl	(%r15), %esi
	movq	%r14, %rdi
	callq	_rt2800_register_read
	movl	%eax, -68(%rbp)
	movq	_GPIO_CTRL_DIR7@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	leaq	-68(%rbp), %rbx
	movq	%rbx, %rdi
	xorl	%edx, %edx
	callq	_rt2x00_set_field32
	xorl	%edx, %edx
	movq	-64(%rbp), %rax                 ## 8-byte Reload
	cmpl	$15, (%rax)
	setl	%dl
	movq	_GPIO_CTRL_VAL7@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_rt2x00_set_field32
	movl	(%r15), %esi
	movl	-68(%rbp), %edx
	movq	%r14, %rdi
	callq	_rt2800_register_write
	movq	%r14, %rdi
	movl	$7, %esi
	callq	_rt2800_rfcsr_read
	movl	%eax, -44(%rbp)
	movq	_RFCSR7_RF_TUNING@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	leaq	-44(%rbp), %rdi
	movl	$1, %edx
	callq	_rt2x00_set_field8
	movl	-44(%rbp), %edx
	movq	%r14, %rdi
	movl	$7, %esi
	callq	_rt2800_rfcsr_write
	addq	$56, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_13:
	movq	%r13, %rcx
	movl	4(%r14), %eax
	cmpl	$2, %eax
	movq	-88(%rbp), %r13                 ## 8-byte Reload
	movq	-80(%rbp), %rbx                 ## 8-byte Reload
	je	LBB0_16
## %bb.14:
	cmpl	$1, %eax
	jne	LBB0_17
## %bb.15:
	movl	(%rcx), %esi
	leaq	-44(%rbp), %rdi
	movl	$1, %edx
	callq	_rt2x00_set_field8
LBB0_16:
	movq	_RFCSR1_TX2_PD@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	leaq	-44(%rbp), %rdi
	movl	$1, %edx
	callq	_rt2x00_set_field8
LBB0_17:
	movl	8(%r14), %eax
	movq	_RFCSR1_RX2_PD@GOTPCREL(%rip), %r12
	cmpl	$2, %eax
	je	LBB0_20
## %bb.18:
	cmpl	$1, %eax
	je	LBB0_19
	jmp	LBB0_21
	.cfi_endproc
                                        ## -- End function
	.comm	_RFCSR6_R1,4,2                  ## @RFCSR6_R1
	.comm	_RFCSR6_TXDIV,4,2               ## @RFCSR6_TXDIV
	.comm	_RFCSR5_R1,4,2                  ## @RFCSR5_R1
	.comm	_RFCSR12_DR0,4,2                ## @RFCSR12_DR0
	.comm	_RFCSR12_TX_POWER,4,2           ## @RFCSR12_TX_POWER
	.comm	_RFCSR13_DR0,4,2                ## @RFCSR13_DR0
	.comm	_RFCSR13_TX_POWER,4,2           ## @RFCSR13_TX_POWER
	.comm	_RFCSR1_RX0_PD,4,2              ## @RFCSR1_RX0_PD
	.comm	_RFCSR1_TX0_PD,4,2              ## @RFCSR1_TX0_PD
	.comm	_RFCSR1_RX1_PD,4,2              ## @RFCSR1_RX1_PD
	.comm	_RFCSR1_TX1_PD,4,2              ## @RFCSR1_TX1_PD
	.comm	_RFCSR1_RX2_PD,4,2              ## @RFCSR1_RX2_PD
	.comm	_RFCSR1_TX2_PD,4,2              ## @RFCSR1_TX2_PD
	.comm	_RFCSR23_FREQ_OFFSET,4,2        ## @RFCSR23_FREQ_OFFSET
	.comm	_RFCSR16_TXMIXER_GAIN,4,2       ## @RFCSR16_TXMIXER_GAIN
	.comm	_RFCSR7_BIT2,4,2                ## @RFCSR7_BIT2
	.comm	_RFCSR7_BIT3,4,2                ## @RFCSR7_BIT3
	.comm	_RFCSR7_BIT4,4,2                ## @RFCSR7_BIT4
	.comm	_RFCSR7_BITS67,4,2              ## @RFCSR7_BITS67
	.comm	_GPIO_CTRL,4,2                  ## @GPIO_CTRL
	.comm	_GPIO_CTRL_DIR7,4,2             ## @GPIO_CTRL_DIR7
	.comm	_GPIO_CTRL_VAL7,4,2             ## @GPIO_CTRL_VAL7
	.comm	_RFCSR7_RF_TUNING,4,2           ## @RFCSR7_RF_TUNING
	.no_dead_strip	_rt2800_config_channel_rf3052
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function rt2800_config_channel_rf3052
_rt2800_config_channel_rf3052:          ; @rt2800_config_channel_rf3052
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #96
	.cfi_def_cfa_offset 96
	stp	x26, x25, [sp, #16]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #32]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #48]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #64]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #80]             ; 16-byte Folded Spill
	add	x29, sp, #80
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	mov	x22, x3
	mov	x20, x2
	mov	x21, x1
	mov	x19, x0
	ldr	x23, [x0, #16]
	ldr	w8, [x2]
	cmp	w8, #14
	b.gt	LBB0_2
; %bb.1:
	ldr	w2, [x23]
	mov	x0, x19
	mov	w1, #25
	bl	_rt2800_bbp_write
	ldr	w2, [x23, #4]
	b	LBB0_3
LBB0_2:
	mov	x0, x19
	mov	w1, #25
	mov	w2, #9
	bl	_rt2800_bbp_write
	mov	w2, #255
LBB0_3:
	mov	x0, x19
	mov	w1, #26
	bl	_rt2800_bbp_write
	ldr	w2, [x20, #4]
	mov	x0, x19
	mov	w1, #2
	bl	_rt2800_rfcsr_write
	ldr	w2, [x20, #8]
	mov	x0, x19
	mov	w1, #3
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #6
	bl	_rt2800_rfcsr_read
	str	w0, [sp, #12]
Lloh0:
	adrp	x8, _RFCSR6_R1@GOTPAGE
Lloh1:
	ldr	x8, [x8, _RFCSR6_R1@GOTPAGEOFF]
Lloh2:
	ldr	w1, [x8]
	ldr	w2, [x20, #12]
	add	x0, sp, #12
	bl	_rt2x00_set_field8
	ldr	w8, [x20]
	cmp	w8, #15
	mov	w24, #1
	cinc	w2, w24, lt
Lloh3:
	adrp	x8, _RFCSR6_TXDIV@GOTPAGE
Lloh4:
	ldr	x8, [x8, _RFCSR6_TXDIV@GOTPAGEOFF]
Lloh5:
	ldr	w1, [x8]
	add	x0, sp, #12
	bl	_rt2x00_set_field8
	ldr	w2, [sp, #12]
	mov	x0, x19
	mov	w1, #6
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #5
	bl	_rt2800_rfcsr_read
	str	w0, [sp, #12]
	ldr	w8, [x20]
	cmp	w8, #15
	cinc	w2, w24, ge
Lloh6:
	adrp	x8, _RFCSR5_R1@GOTPAGE
Lloh7:
	ldr	x8, [x8, _RFCSR5_R1@GOTPAGEOFF]
Lloh8:
	ldr	w1, [x8]
	add	x0, sp, #12
	bl	_rt2x00_set_field8
	ldr	w2, [sp, #12]
	mov	x0, x19
	mov	w1, #5
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #12
	bl	_rt2800_rfcsr_read
	str	w0, [sp, #12]
	ldr	w8, [x20]
Lloh9:
	adrp	x9, _RFCSR12_DR0@GOTPAGE
Lloh10:
	ldr	x9, [x9, _RFCSR12_DR0@GOTPAGEOFF]
Lloh11:
	ldr	w1, [x9]
	add	x0, sp, #12
	cmp	w8, #14
	b.gt	LBB0_5
; %bb.4:
	mov	w2, #3
	bl	_rt2x00_set_field8
Lloh12:
	adrp	x8, _RFCSR12_TX_POWER@GOTPAGE
Lloh13:
	ldr	x8, [x8, _RFCSR12_TX_POWER@GOTPAGEOFF]
Lloh14:
	ldr	w1, [x8]
	ldr	w2, [x22]
	b	LBB0_6
LBB0_5:
	mov	w2, #7
	bl	_rt2x00_set_field8
Lloh15:
	adrp	x8, _RFCSR12_TX_POWER@GOTPAGE
Lloh16:
	ldr	x8, [x8, _RFCSR12_TX_POWER@GOTPAGEOFF]
Lloh17:
	ldr	w1, [x8]
	ldr	w8, [x22]
	lsr	w9, w8, #2
	and	w2, w8, #0x3
	bfi	w2, w9, #3, #2
LBB0_6:
	add	x0, sp, #12
	bl	_rt2x00_set_field8
	ldr	w2, [sp, #12]
	mov	x0, x19
	mov	w1, #12
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #13
	bl	_rt2800_rfcsr_read
	str	w0, [sp, #12]
	ldr	w8, [x20]
Lloh18:
	adrp	x9, _RFCSR13_DR0@GOTPAGE
Lloh19:
	ldr	x9, [x9, _RFCSR13_DR0@GOTPAGEOFF]
Lloh20:
	ldr	w1, [x9]
	add	x0, sp, #12
	cmp	w8, #14
	b.gt	LBB0_8
; %bb.7:
	mov	w2, #3
	bl	_rt2x00_set_field8
Lloh21:
	adrp	x8, _RFCSR13_TX_POWER@GOTPAGE
Lloh22:
	ldr	x8, [x8, _RFCSR13_TX_POWER@GOTPAGEOFF]
Lloh23:
	ldr	w1, [x8]
	ldr	w2, [x22, #4]
	b	LBB0_9
LBB0_8:
	mov	w2, #7
	bl	_rt2x00_set_field8
Lloh24:
	adrp	x8, _RFCSR13_TX_POWER@GOTPAGE
Lloh25:
	ldr	x8, [x8, _RFCSR13_TX_POWER@GOTPAGEOFF]
Lloh26:
	ldr	w1, [x8]
	ldr	w8, [x22, #4]
	lsr	w9, w8, #2
	and	w2, w8, #0x3
	bfi	w2, w9, #3, #2
LBB0_9:
	add	x0, sp, #12
	bl	_rt2x00_set_field8
	ldr	w2, [sp, #12]
	mov	x0, x19
	mov	w1, #13
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #1
	bl	_rt2800_rfcsr_read
	str	w0, [sp, #12]
Lloh27:
	adrp	x22, _RFCSR1_RX0_PD@GOTPAGE
Lloh28:
	ldr	x22, [x22, _RFCSR1_RX0_PD@GOTPAGEOFF]
	ldr	w1, [x22]
	add	x0, sp, #12
	mov	w2, #0
	bl	_rt2x00_set_field8
Lloh29:
	adrp	x24, _RFCSR1_TX0_PD@GOTPAGE
Lloh30:
	ldr	x24, [x24, _RFCSR1_TX0_PD@GOTPAGEOFF]
	ldr	w1, [x24]
	add	x0, sp, #12
	mov	w2, #0
	bl	_rt2x00_set_field8
Lloh31:
	adrp	x8, _RFCSR1_RX1_PD@GOTPAGE
Lloh32:
	ldr	x8, [x8, _RFCSR1_RX1_PD@GOTPAGEOFF]
Lloh33:
	ldr	w1, [x8]
	add	x0, sp, #12
	mov	w2, #0
	bl	_rt2x00_set_field8
Lloh34:
	adrp	x25, _RFCSR1_TX1_PD@GOTPAGE
Lloh35:
	ldr	x25, [x25, _RFCSR1_TX1_PD@GOTPAGEOFF]
	ldr	w1, [x25]
	add	x0, sp, #12
	mov	w2, #0
	bl	_rt2x00_set_field8
Lloh36:
	adrp	x8, _RFCSR1_RX2_PD@GOTPAGE
Lloh37:
	ldr	x8, [x8, _RFCSR1_RX2_PD@GOTPAGEOFF]
Lloh38:
	ldr	w1, [x8]
	add	x0, sp, #12
	mov	w2, #0
	bl	_rt2x00_set_field8
Lloh39:
	adrp	x26, _RFCSR1_TX2_PD@GOTPAGE
Lloh40:
	ldr	x26, [x26, _RFCSR1_TX2_PD@GOTPAGEOFF]
	ldr	w1, [x26]
	add	x0, sp, #12
	mov	w2, #0
	bl	_rt2x00_set_field8
	mov	x0, x19
	bl	_rt2x00_has_cap_bt_coexist
	cbz	x0, LBB0_19
; %bb.10:
	ldr	w8, [x20]
	cmp	w8, #14
	b.gt	LBB0_12
; %bb.11:
	ldr	w1, [x22]
	add	x0, sp, #12
	mov	w2, #1
	bl	_rt2x00_set_field8
	ldr	w1, [x24]
	add	x0, sp, #12
	mov	w2, #1
	bl	_rt2x00_set_field8
LBB0_12:
Lloh41:
	adrp	x22, _RFCSR1_TX2_PD@GOTPAGE
Lloh42:
	ldr	x22, [x22, _RFCSR1_TX2_PD@GOTPAGEOFF]
Lloh43:
	adrp	x8, _RFCSR1_RX2_PD@GOTPAGE
Lloh44:
	ldr	x8, [x8, _RFCSR1_RX2_PD@GOTPAGEOFF]
LBB0_13:
	ldr	w1, [x8]
	add	x0, sp, #12
	mov	w2, #1
	bl	_rt2x00_set_field8
LBB0_14:
	ldr	w1, [x22]
	add	x0, sp, #12
	mov	w2, #1
	bl	_rt2x00_set_field8
LBB0_15:
	ldr	w2, [sp, #12]
	mov	x0, x19
	mov	w1, #1
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #23
	bl	_rt2800_rfcsr_read
	str	w0, [sp, #12]
Lloh45:
	adrp	x8, _RFCSR23_FREQ_OFFSET@GOTPAGE
Lloh46:
	ldr	x8, [x8, _RFCSR23_FREQ_OFFSET@GOTPAGEOFF]
Lloh47:
	ldr	w1, [x8]
	ldr	w2, [x19]
	add	x0, sp, #12
	bl	_rt2x00_set_field8
	ldr	w2, [sp, #12]
	mov	x0, x19
	mov	w1, #23
	bl	_rt2800_rfcsr_write
	mov	x0, x21
	bl	_conf_is_ht40
	mov	w8, #8
	mov	w9, #12
	cmp	x0, #0
	csel	x21, x9, x8, eq
	ldr	w2, [x23, x21]
	mov	x0, x19
	mov	w1, #24
	bl	_rt2800_rfcsr_write
	ldr	w2, [x23, x21]
	mov	x0, x19
	mov	w1, #31
	bl	_rt2800_rfcsr_write
	ldr	w8, [x20]
	mov	x0, x19
	mov	w1, #7
	cmp	w8, #14
	b.gt	LBB0_17
; %bb.16:
	mov	w2, #216
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #9
	mov	w2, #195
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #10
	mov	w2, #241
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #11
	mov	w2, #185
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #15
	mov	w2, #83
	bl	_rt2800_rfcsr_write
	mov	w8, #76
	str	w8, [sp, #12]
Lloh48:
	adrp	x8, _RFCSR16_TXMIXER_GAIN@GOTPAGE
Lloh49:
	ldr	x8, [x8, _RFCSR16_TXMIXER_GAIN@GOTPAGEOFF]
Lloh50:
	ldr	w1, [x8]
	ldr	w2, [x23, #16]
	add	x0, sp, #12
	bl	_rt2x00_set_field8
	ldr	w2, [sp, #12]
	mov	x0, x19
	mov	w1, #16
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #17
	mov	w2, #35
	bl	_rt2800_rfcsr_write
	mov	w21, #0
	mov	w22, #155
	mov	w23, #133
	mov	w24, #21
	mov	w25, #179
	mov	w2, #147
	b	LBB0_18
LBB0_17:
	bl	_rt2800_rfcsr_read
	str	w0, [sp, #12]
Lloh51:
	adrp	x8, _RFCSR7_BIT2@GOTPAGE
Lloh52:
	ldr	x8, [x8, _RFCSR7_BIT2@GOTPAGEOFF]
Lloh53:
	ldr	w1, [x8]
	mov	w21, #1
	add	x0, sp, #12
	mov	w2, #1
	bl	_rt2x00_set_field8
Lloh54:
	adrp	x8, _RFCSR7_BIT3@GOTPAGE
Lloh55:
	ldr	x8, [x8, _RFCSR7_BIT3@GOTPAGEOFF]
Lloh56:
	ldr	w1, [x8]
	add	x0, sp, #12
	mov	w2, #0
	bl	_rt2x00_set_field8
Lloh57:
	adrp	x8, _RFCSR7_BIT4@GOTPAGE
Lloh58:
	ldr	x8, [x8, _RFCSR7_BIT4@GOTPAGEOFF]
Lloh59:
	ldr	w1, [x8]
	add	x0, sp, #12
	mov	w2, #1
	bl	_rt2x00_set_field8
Lloh60:
	adrp	x8, _RFCSR7_BITS67@GOTPAGE
Lloh61:
	ldr	x8, [x8, _RFCSR7_BITS67@GOTPAGEOFF]
Lloh62:
	ldr	w1, [x8]
	add	x0, sp, #12
	mov	w2, #0
	bl	_rt2x00_set_field8
	ldr	w2, [sp, #12]
	mov	x0, x19
	mov	w1, #7
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #9
	mov	w2, #192
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #10
	mov	w2, #241
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #11
	mov	w2, #0
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #15
	mov	w2, #67
	bl	_rt2800_rfcsr_write
	mov	w8, #122
	str	w8, [sp, #12]
Lloh63:
	adrp	x8, _RFCSR16_TXMIXER_GAIN@GOTPAGE
Lloh64:
	ldr	x8, [x8, _RFCSR16_TXMIXER_GAIN@GOTPAGEOFF]
Lloh65:
	ldr	w1, [x8]
	ldr	w2, [x23, #20]
	add	x0, sp, #12
	bl	_rt2x00_set_field8
	ldr	w2, [sp, #12]
	mov	x0, x19
	mov	w1, #16
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #17
	mov	w2, #35
	bl	_rt2800_rfcsr_write
	mov	w8, #114
	mov	w9, #116
	ldr	w10, [x20]
	cmp	w10, #129
	csel	w8, w9, w8, lo
	mov	w9, #243
	cinc	w9, w9, lo
	mov	w11, #183
	cmp	w10, #65
	csel	w2, w11, w8, lt
	mov	w8, #246
	csel	w25, w8, w9, lt
	mov	w8, #61
	csinc	w24, w8, wzr, lt
	mov	w22, #159
	mov	w23, #135
LBB0_18:
	mov	x0, x19
	mov	w1, #19
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #20
	mov	x2, x25
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #25
	mov	x2, x24
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #26
	mov	x2, x23
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #27
	mov	x2, x21
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #29
	mov	x2, x22
	bl	_rt2800_rfcsr_write
Lloh66:
	adrp	x21, _GPIO_CTRL@GOTPAGE
Lloh67:
	ldr	x21, [x21, _GPIO_CTRL@GOTPAGEOFF]
	ldr	w1, [x21]
	mov	x0, x19
	bl	_rt2800_register_read
	str	w0, [sp, #8]
Lloh68:
	adrp	x8, _GPIO_CTRL_DIR7@GOTPAGE
Lloh69:
	ldr	x8, [x8, _GPIO_CTRL_DIR7@GOTPAGEOFF]
Lloh70:
	ldr	w1, [x8]
	add	x0, sp, #8
	mov	w2, #0
	bl	_rt2x00_set_field32
	ldr	w8, [x20]
	cmp	w8, #15
	cset	w2, lt
Lloh71:
	adrp	x8, _GPIO_CTRL_VAL7@GOTPAGE
Lloh72:
	ldr	x8, [x8, _GPIO_CTRL_VAL7@GOTPAGEOFF]
Lloh73:
	ldr	w1, [x8]
	add	x0, sp, #8
	bl	_rt2x00_set_field32
	ldr	w1, [x21]
	ldr	w2, [sp, #8]
	mov	x0, x19
	bl	_rt2800_register_write
	mov	x0, x19
	mov	w1, #7
	bl	_rt2800_rfcsr_read
	str	w0, [sp, #12]
Lloh74:
	adrp	x8, _RFCSR7_RF_TUNING@GOTPAGE
Lloh75:
	ldr	x8, [x8, _RFCSR7_RF_TUNING@GOTPAGEOFF]
Lloh76:
	ldr	w1, [x8]
	add	x0, sp, #12
	mov	w2, #1
	bl	_rt2x00_set_field8
	ldr	w2, [sp, #12]
	mov	x0, x19
	mov	w1, #7
	bl	_rt2800_rfcsr_write
	ldp	x29, x30, [sp, #80]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #64]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #48]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #32]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #96
	ret
LBB0_19:
	ldr	w8, [x19, #4]
	cmp	w8, #2
	b.eq	LBB0_22
; %bb.20:
	cmp	w8, #1
	b.ne	LBB0_23
; %bb.21:
	ldr	w1, [x25]
	add	x0, sp, #12
	mov	w2, #1
	bl	_rt2x00_set_field8
LBB0_22:
	ldr	w1, [x26]
	add	x0, sp, #12
	mov	w2, #1
	bl	_rt2x00_set_field8
LBB0_23:
	ldr	w8, [x19, #8]
Lloh77:
	adrp	x22, _RFCSR1_RX2_PD@GOTPAGE
Lloh78:
	ldr	x22, [x22, _RFCSR1_RX2_PD@GOTPAGEOFF]
	cmp	w8, #2
	b.eq	LBB0_14
; %bb.24:
	cmp	w8, #1
	b.ne	LBB0_15
; %bb.25:
Lloh79:
	adrp	x8, _RFCSR1_RX1_PD@GOTPAGE
Lloh80:
	ldr	x8, [x8, _RFCSR1_RX1_PD@GOTPAGEOFF]
	b	LBB0_13
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.loh AdrpLdrGot	Lloh39, Lloh40
	.loh AdrpLdrGotLdr	Lloh36, Lloh37, Lloh38
	.loh AdrpLdrGot	Lloh34, Lloh35
	.loh AdrpLdrGotLdr	Lloh31, Lloh32, Lloh33
	.loh AdrpLdrGot	Lloh29, Lloh30
	.loh AdrpLdrGot	Lloh27, Lloh28
	.loh AdrpLdrGot	Lloh43, Lloh44
	.loh AdrpLdrGot	Lloh41, Lloh42
	.loh AdrpLdrGotLdr	Lloh45, Lloh46, Lloh47
	.loh AdrpLdrGotLdr	Lloh48, Lloh49, Lloh50
	.loh AdrpLdrGotLdr	Lloh63, Lloh64, Lloh65
	.loh AdrpLdrGotLdr	Lloh60, Lloh61, Lloh62
	.loh AdrpLdrGotLdr	Lloh57, Lloh58, Lloh59
	.loh AdrpLdrGotLdr	Lloh54, Lloh55, Lloh56
	.loh AdrpLdrGotLdr	Lloh51, Lloh52, Lloh53
	.loh AdrpLdrGotLdr	Lloh74, Lloh75, Lloh76
	.loh AdrpLdrGotLdr	Lloh71, Lloh72, Lloh73
	.loh AdrpLdrGotLdr	Lloh68, Lloh69, Lloh70
	.loh AdrpLdrGot	Lloh66, Lloh67
	.loh AdrpLdrGot	Lloh77, Lloh78
	.loh AdrpLdrGot	Lloh79, Lloh80
	.cfi_endproc
                                        ; -- End function
	.comm	_RFCSR6_R1,4,2                  ; @RFCSR6_R1
	.comm	_RFCSR6_TXDIV,4,2               ; @RFCSR6_TXDIV
	.comm	_RFCSR5_R1,4,2                  ; @RFCSR5_R1
	.comm	_RFCSR12_DR0,4,2                ; @RFCSR12_DR0
	.comm	_RFCSR12_TX_POWER,4,2           ; @RFCSR12_TX_POWER
	.comm	_RFCSR13_DR0,4,2                ; @RFCSR13_DR0
	.comm	_RFCSR13_TX_POWER,4,2           ; @RFCSR13_TX_POWER
	.comm	_RFCSR1_RX0_PD,4,2              ; @RFCSR1_RX0_PD
	.comm	_RFCSR1_TX0_PD,4,2              ; @RFCSR1_TX0_PD
	.comm	_RFCSR1_RX1_PD,4,2              ; @RFCSR1_RX1_PD
	.comm	_RFCSR1_TX1_PD,4,2              ; @RFCSR1_TX1_PD
	.comm	_RFCSR1_RX2_PD,4,2              ; @RFCSR1_RX2_PD
	.comm	_RFCSR1_TX2_PD,4,2              ; @RFCSR1_TX2_PD
	.comm	_RFCSR23_FREQ_OFFSET,4,2        ; @RFCSR23_FREQ_OFFSET
	.comm	_RFCSR16_TXMIXER_GAIN,4,2       ; @RFCSR16_TXMIXER_GAIN
	.comm	_RFCSR7_BIT2,4,2                ; @RFCSR7_BIT2
	.comm	_RFCSR7_BIT3,4,2                ; @RFCSR7_BIT3
	.comm	_RFCSR7_BIT4,4,2                ; @RFCSR7_BIT4
	.comm	_RFCSR7_BITS67,4,2              ; @RFCSR7_BITS67
	.comm	_GPIO_CTRL,4,2                  ; @GPIO_CTRL
	.comm	_GPIO_CTRL_DIR7,4,2             ; @GPIO_CTRL_DIR7
	.comm	_GPIO_CTRL_VAL7,4,2             ; @GPIO_CTRL_VAL7
	.comm	_RFCSR7_RF_TUNING,4,2           ; @RFCSR7_RF_TUNING
	.no_dead_strip	_rt2800_config_channel_rf3052
.subsections_via_symbols
