	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function wlc_phy_chanspec_nphy_setup
_wlc_phy_chanspec_nphy_setup:           ## @wlc_phy_chanspec_nphy_setup
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdx, %r15
	movl	%esi, %r14d
	movq	%rdi, %r13
	movl	$9, %esi
	callq	_read_phy_reg
	movl	%eax, %ebx
	movq	_NPHY_BandControl_currentBand@GOTPCREL(%rip), %r12
	andl	(%r12), %ebx
	movl	%r14d, %edi
	callq	_CHSPEC_IS5G
	testq	%rax, %rax
	je	LBB0_3
## %bb.1:
	testl	%ebx, %ebx
	jne	LBB0_3
## %bb.2:
	movq	40(%r13), %rbx
	movl	%r14d, -44(%rbp)                ## 4-byte Spill
	movq	_psm_phy_hdr_param@GOTPCREL(%rip), %r14
	movl	(%r14), %edi
	callq	_D11REGOFFS
	movq	%rbx, %rdi
	movl	%eax, %esi
	callq	_bcma_read16
	movl	%eax, %r12d
	movq	40(%r13), %rbx
	movl	(%r14), %edi
	callq	_D11REGOFFS
	movq	_MAC_PHY_FORCE_CLK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	orl	%r12d, %edx
	movq	%rbx, %rdi
	movl	%eax, %esi
	callq	_bcma_write16
	movq	_NPHY_TO_BPHY_OFF@GOTPCREL(%rip), %rax
	movq	_BPHY_BB_CONFIG@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	addl	(%rax), %esi
	movq	_BBCFG_RESETCCA@GOTPCREL(%rip), %rax
	movq	_BBCFG_RESETRX@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	orl	(%rax), %edx
	movq	%r13, %rdi
	callq	_or_phy_reg
	movq	40(%r13), %rbx
	movl	(%r14), %edi
	movl	-44(%rbp), %r14d                ## 4-byte Reload
	callq	_D11REGOFFS
	movq	%rbx, %rdi
	movl	%eax, %esi
	movl	%r12d, %edx
	callq	_bcma_write16
	movq	_NPHY_BandControl_currentBand@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r13, %rdi
	movl	$9, %esi
	callq	_or_phy_reg
	jmp	LBB0_6
LBB0_3:
	movl	%r14d, %edi
	callq	_CHSPEC_IS5G
	testq	%rax, %rax
	jne	LBB0_6
## %bb.4:
	testl	%ebx, %ebx
	je	LBB0_6
## %bb.5:
	movl	(%r12), %edx
	notl	%edx
	movq	%r13, %rdi
	movl	$9, %esi
	callq	_and_phy_reg
	movq	40(%r13), %rbx
	movl	%r14d, -44(%rbp)                ## 4-byte Spill
	movq	_psm_phy_hdr_param@GOTPCREL(%rip), %r14
	movl	(%r14), %edi
	callq	_D11REGOFFS
	movq	%rbx, %rdi
	movl	%eax, %esi
	callq	_bcma_read16
	movl	%eax, %r12d
	movq	40(%r13), %rbx
	movl	(%r14), %edi
	callq	_D11REGOFFS
	movq	_MAC_PHY_FORCE_CLK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	orl	%r12d, %edx
	movq	%rbx, %rdi
	movl	%eax, %esi
	callq	_bcma_write16
	movq	_NPHY_TO_BPHY_OFF@GOTPCREL(%rip), %rax
	movq	_BPHY_BB_CONFIG@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	addl	(%rax), %esi
	movq	_BBCFG_RESETCCA@GOTPCREL(%rip), %rax
	movq	_BBCFG_RESETRX@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	orl	(%rax), %edx
	notl	%edx
	movq	%r13, %rdi
	callq	_and_phy_reg
	movq	40(%r13), %rbx
	movl	(%r14), %edi
	movl	-44(%rbp), %r14d                ## 4-byte Reload
	callq	_D11REGOFFS
	movq	%rbx, %rdi
	movl	%eax, %esi
	movl	%r12d, %edx
	callq	_bcma_write16
LBB0_6:
	movl	(%r15), %edx
	movq	%r13, %rdi
	movl	$462, %esi                      ## imm = 0x1CE
	callq	_write_phy_reg
	movl	4(%r15), %edx
	movq	%r13, %rdi
	movl	$463, %esi                      ## imm = 0x1CF
	callq	_write_phy_reg
	movl	8(%r15), %edx
	movq	%r13, %rdi
	movl	$464, %esi                      ## imm = 0x1D0
	callq	_write_phy_reg
	movl	12(%r15), %edx
	movq	%r13, %rdi
	movl	$465, %esi                      ## imm = 0x1D1
	callq	_write_phy_reg
	movl	16(%r15), %edx
	movq	%r13, %rdi
	movl	$466, %esi                      ## imm = 0x1D2
	callq	_write_phy_reg
	movl	20(%r15), %edx
	movq	%r13, %rdi
	movl	$467, %esi                      ## imm = 0x1D3
	callq	_write_phy_reg
	movl	(%r13), %edi
	callq	_CHSPEC_CHANNEL
	movq	_NPHY_ClassifierCtrl_ofdm_en@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	movq	%r13, %rdi
	cmpl	$14, %eax
	jne	LBB0_8
## %bb.7:
	xorl	%edx, %edx
	callq	_wlc_phy_classifier_nphy
	movq	_NPHY_TO_BPHY_OFF@GOTPCREL(%rip), %rax
	movq	_BPHY_TEST@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	addl	(%rax), %esi
	movq	%r13, %rdi
	movl	$2048, %edx                     ## imm = 0x800
	callq	_or_phy_reg
	jmp	LBB0_10
LBB0_8:
	movl	%esi, %edx
	callq	_wlc_phy_classifier_nphy
	movl	%r14d, %edi
	callq	_CHSPEC_IS2G
	testq	%rax, %rax
	je	LBB0_10
## %bb.9:
	movq	_NPHY_TO_BPHY_OFF@GOTPCREL(%rip), %rax
	movq	_BPHY_TEST@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	addl	(%rax), %esi
	movq	%r13, %rdi
	movl	$-2113, %edx                    ## imm = 0xF7BF
	callq	_and_phy_reg
LBB0_10:
	movq	8(%r13), %rax
	movq	_PHY_TPC_HW_OFF@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jne	LBB0_12
## %bb.11:
	movq	%r13, %rdi
	callq	_wlc_phy_txpwr_fixpower_nphy
LBB0_12:
	movl	28(%r13), %edi
	movl	$3, %esi
	callq	_NREV_LT
	testq	%rax, %rax
	je	LBB0_14
## %bb.13:
	movq	%r13, %rdi
	callq	_wlc_phy_adjust_lnagaintbl_nphy
LBB0_14:
	movq	%r13, %rdi
	callq	_wlc_phy_txlpfbw_nphy
	movl	28(%r13), %edi
	movl	$3, %esi
	callq	_NREV_GE
	testq	%rax, %rax
	je	LBB0_43
## %bb.15:
	movq	16(%r13), %rax
	movq	_SPURAVOID_DISABLE@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	je	LBB0_43
## %bb.16:
	movl	%r14d, %edi
	callq	_CHSPEC_CHANNEL
	movl	%eax, %r14d
	movl	(%r13), %edi
	callq	_CHSPEC_IS40
	movl	%eax, %ebx
	movl	28(%r13), %edi
	movl	$7, %esi
	callq	_NREV_GE
	testl	%ebx, %ebx
	je	LBB0_19
## %bb.17:
	testq	%rax, %rax
	je	LBB0_23
## %bb.18:
	xorl	%eax, %eax
	cmpl	$54, %r14d
	sete	%al
	jmp	LBB0_32
LBB0_19:
	testq	%rax, %rax
	je	LBB0_30
## %bb.20:
	leal	-13(%r14), %eax
	cmpl	$2, %eax
	jb	LBB0_22
## %bb.21:
	xorl	%eax, %eax
	cmpl	$153, %r14d
	jne	LBB0_32
	jmp	LBB0_22
LBB0_23:
	xorl	%eax, %eax
	cmpq	$0, 48(%r13)
	je	LBB0_32
## %bb.24:
	cmpl	$38, %r14d
	je	LBB0_27
## %bb.25:
	cmpl	$118, %r14d
	je	LBB0_27
## %bb.26:
	cmpl	$102, %r14d
	jne	LBB0_32
LBB0_27:
	movq	32(%r13), %rcx
	movq	(%rcx), %rdx
	movq	_BCMA_CHIP_ID_BCM4716@GOTPCREL(%rip), %rsi
	cmpq	(%rsi), %rdx
	jne	LBB0_22
## %bb.28:
	movq	8(%rcx), %rcx
	movq	_BCMA_PKG_ID_BCM4717@GOTPCREL(%rip), %rdx
	cmpq	(%rdx), %rcx
	je	LBB0_32
LBB0_22:
	movl	$1, %eax
	jmp	LBB0_32
LBB0_30:
	addl	$-5, %r14d
	xorl	%eax, %eax
	cmpl	$10, %r14d
	jae	LBB0_32
## %bb.31:
	movslq	%r14d, %rax
	leaq	l_switch.table.wlc_phy_chanspec_nphy_setup(%rip), %rcx
	movl	(%rcx,%rax,4), %eax
LBB0_32:
	movq	_SPURAVOID_FORCEON@GOTPCREL(%rip), %rdx
	movq	16(%r13), %rsi
	movq	32(%r13), %rcx
	cmpq	(%rdx), %rsi
	movl	$1, %r14d
	cmovnel	%eax, %r14d
	movq	(%rcx), %rax
	movq	_BCMA_CHIP_ID_BCM4716@GOTPCREL(%rip), %r15
	movq	_BCMA_CHIP_ID_BCM43225@GOTPCREL(%rip), %rbx
	cmpq	(%r15), %rax
	je	LBB0_35
## %bb.33:
	cmpq	(%rbx), %rax
	je	LBB0_35
## %bb.34:
	movl	16(%rcx), %edi
	xorl	%esi, %esi
	callq	_wlapi_bmac_core_phypll_ctl
	movq	40(%r13), %rax
	movq	(%rax), %rdi
	movl	%r14d, %esi
	callq	_bcma_pmu_spuravoid_pllupdate
	movq	32(%r13), %rax
	movl	16(%rax), %edi
	movl	$1, %esi
	callq	_wlapi_bmac_core_phypll_ctl
	jmp	LBB0_36
LBB0_35:
	movq	40(%r13), %rax
	movq	(%rax), %rdi
	movl	%r14d, %esi
	callq	_bcma_pmu_spuravoid_pllupdate
LBB0_36:
	movq	32(%r13), %rax
	movq	(%rax), %rax
	movq	_BCMA_CHIP_ID_BCM43224@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	je	LBB0_38
## %bb.37:
	cmpq	(%rbx), %rax
	jne	LBB0_39
LBB0_38:
	movq	40(%r13), %rbx
	movq	_tsf_clk_frac_l@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_D11REGOFFS
	cmpl	$1, %r14d
	movl	$21313, %ecx                    ## imm = 0x5341
	movl	$34953, %edx                    ## imm = 0x8889
	cmovel	%ecx, %edx
	movq	%rbx, %rdi
	movl	%eax, %esi
	callq	_bcma_write16
	movq	40(%r13), %rbx
	movq	_tsf_clk_frac_h@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_D11REGOFFS
	movq	%rbx, %rdi
	movl	%eax, %esi
	movl	$8, %edx
	callq	_bcma_write16
LBB0_39:
	movq	32(%r13), %rax
	movq	(%rax), %rcx
	cmpq	(%r15), %rcx
	je	LBB0_42
## %bb.40:
	movq	_BCMA_CHIP_ID_BCM47162@GOTPCREL(%rip), %rdx
	cmpq	(%rdx), %rcx
	je	LBB0_42
## %bb.41:
	movl	16(%rax), %edi
	callq	_wlapi_bmac_core_phypll_reset
LBB0_42:
	xorl	%ecx, %ecx
	testl	%r14d, %r14d
	setne	%cl
	shll	$15, %ecx
	movq	%r13, %rdi
	movl	$1, %esi
	movl	$32768, %edx                    ## imm = 0x8000
	callq	_mod_phy_reg
	movq	%r13, %rdi
	callq	_wlc_phy_resetcca_nphy
	movl	%r14d, 24(%r13)
LBB0_43:
	movl	28(%r13), %edi
	movl	$7, %esi
	callq	_NREV_LT
	testq	%rax, %rax
	je	LBB0_45
## %bb.44:
	movq	%r13, %rdi
	movl	$382, %esi                      ## imm = 0x17E
	movl	$14384, %edx                    ## imm = 0x3830
	callq	_write_phy_reg
LBB0_45:
	movq	%r13, %rdi
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_wlc_phy_spurwar_nphy           ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_NPHY_BandControl_currentBand,4,2 ## @NPHY_BandControl_currentBand
	.comm	_psm_phy_hdr_param,4,2          ## @psm_phy_hdr_param
	.comm	_MAC_PHY_FORCE_CLK,4,2          ## @MAC_PHY_FORCE_CLK
	.comm	_NPHY_TO_BPHY_OFF,4,2           ## @NPHY_TO_BPHY_OFF
	.comm	_BPHY_BB_CONFIG,4,2             ## @BPHY_BB_CONFIG
	.comm	_BBCFG_RESETCCA,4,2             ## @BBCFG_RESETCCA
	.comm	_BBCFG_RESETRX,4,2              ## @BBCFG_RESETRX
	.comm	_NPHY_ClassifierCtrl_ofdm_en,4,2 ## @NPHY_ClassifierCtrl_ofdm_en
	.comm	_BPHY_TEST,4,2                  ## @BPHY_TEST
	.comm	_PHY_TPC_HW_OFF,8,3             ## @PHY_TPC_HW_OFF
	.comm	_SPURAVOID_DISABLE,8,3          ## @SPURAVOID_DISABLE
	.comm	_BCMA_CHIP_ID_BCM4716,8,3       ## @BCMA_CHIP_ID_BCM4716
	.comm	_BCMA_PKG_ID_BCM4717,8,3        ## @BCMA_PKG_ID_BCM4717
	.comm	_SPURAVOID_FORCEON,8,3          ## @SPURAVOID_FORCEON
	.comm	_BCMA_CHIP_ID_BCM43225,8,3      ## @BCMA_CHIP_ID_BCM43225
	.comm	_BCMA_CHIP_ID_BCM43224,8,3      ## @BCMA_CHIP_ID_BCM43224
	.comm	_tsf_clk_frac_l,4,2             ## @tsf_clk_frac_l
	.comm	_tsf_clk_frac_h,4,2             ## @tsf_clk_frac_h
	.comm	_BCMA_CHIP_ID_BCM47162,8,3      ## @BCMA_CHIP_ID_BCM47162
	.no_dead_strip	_wlc_phy_chanspec_nphy_setup
	.section	__TEXT,__const
	.p2align	2                               ## @switch.table.wlc_phy_chanspec_nphy_setup
l_switch.table.wlc_phy_chanspec_nphy_setup:
	.long	1                               ## 0x1
	.long	1                               ## 0x1
	.long	1                               ## 0x1
	.long	1                               ## 0x1
	.long	0                               ## 0x0
	.long	0                               ## 0x0
	.long	0                               ## 0x0
	.long	0                               ## 0x0
	.long	1                               ## 0x1
	.long	1                               ## 0x1

.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function wlc_phy_chanspec_nphy_setup
_wlc_phy_chanspec_nphy_setup:           ; @wlc_phy_chanspec_nphy_setup
	.cfi_startproc
; %bb.0:
	stp	x26, x25, [sp, #-80]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	mov	x21, x2
	mov	x20, x1
	mov	x19, x0
	mov	w1, #9
	bl	_read_phy_reg
Lloh0:
	adrp	x25, _NPHY_BandControl_currentBand@GOTPAGE
Lloh1:
	ldr	x25, [x25, _NPHY_BandControl_currentBand@GOTPAGEOFF]
	ldr	w8, [x25]
	and	w22, w8, w0
	mov	x0, x20
	bl	_CHSPEC_IS5G
Lloh2:
	adrp	x24, _NPHY_TO_BPHY_OFF@GOTPAGE
Lloh3:
	ldr	x24, [x24, _NPHY_TO_BPHY_OFF@GOTPAGEOFF]
	cbz	x0, LBB0_3
; %bb.1:
	cbnz	w22, LBB0_3
; %bb.2:
	ldr	x22, [x19, #40]
Lloh4:
	adrp	x26, _psm_phy_hdr_param@GOTPAGE
Lloh5:
	ldr	x26, [x26, _psm_phy_hdr_param@GOTPAGEOFF]
	ldr	w0, [x26]
	bl	_D11REGOFFS
	mov	x1, x0
	mov	x0, x22
	bl	_bcma_read16
	mov	x22, x0
	ldr	x23, [x19, #40]
	ldr	w0, [x26]
	bl	_D11REGOFFS
	mov	x1, x0
Lloh6:
	adrp	x8, _MAC_PHY_FORCE_CLK@GOTPAGE
Lloh7:
	ldr	x8, [x8, _MAC_PHY_FORCE_CLK@GOTPAGEOFF]
Lloh8:
	ldr	w8, [x8]
	orr	w2, w8, w22
	mov	x0, x23
	bl	_bcma_write16
	ldr	w8, [x24]
Lloh9:
	adrp	x9, _BPHY_BB_CONFIG@GOTPAGE
Lloh10:
	ldr	x9, [x9, _BPHY_BB_CONFIG@GOTPAGEOFF]
Lloh11:
	ldr	w9, [x9]
Lloh12:
	adrp	x10, _BBCFG_RESETCCA@GOTPAGE
Lloh13:
	ldr	x10, [x10, _BBCFG_RESETCCA@GOTPAGEOFF]
	add	w1, w9, w8
Lloh14:
	ldr	w8, [x10]
Lloh15:
	adrp	x9, _BBCFG_RESETRX@GOTPAGE
Lloh16:
	ldr	x9, [x9, _BBCFG_RESETRX@GOTPAGEOFF]
Lloh17:
	ldr	w9, [x9]
	orr	w2, w9, w8
	mov	x0, x19
	bl	_or_phy_reg
	ldr	x23, [x19, #40]
	ldr	w0, [x26]
	bl	_D11REGOFFS
	mov	x1, x0
	mov	x0, x23
	mov	x2, x22
	bl	_bcma_write16
	ldr	w2, [x25]
	mov	x0, x19
	mov	w1, #9
	bl	_or_phy_reg
	b	LBB0_6
LBB0_3:
	mov	x0, x20
	bl	_CHSPEC_IS5G
	cbnz	x0, LBB0_6
; %bb.4:
	cbz	w22, LBB0_6
; %bb.5:
	ldr	w8, [x25]
	mvn	w2, w8
	mov	x0, x19
	mov	w1, #9
	bl	_and_phy_reg
	ldr	x22, [x19, #40]
Lloh18:
	adrp	x25, _psm_phy_hdr_param@GOTPAGE
Lloh19:
	ldr	x25, [x25, _psm_phy_hdr_param@GOTPAGEOFF]
	ldr	w0, [x25]
	bl	_D11REGOFFS
	mov	x1, x0
	mov	x0, x22
	bl	_bcma_read16
	mov	x22, x0
	ldr	x23, [x19, #40]
	ldr	w0, [x25]
	bl	_D11REGOFFS
	mov	x1, x0
Lloh20:
	adrp	x8, _MAC_PHY_FORCE_CLK@GOTPAGE
Lloh21:
	ldr	x8, [x8, _MAC_PHY_FORCE_CLK@GOTPAGEOFF]
Lloh22:
	ldr	w8, [x8]
	orr	w2, w8, w22
	mov	x0, x23
	bl	_bcma_write16
	ldr	w8, [x24]
Lloh23:
	adrp	x9, _BPHY_BB_CONFIG@GOTPAGE
Lloh24:
	ldr	x9, [x9, _BPHY_BB_CONFIG@GOTPAGEOFF]
Lloh25:
	ldr	w9, [x9]
	add	w1, w9, w8
Lloh26:
	adrp	x8, _BBCFG_RESETCCA@GOTPAGE
Lloh27:
	ldr	x8, [x8, _BBCFG_RESETCCA@GOTPAGEOFF]
Lloh28:
	ldr	w8, [x8]
Lloh29:
	adrp	x9, _BBCFG_RESETRX@GOTPAGE
Lloh30:
	ldr	x9, [x9, _BBCFG_RESETRX@GOTPAGEOFF]
Lloh31:
	ldr	w9, [x9]
	orr	w8, w9, w8
	mvn	w2, w8
	mov	x0, x19
	bl	_and_phy_reg
	ldr	x23, [x19, #40]
	ldr	w0, [x25]
	bl	_D11REGOFFS
	mov	x1, x0
	mov	x0, x23
	mov	x2, x22
	bl	_bcma_write16
LBB0_6:
	ldr	w2, [x21]
	mov	x0, x19
	mov	w1, #462
	bl	_write_phy_reg
	ldr	w2, [x21, #4]
	mov	x0, x19
	mov	w1, #463
	bl	_write_phy_reg
	ldr	w2, [x21, #8]
	mov	x0, x19
	mov	w1, #464
	bl	_write_phy_reg
	ldr	w2, [x21, #12]
	mov	x0, x19
	mov	w1, #465
	bl	_write_phy_reg
	ldr	w2, [x21, #16]
	mov	x0, x19
	mov	w1, #466
	bl	_write_phy_reg
	ldr	w2, [x21, #20]
	mov	x0, x19
	mov	w1, #467
	bl	_write_phy_reg
	ldr	w0, [x19]
	bl	_CHSPEC_CHANNEL
Lloh32:
	adrp	x8, _NPHY_ClassifierCtrl_ofdm_en@GOTPAGE
Lloh33:
	ldr	x8, [x8, _NPHY_ClassifierCtrl_ofdm_en@GOTPAGEOFF]
Lloh34:
	ldr	w1, [x8]
	cmp	w0, #14
	b.ne	LBB0_8
; %bb.7:
	mov	x0, x19
	mov	w2, #0
	bl	_wlc_phy_classifier_nphy
	ldr	w8, [x24]
Lloh35:
	adrp	x9, _BPHY_TEST@GOTPAGE
Lloh36:
	ldr	x9, [x9, _BPHY_TEST@GOTPAGEOFF]
Lloh37:
	ldr	w9, [x9]
	add	w1, w9, w8
	mov	x0, x19
	mov	w2, #2048
	bl	_or_phy_reg
	b	LBB0_10
LBB0_8:
	mov	x0, x19
	mov	x2, x1
	bl	_wlc_phy_classifier_nphy
	mov	x0, x20
	bl	_CHSPEC_IS2G
	cbz	x0, LBB0_10
; %bb.9:
	ldr	w8, [x24]
Lloh38:
	adrp	x9, _BPHY_TEST@GOTPAGE
Lloh39:
	ldr	x9, [x9, _BPHY_TEST@GOTPAGEOFF]
Lloh40:
	ldr	w9, [x9]
	add	w1, w9, w8
	mov	x0, x19
	mov	w2, #-2113
	bl	_and_phy_reg
LBB0_10:
	ldr	x8, [x19, #8]
Lloh41:
	adrp	x9, _PHY_TPC_HW_OFF@GOTPAGE
Lloh42:
	ldr	x9, [x9, _PHY_TPC_HW_OFF@GOTPAGEOFF]
Lloh43:
	ldr	x9, [x9]
	cmp	x8, x9
	b.ne	LBB0_12
; %bb.11:
	mov	x0, x19
	bl	_wlc_phy_txpwr_fixpower_nphy
LBB0_12:
	ldr	w0, [x19, #28]
	mov	w1, #3
	bl	_NREV_LT
	cbz	x0, LBB0_14
; %bb.13:
	mov	x0, x19
	bl	_wlc_phy_adjust_lnagaintbl_nphy
LBB0_14:
	mov	x0, x19
	bl	_wlc_phy_txlpfbw_nphy
	ldr	w0, [x19, #28]
	mov	w1, #3
	bl	_NREV_GE
	cbz	x0, LBB0_43
; %bb.15:
	ldr	x8, [x19, #16]
Lloh44:
	adrp	x9, _SPURAVOID_DISABLE@GOTPAGE
Lloh45:
	ldr	x9, [x9, _SPURAVOID_DISABLE@GOTPAGEOFF]
Lloh46:
	ldr	x9, [x9]
	cmp	x8, x9
	b.eq	LBB0_43
; %bb.16:
	mov	x0, x20
	bl	_CHSPEC_CHANNEL
	mov	x20, x0
	ldr	w0, [x19]
	bl	_CHSPEC_IS40
	mov	x21, x0
	ldr	w0, [x19, #28]
	mov	w1, #7
	bl	_NREV_GE
Lloh47:
	adrp	x22, _BCMA_CHIP_ID_BCM4716@GOTPAGE
Lloh48:
	ldr	x22, [x22, _BCMA_CHIP_ID_BCM4716@GOTPAGEOFF]
	cbz	w21, LBB0_19
; %bb.17:
	cbz	x0, LBB0_22
; %bb.18:
	cmp	w20, #54
	cset	w8, eq
	b	LBB0_32
LBB0_19:
	cbz	x0, LBB0_29
; %bb.20:
	sub	w8, w20, #13
	cmp	w8, #2
	b.lo	LBB0_28
; %bb.21:
	cmp	w20, #153
	b.ne	LBB0_31
	b	LBB0_28
LBB0_22:
	ldr	x8, [x19, #48]
	cbz	x8, LBB0_32
; %bb.23:
	cmp	w20, #38
	b.eq	LBB0_26
; %bb.24:
	cmp	w20, #118
	b.eq	LBB0_26
; %bb.25:
	cmp	w20, #102
	b.ne	LBB0_31
LBB0_26:
	ldr	x8, [x19, #32]
	ldr	x9, [x8]
	ldr	x10, [x22]
	cmp	x9, x10
	b.ne	LBB0_28
; %bb.27:
	ldr	x8, [x8, #8]
Lloh49:
	adrp	x9, _BCMA_PKG_ID_BCM4717@GOTPAGE
Lloh50:
	ldr	x9, [x9, _BCMA_PKG_ID_BCM4717@GOTPAGEOFF]
Lloh51:
	ldr	x9, [x9]
	cmp	x8, x9
	b.eq	LBB0_31
LBB0_28:
	mov	w8, #1
	b	LBB0_32
LBB0_29:
	sub	w8, w20, #5
	cmp	w8, #10
	b.hs	LBB0_31
; %bb.30:
Lloh52:
	adrp	x9, l_switch.table.wlc_phy_chanspec_nphy_setup@PAGE
Lloh53:
	add	x9, x9, l_switch.table.wlc_phy_chanspec_nphy_setup@PAGEOFF
	ldr	w8, [x9, w8, sxtw #2]
	b	LBB0_32
LBB0_31:
	mov	w8, #0
LBB0_32:
	ldr	x9, [x19, #16]
Lloh54:
	adrp	x10, _SPURAVOID_FORCEON@GOTPAGE
Lloh55:
	ldr	x10, [x10, _SPURAVOID_FORCEON@GOTPAGEOFF]
Lloh56:
	ldr	x10, [x10]
	cmp	x9, x10
	csinc	w20, w8, wzr, ne
	ldr	x8, [x19, #32]
	ldr	x9, [x8]
	ldr	x10, [x22]
Lloh57:
	adrp	x21, _BCMA_CHIP_ID_BCM43225@GOTPAGE
Lloh58:
	ldr	x21, [x21, _BCMA_CHIP_ID_BCM43225@GOTPAGEOFF]
	cmp	x9, x10
	b.eq	LBB0_35
; %bb.33:
	ldr	x10, [x21]
	cmp	x9, x10
	b.eq	LBB0_35
; %bb.34:
	ldr	w0, [x8, #16]
	mov	w1, #0
	bl	_wlapi_bmac_core_phypll_ctl
	ldr	x8, [x19, #40]
	ldr	x0, [x8]
	mov	x1, x20
	bl	_bcma_pmu_spuravoid_pllupdate
	ldr	x8, [x19, #32]
	ldr	w0, [x8, #16]
	mov	w1, #1
	bl	_wlapi_bmac_core_phypll_ctl
	b	LBB0_36
LBB0_35:
	ldr	x8, [x19, #40]
	ldr	x0, [x8]
	mov	x1, x20
	bl	_bcma_pmu_spuravoid_pllupdate
LBB0_36:
	ldr	x8, [x19, #32]
	ldr	x8, [x8]
Lloh59:
	adrp	x9, _BCMA_CHIP_ID_BCM43224@GOTPAGE
Lloh60:
	ldr	x9, [x9, _BCMA_CHIP_ID_BCM43224@GOTPAGEOFF]
Lloh61:
	ldr	x9, [x9]
	cmp	x8, x9
	b.eq	LBB0_38
; %bb.37:
	ldr	x9, [x21]
	cmp	x8, x9
	b.ne	LBB0_39
LBB0_38:
	ldr	x21, [x19, #40]
Lloh62:
	adrp	x8, _tsf_clk_frac_l@GOTPAGE
Lloh63:
	ldr	x8, [x8, _tsf_clk_frac_l@GOTPAGEOFF]
Lloh64:
	ldr	w0, [x8]
	bl	_D11REGOFFS
	mov	x1, x0
	mov	w8, #34953
	mov	w9, #21313
	cmp	w20, #1
	csel	w2, w9, w8, eq
	mov	x0, x21
	bl	_bcma_write16
	ldr	x21, [x19, #40]
Lloh65:
	adrp	x8, _tsf_clk_frac_h@GOTPAGE
Lloh66:
	ldr	x8, [x8, _tsf_clk_frac_h@GOTPAGEOFF]
Lloh67:
	ldr	w0, [x8]
	bl	_D11REGOFFS
	mov	x1, x0
	mov	x0, x21
	mov	w2, #8
	bl	_bcma_write16
LBB0_39:
	ldr	x8, [x19, #32]
	ldr	x9, [x8]
	ldr	x10, [x22]
	cmp	x9, x10
	b.eq	LBB0_42
; %bb.40:
Lloh68:
	adrp	x10, _BCMA_CHIP_ID_BCM47162@GOTPAGE
Lloh69:
	ldr	x10, [x10, _BCMA_CHIP_ID_BCM47162@GOTPAGEOFF]
Lloh70:
	ldr	x10, [x10]
	cmp	x9, x10
	b.eq	LBB0_42
; %bb.41:
	ldr	w0, [x8, #16]
	bl	_wlapi_bmac_core_phypll_reset
LBB0_42:
	cmp	w20, #0
	cset	w8, ne
	lsl	w3, w8, #15
	mov	x0, x19
	mov	w1, #1
	mov	w2, #32768
	bl	_mod_phy_reg
	mov	x0, x19
	bl	_wlc_phy_resetcca_nphy
	str	w20, [x19, #24]
LBB0_43:
	ldr	w0, [x19, #28]
	mov	w1, #7
	bl	_NREV_LT
	cbz	x0, LBB0_45
; %bb.44:
	mov	x0, x19
	mov	w1, #382
	mov	w2, #14384
	bl	_write_phy_reg
LBB0_45:
	mov	x0, x19
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp], #80             ; 16-byte Folded Reload
	b	_wlc_phy_spurwar_nphy
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGot	Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh29, Lloh30, Lloh31
	.loh AdrpLdrGotLdr	Lloh26, Lloh27, Lloh28
	.loh AdrpLdrGotLdr	Lloh23, Lloh24, Lloh25
	.loh AdrpLdrGotLdr	Lloh20, Lloh21, Lloh22
	.loh AdrpLdrGot	Lloh18, Lloh19
	.loh AdrpLdrGotLdr	Lloh32, Lloh33, Lloh34
	.loh AdrpLdrGotLdr	Lloh35, Lloh36, Lloh37
	.loh AdrpLdrGotLdr	Lloh38, Lloh39, Lloh40
	.loh AdrpLdrGotLdr	Lloh41, Lloh42, Lloh43
	.loh AdrpLdrGotLdr	Lloh44, Lloh45, Lloh46
	.loh AdrpLdrGot	Lloh47, Lloh48
	.loh AdrpLdrGotLdr	Lloh49, Lloh50, Lloh51
	.loh AdrpAdd	Lloh52, Lloh53
	.loh AdrpLdrGot	Lloh57, Lloh58
	.loh AdrpLdrGotLdr	Lloh54, Lloh55, Lloh56
	.loh AdrpLdrGotLdr	Lloh59, Lloh60, Lloh61
	.loh AdrpLdrGotLdr	Lloh65, Lloh66, Lloh67
	.loh AdrpLdrGotLdr	Lloh62, Lloh63, Lloh64
	.loh AdrpLdrGotLdr	Lloh68, Lloh69, Lloh70
	.cfi_endproc
                                        ; -- End function
	.comm	_NPHY_BandControl_currentBand,4,2 ; @NPHY_BandControl_currentBand
	.comm	_psm_phy_hdr_param,4,2          ; @psm_phy_hdr_param
	.comm	_MAC_PHY_FORCE_CLK,4,2          ; @MAC_PHY_FORCE_CLK
	.comm	_NPHY_TO_BPHY_OFF,4,2           ; @NPHY_TO_BPHY_OFF
	.comm	_BPHY_BB_CONFIG,4,2             ; @BPHY_BB_CONFIG
	.comm	_BBCFG_RESETCCA,4,2             ; @BBCFG_RESETCCA
	.comm	_BBCFG_RESETRX,4,2              ; @BBCFG_RESETRX
	.comm	_NPHY_ClassifierCtrl_ofdm_en,4,2 ; @NPHY_ClassifierCtrl_ofdm_en
	.comm	_BPHY_TEST,4,2                  ; @BPHY_TEST
	.comm	_PHY_TPC_HW_OFF,8,3             ; @PHY_TPC_HW_OFF
	.comm	_SPURAVOID_DISABLE,8,3          ; @SPURAVOID_DISABLE
	.comm	_BCMA_CHIP_ID_BCM4716,8,3       ; @BCMA_CHIP_ID_BCM4716
	.comm	_BCMA_PKG_ID_BCM4717,8,3        ; @BCMA_PKG_ID_BCM4717
	.comm	_SPURAVOID_FORCEON,8,3          ; @SPURAVOID_FORCEON
	.comm	_BCMA_CHIP_ID_BCM43225,8,3      ; @BCMA_CHIP_ID_BCM43225
	.comm	_BCMA_CHIP_ID_BCM43224,8,3      ; @BCMA_CHIP_ID_BCM43224
	.comm	_tsf_clk_frac_l,4,2             ; @tsf_clk_frac_l
	.comm	_tsf_clk_frac_h,4,2             ; @tsf_clk_frac_h
	.comm	_BCMA_CHIP_ID_BCM47162,8,3      ; @BCMA_CHIP_ID_BCM47162
	.no_dead_strip	_wlc_phy_chanspec_nphy_setup
	.section	__TEXT,__const
	.p2align	2                               ; @switch.table.wlc_phy_chanspec_nphy_setup
l_switch.table.wlc_phy_chanspec_nphy_setup:
	.long	1                               ; 0x1
	.long	1                               ; 0x1
	.long	1                               ; 0x1
	.long	1                               ; 0x1
	.long	0                               ; 0x0
	.long	0                               ; 0x0
	.long	0                               ; 0x0
	.long	0                               ; 0x0
	.long	1                               ; 0x1
	.long	1                               ; 0x1

.subsections_via_symbols
