	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_brcms_c_rspec_to_rts_rspec     ## -- Begin function brcms_c_rspec_to_rts_rspec
	.p2align	4, 0x90
_brcms_c_rspec_to_rts_rspec:            ## @brcms_c_rspec_to_rts_rspec
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%ecx, %r15d
	movl	%esi, %r12d
	movq	%rdi, %r14
	movl	%esi, %ebx
	testl	%edx, %edx
	jne	LBB0_6
## %bb.1:
	movq	8(%r14), %rax
	cmpq	$0, (%rax)
	movl	%r12d, %esi
	je	LBB0_5
## %bb.2:
	movq	16(%r14), %rax
	cmpq	$0, (%rax)
	movl	%r12d, %esi
	je	LBB0_5
## %bb.3:
	movl	%r12d, %edi
	callq	_is_cck_rate
	movl	%r12d, %esi
	testl	%eax, %eax
	jne	LBB0_5
## %bb.4:
	movq	_BRCM_RATE_11M@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
LBB0_5:
	movq	%r14, %rdi
	callq	_brcms_basic_rate
	movl	%eax, %ebx
LBB0_6:
	movq	8(%r14), %rdi
	callq	_BRCMS_PHY_11N_CAP
	testq	%rax, %rax
	je	LBB0_12
## %bb.7:
	movq	_RSPEC_BW_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	notl	%eax
	andl	%eax, %ebx
	movl	%r12d, %edi
	callq	_rspec_is40mhz
	testq	%rax, %rax
	je	LBB0_10
## %bb.8:
	movl	%ebx, %edi
	callq	_is_cck_rate
	testl	%eax, %eax
	jne	LBB0_10
## %bb.9:
	movq	_PHY_TXC1_BW_40MHZ_DUP@GOTPCREL(%rip), %rax
	movl	(%rax), %r15d
LBB0_10:
	movq	_RSPEC_BW_SHIFT@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	shll	%cl, %r15d
	orl	%r15d, %ebx
	movl	%ebx, %edi
	callq	_is_ofdm_rate
	testq	%rax, %rax
	je	LBB0_12
## %bb.11:
	movq	_RSPEC_STF_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	notl	%eax
	andl	%eax, %ebx
	movq	(%r14), %rax
	movl	(%rax), %eax
	movq	_RSPEC_STF_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shll	%cl, %eax
	orl	%eax, %ebx
LBB0_12:
	movl	%ebx, %eax
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_BRCM_RATE_11M,4,2              ## @BRCM_RATE_11M
	.comm	_RSPEC_BW_MASK,4,2              ## @RSPEC_BW_MASK
	.comm	_PHY_TXC1_BW_40MHZ_DUP,4,2      ## @PHY_TXC1_BW_40MHZ_DUP
	.comm	_RSPEC_BW_SHIFT,4,2             ## @RSPEC_BW_SHIFT
	.comm	_RSPEC_STF_MASK,4,2             ## @RSPEC_STF_MASK
	.comm	_RSPEC_STF_SHIFT,4,2            ## @RSPEC_STF_SHIFT
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_brcms_c_rspec_to_rts_rspec     ; -- Begin function brcms_c_rspec_to_rts_rspec
	.p2align	2
_brcms_c_rspec_to_rts_rspec:            ; @brcms_c_rspec_to_rts_rspec
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x20, x3
	mov	x21, x1
	mov	x19, x0
	mov	x22, x1
	cbnz	w2, LBB0_5
; %bb.1:
	ldr	x8, [x19, #8]
	ldr	x8, [x8]
	mov	x1, x21
	cbz	x8, LBB0_4
; %bb.2:
	ldr	x8, [x19, #16]
	ldr	x8, [x8]
	mov	x1, x21
	cbz	x8, LBB0_4
; %bb.3:
	mov	x0, x21
	bl	_is_cck_rate
Lloh0:
	adrp	x8, _BRCM_RATE_11M@GOTPAGE
Lloh1:
	ldr	x8, [x8, _BRCM_RATE_11M@GOTPAGEOFF]
Lloh2:
	ldr	w8, [x8]
	cmp	w0, #0
	csel	w1, w8, w21, eq
LBB0_4:
	mov	x0, x19
	bl	_brcms_basic_rate
	mov	x22, x0
LBB0_5:
	ldr	x0, [x19, #8]
	bl	_BRCMS_PHY_11N_CAP
	cbz	x0, LBB0_10
; %bb.6:
Lloh3:
	adrp	x8, _RSPEC_BW_MASK@GOTPAGE
Lloh4:
	ldr	x8, [x8, _RSPEC_BW_MASK@GOTPAGEOFF]
Lloh5:
	ldr	w8, [x8]
	bic	w22, w22, w8
	mov	x0, x21
	bl	_rspec_is40mhz
	cbz	x0, LBB0_8
; %bb.7:
	mov	x0, x22
	bl	_is_cck_rate
Lloh6:
	adrp	x8, _PHY_TXC1_BW_40MHZ_DUP@GOTPAGE
Lloh7:
	ldr	x8, [x8, _PHY_TXC1_BW_40MHZ_DUP@GOTPAGEOFF]
Lloh8:
	ldr	w8, [x8]
	cmp	w0, #0
	csel	w20, w8, w20, eq
LBB0_8:
Lloh9:
	adrp	x8, _RSPEC_BW_SHIFT@GOTPAGE
Lloh10:
	ldr	x8, [x8, _RSPEC_BW_SHIFT@GOTPAGEOFF]
Lloh11:
	ldr	w8, [x8]
	lsl	w8, w20, w8
	orr	w22, w8, w22
	mov	x0, x22
	bl	_is_ofdm_rate
	cbz	x0, LBB0_10
; %bb.9:
Lloh12:
	adrp	x8, _RSPEC_STF_MASK@GOTPAGE
Lloh13:
	ldr	x8, [x8, _RSPEC_STF_MASK@GOTPAGEOFF]
Lloh14:
	ldr	w8, [x8]
	bic	w8, w22, w8
	ldr	x9, [x19]
	ldr	w9, [x9]
Lloh15:
	adrp	x10, _RSPEC_STF_SHIFT@GOTPAGE
Lloh16:
	ldr	x10, [x10, _RSPEC_STF_SHIFT@GOTPAGEOFF]
Lloh17:
	ldr	w10, [x10]
	lsl	w9, w9, w10
	orr	w22, w9, w8
LBB0_10:
	mov	x0, x22
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.cfi_endproc
                                        ; -- End function
	.comm	_BRCM_RATE_11M,4,2              ; @BRCM_RATE_11M
	.comm	_RSPEC_BW_MASK,4,2              ; @RSPEC_BW_MASK
	.comm	_PHY_TXC1_BW_40MHZ_DUP,4,2      ; @PHY_TXC1_BW_40MHZ_DUP
	.comm	_RSPEC_BW_SHIFT,4,2             ; @RSPEC_BW_SHIFT
	.comm	_RSPEC_STF_MASK,4,2             ; @RSPEC_STF_MASK
	.comm	_RSPEC_STF_SHIFT,4,2            ; @RSPEC_STF_SHIFT
.subsections_via_symbols
