	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function sh_pfc_pinconf_validate
_sh_pfc_pinconf_validate:               ## @sh_pfc_pinconf_validate
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r14
	pushq	%rbx
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	movl	%edx, %ebx
	movq	%rdi, %r14
	callq	_sh_pfc_get_pin_index
	movl	%eax, %ecx
	addl	$-128, %ebx
	xorl	%eax, %eax
	cmpl	$4, %ebx
	ja	LBB0_2
## %bb.1:
	movslq	%ecx, %rcx
	movq	(%r14), %rax
	movq	(%rax), %rdx
	movslq	%ebx, %rax
	leaq	l_switch.table.sh_pfc_pinconf_validate(%rip), %rsi
	movq	(%rsi,%rax,8), %rax
	movl	(%rax), %eax
	andl	(%rdx,%rcx,4), %eax
LBB0_2:
	popq	%rbx
	popq	%r14
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_SH_PFC_PIN_CFG_PULL_UP_DOWN,4,2 ## @SH_PFC_PIN_CFG_PULL_UP_DOWN
	.comm	_SH_PFC_PIN_CFG_PULL_UP,4,2     ## @SH_PFC_PIN_CFG_PULL_UP
	.comm	_SH_PFC_PIN_CFG_PULL_DOWN,4,2   ## @SH_PFC_PIN_CFG_PULL_DOWN
	.comm	_SH_PFC_PIN_CFG_DRIVE_STRENGTH,4,2 ## @SH_PFC_PIN_CFG_DRIVE_STRENGTH
	.comm	_SH_PFC_PIN_CFG_IO_VOLTAGE,4,2  ## @SH_PFC_PIN_CFG_IO_VOLTAGE
	.no_dead_strip	_sh_pfc_pinconf_validate
	.section	__DATA,__const
	.p2align	3                               ## @switch.table.sh_pfc_pinconf_validate
l_switch.table.sh_pfc_pinconf_validate:
	.quad	_SH_PFC_PIN_CFG_IO_VOLTAGE
	.quad	_SH_PFC_PIN_CFG_DRIVE_STRENGTH
	.quad	_SH_PFC_PIN_CFG_PULL_UP
	.quad	_SH_PFC_PIN_CFG_PULL_DOWN
	.quad	_SH_PFC_PIN_CFG_PULL_UP_DOWN

.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function sh_pfc_pinconf_validate
_sh_pfc_pinconf_validate:               ; @sh_pfc_pinconf_validate
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x20, x2
	mov	x19, x0
	bl	_sh_pfc_get_pin_index
	sub	w8, w20, #128
	cmp	w8, #4
	b.hi	LBB0_2
; %bb.1:
	ldr	x9, [x19]
	ldr	x9, [x9]
Lloh0:
	adrp	x10, l_switch.table.sh_pfc_pinconf_validate@PAGE
Lloh1:
	add	x10, x10, l_switch.table.sh_pfc_pinconf_validate@PAGEOFF
	ldr	x8, [x10, w8, sxtw #3]
	ldr	w9, [x9, w0, sxtw #2]
	ldr	w8, [x8]
	and	w0, w8, w9
	b	LBB0_3
LBB0_2:
	mov	w0, #0
LBB0_3:
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	ret
	.loh AdrpAdd	Lloh0, Lloh1
	.cfi_endproc
                                        ; -- End function
	.comm	_SH_PFC_PIN_CFG_PULL_UP_DOWN,4,2 ; @SH_PFC_PIN_CFG_PULL_UP_DOWN
	.comm	_SH_PFC_PIN_CFG_PULL_UP,4,2     ; @SH_PFC_PIN_CFG_PULL_UP
	.comm	_SH_PFC_PIN_CFG_PULL_DOWN,4,2   ; @SH_PFC_PIN_CFG_PULL_DOWN
	.comm	_SH_PFC_PIN_CFG_DRIVE_STRENGTH,4,2 ; @SH_PFC_PIN_CFG_DRIVE_STRENGTH
	.comm	_SH_PFC_PIN_CFG_IO_VOLTAGE,4,2  ; @SH_PFC_PIN_CFG_IO_VOLTAGE
	.no_dead_strip	_sh_pfc_pinconf_validate
	.section	__DATA,__const
	.p2align	3                               ; @switch.table.sh_pfc_pinconf_validate
l_switch.table.sh_pfc_pinconf_validate:
	.quad	_SH_PFC_PIN_CFG_IO_VOLTAGE
	.quad	_SH_PFC_PIN_CFG_DRIVE_STRENGTH
	.quad	_SH_PFC_PIN_CFG_PULL_UP
	.quad	_SH_PFC_PIN_CFG_PULL_DOWN
	.quad	_SH_PFC_PIN_CFG_PULL_UP_DOWN

.subsections_via_symbols
