	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_mlx5e_ipsec_build_netdev       ## -- Begin function mlx5e_ipsec_build_netdev
	.p2align	4, 0x90
_mlx5e_ipsec_build_netdev:              ## @mlx5e_ipsec_build_netdev
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r14
	pushq	%rbx
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	cmpl	$0, (%rdi)
	je	LBB0_11
## %bb.1:
	movq	8(%rdi), %r14
	movq	16(%rdi), %rbx
	movq	%rbx, %rdi
	callq	_mlx5_accel_ipsec_device_caps
	movq	_MLX5_ACCEL_IPSEC_CAP_ESP@GOTPCREL(%rip), %rcx
	testl	%eax, (%rcx)
	je	LBB0_3
## %bb.2:
	movq	_swp@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_MLX5_CAP_ETH
	testl	%eax, %eax
	je	LBB0_3
## %bb.5:
	leaq	L_.str.1(%rip), %rsi
	movq	%rbx, %rdi
	callq	_mlx5_core_info
	movq	_mlx5e_ipsec_xfrmdev_ops@GOTPCREL(%rip), %rax
	movq	%rax, 16(%r14)
	movq	_NETIF_F_HW_ESP@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	orl	%eax, 8(%r14)
	orl	%eax, (%r14)
	movq	_swp_csum@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_MLX5_CAP_ETH
	testl	%eax, %eax
	je	LBB0_6
## %bb.7:
	movq	_NETIF_F_HW_ESP_TX_CSUM@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	orl	%eax, 8(%r14)
	orl	%eax, (%r14)
	movq	%rbx, %rdi
	callq	_mlx5_accel_ipsec_device_caps
	movq	_MLX5_ACCEL_IPSEC_CAP_LSO@GOTPCREL(%rip), %rcx
	testl	%eax, (%rcx)
	je	LBB0_9
## %bb.8:
	movq	_swp_lso@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_MLX5_CAP_ETH
	testl	%eax, %eax
	je	LBB0_9
## %bb.10:
	leaq	L_.str.4(%rip), %rsi
	movq	%rbx, %rdi
	callq	_mlx5_core_dbg
	movq	_NETIF_F_GSO_ESP@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	orl	%eax, 8(%r14)
	orl	%eax, 4(%r14)
	orl	%eax, (%r14)
LBB0_11:
	popq	%rbx
	popq	%r14
	popq	%rbp
	retq
LBB0_3:
	leaq	L_.str(%rip), %rsi
LBB0_4:
	movq	%rbx, %rdi
	popq	%rbx
	popq	%r14
	popq	%rbp
	jmp	_mlx5_core_dbg                  ## TAILCALL
LBB0_6:
	leaq	L_.str.2(%rip), %rsi
	jmp	LBB0_4
LBB0_9:
	leaq	L_.str.3(%rip), %rsi
	jmp	LBB0_4
	.cfi_endproc
                                        ## -- End function
	.comm	_MLX5_ACCEL_IPSEC_CAP_ESP,4,2   ## @MLX5_ACCEL_IPSEC_CAP_ESP
	.comm	_swp,4,2                        ## @swp
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"mlx5e: ESP and SWP offload not supported\n"

L_.str.1:                               ## @.str.1
	.asciz	"mlx5e: IPSec ESP acceleration enabled\n"

	.comm	_mlx5e_ipsec_xfrmdev_ops,4,2    ## @mlx5e_ipsec_xfrmdev_ops
	.comm	_NETIF_F_HW_ESP,4,2             ## @NETIF_F_HW_ESP
	.comm	_swp_csum,4,2                   ## @swp_csum
L_.str.2:                               ## @.str.2
	.asciz	"mlx5e: SWP checksum not supported\n"

	.comm	_NETIF_F_HW_ESP_TX_CSUM,4,2     ## @NETIF_F_HW_ESP_TX_CSUM
	.comm	_MLX5_ACCEL_IPSEC_CAP_LSO,4,2   ## @MLX5_ACCEL_IPSEC_CAP_LSO
	.comm	_swp_lso,4,2                    ## @swp_lso
L_.str.3:                               ## @.str.3
	.asciz	"mlx5e: ESP LSO not supported\n"

L_.str.4:                               ## @.str.4
	.asciz	"mlx5e: ESP GSO capability turned on\n"

	.comm	_NETIF_F_GSO_ESP,4,2            ## @NETIF_F_GSO_ESP
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_mlx5e_ipsec_build_netdev       ; -- Begin function mlx5e_ipsec_build_netdev
	.p2align	2
_mlx5e_ipsec_build_netdev:              ; @mlx5e_ipsec_build_netdev
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	ldr	w8, [x0]
	cbz	w8, LBB0_7
; %bb.1:
	ldp	x20, x19, [x0, #8]
	mov	x0, x19
	bl	_mlx5_accel_ipsec_device_caps
Lloh0:
	adrp	x8, _MLX5_ACCEL_IPSEC_CAP_ESP@GOTPAGE
Lloh1:
	ldr	x8, [x8, _MLX5_ACCEL_IPSEC_CAP_ESP@GOTPAGEOFF]
Lloh2:
	ldr	w8, [x8]
	tst	w8, w0
	b.eq	LBB0_8
; %bb.2:
Lloh3:
	adrp	x8, _swp@GOTPAGE
Lloh4:
	ldr	x8, [x8, _swp@GOTPAGEOFF]
Lloh5:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_MLX5_CAP_ETH
	cbz	w0, LBB0_8
; %bb.3:
Lloh6:
	adrp	x1, l_.str.1@PAGE
Lloh7:
	add	x1, x1, l_.str.1@PAGEOFF
	mov	x0, x19
	bl	_mlx5_core_info
Lloh8:
	adrp	x8, _mlx5e_ipsec_xfrmdev_ops@GOTPAGE
Lloh9:
	ldr	x8, [x8, _mlx5e_ipsec_xfrmdev_ops@GOTPAGEOFF]
	str	x8, [x20, #16]
Lloh10:
	adrp	x8, _NETIF_F_HW_ESP@GOTPAGE
Lloh11:
	ldr	x8, [x8, _NETIF_F_HW_ESP@GOTPAGEOFF]
Lloh12:
	ldr	w8, [x8]
	ldr	w9, [x20, #8]
	orr	w9, w9, w8
	str	w9, [x20, #8]
	ldr	w9, [x20]
	orr	w8, w9, w8
	str	w8, [x20]
Lloh13:
	adrp	x8, _swp_csum@GOTPAGE
Lloh14:
	ldr	x8, [x8, _swp_csum@GOTPAGEOFF]
Lloh15:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_MLX5_CAP_ETH
	cbz	w0, LBB0_10
; %bb.4:
Lloh16:
	adrp	x8, _NETIF_F_HW_ESP_TX_CSUM@GOTPAGE
Lloh17:
	ldr	x8, [x8, _NETIF_F_HW_ESP_TX_CSUM@GOTPAGEOFF]
Lloh18:
	ldr	w8, [x8]
	ldr	w9, [x20, #8]
	orr	w9, w9, w8
	str	w9, [x20, #8]
	ldr	w9, [x20]
	orr	w8, w9, w8
	str	w8, [x20]
	mov	x0, x19
	bl	_mlx5_accel_ipsec_device_caps
Lloh19:
	adrp	x8, _MLX5_ACCEL_IPSEC_CAP_LSO@GOTPAGE
Lloh20:
	ldr	x8, [x8, _MLX5_ACCEL_IPSEC_CAP_LSO@GOTPAGEOFF]
Lloh21:
	ldr	w8, [x8]
	tst	w8, w0
	b.eq	LBB0_11
; %bb.5:
Lloh22:
	adrp	x8, _swp_lso@GOTPAGE
Lloh23:
	ldr	x8, [x8, _swp_lso@GOTPAGEOFF]
Lloh24:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_MLX5_CAP_ETH
	cbz	w0, LBB0_11
; %bb.6:
Lloh25:
	adrp	x1, l_.str.4@PAGE
Lloh26:
	add	x1, x1, l_.str.4@PAGEOFF
	mov	x0, x19
	bl	_mlx5_core_dbg
Lloh27:
	adrp	x8, _NETIF_F_GSO_ESP@GOTPAGE
Lloh28:
	ldr	x8, [x8, _NETIF_F_GSO_ESP@GOTPAGEOFF]
Lloh29:
	ldr	w8, [x8]
	ldr	w9, [x20, #8]
	orr	w9, w9, w8
	str	w9, [x20, #8]
	ldr	d0, [x20]
	dup.2s	v1, w8
	orr.8b	v0, v0, v1
	str	d0, [x20]
LBB0_7:
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	ret
LBB0_8:
Lloh30:
	adrp	x1, l_.str@PAGE
Lloh31:
	add	x1, x1, l_.str@PAGEOFF
LBB0_9:
	mov	x0, x19
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	b	_mlx5_core_dbg
LBB0_10:
Lloh32:
	adrp	x1, l_.str.2@PAGE
Lloh33:
	add	x1, x1, l_.str.2@PAGEOFF
	b	LBB0_9
LBB0_11:
Lloh34:
	adrp	x1, l_.str.3@PAGE
Lloh35:
	add	x1, x1, l_.str.3@PAGEOFF
	b	LBB0_9
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh13, Lloh14, Lloh15
	.loh AdrpLdrGotLdr	Lloh10, Lloh11, Lloh12
	.loh AdrpLdrGot	Lloh8, Lloh9
	.loh AdrpAdd	Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh19, Lloh20, Lloh21
	.loh AdrpLdrGotLdr	Lloh16, Lloh17, Lloh18
	.loh AdrpLdrGotLdr	Lloh22, Lloh23, Lloh24
	.loh AdrpLdrGotLdr	Lloh27, Lloh28, Lloh29
	.loh AdrpAdd	Lloh25, Lloh26
	.loh AdrpAdd	Lloh30, Lloh31
	.loh AdrpAdd	Lloh32, Lloh33
	.loh AdrpAdd	Lloh34, Lloh35
	.cfi_endproc
                                        ; -- End function
	.comm	_MLX5_ACCEL_IPSEC_CAP_ESP,4,2   ; @MLX5_ACCEL_IPSEC_CAP_ESP
	.comm	_swp,4,2                        ; @swp
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"mlx5e: ESP and SWP offload not supported\n"

l_.str.1:                               ; @.str.1
	.asciz	"mlx5e: IPSec ESP acceleration enabled\n"

	.comm	_mlx5e_ipsec_xfrmdev_ops,4,2    ; @mlx5e_ipsec_xfrmdev_ops
	.comm	_NETIF_F_HW_ESP,4,2             ; @NETIF_F_HW_ESP
	.comm	_swp_csum,4,2                   ; @swp_csum
l_.str.2:                               ; @.str.2
	.asciz	"mlx5e: SWP checksum not supported\n"

	.comm	_NETIF_F_HW_ESP_TX_CSUM,4,2     ; @NETIF_F_HW_ESP_TX_CSUM
	.comm	_MLX5_ACCEL_IPSEC_CAP_LSO,4,2   ; @MLX5_ACCEL_IPSEC_CAP_LSO
	.comm	_swp_lso,4,2                    ; @swp_lso
l_.str.3:                               ; @.str.3
	.asciz	"mlx5e: ESP LSO not supported\n"

l_.str.4:                               ; @.str.4
	.asciz	"mlx5e: ESP GSO capability turned on\n"

	.comm	_NETIF_F_GSO_ESP,4,2            ; @NETIF_F_GSO_ESP
.subsections_via_symbols
