	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_mvpp2_prs_vid_entry_add        ## -- Begin function mvpp2_prs_vid_entry_add
	.p2align	4, 0x90
_mvpp2_prs_vid_entry_add:               ## @mvpp2_prs_vid_entry_add
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$24, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%esi, %ebx
	movq	%rdi, %r12
	movq	_MVPP2_PE_VID_FILT_RANGE_START@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, -52(%rbp)                 ## 4-byte Spill
	movl	(%rdi), %eax
	movl	%eax, -56(%rbp)                 ## 4-byte Spill
	movq	_MVPP2_PRS_VLAN_FILT_MAX@GOTPCREL(%rip), %rax
	movl	(%rax), %r13d
	movq	8(%rdi), %r15
	leaq	-48(%rbp), %rdi
	xorl	%esi, %esi
	movl	$4, %edx
	callq	_memset
	movq	%r12, %rdi
	movl	%ebx, -60(%rbp)                 ## 4-byte Spill
	movl	%ebx, %esi
	movl	$4095, %edx                     ## imm = 0xFFF
	callq	_mvpp2_prs_vid_range_find
	movl	%eax, %r14d
	movl	(%r12), %edi
	callq	_MVPP2_MH_REG
	movq	%r15, %rdi
	movl	%eax, %esi
	callq	_mvpp2_read
	movq	_MVPP2_DSA_EXTENDED@GOTPCREL(%rip), %rcx
	testl	%eax, (%rcx)
	jne	LBB0_1
## %bb.2:
	movq	_MVPP2_VLAN_TAG_LEN@GOTPCREL(%rip), %rax
	jmp	LBB0_3
LBB0_1:
	movq	_MVPP2_VLAN_TAG_EDSA_LEN@GOTPCREL(%rip), %rax
LBB0_3:
	movl	(%rax), %ebx
	testl	%r14d, %r14d
	js	LBB0_4
## %bb.6:
	movl	%ebx, -52(%rbp)                 ## 4-byte Spill
	leaq	-48(%rbp), %rsi
	movq	%r15, %rdi
	movl	%r14d, %edx
	callq	_mvpp2_prs_init_from_hw
	jmp	LBB0_7
LBB0_4:
	imull	-56(%rbp), %r13d                ## 4-byte Folded Reload
	addl	-52(%rbp), %r13d                ## 4-byte Folded Reload
	movq	_MVPP2_PRS_VLAN_FILT_MAX_ENTRY@GOTPCREL(%rip), %rax
	movq	(%rax), %rdx
	addq	%r13, %rdx
	movq	%r15, %rdi
	movl	%r13d, %esi
	callq	_mvpp2_prs_tcam_first_free
	movl	%eax, %r13d
	testl	%eax, %eax
	js	LBB0_8
## %bb.5:
	movl	%ebx, -52(%rbp)                 ## 4-byte Spill
	movq	_MVPP2_PRS_LU_VID@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	leaq	-48(%rbp), %r14
	movq	%r14, %rdi
	callq	_mvpp2_prs_tcam_lu_set
	movl	%r13d, -48(%rbp)
	movq	%r14, %rdi
	xorl	%esi, %esi
	callq	_mvpp2_prs_tcam_port_map_set
LBB0_7:
	movl	(%r12), %esi
	leaq	-48(%rbp), %rbx
	movq	%rbx, %rdi
	movl	$1, %edx
	callq	_mvpp2_prs_tcam_port_set
	movq	_MVPP2_PRS_LU_L2@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_mvpp2_prs_sram_next_lu_set
	movq	_MVPP2_PRS_SRAM_OP_SEL_SHIFT_ADD@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	movl	-52(%rbp), %esi                 ## 4-byte Reload
	callq	_mvpp2_prs_sram_shift_set
	movq	_MVPP2_PRS_VID_TCAM_BYTE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	movl	-60(%rbp), %edx                 ## 4-byte Reload
	callq	_mvpp2_prs_match_vid
	movq	_MVPP2_PRS_SRAM_AI_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	xorl	%r13d, %r13d
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	_mvpp2_prs_sram_ai_update
	movl	-48(%rbp), %esi
	movq	_MVPP2_PRS_LU_VID@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r15, %rdi
	callq	_mvpp2_prs_shadow_set
	movq	%r15, %rdi
	movq	%rbx, %rsi
	callq	_mvpp2_prs_hw_write
LBB0_8:
	movl	%r13d, %eax
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_MVPP2_PE_VID_FILT_RANGE_START,4,2 ## @MVPP2_PE_VID_FILT_RANGE_START
	.comm	_MVPP2_PRS_VLAN_FILT_MAX,4,2    ## @MVPP2_PRS_VLAN_FILT_MAX
	.comm	_MVPP2_DSA_EXTENDED,4,2         ## @MVPP2_DSA_EXTENDED
	.comm	_MVPP2_VLAN_TAG_EDSA_LEN,4,2    ## @MVPP2_VLAN_TAG_EDSA_LEN
	.comm	_MVPP2_VLAN_TAG_LEN,4,2         ## @MVPP2_VLAN_TAG_LEN
	.comm	_MVPP2_PRS_VLAN_FILT_MAX_ENTRY,8,3 ## @MVPP2_PRS_VLAN_FILT_MAX_ENTRY
	.comm	_MVPP2_PRS_LU_VID,4,2           ## @MVPP2_PRS_LU_VID
	.comm	_MVPP2_PRS_LU_L2,4,2            ## @MVPP2_PRS_LU_L2
	.comm	_MVPP2_PRS_SRAM_OP_SEL_SHIFT_ADD,4,2 ## @MVPP2_PRS_SRAM_OP_SEL_SHIFT_ADD
	.comm	_MVPP2_PRS_VID_TCAM_BYTE,4,2    ## @MVPP2_PRS_VID_TCAM_BYTE
	.comm	_MVPP2_PRS_SRAM_AI_MASK,4,2     ## @MVPP2_PRS_SRAM_AI_MASK
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_mvpp2_prs_vid_entry_add        ; -- Begin function mvpp2_prs_vid_entry_add
	.p2align	2
_mvpp2_prs_vid_entry_add:               ; @mvpp2_prs_vid_entry_add
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #112
	.cfi_def_cfa_offset 112
	stp	x28, x27, [sp, #16]             ; 16-byte Folded Spill
	stp	x26, x25, [sp, #32]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #48]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #64]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #80]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #96]             ; 16-byte Folded Spill
	add	x29, sp, #96
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	mov	x20, x1
	mov	x21, x0
Lloh0:
	adrp	x8, _MVPP2_PE_VID_FILT_RANGE_START@GOTPAGE
Lloh1:
	ldr	x8, [x8, _MVPP2_PE_VID_FILT_RANGE_START@GOTPAGEOFF]
Lloh2:
	ldr	w25, [x8]
	ldr	w26, [x0]
Lloh3:
	adrp	x8, _MVPP2_PRS_VLAN_FILT_MAX@GOTPAGE
Lloh4:
	ldr	x8, [x8, _MVPP2_PRS_VLAN_FILT_MAX@GOTPAGEOFF]
Lloh5:
	ldr	w27, [x8]
	ldr	x19, [x0, #8]
	add	x0, sp, #8
	mov	w1, #0
	mov	w2, #4
	bl	_memset
	mov	x0, x21
	mov	x1, x20
	mov	w2, #4095
	bl	_mvpp2_prs_vid_range_find
	mov	x23, x0
	ldr	w0, [x21]
	bl	_MVPP2_MH_REG
	mov	x1, x0
	mov	x0, x19
	bl	_mvpp2_read
Lloh6:
	adrp	x8, _MVPP2_DSA_EXTENDED@GOTPAGE
Lloh7:
	ldr	x8, [x8, _MVPP2_DSA_EXTENDED@GOTPAGEOFF]
Lloh8:
	adrp	x9, _MVPP2_VLAN_TAG_LEN@GOTPAGE
Lloh9:
	ldr	x9, [x9, _MVPP2_VLAN_TAG_LEN@GOTPAGEOFF]
Lloh10:
	adrp	x10, _MVPP2_VLAN_TAG_EDSA_LEN@GOTPAGE
Lloh11:
	ldr	x10, [x10, _MVPP2_VLAN_TAG_EDSA_LEN@GOTPAGEOFF]
Lloh12:
	ldr	w8, [x8]
	tst	w8, w0
	csel	x8, x9, x10, eq
	ldr	w22, [x8]
Lloh13:
	adrp	x24, _MVPP2_PRS_LU_VID@GOTPAGE
Lloh14:
	ldr	x24, [x24, _MVPP2_PRS_LU_VID@GOTPAGEOFF]
	tbnz	w23, #31, LBB0_2
; %bb.1:
	add	x1, sp, #8
	mov	x0, x19
	mov	x2, x23
	bl	_mvpp2_prs_init_from_hw
	b	LBB0_4
LBB0_2:
	madd	w1, w27, w26, w25
Lloh15:
	adrp	x8, _MVPP2_PRS_VLAN_FILT_MAX_ENTRY@GOTPAGE
Lloh16:
	ldr	x8, [x8, _MVPP2_PRS_VLAN_FILT_MAX_ENTRY@GOTPAGEOFF]
Lloh17:
	ldr	x8, [x8]
	add	x2, x8, x1
	mov	x0, x19
                                        ; kill: def $w1 killed $w1 killed $x1
	bl	_mvpp2_prs_tcam_first_free
	mov	x23, x0
	tbnz	w0, #31, LBB0_5
; %bb.3:
	ldr	w1, [x24]
	add	x0, sp, #8
	bl	_mvpp2_prs_tcam_lu_set
	str	w23, [sp, #8]
	add	x0, sp, #8
	mov	w1, #0
	bl	_mvpp2_prs_tcam_port_map_set
LBB0_4:
	ldr	w1, [x21]
	add	x0, sp, #8
	mov	w2, #1
	bl	_mvpp2_prs_tcam_port_set
Lloh18:
	adrp	x8, _MVPP2_PRS_LU_L2@GOTPAGE
Lloh19:
	ldr	x8, [x8, _MVPP2_PRS_LU_L2@GOTPAGEOFF]
Lloh20:
	ldr	w1, [x8]
	add	x0, sp, #8
	bl	_mvpp2_prs_sram_next_lu_set
Lloh21:
	adrp	x8, _MVPP2_PRS_SRAM_OP_SEL_SHIFT_ADD@GOTPAGE
Lloh22:
	ldr	x8, [x8, _MVPP2_PRS_SRAM_OP_SEL_SHIFT_ADD@GOTPAGEOFF]
Lloh23:
	ldr	w2, [x8]
	add	x0, sp, #8
	mov	x1, x22
	bl	_mvpp2_prs_sram_shift_set
Lloh24:
	adrp	x8, _MVPP2_PRS_VID_TCAM_BYTE@GOTPAGE
Lloh25:
	ldr	x8, [x8, _MVPP2_PRS_VID_TCAM_BYTE@GOTPAGEOFF]
Lloh26:
	ldr	w1, [x8]
	add	x0, sp, #8
	mov	x2, x20
	bl	_mvpp2_prs_match_vid
Lloh27:
	adrp	x8, _MVPP2_PRS_SRAM_AI_MASK@GOTPAGE
Lloh28:
	ldr	x8, [x8, _MVPP2_PRS_SRAM_AI_MASK@GOTPAGEOFF]
Lloh29:
	ldr	w2, [x8]
	add	x0, sp, #8
	mov	w1, #0
	bl	_mvpp2_prs_sram_ai_update
	ldr	w1, [sp, #8]
	ldr	w2, [x24]
	mov	x0, x19
	bl	_mvpp2_prs_shadow_set
	add	x1, sp, #8
	mov	x0, x19
	bl	_mvpp2_prs_hw_write
	mov	w23, #0
LBB0_5:
	mov	x0, x23
	ldp	x29, x30, [sp, #96]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #80]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #64]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #48]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #32]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #112
	ret
	.loh AdrpLdrGot	Lloh13, Lloh14
	.loh AdrpLdrGot	Lloh10, Lloh11
	.loh AdrpLdrGot	Lloh8, Lloh9
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh12
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh27, Lloh28, Lloh29
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.cfi_endproc
                                        ; -- End function
	.comm	_MVPP2_PE_VID_FILT_RANGE_START,4,2 ; @MVPP2_PE_VID_FILT_RANGE_START
	.comm	_MVPP2_PRS_VLAN_FILT_MAX,4,2    ; @MVPP2_PRS_VLAN_FILT_MAX
	.comm	_MVPP2_DSA_EXTENDED,4,2         ; @MVPP2_DSA_EXTENDED
	.comm	_MVPP2_VLAN_TAG_EDSA_LEN,4,2    ; @MVPP2_VLAN_TAG_EDSA_LEN
	.comm	_MVPP2_VLAN_TAG_LEN,4,2         ; @MVPP2_VLAN_TAG_LEN
	.comm	_MVPP2_PRS_VLAN_FILT_MAX_ENTRY,8,3 ; @MVPP2_PRS_VLAN_FILT_MAX_ENTRY
	.comm	_MVPP2_PRS_LU_VID,4,2           ; @MVPP2_PRS_LU_VID
	.comm	_MVPP2_PRS_LU_L2,4,2            ; @MVPP2_PRS_LU_L2
	.comm	_MVPP2_PRS_SRAM_OP_SEL_SHIFT_ADD,4,2 ; @MVPP2_PRS_SRAM_OP_SEL_SHIFT_ADD
	.comm	_MVPP2_PRS_VID_TCAM_BYTE,4,2    ; @MVPP2_PRS_VID_TCAM_BYTE
	.comm	_MVPP2_PRS_SRAM_AI_MASK,4,2     ; @MVPP2_PRS_SRAM_AI_MASK
.subsections_via_symbols
