	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function ltq_vrx200_pcie_phy_init
_ltq_vrx200_pcie_phy_init:              ## @ltq_vrx200_pcie_phy_init
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r14
	pushq	%rbx
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	callq	_phy_get_drvdata
	movq	%rax, %r14
	movq	24(%rax), %rax
	movl	(%rax), %edi
	callq	_of_device_is_big_endian
	xorl	%ecx, %ecx
	testq	%rax, %rax
	movl	16(%r14), %edi
	movl	(%r14), %edx
	movl	12(%r14), %esi
	cmovnel	%edx, %ecx
	callq	_regmap_update_bits
	movl	4(%r14), %edi
	callq	_reset_control_assert
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	LBB0_5
## %bb.1:
	movl	$1, %edi
	callq	_udelay
	movl	4(%r14), %edi
	callq	_reset_control_deassert
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	LBB0_5
## %bb.2:
	movl	$1, %edi
	callq	_udelay
	movl	8(%r14), %edi
	callq	_reset_control_deassert
	testl	%eax, %eax
	je	LBB0_3
## %bb.4:
	movl	%eax, %ebx
	movl	4(%r14), %edi
	callq	_reset_control_assert
	jmp	LBB0_5
LBB0_3:
	movl	$20, %edi
	movl	$40, %esi
	callq	_usleep_range
	xorl	%ebx, %ebx
LBB0_5:
	movl	%ebx, %eax
	popq	%rbx
	popq	%r14
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.no_dead_strip	_ltq_vrx200_pcie_phy_init
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function ltq_vrx200_pcie_phy_init
_ltq_vrx200_pcie_phy_init:              ; @ltq_vrx200_pcie_phy_init
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	bl	_phy_get_drvdata
	mov	x19, x0
	ldr	x8, [x0, #24]
	ldr	w0, [x8]
	bl	_of_device_is_big_endian
	ldp	w1, w8, [x19, #12]
	ldr	w2, [x19]
	cmp	x0, #0
	csel	w3, wzr, w2, eq
	mov	x0, x8
	bl	_regmap_update_bits
	ldr	w0, [x19, #4]
	bl	_reset_control_assert
	mov	x20, x0
	cbnz	w0, LBB0_5
; %bb.1:
	mov	w0, #1
	bl	_udelay
	ldr	w0, [x19, #4]
	bl	_reset_control_deassert
	mov	x20, x0
	cbnz	w0, LBB0_5
; %bb.2:
	mov	w0, #1
	bl	_udelay
	ldr	w0, [x19, #8]
	bl	_reset_control_deassert
	mov	x20, x0
	cbz	w0, LBB0_4
; %bb.3:
	ldr	w0, [x19, #4]
	bl	_reset_control_assert
	b	LBB0_5
LBB0_4:
	mov	w0, #20
	mov	w1, #40
	bl	_usleep_range
LBB0_5:
	mov	x0, x20
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	ret
	.cfi_endproc
                                        ; -- End function
	.no_dead_strip	_ltq_vrx200_pcie_phy_init
.subsections_via_symbols
