	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function pmic_gpio_set_mux
_pmic_gpio_set_mux:                     ## @pmic_gpio_set_mux
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%edx, %r15d
	movl	%esi, %r12d
	movq	%rdi, %rbx
	callq	_pinctrl_dev_get_drvdata
	movq	%rax, %r14
	movq	_PMIC_GPIO_FUNC_INDEX_DTEST4@GOTPCREL(%rip), %rax
	cmpl	%r12d, (%rax)
	jae	LBB0_2
## %bb.1:
	leaq	L_.str(%rip), %rdi
	xorl	%ebx, %ebx
	movl	%r12d, %esi
	xorl	%eax, %eax
	callq	_pr_err
LBB0_6:
	movq	_EINVAL@GOTPCREL(%rip), %rax
	subl	(%rax), %ebx
	jmp	LBB0_24
LBB0_2:
	movq	(%rbx), %rax
	movq	(%rax), %rax
	movl	%r15d, %ecx
	movq	(%rax,%rcx,8), %r15
	movq	16(%r15), %rcx
	testq	%rcx, %rcx
	je	LBB0_3
LBB0_9:
	movl	%r12d, (%r15)
	cmpq	$0, 40(%r15)
	je	LBB0_11
## %bb.10:
	movq	_PMIC_GPIO_MODE_ANALOG_PASS_THRU@GOTPCREL(%rip), %rax
LBB0_16:
	movl	(%rax), %eax
	testq	%rcx, %rcx
	je	LBB0_22
## %bb.17:
	movq	_PMIC_GPIO_REG_MODE_CTL@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	movq	%r14, %rdi
	movq	%r15, %rsi
	movl	%eax, %ecx
	callq	_pmic_gpio_write
	testl	%eax, %eax
	js	LBB0_23
## %bb.18:
	movl	4(%r15), %ecx
	decl	%ecx
	movq	_PMIC_GPIO_REG_LV_MV_ANA_PASS_THRU_SEL@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r14, %rdi
	movq	%r15, %rsi
	callq	_pmic_gpio_write
	testl	%eax, %eax
	js	LBB0_23
## %bb.19:
	movl	8(%r15), %eax
	movq	_PMIC_GPIO_LV_MV_OUTPUT_INVERT_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shll	%cl, %eax
	movq	_PMIC_GPIO_LV_MV_OUTPUT_SOURCE_SEL_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	andl	(%r15), %ecx
	orl	%eax, %ecx
	movq	_PMIC_GPIO_REG_LV_MV_DIG_OUT_SOURCE_CTL@GOTPCREL(%rip), %rax
	jmp	LBB0_20
LBB0_3:
	movq	_PMIC_GPIO_FUNC_INDEX_FUNC3@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	cmpl	%r12d, %eax
	je	LBB0_5
## %bb.4:
	movq	_PMIC_GPIO_FUNC_INDEX_FUNC4@GOTPCREL(%rip), %rdx
	cmpl	%r12d, (%rdx)
	je	LBB0_5
## %bb.7:
	movq	_PMIC_GPIO_FUNC_INDEX_DTEST1@GOTPCREL(%rip), %rdx
	movl	(%rdx), %edx
	cmpl	%r12d, %edx
	ja	LBB0_9
## %bb.8:
	addl	%r12d, %eax
	subl	%edx, %eax
	movl	%eax, %r12d
	jmp	LBB0_9
LBB0_11:
	cmpq	$0, 24(%r15)
	je	LBB0_12
## %bb.13:
	cmpq	$0, 32(%r15)
	je	LBB0_15
## %bb.14:
	movq	_PMIC_GPIO_MODE_DIGITAL_INPUT_OUTPUT@GOTPCREL(%rip), %rax
	jmp	LBB0_16
LBB0_22:
	movq	_PMIC_GPIO_REG_MODE_DIR_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shll	%cl, %eax
	movq	_PMIC_GPIO_REG_MODE_FUNCTION_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shll	%cl, %r12d
	movq	_PMIC_GPIO_REG_MODE_VALUE_SHIFT@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	andl	8(%r15), %ecx
	orl	%eax, %r12d
	orl	%r12d, %ecx
	movq	_PMIC_GPIO_REG_MODE_CTL@GOTPCREL(%rip), %rax
LBB0_20:
	movl	(%rax), %edx
	movq	%r14, %rdi
	movq	%r15, %rsi
	callq	_pmic_gpio_write
	testl	%eax, %eax
	js	LBB0_23
## %bb.21:
	movl	12(%r15), %eax
	movq	_PMIC_GPIO_REG_MASTER_EN_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shll	%cl, %eax
	movq	_PMIC_GPIO_REG_EN_CTL@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	movq	%r14, %rdi
	movq	%r15, %rsi
	movl	%eax, %ecx
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_pmic_gpio_write                ## TAILCALL
LBB0_23:
	movl	%eax, %ebx
LBB0_24:
	movl	%ebx, %eax
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_5:
	leaq	L_.str.1(%rip), %rdi
	xorl	%ebx, %ebx
	xorl	%eax, %eax
	callq	_pr_err
	jmp	LBB0_6
LBB0_12:
	movq	_PMIC_GPIO_MODE_DIGITAL_INPUT@GOTPCREL(%rip), %rax
	jmp	LBB0_16
LBB0_15:
	movq	_PMIC_GPIO_MODE_DIGITAL_OUTPUT@GOTPCREL(%rip), %rax
	jmp	LBB0_16
	.cfi_endproc
                                        ## -- End function
	.comm	_PMIC_GPIO_FUNC_INDEX_DTEST4,4,2 ## @PMIC_GPIO_FUNC_INDEX_DTEST4
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"function: %d is not defined\n"

	.comm	_EINVAL,4,2                     ## @EINVAL
	.comm	_PMIC_GPIO_FUNC_INDEX_FUNC3,4,2 ## @PMIC_GPIO_FUNC_INDEX_FUNC3
	.comm	_PMIC_GPIO_FUNC_INDEX_FUNC4,4,2 ## @PMIC_GPIO_FUNC_INDEX_FUNC4
L_.str.1:                               ## @.str.1
	.asciz	"LV/MV subtype doesn't have func3/func4\n"

	.comm	_PMIC_GPIO_FUNC_INDEX_DTEST1,4,2 ## @PMIC_GPIO_FUNC_INDEX_DTEST1
	.comm	_PMIC_GPIO_MODE_ANALOG_PASS_THRU,4,2 ## @PMIC_GPIO_MODE_ANALOG_PASS_THRU
	.comm	_PMIC_GPIO_MODE_DIGITAL_INPUT_OUTPUT,4,2 ## @PMIC_GPIO_MODE_DIGITAL_INPUT_OUTPUT
	.comm	_PMIC_GPIO_MODE_DIGITAL_OUTPUT,4,2 ## @PMIC_GPIO_MODE_DIGITAL_OUTPUT
	.comm	_PMIC_GPIO_MODE_DIGITAL_INPUT,4,2 ## @PMIC_GPIO_MODE_DIGITAL_INPUT
	.comm	_PMIC_GPIO_REG_MODE_CTL,4,2     ## @PMIC_GPIO_REG_MODE_CTL
	.comm	_PMIC_GPIO_REG_LV_MV_ANA_PASS_THRU_SEL,4,2 ## @PMIC_GPIO_REG_LV_MV_ANA_PASS_THRU_SEL
	.comm	_PMIC_GPIO_LV_MV_OUTPUT_INVERT_SHIFT,4,2 ## @PMIC_GPIO_LV_MV_OUTPUT_INVERT_SHIFT
	.comm	_PMIC_GPIO_LV_MV_OUTPUT_SOURCE_SEL_MASK,4,2 ## @PMIC_GPIO_LV_MV_OUTPUT_SOURCE_SEL_MASK
	.comm	_PMIC_GPIO_REG_LV_MV_DIG_OUT_SOURCE_CTL,4,2 ## @PMIC_GPIO_REG_LV_MV_DIG_OUT_SOURCE_CTL
	.comm	_PMIC_GPIO_REG_MODE_DIR_SHIFT,4,2 ## @PMIC_GPIO_REG_MODE_DIR_SHIFT
	.comm	_PMIC_GPIO_REG_MODE_FUNCTION_SHIFT,4,2 ## @PMIC_GPIO_REG_MODE_FUNCTION_SHIFT
	.comm	_PMIC_GPIO_REG_MODE_VALUE_SHIFT,4,2 ## @PMIC_GPIO_REG_MODE_VALUE_SHIFT
	.comm	_PMIC_GPIO_REG_MASTER_EN_SHIFT,4,2 ## @PMIC_GPIO_REG_MASTER_EN_SHIFT
	.comm	_PMIC_GPIO_REG_EN_CTL,4,2       ## @PMIC_GPIO_REG_EN_CTL
	.no_dead_strip	_pmic_gpio_set_mux
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function pmic_gpio_set_mux
_pmic_gpio_set_mux:                     ; @pmic_gpio_set_mux
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #64
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x20, x2
	mov	x21, x1
	mov	x22, x0
	bl	_pinctrl_dev_get_drvdata
Lloh0:
	adrp	x8, _PMIC_GPIO_FUNC_INDEX_DTEST4@GOTPAGE
Lloh1:
	ldr	x8, [x8, _PMIC_GPIO_FUNC_INDEX_DTEST4@GOTPAGEOFF]
Lloh2:
	ldr	w8, [x8]
	cmp	w8, w21
	b.hs	LBB0_4
; %bb.1:
	str	x21, [sp]
Lloh3:
	adrp	x0, l_.str@PAGE
Lloh4:
	add	x0, x0, l_.str@PAGEOFF
LBB0_2:
	bl	_pr_err
Lloh5:
	adrp	x8, _EINVAL@GOTPAGE
Lloh6:
	ldr	x8, [x8, _EINVAL@GOTPAGEOFF]
Lloh7:
	ldr	w8, [x8]
	neg	w0, w8
LBB0_3:
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #64
	ret
LBB0_4:
	mov	x19, x0
	ldr	x8, [x22]
	ldr	x8, [x8]
	ldr	x20, [x8, w20, uxtw #3]
	ldr	x8, [x20, #16]
	cbnz	x8, LBB0_8
; %bb.5:
Lloh8:
	adrp	x9, _PMIC_GPIO_FUNC_INDEX_FUNC3@GOTPAGE
Lloh9:
	ldr	x9, [x9, _PMIC_GPIO_FUNC_INDEX_FUNC3@GOTPAGEOFF]
Lloh10:
	ldr	w9, [x9]
Lloh11:
	adrp	x10, _PMIC_GPIO_FUNC_INDEX_FUNC4@GOTPAGE
Lloh12:
	ldr	x10, [x10, _PMIC_GPIO_FUNC_INDEX_FUNC4@GOTPAGEOFF]
Lloh13:
	ldr	w10, [x10]
	cmp	w9, w21
	ccmp	w10, w21, #4, ne
	b.ne	LBB0_7
; %bb.6:
Lloh14:
	adrp	x0, l_.str.1@PAGE
Lloh15:
	add	x0, x0, l_.str.1@PAGEOFF
	b	LBB0_2
LBB0_7:
Lloh16:
	adrp	x10, _PMIC_GPIO_FUNC_INDEX_DTEST1@GOTPAGE
Lloh17:
	ldr	x10, [x10, _PMIC_GPIO_FUNC_INDEX_DTEST1@GOTPAGEOFF]
Lloh18:
	ldr	w10, [x10]
	add	w9, w9, w21
	sub	w9, w9, w10
	cmp	w10, w21
	csel	w21, w21, w9, hi
LBB0_8:
	str	w21, [x20]
	ldr	x9, [x20, #40]
	cbz	x9, LBB0_14
; %bb.9:
Lloh19:
	adrp	x9, _PMIC_GPIO_MODE_ANALOG_PASS_THRU@GOTPAGE
Lloh20:
	ldr	x9, [x9, _PMIC_GPIO_MODE_ANALOG_PASS_THRU@GOTPAGEOFF]
LBB0_10:
	ldr	w3, [x9]
	cbz	x8, LBB0_17
; %bb.11:
Lloh21:
	adrp	x8, _PMIC_GPIO_REG_MODE_CTL@GOTPAGE
Lloh22:
	ldr	x8, [x8, _PMIC_GPIO_REG_MODE_CTL@GOTPAGEOFF]
Lloh23:
	ldr	w2, [x8]
	mov	x0, x19
	mov	x1, x20
	bl	_pmic_gpio_write
	tbnz	w0, #31, LBB0_3
; %bb.12:
	ldr	w8, [x20, #4]
	sub	w3, w8, #1
Lloh24:
	adrp	x8, _PMIC_GPIO_REG_LV_MV_ANA_PASS_THRU_SEL@GOTPAGE
Lloh25:
	ldr	x8, [x8, _PMIC_GPIO_REG_LV_MV_ANA_PASS_THRU_SEL@GOTPAGEOFF]
Lloh26:
	ldr	w2, [x8]
	mov	x0, x19
	mov	x1, x20
	bl	_pmic_gpio_write
	tbnz	w0, #31, LBB0_3
; %bb.13:
Lloh27:
	adrp	x8, _PMIC_GPIO_LV_MV_OUTPUT_INVERT_SHIFT@GOTPAGE
Lloh28:
	ldr	x8, [x8, _PMIC_GPIO_LV_MV_OUTPUT_INVERT_SHIFT@GOTPAGEOFF]
	ldr	w9, [x20, #8]
Lloh29:
	ldr	w8, [x8]
	lsl	w8, w9, w8
	ldr	w9, [x20]
Lloh30:
	adrp	x10, _PMIC_GPIO_LV_MV_OUTPUT_SOURCE_SEL_MASK@GOTPAGE
Lloh31:
	ldr	x10, [x10, _PMIC_GPIO_LV_MV_OUTPUT_SOURCE_SEL_MASK@GOTPAGEOFF]
Lloh32:
	ldr	w10, [x10]
	and	w9, w10, w9
	orr	w3, w9, w8
Lloh33:
	adrp	x8, _PMIC_GPIO_REG_LV_MV_DIG_OUT_SOURCE_CTL@GOTPAGE
Lloh34:
	ldr	x8, [x8, _PMIC_GPIO_REG_LV_MV_DIG_OUT_SOURCE_CTL@GOTPAGEOFF]
	b	LBB0_18
LBB0_14:
	ldr	x9, [x20, #24]
	cbz	x9, LBB0_20
; %bb.15:
	ldr	x9, [x20, #32]
	cbz	x9, LBB0_21
; %bb.16:
Lloh35:
	adrp	x9, _PMIC_GPIO_MODE_DIGITAL_INPUT_OUTPUT@GOTPAGE
Lloh36:
	ldr	x9, [x9, _PMIC_GPIO_MODE_DIGITAL_INPUT_OUTPUT@GOTPAGEOFF]
	b	LBB0_10
LBB0_17:
Lloh37:
	adrp	x8, _PMIC_GPIO_REG_MODE_DIR_SHIFT@GOTPAGE
Lloh38:
	ldr	x8, [x8, _PMIC_GPIO_REG_MODE_DIR_SHIFT@GOTPAGEOFF]
Lloh39:
	ldr	w8, [x8]
	lsl	w8, w3, w8
Lloh40:
	adrp	x9, _PMIC_GPIO_REG_MODE_FUNCTION_SHIFT@GOTPAGE
Lloh41:
	ldr	x9, [x9, _PMIC_GPIO_REG_MODE_FUNCTION_SHIFT@GOTPAGEOFF]
Lloh42:
	ldr	w9, [x9]
	lsl	w9, w21, w9
	orr	w8, w9, w8
	ldr	w9, [x20, #8]
Lloh43:
	adrp	x10, _PMIC_GPIO_REG_MODE_VALUE_SHIFT@GOTPAGE
Lloh44:
	ldr	x10, [x10, _PMIC_GPIO_REG_MODE_VALUE_SHIFT@GOTPAGEOFF]
Lloh45:
	ldr	w10, [x10]
	and	w9, w10, w9
	orr	w3, w8, w9
Lloh46:
	adrp	x8, _PMIC_GPIO_REG_MODE_CTL@GOTPAGE
Lloh47:
	ldr	x8, [x8, _PMIC_GPIO_REG_MODE_CTL@GOTPAGEOFF]
LBB0_18:
	ldr	w2, [x8]
	mov	x0, x19
	mov	x1, x20
	bl	_pmic_gpio_write
	tbnz	w0, #31, LBB0_3
; %bb.19:
	ldr	w8, [x20, #12]
Lloh48:
	adrp	x9, _PMIC_GPIO_REG_MASTER_EN_SHIFT@GOTPAGE
Lloh49:
	ldr	x9, [x9, _PMIC_GPIO_REG_MASTER_EN_SHIFT@GOTPAGEOFF]
Lloh50:
	ldr	w9, [x9]
Lloh51:
	adrp	x10, _PMIC_GPIO_REG_EN_CTL@GOTPAGE
Lloh52:
	ldr	x10, [x10, _PMIC_GPIO_REG_EN_CTL@GOTPAGEOFF]
	lsl	w3, w8, w9
Lloh53:
	ldr	w2, [x10]
	mov	x0, x19
	mov	x1, x20
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #64
	b	_pmic_gpio_write
LBB0_20:
Lloh54:
	adrp	x9, _PMIC_GPIO_MODE_DIGITAL_INPUT@GOTPAGE
Lloh55:
	ldr	x9, [x9, _PMIC_GPIO_MODE_DIGITAL_INPUT@GOTPAGEOFF]
	b	LBB0_10
LBB0_21:
Lloh56:
	adrp	x9, _PMIC_GPIO_MODE_DIGITAL_OUTPUT@GOTPAGE
Lloh57:
	ldr	x9, [x9, _PMIC_GPIO_MODE_DIGITAL_OUTPUT@GOTPAGEOFF]
	b	LBB0_10
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpAdd	Lloh3, Lloh4
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpAdd	Lloh14, Lloh15
	.loh AdrpLdrGotLdr	Lloh16, Lloh17, Lloh18
	.loh AdrpLdrGot	Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.loh AdrpLdrGot	Lloh33, Lloh34
	.loh AdrpLdrGotLdr	Lloh30, Lloh31, Lloh32
	.loh AdrpLdrGotLdr	Lloh27, Lloh28, Lloh29
	.loh AdrpLdrGot	Lloh35, Lloh36
	.loh AdrpLdrGot	Lloh46, Lloh47
	.loh AdrpLdrGotLdr	Lloh43, Lloh44, Lloh45
	.loh AdrpLdrGotLdr	Lloh40, Lloh41, Lloh42
	.loh AdrpLdrGotLdr	Lloh37, Lloh38, Lloh39
	.loh AdrpLdrGotLdr	Lloh51, Lloh52, Lloh53
	.loh AdrpLdrGotLdr	Lloh48, Lloh49, Lloh50
	.loh AdrpLdrGot	Lloh54, Lloh55
	.loh AdrpLdrGot	Lloh56, Lloh57
	.cfi_endproc
                                        ; -- End function
	.comm	_PMIC_GPIO_FUNC_INDEX_DTEST4,4,2 ; @PMIC_GPIO_FUNC_INDEX_DTEST4
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"function: %d is not defined\n"

	.comm	_EINVAL,4,2                     ; @EINVAL
	.comm	_PMIC_GPIO_FUNC_INDEX_FUNC3,4,2 ; @PMIC_GPIO_FUNC_INDEX_FUNC3
	.comm	_PMIC_GPIO_FUNC_INDEX_FUNC4,4,2 ; @PMIC_GPIO_FUNC_INDEX_FUNC4
l_.str.1:                               ; @.str.1
	.asciz	"LV/MV subtype doesn't have func3/func4\n"

	.comm	_PMIC_GPIO_FUNC_INDEX_DTEST1,4,2 ; @PMIC_GPIO_FUNC_INDEX_DTEST1
	.comm	_PMIC_GPIO_MODE_ANALOG_PASS_THRU,4,2 ; @PMIC_GPIO_MODE_ANALOG_PASS_THRU
	.comm	_PMIC_GPIO_MODE_DIGITAL_INPUT_OUTPUT,4,2 ; @PMIC_GPIO_MODE_DIGITAL_INPUT_OUTPUT
	.comm	_PMIC_GPIO_MODE_DIGITAL_OUTPUT,4,2 ; @PMIC_GPIO_MODE_DIGITAL_OUTPUT
	.comm	_PMIC_GPIO_MODE_DIGITAL_INPUT,4,2 ; @PMIC_GPIO_MODE_DIGITAL_INPUT
	.comm	_PMIC_GPIO_REG_MODE_CTL,4,2     ; @PMIC_GPIO_REG_MODE_CTL
	.comm	_PMIC_GPIO_REG_LV_MV_ANA_PASS_THRU_SEL,4,2 ; @PMIC_GPIO_REG_LV_MV_ANA_PASS_THRU_SEL
	.comm	_PMIC_GPIO_LV_MV_OUTPUT_INVERT_SHIFT,4,2 ; @PMIC_GPIO_LV_MV_OUTPUT_INVERT_SHIFT
	.comm	_PMIC_GPIO_LV_MV_OUTPUT_SOURCE_SEL_MASK,4,2 ; @PMIC_GPIO_LV_MV_OUTPUT_SOURCE_SEL_MASK
	.comm	_PMIC_GPIO_REG_LV_MV_DIG_OUT_SOURCE_CTL,4,2 ; @PMIC_GPIO_REG_LV_MV_DIG_OUT_SOURCE_CTL
	.comm	_PMIC_GPIO_REG_MODE_DIR_SHIFT,4,2 ; @PMIC_GPIO_REG_MODE_DIR_SHIFT
	.comm	_PMIC_GPIO_REG_MODE_FUNCTION_SHIFT,4,2 ; @PMIC_GPIO_REG_MODE_FUNCTION_SHIFT
	.comm	_PMIC_GPIO_REG_MODE_VALUE_SHIFT,4,2 ; @PMIC_GPIO_REG_MODE_VALUE_SHIFT
	.comm	_PMIC_GPIO_REG_MASTER_EN_SHIFT,4,2 ; @PMIC_GPIO_REG_MASTER_EN_SHIFT
	.comm	_PMIC_GPIO_REG_EN_CTL,4,2       ; @PMIC_GPIO_REG_EN_CTL
	.no_dead_strip	_pmic_gpio_set_mux
.subsections_via_symbols
