	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function pci_quirk_enable_intel_rp_mpc_acs
_pci_quirk_enable_intel_rp_mpc_acs:     ## @pci_quirk_enable_intel_rp_mpc_acs
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %rbx
	movq	_INTEL_MPC_REG@GOTPCREL(%rip), %r14
	movl	(%r14), %esi
	leaq	-28(%rbp), %rdx
	callq	_pci_read_config_dword
	movq	_INTEL_MPC_REG_IRBNCE@GOTPCREL(%rip), %r15
	movl	(%r15), %eax
	testl	%eax, -28(%rbp)
	jne	LBB0_2
## %bb.1:
	leaq	L_.str(%rip), %rsi
	movq	%rbx, %rdi
	callq	_pci_info
	movl	-28(%rbp), %edx
	orl	(%r15), %edx
	movl	%edx, -28(%rbp)
	movl	(%r14), %esi
	movq	%rbx, %rdi
	callq	_pci_write_config_word
LBB0_2:
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_INTEL_MPC_REG,4,2              ## @INTEL_MPC_REG
	.comm	_INTEL_MPC_REG_IRBNCE,4,2       ## @INTEL_MPC_REG_IRBNCE
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"Enabling MPC IRBNCE\n"

	.no_dead_strip	_pci_quirk_enable_intel_rp_mpc_acs
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function pci_quirk_enable_intel_rp_mpc_acs
_pci_quirk_enable_intel_rp_mpc_acs:     ; @pci_quirk_enable_intel_rp_mpc_acs
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #64
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x0
Lloh0:
	adrp	x20, _INTEL_MPC_REG@GOTPAGE
Lloh1:
	ldr	x20, [x20, _INTEL_MPC_REG@GOTPAGEOFF]
	ldr	w1, [x20]
	add	x2, sp, #12
	bl	_pci_read_config_dword
	ldr	w8, [sp, #12]
Lloh2:
	adrp	x21, _INTEL_MPC_REG_IRBNCE@GOTPAGE
Lloh3:
	ldr	x21, [x21, _INTEL_MPC_REG_IRBNCE@GOTPAGEOFF]
	ldr	w9, [x21]
	tst	w9, w8
	b.ne	LBB0_2
; %bb.1:
Lloh4:
	adrp	x1, l_.str@PAGE
Lloh5:
	add	x1, x1, l_.str@PAGEOFF
	mov	x0, x19
	bl	_pci_info
	ldr	w8, [x21]
	ldr	w9, [sp, #12]
	orr	w2, w9, w8
	str	w2, [sp, #12]
	ldr	w1, [x20]
	mov	x0, x19
	bl	_pci_write_config_word
LBB0_2:
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #64
	ret
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpAdd	Lloh4, Lloh5
	.cfi_endproc
                                        ; -- End function
	.comm	_INTEL_MPC_REG,4,2              ; @INTEL_MPC_REG
	.comm	_INTEL_MPC_REG_IRBNCE,4,2       ; @INTEL_MPC_REG_IRBNCE
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"Enabling MPC IRBNCE\n"

	.no_dead_strip	_pci_quirk_enable_intel_rp_mpc_acs
.subsections_via_symbols
