	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function xgene_phy_gen_avg_val
_xgene_phy_gen_avg_val:                 ## @xgene_phy_gen_avg_val
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$88, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%esi, %ebx
	movq	%rdi, %r13
	movl	(%rdi), %edi
	leaq	L_.str(%rip), %rsi
	movl	%ebx, %edx
	xorl	%eax, %eax
	callq	_dev_dbg
	movq	_RXTX_REG12@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	_RXTX_REG12_RX_DET_TERM_ENABLE_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movq	%r13, %rdi
	movl	%ebx, %esi
	callq	_serdes_setbits
	movq	_RXTX_REG28@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r13, %rdi
	movl	%ebx, %esi
	xorl	%ecx, %ecx
	callq	_serdes_wr
	movq	_RXTX_REG31@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r13, %rdi
	movl	%ebx, %esi
	xorl	%ecx, %ecx
	callq	_serdes_wr
	xorl	%r14d, %r14d
	movl	$0, -52(%rbp)                   ## 4-byte Folded Spill
	movl	$0, -56(%rbp)                   ## 4-byte Folded Spill
	movl	$0, -60(%rbp)                   ## 4-byte Folded Spill
	movl	$0, -64(%rbp)                   ## 4-byte Folded Spill
	movl	$0, -68(%rbp)                   ## 4-byte Folded Spill
	movl	$0, -72(%rbp)                   ## 4-byte Folded Spill
	movl	$0, -76(%rbp)                   ## 4-byte Folded Spill
	movl	$0, -80(%rbp)                   ## 4-byte Folded Spill
	movl	$0, -84(%rbp)                   ## 4-byte Folded Spill
	movl	%ebx, -112(%rbp)                ## 4-byte Spill
	jmp	LBB0_1
	.p2align	4, 0x90
LBB0_4:                                 ##   in Loop: Header=BB0_1 Depth=1
	movq	%r14, %r13
	movl	(%r14), %edi
	leaq	L_.str.5(%rip), %rsi
	movl	-48(%rbp), %r14d                ## 4-byte Reload
	movl	%r14d, %edx
	callq	_dev_err
LBB0_5:                                 ##   in Loop: Header=BB0_1 Depth=1
	movq	%r13, %rdi
	movl	-112(%rbp), %ebx                ## 4-byte Reload
	movl	%ebx, %esi
	callq	_xgene_phy_reset_rxd
	cmpl	$10, %r14d
	jge	LBB0_6
LBB0_1:                                 ## =>This Inner Loop Header: Depth=1
	movl	%r14d, -48(%rbp)                ## 4-byte Spill
	movq	%r13, %rdi
	movl	%ebx, %esi
	callq	_xgene_phy_force_lat_summer_cal
	movq	_RXTX_REG21@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r13, %rdi
	movl	%ebx, %esi
	leaq	-44(%rbp), %r12
	movq	%r12, %rcx
	callq	_serdes_rd
	movl	-44(%rbp), %edi
	callq	_RXTX_REG21_DO_LATCH_CALOUT_RD
	movl	%eax, -108(%rbp)                ## 4-byte Spill
	movl	-44(%rbp), %edi
	callq	_RXTX_REG21_XO_LATCH_CALOUT_RD
	movl	%eax, -124(%rbp)                ## 4-byte Spill
	movl	-44(%rbp), %edi
	callq	_RXTX_REG21_LATCH_CAL_FAIL_ODD_RD
	movl	%eax, -88(%rbp)                 ## 4-byte Spill
	movq	_RXTX_REG22@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r13, %rdi
	movl	%ebx, %esi
	movq	%r12, %rcx
	callq	_serdes_rd
	movl	-44(%rbp), %edi
	callq	_RXTX_REG22_EO_LATCH_CALOUT_RD
	movl	%eax, -120(%rbp)                ## 4-byte Spill
	movl	-44(%rbp), %edi
	callq	_RXTX_REG22_SO_LATCH_CALOUT_RD
	movl	%eax, -116(%rbp)                ## 4-byte Spill
	movl	-44(%rbp), %edi
	callq	_RXTX_REG22_LATCH_CAL_FAIL_EVEN_RD
	movl	%eax, %r15d
	movq	_RXTX_REG23@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r13, %rdi
	movl	%ebx, %esi
	movq	%r12, %rcx
	callq	_serdes_rd
	movl	-44(%rbp), %edi
	callq	_RXTX_REG23_DE_LATCH_CALOUT_RD
	movl	%eax, -104(%rbp)                ## 4-byte Spill
	movl	-44(%rbp), %edi
	callq	_RXTX_REG23_XE_LATCH_CALOUT_RD
	movl	%eax, -100(%rbp)                ## 4-byte Spill
	movq	_RXTX_REG24@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r13, %rdi
	movl	%ebx, %esi
	movq	%r12, %rcx
	callq	_serdes_rd
	movl	-44(%rbp), %edi
	callq	_RXTX_REG24_EE_LATCH_CALOUT_RD
	movl	%eax, -96(%rbp)                 ## 4-byte Spill
	movl	-44(%rbp), %edi
	callq	_RXTX_REG24_SE_LATCH_CALOUT_RD
	movl	%eax, -92(%rbp)                 ## 4-byte Spill
	movq	_RXTX_REG121@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r13, %r14
	movq	%r13, %rdi
	movl	%ebx, %esi
	movq	%r12, %rcx
	callq	_serdes_rd
	movl	-44(%rbp), %edi
	callq	_RXTX_REG121_SUMOS_CAL_CODE_RD
	cmpl	$1, %r15d
	ja	LBB0_4
## %bb.2:                               ##   in Loop: Header=BB0_1 Depth=1
	cmpl	$1, -88(%rbp)                   ## 4-byte Folded Reload
	ja	LBB0_4
## %bb.3:                               ##   in Loop: Header=BB0_1 Depth=1
	movl	-108(%rbp), %ecx                ## 4-byte Reload
	addl	%ecx, -52(%rbp)                 ## 4-byte Folded Spill
	movl	-124(%rbp), %ebx                ## 4-byte Reload
	addl	%ebx, -56(%rbp)                 ## 4-byte Folded Spill
	movl	-120(%rbp), %r12d               ## 4-byte Reload
	addl	%r12d, -60(%rbp)                ## 4-byte Folded Spill
	movl	-116(%rbp), %r15d               ## 4-byte Reload
	addl	%r15d, -64(%rbp)                ## 4-byte Folded Spill
	movl	-104(%rbp), %ecx                ## 4-byte Reload
	addl	%ecx, -68(%rbp)                 ## 4-byte Folded Spill
	movl	-100(%rbp), %ecx                ## 4-byte Reload
	addl	%ecx, -72(%rbp)                 ## 4-byte Folded Spill
	movl	-96(%rbp), %ecx                 ## 4-byte Reload
	addl	%ecx, -76(%rbp)                 ## 4-byte Folded Spill
	movl	-92(%rbp), %ecx                 ## 4-byte Reload
	addl	%ecx, -80(%rbp)                 ## 4-byte Folded Spill
	addl	%eax, -84(%rbp)                 ## 4-byte Folded Spill
	movq	%r14, %r13
	movl	(%r14), %edi
	leaq	L_.str.1(%rip), %rsi
	movl	-48(%rbp), %r14d                ## 4-byte Reload
	movl	%r14d, %edx
	movl	%eax, -88(%rbp)                 ## 4-byte Spill
	xorl	%eax, %eax
	callq	_dev_dbg
	movl	(%r13), %edi
	leaq	L_.str.2(%rip), %rsi
	movl	-108(%rbp), %edx                ## 4-byte Reload
	movl	%ebx, %ecx
	movl	%r12d, %r8d
	movl	%r15d, %r9d
	xorl	%eax, %eax
	callq	_dev_dbg
	movl	(%r13), %edi
	leaq	L_.str.3(%rip), %rsi
	movl	-104(%rbp), %edx                ## 4-byte Reload
	movl	-100(%rbp), %ecx                ## 4-byte Reload
	movl	-96(%rbp), %r8d                 ## 4-byte Reload
	movl	-92(%rbp), %r9d                 ## 4-byte Reload
	xorl	%eax, %eax
	callq	_dev_dbg
	movl	(%r13), %edi
	leaq	L_.str.4(%rip), %rsi
	movl	-88(%rbp), %edx                 ## 4-byte Reload
	xorl	%eax, %eax
	callq	_dev_dbg
	incl	%r14d
	jmp	LBB0_5
LBB0_6:
	movq	_RXTX_REG127@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rax, %r15
	leaq	-44(%rbp), %r12
	movq	%r13, %rdi
	movl	%ebx, %esi
	movq	%r12, %rcx
	callq	_serdes_rd
	movq	%r13, %r14
	movl	%ebx, %r13d
	movl	-44(%rbp), %ebx
	movl	-52(%rbp), %edi                 ## 4-byte Reload
	movl	$10, %esi
	callq	_xgene_phy_get_avg
	movl	%ebx, %edi
	movl	%eax, %esi
	callq	_RXTX_REG127_DO_LATCH_MANCAL_SET
	movl	%eax, %ebx
	movl	%eax, -44(%rbp)
	movl	-56(%rbp), %edi                 ## 4-byte Reload
	movl	$10, %esi
	callq	_xgene_phy_get_avg
	movl	%ebx, %edi
	movl	%eax, %esi
	callq	_RXTX_REG127_XO_LATCH_MANCAL_SET
	movl	%eax, -44(%rbp)
	movl	(%r15), %edx
	movq	%r14, %rdi
	movl	%r13d, %esi
	movl	%eax, %ecx
	callq	_serdes_wr
	movq	_RXTX_REG128@GOTPCREL(%rip), %r15
	movl	(%r15), %edx
	movq	%r14, %rdi
	movl	%r13d, %esi
	movq	%r12, %rcx
	callq	_serdes_rd
	movl	-44(%rbp), %ebx
	movl	-60(%rbp), %edi                 ## 4-byte Reload
	movl	$10, %esi
	callq	_xgene_phy_get_avg
	movl	%ebx, %edi
	movl	%eax, %esi
	callq	_RXTX_REG128_EO_LATCH_MANCAL_SET
	movl	%eax, %ebx
	movl	%eax, -44(%rbp)
	movl	-64(%rbp), %edi                 ## 4-byte Reload
	movl	$10, %esi
	callq	_xgene_phy_get_avg
	movl	%ebx, %edi
	movl	%eax, %esi
	callq	_RXTX_REG128_SO_LATCH_MANCAL_SET
	movl	%eax, -44(%rbp)
	movl	(%r15), %edx
	movq	%r14, %rdi
	movl	%r13d, %esi
	movl	%eax, %ecx
	callq	_serdes_wr
	movq	_RXTX_REG129@GOTPCREL(%rip), %r15
	movl	(%r15), %edx
	movq	%r14, %rdi
	movl	%r13d, %esi
	movq	%r12, %rcx
	callq	_serdes_rd
	movl	-44(%rbp), %ebx
	movl	-68(%rbp), %edi                 ## 4-byte Reload
	movl	$10, %esi
	callq	_xgene_phy_get_avg
	movl	%ebx, %edi
	movl	%eax, %esi
	callq	_RXTX_REG129_DE_LATCH_MANCAL_SET
	movl	%eax, %ebx
	movl	%eax, -44(%rbp)
	movl	-72(%rbp), %edi                 ## 4-byte Reload
	movl	$10, %esi
	callq	_xgene_phy_get_avg
	movl	%ebx, %edi
	movl	%eax, %esi
	callq	_RXTX_REG129_XE_LATCH_MANCAL_SET
	movl	%eax, -44(%rbp)
	movl	(%r15), %edx
	movq	%r14, %rdi
	movl	%r13d, %esi
	movl	%eax, %ecx
	callq	_serdes_wr
	movq	_RXTX_REG130@GOTPCREL(%rip), %r15
	movl	(%r15), %edx
	movq	%r14, %rdi
	movl	%r13d, %esi
	movq	%r12, %rcx
	callq	_serdes_rd
	movl	-44(%rbp), %ebx
	movl	-76(%rbp), %edi                 ## 4-byte Reload
	movl	$10, %esi
	callq	_xgene_phy_get_avg
	movl	%ebx, %edi
	movl	%eax, %esi
	callq	_RXTX_REG130_EE_LATCH_MANCAL_SET
	movl	%eax, %ebx
	movl	%eax, -44(%rbp)
	movl	-80(%rbp), %edi                 ## 4-byte Reload
	movl	$10, %esi
	callq	_xgene_phy_get_avg
	movl	%ebx, %edi
	movl	%eax, %esi
	callq	_RXTX_REG130_SE_LATCH_MANCAL_SET
	movl	%eax, -44(%rbp)
	movl	(%r15), %edx
	movq	%r14, %rdi
	movl	%r13d, %esi
	movl	%eax, %ecx
	callq	_serdes_wr
	movq	_RXTX_REG14@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rax, %r15
	movq	%r14, %rdi
	movl	%r13d, %esi
	movq	%r12, %rcx
	callq	_serdes_rd
	movl	-44(%rbp), %ebx
	movl	-84(%rbp), %edi                 ## 4-byte Reload
	movl	$10, %esi
	callq	_xgene_phy_get_avg
	movl	%ebx, %edi
	movl	%eax, %esi
	callq	_RXTX_REG14_CLTE_LATCAL_MAN_PROG_SET
	movl	%eax, -44(%rbp)
	movl	(%r15), %edx
	movq	%r14, %rdi
	movl	%r13d, %esi
	movl	%eax, %ecx
	callq	_serdes_wr
	movl	(%r14), %edi
	leaq	L_.str.6(%rip), %rsi
	xorl	%eax, %eax
	callq	_dev_dbg
	movl	(%r14), %eax
	movl	%eax, -48(%rbp)                 ## 4-byte Spill
	movl	-52(%rbp), %edi                 ## 4-byte Reload
	movl	$10, %esi
	callq	_xgene_phy_get_avg
	movl	%eax, %r15d
	movl	-56(%rbp), %edi                 ## 4-byte Reload
	movl	$10, %esi
	callq	_xgene_phy_get_avg
	movl	%eax, %r12d
	movl	-60(%rbp), %edi                 ## 4-byte Reload
	movl	$10, %esi
	callq	_xgene_phy_get_avg
	movl	%eax, %ebx
	movl	-64(%rbp), %edi                 ## 4-byte Reload
	movl	$10, %esi
	callq	_xgene_phy_get_avg
	leaq	L_.str.2(%rip), %rsi
	movl	-48(%rbp), %edi                 ## 4-byte Reload
	movl	%r15d, %edx
	movl	%r12d, %ecx
	movl	%ebx, %r8d
	movl	%eax, %r9d
	xorl	%eax, %eax
	callq	_dev_dbg
	movl	(%r14), %eax
	movl	%eax, -48(%rbp)                 ## 4-byte Spill
	movl	-68(%rbp), %edi                 ## 4-byte Reload
	movl	$10, %esi
	callq	_xgene_phy_get_avg
	movl	%eax, %r15d
	movl	-72(%rbp), %edi                 ## 4-byte Reload
	movl	$10, %esi
	callq	_xgene_phy_get_avg
	movl	%eax, %r12d
	movl	-76(%rbp), %edi                 ## 4-byte Reload
	movl	$10, %esi
	callq	_xgene_phy_get_avg
	movl	%eax, %ebx
	movl	-80(%rbp), %edi                 ## 4-byte Reload
	movl	$10, %esi
	callq	_xgene_phy_get_avg
	leaq	L_.str.3(%rip), %rsi
	movl	-48(%rbp), %edi                 ## 4-byte Reload
	movl	%r15d, %edx
	movl	%r12d, %ecx
	movl	%ebx, %r8d
	movl	%eax, %r9d
	xorl	%eax, %eax
	callq	_dev_dbg
	movl	(%r14), %ebx
	movl	-84(%rbp), %edi                 ## 4-byte Reload
	movl	$10, %esi
	callq	_xgene_phy_get_avg
	leaq	L_.str.4(%rip), %rsi
	movl	%ebx, %edi
	movl	%eax, %edx
	xorl	%eax, %eax
	callq	_dev_dbg
	movq	_RXTX_REG14@GOTPCREL(%rip), %rbx
	movl	(%rbx), %edx
	movq	%r14, %rdi
	movl	%r13d, %esi
	leaq	-44(%rbp), %r15
	movq	%r15, %rcx
	callq	_serdes_rd
	movl	-44(%rbp), %edi
	movl	$1, %esi
	callq	_RXTX_REG14_CTLE_LATCAL_MAN_ENA_SET
	movl	%eax, -44(%rbp)
	movl	(%rbx), %edx
	movq	%r14, %rdi
	movl	%r13d, %esi
	movl	%eax, %ecx
	callq	_serdes_wr
	movl	(%r14), %edi
	leaq	L_.str.7(%rip), %rsi
	xorl	%eax, %eax
	callq	_dev_dbg
	movq	_RXTX_REG127@GOTPCREL(%rip), %r12
	movl	(%r12), %edx
	movq	%r14, %rdi
	movl	%r13d, %esi
	movq	%r15, %rcx
	callq	_serdes_rd
	movl	-44(%rbp), %edi
	movl	$1, %esi
	callq	_RXTX_REG127_LATCH_MAN_CAL_ENA_SET
	movl	%eax, -44(%rbp)
	movl	(%r14), %edi
	leaq	L_.str.8(%rip), %rsi
	xorl	%eax, %eax
	callq	_dev_dbg
	movl	(%r12), %edx
	movl	-44(%rbp), %ecx
	movq	%r14, %rdi
	movl	%r13d, %esi
	callq	_serdes_wr
	movq	_RXTX_REG12@GOTPCREL(%rip), %rbx
	movl	(%rbx), %edx
	movq	%r14, %rdi
	movl	%r13d, %esi
	movq	%r15, %rcx
	callq	_serdes_rd
	movl	-44(%rbp), %edi
	xorl	%esi, %esi
	callq	_RXTX_REG12_RX_DET_TERM_ENABLE_SET
	movl	%eax, -44(%rbp)
	movl	(%rbx), %edx
	movq	%r14, %rdi
	movl	%r13d, %esi
	movl	%eax, %ecx
	callq	_serdes_wr
	movq	_RXTX_REG28@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r14, %rdi
	movl	%r13d, %esi
	movl	$7, %ecx
	callq	_serdes_wr
	movq	_RXTX_REG31@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r14, %rdi
	movl	%r13d, %esi
	movl	$32256, %ecx                    ## imm = 0x7E00
	callq	_serdes_wr
	addq	$88, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"Generating avg calibration value for lane %d\n"

	.comm	_RXTX_REG12,4,2                 ## @RXTX_REG12
	.comm	_RXTX_REG12_RX_DET_TERM_ENABLE_MASK,4,2 ## @RXTX_REG12_RX_DET_TERM_ENABLE_MASK
	.comm	_RXTX_REG28,4,2                 ## @RXTX_REG28
	.comm	_RXTX_REG31,4,2                 ## @RXTX_REG31
	.comm	_RXTX_REG21,4,2                 ## @RXTX_REG21
	.comm	_RXTX_REG22,4,2                 ## @RXTX_REG22
	.comm	_RXTX_REG23,4,2                 ## @RXTX_REG23
	.comm	_RXTX_REG24,4,2                 ## @RXTX_REG24
	.comm	_RXTX_REG121,4,2                ## @RXTX_REG121
L_.str.1:                               ## @.str.1
	.asciz	"Iteration %d:\n"

L_.str.2:                               ## @.str.2
	.asciz	"DO 0x%x XO 0x%x EO 0x%x SO 0x%x\n"

L_.str.3:                               ## @.str.3
	.asciz	"DE 0x%x XE 0x%x EE 0x%x SE 0x%x\n"

L_.str.4:                               ## @.str.4
	.asciz	"SUM 0x%x\n"

L_.str.5:                               ## @.str.5
	.asciz	"Receiver calibration failed at %d loop\n"

	.comm	_RXTX_REG127,4,2                ## @RXTX_REG127
	.comm	_RXTX_REG128,4,2                ## @RXTX_REG128
	.comm	_RXTX_REG129,4,2                ## @RXTX_REG129
	.comm	_RXTX_REG130,4,2                ## @RXTX_REG130
	.comm	_RXTX_REG14,4,2                 ## @RXTX_REG14
L_.str.6:                               ## @.str.6
	.asciz	"Average Value:\n"

L_.str.7:                               ## @.str.7
	.asciz	"Enable Manual Summer calibration\n"

L_.str.8:                               ## @.str.8
	.asciz	"Enable Manual Latch calibration\n"

	.no_dead_strip	_xgene_phy_gen_avg_val
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function xgene_phy_gen_avg_val
_xgene_phy_gen_avg_val:                 ; @xgene_phy_gen_avg_val
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #224
	.cfi_def_cfa_offset 224
	stp	x28, x27, [sp, #128]            ; 16-byte Folded Spill
	stp	x26, x25, [sp, #144]            ; 16-byte Folded Spill
	stp	x24, x23, [sp, #160]            ; 16-byte Folded Spill
	stp	x22, x21, [sp, #176]            ; 16-byte Folded Spill
	stp	x20, x19, [sp, #192]            ; 16-byte Folded Spill
	stp	x29, x30, [sp, #208]            ; 16-byte Folded Spill
	add	x29, sp, #208
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	mov	x19, x1
	mov	x20, x0
	ldr	w0, [x0]
	str	x19, [sp]
Lloh0:
	adrp	x1, l_.str@PAGE
Lloh1:
	add	x1, x1, l_.str@PAGEOFF
	bl	_dev_dbg
Lloh2:
	adrp	x8, _RXTX_REG12@GOTPAGE
Lloh3:
	ldr	x8, [x8, _RXTX_REG12@GOTPAGEOFF]
Lloh4:
	ldr	w2, [x8]
Lloh5:
	adrp	x8, _RXTX_REG12_RX_DET_TERM_ENABLE_MASK@GOTPAGE
Lloh6:
	ldr	x8, [x8, _RXTX_REG12_RX_DET_TERM_ENABLE_MASK@GOTPAGEOFF]
Lloh7:
	ldr	w3, [x8]
	mov	x0, x20
	mov	x1, x19
	bl	_serdes_setbits
Lloh8:
	adrp	x8, _RXTX_REG28@GOTPAGE
Lloh9:
	ldr	x8, [x8, _RXTX_REG28@GOTPAGEOFF]
Lloh10:
	ldr	w2, [x8]
	mov	x0, x20
	mov	x1, x19
	mov	w3, #0
	bl	_serdes_wr
Lloh11:
	adrp	x8, _RXTX_REG31@GOTPAGE
Lloh12:
	ldr	x8, [x8, _RXTX_REG31@GOTPAGEOFF]
Lloh13:
	ldr	w2, [x8]
	mov	x0, x20
	mov	x1, x19
	mov	w3, #0
	bl	_serdes_wr
	mov	w21, #0
	stp	xzr, xzr, [sp, #80]             ; 16-byte Folded Spill
	str	wzr, [sp, #60]                  ; 4-byte Folded Spill
	stp	xzr, xzr, [sp, #64]             ; 16-byte Folded Spill
	str	x19, [sp, #48]                  ; 8-byte Folded Spill
	b	LBB0_3
LBB0_1:                                 ;   in Loop: Header=BB0_3 Depth=1
	ldr	w0, [x20]
Lloh14:
	adrp	x1, l_.str.5@PAGE
Lloh15:
	add	x1, x1, l_.str.5@PAGEOFF
	ldur	x21, [x29, #-96]                ; 8-byte Folded Reload
	mov	x2, x21
	bl	_dev_err
LBB0_2:                                 ;   in Loop: Header=BB0_3 Depth=1
	mov	x0, x20
	ldr	x19, [sp, #48]                  ; 8-byte Folded Reload
	mov	x1, x19
	bl	_xgene_phy_reset_rxd
	cmp	w21, #10
	b.ge	LBB0_6
LBB0_3:                                 ; =>This Inner Loop Header: Depth=1
	stur	x21, [x29, #-96]                ; 8-byte Folded Spill
	mov	x0, x20
	mov	x1, x19
	bl	_xgene_phy_force_lat_summer_cal
Lloh16:
	adrp	x8, _RXTX_REG21@GOTPAGE
Lloh17:
	ldr	x8, [x8, _RXTX_REG21@GOTPAGEOFF]
Lloh18:
	ldr	w2, [x8]
	sub	x3, x29, #84
	mov	x0, x20
	mov	x1, x19
	bl	_serdes_rd
	ldur	w0, [x29, #-84]
	bl	_RXTX_REG21_DO_LATCH_CALOUT_RD
	str	x0, [sp, #104]                  ; 8-byte Folded Spill
	ldur	w0, [x29, #-84]
	bl	_RXTX_REG21_XO_LATCH_CALOUT_RD
	str	x0, [sp, #96]                   ; 8-byte Folded Spill
	ldur	w0, [x29, #-84]
	bl	_RXTX_REG21_LATCH_CAL_FAIL_ODD_RD
	mov	x21, x0
Lloh19:
	adrp	x8, _RXTX_REG22@GOTPAGE
Lloh20:
	ldr	x8, [x8, _RXTX_REG22@GOTPAGEOFF]
Lloh21:
	ldr	w2, [x8]
	sub	x3, x29, #84
	mov	x0, x20
	mov	x1, x19
	bl	_serdes_rd
	ldur	w0, [x29, #-84]
	bl	_RXTX_REG22_EO_LATCH_CALOUT_RD
	mov	x25, x0
	ldur	w0, [x29, #-84]
	bl	_RXTX_REG22_SO_LATCH_CALOUT_RD
	mov	x27, x0
	ldur	w0, [x29, #-84]
	bl	_RXTX_REG22_LATCH_CAL_FAIL_EVEN_RD
	mov	x24, x0
Lloh22:
	adrp	x8, _RXTX_REG23@GOTPAGE
Lloh23:
	ldr	x8, [x8, _RXTX_REG23@GOTPAGEOFF]
Lloh24:
	ldr	w2, [x8]
	sub	x3, x29, #84
	mov	x0, x20
	mov	x1, x19
	bl	_serdes_rd
	ldur	w0, [x29, #-84]
	bl	_RXTX_REG23_DE_LATCH_CALOUT_RD
	mov	x26, x0
	ldur	w0, [x29, #-84]
	bl	_RXTX_REG23_XE_LATCH_CALOUT_RD
	mov	x28, x0
Lloh25:
	adrp	x8, _RXTX_REG24@GOTPAGE
Lloh26:
	ldr	x8, [x8, _RXTX_REG24@GOTPAGEOFF]
Lloh27:
	ldr	w2, [x8]
	sub	x3, x29, #84
	mov	x0, x20
	mov	x1, x19
	bl	_serdes_rd
	ldur	w0, [x29, #-84]
	bl	_RXTX_REG24_EE_LATCH_CALOUT_RD
	mov	x22, x0
	ldur	w0, [x29, #-84]
	bl	_RXTX_REG24_SE_LATCH_CALOUT_RD
	mov	x23, x0
Lloh28:
	adrp	x8, _RXTX_REG121@GOTPAGE
Lloh29:
	ldr	x8, [x8, _RXTX_REG121@GOTPAGEOFF]
Lloh30:
	ldr	w2, [x8]
	sub	x3, x29, #84
	mov	x0, x20
	mov	x1, x19
	bl	_serdes_rd
	ldur	w0, [x29, #-84]
	bl	_RXTX_REG121_SUMOS_CAL_CODE_RD
	cmp	w24, #1
	b.hi	LBB0_1
; %bb.4:                                ;   in Loop: Header=BB0_3 Depth=1
	cmp	w21, #1
	b.hi	LBB0_1
; %bb.5:                                ;   in Loop: Header=BB0_3 Depth=1
	mov	x19, x0
	ldr	w8, [sp, #84]                   ; 4-byte Folded Reload
	ldr	x24, [sp, #104]                 ; 8-byte Folded Reload
	add	w8, w24, w8
	str	w8, [sp, #84]                   ; 4-byte Folded Spill
	ldr	w8, [sp, #60]                   ; 4-byte Folded Reload
	mov	x9, x26
	str	x26, [sp, #40]                  ; 8-byte Folded Spill
	ldr	x26, [sp, #96]                  ; 8-byte Folded Reload
	add	w8, w26, w8
	str	w8, [sp, #60]                   ; 4-byte Folded Spill
	ldr	w8, [sp, #64]                   ; 4-byte Folded Reload
	add	w8, w25, w8
	str	w8, [sp, #64]                   ; 4-byte Folded Spill
	ldr	w8, [sp, #88]                   ; 4-byte Folded Reload
	add	w8, w27, w8
	str	w8, [sp, #88]                   ; 4-byte Folded Spill
	ldr	w8, [sp, #92]                   ; 4-byte Folded Reload
	add	w8, w9, w8
	str	w8, [sp, #92]                   ; 4-byte Folded Spill
	ldr	w8, [sp, #68]                   ; 4-byte Folded Reload
	add	w8, w28, w8
	str	w8, [sp, #68]                   ; 4-byte Folded Spill
	ldr	w8, [sp, #72]                   ; 4-byte Folded Reload
	add	w8, w22, w8
	str	w8, [sp, #72]                   ; 4-byte Folded Spill
	ldr	w8, [sp, #76]                   ; 4-byte Folded Reload
	add	w8, w23, w8
	str	w8, [sp, #76]                   ; 4-byte Folded Spill
	ldr	w0, [x20]
	ldr	w8, [sp, #80]                   ; 4-byte Folded Reload
	add	w8, w19, w8
	str	w8, [sp, #80]                   ; 4-byte Folded Spill
	ldur	x21, [x29, #-96]                ; 8-byte Folded Reload
	str	x21, [sp]
Lloh31:
	adrp	x1, l_.str.1@PAGE
Lloh32:
	add	x1, x1, l_.str.1@PAGEOFF
	bl	_dev_dbg
	ldr	w0, [x20]
	stp	x25, x27, [sp, #16]
	stp	x24, x26, [sp]
Lloh33:
	adrp	x1, l_.str.2@PAGE
Lloh34:
	add	x1, x1, l_.str.2@PAGEOFF
	bl	_dev_dbg
	ldr	w0, [x20]
	stp	x22, x23, [sp, #16]
	ldr	x8, [sp, #40]                   ; 8-byte Folded Reload
	stp	x8, x28, [sp]
Lloh35:
	adrp	x1, l_.str.3@PAGE
Lloh36:
	add	x1, x1, l_.str.3@PAGEOFF
	bl	_dev_dbg
	ldr	w0, [x20]
	str	x19, [sp]
Lloh37:
	adrp	x1, l_.str.4@PAGE
Lloh38:
	add	x1, x1, l_.str.4@PAGEOFF
	bl	_dev_dbg
	add	w21, w21, #1
	b	LBB0_2
LBB0_6:
Lloh39:
	adrp	x8, _RXTX_REG127@GOTPAGE
Lloh40:
	ldr	x8, [x8, _RXTX_REG127@GOTPAGEOFF]
	ldr	w2, [x8]
	mov	x21, x8
	sub	x3, x29, #84
	mov	x0, x20
	mov	x1, x19
	bl	_serdes_rd
	mov	x26, x19
	ldur	w19, [x29, #-84]
	ldr	w0, [sp, #84]                   ; 4-byte Folded Reload
	mov	w1, #10
	bl	_xgene_phy_get_avg
	mov	x1, x0
	mov	x0, x19
	bl	_RXTX_REG127_DO_LATCH_MANCAL_SET
	mov	x19, x0
	stur	w0, [x29, #-84]
	ldr	w22, [sp, #60]                  ; 4-byte Folded Reload
	mov	x0, x22
	mov	w1, #10
	bl	_xgene_phy_get_avg
	mov	x1, x0
	mov	x0, x19
	bl	_RXTX_REG127_XO_LATCH_MANCAL_SET
	mov	x3, x0
	stur	w0, [x29, #-84]
	ldr	w2, [x21]
	mov	x0, x20
	mov	x1, x26
	bl	_serdes_wr
Lloh41:
	adrp	x21, _RXTX_REG128@GOTPAGE
Lloh42:
	ldr	x21, [x21, _RXTX_REG128@GOTPAGEOFF]
	ldr	w2, [x21]
	sub	x3, x29, #84
	mov	x0, x20
	mov	x1, x26
	bl	_serdes_rd
	ldur	w19, [x29, #-84]
	ldr	w23, [sp, #64]                  ; 4-byte Folded Reload
	mov	x0, x23
	mov	w1, #10
	bl	_xgene_phy_get_avg
	mov	x1, x0
	mov	x0, x19
	bl	_RXTX_REG128_EO_LATCH_MANCAL_SET
	mov	x19, x0
	stur	w0, [x29, #-84]
	ldr	w0, [sp, #88]                   ; 4-byte Folded Reload
	mov	w1, #10
	bl	_xgene_phy_get_avg
	mov	x1, x0
	mov	x0, x19
	bl	_RXTX_REG128_SO_LATCH_MANCAL_SET
	mov	x3, x0
	stur	w0, [x29, #-84]
	ldr	w2, [x21]
	mov	x0, x20
	mov	x1, x26
	bl	_serdes_wr
Lloh43:
	adrp	x21, _RXTX_REG129@GOTPAGE
Lloh44:
	ldr	x21, [x21, _RXTX_REG129@GOTPAGEOFF]
	ldr	w2, [x21]
	sub	x3, x29, #84
	mov	x0, x20
	mov	x1, x26
	bl	_serdes_rd
	ldur	w19, [x29, #-84]
	ldr	w0, [sp, #92]                   ; 4-byte Folded Reload
	mov	w1, #10
	bl	_xgene_phy_get_avg
	mov	x1, x0
	mov	x0, x19
	bl	_RXTX_REG129_DE_LATCH_MANCAL_SET
	mov	x19, x0
	stur	w0, [x29, #-84]
	ldr	w25, [sp, #68]                  ; 4-byte Folded Reload
	mov	x0, x25
	mov	w1, #10
	bl	_xgene_phy_get_avg
	mov	x1, x0
	mov	x0, x19
	bl	_RXTX_REG129_XE_LATCH_MANCAL_SET
	mov	x3, x0
	stur	w0, [x29, #-84]
	ldr	w2, [x21]
	mov	x0, x20
	mov	x1, x26
	bl	_serdes_wr
Lloh45:
	adrp	x21, _RXTX_REG130@GOTPAGE
Lloh46:
	ldr	x21, [x21, _RXTX_REG130@GOTPAGEOFF]
	ldr	w2, [x21]
	sub	x3, x29, #84
	mov	x0, x20
	mov	x1, x26
	bl	_serdes_rd
	ldur	w19, [x29, #-84]
	ldr	w24, [sp, #72]                  ; 4-byte Folded Reload
	mov	x0, x24
	mov	w1, #10
	bl	_xgene_phy_get_avg
	mov	x1, x0
	mov	x0, x19
	bl	_RXTX_REG130_EE_LATCH_MANCAL_SET
	mov	x19, x0
	stur	w0, [x29, #-84]
	ldr	w28, [sp, #76]                  ; 4-byte Folded Reload
	mov	x0, x28
	mov	w1, #10
	bl	_xgene_phy_get_avg
	mov	x1, x0
	mov	x0, x19
	bl	_RXTX_REG130_SE_LATCH_MANCAL_SET
	mov	x3, x0
	stur	w0, [x29, #-84]
	ldr	w2, [x21]
	mov	x0, x20
	mov	x1, x26
	bl	_serdes_wr
Lloh47:
	adrp	x8, _RXTX_REG14@GOTPAGE
Lloh48:
	ldr	x8, [x8, _RXTX_REG14@GOTPAGEOFF]
	ldr	w2, [x8]
	mov	x21, x8
	sub	x3, x29, #84
	mov	x0, x20
	mov	x1, x26
	bl	_serdes_rd
	ldur	w19, [x29, #-84]
	ldr	w27, [sp, #80]                  ; 4-byte Folded Reload
	mov	x0, x27
	mov	w1, #10
	bl	_xgene_phy_get_avg
	mov	x1, x0
	mov	x0, x19
	bl	_RXTX_REG14_CLTE_LATCAL_MAN_PROG_SET
	mov	x3, x0
	stur	w0, [x29, #-84]
	ldr	w2, [x21]
	mov	x0, x20
	mov	x1, x26
	bl	_serdes_wr
	ldr	w0, [x20]
Lloh49:
	adrp	x1, l_.str.6@PAGE
Lloh50:
	add	x1, x1, l_.str.6@PAGEOFF
	bl	_dev_dbg
	ldr	w19, [x20]
	ldr	w0, [sp, #84]                   ; 4-byte Folded Reload
	mov	w1, #10
	bl	_xgene_phy_get_avg
	mov	x21, x0
	mov	x0, x22
	mov	w1, #10
	bl	_xgene_phy_get_avg
	mov	x22, x0
	mov	x0, x23
	mov	w1, #10
	bl	_xgene_phy_get_avg
	mov	x23, x0
	ldr	w0, [sp, #88]                   ; 4-byte Folded Reload
	mov	w1, #10
	bl	_xgene_phy_get_avg
                                        ; kill: def $w0 killed $w0 def $x0
	stp	x23, x0, [sp, #16]
	stp	x21, x22, [sp]
Lloh51:
	adrp	x1, l_.str.2@PAGE
Lloh52:
	add	x1, x1, l_.str.2@PAGEOFF
	mov	x0, x19
	bl	_dev_dbg
	ldr	w19, [x20]
	ldr	w0, [sp, #92]                   ; 4-byte Folded Reload
	mov	w1, #10
	bl	_xgene_phy_get_avg
	mov	x21, x0
	mov	x0, x25
	mov	w1, #10
	bl	_xgene_phy_get_avg
	mov	x22, x0
	mov	x0, x24
	mov	w1, #10
	bl	_xgene_phy_get_avg
	mov	x23, x0
	mov	x0, x28
	mov	w1, #10
	bl	_xgene_phy_get_avg
                                        ; kill: def $w0 killed $w0 def $x0
	stp	x23, x0, [sp, #16]
	stp	x21, x22, [sp]
Lloh53:
	adrp	x1, l_.str.3@PAGE
Lloh54:
	add	x1, x1, l_.str.3@PAGEOFF
	mov	x0, x19
	bl	_dev_dbg
	ldr	w19, [x20]
	mov	x0, x27
	mov	w1, #10
	bl	_xgene_phy_get_avg
                                        ; kill: def $w0 killed $w0 def $x0
	str	x0, [sp]
Lloh55:
	adrp	x1, l_.str.4@PAGE
Lloh56:
	add	x1, x1, l_.str.4@PAGEOFF
	mov	x0, x19
	bl	_dev_dbg
Lloh57:
	adrp	x19, _RXTX_REG14@GOTPAGE
Lloh58:
	ldr	x19, [x19, _RXTX_REG14@GOTPAGEOFF]
	ldr	w2, [x19]
	sub	x3, x29, #84
	mov	x0, x20
	mov	x1, x26
	bl	_serdes_rd
	ldur	w0, [x29, #-84]
	mov	w1, #1
	bl	_RXTX_REG14_CTLE_LATCAL_MAN_ENA_SET
	mov	x3, x0
	stur	w0, [x29, #-84]
	ldr	w2, [x19]
	mov	x0, x20
	mov	x1, x26
	bl	_serdes_wr
	ldr	w0, [x20]
Lloh59:
	adrp	x1, l_.str.7@PAGE
Lloh60:
	add	x1, x1, l_.str.7@PAGEOFF
	bl	_dev_dbg
Lloh61:
	adrp	x19, _RXTX_REG127@GOTPAGE
Lloh62:
	ldr	x19, [x19, _RXTX_REG127@GOTPAGEOFF]
	ldr	w2, [x19]
	sub	x3, x29, #84
	mov	x0, x20
	mov	x1, x26
	bl	_serdes_rd
	ldur	w0, [x29, #-84]
	mov	w1, #1
	bl	_RXTX_REG127_LATCH_MAN_CAL_ENA_SET
	stur	w0, [x29, #-84]
	ldr	w0, [x20]
Lloh63:
	adrp	x1, l_.str.8@PAGE
Lloh64:
	add	x1, x1, l_.str.8@PAGEOFF
	bl	_dev_dbg
	ldr	w2, [x19]
	ldur	w3, [x29, #-84]
	mov	x0, x20
	mov	x1, x26
	bl	_serdes_wr
Lloh65:
	adrp	x19, _RXTX_REG12@GOTPAGE
Lloh66:
	ldr	x19, [x19, _RXTX_REG12@GOTPAGEOFF]
	ldr	w2, [x19]
	sub	x3, x29, #84
	mov	x0, x20
	mov	x1, x26
	bl	_serdes_rd
	ldur	w0, [x29, #-84]
	mov	w1, #0
	bl	_RXTX_REG12_RX_DET_TERM_ENABLE_SET
	mov	x3, x0
	stur	w0, [x29, #-84]
	ldr	w2, [x19]
	mov	x0, x20
	mov	x1, x26
	bl	_serdes_wr
Lloh67:
	adrp	x8, _RXTX_REG28@GOTPAGE
Lloh68:
	ldr	x8, [x8, _RXTX_REG28@GOTPAGEOFF]
Lloh69:
	ldr	w2, [x8]
	mov	x0, x20
	mov	x1, x26
	mov	w3, #7
	bl	_serdes_wr
Lloh70:
	adrp	x8, _RXTX_REG31@GOTPAGE
Lloh71:
	ldr	x8, [x8, _RXTX_REG31@GOTPAGEOFF]
Lloh72:
	ldr	w2, [x8]
	mov	x0, x20
	mov	x1, x26
	mov	w3, #32256
	bl	_serdes_wr
	ldp	x29, x30, [sp, #208]            ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #192]            ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #176]            ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #160]            ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #144]            ; 16-byte Folded Reload
	ldp	x28, x27, [sp, #128]            ; 16-byte Folded Reload
	add	sp, sp, #224
	ret
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpAdd	Lloh0, Lloh1
	.loh AdrpAdd	Lloh14, Lloh15
	.loh AdrpLdrGotLdr	Lloh28, Lloh29, Lloh30
	.loh AdrpLdrGotLdr	Lloh25, Lloh26, Lloh27
	.loh AdrpLdrGotLdr	Lloh22, Lloh23, Lloh24
	.loh AdrpLdrGotLdr	Lloh19, Lloh20, Lloh21
	.loh AdrpLdrGotLdr	Lloh16, Lloh17, Lloh18
	.loh AdrpAdd	Lloh37, Lloh38
	.loh AdrpAdd	Lloh35, Lloh36
	.loh AdrpAdd	Lloh33, Lloh34
	.loh AdrpAdd	Lloh31, Lloh32
	.loh AdrpLdrGotLdr	Lloh70, Lloh71, Lloh72
	.loh AdrpLdrGotLdr	Lloh67, Lloh68, Lloh69
	.loh AdrpLdrGot	Lloh65, Lloh66
	.loh AdrpAdd	Lloh63, Lloh64
	.loh AdrpLdrGot	Lloh61, Lloh62
	.loh AdrpAdd	Lloh59, Lloh60
	.loh AdrpLdrGot	Lloh57, Lloh58
	.loh AdrpAdd	Lloh55, Lloh56
	.loh AdrpAdd	Lloh53, Lloh54
	.loh AdrpAdd	Lloh51, Lloh52
	.loh AdrpAdd	Lloh49, Lloh50
	.loh AdrpLdrGot	Lloh47, Lloh48
	.loh AdrpLdrGot	Lloh45, Lloh46
	.loh AdrpLdrGot	Lloh43, Lloh44
	.loh AdrpLdrGot	Lloh41, Lloh42
	.loh AdrpLdrGot	Lloh39, Lloh40
	.cfi_endproc
                                        ; -- End function
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"Generating avg calibration value for lane %d\n"

	.comm	_RXTX_REG12,4,2                 ; @RXTX_REG12
	.comm	_RXTX_REG12_RX_DET_TERM_ENABLE_MASK,4,2 ; @RXTX_REG12_RX_DET_TERM_ENABLE_MASK
	.comm	_RXTX_REG28,4,2                 ; @RXTX_REG28
	.comm	_RXTX_REG31,4,2                 ; @RXTX_REG31
	.comm	_RXTX_REG21,4,2                 ; @RXTX_REG21
	.comm	_RXTX_REG22,4,2                 ; @RXTX_REG22
	.comm	_RXTX_REG23,4,2                 ; @RXTX_REG23
	.comm	_RXTX_REG24,4,2                 ; @RXTX_REG24
	.comm	_RXTX_REG121,4,2                ; @RXTX_REG121
l_.str.1:                               ; @.str.1
	.asciz	"Iteration %d:\n"

l_.str.2:                               ; @.str.2
	.asciz	"DO 0x%x XO 0x%x EO 0x%x SO 0x%x\n"

l_.str.3:                               ; @.str.3
	.asciz	"DE 0x%x XE 0x%x EE 0x%x SE 0x%x\n"

l_.str.4:                               ; @.str.4
	.asciz	"SUM 0x%x\n"

l_.str.5:                               ; @.str.5
	.asciz	"Receiver calibration failed at %d loop\n"

	.comm	_RXTX_REG127,4,2                ; @RXTX_REG127
	.comm	_RXTX_REG128,4,2                ; @RXTX_REG128
	.comm	_RXTX_REG129,4,2                ; @RXTX_REG129
	.comm	_RXTX_REG130,4,2                ; @RXTX_REG130
	.comm	_RXTX_REG14,4,2                 ; @RXTX_REG14
l_.str.6:                               ; @.str.6
	.asciz	"Average Value:\n"

l_.str.7:                               ; @.str.7
	.asciz	"Enable Manual Summer calibration\n"

l_.str.8:                               ; @.str.8
	.asciz	"Enable Manual Latch calibration\n"

	.no_dead_strip	_xgene_phy_gen_avg_val
.subsections_via_symbols
