	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function rcar_pcie_hw_init
_rcar_pcie_hw_init:                     ## @rcar_pcie_hw_init
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r14
	movq	_PCIETCTLR@GOTPCREL(%rip), %r15
	movl	(%r15), %edx
	xorl	%esi, %esi
	callq	_rcar_pci_write_reg
	movq	_PCIEMSR@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r14, %rdi
	movl	$1, %esi
	callq	_rcar_pci_write_reg
	movq	%r14, %rdi
	callq	_rcar_pcie_wait_for_phyrdy
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	LBB0_5
## %bb.1:
	movq	_PCI_CLASS_BRIDGE_PCI@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	shll	$16, %esi
	movq	_IDSETR1@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r14, %rdi
	callq	_rcar_pci_write_reg
	movq	_PCI_SECONDARY_BUS@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_RCONF
	movq	%r14, %rdi
	movq	%rax, %rsi
	movl	$255, %edx
	movl	$1, %ecx
	callq	_rcar_rmw32
	movq	_PCI_SUBORDINATE_BUS@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_RCONF
	movq	%r14, %rdi
	movq	%rax, %rsi
	movl	$255, %edx
	movl	$1, %ecx
	callq	_rcar_rmw32
	xorl	%edi, %edi
	callq	_REXPCAP
	movq	_PCI_CAP_ID_EXP@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	movq	%r14, %rdi
	movq	%rax, %rsi
	movl	$255, %edx
	callq	_rcar_rmw32
	movq	_PCI_EXP_FLAGS@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_REXPCAP
	movq	_PCI_EXP_FLAGS_TYPE@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	movq	_PCI_EXP_TYPE_ROOT_PORT@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	shll	$4, %ecx
	movq	%r14, %rdi
	movq	%rax, %rsi
	callq	_rcar_rmw32
	movq	_PCI_HEADER_TYPE@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_RCONF
	movq	_PCI_HEADER_TYPE_BRIDGE@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	movq	%r14, %rdi
	movq	%rax, %rsi
	movl	$127, %edx
	callq	_rcar_rmw32
	movq	_PCI_EXP_LNKCAP@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_REXPCAP
	movq	_PCI_EXP_LNKCAP_DLLLARC@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	movq	%r14, %rdi
	movq	%rax, %rsi
	movl	%ecx, %edx
	callq	_rcar_rmw32
	movq	_PCI_EXP_SLTCAP@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_REXPCAP
	movq	_PCI_EXP_SLTCAP_PSN@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	movq	%r14, %rdi
	movq	%rax, %rsi
	xorl	%ecx, %ecx
	callq	_rcar_rmw32
	movq	_TLCTLR@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	incq	%rsi
	movq	%r14, %rdi
	movl	$63, %edx
	movl	$50, %ecx
	callq	_rcar_rmw32
	xorl	%edi, %edi
	callq	_RVCCAP
	movq	%r14, %rdi
	movq	%rax, %rsi
	movl	$-1048576, %edx                 ## imm = 0xFFF00000
	xorl	%ecx, %ecx
	callq	_rcar_rmw32
	movq	_CONFIG_PCI_MSI@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_IS_ENABLED
	testq	%rax, %rax
	je	LBB0_3
## %bb.2:
	movq	_PCIEMSITXR@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r14, %rdi
	movl	$-2145452032, %esi              ## imm = 0x801F0000
	callq	_rcar_pci_write_reg
LBB0_3:
	movq	_CFINIT@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	(%r15), %edx
	movq	%r14, %rdi
	callq	_rcar_pci_write_reg
	movq	%r14, %rdi
	callq	_rcar_pcie_wait_for_dl
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	LBB0_5
## %bb.4:
	movq	_PCIEINTXR@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	xorl	%ebx, %ebx
	movq	%r14, %rdi
	xorl	%edx, %edx
	movl	$3840, %ecx                     ## imm = 0xF00
	callq	_rcar_rmw32
	xorl	%eax, %eax
	callq	_wmb
LBB0_5:
	movl	%ebx, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_PCIETCTLR,4,2                  ## @PCIETCTLR
	.comm	_PCIEMSR,4,2                    ## @PCIEMSR
	.comm	_PCI_CLASS_BRIDGE_PCI,4,2       ## @PCI_CLASS_BRIDGE_PCI
	.comm	_IDSETR1,4,2                    ## @IDSETR1
	.comm	_PCI_SECONDARY_BUS,4,2          ## @PCI_SECONDARY_BUS
	.comm	_PCI_SUBORDINATE_BUS,4,2        ## @PCI_SUBORDINATE_BUS
	.comm	_PCI_CAP_ID_EXP,4,2             ## @PCI_CAP_ID_EXP
	.comm	_PCI_EXP_FLAGS,4,2              ## @PCI_EXP_FLAGS
	.comm	_PCI_EXP_FLAGS_TYPE,4,2         ## @PCI_EXP_FLAGS_TYPE
	.comm	_PCI_EXP_TYPE_ROOT_PORT,4,2     ## @PCI_EXP_TYPE_ROOT_PORT
	.comm	_PCI_HEADER_TYPE,4,2            ## @PCI_HEADER_TYPE
	.comm	_PCI_HEADER_TYPE_BRIDGE,4,2     ## @PCI_HEADER_TYPE_BRIDGE
	.comm	_PCI_EXP_LNKCAP,4,2             ## @PCI_EXP_LNKCAP
	.comm	_PCI_EXP_LNKCAP_DLLLARC,4,2     ## @PCI_EXP_LNKCAP_DLLLARC
	.comm	_PCI_EXP_SLTCAP,4,2             ## @PCI_EXP_SLTCAP
	.comm	_PCI_EXP_SLTCAP_PSN,4,2         ## @PCI_EXP_SLTCAP_PSN
	.comm	_TLCTLR,8,3                     ## @TLCTLR
	.comm	_CONFIG_PCI_MSI,4,2             ## @CONFIG_PCI_MSI
	.comm	_PCIEMSITXR,4,2                 ## @PCIEMSITXR
	.comm	_CFINIT,4,2                     ## @CFINIT
	.comm	_PCIEINTXR,8,3                  ## @PCIEINTXR
	.no_dead_strip	_rcar_pcie_hw_init
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function rcar_pcie_hw_init
_rcar_pcie_hw_init:                     ; @rcar_pcie_hw_init
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x19, x0
Lloh0:
	adrp	x20, _PCIETCTLR@GOTPAGE
Lloh1:
	ldr	x20, [x20, _PCIETCTLR@GOTPAGEOFF]
	ldr	w2, [x20]
	mov	w1, #0
	bl	_rcar_pci_write_reg
Lloh2:
	adrp	x8, _PCIEMSR@GOTPAGE
Lloh3:
	ldr	x8, [x8, _PCIEMSR@GOTPAGEOFF]
Lloh4:
	ldr	w2, [x8]
	mov	x0, x19
	mov	w1, #1
	bl	_rcar_pci_write_reg
	mov	x0, x19
	bl	_rcar_pcie_wait_for_phyrdy
	cbnz	w0, LBB0_5
; %bb.1:
Lloh5:
	adrp	x8, _PCI_CLASS_BRIDGE_PCI@GOTPAGE
Lloh6:
	ldr	x8, [x8, _PCI_CLASS_BRIDGE_PCI@GOTPAGEOFF]
Lloh7:
	ldr	w8, [x8]
	lsl	w1, w8, #16
Lloh8:
	adrp	x8, _IDSETR1@GOTPAGE
Lloh9:
	ldr	x8, [x8, _IDSETR1@GOTPAGEOFF]
Lloh10:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_rcar_pci_write_reg
Lloh11:
	adrp	x8, _PCI_SECONDARY_BUS@GOTPAGE
Lloh12:
	ldr	x8, [x8, _PCI_SECONDARY_BUS@GOTPAGEOFF]
Lloh13:
	ldr	w0, [x8]
	bl	_RCONF
	mov	x1, x0
	mov	x0, x19
	mov	w2, #255
	mov	w3, #1
	bl	_rcar_rmw32
Lloh14:
	adrp	x8, _PCI_SUBORDINATE_BUS@GOTPAGE
Lloh15:
	ldr	x8, [x8, _PCI_SUBORDINATE_BUS@GOTPAGEOFF]
Lloh16:
	ldr	w0, [x8]
	bl	_RCONF
	mov	x1, x0
	mov	x0, x19
	mov	w2, #255
	mov	w3, #1
	bl	_rcar_rmw32
	mov	w0, #0
	bl	_REXPCAP
	mov	x1, x0
Lloh17:
	adrp	x8, _PCI_CAP_ID_EXP@GOTPAGE
Lloh18:
	ldr	x8, [x8, _PCI_CAP_ID_EXP@GOTPAGEOFF]
Lloh19:
	ldr	w3, [x8]
	mov	x0, x19
	mov	w2, #255
	bl	_rcar_rmw32
Lloh20:
	adrp	x8, _PCI_EXP_FLAGS@GOTPAGE
Lloh21:
	ldr	x8, [x8, _PCI_EXP_FLAGS@GOTPAGEOFF]
Lloh22:
	ldr	w0, [x8]
	bl	_REXPCAP
	mov	x1, x0
Lloh23:
	adrp	x8, _PCI_EXP_FLAGS_TYPE@GOTPAGE
Lloh24:
	ldr	x8, [x8, _PCI_EXP_FLAGS_TYPE@GOTPAGEOFF]
Lloh25:
	ldr	w2, [x8]
Lloh26:
	adrp	x8, _PCI_EXP_TYPE_ROOT_PORT@GOTPAGE
Lloh27:
	ldr	x8, [x8, _PCI_EXP_TYPE_ROOT_PORT@GOTPAGEOFF]
Lloh28:
	ldr	w8, [x8]
	lsl	w3, w8, #4
	mov	x0, x19
	bl	_rcar_rmw32
Lloh29:
	adrp	x8, _PCI_HEADER_TYPE@GOTPAGE
Lloh30:
	ldr	x8, [x8, _PCI_HEADER_TYPE@GOTPAGEOFF]
Lloh31:
	ldr	w0, [x8]
	bl	_RCONF
	mov	x1, x0
Lloh32:
	adrp	x8, _PCI_HEADER_TYPE_BRIDGE@GOTPAGE
Lloh33:
	ldr	x8, [x8, _PCI_HEADER_TYPE_BRIDGE@GOTPAGEOFF]
Lloh34:
	ldr	w3, [x8]
	mov	x0, x19
	mov	w2, #127
	bl	_rcar_rmw32
Lloh35:
	adrp	x8, _PCI_EXP_LNKCAP@GOTPAGE
Lloh36:
	ldr	x8, [x8, _PCI_EXP_LNKCAP@GOTPAGEOFF]
Lloh37:
	ldr	w0, [x8]
	bl	_REXPCAP
	mov	x1, x0
Lloh38:
	adrp	x8, _PCI_EXP_LNKCAP_DLLLARC@GOTPAGE
Lloh39:
	ldr	x8, [x8, _PCI_EXP_LNKCAP_DLLLARC@GOTPAGEOFF]
Lloh40:
	ldr	w2, [x8]
	mov	x0, x19
	mov	x3, x2
	bl	_rcar_rmw32
Lloh41:
	adrp	x8, _PCI_EXP_SLTCAP@GOTPAGE
Lloh42:
	ldr	x8, [x8, _PCI_EXP_SLTCAP@GOTPAGEOFF]
Lloh43:
	ldr	w0, [x8]
	bl	_REXPCAP
	mov	x1, x0
Lloh44:
	adrp	x8, _PCI_EXP_SLTCAP_PSN@GOTPAGE
Lloh45:
	ldr	x8, [x8, _PCI_EXP_SLTCAP_PSN@GOTPAGEOFF]
Lloh46:
	ldr	w2, [x8]
	mov	x0, x19
	mov	w3, #0
	bl	_rcar_rmw32
Lloh47:
	adrp	x8, _TLCTLR@GOTPAGE
Lloh48:
	ldr	x8, [x8, _TLCTLR@GOTPAGEOFF]
Lloh49:
	ldr	x8, [x8]
	add	x1, x8, #1
	mov	x0, x19
	mov	w2, #63
	mov	w3, #50
	bl	_rcar_rmw32
	mov	w0, #0
	bl	_RVCCAP
	mov	x1, x0
	mov	x0, x19
	mov	w2, #-1048576
	mov	w3, #0
	bl	_rcar_rmw32
Lloh50:
	adrp	x8, _CONFIG_PCI_MSI@GOTPAGE
Lloh51:
	ldr	x8, [x8, _CONFIG_PCI_MSI@GOTPAGEOFF]
Lloh52:
	ldr	w0, [x8]
	bl	_IS_ENABLED
	cbz	x0, LBB0_3
; %bb.2:
Lloh53:
	adrp	x8, _PCIEMSITXR@GOTPAGE
Lloh54:
	ldr	x8, [x8, _PCIEMSITXR@GOTPAGEOFF]
Lloh55:
	ldr	w2, [x8]
	mov	x0, x19
	mov	w1, #-2145452032
	bl	_rcar_pci_write_reg
LBB0_3:
Lloh56:
	adrp	x8, _CFINIT@GOTPAGE
Lloh57:
	ldr	x8, [x8, _CFINIT@GOTPAGEOFF]
Lloh58:
	ldr	w1, [x8]
	ldr	w2, [x20]
	mov	x0, x19
	bl	_rcar_pci_write_reg
	mov	x0, x19
	bl	_rcar_pcie_wait_for_dl
	cbnz	w0, LBB0_5
; %bb.4:
Lloh59:
	adrp	x8, _PCIEINTXR@GOTPAGE
Lloh60:
	ldr	x8, [x8, _PCIEINTXR@GOTPAGEOFF]
Lloh61:
	ldr	x1, [x8]
	mov	x0, x19
	mov	w2, #0
	mov	w3, #3840
	bl	_rcar_rmw32
	bl	_wmb
	mov	w0, #0
LBB0_5:
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh50, Lloh51, Lloh52
	.loh AdrpLdrGotLdr	Lloh47, Lloh48, Lloh49
	.loh AdrpLdrGotLdr	Lloh44, Lloh45, Lloh46
	.loh AdrpLdrGotLdr	Lloh41, Lloh42, Lloh43
	.loh AdrpLdrGotLdr	Lloh38, Lloh39, Lloh40
	.loh AdrpLdrGotLdr	Lloh35, Lloh36, Lloh37
	.loh AdrpLdrGotLdr	Lloh32, Lloh33, Lloh34
	.loh AdrpLdrGotLdr	Lloh29, Lloh30, Lloh31
	.loh AdrpLdrGotLdr	Lloh26, Lloh27, Lloh28
	.loh AdrpLdrGotLdr	Lloh23, Lloh24, Lloh25
	.loh AdrpLdrGotLdr	Lloh20, Lloh21, Lloh22
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh19
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh16
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh53, Lloh54, Lloh55
	.loh AdrpLdrGotLdr	Lloh56, Lloh57, Lloh58
	.loh AdrpLdrGotLdr	Lloh59, Lloh60, Lloh61
	.cfi_endproc
                                        ; -- End function
	.comm	_PCIETCTLR,4,2                  ; @PCIETCTLR
	.comm	_PCIEMSR,4,2                    ; @PCIEMSR
	.comm	_PCI_CLASS_BRIDGE_PCI,4,2       ; @PCI_CLASS_BRIDGE_PCI
	.comm	_IDSETR1,4,2                    ; @IDSETR1
	.comm	_PCI_SECONDARY_BUS,4,2          ; @PCI_SECONDARY_BUS
	.comm	_PCI_SUBORDINATE_BUS,4,2        ; @PCI_SUBORDINATE_BUS
	.comm	_PCI_CAP_ID_EXP,4,2             ; @PCI_CAP_ID_EXP
	.comm	_PCI_EXP_FLAGS,4,2              ; @PCI_EXP_FLAGS
	.comm	_PCI_EXP_FLAGS_TYPE,4,2         ; @PCI_EXP_FLAGS_TYPE
	.comm	_PCI_EXP_TYPE_ROOT_PORT,4,2     ; @PCI_EXP_TYPE_ROOT_PORT
	.comm	_PCI_HEADER_TYPE,4,2            ; @PCI_HEADER_TYPE
	.comm	_PCI_HEADER_TYPE_BRIDGE,4,2     ; @PCI_HEADER_TYPE_BRIDGE
	.comm	_PCI_EXP_LNKCAP,4,2             ; @PCI_EXP_LNKCAP
	.comm	_PCI_EXP_LNKCAP_DLLLARC,4,2     ; @PCI_EXP_LNKCAP_DLLLARC
	.comm	_PCI_EXP_SLTCAP,4,2             ; @PCI_EXP_SLTCAP
	.comm	_PCI_EXP_SLTCAP_PSN,4,2         ; @PCI_EXP_SLTCAP_PSN
	.comm	_TLCTLR,8,3                     ; @TLCTLR
	.comm	_CONFIG_PCI_MSI,4,2             ; @CONFIG_PCI_MSI
	.comm	_PCIEMSITXR,4,2                 ; @PCIEMSITXR
	.comm	_CFINIT,4,2                     ; @CFINIT
	.comm	_PCIEINTXR,8,3                  ; @PCIEINTXR
	.no_dead_strip	_rcar_pcie_hw_init
.subsections_via_symbols
