	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function spear13xx_pcie_establish_link
_spear13xx_pcie_establish_link:         ## @spear13xx_pcie_establish_link
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %rbx
	movq	8(%rdi), %r14
	movq	16(%rdi), %r12
	movq	_EXP_CAP_ID_OFFSET@GOTPCREL(%rip), %rax
	movl	(%rax), %r15d
	movq	%r12, %rdi
	callq	_dw_pcie_link_up
	testq	%rax, %rax
	je	LBB0_2
## %bb.1:
	movl	4(%r12), %edi
	leaq	L_.str(%rip), %rsi
	callq	_dev_err
	xorl	%eax, %eax
	jmp	LBB0_8
LBB0_2:
	leaq	8(%r12), %rdi
	callq	_dw_pcie_setup_rc
	movl	(%r12), %edi
	addl	%r15d, %edi
	movq	_PCI_EXP_DEVCTL@GOTPCREL(%rip), %r13
	addl	(%r13), %edi
	leaq	-44(%rbp), %rdx
	movl	$2, %esi
	callq	_dw_pcie_read
	movq	_PCI_EXP_DEVCTL_READRQ@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	notl	%edx
	andl	-44(%rbp), %edx
	movl	%edx, -44(%rbp)
	movl	(%r12), %edi
	addl	%r15d, %edi
	addl	(%r13), %edi
	movl	$2, %esi
	callq	_dw_pcie_write
	movq	_PCI_VENDOR_ID@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	addl	(%r12), %edi
	movl	$2, %esi
	movl	$4170, %edx                     ## imm = 0x104A
	callq	_dw_pcie_write
	movq	_PCI_DEVICE_ID@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	addl	(%r12), %edi
	movl	$2, %esi
	movl	$52608, %edx                    ## imm = 0xCD80
	callq	_dw_pcie_write
	cmpq	$0, (%rbx)
	je	LBB0_7
## %bb.3:
	movl	(%r12), %edi
	addl	%r15d, %edi
	movq	_PCI_EXP_LNKCAP@GOTPCREL(%rip), %r13
	addl	(%r13), %edi
	leaq	-44(%rbp), %rdx
	movl	$4, %esi
	callq	_dw_pcie_read
	movl	-44(%rbp), %edx
	movq	_PCI_EXP_LNKCAP_SLS@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, %esi
	andl	%edx, %esi
	movq	_PCI_EXP_LNKCAP_SLS_2_5GB@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	cmpl	%ecx, %esi
	je	LBB0_5
## %bb.4:
	notl	%eax
	andl	%eax, %edx
	orl	%ecx, %edx
	movl	%edx, -44(%rbp)
	movl	(%r12), %edi
	addl	%r15d, %edi
	addl	(%r13), %edi
	movl	$4, %esi
	callq	_dw_pcie_write
LBB0_5:
	movl	(%r12), %edi
	addl	%r15d, %edi
	movq	_PCI_EXP_LNKCTL2@GOTPCREL(%rip), %rbx
	addl	(%rbx), %edi
	leaq	-44(%rbp), %rdx
	movl	$2, %esi
	callq	_dw_pcie_read
	movl	-44(%rbp), %edx
	movq	_PCI_EXP_LNKCAP_SLS@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, %esi
	andl	%edx, %esi
	movq	_PCI_EXP_LNKCAP_SLS_2_5GB@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	cmpl	%ecx, %esi
	je	LBB0_7
## %bb.6:
	notl	%eax
	andl	%eax, %edx
	orl	%ecx, %edx
	movl	%edx, -44(%rbp)
	addl	(%r12), %r15d
	addl	(%rbx), %r15d
	movl	%r15d, %edi
	movl	$2, %esi
	callq	_dw_pcie_write
LBB0_7:
	movq	_DEVICE_TYPE_RC@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_MISCTRL_EN_ID@GOTPCREL(%rip), %rax
	movb	(%rax), %al
	btsl	%eax, %edi
	movq	_APP_LTSSM_ENABLE_ID@GOTPCREL(%rip), %rax
	movb	(%rax), %al
	btsl	%eax, %edi
	movq	_REG_TRANSLATION_ENABLE@GOTPCREL(%rip), %rax
	movb	(%rax), %al
	btsl	%eax, %edi
	movq	%r14, %rsi
	callq	_writel
	movq	%r12, %rdi
	callq	_dw_pcie_wait_for_link
LBB0_8:
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_EXP_CAP_ID_OFFSET,4,2          ## @EXP_CAP_ID_OFFSET
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"link already up\n"

	.comm	_PCI_EXP_DEVCTL,4,2             ## @PCI_EXP_DEVCTL
	.comm	_PCI_EXP_DEVCTL_READRQ,4,2      ## @PCI_EXP_DEVCTL_READRQ
	.comm	_PCI_VENDOR_ID,4,2              ## @PCI_VENDOR_ID
	.comm	_PCI_DEVICE_ID,4,2              ## @PCI_DEVICE_ID
	.comm	_PCI_EXP_LNKCAP,4,2             ## @PCI_EXP_LNKCAP
	.comm	_PCI_EXP_LNKCAP_SLS,4,2         ## @PCI_EXP_LNKCAP_SLS
	.comm	_PCI_EXP_LNKCAP_SLS_2_5GB,4,2   ## @PCI_EXP_LNKCAP_SLS_2_5GB
	.comm	_PCI_EXP_LNKCTL2,4,2            ## @PCI_EXP_LNKCTL2
	.comm	_DEVICE_TYPE_RC,4,2             ## @DEVICE_TYPE_RC
	.comm	_MISCTRL_EN_ID,4,2              ## @MISCTRL_EN_ID
	.comm	_APP_LTSSM_ENABLE_ID,4,2        ## @APP_LTSSM_ENABLE_ID
	.comm	_REG_TRANSLATION_ENABLE,4,2     ## @REG_TRANSLATION_ENABLE
	.no_dead_strip	_spear13xx_pcie_establish_link
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function spear13xx_pcie_establish_link
_spear13xx_pcie_establish_link:         ; @spear13xx_pcie_establish_link
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #80
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x21, x0
	ldp	x20, x19, [x0, #8]
Lloh0:
	adrp	x8, _EXP_CAP_ID_OFFSET@GOTPAGE
Lloh1:
	ldr	x8, [x8, _EXP_CAP_ID_OFFSET@GOTPAGEOFF]
Lloh2:
	ldr	w22, [x8]
	mov	x0, x19
	bl	_dw_pcie_link_up
	cbz	x0, LBB0_2
; %bb.1:
	ldr	w0, [x19, #4]
Lloh3:
	adrp	x1, l_.str@PAGE
Lloh4:
	add	x1, x1, l_.str@PAGEOFF
	bl	_dev_err
	mov	w0, #0
	b	LBB0_8
LBB0_2:
	add	x0, x19, #8
	bl	_dw_pcie_setup_rc
	ldr	w8, [x19]
Lloh5:
	adrp	x23, _PCI_EXP_DEVCTL@GOTPAGE
Lloh6:
	ldr	x23, [x23, _PCI_EXP_DEVCTL@GOTPAGEOFF]
	ldr	w9, [x23]
	add	w8, w8, w22
	add	w0, w8, w9
	add	x2, sp, #12
	mov	w1, #2
	bl	_dw_pcie_read
Lloh7:
	adrp	x8, _PCI_EXP_DEVCTL_READRQ@GOTPAGE
Lloh8:
	ldr	x8, [x8, _PCI_EXP_DEVCTL_READRQ@GOTPAGEOFF]
Lloh9:
	ldr	w8, [x8]
	ldr	w9, [sp, #12]
	bic	w2, w9, w8
	str	w2, [sp, #12]
	ldr	w8, [x19]
	ldr	w9, [x23]
	add	w8, w8, w22
	add	w0, w8, w9
	mov	w1, #2
	bl	_dw_pcie_write
	ldr	w8, [x19]
Lloh10:
	adrp	x9, _PCI_VENDOR_ID@GOTPAGE
Lloh11:
	ldr	x9, [x9, _PCI_VENDOR_ID@GOTPAGEOFF]
Lloh12:
	ldr	w9, [x9]
	add	w0, w9, w8
	mov	w1, #2
	mov	w2, #4170
	bl	_dw_pcie_write
	ldr	w8, [x19]
Lloh13:
	adrp	x9, _PCI_DEVICE_ID@GOTPAGE
Lloh14:
	ldr	x9, [x9, _PCI_DEVICE_ID@GOTPAGEOFF]
Lloh15:
	ldr	w9, [x9]
	add	w0, w9, w8
	mov	w1, #2
	mov	w2, #52608
	bl	_dw_pcie_write
	ldr	x8, [x21]
	cbz	x8, LBB0_7
; %bb.3:
	ldr	w8, [x19]
Lloh16:
	adrp	x24, _PCI_EXP_LNKCAP@GOTPAGE
Lloh17:
	ldr	x24, [x24, _PCI_EXP_LNKCAP@GOTPAGEOFF]
	ldr	w9, [x24]
	add	w8, w8, w22
	add	w0, w8, w9
	add	x2, sp, #12
	mov	w1, #4
	bl	_dw_pcie_read
	ldr	w8, [sp, #12]
Lloh18:
	adrp	x21, _PCI_EXP_LNKCAP_SLS@GOTPAGE
Lloh19:
	ldr	x21, [x21, _PCI_EXP_LNKCAP_SLS@GOTPAGEOFF]
	ldr	w9, [x21]
	and	w11, w9, w8
Lloh20:
	adrp	x23, _PCI_EXP_LNKCAP_SLS_2_5GB@GOTPAGE
Lloh21:
	ldr	x23, [x23, _PCI_EXP_LNKCAP_SLS_2_5GB@GOTPAGEOFF]
	ldr	w10, [x23]
	cmp	w11, w10
	b.eq	LBB0_5
; %bb.4:
	bic	w8, w8, w9
	orr	w2, w8, w10
	str	w2, [sp, #12]
	ldr	w8, [x19]
	ldr	w9, [x24]
	add	w8, w8, w22
	add	w0, w8, w9
	mov	w1, #4
	bl	_dw_pcie_write
LBB0_5:
	ldr	w8, [x19]
Lloh22:
	adrp	x24, _PCI_EXP_LNKCTL2@GOTPAGE
Lloh23:
	ldr	x24, [x24, _PCI_EXP_LNKCTL2@GOTPAGEOFF]
	ldr	w9, [x24]
	add	w8, w8, w22
	add	w0, w8, w9
	add	x2, sp, #12
	mov	w1, #2
	bl	_dw_pcie_read
	ldr	w8, [sp, #12]
	ldr	w9, [x21]
	and	w11, w9, w8
	ldr	w10, [x23]
	cmp	w11, w10
	b.eq	LBB0_7
; %bb.6:
	bic	w8, w8, w9
	orr	w2, w8, w10
	str	w2, [sp, #12]
	ldr	w8, [x19]
	ldr	w9, [x24]
	add	w8, w8, w22
	add	w0, w8, w9
	mov	w1, #2
	bl	_dw_pcie_write
LBB0_7:
Lloh24:
	adrp	x8, _DEVICE_TYPE_RC@GOTPAGE
Lloh25:
	ldr	x8, [x8, _DEVICE_TYPE_RC@GOTPAGEOFF]
Lloh26:
	ldr	w8, [x8]
Lloh27:
	adrp	x9, _MISCTRL_EN_ID@GOTPAGE
Lloh28:
	ldr	x9, [x9, _MISCTRL_EN_ID@GOTPAGEOFF]
Lloh29:
	ldr	w9, [x9]
	mov	w10, #1
	lsl	w9, w10, w9
	orr	w8, w9, w8
Lloh30:
	adrp	x9, _APP_LTSSM_ENABLE_ID@GOTPAGE
Lloh31:
	ldr	x9, [x9, _APP_LTSSM_ENABLE_ID@GOTPAGEOFF]
Lloh32:
	ldr	w9, [x9]
	lsl	w9, w10, w9
	orr	w8, w8, w9
Lloh33:
	adrp	x9, _REG_TRANSLATION_ENABLE@GOTPAGE
Lloh34:
	ldr	x9, [x9, _REG_TRANSLATION_ENABLE@GOTPAGEOFF]
Lloh35:
	ldr	w9, [x9]
	lsl	w9, w10, w9
	orr	w0, w8, w9
	mov	x1, x20
	bl	_writel
	mov	x0, x19
	bl	_dw_pcie_wait_for_link
LBB0_8:
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #80
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpAdd	Lloh3, Lloh4
	.loh AdrpLdrGotLdr	Lloh13, Lloh14, Lloh15
	.loh AdrpLdrGotLdr	Lloh10, Lloh11, Lloh12
	.loh AdrpLdrGotLdr	Lloh7, Lloh8, Lloh9
	.loh AdrpLdrGot	Lloh5, Lloh6
	.loh AdrpLdrGot	Lloh20, Lloh21
	.loh AdrpLdrGot	Lloh18, Lloh19
	.loh AdrpLdrGot	Lloh16, Lloh17
	.loh AdrpLdrGot	Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh33, Lloh34, Lloh35
	.loh AdrpLdrGotLdr	Lloh30, Lloh31, Lloh32
	.loh AdrpLdrGotLdr	Lloh27, Lloh28, Lloh29
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.cfi_endproc
                                        ; -- End function
	.comm	_EXP_CAP_ID_OFFSET,4,2          ; @EXP_CAP_ID_OFFSET
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"link already up\n"

	.comm	_PCI_EXP_DEVCTL,4,2             ; @PCI_EXP_DEVCTL
	.comm	_PCI_EXP_DEVCTL_READRQ,4,2      ; @PCI_EXP_DEVCTL_READRQ
	.comm	_PCI_VENDOR_ID,4,2              ; @PCI_VENDOR_ID
	.comm	_PCI_DEVICE_ID,4,2              ; @PCI_DEVICE_ID
	.comm	_PCI_EXP_LNKCAP,4,2             ; @PCI_EXP_LNKCAP
	.comm	_PCI_EXP_LNKCAP_SLS,4,2         ; @PCI_EXP_LNKCAP_SLS
	.comm	_PCI_EXP_LNKCAP_SLS_2_5GB,4,2   ; @PCI_EXP_LNKCAP_SLS_2_5GB
	.comm	_PCI_EXP_LNKCTL2,4,2            ; @PCI_EXP_LNKCTL2
	.comm	_DEVICE_TYPE_RC,4,2             ; @DEVICE_TYPE_RC
	.comm	_MISCTRL_EN_ID,4,2              ; @MISCTRL_EN_ID
	.comm	_APP_LTSSM_ENABLE_ID,4,2        ; @APP_LTSSM_ENABLE_ID
	.comm	_REG_TRANSLATION_ENABLE,4,2     ; @REG_TRANSLATION_ENABLE
	.no_dead_strip	_spear13xx_pcie_establish_link
.subsections_via_symbols
