	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function igb_init_nvm_params_82575
_igb_init_nvm_params_82575:             ## @igb_init_nvm_params_82575
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %rbx
	movq	_E1000_EECD@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_rd32
	movl	%eax, %r15d
	movq	_E1000_EECD_SIZE_EX_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	andl	%r15d, %eax
	movq	_E1000_EECD_SIZE_EX_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	sarl	%cl, %eax
	movq	_NVM_WORD_SIZE_BASE_SHIFT@GOTPCREL(%rip), %rcx
	addl	(%rcx), %eax
	cmpl	$15, %eax
	movl	$15, %edi
	cmovll	%eax, %edi
	callq	_BIT
	movl	%eax, %r14d
	movl	%eax, 48(%rbx)
	movabsq	$4294967304, %rax               ## imm = 0x100000008
	movq	%rax, 4(%rbx)
	movl	12(%rbx), %eax
	cmpl	$128, %eax
	je	LBB0_3
## %bb.1:
	cmpl	$129, %eax
	jne	LBB0_4
## %bb.2:
	movl	$32, 16(%rbx)
	movl	$16, %eax
	jmp	LBB0_5
LBB0_3:
	movl	$8, 16(%rbx)
	movl	$8, %eax
	jmp	LBB0_5
LBB0_4:
	movq	_E1000_EECD_ADDR_BITS@GOTPCREL(%rip), %rax
	xorl	%ecx, %ecx
	andl	(%rax), %r15d
	setne	%cl
	movl	$8, %eax
	movl	$32, %edx
	cmovel	%eax, %edx
	movl	%edx, 16(%rbx)
	leal	8(,%rcx,8), %eax
LBB0_5:
	movl	%eax, 20(%rbx)
	movl	$15, %edi
	callq	_BIT
	cmpl	%eax, %r14d
	jne	LBB0_7
## %bb.6:
	movl	$128, 16(%rbx)
LBB0_7:
	movq	_e1000_nvm_eeprom_spi@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 52(%rbx)
	movq	_igb_acquire_nvm_82575@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 44(%rbx)
	movq	_igb_release_nvm_82575@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 40(%rbx)
	movq	_igb_write_nvm_spi@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 36(%rbx)
	movq	_igb_validate_nvm_checksum@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 28(%rbx)
	movq	_igb_update_nvm_checksum@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 24(%rbx)
	movl	48(%rbx), %r14d
	movl	$15, %edi
	callq	_BIT
	cmpl	%eax, %r14d
	jge	LBB0_8
## %bb.9:
	movq	_igb_read_nvm_eerd@GOTPCREL(%rip), %rax
	jmp	LBB0_10
LBB0_8:
	movq	_igb_read_nvm_spi@GOTPCREL(%rip), %rax
LBB0_10:
	movl	(%rax), %eax
	movl	%eax, 32(%rbx)
	movl	$-130, %eax
	addl	(%rbx), %eax
	cmpl	$2, %eax
	ja	LBB0_12
## %bb.11:
	cltq
	leaq	l_switch.table.igb_init_nvm_params_82575(%rip), %rcx
	movq	(%rcx,%rax,8), %rcx
	leaq	l_switch.table.igb_init_nvm_params_82575.1(%rip), %rdx
	movq	(%rdx,%rax,8), %rax
	movl	(%rcx), %ecx
	movl	%ecx, 28(%rbx)
	movl	(%rax), %eax
	movl	%eax, 24(%rbx)
LBB0_12:
	xorl	%eax, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_E1000_EECD,4,2                 ## @E1000_EECD
	.comm	_E1000_EECD_SIZE_EX_MASK,4,2    ## @E1000_EECD_SIZE_EX_MASK
	.comm	_E1000_EECD_SIZE_EX_SHIFT,4,2   ## @E1000_EECD_SIZE_EX_SHIFT
	.comm	_NVM_WORD_SIZE_BASE_SHIFT,8,3   ## @NVM_WORD_SIZE_BASE_SHIFT
	.comm	_E1000_EECD_ADDR_BITS,4,2       ## @E1000_EECD_ADDR_BITS
	.comm	_e1000_nvm_eeprom_spi,4,2       ## @e1000_nvm_eeprom_spi
	.comm	_igb_acquire_nvm_82575,4,2      ## @igb_acquire_nvm_82575
	.comm	_igb_release_nvm_82575,4,2      ## @igb_release_nvm_82575
	.comm	_igb_write_nvm_spi,4,2          ## @igb_write_nvm_spi
	.comm	_igb_validate_nvm_checksum,4,2  ## @igb_validate_nvm_checksum
	.comm	_igb_update_nvm_checksum,4,2    ## @igb_update_nvm_checksum
	.comm	_igb_read_nvm_eerd,4,2          ## @igb_read_nvm_eerd
	.comm	_igb_read_nvm_spi,4,2           ## @igb_read_nvm_spi
	.comm	_igb_validate_nvm_checksum_82580,4,2 ## @igb_validate_nvm_checksum_82580
	.comm	_igb_update_nvm_checksum_82580,4,2 ## @igb_update_nvm_checksum_82580
	.comm	_igb_validate_nvm_checksum_i350,4,2 ## @igb_validate_nvm_checksum_i350
	.comm	_igb_update_nvm_checksum_i350,4,2 ## @igb_update_nvm_checksum_i350
	.no_dead_strip	_igb_init_nvm_params_82575
	.section	__DATA,__const
	.p2align	3                               ## @switch.table.igb_init_nvm_params_82575
l_switch.table.igb_init_nvm_params_82575:
	.quad	_igb_validate_nvm_checksum_i350
	.quad	_igb_validate_nvm_checksum_i350
	.quad	_igb_validate_nvm_checksum_82580

	.p2align	3                               ## @switch.table.igb_init_nvm_params_82575.1
l_switch.table.igb_init_nvm_params_82575.1:
	.quad	_igb_update_nvm_checksum_i350
	.quad	_igb_update_nvm_checksum_i350
	.quad	_igb_update_nvm_checksum_82580

.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.section	__TEXT,__literal8,8byte_literals
	.p2align	3                               ; -- Begin function igb_init_nvm_params_82575
lCPI0_0:
	.long	8                               ; 0x8
	.long	1                               ; 0x1
	.section	__TEXT,__text,regular,pure_instructions
	.p2align	2
_igb_init_nvm_params_82575:             ; @igb_init_nvm_params_82575
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x0
Lloh0:
	adrp	x8, _E1000_EECD@GOTPAGE
Lloh1:
	ldr	x8, [x8, _E1000_EECD@GOTPAGEOFF]
Lloh2:
	ldr	w0, [x8]
	bl	_rd32
	mov	x21, x0
Lloh3:
	adrp	x8, _E1000_EECD_SIZE_EX_MASK@GOTPAGE
Lloh4:
	ldr	x8, [x8, _E1000_EECD_SIZE_EX_MASK@GOTPAGEOFF]
Lloh5:
	ldr	w8, [x8]
	and	w8, w8, w0
Lloh6:
	adrp	x9, _E1000_EECD_SIZE_EX_SHIFT@GOTPAGE
Lloh7:
	ldr	x9, [x9, _E1000_EECD_SIZE_EX_SHIFT@GOTPAGEOFF]
Lloh8:
	ldr	w9, [x9]
Lloh9:
	adrp	x10, _NVM_WORD_SIZE_BASE_SHIFT@GOTPAGE
Lloh10:
	ldr	x10, [x10, _NVM_WORD_SIZE_BASE_SHIFT@GOTPAGEOFF]
	asr	w8, w8, w9
Lloh11:
	ldr	w9, [x10]
	add	w8, w8, w9
	mov	w9, #15
	cmp	w8, #15
	csel	w0, w8, w9, lt
	bl	_BIT
	mov	x20, x0
	str	w0, [x19, #48]
Lloh12:
	adrp	x8, lCPI0_0@PAGE
Lloh13:
	ldr	d0, [x8, lCPI0_0@PAGEOFF]
	stur	d0, [x19, #4]
	ldr	w8, [x19, #12]
	cmp	w8, #128
	b.eq	LBB0_3
; %bb.1:
	cmp	w8, #129
	b.ne	LBB0_4
; %bb.2:
	mov	w8, #32
	str	w8, [x19, #16]
	mov	w8, #16
	b	LBB0_5
LBB0_3:
	mov	w8, #8
	str	w8, [x19, #16]
	b	LBB0_5
LBB0_4:
Lloh14:
	adrp	x8, _E1000_EECD_ADDR_BITS@GOTPAGE
Lloh15:
	ldr	x8, [x8, _E1000_EECD_ADDR_BITS@GOTPAGEOFF]
Lloh16:
	ldr	w8, [x8]
	tst	w8, w21
	mov	w8, #32
	mov	w9, #8
	csel	w8, w9, w8, eq
	str	w8, [x19, #16]
	mov	w8, #16
	csel	w8, w9, w8, eq
LBB0_5:
	str	w8, [x19, #20]
	mov	w0, #15
	bl	_BIT
	cmp	w20, w0
	b.ne	LBB0_7
; %bb.6:
	mov	w8, #128
	str	w8, [x19, #16]
LBB0_7:
Lloh17:
	adrp	x8, _e1000_nvm_eeprom_spi@GOTPAGE
Lloh18:
	ldr	x8, [x8, _e1000_nvm_eeprom_spi@GOTPAGEOFF]
Lloh19:
	ldr	w8, [x8]
	str	w8, [x19, #52]
Lloh20:
	adrp	x8, _igb_acquire_nvm_82575@GOTPAGE
Lloh21:
	ldr	x8, [x8, _igb_acquire_nvm_82575@GOTPAGEOFF]
Lloh22:
	ldr	w8, [x8]
	str	w8, [x19, #44]
Lloh23:
	adrp	x8, _igb_release_nvm_82575@GOTPAGE
Lloh24:
	ldr	x8, [x8, _igb_release_nvm_82575@GOTPAGEOFF]
Lloh25:
	ldr	w8, [x8]
Lloh26:
	adrp	x9, _igb_write_nvm_spi@GOTPAGE
Lloh27:
	ldr	x9, [x9, _igb_write_nvm_spi@GOTPAGEOFF]
Lloh28:
	ldr	w9, [x9]
	stp	w9, w8, [x19, #36]
Lloh29:
	adrp	x8, _igb_validate_nvm_checksum@GOTPAGE
Lloh30:
	ldr	x8, [x8, _igb_validate_nvm_checksum@GOTPAGEOFF]
Lloh31:
	ldr	w8, [x8]
Lloh32:
	adrp	x9, _igb_update_nvm_checksum@GOTPAGE
Lloh33:
	ldr	x9, [x9, _igb_update_nvm_checksum@GOTPAGEOFF]
Lloh34:
	ldr	w9, [x9]
	stp	w9, w8, [x19, #24]
	ldr	w20, [x19, #48]
	mov	w0, #15
	bl	_BIT
Lloh35:
	adrp	x8, _igb_read_nvm_eerd@GOTPAGE
Lloh36:
	ldr	x8, [x8, _igb_read_nvm_eerd@GOTPAGEOFF]
Lloh37:
	adrp	x9, _igb_read_nvm_spi@GOTPAGE
Lloh38:
	ldr	x9, [x9, _igb_read_nvm_spi@GOTPAGEOFF]
	cmp	w20, w0
	csel	x8, x8, x9, lt
	ldr	w8, [x8]
	str	w8, [x19, #32]
	ldr	w8, [x19]
	sub	w8, w8, #130
	cmp	w8, #2
	b.hi	LBB0_9
; %bb.8:
	sbfiz	x8, x8, #3, #32
Lloh39:
	adrp	x9, l_switch.table.igb_init_nvm_params_82575@PAGE
Lloh40:
	add	x9, x9, l_switch.table.igb_init_nvm_params_82575@PAGEOFF
	ldr	x9, [x9, x8]
Lloh41:
	adrp	x10, l_switch.table.igb_init_nvm_params_82575.1@PAGE
Lloh42:
	add	x10, x10, l_switch.table.igb_init_nvm_params_82575.1@PAGEOFF
	ldr	x8, [x10, x8]
	ldr	w9, [x9]
	str	w9, [x19, #28]
	ldr	w8, [x8]
	str	w8, [x19, #24]
LBB0_9:
	mov	w0, #0
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
	.loh AdrpLdr	Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh16
	.loh AdrpLdrGot	Lloh37, Lloh38
	.loh AdrpLdrGot	Lloh35, Lloh36
	.loh AdrpLdrGotLdr	Lloh32, Lloh33, Lloh34
	.loh AdrpLdrGotLdr	Lloh29, Lloh30, Lloh31
	.loh AdrpLdrGotLdr	Lloh26, Lloh27, Lloh28
	.loh AdrpLdrGotLdr	Lloh23, Lloh24, Lloh25
	.loh AdrpLdrGotLdr	Lloh20, Lloh21, Lloh22
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh19
	.loh AdrpAdd	Lloh41, Lloh42
	.loh AdrpAdd	Lloh39, Lloh40
	.cfi_endproc
                                        ; -- End function
	.comm	_E1000_EECD,4,2                 ; @E1000_EECD
	.comm	_E1000_EECD_SIZE_EX_MASK,4,2    ; @E1000_EECD_SIZE_EX_MASK
	.comm	_E1000_EECD_SIZE_EX_SHIFT,4,2   ; @E1000_EECD_SIZE_EX_SHIFT
	.comm	_NVM_WORD_SIZE_BASE_SHIFT,8,3   ; @NVM_WORD_SIZE_BASE_SHIFT
	.comm	_E1000_EECD_ADDR_BITS,4,2       ; @E1000_EECD_ADDR_BITS
	.comm	_e1000_nvm_eeprom_spi,4,2       ; @e1000_nvm_eeprom_spi
	.comm	_igb_acquire_nvm_82575,4,2      ; @igb_acquire_nvm_82575
	.comm	_igb_release_nvm_82575,4,2      ; @igb_release_nvm_82575
	.comm	_igb_write_nvm_spi,4,2          ; @igb_write_nvm_spi
	.comm	_igb_validate_nvm_checksum,4,2  ; @igb_validate_nvm_checksum
	.comm	_igb_update_nvm_checksum,4,2    ; @igb_update_nvm_checksum
	.comm	_igb_read_nvm_eerd,4,2          ; @igb_read_nvm_eerd
	.comm	_igb_read_nvm_spi,4,2           ; @igb_read_nvm_spi
	.comm	_igb_validate_nvm_checksum_82580,4,2 ; @igb_validate_nvm_checksum_82580
	.comm	_igb_update_nvm_checksum_82580,4,2 ; @igb_update_nvm_checksum_82580
	.comm	_igb_validate_nvm_checksum_i350,4,2 ; @igb_validate_nvm_checksum_i350
	.comm	_igb_update_nvm_checksum_i350,4,2 ; @igb_update_nvm_checksum_i350
	.no_dead_strip	_igb_init_nvm_params_82575
	.section	__DATA,__const
	.p2align	3                               ; @switch.table.igb_init_nvm_params_82575
l_switch.table.igb_init_nvm_params_82575:
	.quad	_igb_validate_nvm_checksum_i350
	.quad	_igb_validate_nvm_checksum_i350
	.quad	_igb_validate_nvm_checksum_82580

	.p2align	3                               ; @switch.table.igb_init_nvm_params_82575.1
l_switch.table.igb_init_nvm_params_82575.1:
	.quad	_igb_update_nvm_checksum_i350
	.quad	_igb_update_nvm_checksum_i350
	.quad	_igb_update_nvm_checksum_82580

.subsections_via_symbols
