	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function esw_vport_ingress_common_config
_esw_vport_ingress_common_config:       ## @esw_vport_ingress_common_config
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rsi, %r14
	movq	%rdi, %r15
	callq	_mlx5_eswitch_vport_match_metadata_enabled
	testq	%rax, %rax
	jne	LBB0_3
## %bb.1:
	movl	(%r15), %edi
	movq	_prio_tag_required@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_MLX5_CAP_GEN
	testq	%rax, %rax
	je	LBB0_2
LBB0_3:
	movq	%r15, %rdi
	movq	%r14, %rsi
	callq	_esw_vport_cleanup_ingress_rules
	movq	%r15, %rdi
	movq	%r14, %rsi
	callq	_esw_vport_enable_ingress_acl
	movl	(%r15), %edi
	movl	(%r14), %ecx
	testl	%eax, %eax
	je	LBB0_5
## %bb.4:
	movl	%eax, %ebx
	leaq	L_.str(%rip), %rsi
	movl	%eax, %edx
	callq	_esw_warn
	jmp	LBB0_11
LBB0_5:
	leaq	L_.str.1(%rip), %rsi
	movl	%ecx, %edx
	callq	_esw_debug
	movq	%r15, %rdi
	callq	_mlx5_eswitch_vport_match_metadata_enabled
	testq	%rax, %rax
	je	LBB0_7
## %bb.6:
	movq	%r15, %rdi
	movq	%r14, %rsi
	callq	_esw_vport_add_ingress_acl_modify_metadata
	movl	%eax, %r12d
	testl	%eax, %eax
	jne	LBB0_10
LBB0_7:
	movl	(%r15), %edi
	movq	_prio_tag_required@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_MLX5_CAP_GEN
	xorl	%ebx, %ebx
	testq	%rax, %rax
	je	LBB0_11
## %bb.8:
	movl	(%r14), %esi
	movq	%r15, %rdi
	callq	_mlx5_eswitch_is_vf_vport
	testq	%rax, %rax
	je	LBB0_11
## %bb.9:
	movq	%r15, %rdi
	movq	%r14, %rsi
	callq	_esw_vport_ingress_prio_tag_config
	movl	%eax, %r12d
	testl	%eax, %eax
	je	LBB0_11
LBB0_10:
	movq	%r15, %rdi
	movq	%r14, %rsi
	callq	_esw_vport_disable_ingress_acl
	movl	%r12d, %ebx
	jmp	LBB0_11
LBB0_2:
	xorl	%ebx, %ebx
LBB0_11:
	movl	%ebx, %eax
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_prio_tag_required,4,2          ## @prio_tag_required
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"failed to enable ingress acl (%d) on vport[%d]\n"

L_.str.1:                               ## @.str.1
	.asciz	"vport[%d] configure ingress rules\n"

	.no_dead_strip	_esw_vport_ingress_common_config
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function esw_vport_ingress_common_config
_esw_vport_ingress_common_config:       ; @esw_vport_ingress_common_config
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x1
	mov	x20, x0
	bl	_mlx5_eswitch_vport_match_metadata_enabled
	cbnz	x0, LBB0_2
; %bb.1:
	ldr	w0, [x20]
Lloh0:
	adrp	x8, _prio_tag_required@GOTPAGE
Lloh1:
	ldr	x8, [x8, _prio_tag_required@GOTPAGEOFF]
Lloh2:
	ldr	w1, [x8]
	bl	_MLX5_CAP_GEN
	cbz	x0, LBB0_10
LBB0_2:
	mov	x0, x20
	mov	x1, x19
	bl	_esw_vport_cleanup_ingress_rules
	mov	x0, x20
	mov	x1, x19
	bl	_esw_vport_enable_ingress_acl
	mov	x21, x0
	ldr	w0, [x20]
	ldr	w3, [x19]
	cbz	w21, LBB0_4
; %bb.3:
Lloh3:
	adrp	x1, l_.str@PAGE
Lloh4:
	add	x1, x1, l_.str@PAGEOFF
	mov	x2, x21
	bl	_esw_warn
	b	LBB0_11
LBB0_4:
Lloh5:
	adrp	x1, l_.str.1@PAGE
Lloh6:
	add	x1, x1, l_.str.1@PAGEOFF
	mov	x2, x3
	bl	_esw_debug
	mov	x0, x20
	bl	_mlx5_eswitch_vport_match_metadata_enabled
	cbz	x0, LBB0_6
; %bb.5:
	mov	x0, x20
	mov	x1, x19
	bl	_esw_vport_add_ingress_acl_modify_metadata
	mov	x21, x0
	cbnz	w0, LBB0_9
LBB0_6:
	ldr	w0, [x20]
Lloh7:
	adrp	x8, _prio_tag_required@GOTPAGE
Lloh8:
	ldr	x8, [x8, _prio_tag_required@GOTPAGEOFF]
Lloh9:
	ldr	w1, [x8]
	bl	_MLX5_CAP_GEN
	cbz	x0, LBB0_10
; %bb.7:
	ldr	w1, [x19]
	mov	x0, x20
	bl	_mlx5_eswitch_is_vf_vport
	cbz	x0, LBB0_10
; %bb.8:
	mov	x0, x20
	mov	x1, x19
	bl	_esw_vport_ingress_prio_tag_config
	mov	x21, x0
	cbz	w0, LBB0_11
LBB0_9:
	mov	x0, x20
	mov	x1, x19
	bl	_esw_vport_disable_ingress_acl
	b	LBB0_11
LBB0_10:
	mov	w21, #0
LBB0_11:
	mov	x0, x21
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpAdd	Lloh3, Lloh4
	.loh AdrpAdd	Lloh5, Lloh6
	.loh AdrpLdrGotLdr	Lloh7, Lloh8, Lloh9
	.cfi_endproc
                                        ; -- End function
	.comm	_prio_tag_required,4,2          ; @prio_tag_required
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"failed to enable ingress acl (%d) on vport[%d]\n"

l_.str.1:                               ; @.str.1
	.asciz	"vport[%d] configure ingress rules\n"

	.no_dead_strip	_esw_vport_ingress_common_config
.subsections_via_symbols
