	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function imx6_pcie_probe
_imx6_pcie_probe:                       ## @imx6_pcie_probe
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$40, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r12
	movq	(%rdi), %r14
	movq	_GFP_KERNEL@GOTPCREL(%rip), %rbx
	movl	(%rbx), %edx
	movl	$144, %esi
	callq	_devm_kzalloc
	testq	%rax, %rax
	je	LBB0_6
## %bb.1:
	movq	%rax, %r13
	movl	(%rbx), %edx
	movq	%r12, %rdi
	movl	$24, %esi
	callq	_devm_kzalloc
	testq	%rax, %rax
	je	LBB0_6
## %bb.2:
	movq	%rax, %r15
	movq	%r13, %rbx
	movq	%r12, 16(%rax)
	movq	_dw_pcie_ops@GOTPCREL(%rip), %rax
	movq	%rax, 8(%r15)
	movq	%r15, 136(%r13)
	movq	%r12, %rdi
	callq	_of_device_get_match_data
	movq	%rax, 88(%r13)
	leaq	L_.str(%rip), %rsi
	movq	%r14, %rdi
	xorl	%edx, %edx
	callq	_of_parse_phandle
	testq	%rax, %rax
	je	LBB0_10
## %bb.3:
	movq	%r14, -56(%rbp)                 ## 8-byte Spill
	leaq	-64(%rbp), %rdx
	movq	%rax, %rdi
	xorl	%esi, %esi
	callq	_of_address_to_resource
	testl	%eax, %eax
	je	LBB0_7
## %bb.4:
	movl	%eax, %r14d
	leaq	L_.str.1(%rip), %rsi
LBB0_5:
	movq	%r12, %rdi
	callq	_dev_err
	jmp	LBB0_14
LBB0_6:
	movq	_ENOMEM@GOTPCREL(%rip), %rax
	xorl	%r14d, %r14d
	subl	(%rax), %r14d
	jmp	LBB0_14
LBB0_7:
	leaq	-64(%rbp), %rsi
	movq	%r12, %rdi
	callq	_devm_ioremap_resource
	movq	%rax, 128(%rbx)
	movq	%rax, %rdi
	callq	_IS_ERR
	testq	%rax, %rax
	je	LBB0_9
## %bb.8:
	leaq	L_.str.1(%rip), %rsi
	movq	%r12, %rdi
	callq	_dev_err
	movq	128(%rbx), %rdi
	jmp	LBB0_12
LBB0_9:
	movq	-56(%rbp), %r14                 ## 8-byte Reload
LBB0_10:
	movq	%rbx, -48(%rbp)                 ## 8-byte Spill
	movq	_IORESOURCE_MEM@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r12, %rdi
	xorl	%edx, %edx
	callq	_platform_get_resource
	movq	%rax, %rbx
	movq	%r12, %rdi
	movq	%rax, %rsi
	callq	_devm_ioremap_resource
	movq	%rax, (%r15)
	movq	%rax, %rdi
	callq	_IS_ERR
	testq	%rax, %rax
	je	LBB0_15
## %bb.11:
	movq	(%r15), %rdi
LBB0_12:
	callq	_PTR_ERR
LBB0_13:
	movl	%eax, %r14d
LBB0_14:
	movl	%r14d, %eax
	addq	$40, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_15:
	movq	%r15, -72(%rbp)                 ## 8-byte Spill
	leaq	L_.str.2(%rip), %rsi
	movq	%r14, %rdi
	xorl	%edx, %edx
	callq	_of_get_named_gpio
	movq	-48(%rbp), %r15                 ## 8-byte Reload
	movl	%eax, (%r15)
	leaq	L_.str.3(%rip), %rsi
	movq	%r14, -56(%rbp)                 ## 8-byte Spill
	movq	%r14, %rdi
	callq	_of_property_read_bool
	movq	%rax, 120(%r15)
	movl	(%r15), %edi
	callq	_gpio_is_valid
	movl	(%r15), %r14d
	testq	%rax, %rax
	je	LBB0_18
## %bb.16:
	cmpq	$0, 120(%r15)
	jne	LBB0_19
## %bb.17:
	movq	_GPIOF_OUT_INIT_LOW@GOTPCREL(%rip), %rax
	jmp	LBB0_20
LBB0_18:
	movq	_EPROBE_DEFER@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	addl	%r14d, %eax
	je	LBB0_14
	jmp	LBB0_22
LBB0_19:
	movq	_GPIOF_OUT_INIT_HIGH@GOTPCREL(%rip), %rax
LBB0_20:
	movl	(%rax), %edx
	leaq	L_.str.4(%rip), %rcx
	movq	%r12, %rdi
	movl	%r14d, %esi
	callq	_devm_gpio_request_one
	testl	%eax, %eax
	je	LBB0_22
## %bb.21:
	movl	%eax, %r14d
	leaq	L_.str.5(%rip), %rsi
	jmp	LBB0_5
LBB0_22:
	leaq	L_.str.6(%rip), %rsi
	movq	%r12, %rdi
	callq	_devm_clk_get
	movq	-48(%rbp), %r14                 ## 8-byte Reload
	movq	%rax, 112(%r14)
	movq	%rax, %rdi
	callq	_IS_ERR
	testq	%rax, %rax
	je	LBB0_24
## %bb.23:
	leaq	L_.str.7(%rip), %rsi
	movq	%r12, %rdi
	callq	_dev_err
	movq	112(%r14), %rdi
	jmp	LBB0_12
LBB0_24:
	leaq	L_.str.8(%rip), %rsi
	movq	%r12, %rdi
	callq	_devm_clk_get
	movq	%rax, 104(%r14)
	movq	%rax, %rdi
	callq	_IS_ERR
	testq	%rax, %rax
	je	LBB0_26
## %bb.25:
	leaq	L_.str.9(%rip), %rsi
	movq	%r12, %rdi
	callq	_dev_err
	movq	104(%r14), %rdi
	jmp	LBB0_12
LBB0_26:
	leaq	L_.str.10(%rip), %rsi
	movq	%r12, %rdi
	callq	_devm_clk_get
	movq	%rax, 96(%r14)
	movq	%rax, %rdi
	callq	_IS_ERR
	testq	%rax, %rax
	je	LBB0_28
## %bb.27:
	leaq	L_.str.11(%rip), %rsi
	movq	%r12, %rdi
	callq	_dev_err
	movq	96(%r14), %rdi
	jmp	LBB0_12
LBB0_28:
	movq	88(%r14), %rax
	movl	(%rax), %eax
	cmpl	$128, %eax
	je	LBB0_33
## %bb.29:
	cmpl	$129, %eax
	je	LBB0_35
## %bb.30:
	cmpl	$130, %eax
	movq	-48(%rbp), %rbx                 ## 8-byte Reload
	jne	LBB0_41
## %bb.31:
	leaq	L_.str.12(%rip), %rsi
	movq	%r12, %rdi
	callq	_devm_clk_get
	movq	%rax, 80(%rbx)
	movq	%rax, %rdi
	callq	_IS_ERR
	testq	%rax, %rax
	je	LBB0_41
## %bb.32:
	leaq	L_.str.13(%rip), %rsi
	movq	%r12, %rdi
	callq	_dev_err
	movq	80(%rbx), %rdi
	jmp	LBB0_12
LBB0_33:
	leaq	L_.str.14(%rip), %rsi
	movq	%r12, %rdi
	callq	_devm_clk_get
	movq	-48(%rbp), %rcx                 ## 8-byte Reload
	movq	%rax, 72(%rcx)
	movq	%rax, %rdi
	callq	_IS_ERR
	testq	%rax, %rax
	je	LBB0_35
## %bb.34:
	leaq	L_.str.15(%rip), %rsi
	movq	%r12, %rdi
	callq	_dev_err
	movq	-48(%rbp), %rax                 ## 8-byte Reload
	movq	72(%rax), %rdi
	jmp	LBB0_12
LBB0_35:
	movl	(%rbx), %eax
	movq	_IMX8MQ_PCIE2_BASE_ADDR@GOTPCREL(%rip), %rcx
	cmpl	(%rcx), %eax
	movq	-48(%rbp), %rbx                 ## 8-byte Reload
	jne	LBB0_37
## %bb.36:
	movl	$1, 4(%rbx)
LBB0_37:
	leaq	L_.str.16(%rip), %rsi
	movq	%r12, %rdi
	callq	_devm_reset_control_get_exclusive
	movq	%rax, 64(%rbx)
	movq	%rax, %rdi
	callq	_IS_ERR
	testq	%rax, %rax
	je	LBB0_39
## %bb.38:
	leaq	L_.str.17(%rip), %rsi
	movq	%r12, %rdi
	callq	_dev_err
	movq	64(%rbx), %rdi
	jmp	LBB0_12
LBB0_39:
	leaq	L_.str.18(%rip), %rsi
	movq	%r12, %rdi
	callq	_devm_reset_control_get_exclusive
	movq	%rax, 56(%rbx)
	movq	%rax, %rdi
	callq	_IS_ERR
	testq	%rax, %rax
	je	LBB0_41
## %bb.40:
	leaq	L_.str.19(%rip), %rsi
	movq	%r12, %rdi
	callq	_dev_err
	movq	56(%rbx), %rdi
	jmp	LBB0_12
LBB0_41:
	leaq	L_.str.20(%rip), %rsi
	movq	%r12, %rdi
	callq	_devm_reset_control_get_optional_exclusive
	movq	%rax, 48(%rbx)
	movq	%rax, %rdi
	callq	_IS_ERR
	testq	%rax, %rax
	je	LBB0_43
## %bb.42:
	leaq	L_.str.21(%rip), %rsi
	movq	%r12, %rdi
	callq	_dev_err
	movq	48(%rbx), %rdi
	jmp	LBB0_12
LBB0_43:
	leaq	L_.str.22(%rip), %rdi
	callq	_syscon_regmap_lookup_by_compatible
	movq	%rax, 40(%rbx)
	movq	%rax, %rdi
	callq	_IS_ERR
	testq	%rax, %rax
	je	LBB0_45
## %bb.44:
	leaq	L_.str.23(%rip), %rsi
	movq	%r12, %rdi
	callq	_dev_err
	movq	40(%rbx), %rdi
	jmp	LBB0_12
LBB0_45:
	leaq	8(%r13), %r14
	leaq	L_.str.24(%rip), %rsi
	movq	-56(%rbp), %rdi                 ## 8-byte Reload
	movq	%r14, %rdx
	callq	_of_property_read_u32
	testl	%eax, %eax
	je	LBB0_47
## %bb.46:
	movl	$0, (%r14)
LBB0_47:
	leaq	12(%r13), %r14
	leaq	L_.str.25(%rip), %rsi
	movq	-56(%rbp), %rdi                 ## 8-byte Reload
	movq	%r14, %rdx
	callq	_of_property_read_u32
	testl	%eax, %eax
	je	LBB0_49
## %bb.48:
	movl	$0, (%r14)
LBB0_49:
	leaq	16(%r13), %r14
	leaq	L_.str.26(%rip), %rsi
	movq	-56(%rbp), %rdi                 ## 8-byte Reload
	movq	%r14, %rdx
	callq	_of_property_read_u32
	testl	%eax, %eax
	je	LBB0_51
## %bb.50:
	movl	$20, (%r14)
LBB0_51:
	leaq	20(%r13), %r14
	leaq	L_.str.27(%rip), %rsi
	movq	-56(%rbp), %rdi                 ## 8-byte Reload
	movq	%r14, %rdx
	callq	_of_property_read_u32
	testl	%eax, %eax
	je	LBB0_53
## %bb.52:
	movl	$127, (%r14)
LBB0_53:
	leaq	24(%r13), %r14
	leaq	L_.str.28(%rip), %rsi
	movq	-56(%rbp), %rdi                 ## 8-byte Reload
	movq	%r14, %rdx
	callq	_of_property_read_u32
	testl	%eax, %eax
	je	LBB0_55
## %bb.54:
	movl	$127, (%r14)
LBB0_55:
	addq	$28, %r13
	leaq	L_.str.29(%rip), %rsi
	movq	-56(%rbp), %rdi                 ## 8-byte Reload
	movq	%r13, %rdx
	callq	_of_property_read_u32
	testl	%eax, %eax
	je	LBB0_57
## %bb.56:
	movl	$1, (%r13)
LBB0_57:
	leaq	L_.str.30(%rip), %rsi
	movq	%r12, %rdi
	callq	_devm_regulator_get_optional
	movq	-48(%rbp), %rbx                 ## 8-byte Reload
	movq	%rax, 32(%rbx)
	movq	%rax, %rdi
	callq	_IS_ERR
	testq	%rax, %rax
	je	LBB0_60
## %bb.58:
	movq	32(%rbx), %rdi
	callq	_PTR_ERR
	movq	_ENODEV@GOTPCREL(%rip), %rcx
	addl	(%rcx), %eax
	jne	LBB0_64
## %bb.59:
	movq	-48(%rbp), %rbx                 ## 8-byte Reload
	movq	$0, 32(%rbx)
LBB0_60:
	movq	%r12, %rdi
	movq	%rbx, %rsi
	callq	_platform_set_drvdata
	movq	%r12, %rdi
	callq	_imx6_pcie_attach_pd
	movl	%eax, %r14d
	testl	%eax, %eax
	jne	LBB0_14
## %bb.61:
	movq	%rbx, %rdi
	movq	%r12, %rsi
	callq	_imx6_add_pcie_port
	testl	%eax, %eax
	js	LBB0_13
## %bb.62:
	xorl	%r14d, %r14d
	xorl	%eax, %eax
	callq	_pci_msi_enabled
	testq	%rax, %rax
	je	LBB0_14
## %bb.63:
	movq	_PCIE_RC_IMX6_MSI_CAP@GOTPCREL(%rip), %r12
	movq	_PCI_MSI_FLAGS@GOTPCREL(%rip), %r15
	movq	(%r15), %rsi
	addq	(%r12), %rsi
	movq	-72(%rbp), %rbx                 ## 8-byte Reload
	movq	%rbx, %rdi
	callq	_dw_pcie_readw_dbi
	movq	_PCI_MSI_FLAGS_ENABLE@GOTPCREL(%rip), %rcx
	orl	(%rcx), %eax
	movq	(%r15), %rsi
	addq	(%r12), %rsi
	movq	%rbx, %rdi
	movl	%eax, %edx
	callq	_dw_pcie_writew_dbi
	jmp	LBB0_14
LBB0_64:
	movq	-48(%rbp), %rax                 ## 8-byte Reload
	movq	32(%rax), %rdi
	jmp	LBB0_12
	.cfi_endproc
                                        ## -- End function
	.comm	_GFP_KERNEL,4,2                 ## @GFP_KERNEL
	.comm	_ENOMEM,4,2                     ## @ENOMEM
	.comm	_dw_pcie_ops,4,2                ## @dw_pcie_ops
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"fsl,imx7d-pcie-phy"

L_.str.1:                               ## @.str.1
	.asciz	"Unable to map PCIe PHY\n"

	.comm	_IORESOURCE_MEM,4,2             ## @IORESOURCE_MEM
L_.str.2:                               ## @.str.2
	.asciz	"reset-gpio"

L_.str.3:                               ## @.str.3
	.asciz	"reset-gpio-active-high"

	.comm	_GPIOF_OUT_INIT_HIGH,4,2        ## @GPIOF_OUT_INIT_HIGH
	.comm	_GPIOF_OUT_INIT_LOW,4,2         ## @GPIOF_OUT_INIT_LOW
L_.str.4:                               ## @.str.4
	.asciz	"PCIe reset"

L_.str.5:                               ## @.str.5
	.asciz	"unable to get reset gpio\n"

	.comm	_EPROBE_DEFER,4,2               ## @EPROBE_DEFER
L_.str.6:                               ## @.str.6
	.asciz	"pcie_phy"

L_.str.7:                               ## @.str.7
	.asciz	"pcie_phy clock source missing or invalid\n"

L_.str.8:                               ## @.str.8
	.asciz	"pcie_bus"

L_.str.9:                               ## @.str.9
	.asciz	"pcie_bus clock source missing or invalid\n"

L_.str.10:                              ## @.str.10
	.asciz	"pcie"

L_.str.11:                              ## @.str.11
	.asciz	"pcie clock source missing or invalid\n"

L_.str.12:                              ## @.str.12
	.asciz	"pcie_inbound_axi"

L_.str.13:                              ## @.str.13
	.asciz	"pcie_inbound_axi clock missing or invalid\n"

L_.str.14:                              ## @.str.14
	.asciz	"pcie_aux"

L_.str.15:                              ## @.str.15
	.asciz	"pcie_aux clock source missing or invalid\n"

	.comm	_IMX8MQ_PCIE2_BASE_ADDR,4,2     ## @IMX8MQ_PCIE2_BASE_ADDR
L_.str.16:                              ## @.str.16
	.asciz	"pciephy"

L_.str.17:                              ## @.str.17
	.asciz	"Failed to get PCIEPHY reset control\n"

L_.str.18:                              ## @.str.18
	.asciz	"apps"

L_.str.19:                              ## @.str.19
	.asciz	"Failed to get PCIE APPS reset control\n"

L_.str.20:                              ## @.str.20
	.asciz	"turnoff"

L_.str.21:                              ## @.str.21
	.asciz	"Failed to get TURNOFF reset control\n"

L_.str.22:                              ## @.str.22
	.asciz	"fsl,imx6q-iomuxc-gpr"

L_.str.23:                              ## @.str.23
	.asciz	"unable to find iomuxc registers\n"

L_.str.24:                              ## @.str.24
	.asciz	"fsl,tx-deemph-gen1"

L_.str.25:                              ## @.str.25
	.asciz	"fsl,tx-deemph-gen2-3p5db"

L_.str.26:                              ## @.str.26
	.asciz	"fsl,tx-deemph-gen2-6db"

L_.str.27:                              ## @.str.27
	.asciz	"fsl,tx-swing-full"

L_.str.28:                              ## @.str.28
	.asciz	"fsl,tx-swing-low"

L_.str.29:                              ## @.str.29
	.asciz	"fsl,max-link-speed"

L_.str.30:                              ## @.str.30
	.asciz	"vpcie"

	.comm	_ENODEV,4,2                     ## @ENODEV
	.comm	_PCIE_RC_IMX6_MSI_CAP,8,3       ## @PCIE_RC_IMX6_MSI_CAP
	.comm	_PCI_MSI_FLAGS,8,3              ## @PCI_MSI_FLAGS
	.comm	_PCI_MSI_FLAGS_ENABLE,4,2       ## @PCI_MSI_FLAGS_ENABLE
	.no_dead_strip	_imx6_pcie_probe
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function imx6_pcie_probe
_imx6_pcie_probe:                       ; @imx6_pcie_probe
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #80
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x20, x0
	ldr	x22, [x0]
Lloh0:
	adrp	x21, _GFP_KERNEL@GOTPAGE
Lloh1:
	ldr	x21, [x21, _GFP_KERNEL@GOTPAGEOFF]
	ldr	w2, [x21]
	mov	w1, #144
	bl	_devm_kzalloc
	cbz	x0, LBB0_6
; %bb.1:
	mov	x19, x0
	ldr	w2, [x21]
	mov	x0, x20
	mov	w1, #24
	bl	_devm_kzalloc
	cbz	x0, LBB0_6
; %bb.2:
	mov	x21, x0
Lloh2:
	adrp	x8, _dw_pcie_ops@GOTPAGE
Lloh3:
	ldr	x8, [x8, _dw_pcie_ops@GOTPAGEOFF]
	stp	x8, x20, [x0, #8]
	str	x0, [x19, #136]
	mov	x0, x20
	bl	_of_device_get_match_data
	str	x0, [x19, #88]
Lloh4:
	adrp	x1, l_.str@PAGE
Lloh5:
	add	x1, x1, l_.str@PAGEOFF
	mov	x0, x22
	mov	w2, #0
	bl	_of_parse_phandle
	cbz	x0, LBB0_9
; %bb.3:
	add	x2, sp, #8
	mov	w1, #0
	bl	_of_address_to_resource
	cbz	w0, LBB0_7
; %bb.4:
	mov	x24, x0
Lloh6:
	adrp	x1, l_.str.1@PAGE
Lloh7:
	add	x1, x1, l_.str.1@PAGEOFF
LBB0_5:
	mov	x0, x20
	bl	_dev_err
	b	LBB0_13
LBB0_6:
Lloh8:
	adrp	x8, _ENOMEM@GOTPAGE
Lloh9:
	ldr	x8, [x8, _ENOMEM@GOTPAGEOFF]
Lloh10:
	ldr	w8, [x8]
	neg	w24, w8
	b	LBB0_13
LBB0_7:
	add	x1, sp, #8
	mov	x0, x20
	bl	_devm_ioremap_resource
	str	x0, [x19, #128]
	bl	_IS_ERR
	cbz	x0, LBB0_9
; %bb.8:
Lloh11:
	adrp	x1, l_.str.1@PAGE
Lloh12:
	add	x1, x1, l_.str.1@PAGEOFF
	mov	x0, x20
	bl	_dev_err
	ldr	x0, [x19, #128]
	b	LBB0_11
LBB0_9:
Lloh13:
	adrp	x8, _IORESOURCE_MEM@GOTPAGE
Lloh14:
	ldr	x8, [x8, _IORESOURCE_MEM@GOTPAGEOFF]
Lloh15:
	ldr	w1, [x8]
	mov	x0, x20
	mov	w2, #0
	bl	_platform_get_resource
	mov	x23, x0
	mov	x0, x20
	mov	x1, x23
	bl	_devm_ioremap_resource
	str	x0, [x21]
	bl	_IS_ERR
	cbz	x0, LBB0_14
; %bb.10:
	ldr	x0, [x21]
LBB0_11:
	bl	_PTR_ERR
LBB0_12:
	mov	x24, x0
LBB0_13:
	mov	x0, x24
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #80
	ret
LBB0_14:
Lloh16:
	adrp	x1, l_.str.2@PAGE
Lloh17:
	add	x1, x1, l_.str.2@PAGEOFF
	mov	x0, x22
	mov	w2, #0
	bl	_of_get_named_gpio
	str	w0, [x19]
Lloh18:
	adrp	x1, l_.str.3@PAGE
Lloh19:
	add	x1, x1, l_.str.3@PAGEOFF
	mov	x0, x22
	bl	_of_property_read_bool
	str	x0, [x19, #120]
	ldr	w0, [x19]
	bl	_gpio_is_valid
	ldr	w24, [x19]
	cbz	x0, LBB0_17
; %bb.15:
Lloh20:
	adrp	x8, _GPIOF_OUT_INIT_HIGH@GOTPAGE
Lloh21:
	ldr	x8, [x8, _GPIOF_OUT_INIT_HIGH@GOTPAGEOFF]
	ldr	x9, [x19, #120]
Lloh22:
	adrp	x10, _GPIOF_OUT_INIT_LOW@GOTPAGE
Lloh23:
	ldr	x10, [x10, _GPIOF_OUT_INIT_LOW@GOTPAGEOFF]
	cmp	x9, #0
	csel	x8, x10, x8, eq
	ldr	w2, [x8]
Lloh24:
	adrp	x3, l_.str.4@PAGE
Lloh25:
	add	x3, x3, l_.str.4@PAGEOFF
	mov	x0, x20
	mov	x1, x24
	bl	_devm_gpio_request_one
	cbz	w0, LBB0_18
; %bb.16:
	mov	x24, x0
Lloh26:
	adrp	x1, l_.str.5@PAGE
Lloh27:
	add	x1, x1, l_.str.5@PAGEOFF
	b	LBB0_5
LBB0_17:
Lloh28:
	adrp	x8, _EPROBE_DEFER@GOTPAGE
Lloh29:
	ldr	x8, [x8, _EPROBE_DEFER@GOTPAGEOFF]
Lloh30:
	ldr	w8, [x8]
	cmn	w24, w8
	b.eq	LBB0_13
LBB0_18:
Lloh31:
	adrp	x1, l_.str.6@PAGE
Lloh32:
	add	x1, x1, l_.str.6@PAGEOFF
	mov	x0, x20
	bl	_devm_clk_get
	str	x0, [x19, #112]
	bl	_IS_ERR
	cbz	x0, LBB0_20
; %bb.19:
Lloh33:
	adrp	x1, l_.str.7@PAGE
Lloh34:
	add	x1, x1, l_.str.7@PAGEOFF
	mov	x0, x20
	bl	_dev_err
	ldr	x0, [x19, #112]
	b	LBB0_11
LBB0_20:
Lloh35:
	adrp	x1, l_.str.8@PAGE
Lloh36:
	add	x1, x1, l_.str.8@PAGEOFF
	mov	x0, x20
	bl	_devm_clk_get
	str	x0, [x19, #104]
	bl	_IS_ERR
	cbz	x0, LBB0_22
; %bb.21:
Lloh37:
	adrp	x1, l_.str.9@PAGE
Lloh38:
	add	x1, x1, l_.str.9@PAGEOFF
	mov	x0, x20
	bl	_dev_err
	ldr	x0, [x19, #104]
	b	LBB0_11
LBB0_22:
Lloh39:
	adrp	x1, l_.str.10@PAGE
Lloh40:
	add	x1, x1, l_.str.10@PAGEOFF
	mov	x0, x20
	bl	_devm_clk_get
	str	x0, [x19, #96]
	bl	_IS_ERR
	cbz	x0, LBB0_24
; %bb.23:
Lloh41:
	adrp	x1, l_.str.11@PAGE
Lloh42:
	add	x1, x1, l_.str.11@PAGEOFF
	mov	x0, x20
	bl	_dev_err
	ldr	x0, [x19, #96]
	b	LBB0_11
LBB0_24:
	ldr	x8, [x19, #88]
	ldr	w8, [x8]
	cmp	w8, #128
	b.eq	LBB0_29
; %bb.25:
	cmp	w8, #129
	b.eq	LBB0_31
; %bb.26:
	cmp	w8, #130
	b.ne	LBB0_37
; %bb.27:
Lloh43:
	adrp	x1, l_.str.12@PAGE
Lloh44:
	add	x1, x1, l_.str.12@PAGEOFF
	mov	x0, x20
	bl	_devm_clk_get
	str	x0, [x19, #80]
	bl	_IS_ERR
	cbz	x0, LBB0_37
; %bb.28:
Lloh45:
	adrp	x1, l_.str.13@PAGE
Lloh46:
	add	x1, x1, l_.str.13@PAGEOFF
	mov	x0, x20
	bl	_dev_err
	ldr	x0, [x19, #80]
	b	LBB0_11
LBB0_29:
Lloh47:
	adrp	x1, l_.str.14@PAGE
Lloh48:
	add	x1, x1, l_.str.14@PAGEOFF
	mov	x0, x20
	bl	_devm_clk_get
	str	x0, [x19, #72]
	bl	_IS_ERR
	cbz	x0, LBB0_31
; %bb.30:
Lloh49:
	adrp	x1, l_.str.15@PAGE
Lloh50:
	add	x1, x1, l_.str.15@PAGEOFF
	mov	x0, x20
	bl	_dev_err
	ldr	x0, [x19, #72]
	b	LBB0_11
LBB0_31:
	ldr	w8, [x23]
Lloh51:
	adrp	x9, _IMX8MQ_PCIE2_BASE_ADDR@GOTPAGE
Lloh52:
	ldr	x9, [x9, _IMX8MQ_PCIE2_BASE_ADDR@GOTPAGEOFF]
Lloh53:
	ldr	w9, [x9]
	cmp	w8, w9
	b.ne	LBB0_33
; %bb.32:
	mov	w8, #1
	str	w8, [x19, #4]
LBB0_33:
Lloh54:
	adrp	x1, l_.str.16@PAGE
Lloh55:
	add	x1, x1, l_.str.16@PAGEOFF
	mov	x0, x20
	bl	_devm_reset_control_get_exclusive
	str	x0, [x19, #64]
	bl	_IS_ERR
	cbz	x0, LBB0_35
; %bb.34:
Lloh56:
	adrp	x1, l_.str.17@PAGE
Lloh57:
	add	x1, x1, l_.str.17@PAGEOFF
	mov	x0, x20
	bl	_dev_err
	ldr	x0, [x19, #64]
	b	LBB0_11
LBB0_35:
Lloh58:
	adrp	x1, l_.str.18@PAGE
Lloh59:
	add	x1, x1, l_.str.18@PAGEOFF
	mov	x0, x20
	bl	_devm_reset_control_get_exclusive
	str	x0, [x19, #56]
	bl	_IS_ERR
	cbz	x0, LBB0_37
; %bb.36:
Lloh60:
	adrp	x1, l_.str.19@PAGE
Lloh61:
	add	x1, x1, l_.str.19@PAGEOFF
	mov	x0, x20
	bl	_dev_err
	ldr	x0, [x19, #56]
	b	LBB0_11
LBB0_37:
Lloh62:
	adrp	x1, l_.str.20@PAGE
Lloh63:
	add	x1, x1, l_.str.20@PAGEOFF
	mov	x0, x20
	bl	_devm_reset_control_get_optional_exclusive
	str	x0, [x19, #48]
	bl	_IS_ERR
	cbz	x0, LBB0_39
; %bb.38:
Lloh64:
	adrp	x1, l_.str.21@PAGE
Lloh65:
	add	x1, x1, l_.str.21@PAGEOFF
	mov	x0, x20
	bl	_dev_err
	ldr	x0, [x19, #48]
	b	LBB0_11
LBB0_39:
Lloh66:
	adrp	x0, l_.str.22@PAGE
Lloh67:
	add	x0, x0, l_.str.22@PAGEOFF
	bl	_syscon_regmap_lookup_by_compatible
	str	x0, [x19, #40]
	bl	_IS_ERR
	cbz	x0, LBB0_41
; %bb.40:
Lloh68:
	adrp	x1, l_.str.23@PAGE
Lloh69:
	add	x1, x1, l_.str.23@PAGEOFF
	mov	x0, x20
	bl	_dev_err
	ldr	x0, [x19, #40]
	b	LBB0_11
LBB0_41:
	add	x23, x19, #8
Lloh70:
	adrp	x1, l_.str.24@PAGE
Lloh71:
	add	x1, x1, l_.str.24@PAGEOFF
	mov	x0, x22
	mov	x2, x23
	bl	_of_property_read_u32
	cbz	w0, LBB0_43
; %bb.42:
	str	wzr, [x23]
LBB0_43:
	add	x23, x19, #12
Lloh72:
	adrp	x1, l_.str.25@PAGE
Lloh73:
	add	x1, x1, l_.str.25@PAGEOFF
	mov	x0, x22
	mov	x2, x23
	bl	_of_property_read_u32
	cbz	w0, LBB0_45
; %bb.44:
	str	wzr, [x23]
LBB0_45:
	add	x23, x19, #16
Lloh74:
	adrp	x1, l_.str.26@PAGE
Lloh75:
	add	x1, x1, l_.str.26@PAGEOFF
	mov	x0, x22
	mov	x2, x23
	bl	_of_property_read_u32
	cbz	w0, LBB0_47
; %bb.46:
	mov	w8, #20
	str	w8, [x23]
LBB0_47:
	add	x23, x19, #20
Lloh76:
	adrp	x1, l_.str.27@PAGE
Lloh77:
	add	x1, x1, l_.str.27@PAGEOFF
	mov	x0, x22
	mov	x2, x23
	bl	_of_property_read_u32
	cbz	w0, LBB0_49
; %bb.48:
	mov	w8, #127
	str	w8, [x23]
LBB0_49:
	add	x23, x19, #24
Lloh78:
	adrp	x1, l_.str.28@PAGE
Lloh79:
	add	x1, x1, l_.str.28@PAGEOFF
	mov	x0, x22
	mov	x2, x23
	bl	_of_property_read_u32
	cbz	w0, LBB0_51
; %bb.50:
	mov	w8, #127
	str	w8, [x23]
LBB0_51:
	add	x23, x19, #28
Lloh80:
	adrp	x1, l_.str.29@PAGE
Lloh81:
	add	x1, x1, l_.str.29@PAGEOFF
	mov	x0, x22
	mov	x2, x23
	bl	_of_property_read_u32
	cbz	w0, LBB0_53
; %bb.52:
	mov	w8, #1
	str	w8, [x23]
LBB0_53:
Lloh82:
	adrp	x1, l_.str.30@PAGE
Lloh83:
	add	x1, x1, l_.str.30@PAGEOFF
	mov	x0, x20
	bl	_devm_regulator_get_optional
	str	x0, [x19, #32]
	bl	_IS_ERR
	cbz	x0, LBB0_56
; %bb.54:
	ldr	x0, [x19, #32]
	bl	_PTR_ERR
Lloh84:
	adrp	x8, _ENODEV@GOTPAGE
Lloh85:
	ldr	x8, [x8, _ENODEV@GOTPAGEOFF]
Lloh86:
	ldr	w8, [x8]
	cmn	w0, w8
	b.ne	LBB0_61
; %bb.55:
	str	xzr, [x19, #32]
LBB0_56:
	mov	x0, x20
	mov	x1, x19
	bl	_platform_set_drvdata
	mov	x0, x20
	bl	_imx6_pcie_attach_pd
	mov	x24, x0
	cbnz	w0, LBB0_13
; %bb.57:
	mov	x0, x19
	mov	x1, x20
	bl	_imx6_add_pcie_port
	tbnz	w0, #31, LBB0_12
; %bb.58:
	bl	_pci_msi_enabled
	cbz	x0, LBB0_60
; %bb.59:
Lloh87:
	adrp	x19, _PCIE_RC_IMX6_MSI_CAP@GOTPAGE
Lloh88:
	ldr	x19, [x19, _PCIE_RC_IMX6_MSI_CAP@GOTPAGEOFF]
	ldr	x8, [x19]
Lloh89:
	adrp	x20, _PCI_MSI_FLAGS@GOTPAGE
Lloh90:
	ldr	x20, [x20, _PCI_MSI_FLAGS@GOTPAGEOFF]
	ldr	x9, [x20]
	add	x1, x9, x8
	mov	x0, x21
	bl	_dw_pcie_readw_dbi
Lloh91:
	adrp	x8, _PCI_MSI_FLAGS_ENABLE@GOTPAGE
Lloh92:
	ldr	x8, [x8, _PCI_MSI_FLAGS_ENABLE@GOTPAGEOFF]
Lloh93:
	ldr	w8, [x8]
	orr	w2, w8, w0
	ldr	x8, [x19]
	ldr	x9, [x20]
	add	x1, x9, x8
	mov	x0, x21
	bl	_dw_pcie_writew_dbi
LBB0_60:
	mov	w24, #0
	b	LBB0_13
LBB0_61:
	ldr	x0, [x19, #32]
	b	LBB0_11
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpAdd	Lloh4, Lloh5
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpAdd	Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpAdd	Lloh11, Lloh12
	.loh AdrpLdrGotLdr	Lloh13, Lloh14, Lloh15
	.loh AdrpAdd	Lloh18, Lloh19
	.loh AdrpAdd	Lloh16, Lloh17
	.loh AdrpAdd	Lloh24, Lloh25
	.loh AdrpLdrGot	Lloh22, Lloh23
	.loh AdrpLdrGot	Lloh20, Lloh21
	.loh AdrpAdd	Lloh26, Lloh27
	.loh AdrpLdrGotLdr	Lloh28, Lloh29, Lloh30
	.loh AdrpAdd	Lloh31, Lloh32
	.loh AdrpAdd	Lloh33, Lloh34
	.loh AdrpAdd	Lloh35, Lloh36
	.loh AdrpAdd	Lloh37, Lloh38
	.loh AdrpAdd	Lloh39, Lloh40
	.loh AdrpAdd	Lloh41, Lloh42
	.loh AdrpAdd	Lloh43, Lloh44
	.loh AdrpAdd	Lloh45, Lloh46
	.loh AdrpAdd	Lloh47, Lloh48
	.loh AdrpAdd	Lloh49, Lloh50
	.loh AdrpLdrGotLdr	Lloh51, Lloh52, Lloh53
	.loh AdrpAdd	Lloh54, Lloh55
	.loh AdrpAdd	Lloh56, Lloh57
	.loh AdrpAdd	Lloh58, Lloh59
	.loh AdrpAdd	Lloh60, Lloh61
	.loh AdrpAdd	Lloh62, Lloh63
	.loh AdrpAdd	Lloh64, Lloh65
	.loh AdrpAdd	Lloh66, Lloh67
	.loh AdrpAdd	Lloh68, Lloh69
	.loh AdrpAdd	Lloh70, Lloh71
	.loh AdrpAdd	Lloh72, Lloh73
	.loh AdrpAdd	Lloh74, Lloh75
	.loh AdrpAdd	Lloh76, Lloh77
	.loh AdrpAdd	Lloh78, Lloh79
	.loh AdrpAdd	Lloh80, Lloh81
	.loh AdrpAdd	Lloh82, Lloh83
	.loh AdrpLdrGotLdr	Lloh84, Lloh85, Lloh86
	.loh AdrpLdrGotLdr	Lloh91, Lloh92, Lloh93
	.loh AdrpLdrGot	Lloh89, Lloh90
	.loh AdrpLdrGot	Lloh87, Lloh88
	.cfi_endproc
                                        ; -- End function
	.comm	_GFP_KERNEL,4,2                 ; @GFP_KERNEL
	.comm	_ENOMEM,4,2                     ; @ENOMEM
	.comm	_dw_pcie_ops,4,2                ; @dw_pcie_ops
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"fsl,imx7d-pcie-phy"

l_.str.1:                               ; @.str.1
	.asciz	"Unable to map PCIe PHY\n"

	.comm	_IORESOURCE_MEM,4,2             ; @IORESOURCE_MEM
l_.str.2:                               ; @.str.2
	.asciz	"reset-gpio"

l_.str.3:                               ; @.str.3
	.asciz	"reset-gpio-active-high"

	.comm	_GPIOF_OUT_INIT_HIGH,4,2        ; @GPIOF_OUT_INIT_HIGH
	.comm	_GPIOF_OUT_INIT_LOW,4,2         ; @GPIOF_OUT_INIT_LOW
l_.str.4:                               ; @.str.4
	.asciz	"PCIe reset"

l_.str.5:                               ; @.str.5
	.asciz	"unable to get reset gpio\n"

	.comm	_EPROBE_DEFER,4,2               ; @EPROBE_DEFER
l_.str.6:                               ; @.str.6
	.asciz	"pcie_phy"

l_.str.7:                               ; @.str.7
	.asciz	"pcie_phy clock source missing or invalid\n"

l_.str.8:                               ; @.str.8
	.asciz	"pcie_bus"

l_.str.9:                               ; @.str.9
	.asciz	"pcie_bus clock source missing or invalid\n"

l_.str.10:                              ; @.str.10
	.asciz	"pcie"

l_.str.11:                              ; @.str.11
	.asciz	"pcie clock source missing or invalid\n"

l_.str.12:                              ; @.str.12
	.asciz	"pcie_inbound_axi"

l_.str.13:                              ; @.str.13
	.asciz	"pcie_inbound_axi clock missing or invalid\n"

l_.str.14:                              ; @.str.14
	.asciz	"pcie_aux"

l_.str.15:                              ; @.str.15
	.asciz	"pcie_aux clock source missing or invalid\n"

	.comm	_IMX8MQ_PCIE2_BASE_ADDR,4,2     ; @IMX8MQ_PCIE2_BASE_ADDR
l_.str.16:                              ; @.str.16
	.asciz	"pciephy"

l_.str.17:                              ; @.str.17
	.asciz	"Failed to get PCIEPHY reset control\n"

l_.str.18:                              ; @.str.18
	.asciz	"apps"

l_.str.19:                              ; @.str.19
	.asciz	"Failed to get PCIE APPS reset control\n"

l_.str.20:                              ; @.str.20
	.asciz	"turnoff"

l_.str.21:                              ; @.str.21
	.asciz	"Failed to get TURNOFF reset control\n"

l_.str.22:                              ; @.str.22
	.asciz	"fsl,imx6q-iomuxc-gpr"

l_.str.23:                              ; @.str.23
	.asciz	"unable to find iomuxc registers\n"

l_.str.24:                              ; @.str.24
	.asciz	"fsl,tx-deemph-gen1"

l_.str.25:                              ; @.str.25
	.asciz	"fsl,tx-deemph-gen2-3p5db"

l_.str.26:                              ; @.str.26
	.asciz	"fsl,tx-deemph-gen2-6db"

l_.str.27:                              ; @.str.27
	.asciz	"fsl,tx-swing-full"

l_.str.28:                              ; @.str.28
	.asciz	"fsl,tx-swing-low"

l_.str.29:                              ; @.str.29
	.asciz	"fsl,max-link-speed"

l_.str.30:                              ; @.str.30
	.asciz	"vpcie"

	.comm	_ENODEV,4,2                     ; @ENODEV
	.comm	_PCIE_RC_IMX6_MSI_CAP,8,3       ; @PCIE_RC_IMX6_MSI_CAP
	.comm	_PCI_MSI_FLAGS,8,3              ; @PCI_MSI_FLAGS
	.comm	_PCI_MSI_FLAGS_ENABLE,4,2       ; @PCI_MSI_FLAGS_ENABLE
	.no_dead_strip	_imx6_pcie_probe
.subsections_via_symbols
