	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function mtk_pcie_hw_wr_cfg
_mtk_pcie_hw_wr_cfg:                    ## @mtk_pcie_hw_wr_cfg
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%r9d, %r14d
	movl	%r8d, %r12d
	movl	%ecx, %r15d
	movl	%edx, %r13d
	movl	%esi, -44(%rbp)                 ## 4-byte Spill
	movq	%rdi, %rbx
	movq	_CFG_WRRD_TYPE_0@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_CFG_WR_FMT@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_CFG_HEADER_DW0
	movq	_PCIE_CFG_HEADER0@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rsi
	addq	(%rbx), %rsi
	movl	%eax, %edi
	callq	_writel
	movl	%r15d, %edi
	movl	%r12d, %esi
	callq	_CFG_HEADER_DW1
	movq	_PCIE_CFG_HEADER1@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rsi
	addq	(%rbx), %rsi
	movl	%eax, %edi
	callq	_writel
	movl	%r13d, %edi
	callq	_PCI_FUNC
	movl	%eax, %r12d
	movl	%r13d, %edi
	callq	_PCI_SLOT
	movl	%r15d, %edi
	movl	%r12d, %esi
	movl	%eax, %edx
	movl	-44(%rbp), %ecx                 ## 4-byte Reload
	callq	_CFG_HEADER_DW2
	movq	_PCIE_CFG_HEADER2@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rsi
	addq	(%rbx), %rsi
	movl	%eax, %edi
	callq	_writel
	shll	$3, %r15d
	movl	%r15d, %ecx
	shll	%cl, %r14d
	movq	_PCIE_CFG_WDATA@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	addq	(%rbx), %rsi
	movl	%r14d, %edi
	callq	_writel
	movq	_PCIE_APP_TLP_REQ@GOTPCREL(%rip), %r14
	movq	(%r14), %rdi
	addq	(%rbx), %rdi
	callq	_readl
	movq	_APP_CFG_REQ@GOTPCREL(%rip), %rcx
	orl	(%rcx), %eax
	movq	(%r14), %rsi
	addq	(%rbx), %rsi
	movl	%eax, %edi
	callq	_writel
	movq	%rbx, %rdi
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_mtk_pcie_check_cfg_cpld        ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_CFG_WRRD_TYPE_0,4,2            ## @CFG_WRRD_TYPE_0
	.comm	_CFG_WR_FMT,4,2                 ## @CFG_WR_FMT
	.comm	_PCIE_CFG_HEADER0,8,3           ## @PCIE_CFG_HEADER0
	.comm	_PCIE_CFG_HEADER1,8,3           ## @PCIE_CFG_HEADER1
	.comm	_PCIE_CFG_HEADER2,8,3           ## @PCIE_CFG_HEADER2
	.comm	_PCIE_CFG_WDATA,8,3             ## @PCIE_CFG_WDATA
	.comm	_PCIE_APP_TLP_REQ,8,3           ## @PCIE_APP_TLP_REQ
	.comm	_APP_CFG_REQ,4,2                ## @APP_CFG_REQ
	.no_dead_strip	_mtk_pcie_hw_wr_cfg
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function mtk_pcie_hw_wr_cfg
_mtk_pcie_hw_wr_cfg:                    ; @mtk_pcie_hw_wr_cfg
	.cfi_startproc
; %bb.0:
	stp	x24, x23, [sp, #-64]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x20, x5
	mov	x22, x4
	mov	x21, x3
	mov	x23, x2
	mov	x24, x1
	mov	x19, x0
Lloh0:
	adrp	x8, _CFG_WRRD_TYPE_0@GOTPAGE
Lloh1:
	ldr	x8, [x8, _CFG_WRRD_TYPE_0@GOTPAGEOFF]
Lloh2:
	ldr	w0, [x8]
Lloh3:
	adrp	x8, _CFG_WR_FMT@GOTPAGE
Lloh4:
	ldr	x8, [x8, _CFG_WR_FMT@GOTPAGEOFF]
Lloh5:
	ldr	w1, [x8]
	bl	_CFG_HEADER_DW0
	ldr	x8, [x19]
Lloh6:
	adrp	x9, _PCIE_CFG_HEADER0@GOTPAGE
Lloh7:
	ldr	x9, [x9, _PCIE_CFG_HEADER0@GOTPAGEOFF]
Lloh8:
	ldr	x9, [x9]
	add	x1, x9, x8
	bl	_writel
	mov	x0, x21
	mov	x1, x22
	bl	_CFG_HEADER_DW1
	ldr	x8, [x19]
Lloh9:
	adrp	x9, _PCIE_CFG_HEADER1@GOTPAGE
Lloh10:
	ldr	x9, [x9, _PCIE_CFG_HEADER1@GOTPAGEOFF]
Lloh11:
	ldr	x9, [x9]
	add	x1, x9, x8
	bl	_writel
	mov	x0, x23
	bl	_PCI_FUNC
	mov	x22, x0
	mov	x0, x23
	bl	_PCI_SLOT
	mov	x2, x0
	mov	x0, x21
	mov	x1, x22
	mov	x3, x24
	bl	_CFG_HEADER_DW2
	ldr	x8, [x19]
Lloh12:
	adrp	x9, _PCIE_CFG_HEADER2@GOTPAGE
Lloh13:
	ldr	x9, [x9, _PCIE_CFG_HEADER2@GOTPAGEOFF]
Lloh14:
	ldr	x9, [x9]
	add	x1, x9, x8
	bl	_writel
	ubfiz	w8, w21, #3, #2
	lsl	w0, w20, w8
	ldr	x8, [x19]
Lloh15:
	adrp	x9, _PCIE_CFG_WDATA@GOTPAGE
Lloh16:
	ldr	x9, [x9, _PCIE_CFG_WDATA@GOTPAGEOFF]
Lloh17:
	ldr	x9, [x9]
	add	x1, x9, x8
	bl	_writel
	ldr	x8, [x19]
Lloh18:
	adrp	x20, _PCIE_APP_TLP_REQ@GOTPAGE
Lloh19:
	ldr	x20, [x20, _PCIE_APP_TLP_REQ@GOTPAGEOFF]
	ldr	x9, [x20]
	add	x0, x9, x8
	bl	_readl
Lloh20:
	adrp	x8, _APP_CFG_REQ@GOTPAGE
Lloh21:
	ldr	x8, [x8, _APP_CFG_REQ@GOTPAGEOFF]
Lloh22:
	ldr	w8, [x8]
	orr	w0, w8, w0
	ldr	x8, [x19]
	ldr	x9, [x20]
	add	x1, x9, x8
	bl	_writel
	mov	x0, x19
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	b	_mtk_pcie_check_cfg_cpld
	.loh AdrpLdrGotLdr	Lloh20, Lloh21, Lloh22
	.loh AdrpLdrGot	Lloh18, Lloh19
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_CFG_WRRD_TYPE_0,4,2            ; @CFG_WRRD_TYPE_0
	.comm	_CFG_WR_FMT,4,2                 ; @CFG_WR_FMT
	.comm	_PCIE_CFG_HEADER0,8,3           ; @PCIE_CFG_HEADER0
	.comm	_PCIE_CFG_HEADER1,8,3           ; @PCIE_CFG_HEADER1
	.comm	_PCIE_CFG_HEADER2,8,3           ; @PCIE_CFG_HEADER2
	.comm	_PCIE_CFG_WDATA,8,3             ; @PCIE_CFG_WDATA
	.comm	_PCIE_APP_TLP_REQ,8,3           ; @PCIE_APP_TLP_REQ
	.comm	_APP_CFG_REQ,4,2                ; @APP_CFG_REQ
	.no_dead_strip	_mtk_pcie_hw_wr_cfg
.subsections_via_symbols
