	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function rtw8822c_dpk_cal_gs
_rtw8822c_dpk_cal_gs:                   ## @rtw8822c_dpk_cal_gs
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$24, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%esi, %r12d
	movq	%rdi, %r15
	movq	_REG_NCTL0@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_BIT_SUBPAGE@GOTPCREL(%rip), %r13
	movl	(%r13), %edx
	leal	(%r12,%r12), %ecx
	orl	$8, %ecx
	movl	%ecx, -48(%rbp)                 ## 4-byte Spill
	callq	_rtw_write32_mask
	movq	_REG_IQK_CTL1@GOTPCREL(%rip), %r14
	movl	(%r14), %esi
	movq	_BIT_BYPASS_DPD@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r15, %rdi
	xorl	%ecx, %ecx
	callq	_rtw_write32_mask
	movl	(%r14), %esi
	movq	_BIT_TX_CFIR@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r15, %rdi
	xorl	%ecx, %ecx
	callq	_rtw_write32_mask
	movq	_REG_R_CONFIG@GOTPCREL(%rip), %rbx
	movl	(%rbx), %esi
	movq	_BIT_IQ_SWITCH@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r15, %rdi
	movl	$9, %ecx
	callq	_rtw_write32_mask
	movl	(%rbx), %esi
	movq	_BIT_INNER_LB@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r15, %rdi
	movl	$1, %ecx
	callq	_rtw_write32_mask
	movq	_REG_NCTL0@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	(%r13), %edx
	movq	%r15, %rdi
	movl	$12, %ecx
	callq	_rtw_write32_mask
	movq	_REG_RXSRAM_CTL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_BIT_DPD_CLK@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r15, %rdi
	movl	$15, %ecx
	callq	_rtw_write32_mask
	movq	_RF_PATH_A@GOTPCREL(%rip), %rax
	movq	%r12, -56(%rbp)                 ## 8-byte Spill
	cmpl	%r12d, (%rax)
	movq	_REG_DPD_CTL0_S0@GOTPCREL(%rip), %rax
	cmovneq	_REG_DPD_CTL0_S1@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_BIT_GS_PWSF@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	_REG_DPD_CTL1_S1@GOTPCREL(%rip), %rbx
	cmoveq	_REG_DPD_CTL1_S0@GOTPCREL(%rip), %rbx
	movq	%r15, %rdi
	movl	$17196672, %ecx                 ## imm = 0x1066680
	callq	_rtw_write32_mask
	movl	(%rbx), %esi
	movq	_BIT_DPD_EN@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r15, %rdi
	movl	$1, %ecx
	callq	_rtw_write32_mask
	movq	(%r15), %rax
	movq	_DPK_CHANNEL_WIDTH_80@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jne	LBB0_2
## %bb.1:
	movl	$84017152, %r12d                ## imm = 0x5020000
	movl	$16777435, -44(%rbp)            ## 4-byte Folded Spill
                                        ## imm = 0x10000DB
	movl	$-2130706213, %ebx              ## imm = 0x810000DB
	movl	$4880, %r14d                    ## imm = 0x1310
	movl	$-2147478768, %edx              ## imm = 0x80001310
	jmp	LBB0_3
LBB0_2:
	movl	$84017160, %r12d                ## imm = 0x5020008
	movl	$50458132, -44(%rbp)            ## 4-byte Folded Spill
                                        ## imm = 0x301EE14
	movl	$-2097025516, %ebx              ## imm = 0x8301EE14
	movl	$33560844, %r14d                ## imm = 0x200190C
	movl	$-2113922804, %edx              ## imm = 0x8200190C
LBB0_3:
	movq	_REG_DPD_CTL16@GOTPCREL(%rip), %r13
	movl	(%r13), %esi
	movq	%r15, %rdi
	callq	_rtw_write32
	movl	(%r13), %esi
	movq	%r15, %rdi
	movl	%r14d, %edx
	callq	_rtw_write32
	movl	(%r13), %esi
	movq	%r15, %rdi
	movl	%ebx, %edx
	callq	_rtw_write32
	movl	(%r13), %esi
	movq	%r15, %rdi
	movl	-44(%rbp), %edx                 ## 4-byte Reload
	callq	_rtw_write32
	movl	(%r13), %esi
	movq	%r15, %rdi
	movl	$46120, %edx                    ## imm = 0xB428
	callq	_rtw_write32
	movq	_REG_DPD_CTL15@GOTPCREL(%rip), %rax
	movl	(%rax), %r14d
	movq	-56(%rbp), %r13                 ## 8-byte Reload
	movl	%r13d, %edi
	callq	_BIT
	shll	$28, %eax
	orl	%eax, %r12d
	movq	%r15, %rdi
	movl	%r14d, %esi
	movl	%r12d, %edx
	callq	_rtw_write32
	movq	_REG_DPD_CTL0@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_MASKBYTE3@GOTPCREL(%rip), %rbx
	movl	(%rbx), %edx
	movl	%r13d, %ecx
	orl	$8, %ecx
	movq	%r15, %rdi
	callq	_rtw_write32_mask
	movq	_RTW_DPK_CAL_PWR@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r15, %rdi
	movl	%r13d, %esi
	callq	_rtw8822c_dpk_one_shot
	movq	_REG_DPD_CTL15@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	(%rbx), %edx
	movq	%r15, %rdi
	xorl	%ecx, %ecx
	callq	_rtw_write32_mask
	movq	_REG_NCTL0@GOTPCREL(%rip), %r12
	movl	(%r12), %esi
	movq	_BIT_SUBPAGE@GOTPCREL(%rip), %r14
	movl	(%r14), %edx
	movq	%r15, %rdi
	movl	-48(%rbp), %ecx                 ## 4-byte Reload
	callq	_rtw_write32_mask
	movq	_REG_R_CONFIG@GOTPCREL(%rip), %rbx
	movl	(%rbx), %esi
	movq	_BIT_IQ_SWITCH@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r15, %rdi
	xorl	%ecx, %ecx
	callq	_rtw_write32_mask
	movl	(%rbx), %esi
	movq	_BIT_INNER_LB@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r15, %rdi
	xorl	%ecx, %ecx
	callq	_rtw_write32_mask
	movl	(%r12), %esi
	movl	(%r14), %edx
	movq	%r15, %rdi
	movl	$12, %ecx
	callq	_rtw_write32_mask
	movq	_RF_PATH_A@GOTPCREL(%rip), %r12
	cmpl	%r13d, (%r12)
	movq	_REG_DPD_CTL0_S1@GOTPCREL(%rip), %rbx
	movq	%rbx, %rax
	cmoveq	_REG_DPD_CTL0_S0@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_BIT_GS_PWSF@GOTPCREL(%rip), %r12
	movl	(%r12), %edx
	movq	%r15, %rdi
	movl	$91, %ecx
	callq	_rtw_write32_mask
	movq	_REG_RXSRAM_CTL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_BIT_RPT_SEL@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r15, %rdi
	xorl	%ecx, %ecx
	callq	_rtw_write32_mask
	movq	_REG_STAT_RPT@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_BIT_RPT_DGAIN@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r15, %rdi
	callq	_rtw_read32_mask
	imull	$910, %eax, %edi                ## imm = 0x38E
	sarl	$10, %edi
	movl	$10, %esi
	callq	_DIV_ROUND_CLOSEST
	movl	%eax, %r14d
	movq	_RF_PATH_A@GOTPCREL(%rip), %rax
	cmpl	%r13d, (%rax)
	cmoveq	_REG_DPD_CTL0_S0@GOTPCREL(%rip), %rbx
	movl	(%rbx), %esi
	movl	(%r12), %edx
	movq	%r15, %rdi
	movl	%r14d, %ecx
	callq	_rtw_write32_mask
	movq	8(%r15), %rax
	movslq	%r13d, %rcx
	movl	%r14d, (%rax,%rcx,4)
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_REG_NCTL0,4,2                  ## @REG_NCTL0
	.comm	_BIT_SUBPAGE,4,2                ## @BIT_SUBPAGE
	.comm	_REG_IQK_CTL1,4,2               ## @REG_IQK_CTL1
	.comm	_BIT_BYPASS_DPD,4,2             ## @BIT_BYPASS_DPD
	.comm	_BIT_TX_CFIR,4,2                ## @BIT_TX_CFIR
	.comm	_REG_R_CONFIG,4,2               ## @REG_R_CONFIG
	.comm	_BIT_IQ_SWITCH,4,2              ## @BIT_IQ_SWITCH
	.comm	_BIT_INNER_LB,4,2               ## @BIT_INNER_LB
	.comm	_REG_RXSRAM_CTL,4,2             ## @REG_RXSRAM_CTL
	.comm	_BIT_DPD_CLK,4,2                ## @BIT_DPD_CLK
	.comm	_RF_PATH_A,4,2                  ## @RF_PATH_A
	.comm	_REG_DPD_CTL0_S0,4,2            ## @REG_DPD_CTL0_S0
	.comm	_BIT_GS_PWSF,4,2                ## @BIT_GS_PWSF
	.comm	_REG_DPD_CTL1_S0,4,2            ## @REG_DPD_CTL1_S0
	.comm	_BIT_DPD_EN,4,2                 ## @BIT_DPD_EN
	.comm	_REG_DPD_CTL0_S1,4,2            ## @REG_DPD_CTL0_S1
	.comm	_REG_DPD_CTL1_S1,4,2            ## @REG_DPD_CTL1_S1
	.comm	_DPK_CHANNEL_WIDTH_80,8,3       ## @DPK_CHANNEL_WIDTH_80
	.comm	_REG_DPD_CTL16,4,2              ## @REG_DPD_CTL16
	.comm	_REG_DPD_CTL15,4,2              ## @REG_DPD_CTL15
	.comm	_REG_DPD_CTL0,4,2               ## @REG_DPD_CTL0
	.comm	_MASKBYTE3,4,2                  ## @MASKBYTE3
	.comm	_RTW_DPK_CAL_PWR,4,2            ## @RTW_DPK_CAL_PWR
	.comm	_BIT_RPT_SEL,4,2                ## @BIT_RPT_SEL
	.comm	_REG_STAT_RPT,4,2               ## @REG_STAT_RPT
	.comm	_BIT_RPT_DGAIN,4,2              ## @BIT_RPT_DGAIN
	.no_dead_strip	_rtw8822c_dpk_cal_gs
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function rtw8822c_dpk_cal_gs
_rtw8822c_dpk_cal_gs:                   ; @rtw8822c_dpk_cal_gs
	.cfi_startproc
; %bb.0:
	stp	x28, x27, [sp, #-96]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 96
	stp	x26, x25, [sp, #16]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #32]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #48]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #64]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #80]             ; 16-byte Folded Spill
	add	x29, sp, #80
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	mov	x19, x1
	mov	x20, x0
Lloh0:
	adrp	x23, _REG_NCTL0@GOTPAGE
Lloh1:
	ldr	x23, [x23, _REG_NCTL0@GOTPAGEOFF]
	ldr	w1, [x23]
Lloh2:
	adrp	x27, _BIT_SUBPAGE@GOTPAGE
Lloh3:
	ldr	x27, [x27, _BIT_SUBPAGE@GOTPAGEOFF]
	ldr	w2, [x27]
	lsl	w8, w19, #1
	orr	w21, w8, #0x8
	mov	x3, x21
	bl	_rtw_write32_mask
Lloh4:
	adrp	x22, _REG_IQK_CTL1@GOTPAGE
Lloh5:
	ldr	x22, [x22, _REG_IQK_CTL1@GOTPAGEOFF]
	ldr	w1, [x22]
Lloh6:
	adrp	x8, _BIT_BYPASS_DPD@GOTPAGE
Lloh7:
	ldr	x8, [x8, _BIT_BYPASS_DPD@GOTPAGEOFF]
Lloh8:
	ldr	w2, [x8]
	mov	x0, x20
	mov	w3, #0
	bl	_rtw_write32_mask
	ldr	w1, [x22]
Lloh9:
	adrp	x8, _BIT_TX_CFIR@GOTPAGE
Lloh10:
	ldr	x8, [x8, _BIT_TX_CFIR@GOTPAGEOFF]
Lloh11:
	ldr	w2, [x8]
	mov	x0, x20
	mov	w3, #0
	bl	_rtw_write32_mask
Lloh12:
	adrp	x28, _REG_R_CONFIG@GOTPAGE
Lloh13:
	ldr	x28, [x28, _REG_R_CONFIG@GOTPAGEOFF]
	ldr	w1, [x28]
Lloh14:
	adrp	x8, _BIT_IQ_SWITCH@GOTPAGE
Lloh15:
	ldr	x8, [x8, _BIT_IQ_SWITCH@GOTPAGEOFF]
Lloh16:
	ldr	w2, [x8]
	mov	x0, x20
	mov	w3, #9
	bl	_rtw_write32_mask
	ldr	w1, [x28]
Lloh17:
	adrp	x8, _BIT_INNER_LB@GOTPAGE
Lloh18:
	ldr	x8, [x8, _BIT_INNER_LB@GOTPAGEOFF]
Lloh19:
	ldr	w2, [x8]
	mov	x0, x20
	mov	w3, #1
	bl	_rtw_write32_mask
	ldr	w1, [x23]
	ldr	w2, [x27]
	mov	x0, x20
	mov	w3, #12
	bl	_rtw_write32_mask
Lloh20:
	adrp	x8, _REG_RXSRAM_CTL@GOTPAGE
Lloh21:
	ldr	x8, [x8, _REG_RXSRAM_CTL@GOTPAGEOFF]
Lloh22:
	ldr	w1, [x8]
Lloh23:
	adrp	x8, _BIT_DPD_CLK@GOTPAGE
Lloh24:
	ldr	x8, [x8, _BIT_DPD_CLK@GOTPAGEOFF]
Lloh25:
	ldr	w2, [x8]
	mov	x0, x20
	mov	w3, #15
	bl	_rtw_write32_mask
Lloh26:
	adrp	x8, _RF_PATH_A@GOTPAGE
Lloh27:
	ldr	x8, [x8, _RF_PATH_A@GOTPAGEOFF]
Lloh28:
	ldr	w8, [x8]
Lloh29:
	adrp	x9, _REG_DPD_CTL0_S0@GOTPAGE
Lloh30:
	ldr	x9, [x9, _REG_DPD_CTL0_S0@GOTPAGEOFF]
Lloh31:
	adrp	x10, _REG_DPD_CTL0_S1@GOTPAGE
Lloh32:
	ldr	x10, [x10, _REG_DPD_CTL0_S1@GOTPAGEOFF]
	cmp	w8, w19
	csel	x8, x9, x10, eq
	ldr	w1, [x8]
Lloh33:
	adrp	x8, _BIT_GS_PWSF@GOTPAGE
Lloh34:
	ldr	x8, [x8, _BIT_GS_PWSF@GOTPAGEOFF]
Lloh35:
	ldr	w2, [x8]
Lloh36:
	adrp	x8, _REG_DPD_CTL1_S0@GOTPAGE
Lloh37:
	ldr	x8, [x8, _REG_DPD_CTL1_S0@GOTPAGEOFF]
Lloh38:
	adrp	x9, _REG_DPD_CTL1_S1@GOTPAGE
Lloh39:
	ldr	x9, [x9, _REG_DPD_CTL1_S1@GOTPAGEOFF]
	csel	x22, x8, x9, eq
	mov	x0, x20
	mov	w3, #26240
	movk	w3, #262, lsl #16
	bl	_rtw_write32_mask
	ldr	w1, [x22]
Lloh40:
	adrp	x8, _BIT_DPD_EN@GOTPAGE
Lloh41:
	ldr	x8, [x8, _BIT_DPD_EN@GOTPAGEOFF]
Lloh42:
	ldr	w2, [x8]
	mov	x0, x20
	mov	w3, #1
	bl	_rtw_write32_mask
	ldr	x8, [x20]
Lloh43:
	adrp	x9, _DPK_CHANNEL_WIDTH_80@GOTPAGE
Lloh44:
	ldr	x9, [x9, _DPK_CHANNEL_WIDTH_80@GOTPAGEOFF]
Lloh45:
	ldr	x9, [x9]
	cmp	x8, x9
	b.ne	LBB0_2
; %bb.1:
	mov	w22, #84017152
	mov	w23, #219
	movk	w23, #256, lsl #16
	mov	w24, #219
	movk	w24, #33024, lsl #16
	mov	w25, #4880
	mov	w2, #4880
	movk	w2, #32768, lsl #16
	b	LBB0_3
LBB0_2:
	mov	w22, #8
	movk	w22, #1282, lsl #16
	mov	w23, #60948
	movk	w23, #769, lsl #16
	mov	w24, #60948
	movk	w24, #33537, lsl #16
	mov	w25, #6412
	movk	w25, #512, lsl #16
	mov	w2, #6412
	movk	w2, #33280, lsl #16
LBB0_3:
Lloh46:
	adrp	x26, _REG_DPD_CTL16@GOTPAGE
Lloh47:
	ldr	x26, [x26, _REG_DPD_CTL16@GOTPAGEOFF]
	ldr	w1, [x26]
	mov	x0, x20
	bl	_rtw_write32
	ldr	w1, [x26]
	mov	x0, x20
	mov	x2, x25
	bl	_rtw_write32
	ldr	w1, [x26]
	mov	x0, x20
	mov	x2, x24
	bl	_rtw_write32
	ldr	w1, [x26]
	mov	x0, x20
	mov	x2, x23
	bl	_rtw_write32
	ldr	w1, [x26]
	mov	x0, x20
	mov	w2, #46120
	bl	_rtw_write32
Lloh48:
	adrp	x24, _REG_DPD_CTL15@GOTPAGE
Lloh49:
	ldr	x24, [x24, _REG_DPD_CTL15@GOTPAGEOFF]
	ldr	w23, [x24]
	mov	x0, x19
	bl	_BIT
	bfi	w22, w0, #28, #4
	mov	x0, x20
	mov	x1, x23
	mov	x2, x22
	bl	_rtw_write32
Lloh50:
	adrp	x8, _REG_DPD_CTL0@GOTPAGE
Lloh51:
	ldr	x8, [x8, _REG_DPD_CTL0@GOTPAGEOFF]
Lloh52:
	ldr	w1, [x8]
Lloh53:
	adrp	x22, _MASKBYTE3@GOTPAGE
Lloh54:
	ldr	x22, [x22, _MASKBYTE3@GOTPAGEOFF]
	ldr	w2, [x22]
	orr	w3, w19, #0x8
	mov	x0, x20
	bl	_rtw_write32_mask
Lloh55:
	adrp	x8, _RTW_DPK_CAL_PWR@GOTPAGE
Lloh56:
	ldr	x8, [x8, _RTW_DPK_CAL_PWR@GOTPAGEOFF]
Lloh57:
	ldr	w2, [x8]
	mov	x0, x20
	mov	x1, x19
	bl	_rtw8822c_dpk_one_shot
	ldr	w1, [x24]
	ldr	w2, [x22]
	mov	x0, x20
	mov	w3, #0
	bl	_rtw_write32_mask
Lloh58:
	adrp	x22, _REG_NCTL0@GOTPAGE
Lloh59:
	ldr	x22, [x22, _REG_NCTL0@GOTPAGEOFF]
	ldr	w1, [x22]
	ldr	w2, [x27]
	mov	x0, x20
	mov	x3, x21
	bl	_rtw_write32_mask
	ldr	w1, [x28]
Lloh60:
	adrp	x8, _BIT_IQ_SWITCH@GOTPAGE
Lloh61:
	ldr	x8, [x8, _BIT_IQ_SWITCH@GOTPAGEOFF]
Lloh62:
	ldr	w2, [x8]
	mov	x0, x20
	mov	w3, #0
	bl	_rtw_write32_mask
	ldr	w1, [x28]
Lloh63:
	adrp	x8, _BIT_INNER_LB@GOTPAGE
Lloh64:
	ldr	x8, [x8, _BIT_INNER_LB@GOTPAGEOFF]
Lloh65:
	ldr	w2, [x8]
	mov	x0, x20
	mov	w3, #0
	bl	_rtw_write32_mask
	ldr	w1, [x22]
	ldr	w2, [x27]
	mov	x0, x20
	mov	w3, #12
	bl	_rtw_write32_mask
Lloh66:
	adrp	x22, _RF_PATH_A@GOTPAGE
Lloh67:
	ldr	x22, [x22, _RF_PATH_A@GOTPAGEOFF]
	ldr	w8, [x22]
	cmp	w8, w19
Lloh68:
	adrp	x23, _REG_DPD_CTL0_S0@GOTPAGE
Lloh69:
	ldr	x23, [x23, _REG_DPD_CTL0_S0@GOTPAGEOFF]
Lloh70:
	adrp	x24, _REG_DPD_CTL0_S1@GOTPAGE
Lloh71:
	ldr	x24, [x24, _REG_DPD_CTL0_S1@GOTPAGEOFF]
	csel	x8, x23, x24, eq
	ldr	w1, [x8]
Lloh72:
	adrp	x25, _BIT_GS_PWSF@GOTPAGE
Lloh73:
	ldr	x25, [x25, _BIT_GS_PWSF@GOTPAGEOFF]
	ldr	w2, [x25]
	mov	x0, x20
	mov	w3, #91
	bl	_rtw_write32_mask
Lloh74:
	adrp	x8, _REG_RXSRAM_CTL@GOTPAGE
Lloh75:
	ldr	x8, [x8, _REG_RXSRAM_CTL@GOTPAGEOFF]
Lloh76:
	ldr	w1, [x8]
Lloh77:
	adrp	x8, _BIT_RPT_SEL@GOTPAGE
Lloh78:
	ldr	x8, [x8, _BIT_RPT_SEL@GOTPAGEOFF]
Lloh79:
	ldr	w2, [x8]
	mov	x0, x20
	mov	w3, #0
	bl	_rtw_write32_mask
Lloh80:
	adrp	x8, _REG_STAT_RPT@GOTPAGE
Lloh81:
	ldr	x8, [x8, _REG_STAT_RPT@GOTPAGEOFF]
Lloh82:
	ldr	w1, [x8]
Lloh83:
	adrp	x8, _BIT_RPT_DGAIN@GOTPAGE
Lloh84:
	ldr	x8, [x8, _BIT_RPT_DGAIN@GOTPAGEOFF]
Lloh85:
	ldr	w2, [x8]
	mov	x0, x20
	bl	_rtw_read32_mask
	mov	w8, #910
	mul	w8, w0, w8
	asr	w0, w8, #10
	mov	w1, #10
	bl	_DIV_ROUND_CLOSEST
	mov	x21, x0
	ldr	w8, [x22]
	cmp	w8, w19
	csel	x8, x23, x24, eq
	ldr	w1, [x8]
	ldr	w2, [x25]
	mov	x0, x20
	mov	x3, x21
	bl	_rtw_write32_mask
	ldr	x8, [x20, #8]
	str	w21, [x8, w19, sxtw #2]
	ldp	x29, x30, [sp, #80]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #64]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #48]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #32]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #16]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp], #96             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh43, Lloh44, Lloh45
	.loh AdrpLdrGotLdr	Lloh40, Lloh41, Lloh42
	.loh AdrpLdrGot	Lloh38, Lloh39
	.loh AdrpLdrGot	Lloh36, Lloh37
	.loh AdrpLdrGotLdr	Lloh33, Lloh34, Lloh35
	.loh AdrpLdrGot	Lloh31, Lloh32
	.loh AdrpLdrGot	Lloh29, Lloh30
	.loh AdrpLdrGotLdr	Lloh26, Lloh27, Lloh28
	.loh AdrpLdrGotLdr	Lloh23, Lloh24, Lloh25
	.loh AdrpLdrGotLdr	Lloh20, Lloh21, Lloh22
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh19
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh16
	.loh AdrpLdrGot	Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGot	Lloh4, Lloh5
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh83, Lloh84, Lloh85
	.loh AdrpLdrGotLdr	Lloh80, Lloh81, Lloh82
	.loh AdrpLdrGotLdr	Lloh77, Lloh78, Lloh79
	.loh AdrpLdrGotLdr	Lloh74, Lloh75, Lloh76
	.loh AdrpLdrGot	Lloh72, Lloh73
	.loh AdrpLdrGot	Lloh70, Lloh71
	.loh AdrpLdrGot	Lloh68, Lloh69
	.loh AdrpLdrGot	Lloh66, Lloh67
	.loh AdrpLdrGotLdr	Lloh63, Lloh64, Lloh65
	.loh AdrpLdrGotLdr	Lloh60, Lloh61, Lloh62
	.loh AdrpLdrGot	Lloh58, Lloh59
	.loh AdrpLdrGotLdr	Lloh55, Lloh56, Lloh57
	.loh AdrpLdrGot	Lloh53, Lloh54
	.loh AdrpLdrGotLdr	Lloh50, Lloh51, Lloh52
	.loh AdrpLdrGot	Lloh48, Lloh49
	.loh AdrpLdrGot	Lloh46, Lloh47
	.cfi_endproc
                                        ; -- End function
	.comm	_REG_NCTL0,4,2                  ; @REG_NCTL0
	.comm	_BIT_SUBPAGE,4,2                ; @BIT_SUBPAGE
	.comm	_REG_IQK_CTL1,4,2               ; @REG_IQK_CTL1
	.comm	_BIT_BYPASS_DPD,4,2             ; @BIT_BYPASS_DPD
	.comm	_BIT_TX_CFIR,4,2                ; @BIT_TX_CFIR
	.comm	_REG_R_CONFIG,4,2               ; @REG_R_CONFIG
	.comm	_BIT_IQ_SWITCH,4,2              ; @BIT_IQ_SWITCH
	.comm	_BIT_INNER_LB,4,2               ; @BIT_INNER_LB
	.comm	_REG_RXSRAM_CTL,4,2             ; @REG_RXSRAM_CTL
	.comm	_BIT_DPD_CLK,4,2                ; @BIT_DPD_CLK
	.comm	_RF_PATH_A,4,2                  ; @RF_PATH_A
	.comm	_REG_DPD_CTL0_S0,4,2            ; @REG_DPD_CTL0_S0
	.comm	_BIT_GS_PWSF,4,2                ; @BIT_GS_PWSF
	.comm	_REG_DPD_CTL1_S0,4,2            ; @REG_DPD_CTL1_S0
	.comm	_BIT_DPD_EN,4,2                 ; @BIT_DPD_EN
	.comm	_REG_DPD_CTL0_S1,4,2            ; @REG_DPD_CTL0_S1
	.comm	_REG_DPD_CTL1_S1,4,2            ; @REG_DPD_CTL1_S1
	.comm	_DPK_CHANNEL_WIDTH_80,8,3       ; @DPK_CHANNEL_WIDTH_80
	.comm	_REG_DPD_CTL16,4,2              ; @REG_DPD_CTL16
	.comm	_REG_DPD_CTL15,4,2              ; @REG_DPD_CTL15
	.comm	_REG_DPD_CTL0,4,2               ; @REG_DPD_CTL0
	.comm	_MASKBYTE3,4,2                  ; @MASKBYTE3
	.comm	_RTW_DPK_CAL_PWR,4,2            ; @RTW_DPK_CAL_PWR
	.comm	_BIT_RPT_SEL,4,2                ; @BIT_RPT_SEL
	.comm	_REG_STAT_RPT,4,2               ; @REG_STAT_RPT
	.comm	_BIT_RPT_DGAIN,4,2              ; @BIT_RPT_DGAIN
	.no_dead_strip	_rtw8822c_dpk_cal_gs
.subsections_via_symbols
