	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function wlc_lcnphy_set_chanspec_tweaks
_wlc_lcnphy_set_chanspec_tweaks:        ## @wlc_lcnphy_set_chanspec_tweaks
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r15
	movl	%esi, %edi
	callq	_CHSPEC_CHANNEL
	movq	8(%r15), %r14
	cmpl	$14, %eax
	jne	LBB0_2
## %bb.1:
	movq	%r15, %rdi
	movl	$1096, %esi                     ## imm = 0x448
	movl	$768, %edx                      ## imm = 0x300
	movl	$512, %ecx                      ## imm = 0x200
	callq	_mod_phy_reg
	movl	$2, (%r14)
	movl	$22794, -48(%rbp)               ## 4-byte Folded Spill
                                        ## imm = 0x590A
	movl	$7936, -44(%rbp)                ## 4-byte Folded Spill
                                        ## imm = 0x1F00
	movl	$1, %r12d
	movl	$539764768, %r13d               ## imm = 0x202C2820
	movq	%r14, %rbx
	movl	$3355443, %r14d                 ## imm = 0x333333
	movl	$51645444, %edx                 ## imm = 0x3140C04
	jmp	LBB0_6
LBB0_2:
	movl	%eax, %ebx
	movq	%r15, %rdi
	movl	$1096, %esi                     ## imm = 0x448
	movl	$768, %edx                      ## imm = 0x300
	movl	$256, %ecx                      ## imm = 0x100
	callq	_mod_phy_reg
	xorl	%eax, %eax
	cmpl	$1, %ebx
	sete	%al
	addl	%eax, %eax
	addl	$2, %eax
	movq	%r14, %rsi
	movl	%eax, (%r14)
	decl	%ebx
	cmpl	$11, %ebx
	ja	LBB0_3
## %bb.4:
	movslq	%ebx, %rax
	leaq	l_switch.table.wlc_lcnphy_set_chanspec_tweaks(%rip), %rcx
	movl	(%rcx,%rax,4), %edx
	leaq	l_switch.table.wlc_lcnphy_set_chanspec_tweaks.1(%rip), %rcx
	movl	(%rcx,%rax,4), %r14d
	leaq	l_switch.table.wlc_lcnphy_set_chanspec_tweaks.2(%rip), %rcx
	movl	(%rcx,%rax,4), %r13d
	leaq	l_switch.table.wlc_lcnphy_set_chanspec_tweaks.3(%rip), %rcx
	movl	(%rcx,%rax,4), %r12d
	leaq	l_switch.table.wlc_lcnphy_set_chanspec_tweaks.4(%rip), %rcx
	movl	(%rcx,%rax,4), %ecx
	movl	%ecx, -44(%rbp)                 ## 4-byte Spill
	leaq	l_switch.table.wlc_lcnphy_set_chanspec_tweaks.5(%rip), %rcx
	movl	(%rcx,%rax,4), %eax
	movl	%eax, -48(%rbp)                 ## 4-byte Spill
	jmp	LBB0_5
LBB0_3:
	movl	$22794, -48(%rbp)               ## 4-byte Folded Spill
                                        ## imm = 0x590A
	movl	$7936, -44(%rbp)                ## 4-byte Folded Spill
                                        ## imm = 0x1F00
	movl	$1, %r12d
	movl	$539764768, %r13d               ## imm = 0x202C2820
	movl	$3355443, %r14d                 ## imm = 0x333333
	movl	$51645444, %edx                 ## imm = 0x3140C04
LBB0_5:
	movq	%rsi, %rbx
LBB0_6:
	movq	(%r15), %rax
	movq	(%rax), %rdi
	movl	$2, %esi
	callq	_bcma_chipco_pll_write
	movq	(%r15), %rax
	movq	(%rax), %rdi
	movl	$3, %esi
	movl	$-16777216, %edx                ## imm = 0xFF000000
	movl	%r14d, %ecx
	callq	_bcma_chipco_pll_maskset
	movq	(%r15), %rax
	movq	(%rax), %rdi
	movl	$4, %esi
	movl	%r13d, %edx
	callq	_bcma_chipco_pll_write
	movq	(%r15), %rax
	movq	(%rax), %rdi
	movq	_BCMA_CC_PMU_CTL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_BCMA_CC_PMU_CTL_PLL_UPD@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	callq	_bcma_cc_set32
	movq	%r15, %rdi
	movl	$2370, %esi                     ## imm = 0x942
	xorl	%edx, %edx
	callq	_write_phy_reg
	movq	%r15, %rdi
	movl	%r12d, %esi
	callq	_wlc_lcnphy_txrx_spur_avoidance_mode
	movl	$0, 4(%rbx)
	movq	%r15, %rdi
	movl	$1060, %esi                     ## imm = 0x424
	movl	$65280, %edx                    ## imm = 0xFF00
	movl	-44(%rbp), %ecx                 ## 4-byte Reload
	callq	_mod_phy_reg
	movq	%r15, %rdi
	movl	$1061, %esi                     ## imm = 0x425
	movl	-48(%rbp), %edx                 ## 4-byte Reload
	callq	_write_phy_reg
	movq	%r15, %rdi
	movl	$1098, %esi                     ## imm = 0x44A
	movl	$68, %edx
	callq	_or_phy_reg
	movq	%r15, %rdi
	movl	$1098, %esi                     ## imm = 0x44A
	movl	$128, %edx
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_write_phy_reg                  ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_BCMA_CC_PMU_CTL,4,2            ## @BCMA_CC_PMU_CTL
	.comm	_BCMA_CC_PMU_CTL_PLL_UPD,4,2    ## @BCMA_CC_PMU_CTL_PLL_UPD
	.no_dead_strip	_wlc_lcnphy_set_chanspec_tweaks
	.section	__TEXT,__const
	.p2align	2                               ## @switch.table.wlc_lcnphy_set_chanspec_tweaks
l_switch.table.wlc_lcnphy_set_chanspec_tweaks:
	.long	50334724                        ## 0x3000c04
	.long	50334724                        ## 0x3000c04
	.long	50334724                        ## 0x3000c04
	.long	50334724                        ## 0x3000c04
	.long	51645444                        ## 0x3140c04
	.long	51645444                        ## 0x3140c04
	.long	51645444                        ## 0x3140c04
	.long	51645444                        ## 0x3140c04
	.long	50334724                        ## 0x3000c04
	.long	50334724                        ## 0x3000c04
	.long	50334724                        ## 0x3000c04
	.long	50334724                        ## 0x3000c04

	.p2align	2                               ## @switch.table.wlc_lcnphy_set_chanspec_tweaks.1
l_switch.table.wlc_lcnphy_set_chanspec_tweaks.1:
	.long	0                               ## 0x0
	.long	0                               ## 0x0
	.long	0                               ## 0x0
	.long	0                               ## 0x0
	.long	3355443                         ## 0x333333
	.long	3355443                         ## 0x333333
	.long	3355443                         ## 0x333333
	.long	3355443                         ## 0x333333
	.long	0                               ## 0x0
	.long	0                               ## 0x0
	.long	0                               ## 0x0
	.long	0                               ## 0x0

	.p2align	2                               ## @switch.table.wlc_lcnphy_set_chanspec_tweaks.2
l_switch.table.wlc_lcnphy_set_chanspec_tweaks.2:
	.long	536872384                       ## 0x200005c0
	.long	536872384                       ## 0x200005c0
	.long	536872384                       ## 0x200005c0
	.long	536872384                       ## 0x200005c0
	.long	539764768                       ## 0x202c2820
	.long	539764768                       ## 0x202c2820
	.long	539764768                       ## 0x202c2820
	.long	539764768                       ## 0x202c2820
	.long	536872384                       ## 0x200005c0
	.long	536872384                       ## 0x200005c0
	.long	536872384                       ## 0x200005c0
	.long	536872384                       ## 0x200005c0

	.p2align	2                               ## @switch.table.wlc_lcnphy_set_chanspec_tweaks.3
l_switch.table.wlc_lcnphy_set_chanspec_tweaks.3:
	.long	0                               ## 0x0
	.long	0                               ## 0x0
	.long	0                               ## 0x0
	.long	0                               ## 0x0
	.long	1                               ## 0x1
	.long	1                               ## 0x1
	.long	1                               ## 0x1
	.long	1                               ## 0x1
	.long	0                               ## 0x0
	.long	0                               ## 0x0
	.long	0                               ## 0x0
	.long	0                               ## 0x0

	.p2align	2                               ## @switch.table.wlc_lcnphy_set_chanspec_tweaks.4
l_switch.table.wlc_lcnphy_set_chanspec_tweaks.4:
	.long	6912                            ## 0x1b00
	.long	6912                            ## 0x1b00
	.long	6912                            ## 0x1b00
	.long	6912                            ## 0x1b00
	.long	7936                            ## 0x1f00
	.long	7936                            ## 0x1f00
	.long	7936                            ## 0x1f00
	.long	7936                            ## 0x1f00
	.long	6912                            ## 0x1b00
	.long	6912                            ## 0x1b00
	.long	6912                            ## 0x1b00
	.long	6912                            ## 0x1b00

	.p2align	2                               ## @switch.table.wlc_lcnphy_set_chanspec_tweaks.5
l_switch.table.wlc_lcnphy_set_chanspec_tweaks.5:
	.long	22791                           ## 0x5907
	.long	22791                           ## 0x5907
	.long	22791                           ## 0x5907
	.long	22791                           ## 0x5907
	.long	22794                           ## 0x590a
	.long	22794                           ## 0x590a
	.long	22794                           ## 0x590a
	.long	22794                           ## 0x590a
	.long	22791                           ## 0x5907
	.long	22791                           ## 0x5907
	.long	22791                           ## 0x5907
	.long	22791                           ## 0x5907

.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function wlc_lcnphy_set_chanspec_tweaks
_wlc_lcnphy_set_chanspec_tweaks:        ; @wlc_lcnphy_set_chanspec_tweaks
	.cfi_startproc
; %bb.0:
	stp	x26, x25, [sp, #-80]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	mov	x19, x0
	mov	w20, #10272
	movk	w20, #8236, lsl #16
	mov	w23, #3076
	movk	w23, #788, lsl #16
	mov	w21, #13107
	movk	w21, #51, lsl #16
	mov	x0, x1
	bl	_CHSPEC_CHANNEL
	ldr	x26, [x19, #8]
	cmp	w0, #14
	b.ne	LBB0_2
; %bb.1:
	mov	x0, x19
	mov	w1, #1096
	mov	w2, #768
	mov	w3, #512
	bl	_mod_phy_reg
	mov	w8, #2
	str	w8, [x26]
	b	LBB0_4
LBB0_2:
	mov	x22, x0
	mov	x0, x19
	mov	w1, #1096
	mov	w2, #768
	mov	w3, #256
	bl	_mod_phy_reg
	subs	w8, w22, #1
	mov	w9, #2
	mov	w10, #4
	csel	w9, w10, w9, eq
	str	w9, [x26]
	cmp	w8, #11
	b.hi	LBB0_4
; %bb.3:
	sbfiz	x8, x8, #2, #32
Lloh0:
	adrp	x9, l_switch.table.wlc_lcnphy_set_chanspec_tweaks@PAGE
Lloh1:
	add	x9, x9, l_switch.table.wlc_lcnphy_set_chanspec_tweaks@PAGEOFF
	ldr	w23, [x9, x8]
Lloh2:
	adrp	x9, l_switch.table.wlc_lcnphy_set_chanspec_tweaks.1@PAGE
Lloh3:
	add	x9, x9, l_switch.table.wlc_lcnphy_set_chanspec_tweaks.1@PAGEOFF
	ldr	w21, [x9, x8]
Lloh4:
	adrp	x9, l_switch.table.wlc_lcnphy_set_chanspec_tweaks.2@PAGE
Lloh5:
	add	x9, x9, l_switch.table.wlc_lcnphy_set_chanspec_tweaks.2@PAGEOFF
	ldr	w20, [x9, x8]
Lloh6:
	adrp	x9, l_switch.table.wlc_lcnphy_set_chanspec_tweaks.3@PAGE
Lloh7:
	add	x9, x9, l_switch.table.wlc_lcnphy_set_chanspec_tweaks.3@PAGEOFF
	ldr	w25, [x9, x8]
Lloh8:
	adrp	x9, l_switch.table.wlc_lcnphy_set_chanspec_tweaks.4@PAGE
Lloh9:
	add	x9, x9, l_switch.table.wlc_lcnphy_set_chanspec_tweaks.4@PAGEOFF
	ldr	w24, [x9, x8]
Lloh10:
	adrp	x9, l_switch.table.wlc_lcnphy_set_chanspec_tweaks.5@PAGE
Lloh11:
	add	x9, x9, l_switch.table.wlc_lcnphy_set_chanspec_tweaks.5@PAGEOFF
	ldr	w22, [x9, x8]
	b	LBB0_5
LBB0_4:
	mov	w22, #22794
	mov	w24, #7936
	mov	w25, #1
LBB0_5:
	ldr	x8, [x19]
	ldr	x0, [x8]
	mov	w1, #2
	mov	x2, x23
	bl	_bcma_chipco_pll_write
	ldr	x8, [x19]
	ldr	x0, [x8]
	mov	w1, #3
	mov	w2, #-16777216
	mov	x3, x21
	bl	_bcma_chipco_pll_maskset
	ldr	x8, [x19]
	ldr	x0, [x8]
	mov	w1, #4
	mov	x2, x20
	bl	_bcma_chipco_pll_write
	ldr	x8, [x19]
	ldr	x0, [x8]
Lloh12:
	adrp	x8, _BCMA_CC_PMU_CTL@GOTPAGE
Lloh13:
	ldr	x8, [x8, _BCMA_CC_PMU_CTL@GOTPAGEOFF]
Lloh14:
	ldr	w1, [x8]
Lloh15:
	adrp	x8, _BCMA_CC_PMU_CTL_PLL_UPD@GOTPAGE
Lloh16:
	ldr	x8, [x8, _BCMA_CC_PMU_CTL_PLL_UPD@GOTPAGEOFF]
Lloh17:
	ldr	w2, [x8]
	bl	_bcma_cc_set32
	mov	x0, x19
	mov	w1, #2370
	mov	w2, #0
	bl	_write_phy_reg
	mov	x0, x19
	mov	x1, x25
	bl	_wlc_lcnphy_txrx_spur_avoidance_mode
	str	wzr, [x26, #4]
	mov	x0, x19
	mov	w1, #1060
	mov	w2, #65280
	mov	x3, x24
	bl	_mod_phy_reg
	mov	x0, x19
	mov	w1, #1061
	mov	x2, x22
	bl	_write_phy_reg
	mov	x0, x19
	mov	w1, #1098
	mov	w2, #68
	bl	_or_phy_reg
	mov	x0, x19
	mov	w1, #1098
	mov	w2, #128
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp], #80             ; 16-byte Folded Reload
	b	_write_phy_reg
	.loh AdrpAdd	Lloh10, Lloh11
	.loh AdrpAdd	Lloh8, Lloh9
	.loh AdrpAdd	Lloh6, Lloh7
	.loh AdrpAdd	Lloh4, Lloh5
	.loh AdrpAdd	Lloh2, Lloh3
	.loh AdrpAdd	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.cfi_endproc
                                        ; -- End function
	.comm	_BCMA_CC_PMU_CTL,4,2            ; @BCMA_CC_PMU_CTL
	.comm	_BCMA_CC_PMU_CTL_PLL_UPD,4,2    ; @BCMA_CC_PMU_CTL_PLL_UPD
	.no_dead_strip	_wlc_lcnphy_set_chanspec_tweaks
	.section	__TEXT,__const
	.p2align	2                               ; @switch.table.wlc_lcnphy_set_chanspec_tweaks
l_switch.table.wlc_lcnphy_set_chanspec_tweaks:
	.long	50334724                        ; 0x3000c04
	.long	50334724                        ; 0x3000c04
	.long	50334724                        ; 0x3000c04
	.long	50334724                        ; 0x3000c04
	.long	51645444                        ; 0x3140c04
	.long	51645444                        ; 0x3140c04
	.long	51645444                        ; 0x3140c04
	.long	51645444                        ; 0x3140c04
	.long	50334724                        ; 0x3000c04
	.long	50334724                        ; 0x3000c04
	.long	50334724                        ; 0x3000c04
	.long	50334724                        ; 0x3000c04

	.p2align	2                               ; @switch.table.wlc_lcnphy_set_chanspec_tweaks.1
l_switch.table.wlc_lcnphy_set_chanspec_tweaks.1:
	.long	0                               ; 0x0
	.long	0                               ; 0x0
	.long	0                               ; 0x0
	.long	0                               ; 0x0
	.long	3355443                         ; 0x333333
	.long	3355443                         ; 0x333333
	.long	3355443                         ; 0x333333
	.long	3355443                         ; 0x333333
	.long	0                               ; 0x0
	.long	0                               ; 0x0
	.long	0                               ; 0x0
	.long	0                               ; 0x0

	.p2align	2                               ; @switch.table.wlc_lcnphy_set_chanspec_tweaks.2
l_switch.table.wlc_lcnphy_set_chanspec_tweaks.2:
	.long	536872384                       ; 0x200005c0
	.long	536872384                       ; 0x200005c0
	.long	536872384                       ; 0x200005c0
	.long	536872384                       ; 0x200005c0
	.long	539764768                       ; 0x202c2820
	.long	539764768                       ; 0x202c2820
	.long	539764768                       ; 0x202c2820
	.long	539764768                       ; 0x202c2820
	.long	536872384                       ; 0x200005c0
	.long	536872384                       ; 0x200005c0
	.long	536872384                       ; 0x200005c0
	.long	536872384                       ; 0x200005c0

	.p2align	2                               ; @switch.table.wlc_lcnphy_set_chanspec_tweaks.3
l_switch.table.wlc_lcnphy_set_chanspec_tweaks.3:
	.long	0                               ; 0x0
	.long	0                               ; 0x0
	.long	0                               ; 0x0
	.long	0                               ; 0x0
	.long	1                               ; 0x1
	.long	1                               ; 0x1
	.long	1                               ; 0x1
	.long	1                               ; 0x1
	.long	0                               ; 0x0
	.long	0                               ; 0x0
	.long	0                               ; 0x0
	.long	0                               ; 0x0

	.p2align	2                               ; @switch.table.wlc_lcnphy_set_chanspec_tweaks.4
l_switch.table.wlc_lcnphy_set_chanspec_tweaks.4:
	.long	6912                            ; 0x1b00
	.long	6912                            ; 0x1b00
	.long	6912                            ; 0x1b00
	.long	6912                            ; 0x1b00
	.long	7936                            ; 0x1f00
	.long	7936                            ; 0x1f00
	.long	7936                            ; 0x1f00
	.long	7936                            ; 0x1f00
	.long	6912                            ; 0x1b00
	.long	6912                            ; 0x1b00
	.long	6912                            ; 0x1b00
	.long	6912                            ; 0x1b00

	.p2align	2                               ; @switch.table.wlc_lcnphy_set_chanspec_tweaks.5
l_switch.table.wlc_lcnphy_set_chanspec_tweaks.5:
	.long	22791                           ; 0x5907
	.long	22791                           ; 0x5907
	.long	22791                           ; 0x5907
	.long	22791                           ; 0x5907
	.long	22794                           ; 0x590a
	.long	22794                           ; 0x590a
	.long	22794                           ; 0x590a
	.long	22794                           ; 0x590a
	.long	22791                           ; 0x5907
	.long	22791                           ; 0x5907
	.long	22791                           ; 0x5907
	.long	22791                           ; 0x5907

.subsections_via_symbols
