	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function mvpp2_prs_ip6_cast
_mvpp2_prs_ip6_cast:                    ## @mvpp2_prs_ip6_cast
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	subq	$16, %rsp
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	_MVPP2_PRS_L3_MULTI_CAST@GOTPCREL(%rip), %rax
	cmpw	%si, (%rax)
	jne	LBB0_1
## %bb.2:
	movq	%rdi, %r15
	movq	_MVPP2_PE_FIRST_FREE_TID@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_MVPP2_PE_LAST_FREE_TID@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	callq	_mvpp2_prs_tcam_first_free
	movl	%eax, %ebx
	testl	%eax, %eax
	js	LBB0_4
## %bb.3:
	leaq	-40(%rbp), %r14
	movq	%r14, %rdi
	xorl	%esi, %esi
	movl	$4, %edx
	callq	_memset
	movq	_MVPP2_PRS_LU_IP6@GOTPCREL(%rip), %r12
	movl	(%r12), %esi
	movq	%r14, %rdi
	callq	_mvpp2_prs_tcam_lu_set
	movl	%ebx, -40(%rbp)
	movl	(%r12), %esi
	movq	%r14, %rdi
	callq	_mvpp2_prs_sram_next_lu_set
	movq	_MVPP2_PRS_RI_L3_MCAST@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_MVPP2_PRS_RI_L3_ADDR_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r14, %rdi
	callq	_mvpp2_prs_sram_ri_update
	movq	_MVPP2_PRS_IPV6_NO_EXT_AI_BIT@GOTPCREL(%rip), %rbx
	movl	(%rbx), %edx
	movq	%r14, %rdi
	movl	%edx, %esi
	callq	_mvpp2_prs_sram_ai_update
	movq	_MVPP2_PRS_SRAM_OP_SEL_SHIFT_ADD@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r14, %rdi
	movl	$-18, %esi
	callq	_mvpp2_prs_sram_shift_set
	movq	_MVPP2_PRS_IPV6_MC@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	_MVPP2_PRS_IPV6_MC_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movq	%r14, %rdi
	xorl	%esi, %esi
	callq	_mvpp2_prs_tcam_data_byte_set
	movl	(%rbx), %edx
	movq	%r14, %rdi
	xorl	%esi, %esi
	callq	_mvpp2_prs_tcam_ai_update
	movq	_MVPP2_PRS_PORT_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	callq	_mvpp2_prs_tcam_port_map_set
	movl	-40(%rbp), %esi
	movl	(%r12), %edx
	movq	%r15, %rdi
	callq	_mvpp2_prs_shadow_set
	movq	%r15, %rdi
	movq	%r14, %rsi
	callq	_mvpp2_prs_hw_write
	xorl	%ebx, %ebx
	jmp	LBB0_4
LBB0_1:
	movq	_EINVAL@GOTPCREL(%rip), %rax
	xorl	%ebx, %ebx
	subl	(%rax), %ebx
LBB0_4:
	movl	%ebx, %eax
	addq	$16, %rsp
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_MVPP2_PRS_L3_MULTI_CAST,2,1    ## @MVPP2_PRS_L3_MULTI_CAST
	.comm	_EINVAL,4,2                     ## @EINVAL
	.comm	_MVPP2_PE_FIRST_FREE_TID,4,2    ## @MVPP2_PE_FIRST_FREE_TID
	.comm	_MVPP2_PE_LAST_FREE_TID,4,2     ## @MVPP2_PE_LAST_FREE_TID
	.comm	_MVPP2_PRS_LU_IP6,4,2           ## @MVPP2_PRS_LU_IP6
	.comm	_MVPP2_PRS_RI_L3_MCAST,4,2      ## @MVPP2_PRS_RI_L3_MCAST
	.comm	_MVPP2_PRS_RI_L3_ADDR_MASK,4,2  ## @MVPP2_PRS_RI_L3_ADDR_MASK
	.comm	_MVPP2_PRS_IPV6_NO_EXT_AI_BIT,4,2 ## @MVPP2_PRS_IPV6_NO_EXT_AI_BIT
	.comm	_MVPP2_PRS_SRAM_OP_SEL_SHIFT_ADD,4,2 ## @MVPP2_PRS_SRAM_OP_SEL_SHIFT_ADD
	.comm	_MVPP2_PRS_IPV6_MC,4,2          ## @MVPP2_PRS_IPV6_MC
	.comm	_MVPP2_PRS_IPV6_MC_MASK,4,2     ## @MVPP2_PRS_IPV6_MC_MASK
	.comm	_MVPP2_PRS_PORT_MASK,4,2        ## @MVPP2_PRS_PORT_MASK
	.no_dead_strip	_mvpp2_prs_ip6_cast
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function mvpp2_prs_ip6_cast
_mvpp2_prs_ip6_cast:                    ; @mvpp2_prs_ip6_cast
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #64
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
Lloh0:
	adrp	x8, _MVPP2_PRS_L3_MULTI_CAST@GOTPAGE
Lloh1:
	ldr	x8, [x8, _MVPP2_PRS_L3_MULTI_CAST@GOTPAGEOFF]
	ldrh	w8, [x8]
	cmp	w8, w1
	b.ne	LBB0_3
; %bb.1:
	mov	x19, x0
Lloh2:
	adrp	x8, _MVPP2_PE_FIRST_FREE_TID@GOTPAGE
Lloh3:
	ldr	x8, [x8, _MVPP2_PE_FIRST_FREE_TID@GOTPAGEOFF]
Lloh4:
	ldr	w1, [x8]
Lloh5:
	adrp	x8, _MVPP2_PE_LAST_FREE_TID@GOTPAGE
Lloh6:
	ldr	x8, [x8, _MVPP2_PE_LAST_FREE_TID@GOTPAGEOFF]
Lloh7:
	ldr	w2, [x8]
	bl	_mvpp2_prs_tcam_first_free
	mov	x20, x0
	tbnz	w0, #31, LBB0_4
; %bb.2:
	add	x0, sp, #8
	mov	w1, #0
	mov	w2, #4
	bl	_memset
Lloh8:
	adrp	x21, _MVPP2_PRS_LU_IP6@GOTPAGE
Lloh9:
	ldr	x21, [x21, _MVPP2_PRS_LU_IP6@GOTPAGEOFF]
	ldr	w1, [x21]
	add	x0, sp, #8
	bl	_mvpp2_prs_tcam_lu_set
	str	w20, [sp, #8]
	ldr	w1, [x21]
	add	x0, sp, #8
	bl	_mvpp2_prs_sram_next_lu_set
Lloh10:
	adrp	x8, _MVPP2_PRS_RI_L3_MCAST@GOTPAGE
Lloh11:
	ldr	x8, [x8, _MVPP2_PRS_RI_L3_MCAST@GOTPAGEOFF]
Lloh12:
	ldr	w1, [x8]
Lloh13:
	adrp	x8, _MVPP2_PRS_RI_L3_ADDR_MASK@GOTPAGE
Lloh14:
	ldr	x8, [x8, _MVPP2_PRS_RI_L3_ADDR_MASK@GOTPAGEOFF]
Lloh15:
	ldr	w2, [x8]
	add	x0, sp, #8
	bl	_mvpp2_prs_sram_ri_update
Lloh16:
	adrp	x20, _MVPP2_PRS_IPV6_NO_EXT_AI_BIT@GOTPAGE
Lloh17:
	ldr	x20, [x20, _MVPP2_PRS_IPV6_NO_EXT_AI_BIT@GOTPAGEOFF]
	ldr	w1, [x20]
	add	x0, sp, #8
	mov	x2, x1
	bl	_mvpp2_prs_sram_ai_update
Lloh18:
	adrp	x8, _MVPP2_PRS_SRAM_OP_SEL_SHIFT_ADD@GOTPAGE
Lloh19:
	ldr	x8, [x8, _MVPP2_PRS_SRAM_OP_SEL_SHIFT_ADD@GOTPAGEOFF]
Lloh20:
	ldr	w2, [x8]
	add	x0, sp, #8
	mov	w1, #-18
	bl	_mvpp2_prs_sram_shift_set
Lloh21:
	adrp	x8, _MVPP2_PRS_IPV6_MC@GOTPAGE
Lloh22:
	ldr	x8, [x8, _MVPP2_PRS_IPV6_MC@GOTPAGEOFF]
Lloh23:
	ldr	w2, [x8]
Lloh24:
	adrp	x8, _MVPP2_PRS_IPV6_MC_MASK@GOTPAGE
Lloh25:
	ldr	x8, [x8, _MVPP2_PRS_IPV6_MC_MASK@GOTPAGEOFF]
Lloh26:
	ldr	w3, [x8]
	add	x0, sp, #8
	mov	w1, #0
	bl	_mvpp2_prs_tcam_data_byte_set
	ldr	w2, [x20]
	add	x0, sp, #8
	mov	w1, #0
	bl	_mvpp2_prs_tcam_ai_update
Lloh27:
	adrp	x8, _MVPP2_PRS_PORT_MASK@GOTPAGE
Lloh28:
	ldr	x8, [x8, _MVPP2_PRS_PORT_MASK@GOTPAGEOFF]
Lloh29:
	ldr	w1, [x8]
	add	x0, sp, #8
	bl	_mvpp2_prs_tcam_port_map_set
	ldr	w1, [sp, #8]
	ldr	w2, [x21]
	mov	x0, x19
	bl	_mvpp2_prs_shadow_set
	add	x1, sp, #8
	mov	x0, x19
	bl	_mvpp2_prs_hw_write
	mov	w20, #0
	b	LBB0_4
LBB0_3:
Lloh30:
	adrp	x8, _EINVAL@GOTPAGE
Lloh31:
	ldr	x8, [x8, _EINVAL@GOTPAGEOFF]
Lloh32:
	ldr	w8, [x8]
	neg	w20, w8
LBB0_4:
	mov	x0, x20
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #64
	ret
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGotLdr	Lloh27, Lloh28, Lloh29
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGot	Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh13, Lloh14, Lloh15
	.loh AdrpLdrGotLdr	Lloh10, Lloh11, Lloh12
	.loh AdrpLdrGot	Lloh8, Lloh9
	.loh AdrpLdrGotLdr	Lloh30, Lloh31, Lloh32
	.cfi_endproc
                                        ; -- End function
	.comm	_MVPP2_PRS_L3_MULTI_CAST,2,1    ; @MVPP2_PRS_L3_MULTI_CAST
	.comm	_EINVAL,4,2                     ; @EINVAL
	.comm	_MVPP2_PE_FIRST_FREE_TID,4,2    ; @MVPP2_PE_FIRST_FREE_TID
	.comm	_MVPP2_PE_LAST_FREE_TID,4,2     ; @MVPP2_PE_LAST_FREE_TID
	.comm	_MVPP2_PRS_LU_IP6,4,2           ; @MVPP2_PRS_LU_IP6
	.comm	_MVPP2_PRS_RI_L3_MCAST,4,2      ; @MVPP2_PRS_RI_L3_MCAST
	.comm	_MVPP2_PRS_RI_L3_ADDR_MASK,4,2  ; @MVPP2_PRS_RI_L3_ADDR_MASK
	.comm	_MVPP2_PRS_IPV6_NO_EXT_AI_BIT,4,2 ; @MVPP2_PRS_IPV6_NO_EXT_AI_BIT
	.comm	_MVPP2_PRS_SRAM_OP_SEL_SHIFT_ADD,4,2 ; @MVPP2_PRS_SRAM_OP_SEL_SHIFT_ADD
	.comm	_MVPP2_PRS_IPV6_MC,4,2          ; @MVPP2_PRS_IPV6_MC
	.comm	_MVPP2_PRS_IPV6_MC_MASK,4,2     ; @MVPP2_PRS_IPV6_MC_MASK
	.comm	_MVPP2_PRS_PORT_MASK,4,2        ; @MVPP2_PRS_PORT_MASK
	.no_dead_strip	_mvpp2_prs_ip6_cast
.subsections_via_symbols
