	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function tegra_pcie_setup_translations
_tegra_pcie_setup_translations:         ## @tegra_pcie_setup_translations
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r14
	addq	$20, %rdi
	callq	_resource_size
	movl	%eax, %ebx
	movl	20(%r14), %esi
	movq	_AFI_AXI_BAR0_START@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r14, %rdi
	callq	_afi_writel
	sarl	$12, %ebx
	movq	_AFI_AXI_BAR0_SZ@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r14, %rdi
	movl	%ebx, %esi
	callq	_afi_writel
	leaq	16(%r14), %rdi
	callq	_resource_size
	movl	%eax, %ebx
	movl	16(%r14), %esi
	movq	_AFI_AXI_BAR1_START@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r14, %rdi
	callq	_afi_writel
	sarl	$12, %ebx
	movq	_AFI_AXI_BAR1_SZ@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r14, %rdi
	movl	%ebx, %esi
	callq	_afi_writel
	movq	_AFI_FPCI_BAR1@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r14, %rdi
	movl	$-33816576, %esi                ## imm = 0xFDFC0000
	callq	_afi_writel
	leaq	12(%r14), %rdi
	movl	12(%r14), %ebx
	sarl	$8, %ebx
	andl	$-16, %ebx
	orl	$1, %ebx
	callq	_resource_size
	movl	%eax, %r15d
	movl	12(%r14), %esi
	movq	_AFI_AXI_BAR2_START@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r14, %rdi
	callq	_afi_writel
	sarl	$12, %r15d
	movq	_AFI_AXI_BAR2_SZ@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r14, %rdi
	movl	%r15d, %esi
	callq	_afi_writel
	movq	_AFI_FPCI_BAR2@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r14, %rdi
	movl	%ebx, %esi
	callq	_afi_writel
	leaq	8(%r14), %rdi
	movl	8(%r14), %ebx
	sarl	$8, %ebx
	andl	$-16, %ebx
	orl	$1, %ebx
	callq	_resource_size
	movl	%eax, %r15d
	movl	8(%r14), %esi
	movq	_AFI_AXI_BAR3_START@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r14, %rdi
	callq	_afi_writel
	sarl	$12, %r15d
	movq	_AFI_AXI_BAR3_SZ@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r14, %rdi
	movl	%r15d, %esi
	callq	_afi_writel
	movq	_AFI_FPCI_BAR3@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r14, %rdi
	movl	%ebx, %esi
	callq	_afi_writel
	movq	_AFI_AXI_BAR4_START@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r14, %rdi
	xorl	%esi, %esi
	callq	_afi_writel
	movq	_AFI_AXI_BAR4_SZ@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r14, %rdi
	xorl	%esi, %esi
	callq	_afi_writel
	movq	_AFI_FPCI_BAR4@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r14, %rdi
	xorl	%esi, %esi
	callq	_afi_writel
	movq	_AFI_AXI_BAR5_START@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r14, %rdi
	xorl	%esi, %esi
	callq	_afi_writel
	movq	_AFI_AXI_BAR5_SZ@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r14, %rdi
	xorl	%esi, %esi
	callq	_afi_writel
	movq	_AFI_FPCI_BAR5@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r14, %rdi
	xorl	%esi, %esi
	callq	_afi_writel
	movq	(%r14), %rax
	cmpq	$0, (%rax)
	je	LBB0_2
## %bb.1:
	movq	_AFI_CACHE_BAR0_ST@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r14, %rdi
	xorl	%esi, %esi
	callq	_afi_writel
	movq	_AFI_CACHE_BAR0_SZ@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r14, %rdi
	xorl	%esi, %esi
	callq	_afi_writel
	movq	_AFI_CACHE_BAR1_ST@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r14, %rdi
	xorl	%esi, %esi
	callq	_afi_writel
	movq	_AFI_CACHE_BAR1_SZ@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r14, %rdi
	xorl	%esi, %esi
	callq	_afi_writel
LBB0_2:
	movq	_AFI_MSI_FPCI_BAR_ST@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r14, %rdi
	xorl	%esi, %esi
	callq	_afi_writel
	movq	_AFI_MSI_BAR_SZ@GOTPCREL(%rip), %rbx
	movl	(%rbx), %edx
	movq	%r14, %rdi
	xorl	%esi, %esi
	callq	_afi_writel
	movq	_AFI_MSI_AXI_BAR_ST@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r14, %rdi
	xorl	%esi, %esi
	callq	_afi_writel
	movl	(%rbx), %edx
	movq	%r14, %rdi
	xorl	%esi, %esi
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_afi_writel                     ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_AFI_AXI_BAR0_START,4,2         ## @AFI_AXI_BAR0_START
	.comm	_AFI_AXI_BAR0_SZ,4,2            ## @AFI_AXI_BAR0_SZ
	.comm	_AFI_AXI_BAR1_START,4,2         ## @AFI_AXI_BAR1_START
	.comm	_AFI_AXI_BAR1_SZ,4,2            ## @AFI_AXI_BAR1_SZ
	.comm	_AFI_FPCI_BAR1,4,2              ## @AFI_FPCI_BAR1
	.comm	_AFI_AXI_BAR2_START,4,2         ## @AFI_AXI_BAR2_START
	.comm	_AFI_AXI_BAR2_SZ,4,2            ## @AFI_AXI_BAR2_SZ
	.comm	_AFI_FPCI_BAR2,4,2              ## @AFI_FPCI_BAR2
	.comm	_AFI_AXI_BAR3_START,4,2         ## @AFI_AXI_BAR3_START
	.comm	_AFI_AXI_BAR3_SZ,4,2            ## @AFI_AXI_BAR3_SZ
	.comm	_AFI_FPCI_BAR3,4,2              ## @AFI_FPCI_BAR3
	.comm	_AFI_AXI_BAR4_START,4,2         ## @AFI_AXI_BAR4_START
	.comm	_AFI_AXI_BAR4_SZ,4,2            ## @AFI_AXI_BAR4_SZ
	.comm	_AFI_FPCI_BAR4,4,2              ## @AFI_FPCI_BAR4
	.comm	_AFI_AXI_BAR5_START,4,2         ## @AFI_AXI_BAR5_START
	.comm	_AFI_AXI_BAR5_SZ,4,2            ## @AFI_AXI_BAR5_SZ
	.comm	_AFI_FPCI_BAR5,4,2              ## @AFI_FPCI_BAR5
	.comm	_AFI_CACHE_BAR0_ST,4,2          ## @AFI_CACHE_BAR0_ST
	.comm	_AFI_CACHE_BAR0_SZ,4,2          ## @AFI_CACHE_BAR0_SZ
	.comm	_AFI_CACHE_BAR1_ST,4,2          ## @AFI_CACHE_BAR1_ST
	.comm	_AFI_CACHE_BAR1_SZ,4,2          ## @AFI_CACHE_BAR1_SZ
	.comm	_AFI_MSI_FPCI_BAR_ST,4,2        ## @AFI_MSI_FPCI_BAR_ST
	.comm	_AFI_MSI_BAR_SZ,4,2             ## @AFI_MSI_BAR_SZ
	.comm	_AFI_MSI_AXI_BAR_ST,4,2         ## @AFI_MSI_AXI_BAR_ST
	.no_dead_strip	_tegra_pcie_setup_translations
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function tegra_pcie_setup_translations
_tegra_pcie_setup_translations:         ; @tegra_pcie_setup_translations
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x0
	add	x0, x0, #20
	bl	_resource_size
	mov	x20, x0
	ldr	w1, [x19, #20]
Lloh0:
	adrp	x8, _AFI_AXI_BAR0_START@GOTPAGE
Lloh1:
	ldr	x8, [x8, _AFI_AXI_BAR0_START@GOTPAGEOFF]
Lloh2:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_afi_writel
	asr	w1, w20, #12
Lloh3:
	adrp	x8, _AFI_AXI_BAR0_SZ@GOTPAGE
Lloh4:
	ldr	x8, [x8, _AFI_AXI_BAR0_SZ@GOTPAGEOFF]
Lloh5:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_afi_writel
	add	x0, x19, #16
	bl	_resource_size
	mov	x20, x0
	ldr	w1, [x19, #16]
Lloh6:
	adrp	x8, _AFI_AXI_BAR1_START@GOTPAGE
Lloh7:
	ldr	x8, [x8, _AFI_AXI_BAR1_START@GOTPAGEOFF]
Lloh8:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_afi_writel
	asr	w1, w20, #12
Lloh9:
	adrp	x8, _AFI_AXI_BAR1_SZ@GOTPAGE
Lloh10:
	ldr	x8, [x8, _AFI_AXI_BAR1_SZ@GOTPAGEOFF]
Lloh11:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_afi_writel
Lloh12:
	adrp	x8, _AFI_FPCI_BAR1@GOTPAGE
Lloh13:
	ldr	x8, [x8, _AFI_FPCI_BAR1@GOTPAGEOFF]
Lloh14:
	ldr	w2, [x8]
	mov	x0, x19
	mov	w1, #-33816576
	bl	_afi_writel
	mov	x20, x19
	ldr	w8, [x20, #12]!
	asr	w8, w8, #8
	and	w8, w8, #0xfffffff0
	orr	w21, w8, #0x1
	mov	x0, x20
	bl	_resource_size
	mov	x22, x0
	ldr	w1, [x20]
Lloh15:
	adrp	x8, _AFI_AXI_BAR2_START@GOTPAGE
Lloh16:
	ldr	x8, [x8, _AFI_AXI_BAR2_START@GOTPAGEOFF]
Lloh17:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_afi_writel
	asr	w1, w22, #12
Lloh18:
	adrp	x8, _AFI_AXI_BAR2_SZ@GOTPAGE
Lloh19:
	ldr	x8, [x8, _AFI_AXI_BAR2_SZ@GOTPAGEOFF]
Lloh20:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_afi_writel
Lloh21:
	adrp	x8, _AFI_FPCI_BAR2@GOTPAGE
Lloh22:
	ldr	x8, [x8, _AFI_FPCI_BAR2@GOTPAGEOFF]
Lloh23:
	ldr	w2, [x8]
	mov	x0, x19
	mov	x1, x21
	bl	_afi_writel
	mov	x20, x19
	ldr	w8, [x20, #8]!
	asr	w8, w8, #8
	and	w8, w8, #0xfffffff0
	orr	w21, w8, #0x1
	mov	x0, x20
	bl	_resource_size
	mov	x22, x0
	ldr	w1, [x20]
Lloh24:
	adrp	x8, _AFI_AXI_BAR3_START@GOTPAGE
Lloh25:
	ldr	x8, [x8, _AFI_AXI_BAR3_START@GOTPAGEOFF]
Lloh26:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_afi_writel
	asr	w1, w22, #12
Lloh27:
	adrp	x8, _AFI_AXI_BAR3_SZ@GOTPAGE
Lloh28:
	ldr	x8, [x8, _AFI_AXI_BAR3_SZ@GOTPAGEOFF]
Lloh29:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_afi_writel
Lloh30:
	adrp	x8, _AFI_FPCI_BAR3@GOTPAGE
Lloh31:
	ldr	x8, [x8, _AFI_FPCI_BAR3@GOTPAGEOFF]
Lloh32:
	ldr	w2, [x8]
	mov	x0, x19
	mov	x1, x21
	bl	_afi_writel
Lloh33:
	adrp	x8, _AFI_AXI_BAR4_START@GOTPAGE
Lloh34:
	ldr	x8, [x8, _AFI_AXI_BAR4_START@GOTPAGEOFF]
Lloh35:
	ldr	w2, [x8]
	mov	x0, x19
	mov	w1, #0
	bl	_afi_writel
Lloh36:
	adrp	x8, _AFI_AXI_BAR4_SZ@GOTPAGE
Lloh37:
	ldr	x8, [x8, _AFI_AXI_BAR4_SZ@GOTPAGEOFF]
Lloh38:
	ldr	w2, [x8]
	mov	x0, x19
	mov	w1, #0
	bl	_afi_writel
Lloh39:
	adrp	x8, _AFI_FPCI_BAR4@GOTPAGE
Lloh40:
	ldr	x8, [x8, _AFI_FPCI_BAR4@GOTPAGEOFF]
Lloh41:
	ldr	w2, [x8]
	mov	x0, x19
	mov	w1, #0
	bl	_afi_writel
Lloh42:
	adrp	x8, _AFI_AXI_BAR5_START@GOTPAGE
Lloh43:
	ldr	x8, [x8, _AFI_AXI_BAR5_START@GOTPAGEOFF]
Lloh44:
	ldr	w2, [x8]
	mov	x0, x19
	mov	w1, #0
	bl	_afi_writel
Lloh45:
	adrp	x8, _AFI_AXI_BAR5_SZ@GOTPAGE
Lloh46:
	ldr	x8, [x8, _AFI_AXI_BAR5_SZ@GOTPAGEOFF]
Lloh47:
	ldr	w2, [x8]
	mov	x0, x19
	mov	w1, #0
	bl	_afi_writel
Lloh48:
	adrp	x8, _AFI_FPCI_BAR5@GOTPAGE
Lloh49:
	ldr	x8, [x8, _AFI_FPCI_BAR5@GOTPAGEOFF]
Lloh50:
	ldr	w2, [x8]
	mov	x0, x19
	mov	w1, #0
	bl	_afi_writel
	ldr	x8, [x19]
	ldr	x8, [x8]
	cbz	x8, LBB0_2
; %bb.1:
Lloh51:
	adrp	x8, _AFI_CACHE_BAR0_ST@GOTPAGE
Lloh52:
	ldr	x8, [x8, _AFI_CACHE_BAR0_ST@GOTPAGEOFF]
Lloh53:
	ldr	w2, [x8]
	mov	x0, x19
	mov	w1, #0
	bl	_afi_writel
Lloh54:
	adrp	x8, _AFI_CACHE_BAR0_SZ@GOTPAGE
Lloh55:
	ldr	x8, [x8, _AFI_CACHE_BAR0_SZ@GOTPAGEOFF]
Lloh56:
	ldr	w2, [x8]
	mov	x0, x19
	mov	w1, #0
	bl	_afi_writel
Lloh57:
	adrp	x8, _AFI_CACHE_BAR1_ST@GOTPAGE
Lloh58:
	ldr	x8, [x8, _AFI_CACHE_BAR1_ST@GOTPAGEOFF]
Lloh59:
	ldr	w2, [x8]
	mov	x0, x19
	mov	w1, #0
	bl	_afi_writel
Lloh60:
	adrp	x8, _AFI_CACHE_BAR1_SZ@GOTPAGE
Lloh61:
	ldr	x8, [x8, _AFI_CACHE_BAR1_SZ@GOTPAGEOFF]
Lloh62:
	ldr	w2, [x8]
	mov	x0, x19
	mov	w1, #0
	bl	_afi_writel
LBB0_2:
Lloh63:
	adrp	x8, _AFI_MSI_FPCI_BAR_ST@GOTPAGE
Lloh64:
	ldr	x8, [x8, _AFI_MSI_FPCI_BAR_ST@GOTPAGEOFF]
Lloh65:
	ldr	w2, [x8]
	mov	x0, x19
	mov	w1, #0
	bl	_afi_writel
Lloh66:
	adrp	x20, _AFI_MSI_BAR_SZ@GOTPAGE
Lloh67:
	ldr	x20, [x20, _AFI_MSI_BAR_SZ@GOTPAGEOFF]
	ldr	w2, [x20]
	mov	x0, x19
	mov	w1, #0
	bl	_afi_writel
Lloh68:
	adrp	x8, _AFI_MSI_AXI_BAR_ST@GOTPAGE
Lloh69:
	ldr	x8, [x8, _AFI_MSI_AXI_BAR_ST@GOTPAGEOFF]
Lloh70:
	ldr	w2, [x8]
	mov	x0, x19
	mov	w1, #0
	bl	_afi_writel
	ldr	w2, [x20]
	mov	x0, x19
	mov	w1, #0
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	_afi_writel
	.loh AdrpLdrGotLdr	Lloh48, Lloh49, Lloh50
	.loh AdrpLdrGotLdr	Lloh45, Lloh46, Lloh47
	.loh AdrpLdrGotLdr	Lloh42, Lloh43, Lloh44
	.loh AdrpLdrGotLdr	Lloh39, Lloh40, Lloh41
	.loh AdrpLdrGotLdr	Lloh36, Lloh37, Lloh38
	.loh AdrpLdrGotLdr	Lloh33, Lloh34, Lloh35
	.loh AdrpLdrGotLdr	Lloh30, Lloh31, Lloh32
	.loh AdrpLdrGotLdr	Lloh27, Lloh28, Lloh29
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh60, Lloh61, Lloh62
	.loh AdrpLdrGotLdr	Lloh57, Lloh58, Lloh59
	.loh AdrpLdrGotLdr	Lloh54, Lloh55, Lloh56
	.loh AdrpLdrGotLdr	Lloh51, Lloh52, Lloh53
	.loh AdrpLdrGotLdr	Lloh68, Lloh69, Lloh70
	.loh AdrpLdrGot	Lloh66, Lloh67
	.loh AdrpLdrGotLdr	Lloh63, Lloh64, Lloh65
	.cfi_endproc
                                        ; -- End function
	.comm	_AFI_AXI_BAR0_START,4,2         ; @AFI_AXI_BAR0_START
	.comm	_AFI_AXI_BAR0_SZ,4,2            ; @AFI_AXI_BAR0_SZ
	.comm	_AFI_AXI_BAR1_START,4,2         ; @AFI_AXI_BAR1_START
	.comm	_AFI_AXI_BAR1_SZ,4,2            ; @AFI_AXI_BAR1_SZ
	.comm	_AFI_FPCI_BAR1,4,2              ; @AFI_FPCI_BAR1
	.comm	_AFI_AXI_BAR2_START,4,2         ; @AFI_AXI_BAR2_START
	.comm	_AFI_AXI_BAR2_SZ,4,2            ; @AFI_AXI_BAR2_SZ
	.comm	_AFI_FPCI_BAR2,4,2              ; @AFI_FPCI_BAR2
	.comm	_AFI_AXI_BAR3_START,4,2         ; @AFI_AXI_BAR3_START
	.comm	_AFI_AXI_BAR3_SZ,4,2            ; @AFI_AXI_BAR3_SZ
	.comm	_AFI_FPCI_BAR3,4,2              ; @AFI_FPCI_BAR3
	.comm	_AFI_AXI_BAR4_START,4,2         ; @AFI_AXI_BAR4_START
	.comm	_AFI_AXI_BAR4_SZ,4,2            ; @AFI_AXI_BAR4_SZ
	.comm	_AFI_FPCI_BAR4,4,2              ; @AFI_FPCI_BAR4
	.comm	_AFI_AXI_BAR5_START,4,2         ; @AFI_AXI_BAR5_START
	.comm	_AFI_AXI_BAR5_SZ,4,2            ; @AFI_AXI_BAR5_SZ
	.comm	_AFI_FPCI_BAR5,4,2              ; @AFI_FPCI_BAR5
	.comm	_AFI_CACHE_BAR0_ST,4,2          ; @AFI_CACHE_BAR0_ST
	.comm	_AFI_CACHE_BAR0_SZ,4,2          ; @AFI_CACHE_BAR0_SZ
	.comm	_AFI_CACHE_BAR1_ST,4,2          ; @AFI_CACHE_BAR1_ST
	.comm	_AFI_CACHE_BAR1_SZ,4,2          ; @AFI_CACHE_BAR1_SZ
	.comm	_AFI_MSI_FPCI_BAR_ST,4,2        ; @AFI_MSI_FPCI_BAR_ST
	.comm	_AFI_MSI_BAR_SZ,4,2             ; @AFI_MSI_BAR_SZ
	.comm	_AFI_MSI_AXI_BAR_ST,4,2         ; @AFI_MSI_AXI_BAR_ST
	.no_dead_strip	_tegra_pcie_setup_translations
.subsections_via_symbols
