	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function iwl_pcie_rx_mq_hw_init
_iwl_pcie_rx_mq_hw_init:                ## @iwl_pcie_rx_mq_hw_init
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$24, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r12
	callq	_IWL_TRANS_GET_PCIE_TRANS
	movq	%rax, %r14
	movl	(%rax), %eax
	addl	$-128, %eax
	cmpl	$4, %eax
	jae	LBB0_1
## %bb.2:
	cltq
	leaq	l_switch.table.iwl_pcie_rx_mq_hw_init(%rip), %rcx
	movq	(%rcx,%rax,8), %rax
	jmp	LBB0_3
LBB0_1:
	movl	$1, %edi
	callq	_WARN_ON
	movq	_RFH_RXF_DMA_RB_SIZE_4K@GOTPCREL(%rip), %rax
LBB0_3:
	movl	(%rax), %ebx
	leaq	-64(%rbp), %rsi
	movq	%r12, %rdi
	callq	_iwl_trans_grab_nic_access
	testl	%eax, %eax
	je	LBB0_11
## %bb.4:
	movl	%ebx, -44(%rbp)                 ## 4-byte Spill
	movq	_RFH_RXF_DMA_CFG@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, -56(%rbp)                 ## 8-byte Spill
	xorl	%ebx, %ebx
	movq	%r12, %rdi
	xorl	%edx, %edx
	callq	_iwl_write_prph_no_grab
	movq	_RFH_RXF_RXQ_ACTIVE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r12, %rdi
	xorl	%edx, %edx
	callq	_iwl_write_prph_no_grab
	cmpl	$0, (%r12)
	jle	LBB0_7
## %bb.5:
	xorl	%r15d, %r15d
	xorl	%r13d, %r13d
	xorl	%r14d, %r14d
	.p2align	4, 0x90
LBB0_6:                                 ## =>This Inner Loop Header: Depth=1
	movl	%r13d, %edi
	callq	_RFH_Q_FRBDCB_BA_LSB
	movq	-56(%rbp), %rbx                 ## 8-byte Reload
	movq	8(%rbx), %rcx
	movl	8(%rcx,%r15), %edx
	movq	%r12, %rdi
	movl	%eax, %esi
	callq	_iwl_write_prph64_no_grab
	movl	%r13d, %edi
	callq	_RFH_Q_URBDCB_BA_LSB
	movq	8(%rbx), %rcx
	movl	4(%rcx,%r15), %edx
	movq	%r12, %rdi
	movl	%eax, %esi
	callq	_iwl_write_prph64_no_grab
	movl	%r13d, %edi
	callq	_RFH_Q_URBD_STTS_WPTR_LSB
	movq	8(%rbx), %rcx
	movl	(%rcx,%r15), %edx
	movq	%r12, %rdi
	movl	%eax, %esi
	callq	_iwl_write_prph64_no_grab
	movl	%r13d, %edi
	callq	_RFH_Q_FRBDCB_WIDX
	movq	%r12, %rdi
	movl	%eax, %esi
	xorl	%edx, %edx
	callq	_iwl_write_prph_no_grab
	movl	%r13d, %edi
	callq	_RFH_Q_FRBDCB_RIDX
	movq	%r12, %rdi
	movl	%eax, %esi
	xorl	%edx, %edx
	callq	_iwl_write_prph_no_grab
	movl	%r13d, %edi
	callq	_RFH_Q_URBDCB_WIDX
	movq	%r12, %rdi
	movl	%eax, %esi
	xorl	%edx, %edx
	callq	_iwl_write_prph_no_grab
	movl	%r13d, %edi
	callq	_BIT
	movl	%eax, %ebx
	leal	16(%r13), %edi
	callq	_BIT
	orl	%r14d, %ebx
	orl	%eax, %ebx
	incq	%r13
	movslq	(%r12), %rax
	addq	$12, %r15
	movl	%ebx, %r14d
	cmpq	%rax, %r13
	jl	LBB0_6
LBB0_7:
	movq	_RFH_DMA_EN_ENABLE_VAL@GOTPCREL(%rip), %rax
	movl	-44(%rbp), %edx                 ## 4-byte Reload
	orl	(%rax), %edx
	movq	_RFH_RXF_DMA_MIN_RB_4_8@GOTPCREL(%rip), %rax
	orl	(%rax), %edx
	movq	_RFH_RXF_DMA_DROP_TOO_LARGE_MASK@GOTPCREL(%rip), %rax
	orl	(%rax), %edx
	movq	_RFH_RXF_DMA_CFG@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_RFH_RXF_DMA_RBDCB_SIZE_512@GOTPCREL(%rip), %rax
	orl	(%rax), %edx
	movq	%r12, %rdi
	callq	_iwl_write_prph_no_grab
	movq	_RFH_GEN_CFG@GOTPCREL(%rip), %rax
	movl	(%rax), %r14d
	movq	_RFH_GEN_CFG_RFH_DMA_SNOOP@GOTPCREL(%rip), %rax
	movl	(%rax), %r13d
	movq	_DEFAULT_RXQ_NUM@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	xorl	%esi, %esi
	callq	_RFH_GEN_CFG_VAL
	movl	%eax, %r15d
	orl	%r13d, %r15d
	movq	_RFH_GEN_CFG_SERVICE_DMA_SNOOP@GOTPCREL(%rip), %rax
	orl	(%rax), %r15d
	movq	_RB_CHUNK_SIZE@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	8(%r12), %rax
	cmpq	$0, (%rax)
	jne	LBB0_8
## %bb.9:
	movq	_RFH_GEN_CFG_RB_CHUNK_SIZE_128@GOTPCREL(%rip), %rax
	jmp	LBB0_10
LBB0_8:
	movq	_RFH_GEN_CFG_RB_CHUNK_SIZE_64@GOTPCREL(%rip), %rax
LBB0_10:
	movl	(%rax), %esi
	callq	_RFH_GEN_CFG_VAL
	orl	%eax, %r15d
	movq	%r12, %rdi
	movl	%r14d, %esi
	movl	%r15d, %edx
	callq	_iwl_write_prph_no_grab
	movq	_RFH_RXF_RXQ_ACTIVE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r12, %rdi
	movl	%ebx, %edx
	callq	_iwl_write_prph_no_grab
	leaq	-64(%rbp), %rsi
	movq	%r12, %rdi
	callq	_iwl_trans_release_nic_access
	movq	_CSR_INT_COALESCING@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_IWL_HOST_INT_TIMEOUT_DEF@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r12, %rdi
	callq	_iwl_write8
LBB0_11:
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_RFH_RXF_DMA_RB_SIZE_2K,4,2     ## @RFH_RXF_DMA_RB_SIZE_2K
	.comm	_RFH_RXF_DMA_RB_SIZE_4K,4,2     ## @RFH_RXF_DMA_RB_SIZE_4K
	.comm	_RFH_RXF_DMA_RB_SIZE_8K,4,2     ## @RFH_RXF_DMA_RB_SIZE_8K
	.comm	_RFH_RXF_DMA_RB_SIZE_12K,4,2    ## @RFH_RXF_DMA_RB_SIZE_12K
	.comm	_RFH_RXF_DMA_CFG,4,2            ## @RFH_RXF_DMA_CFG
	.comm	_RFH_RXF_RXQ_ACTIVE,4,2         ## @RFH_RXF_RXQ_ACTIVE
	.comm	_RFH_DMA_EN_ENABLE_VAL,4,2      ## @RFH_DMA_EN_ENABLE_VAL
	.comm	_RFH_RXF_DMA_MIN_RB_4_8,4,2     ## @RFH_RXF_DMA_MIN_RB_4_8
	.comm	_RFH_RXF_DMA_DROP_TOO_LARGE_MASK,4,2 ## @RFH_RXF_DMA_DROP_TOO_LARGE_MASK
	.comm	_RFH_RXF_DMA_RBDCB_SIZE_512,4,2 ## @RFH_RXF_DMA_RBDCB_SIZE_512
	.comm	_RFH_GEN_CFG,4,2                ## @RFH_GEN_CFG
	.comm	_RFH_GEN_CFG_RFH_DMA_SNOOP,4,2  ## @RFH_GEN_CFG_RFH_DMA_SNOOP
	.comm	_DEFAULT_RXQ_NUM,4,2            ## @DEFAULT_RXQ_NUM
	.comm	_RFH_GEN_CFG_SERVICE_DMA_SNOOP,4,2 ## @RFH_GEN_CFG_SERVICE_DMA_SNOOP
	.comm	_RB_CHUNK_SIZE,4,2              ## @RB_CHUNK_SIZE
	.comm	_RFH_GEN_CFG_RB_CHUNK_SIZE_64,4,2 ## @RFH_GEN_CFG_RB_CHUNK_SIZE_64
	.comm	_RFH_GEN_CFG_RB_CHUNK_SIZE_128,4,2 ## @RFH_GEN_CFG_RB_CHUNK_SIZE_128
	.comm	_CSR_INT_COALESCING,4,2         ## @CSR_INT_COALESCING
	.comm	_IWL_HOST_INT_TIMEOUT_DEF,4,2   ## @IWL_HOST_INT_TIMEOUT_DEF
	.no_dead_strip	_iwl_pcie_rx_mq_hw_init
	.section	__DATA,__const
	.p2align	3                               ## @switch.table.iwl_pcie_rx_mq_hw_init
l_switch.table.iwl_pcie_rx_mq_hw_init:
	.quad	_RFH_RXF_DMA_RB_SIZE_8K
	.quad	_RFH_RXF_DMA_RB_SIZE_4K
	.quad	_RFH_RXF_DMA_RB_SIZE_2K
	.quad	_RFH_RXF_DMA_RB_SIZE_12K

.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function iwl_pcie_rx_mq_hw_init
_iwl_pcie_rx_mq_hw_init:                ; @iwl_pcie_rx_mq_hw_init
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #112
	.cfi_def_cfa_offset 112
	stp	x28, x27, [sp, #16]             ; 16-byte Folded Spill
	stp	x26, x25, [sp, #32]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #48]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #64]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #80]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #96]             ; 16-byte Folded Spill
	add	x29, sp, #96
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	mov	x19, x0
	bl	_IWL_TRANS_GET_PCIE_TRANS
	mov	x21, x0
	ldr	w8, [x0]
	sub	w8, w8, #128
	cmp	w8, #4
	b.hs	LBB0_2
; %bb.1:
Lloh0:
	adrp	x9, l_switch.table.iwl_pcie_rx_mq_hw_init@PAGE
Lloh1:
	add	x9, x9, l_switch.table.iwl_pcie_rx_mq_hw_init@PAGEOFF
	ldr	x8, [x9, w8, sxtw #3]
	b	LBB0_3
LBB0_2:
	mov	w0, #1
	bl	_WARN_ON
Lloh2:
	adrp	x8, _RFH_RXF_DMA_RB_SIZE_4K@GOTPAGE
Lloh3:
	ldr	x8, [x8, _RFH_RXF_DMA_RB_SIZE_4K@GOTPAGEOFF]
LBB0_3:
	ldr	w25, [x8]
	add	x1, sp, #8
	mov	x0, x19
	bl	_iwl_trans_grab_nic_access
	cbz	w0, LBB0_9
; %bb.4:
Lloh4:
	adrp	x26, _RFH_RXF_DMA_CFG@GOTPAGE
Lloh5:
	ldr	x26, [x26, _RFH_RXF_DMA_CFG@GOTPAGEOFF]
	ldr	w1, [x26]
	mov	x0, x19
	mov	w2, #0
	bl	_iwl_write_prph_no_grab
Lloh6:
	adrp	x24, _RFH_RXF_RXQ_ACTIVE@GOTPAGE
Lloh7:
	ldr	x24, [x24, _RFH_RXF_RXQ_ACTIVE@GOTPAGEOFF]
	ldr	w1, [x24]
	mov	x0, x19
	mov	w2, #0
	bl	_iwl_write_prph_no_grab
	ldr	w8, [x19]
	cmp	w8, #1
	b.lt	LBB0_7
; %bb.5:
	mov	x27, #0
	mov	x22, #0
	mov	w20, #0
LBB0_6:                                 ; =>This Inner Loop Header: Depth=1
	mov	x0, x22
	bl	_RFH_Q_FRBDCB_BA_LSB
	mov	x1, x0
	ldr	x8, [x21, #8]
	add	x8, x8, x27
	ldr	w2, [x8, #8]
	mov	x0, x19
	bl	_iwl_write_prph64_no_grab
	mov	x0, x22
	bl	_RFH_Q_URBDCB_BA_LSB
	mov	x1, x0
	ldr	x8, [x21, #8]
	add	x8, x8, x27
	ldr	w2, [x8, #4]
	mov	x0, x19
	bl	_iwl_write_prph64_no_grab
	mov	x0, x22
	bl	_RFH_Q_URBD_STTS_WPTR_LSB
	mov	x1, x0
	ldr	x8, [x21, #8]
	ldr	w2, [x8, x27]
	mov	x0, x19
	bl	_iwl_write_prph64_no_grab
	mov	x0, x22
	bl	_RFH_Q_FRBDCB_WIDX
	mov	x1, x0
	mov	x0, x19
	mov	w2, #0
	bl	_iwl_write_prph_no_grab
	mov	x0, x22
	bl	_RFH_Q_FRBDCB_RIDX
	mov	x1, x0
	mov	x0, x19
	mov	w2, #0
	bl	_iwl_write_prph_no_grab
	mov	x0, x22
	bl	_RFH_Q_URBDCB_WIDX
	mov	x1, x0
	mov	x0, x19
	mov	w2, #0
	bl	_iwl_write_prph_no_grab
	mov	x0, x22
	bl	_BIT
	mov	x23, x0
	add	w0, w22, #16
	bl	_BIT
	orr	w8, w23, w20
	orr	w20, w8, w0
	add	x22, x22, #1
	ldrsw	x8, [x19]
	add	x27, x27, #12
	cmp	x22, x8
	b.lt	LBB0_6
	b	LBB0_8
LBB0_7:
	mov	w20, #0
LBB0_8:
	ldr	w1, [x26]
Lloh8:
	adrp	x8, _RFH_DMA_EN_ENABLE_VAL@GOTPAGE
Lloh9:
	ldr	x8, [x8, _RFH_DMA_EN_ENABLE_VAL@GOTPAGEOFF]
Lloh10:
	ldr	w8, [x8]
	orr	w8, w8, w25
Lloh11:
	adrp	x9, _RFH_RXF_DMA_MIN_RB_4_8@GOTPAGE
Lloh12:
	ldr	x9, [x9, _RFH_RXF_DMA_MIN_RB_4_8@GOTPAGEOFF]
Lloh13:
	ldr	w9, [x9]
	orr	w8, w8, w9
Lloh14:
	adrp	x9, _RFH_RXF_DMA_DROP_TOO_LARGE_MASK@GOTPAGE
Lloh15:
	ldr	x9, [x9, _RFH_RXF_DMA_DROP_TOO_LARGE_MASK@GOTPAGEOFF]
Lloh16:
	ldr	w9, [x9]
	orr	w8, w8, w9
Lloh17:
	adrp	x9, _RFH_RXF_DMA_RBDCB_SIZE_512@GOTPAGE
Lloh18:
	ldr	x9, [x9, _RFH_RXF_DMA_RBDCB_SIZE_512@GOTPAGEOFF]
Lloh19:
	ldr	w9, [x9]
	orr	w2, w8, w9
	mov	x0, x19
	bl	_iwl_write_prph_no_grab
Lloh20:
	adrp	x8, _RFH_GEN_CFG@GOTPAGE
Lloh21:
	ldr	x8, [x8, _RFH_GEN_CFG@GOTPAGEOFF]
Lloh22:
	ldr	w21, [x8]
Lloh23:
	adrp	x8, _RFH_GEN_CFG_RFH_DMA_SNOOP@GOTPAGE
Lloh24:
	ldr	x8, [x8, _RFH_GEN_CFG_RFH_DMA_SNOOP@GOTPAGEOFF]
Lloh25:
	ldr	w22, [x8]
Lloh26:
	adrp	x8, _DEFAULT_RXQ_NUM@GOTPAGE
Lloh27:
	ldr	x8, [x8, _DEFAULT_RXQ_NUM@GOTPAGEOFF]
Lloh28:
	ldr	w0, [x8]
	mov	w1, #0
	bl	_RFH_GEN_CFG_VAL
	orr	w8, w0, w22
Lloh29:
	adrp	x9, _RFH_GEN_CFG_SERVICE_DMA_SNOOP@GOTPAGE
Lloh30:
	ldr	x9, [x9, _RFH_GEN_CFG_SERVICE_DMA_SNOOP@GOTPAGEOFF]
Lloh31:
	ldr	w9, [x9]
	orr	w22, w8, w9
Lloh32:
	adrp	x8, _RB_CHUNK_SIZE@GOTPAGE
Lloh33:
	ldr	x8, [x8, _RB_CHUNK_SIZE@GOTPAGEOFF]
Lloh34:
	ldr	w0, [x8]
	ldr	x8, [x19, #8]
Lloh35:
	adrp	x9, _RFH_GEN_CFG_RB_CHUNK_SIZE_64@GOTPAGE
Lloh36:
	ldr	x9, [x9, _RFH_GEN_CFG_RB_CHUNK_SIZE_64@GOTPAGEOFF]
	ldr	x8, [x8]
Lloh37:
	adrp	x10, _RFH_GEN_CFG_RB_CHUNK_SIZE_128@GOTPAGE
Lloh38:
	ldr	x10, [x10, _RFH_GEN_CFG_RB_CHUNK_SIZE_128@GOTPAGEOFF]
	cmp	x8, #0
	csel	x8, x10, x9, eq
	ldr	w1, [x8]
	bl	_RFH_GEN_CFG_VAL
	orr	w2, w22, w0
	mov	x0, x19
	mov	x1, x21
	bl	_iwl_write_prph_no_grab
	ldr	w1, [x24]
	mov	x0, x19
	mov	x2, x20
	bl	_iwl_write_prph_no_grab
	add	x1, sp, #8
	mov	x0, x19
	bl	_iwl_trans_release_nic_access
Lloh39:
	adrp	x8, _CSR_INT_COALESCING@GOTPAGE
Lloh40:
	ldr	x8, [x8, _CSR_INT_COALESCING@GOTPAGEOFF]
Lloh41:
	ldr	w1, [x8]
Lloh42:
	adrp	x8, _IWL_HOST_INT_TIMEOUT_DEF@GOTPAGE
Lloh43:
	ldr	x8, [x8, _IWL_HOST_INT_TIMEOUT_DEF@GOTPAGEOFF]
Lloh44:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_iwl_write8
LBB0_9:
	ldp	x29, x30, [sp, #96]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #80]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #64]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #48]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #32]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #112
	ret
	.loh AdrpAdd	Lloh0, Lloh1
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpLdrGot	Lloh6, Lloh7
	.loh AdrpLdrGot	Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh42, Lloh43, Lloh44
	.loh AdrpLdrGotLdr	Lloh39, Lloh40, Lloh41
	.loh AdrpLdrGot	Lloh37, Lloh38
	.loh AdrpLdrGot	Lloh35, Lloh36
	.loh AdrpLdrGotLdr	Lloh32, Lloh33, Lloh34
	.loh AdrpLdrGotLdr	Lloh29, Lloh30, Lloh31
	.loh AdrpLdrGotLdr	Lloh26, Lloh27, Lloh28
	.loh AdrpLdrGotLdr	Lloh23, Lloh24, Lloh25
	.loh AdrpLdrGotLdr	Lloh20, Lloh21, Lloh22
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh19
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh16
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.cfi_endproc
                                        ; -- End function
	.comm	_RFH_RXF_DMA_RB_SIZE_2K,4,2     ; @RFH_RXF_DMA_RB_SIZE_2K
	.comm	_RFH_RXF_DMA_RB_SIZE_4K,4,2     ; @RFH_RXF_DMA_RB_SIZE_4K
	.comm	_RFH_RXF_DMA_RB_SIZE_8K,4,2     ; @RFH_RXF_DMA_RB_SIZE_8K
	.comm	_RFH_RXF_DMA_RB_SIZE_12K,4,2    ; @RFH_RXF_DMA_RB_SIZE_12K
	.comm	_RFH_RXF_DMA_CFG,4,2            ; @RFH_RXF_DMA_CFG
	.comm	_RFH_RXF_RXQ_ACTIVE,4,2         ; @RFH_RXF_RXQ_ACTIVE
	.comm	_RFH_DMA_EN_ENABLE_VAL,4,2      ; @RFH_DMA_EN_ENABLE_VAL
	.comm	_RFH_RXF_DMA_MIN_RB_4_8,4,2     ; @RFH_RXF_DMA_MIN_RB_4_8
	.comm	_RFH_RXF_DMA_DROP_TOO_LARGE_MASK,4,2 ; @RFH_RXF_DMA_DROP_TOO_LARGE_MASK
	.comm	_RFH_RXF_DMA_RBDCB_SIZE_512,4,2 ; @RFH_RXF_DMA_RBDCB_SIZE_512
	.comm	_RFH_GEN_CFG,4,2                ; @RFH_GEN_CFG
	.comm	_RFH_GEN_CFG_RFH_DMA_SNOOP,4,2  ; @RFH_GEN_CFG_RFH_DMA_SNOOP
	.comm	_DEFAULT_RXQ_NUM,4,2            ; @DEFAULT_RXQ_NUM
	.comm	_RFH_GEN_CFG_SERVICE_DMA_SNOOP,4,2 ; @RFH_GEN_CFG_SERVICE_DMA_SNOOP
	.comm	_RB_CHUNK_SIZE,4,2              ; @RB_CHUNK_SIZE
	.comm	_RFH_GEN_CFG_RB_CHUNK_SIZE_64,4,2 ; @RFH_GEN_CFG_RB_CHUNK_SIZE_64
	.comm	_RFH_GEN_CFG_RB_CHUNK_SIZE_128,4,2 ; @RFH_GEN_CFG_RB_CHUNK_SIZE_128
	.comm	_CSR_INT_COALESCING,4,2         ; @CSR_INT_COALESCING
	.comm	_IWL_HOST_INT_TIMEOUT_DEF,4,2   ; @IWL_HOST_INT_TIMEOUT_DEF
	.no_dead_strip	_iwl_pcie_rx_mq_hw_init
	.section	__DATA,__const
	.p2align	3                               ; @switch.table.iwl_pcie_rx_mq_hw_init
l_switch.table.iwl_pcie_rx_mq_hw_init:
	.quad	_RFH_RXF_DMA_RB_SIZE_8K
	.quad	_RFH_RXF_DMA_RB_SIZE_4K
	.quad	_RFH_RXF_DMA_RB_SIZE_2K
	.quad	_RFH_RXF_DMA_RB_SIZE_12K

.subsections_via_symbols
