	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function mvpp2_interrupts_unmask
_mvpp2_interrupts_unmask:               ## @mvpp2_interrupts_unmask
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r14
	xorl	%eax, %eax
	callq	_smp_processor_id
	movq	8(%r14), %rcx
	cmpq	(%rcx), %rax
	jle	LBB0_1
## %bb.4:
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_1:
	movq	_MVPP2_CAUSE_MISC_SUM_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %r15d
	movl	8(%rcx), %edi
	callq	_MVPP2_CAUSE_RXQ_OCCUP_DESC_ALL_MASK
	movl	%eax, %ebx
	orl	%r15d, %ebx
	cmpq	$0, 16(%r14)
	movl	$0, %eax
	je	LBB0_3
## %bb.2:
	movq	_MVPP2_CAUSE_TXQ_OCCUP_DESC_ALL_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
LBB0_3:
	orl	%eax, %ebx
	movq	8(%r14), %r15
	xorl	%eax, %eax
	callq	_smp_processor_id
	movq	%r15, %rdi
	movq	%rax, %rsi
	callq	_mvpp2_cpu_to_thread
	movl	%eax, %r12d
	movl	(%r14), %edi
	callq	_MVPP2_ISR_RX_TX_MASK_REG
	movq	%r15, %rdi
	movl	%r12d, %esi
	movl	%eax, %edx
	movl	%ebx, %ecx
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_mvpp2_thread_write             ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_MVPP2_CAUSE_MISC_SUM_MASK,4,2  ## @MVPP2_CAUSE_MISC_SUM_MASK
	.comm	_MVPP2_CAUSE_TXQ_OCCUP_DESC_ALL_MASK,4,2 ## @MVPP2_CAUSE_TXQ_OCCUP_DESC_ALL_MASK
	.no_dead_strip	_mvpp2_interrupts_unmask
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function mvpp2_interrupts_unmask
_mvpp2_interrupts_unmask:               ; @mvpp2_interrupts_unmask
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x0
	bl	_smp_processor_id
	ldr	x8, [x19, #8]
	ldr	x9, [x8]
	cmp	x0, x9
	b.le	LBB0_2
; %bb.1:
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
LBB0_2:
Lloh0:
	adrp	x9, _MVPP2_CAUSE_MISC_SUM_MASK@GOTPAGE
Lloh1:
	ldr	x9, [x9, _MVPP2_CAUSE_MISC_SUM_MASK@GOTPAGEOFF]
Lloh2:
	ldr	w20, [x9]
	ldr	w0, [x8, #8]
	bl	_MVPP2_CAUSE_RXQ_OCCUP_DESC_ALL_MASK
	orr	w8, w0, w20
Lloh3:
	adrp	x9, _MVPP2_CAUSE_TXQ_OCCUP_DESC_ALL_MASK@GOTPAGE
Lloh4:
	ldr	x9, [x9, _MVPP2_CAUSE_TXQ_OCCUP_DESC_ALL_MASK@GOTPAGEOFF]
Lloh5:
	ldr	w9, [x9]
	ldp	x20, x10, [x19, #8]
	cmp	x10, #0
	csel	w9, wzr, w9, eq
	orr	w21, w8, w9
	bl	_smp_processor_id
	mov	x1, x0
	mov	x0, x20
	bl	_mvpp2_cpu_to_thread
	mov	x22, x0
	ldr	w0, [x19]
	bl	_MVPP2_ISR_RX_TX_MASK_REG
	mov	x2, x0
	mov	x0, x20
	mov	x1, x22
	mov	x3, x21
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	_mvpp2_thread_write
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_MVPP2_CAUSE_MISC_SUM_MASK,4,2  ; @MVPP2_CAUSE_MISC_SUM_MASK
	.comm	_MVPP2_CAUSE_TXQ_OCCUP_DESC_ALL_MASK,4,2 ; @MVPP2_CAUSE_TXQ_OCCUP_DESC_ALL_MASK
	.no_dead_strip	_mvpp2_interrupts_unmask
.subsections_via_symbols
