	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function hclge_tm_port_shaper_cfg
_hclge_tm_port_shaper_cfg:              ## @hclge_tm_port_shaper_cfg
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	subq	$24, %rsp
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %rbx
	movl	(%rdi), %edi
	movq	_HCLGE_SHAPER_LVL_PORT@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	leaq	-32(%rbp), %rdx
	leaq	-36(%rbp), %rcx
	leaq	-28(%rbp), %r8
	callq	_hclge_shaper_para_calc
	testl	%eax, %eax
	jne	LBB0_2
## %bb.1:
	movq	_HCLGE_OPC_TM_PORT_SHAPPING@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	leaq	-48(%rbp), %r14
	movq	%r14, %rdi
	xorl	%edx, %edx
	callq	_hclge_cmd_setup_basic_desc
	movq	-48(%rbp), %r15
	movl	-32(%rbp), %edi
	movl	-36(%rbp), %esi
	movl	-28(%rbp), %edx
	movq	_HCLGE_SHAPER_BS_U_DEF@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movq	_HCLGE_SHAPER_BS_S_DEF@GOTPCREL(%rip), %rax
	movl	(%rax), %r8d
	callq	_hclge_tm_get_shapping_para
	movl	%eax, %edi
	callq	_cpu_to_le32
	movl	%eax, (%r15)
	movq	%rbx, %rdi
	movq	%r14, %rsi
	movl	$1, %edx
	callq	_hclge_cmd_send
LBB0_2:
	addq	$24, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_HCLGE_SHAPER_LVL_PORT,4,2      ## @HCLGE_SHAPER_LVL_PORT
	.comm	_HCLGE_OPC_TM_PORT_SHAPPING,4,2 ## @HCLGE_OPC_TM_PORT_SHAPPING
	.comm	_HCLGE_SHAPER_BS_U_DEF,4,2      ## @HCLGE_SHAPER_BS_U_DEF
	.comm	_HCLGE_SHAPER_BS_S_DEF,4,2      ## @HCLGE_SHAPER_BS_S_DEF
	.no_dead_strip	_hclge_tm_port_shaper_cfg
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function hclge_tm_port_shaper_cfg
_hclge_tm_port_shaper_cfg:              ; @hclge_tm_port_shaper_cfg
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #64
	.cfi_def_cfa_offset 64
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x19, x0
	ldr	w0, [x0]
Lloh0:
	adrp	x8, _HCLGE_SHAPER_LVL_PORT@GOTPAGE
Lloh1:
	ldr	x8, [x8, _HCLGE_SHAPER_LVL_PORT@GOTPAGEOFF]
Lloh2:
	ldr	w1, [x8]
	add	x2, sp, #16
	add	x3, sp, #20
	add	x4, sp, #12
	bl	_hclge_shaper_para_calc
	cbnz	w0, LBB0_2
; %bb.1:
Lloh3:
	adrp	x8, _HCLGE_OPC_TM_PORT_SHAPPING@GOTPAGE
Lloh4:
	ldr	x8, [x8, _HCLGE_OPC_TM_PORT_SHAPPING@GOTPAGEOFF]
Lloh5:
	ldr	w1, [x8]
	add	x0, sp, #24
	mov	w2, #0
	bl	_hclge_cmd_setup_basic_desc
	ldr	x20, [sp, #24]
	ldp	w0, w1, [sp, #16]
	ldr	w2, [sp, #12]
Lloh6:
	adrp	x8, _HCLGE_SHAPER_BS_U_DEF@GOTPAGE
Lloh7:
	ldr	x8, [x8, _HCLGE_SHAPER_BS_U_DEF@GOTPAGEOFF]
Lloh8:
	ldr	w3, [x8]
Lloh9:
	adrp	x8, _HCLGE_SHAPER_BS_S_DEF@GOTPAGE
Lloh10:
	ldr	x8, [x8, _HCLGE_SHAPER_BS_S_DEF@GOTPAGEOFF]
Lloh11:
	ldr	w4, [x8]
	bl	_hclge_tm_get_shapping_para
	bl	_cpu_to_le32
	str	w0, [x20]
	add	x1, sp, #24
	mov	x0, x19
	mov	w2, #1
	bl	_hclge_cmd_send
LBB0_2:
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	add	sp, sp, #64
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.cfi_endproc
                                        ; -- End function
	.comm	_HCLGE_SHAPER_LVL_PORT,4,2      ; @HCLGE_SHAPER_LVL_PORT
	.comm	_HCLGE_OPC_TM_PORT_SHAPPING,4,2 ; @HCLGE_OPC_TM_PORT_SHAPPING
	.comm	_HCLGE_SHAPER_BS_U_DEF,4,2      ; @HCLGE_SHAPER_BS_U_DEF
	.comm	_HCLGE_SHAPER_BS_S_DEF,4,2      ; @HCLGE_SHAPER_BS_S_DEF
	.no_dead_strip	_hclge_tm_port_shaper_cfg
.subsections_via_symbols
