	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function tegra_pcie_config_rp
_tegra_pcie_config_rp:                  ## @tegra_pcie_config_rp
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r15
	leaq	8(%rdi), %r12
	movq	16(%rdi), %r14
	movq	_CONFIG_PCI_MSI@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_IS_ENABLED
	testq	%rax, %rax
	je	LBB0_3
## %bb.1:
	movl	(%r14), %edi
	leaq	L_.str(%rip), %rsi
	callq	_of_irq_get_byname
	movl	%eax, (%r12)
	testl	%eax, %eax
	je	LBB0_2
LBB0_3:
	movq	%r14, %rdi
	callq	_pm_runtime_enable
	movq	%r14, %rdi
	callq	_pm_runtime_get_sync
	testl	%eax, %eax
	js	LBB0_4
## %bb.5:
	movq	%r14, %rdi
	callq	_pinctrl_pm_select_default_state
	movl	%eax, %ebx
	testl	%eax, %eax
	js	LBB0_6
## %bb.7:
	movq	%r15, %rdi
	callq	_tegra_pcie_init_controller
	movq	%r12, %rdi
	callq	_tegra_pcie_dw_link_up
	movl	%eax, 4(%r15)
	testl	%eax, %eax
	je	LBB0_8
## %bb.12:
	movq	_GFP_KERNEL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	(%r14), %ecx
	leaq	L_.str.4(%rip), %rdx
	movq	%r14, %rdi
	callq	_devm_kasprintf
	testq	%rax, %rax
	je	LBB0_13
## %bb.14:
	movq	%rax, %rdi
	xorl	%esi, %esi
	callq	_debugfs_create_dir
	movl	%eax, (%r15)
	testl	%eax, %eax
	je	LBB0_15
## %bb.16:
	movq	%r15, %rdi
	callq	_init_debugfs
	jmp	LBB0_17
LBB0_4:
	movl	%eax, %ebx
	leaq	L_.str.2(%rip), %rsi
	movq	%r14, %rdi
	movl	%eax, %edx
	xorl	%eax, %eax
	callq	_dev_err
	jmp	LBB0_11
LBB0_2:
	leaq	L_.str.1(%rip), %rsi
	xorl	%ebx, %ebx
	movq	%r14, %rdi
	xorl	%eax, %eax
	callq	_dev_err
	movq	_ENODEV@GOTPCREL(%rip), %rax
	subl	(%rax), %ebx
	jmp	LBB0_17
LBB0_6:
	leaq	L_.str.3(%rip), %rsi
	movq	%r14, %rdi
	movl	%ebx, %edx
	xorl	%eax, %eax
	callq	_dev_err
	jmp	LBB0_10
LBB0_8:
	movq	_ENOMEDIUM@GOTPCREL(%rip), %rax
	jmp	LBB0_9
LBB0_13:
	movq	_ENOMEM@GOTPCREL(%rip), %rax
LBB0_9:
	xorl	%ebx, %ebx
	subl	(%rax), %ebx
	movq	%r15, %rdi
	callq	_tegra_pcie_deinit_controller
LBB0_10:
	movq	%r14, %rdi
	callq	_pm_runtime_put_sync
LBB0_11:
	movq	%r14, %rdi
	callq	_pm_runtime_disable
LBB0_17:
	movl	%ebx, %eax
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_15:
	leaq	L_.str.5(%rip), %rsi
	movq	%r14, %rdi
	xorl	%eax, %eax
	callq	_dev_err
	jmp	LBB0_17
	.cfi_endproc
                                        ## -- End function
	.comm	_CONFIG_PCI_MSI,4,2             ## @CONFIG_PCI_MSI
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"msi"

L_.str.1:                               ## @.str.1
	.asciz	"Failed to get MSI interrupt\n"

	.comm	_ENODEV,4,2                     ## @ENODEV
L_.str.2:                               ## @.str.2
	.asciz	"Failed to get runtime sync for PCIe dev: %d\n"

L_.str.3:                               ## @.str.3
	.asciz	"Failed to configure sideband pins: %d\n"

	.comm	_ENOMEDIUM,4,2                  ## @ENOMEDIUM
	.comm	_GFP_KERNEL,4,2                 ## @GFP_KERNEL
L_.str.4:                               ## @.str.4
	.asciz	"%pOFP"

	.comm	_ENOMEM,4,2                     ## @ENOMEM
L_.str.5:                               ## @.str.5
	.asciz	"Failed to create debugfs\n"

	.no_dead_strip	_tegra_pcie_config_rp
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function tegra_pcie_config_rp
_tegra_pcie_config_rp:                  ; @tegra_pcie_config_rp
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #64
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x21, x0
	add	x22, x0, #8
	ldr	x19, [x0, #16]
Lloh0:
	adrp	x8, _CONFIG_PCI_MSI@GOTPAGE
Lloh1:
	ldr	x8, [x8, _CONFIG_PCI_MSI@GOTPAGEOFF]
Lloh2:
	ldr	w0, [x8]
	bl	_IS_ENABLED
	cbz	x0, LBB0_2
; %bb.1:
	ldr	w0, [x19]
Lloh3:
	adrp	x1, l_.str@PAGE
Lloh4:
	add	x1, x1, l_.str@PAGEOFF
	bl	_of_irq_get_byname
	str	w0, [x22]
	cbz	w0, LBB0_9
LBB0_2:
	mov	x0, x19
	bl	_pm_runtime_enable
	mov	x0, x19
	bl	_pm_runtime_get_sync
	tbnz	w0, #31, LBB0_8
; %bb.3:
	mov	x0, x19
	bl	_pinctrl_pm_select_default_state
	mov	x20, x0
	tbnz	w0, #31, LBB0_10
; %bb.4:
	mov	x0, x21
	bl	_tegra_pcie_init_controller
	mov	x0, x22
	bl	_tegra_pcie_dw_link_up
	str	w0, [x21, #4]
	cbz	w0, LBB0_11
; %bb.5:
Lloh5:
	adrp	x8, _GFP_KERNEL@GOTPAGE
Lloh6:
	ldr	x8, [x8, _GFP_KERNEL@GOTPAGEOFF]
Lloh7:
	ldr	w1, [x8]
	ldr	w3, [x19]
Lloh8:
	adrp	x2, l_.str.4@PAGE
Lloh9:
	add	x2, x2, l_.str.4@PAGEOFF
	mov	x0, x19
	bl	_devm_kasprintf
	cbz	x0, LBB0_12
; %bb.6:
	mov	x1, #0
	bl	_debugfs_create_dir
	str	w0, [x21]
	cbz	w0, LBB0_17
; %bb.7:
	mov	x0, x21
	bl	_init_debugfs
	b	LBB0_16
LBB0_8:
	mov	x20, x0
	str	x20, [sp]
Lloh10:
	adrp	x1, l_.str.2@PAGE
Lloh11:
	add	x1, x1, l_.str.2@PAGEOFF
	mov	x0, x19
	bl	_dev_err
	b	LBB0_15
LBB0_9:
Lloh12:
	adrp	x1, l_.str.1@PAGE
Lloh13:
	add	x1, x1, l_.str.1@PAGEOFF
	mov	x0, x19
	bl	_dev_err
Lloh14:
	adrp	x8, _ENODEV@GOTPAGE
Lloh15:
	ldr	x8, [x8, _ENODEV@GOTPAGEOFF]
Lloh16:
	ldr	w8, [x8]
	neg	w20, w8
	b	LBB0_16
LBB0_10:
	mov	x8, x20
	str	x8, [sp]
Lloh17:
	adrp	x1, l_.str.3@PAGE
Lloh18:
	add	x1, x1, l_.str.3@PAGEOFF
	mov	x0, x19
	bl	_dev_err
	b	LBB0_14
LBB0_11:
Lloh19:
	adrp	x8, _ENOMEDIUM@GOTPAGE
Lloh20:
	ldr	x8, [x8, _ENOMEDIUM@GOTPAGEOFF]
	b	LBB0_13
LBB0_12:
Lloh21:
	adrp	x8, _ENOMEM@GOTPAGE
Lloh22:
	ldr	x8, [x8, _ENOMEM@GOTPAGEOFF]
LBB0_13:
	ldr	w8, [x8]
	neg	w20, w8
	mov	x0, x21
	bl	_tegra_pcie_deinit_controller
LBB0_14:
	mov	x0, x19
	bl	_pm_runtime_put_sync
LBB0_15:
	mov	x0, x19
	bl	_pm_runtime_disable
LBB0_16:
	mov	x0, x20
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #64
	ret
LBB0_17:
Lloh23:
	adrp	x1, l_.str.5@PAGE
Lloh24:
	add	x1, x1, l_.str.5@PAGEOFF
	mov	x0, x19
	bl	_dev_err
	b	LBB0_16
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpAdd	Lloh3, Lloh4
	.loh AdrpAdd	Lloh8, Lloh9
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpAdd	Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh16
	.loh AdrpAdd	Lloh12, Lloh13
	.loh AdrpAdd	Lloh17, Lloh18
	.loh AdrpLdrGot	Lloh19, Lloh20
	.loh AdrpLdrGot	Lloh21, Lloh22
	.loh AdrpAdd	Lloh23, Lloh24
	.cfi_endproc
                                        ; -- End function
	.comm	_CONFIG_PCI_MSI,4,2             ; @CONFIG_PCI_MSI
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"msi"

l_.str.1:                               ; @.str.1
	.asciz	"Failed to get MSI interrupt\n"

	.comm	_ENODEV,4,2                     ; @ENODEV
l_.str.2:                               ; @.str.2
	.asciz	"Failed to get runtime sync for PCIe dev: %d\n"

l_.str.3:                               ; @.str.3
	.asciz	"Failed to configure sideband pins: %d\n"

	.comm	_ENOMEDIUM,4,2                  ; @ENOMEDIUM
	.comm	_GFP_KERNEL,4,2                 ; @GFP_KERNEL
l_.str.4:                               ; @.str.4
	.asciz	"%pOFP"

	.comm	_ENOMEM,4,2                     ; @ENOMEM
l_.str.5:                               ; @.str.5
	.asciz	"Failed to create debugfs\n"

	.no_dead_strip	_tegra_pcie_config_rp
.subsections_via_symbols
