	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function axienet_ethtools_get_regs
_axienet_ethtools_get_regs:             ## @axienet_ethtools_get_regs
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdx, %r14
	movq	%rsi, %r15
	movq	_AXIENET_REGS_N@GOTPCREL(%rip), %rax
	movslq	(%rax), %rbx
	shlq	$2, %rbx
	callq	_netdev_priv
	movq	%rax, %r12
	movq	$0, 8(%r15)
	movq	%rbx, (%r15)
	movq	%r14, %rdi
	xorl	%esi, %esi
	movq	%rbx, %rdx
	callq	_memset
	movq	_XAE_RAF_OFFSET@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r12, %rdi
	callq	_axienet_ior
	movl	%eax, (%r14)
	movq	_XAE_TPF_OFFSET@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r12, %rdi
	callq	_axienet_ior
	movl	%eax, 4(%r14)
	movq	_XAE_IFGP_OFFSET@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r12, %rdi
	callq	_axienet_ior
	movl	%eax, 8(%r14)
	movq	_XAE_IS_OFFSET@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r12, %rdi
	callq	_axienet_ior
	movl	%eax, 12(%r14)
	movq	_XAE_IP_OFFSET@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r12, %rdi
	callq	_axienet_ior
	movl	%eax, 16(%r14)
	movq	_XAE_IE_OFFSET@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r12, %rdi
	callq	_axienet_ior
	movl	%eax, 20(%r14)
	movq	_XAE_TTAG_OFFSET@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r12, %rdi
	callq	_axienet_ior
	movl	%eax, 24(%r14)
	movq	_XAE_RTAG_OFFSET@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r12, %rdi
	callq	_axienet_ior
	movl	%eax, 28(%r14)
	movq	_XAE_UAWL_OFFSET@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r12, %rdi
	callq	_axienet_ior
	movl	%eax, 32(%r14)
	movq	_XAE_UAWU_OFFSET@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r12, %rdi
	callq	_axienet_ior
	movl	%eax, 36(%r14)
	movq	_XAE_TPID0_OFFSET@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r12, %rdi
	callq	_axienet_ior
	movl	%eax, 40(%r14)
	movq	_XAE_TPID1_OFFSET@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r12, %rdi
	callq	_axienet_ior
	movl	%eax, 44(%r14)
	movq	_XAE_PPST_OFFSET@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r12, %rdi
	callq	_axienet_ior
	movl	%eax, 48(%r14)
	movq	_XAE_RCW0_OFFSET@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r12, %rdi
	callq	_axienet_ior
	movl	%eax, 52(%r14)
	movq	_XAE_RCW1_OFFSET@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r12, %rdi
	callq	_axienet_ior
	movl	%eax, 56(%r14)
	movq	_XAE_TC_OFFSET@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r12, %rdi
	callq	_axienet_ior
	movl	%eax, 60(%r14)
	movq	_XAE_FCC_OFFSET@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r12, %rdi
	callq	_axienet_ior
	movl	%eax, 64(%r14)
	movq	_XAE_EMMC_OFFSET@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r12, %rdi
	callq	_axienet_ior
	movl	%eax, 68(%r14)
	movq	_XAE_PHYC_OFFSET@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r12, %rdi
	callq	_axienet_ior
	movl	%eax, 72(%r14)
	movq	_XAE_MDIO_MC_OFFSET@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r12, %rdi
	callq	_axienet_ior
	movl	%eax, 76(%r14)
	movq	_XAE_MDIO_MCR_OFFSET@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r12, %rdi
	callq	_axienet_ior
	movl	%eax, 80(%r14)
	movq	_XAE_MDIO_MWD_OFFSET@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r12, %rdi
	callq	_axienet_ior
	movl	%eax, 84(%r14)
	movq	_XAE_MDIO_MRD_OFFSET@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r12, %rdi
	callq	_axienet_ior
	movl	%eax, 88(%r14)
	movq	_XAE_MDIO_MIS_OFFSET@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r12, %rdi
	callq	_axienet_ior
	movl	%eax, 92(%r14)
	movq	_XAE_MDIO_MIP_OFFSET@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r12, %rdi
	callq	_axienet_ior
	movl	%eax, 96(%r14)
	movq	_XAE_MDIO_MIE_OFFSET@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r12, %rdi
	callq	_axienet_ior
	movl	%eax, 100(%r14)
	movq	_XAE_MDIO_MIC_OFFSET@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r12, %rdi
	callq	_axienet_ior
	movl	%eax, 104(%r14)
	movq	_XAE_UAW0_OFFSET@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r12, %rdi
	callq	_axienet_ior
	movl	%eax, 108(%r14)
	movq	_XAE_UAW1_OFFSET@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r12, %rdi
	callq	_axienet_ior
	movl	%eax, 112(%r14)
	movq	_XAE_FMI_OFFSET@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r12, %rdi
	callq	_axienet_ior
	movl	%eax, 116(%r14)
	movq	_XAE_AF0_OFFSET@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r12, %rdi
	callq	_axienet_ior
	movl	%eax, 120(%r14)
	movq	_XAE_AF1_OFFSET@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r12, %rdi
	callq	_axienet_ior
	movl	%eax, 124(%r14)
	movq	_XAXIDMA_TX_CR_OFFSET@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r12, %rdi
	callq	_axienet_dma_in32
	movl	%eax, 128(%r14)
	movq	_XAXIDMA_TX_SR_OFFSET@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r12, %rdi
	callq	_axienet_dma_in32
	movl	%eax, 132(%r14)
	movq	_XAXIDMA_TX_CDESC_OFFSET@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r12, %rdi
	callq	_axienet_dma_in32
	movl	%eax, 136(%r14)
	movq	_XAXIDMA_TX_TDESC_OFFSET@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r12, %rdi
	callq	_axienet_dma_in32
	movl	%eax, 140(%r14)
	movq	_XAXIDMA_RX_CR_OFFSET@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r12, %rdi
	callq	_axienet_dma_in32
	movl	%eax, 144(%r14)
	movq	_XAXIDMA_RX_SR_OFFSET@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r12, %rdi
	callq	_axienet_dma_in32
	movl	%eax, 148(%r14)
	movq	_XAXIDMA_RX_CDESC_OFFSET@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r12, %rdi
	callq	_axienet_dma_in32
	movl	%eax, 152(%r14)
	movq	_XAXIDMA_RX_TDESC_OFFSET@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r12, %rdi
	callq	_axienet_dma_in32
	movl	%eax, 156(%r14)
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_AXIENET_REGS_N,4,2             ## @AXIENET_REGS_N
	.comm	_XAE_RAF_OFFSET,4,2             ## @XAE_RAF_OFFSET
	.comm	_XAE_TPF_OFFSET,4,2             ## @XAE_TPF_OFFSET
	.comm	_XAE_IFGP_OFFSET,4,2            ## @XAE_IFGP_OFFSET
	.comm	_XAE_IS_OFFSET,4,2              ## @XAE_IS_OFFSET
	.comm	_XAE_IP_OFFSET,4,2              ## @XAE_IP_OFFSET
	.comm	_XAE_IE_OFFSET,4,2              ## @XAE_IE_OFFSET
	.comm	_XAE_TTAG_OFFSET,4,2            ## @XAE_TTAG_OFFSET
	.comm	_XAE_RTAG_OFFSET,4,2            ## @XAE_RTAG_OFFSET
	.comm	_XAE_UAWL_OFFSET,4,2            ## @XAE_UAWL_OFFSET
	.comm	_XAE_UAWU_OFFSET,4,2            ## @XAE_UAWU_OFFSET
	.comm	_XAE_TPID0_OFFSET,4,2           ## @XAE_TPID0_OFFSET
	.comm	_XAE_TPID1_OFFSET,4,2           ## @XAE_TPID1_OFFSET
	.comm	_XAE_PPST_OFFSET,4,2            ## @XAE_PPST_OFFSET
	.comm	_XAE_RCW0_OFFSET,4,2            ## @XAE_RCW0_OFFSET
	.comm	_XAE_RCW1_OFFSET,4,2            ## @XAE_RCW1_OFFSET
	.comm	_XAE_TC_OFFSET,4,2              ## @XAE_TC_OFFSET
	.comm	_XAE_FCC_OFFSET,4,2             ## @XAE_FCC_OFFSET
	.comm	_XAE_EMMC_OFFSET,4,2            ## @XAE_EMMC_OFFSET
	.comm	_XAE_PHYC_OFFSET,4,2            ## @XAE_PHYC_OFFSET
	.comm	_XAE_MDIO_MC_OFFSET,4,2         ## @XAE_MDIO_MC_OFFSET
	.comm	_XAE_MDIO_MCR_OFFSET,4,2        ## @XAE_MDIO_MCR_OFFSET
	.comm	_XAE_MDIO_MWD_OFFSET,4,2        ## @XAE_MDIO_MWD_OFFSET
	.comm	_XAE_MDIO_MRD_OFFSET,4,2        ## @XAE_MDIO_MRD_OFFSET
	.comm	_XAE_MDIO_MIS_OFFSET,4,2        ## @XAE_MDIO_MIS_OFFSET
	.comm	_XAE_MDIO_MIP_OFFSET,4,2        ## @XAE_MDIO_MIP_OFFSET
	.comm	_XAE_MDIO_MIE_OFFSET,4,2        ## @XAE_MDIO_MIE_OFFSET
	.comm	_XAE_MDIO_MIC_OFFSET,4,2        ## @XAE_MDIO_MIC_OFFSET
	.comm	_XAE_UAW0_OFFSET,4,2            ## @XAE_UAW0_OFFSET
	.comm	_XAE_UAW1_OFFSET,4,2            ## @XAE_UAW1_OFFSET
	.comm	_XAE_FMI_OFFSET,4,2             ## @XAE_FMI_OFFSET
	.comm	_XAE_AF0_OFFSET,4,2             ## @XAE_AF0_OFFSET
	.comm	_XAE_AF1_OFFSET,4,2             ## @XAE_AF1_OFFSET
	.comm	_XAXIDMA_TX_CR_OFFSET,4,2       ## @XAXIDMA_TX_CR_OFFSET
	.comm	_XAXIDMA_TX_SR_OFFSET,4,2       ## @XAXIDMA_TX_SR_OFFSET
	.comm	_XAXIDMA_TX_CDESC_OFFSET,4,2    ## @XAXIDMA_TX_CDESC_OFFSET
	.comm	_XAXIDMA_TX_TDESC_OFFSET,4,2    ## @XAXIDMA_TX_TDESC_OFFSET
	.comm	_XAXIDMA_RX_CR_OFFSET,4,2       ## @XAXIDMA_RX_CR_OFFSET
	.comm	_XAXIDMA_RX_SR_OFFSET,4,2       ## @XAXIDMA_RX_SR_OFFSET
	.comm	_XAXIDMA_RX_CDESC_OFFSET,4,2    ## @XAXIDMA_RX_CDESC_OFFSET
	.comm	_XAXIDMA_RX_TDESC_OFFSET,4,2    ## @XAXIDMA_RX_TDESC_OFFSET
	.no_dead_strip	_axienet_ethtools_get_regs
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function axienet_ethtools_get_regs
_axienet_ethtools_get_regs:             ; @axienet_ethtools_get_regs
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x2
	mov	x21, x1
Lloh0:
	adrp	x8, _AXIENET_REGS_N@GOTPAGE
Lloh1:
	ldr	x8, [x8, _AXIENET_REGS_N@GOTPAGEOFF]
Lloh2:
	ldrsw	x8, [x8]
	lsl	x22, x8, #2
	bl	_netdev_priv
	mov	x20, x0
	stp	x22, xzr, [x21]
	mov	x0, x19
	mov	w1, #0
	mov	x2, x22
	bl	_memset
Lloh3:
	adrp	x8, _XAE_RAF_OFFSET@GOTPAGE
Lloh4:
	ldr	x8, [x8, _XAE_RAF_OFFSET@GOTPAGEOFF]
Lloh5:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_axienet_ior
	str	w0, [x19]
Lloh6:
	adrp	x8, _XAE_TPF_OFFSET@GOTPAGE
Lloh7:
	ldr	x8, [x8, _XAE_TPF_OFFSET@GOTPAGEOFF]
Lloh8:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_axienet_ior
	str	w0, [x19, #4]
Lloh9:
	adrp	x8, _XAE_IFGP_OFFSET@GOTPAGE
Lloh10:
	ldr	x8, [x8, _XAE_IFGP_OFFSET@GOTPAGEOFF]
Lloh11:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_axienet_ior
	str	w0, [x19, #8]
Lloh12:
	adrp	x8, _XAE_IS_OFFSET@GOTPAGE
Lloh13:
	ldr	x8, [x8, _XAE_IS_OFFSET@GOTPAGEOFF]
Lloh14:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_axienet_ior
	str	w0, [x19, #12]
Lloh15:
	adrp	x8, _XAE_IP_OFFSET@GOTPAGE
Lloh16:
	ldr	x8, [x8, _XAE_IP_OFFSET@GOTPAGEOFF]
Lloh17:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_axienet_ior
	str	w0, [x19, #16]
Lloh18:
	adrp	x8, _XAE_IE_OFFSET@GOTPAGE
Lloh19:
	ldr	x8, [x8, _XAE_IE_OFFSET@GOTPAGEOFF]
Lloh20:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_axienet_ior
	str	w0, [x19, #20]
Lloh21:
	adrp	x8, _XAE_TTAG_OFFSET@GOTPAGE
Lloh22:
	ldr	x8, [x8, _XAE_TTAG_OFFSET@GOTPAGEOFF]
Lloh23:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_axienet_ior
	str	w0, [x19, #24]
Lloh24:
	adrp	x8, _XAE_RTAG_OFFSET@GOTPAGE
Lloh25:
	ldr	x8, [x8, _XAE_RTAG_OFFSET@GOTPAGEOFF]
Lloh26:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_axienet_ior
	str	w0, [x19, #28]
Lloh27:
	adrp	x8, _XAE_UAWL_OFFSET@GOTPAGE
Lloh28:
	ldr	x8, [x8, _XAE_UAWL_OFFSET@GOTPAGEOFF]
Lloh29:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_axienet_ior
	str	w0, [x19, #32]
Lloh30:
	adrp	x8, _XAE_UAWU_OFFSET@GOTPAGE
Lloh31:
	ldr	x8, [x8, _XAE_UAWU_OFFSET@GOTPAGEOFF]
Lloh32:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_axienet_ior
	str	w0, [x19, #36]
Lloh33:
	adrp	x8, _XAE_TPID0_OFFSET@GOTPAGE
Lloh34:
	ldr	x8, [x8, _XAE_TPID0_OFFSET@GOTPAGEOFF]
Lloh35:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_axienet_ior
	str	w0, [x19, #40]
Lloh36:
	adrp	x8, _XAE_TPID1_OFFSET@GOTPAGE
Lloh37:
	ldr	x8, [x8, _XAE_TPID1_OFFSET@GOTPAGEOFF]
Lloh38:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_axienet_ior
	str	w0, [x19, #44]
Lloh39:
	adrp	x8, _XAE_PPST_OFFSET@GOTPAGE
Lloh40:
	ldr	x8, [x8, _XAE_PPST_OFFSET@GOTPAGEOFF]
Lloh41:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_axienet_ior
	str	w0, [x19, #48]
Lloh42:
	adrp	x8, _XAE_RCW0_OFFSET@GOTPAGE
Lloh43:
	ldr	x8, [x8, _XAE_RCW0_OFFSET@GOTPAGEOFF]
Lloh44:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_axienet_ior
	str	w0, [x19, #52]
Lloh45:
	adrp	x8, _XAE_RCW1_OFFSET@GOTPAGE
Lloh46:
	ldr	x8, [x8, _XAE_RCW1_OFFSET@GOTPAGEOFF]
Lloh47:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_axienet_ior
	str	w0, [x19, #56]
Lloh48:
	adrp	x8, _XAE_TC_OFFSET@GOTPAGE
Lloh49:
	ldr	x8, [x8, _XAE_TC_OFFSET@GOTPAGEOFF]
Lloh50:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_axienet_ior
	str	w0, [x19, #60]
Lloh51:
	adrp	x8, _XAE_FCC_OFFSET@GOTPAGE
Lloh52:
	ldr	x8, [x8, _XAE_FCC_OFFSET@GOTPAGEOFF]
Lloh53:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_axienet_ior
	str	w0, [x19, #64]
Lloh54:
	adrp	x8, _XAE_EMMC_OFFSET@GOTPAGE
Lloh55:
	ldr	x8, [x8, _XAE_EMMC_OFFSET@GOTPAGEOFF]
Lloh56:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_axienet_ior
	str	w0, [x19, #68]
Lloh57:
	adrp	x8, _XAE_PHYC_OFFSET@GOTPAGE
Lloh58:
	ldr	x8, [x8, _XAE_PHYC_OFFSET@GOTPAGEOFF]
Lloh59:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_axienet_ior
	str	w0, [x19, #72]
Lloh60:
	adrp	x8, _XAE_MDIO_MC_OFFSET@GOTPAGE
Lloh61:
	ldr	x8, [x8, _XAE_MDIO_MC_OFFSET@GOTPAGEOFF]
Lloh62:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_axienet_ior
	str	w0, [x19, #76]
Lloh63:
	adrp	x8, _XAE_MDIO_MCR_OFFSET@GOTPAGE
Lloh64:
	ldr	x8, [x8, _XAE_MDIO_MCR_OFFSET@GOTPAGEOFF]
Lloh65:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_axienet_ior
	str	w0, [x19, #80]
Lloh66:
	adrp	x8, _XAE_MDIO_MWD_OFFSET@GOTPAGE
Lloh67:
	ldr	x8, [x8, _XAE_MDIO_MWD_OFFSET@GOTPAGEOFF]
Lloh68:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_axienet_ior
	str	w0, [x19, #84]
Lloh69:
	adrp	x8, _XAE_MDIO_MRD_OFFSET@GOTPAGE
Lloh70:
	ldr	x8, [x8, _XAE_MDIO_MRD_OFFSET@GOTPAGEOFF]
Lloh71:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_axienet_ior
	str	w0, [x19, #88]
Lloh72:
	adrp	x8, _XAE_MDIO_MIS_OFFSET@GOTPAGE
Lloh73:
	ldr	x8, [x8, _XAE_MDIO_MIS_OFFSET@GOTPAGEOFF]
Lloh74:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_axienet_ior
	str	w0, [x19, #92]
Lloh75:
	adrp	x8, _XAE_MDIO_MIP_OFFSET@GOTPAGE
Lloh76:
	ldr	x8, [x8, _XAE_MDIO_MIP_OFFSET@GOTPAGEOFF]
Lloh77:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_axienet_ior
	str	w0, [x19, #96]
Lloh78:
	adrp	x8, _XAE_MDIO_MIE_OFFSET@GOTPAGE
Lloh79:
	ldr	x8, [x8, _XAE_MDIO_MIE_OFFSET@GOTPAGEOFF]
Lloh80:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_axienet_ior
	str	w0, [x19, #100]
Lloh81:
	adrp	x8, _XAE_MDIO_MIC_OFFSET@GOTPAGE
Lloh82:
	ldr	x8, [x8, _XAE_MDIO_MIC_OFFSET@GOTPAGEOFF]
Lloh83:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_axienet_ior
	str	w0, [x19, #104]
Lloh84:
	adrp	x8, _XAE_UAW0_OFFSET@GOTPAGE
Lloh85:
	ldr	x8, [x8, _XAE_UAW0_OFFSET@GOTPAGEOFF]
Lloh86:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_axienet_ior
	str	w0, [x19, #108]
Lloh87:
	adrp	x8, _XAE_UAW1_OFFSET@GOTPAGE
Lloh88:
	ldr	x8, [x8, _XAE_UAW1_OFFSET@GOTPAGEOFF]
Lloh89:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_axienet_ior
	str	w0, [x19, #112]
Lloh90:
	adrp	x8, _XAE_FMI_OFFSET@GOTPAGE
Lloh91:
	ldr	x8, [x8, _XAE_FMI_OFFSET@GOTPAGEOFF]
Lloh92:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_axienet_ior
	str	w0, [x19, #116]
Lloh93:
	adrp	x8, _XAE_AF0_OFFSET@GOTPAGE
Lloh94:
	ldr	x8, [x8, _XAE_AF0_OFFSET@GOTPAGEOFF]
Lloh95:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_axienet_ior
	str	w0, [x19, #120]
Lloh96:
	adrp	x8, _XAE_AF1_OFFSET@GOTPAGE
Lloh97:
	ldr	x8, [x8, _XAE_AF1_OFFSET@GOTPAGEOFF]
Lloh98:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_axienet_ior
	str	w0, [x19, #124]
Lloh99:
	adrp	x8, _XAXIDMA_TX_CR_OFFSET@GOTPAGE
Lloh100:
	ldr	x8, [x8, _XAXIDMA_TX_CR_OFFSET@GOTPAGEOFF]
Lloh101:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_axienet_dma_in32
	str	w0, [x19, #128]
Lloh102:
	adrp	x8, _XAXIDMA_TX_SR_OFFSET@GOTPAGE
Lloh103:
	ldr	x8, [x8, _XAXIDMA_TX_SR_OFFSET@GOTPAGEOFF]
Lloh104:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_axienet_dma_in32
	str	w0, [x19, #132]
Lloh105:
	adrp	x8, _XAXIDMA_TX_CDESC_OFFSET@GOTPAGE
Lloh106:
	ldr	x8, [x8, _XAXIDMA_TX_CDESC_OFFSET@GOTPAGEOFF]
Lloh107:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_axienet_dma_in32
	str	w0, [x19, #136]
Lloh108:
	adrp	x8, _XAXIDMA_TX_TDESC_OFFSET@GOTPAGE
Lloh109:
	ldr	x8, [x8, _XAXIDMA_TX_TDESC_OFFSET@GOTPAGEOFF]
Lloh110:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_axienet_dma_in32
	str	w0, [x19, #140]
Lloh111:
	adrp	x8, _XAXIDMA_RX_CR_OFFSET@GOTPAGE
Lloh112:
	ldr	x8, [x8, _XAXIDMA_RX_CR_OFFSET@GOTPAGEOFF]
Lloh113:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_axienet_dma_in32
	str	w0, [x19, #144]
Lloh114:
	adrp	x8, _XAXIDMA_RX_SR_OFFSET@GOTPAGE
Lloh115:
	ldr	x8, [x8, _XAXIDMA_RX_SR_OFFSET@GOTPAGEOFF]
Lloh116:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_axienet_dma_in32
	str	w0, [x19, #148]
Lloh117:
	adrp	x8, _XAXIDMA_RX_CDESC_OFFSET@GOTPAGE
Lloh118:
	ldr	x8, [x8, _XAXIDMA_RX_CDESC_OFFSET@GOTPAGEOFF]
Lloh119:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_axienet_dma_in32
	str	w0, [x19, #152]
Lloh120:
	adrp	x8, _XAXIDMA_RX_TDESC_OFFSET@GOTPAGE
Lloh121:
	ldr	x8, [x8, _XAXIDMA_RX_TDESC_OFFSET@GOTPAGEOFF]
Lloh122:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_axienet_dma_in32
	str	w0, [x19, #156]
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh120, Lloh121, Lloh122
	.loh AdrpLdrGotLdr	Lloh117, Lloh118, Lloh119
	.loh AdrpLdrGotLdr	Lloh114, Lloh115, Lloh116
	.loh AdrpLdrGotLdr	Lloh111, Lloh112, Lloh113
	.loh AdrpLdrGotLdr	Lloh108, Lloh109, Lloh110
	.loh AdrpLdrGotLdr	Lloh105, Lloh106, Lloh107
	.loh AdrpLdrGotLdr	Lloh102, Lloh103, Lloh104
	.loh AdrpLdrGotLdr	Lloh99, Lloh100, Lloh101
	.loh AdrpLdrGotLdr	Lloh96, Lloh97, Lloh98
	.loh AdrpLdrGotLdr	Lloh93, Lloh94, Lloh95
	.loh AdrpLdrGotLdr	Lloh90, Lloh91, Lloh92
	.loh AdrpLdrGotLdr	Lloh87, Lloh88, Lloh89
	.loh AdrpLdrGotLdr	Lloh84, Lloh85, Lloh86
	.loh AdrpLdrGotLdr	Lloh81, Lloh82, Lloh83
	.loh AdrpLdrGotLdr	Lloh78, Lloh79, Lloh80
	.loh AdrpLdrGotLdr	Lloh75, Lloh76, Lloh77
	.loh AdrpLdrGotLdr	Lloh72, Lloh73, Lloh74
	.loh AdrpLdrGotLdr	Lloh69, Lloh70, Lloh71
	.loh AdrpLdrGotLdr	Lloh66, Lloh67, Lloh68
	.loh AdrpLdrGotLdr	Lloh63, Lloh64, Lloh65
	.loh AdrpLdrGotLdr	Lloh60, Lloh61, Lloh62
	.loh AdrpLdrGotLdr	Lloh57, Lloh58, Lloh59
	.loh AdrpLdrGotLdr	Lloh54, Lloh55, Lloh56
	.loh AdrpLdrGotLdr	Lloh51, Lloh52, Lloh53
	.loh AdrpLdrGotLdr	Lloh48, Lloh49, Lloh50
	.loh AdrpLdrGotLdr	Lloh45, Lloh46, Lloh47
	.loh AdrpLdrGotLdr	Lloh42, Lloh43, Lloh44
	.loh AdrpLdrGotLdr	Lloh39, Lloh40, Lloh41
	.loh AdrpLdrGotLdr	Lloh36, Lloh37, Lloh38
	.loh AdrpLdrGotLdr	Lloh33, Lloh34, Lloh35
	.loh AdrpLdrGotLdr	Lloh30, Lloh31, Lloh32
	.loh AdrpLdrGotLdr	Lloh27, Lloh28, Lloh29
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_AXIENET_REGS_N,4,2             ; @AXIENET_REGS_N
	.comm	_XAE_RAF_OFFSET,4,2             ; @XAE_RAF_OFFSET
	.comm	_XAE_TPF_OFFSET,4,2             ; @XAE_TPF_OFFSET
	.comm	_XAE_IFGP_OFFSET,4,2            ; @XAE_IFGP_OFFSET
	.comm	_XAE_IS_OFFSET,4,2              ; @XAE_IS_OFFSET
	.comm	_XAE_IP_OFFSET,4,2              ; @XAE_IP_OFFSET
	.comm	_XAE_IE_OFFSET,4,2              ; @XAE_IE_OFFSET
	.comm	_XAE_TTAG_OFFSET,4,2            ; @XAE_TTAG_OFFSET
	.comm	_XAE_RTAG_OFFSET,4,2            ; @XAE_RTAG_OFFSET
	.comm	_XAE_UAWL_OFFSET,4,2            ; @XAE_UAWL_OFFSET
	.comm	_XAE_UAWU_OFFSET,4,2            ; @XAE_UAWU_OFFSET
	.comm	_XAE_TPID0_OFFSET,4,2           ; @XAE_TPID0_OFFSET
	.comm	_XAE_TPID1_OFFSET,4,2           ; @XAE_TPID1_OFFSET
	.comm	_XAE_PPST_OFFSET,4,2            ; @XAE_PPST_OFFSET
	.comm	_XAE_RCW0_OFFSET,4,2            ; @XAE_RCW0_OFFSET
	.comm	_XAE_RCW1_OFFSET,4,2            ; @XAE_RCW1_OFFSET
	.comm	_XAE_TC_OFFSET,4,2              ; @XAE_TC_OFFSET
	.comm	_XAE_FCC_OFFSET,4,2             ; @XAE_FCC_OFFSET
	.comm	_XAE_EMMC_OFFSET,4,2            ; @XAE_EMMC_OFFSET
	.comm	_XAE_PHYC_OFFSET,4,2            ; @XAE_PHYC_OFFSET
	.comm	_XAE_MDIO_MC_OFFSET,4,2         ; @XAE_MDIO_MC_OFFSET
	.comm	_XAE_MDIO_MCR_OFFSET,4,2        ; @XAE_MDIO_MCR_OFFSET
	.comm	_XAE_MDIO_MWD_OFFSET,4,2        ; @XAE_MDIO_MWD_OFFSET
	.comm	_XAE_MDIO_MRD_OFFSET,4,2        ; @XAE_MDIO_MRD_OFFSET
	.comm	_XAE_MDIO_MIS_OFFSET,4,2        ; @XAE_MDIO_MIS_OFFSET
	.comm	_XAE_MDIO_MIP_OFFSET,4,2        ; @XAE_MDIO_MIP_OFFSET
	.comm	_XAE_MDIO_MIE_OFFSET,4,2        ; @XAE_MDIO_MIE_OFFSET
	.comm	_XAE_MDIO_MIC_OFFSET,4,2        ; @XAE_MDIO_MIC_OFFSET
	.comm	_XAE_UAW0_OFFSET,4,2            ; @XAE_UAW0_OFFSET
	.comm	_XAE_UAW1_OFFSET,4,2            ; @XAE_UAW1_OFFSET
	.comm	_XAE_FMI_OFFSET,4,2             ; @XAE_FMI_OFFSET
	.comm	_XAE_AF0_OFFSET,4,2             ; @XAE_AF0_OFFSET
	.comm	_XAE_AF1_OFFSET,4,2             ; @XAE_AF1_OFFSET
	.comm	_XAXIDMA_TX_CR_OFFSET,4,2       ; @XAXIDMA_TX_CR_OFFSET
	.comm	_XAXIDMA_TX_SR_OFFSET,4,2       ; @XAXIDMA_TX_SR_OFFSET
	.comm	_XAXIDMA_TX_CDESC_OFFSET,4,2    ; @XAXIDMA_TX_CDESC_OFFSET
	.comm	_XAXIDMA_TX_TDESC_OFFSET,4,2    ; @XAXIDMA_TX_TDESC_OFFSET
	.comm	_XAXIDMA_RX_CR_OFFSET,4,2       ; @XAXIDMA_RX_CR_OFFSET
	.comm	_XAXIDMA_RX_SR_OFFSET,4,2       ; @XAXIDMA_RX_SR_OFFSET
	.comm	_XAXIDMA_RX_CDESC_OFFSET,4,2    ; @XAXIDMA_RX_CDESC_OFFSET
	.comm	_XAXIDMA_RX_TDESC_OFFSET,4,2    ; @XAXIDMA_RX_TDESC_OFFSET
	.no_dead_strip	_axienet_ethtools_get_regs
.subsections_via_symbols
