	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function rtl88e_dm_trx_hw_antenna_div_init
_rtl88e_dm_trx_hw_antenna_div_init:     ## @rtl88e_dm_trx_hw_antenna_div_init
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r13
	movq	_DM_REG_ANTSEL_PIN_11N@GOTPCREL(%rip), %r15
	movl	(%r15), %esi
	movq	_MASKDWORD@GOTPCREL(%rip), %rbx
	movl	(%rbx), %edx
	callq	_rtl_get_bbreg
	movl	%eax, %r14d
	movl	(%r15), %r15d
	movl	(%rbx), %r12d
	movl	$23, %edi
	callq	_BIT
	movl	%eax, %ebx
	movl	$25, %edi
	callq	_BIT
	orl	%eax, %ebx
	orl	%r14d, %ebx
	movq	%r13, %rdi
	movl	%r15d, %esi
	movl	%r12d, %edx
	movl	%ebx, %ecx
	callq	_rtl_set_bbreg
	movq	_DM_REG_PIN_CTRL_11N@GOTPCREL(%rip), %rax
	movl	(%rax), %r14d
	movl	$9, %edi
	callq	_BIT
	movl	%eax, %ebx
	movl	$8, %edi
	callq	_BIT
	orl	%eax, %ebx
	movq	%r13, %rdi
	movl	%r14d, %esi
	movl	%ebx, %edx
	xorl	%ecx, %ecx
	callq	_rtl_set_bbreg
	movq	_DM_REG_RX_ANT_CTRL_11N@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	movl	$10, %edi
	callq	_BIT
	movq	%r13, %rdi
	movl	%ebx, %esi
	movl	%eax, %edx
	xorl	%ecx, %ecx
	callq	_rtl_set_bbreg
	movq	_DM_REG_LNA_SWITCH_11N@GOTPCREL(%rip), %r14
	movl	(%r14), %ebx
	movl	$22, %edi
	callq	_BIT
	movq	%r13, %rdi
	movl	%ebx, %esi
	movl	%eax, %edx
	xorl	%ecx, %ecx
	callq	_rtl_set_bbreg
	movl	(%r14), %ebx
	movl	$31, %edi
	callq	_BIT
	movq	%r13, %rdi
	movl	%ebx, %esi
	movl	%eax, %edx
	movl	$1, %ecx
	callq	_rtl_set_bbreg
	movq	_DM_REG_ANTDIV_PARA1_11N@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_MASKDWORD@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r13, %rdi
	movl	$160, %ecx
	callq	_rtl_set_bbreg
	movq	_DM_REG_BB_PWR_SAV4_11N@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	movl	$7, %edi
	callq	_BIT
	movq	%r13, %rdi
	movl	%ebx, %esi
	movl	%eax, %edx
	movl	$1, %ecx
	callq	_rtl_set_bbreg
	movq	_DM_REG_CCK_ANTDIV_PARA2_11N@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	movl	$4, %edi
	callq	_BIT
	movq	%r13, %rdi
	movl	%ebx, %esi
	movl	%eax, %edx
	movl	$1, %ecx
	callq	_rtl_set_bbreg
	movq	_DM_REG_TX_ANT_CTRL_11N@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	movl	$21, %edi
	callq	_BIT
	movq	%r13, %rdi
	movl	%ebx, %esi
	movl	%eax, %edx
	xorl	%ecx, %ecx
	callq	_rtl_set_bbreg
	movq	_MAIN_ANT@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r13, %rdi
	callq	_rtl88e_dm_update_rx_idle_ant
	movq	_DM_REG_ANT_MAPPING1_11N@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_MASKLWORD@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r13, %rdi
	movl	$513, %ecx                      ## imm = 0x201
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_rtl_set_bbreg                  ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_DM_REG_ANTSEL_PIN_11N,4,2      ## @DM_REG_ANTSEL_PIN_11N
	.comm	_MASKDWORD,4,2                  ## @MASKDWORD
	.comm	_DM_REG_PIN_CTRL_11N,4,2        ## @DM_REG_PIN_CTRL_11N
	.comm	_DM_REG_RX_ANT_CTRL_11N,4,2     ## @DM_REG_RX_ANT_CTRL_11N
	.comm	_DM_REG_LNA_SWITCH_11N,4,2      ## @DM_REG_LNA_SWITCH_11N
	.comm	_DM_REG_ANTDIV_PARA1_11N,4,2    ## @DM_REG_ANTDIV_PARA1_11N
	.comm	_DM_REG_BB_PWR_SAV4_11N,4,2     ## @DM_REG_BB_PWR_SAV4_11N
	.comm	_DM_REG_CCK_ANTDIV_PARA2_11N,4,2 ## @DM_REG_CCK_ANTDIV_PARA2_11N
	.comm	_DM_REG_TX_ANT_CTRL_11N,4,2     ## @DM_REG_TX_ANT_CTRL_11N
	.comm	_MAIN_ANT,4,2                   ## @MAIN_ANT
	.comm	_DM_REG_ANT_MAPPING1_11N,4,2    ## @DM_REG_ANT_MAPPING1_11N
	.comm	_MASKLWORD,4,2                  ## @MASKLWORD
	.no_dead_strip	_rtl88e_dm_trx_hw_antenna_div_init
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function rtl88e_dm_trx_hw_antenna_div_init
_rtl88e_dm_trx_hw_antenna_div_init:     ; @rtl88e_dm_trx_hw_antenna_div_init
	.cfi_startproc
; %bb.0:
	stp	x24, x23, [sp, #-64]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x19, x0
Lloh0:
	adrp	x21, _DM_REG_ANTSEL_PIN_11N@GOTPAGE
Lloh1:
	ldr	x21, [x21, _DM_REG_ANTSEL_PIN_11N@GOTPAGEOFF]
	ldr	w1, [x21]
Lloh2:
	adrp	x24, _MASKDWORD@GOTPAGE
Lloh3:
	ldr	x24, [x24, _MASKDWORD@GOTPAGEOFF]
	ldr	w2, [x24]
	bl	_rtl_get_bbreg
	mov	x20, x0
	ldr	w21, [x21]
	ldr	w22, [x24]
	mov	w0, #23
	bl	_BIT
	mov	x23, x0
	mov	w0, #25
	bl	_BIT
	orr	w8, w23, w20
	orr	w3, w8, w0
	mov	x0, x19
	mov	x1, x21
	mov	x2, x22
	bl	_rtl_set_bbreg
Lloh4:
	adrp	x8, _DM_REG_PIN_CTRL_11N@GOTPAGE
Lloh5:
	ldr	x8, [x8, _DM_REG_PIN_CTRL_11N@GOTPAGEOFF]
Lloh6:
	ldr	w20, [x8]
	mov	w0, #9
	bl	_BIT
	mov	x21, x0
	mov	w0, #8
	bl	_BIT
	orr	w2, w0, w21
	mov	x0, x19
	mov	x1, x20
	mov	w3, #0
	bl	_rtl_set_bbreg
Lloh7:
	adrp	x8, _DM_REG_RX_ANT_CTRL_11N@GOTPAGE
Lloh8:
	ldr	x8, [x8, _DM_REG_RX_ANT_CTRL_11N@GOTPAGEOFF]
Lloh9:
	ldr	w20, [x8]
	mov	w0, #10
	bl	_BIT
	mov	x2, x0
	mov	x0, x19
	mov	x1, x20
	mov	w3, #0
	bl	_rtl_set_bbreg
Lloh10:
	adrp	x21, _DM_REG_LNA_SWITCH_11N@GOTPAGE
Lloh11:
	ldr	x21, [x21, _DM_REG_LNA_SWITCH_11N@GOTPAGEOFF]
	ldr	w20, [x21]
	mov	w0, #22
	bl	_BIT
	mov	x2, x0
	mov	x0, x19
	mov	x1, x20
	mov	w3, #0
	bl	_rtl_set_bbreg
	ldr	w20, [x21]
	mov	w0, #31
	bl	_BIT
	mov	x2, x0
	mov	x0, x19
	mov	x1, x20
	mov	w3, #1
	bl	_rtl_set_bbreg
Lloh12:
	adrp	x8, _DM_REG_ANTDIV_PARA1_11N@GOTPAGE
Lloh13:
	ldr	x8, [x8, _DM_REG_ANTDIV_PARA1_11N@GOTPAGEOFF]
Lloh14:
	ldr	w1, [x8]
	ldr	w2, [x24]
	mov	x0, x19
	mov	w3, #160
	bl	_rtl_set_bbreg
Lloh15:
	adrp	x8, _DM_REG_BB_PWR_SAV4_11N@GOTPAGE
Lloh16:
	ldr	x8, [x8, _DM_REG_BB_PWR_SAV4_11N@GOTPAGEOFF]
Lloh17:
	ldr	w20, [x8]
	mov	w0, #7
	bl	_BIT
	mov	x2, x0
	mov	x0, x19
	mov	x1, x20
	mov	w3, #1
	bl	_rtl_set_bbreg
Lloh18:
	adrp	x8, _DM_REG_CCK_ANTDIV_PARA2_11N@GOTPAGE
Lloh19:
	ldr	x8, [x8, _DM_REG_CCK_ANTDIV_PARA2_11N@GOTPAGEOFF]
Lloh20:
	ldr	w20, [x8]
	mov	w0, #4
	bl	_BIT
	mov	x2, x0
	mov	x0, x19
	mov	x1, x20
	mov	w3, #1
	bl	_rtl_set_bbreg
Lloh21:
	adrp	x8, _DM_REG_TX_ANT_CTRL_11N@GOTPAGE
Lloh22:
	ldr	x8, [x8, _DM_REG_TX_ANT_CTRL_11N@GOTPAGEOFF]
Lloh23:
	ldr	w20, [x8]
	mov	w0, #21
	bl	_BIT
	mov	x2, x0
	mov	x0, x19
	mov	x1, x20
	mov	w3, #0
	bl	_rtl_set_bbreg
Lloh24:
	adrp	x8, _MAIN_ANT@GOTPAGE
Lloh25:
	ldr	x8, [x8, _MAIN_ANT@GOTPAGEOFF]
Lloh26:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_rtl88e_dm_update_rx_idle_ant
Lloh27:
	adrp	x8, _DM_REG_ANT_MAPPING1_11N@GOTPAGE
Lloh28:
	ldr	x8, [x8, _DM_REG_ANT_MAPPING1_11N@GOTPAGEOFF]
Lloh29:
	adrp	x9, _MASKLWORD@GOTPAGE
Lloh30:
	ldr	x9, [x9, _MASKLWORD@GOTPAGEOFF]
Lloh31:
	ldr	w1, [x8]
Lloh32:
	ldr	w2, [x9]
	mov	x0, x19
	mov	w3, #513
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	b	_rtl_set_bbreg
	.loh AdrpLdrGotLdr	Lloh29, Lloh30, Lloh32
	.loh AdrpLdrGotLdr	Lloh27, Lloh28, Lloh31
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGot	Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh7, Lloh8, Lloh9
	.loh AdrpLdrGotLdr	Lloh4, Lloh5, Lloh6
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpLdrGot	Lloh0, Lloh1
	.cfi_endproc
                                        ; -- End function
	.comm	_DM_REG_ANTSEL_PIN_11N,4,2      ; @DM_REG_ANTSEL_PIN_11N
	.comm	_MASKDWORD,4,2                  ; @MASKDWORD
	.comm	_DM_REG_PIN_CTRL_11N,4,2        ; @DM_REG_PIN_CTRL_11N
	.comm	_DM_REG_RX_ANT_CTRL_11N,4,2     ; @DM_REG_RX_ANT_CTRL_11N
	.comm	_DM_REG_LNA_SWITCH_11N,4,2      ; @DM_REG_LNA_SWITCH_11N
	.comm	_DM_REG_ANTDIV_PARA1_11N,4,2    ; @DM_REG_ANTDIV_PARA1_11N
	.comm	_DM_REG_BB_PWR_SAV4_11N,4,2     ; @DM_REG_BB_PWR_SAV4_11N
	.comm	_DM_REG_CCK_ANTDIV_PARA2_11N,4,2 ; @DM_REG_CCK_ANTDIV_PARA2_11N
	.comm	_DM_REG_TX_ANT_CTRL_11N,4,2     ; @DM_REG_TX_ANT_CTRL_11N
	.comm	_MAIN_ANT,4,2                   ; @MAIN_ANT
	.comm	_DM_REG_ANT_MAPPING1_11N,4,2    ; @DM_REG_ANT_MAPPING1_11N
	.comm	_MASKLWORD,4,2                  ; @MASKLWORD
	.no_dead_strip	_rtl88e_dm_trx_hw_antenna_div_init
.subsections_via_symbols
