	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function ath10k_ahb_qca4019_targ_cpu_to_ce_addr
_ath10k_ahb_qca4019_targ_cpu_to_ce_addr: ## @ath10k_ahb_qca4019_targ_cpu_to_ce_addr
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -24
	movl	%esi, %ebx
	andl	$1048575, %ebx                  ## imm = 0xFFFFF
	movq	_PCIE_BAR_REG_ADDRESS@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_ath10k_pci_read32
	movq	_QCA4019_SRAM_ADDR@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	cmpl	%ecx, %ebx
	jl	LBB0_2
## %bb.1:
	movq	_QCA4019_SRAM_LEN@GOTPCREL(%rip), %rdx
	addl	(%rdx), %ecx
	cmpl	%ecx, %ebx
	jle	LBB0_3
LBB0_2:
	orl	$1048576, %ebx                  ## imm = 0x100000
LBB0_3:
	orl	%eax, %ebx
	movl	%ebx, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_PCIE_BAR_REG_ADDRESS,4,2       ## @PCIE_BAR_REG_ADDRESS
	.comm	_QCA4019_SRAM_ADDR,4,2          ## @QCA4019_SRAM_ADDR
	.comm	_QCA4019_SRAM_LEN,4,2           ## @QCA4019_SRAM_LEN
	.no_dead_strip	_ath10k_ahb_qca4019_targ_cpu_to_ce_addr
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function ath10k_ahb_qca4019_targ_cpu_to_ce_addr
_ath10k_ahb_qca4019_targ_cpu_to_ce_addr: ; @ath10k_ahb_qca4019_targ_cpu_to_ce_addr
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	and	w19, w1, #0xfffff
Lloh0:
	adrp	x8, _PCIE_BAR_REG_ADDRESS@GOTPAGE
Lloh1:
	ldr	x8, [x8, _PCIE_BAR_REG_ADDRESS@GOTPAGEOFF]
Lloh2:
	ldr	w1, [x8]
	bl	_ath10k_pci_read32
Lloh3:
	adrp	x8, _QCA4019_SRAM_ADDR@GOTPAGE
Lloh4:
	ldr	x8, [x8, _QCA4019_SRAM_ADDR@GOTPAGEOFF]
Lloh5:
	ldr	w8, [x8]
	cmp	w19, w8
	b.lt	LBB0_2
; %bb.1:
Lloh6:
	adrp	x9, _QCA4019_SRAM_LEN@GOTPAGE
Lloh7:
	ldr	x9, [x9, _QCA4019_SRAM_LEN@GOTPAGEOFF]
Lloh8:
	ldr	w9, [x9]
	add	w8, w9, w8
	cmp	w19, w8
	b.le	LBB0_3
LBB0_2:
	orr	w19, w19, #0x100000
LBB0_3:
	orr	w0, w19, w0
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.cfi_endproc
                                        ; -- End function
	.comm	_PCIE_BAR_REG_ADDRESS,4,2       ; @PCIE_BAR_REG_ADDRESS
	.comm	_QCA4019_SRAM_ADDR,4,2          ; @QCA4019_SRAM_ADDR
	.comm	_QCA4019_SRAM_LEN,4,2           ; @QCA4019_SRAM_LEN
	.no_dead_strip	_ath10k_ahb_qca4019_targ_cpu_to_ce_addr
.subsections_via_symbols
