	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function mlx5_fpga_is_ipsec_device
_mlx5_fpga_is_ipsec_device:             ## @mlx5_fpga_is_ipsec_device
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r14
	pushq	%rbx
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	xorl	%r14d, %r14d
	cmpl	$0, (%rdi)
	je	LBB0_4
## %bb.1:
	movq	%rdi, %rbx
	movq	_fpga@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_MLX5_CAP_GEN
	testl	%eax, %eax
	je	LBB0_4
## %bb.2:
	movq	_ieee_vendor_id@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_MLX5_CAP_FPGA
	movq	_MLX5_FPGA_CAP_SANDBOX_VENDOR_ID_MLNX@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jne	LBB0_4
## %bb.3:
	movq	_sandbox_product_id@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_MLX5_CAP_FPGA
	movq	_MLX5_FPGA_CAP_SANDBOX_PRODUCT_ID_IPSEC@GOTPCREL(%rip), %rcx
	xorl	%r14d, %r14d
	cmpq	(%rcx), %rax
	sete	%r14b
LBB0_4:
	movl	%r14d, %eax
	popq	%rbx
	popq	%r14
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_fpga,4,2                       ## @fpga
	.comm	_ieee_vendor_id,4,2             ## @ieee_vendor_id
	.comm	_MLX5_FPGA_CAP_SANDBOX_VENDOR_ID_MLNX,8,3 ## @MLX5_FPGA_CAP_SANDBOX_VENDOR_ID_MLNX
	.comm	_sandbox_product_id,4,2         ## @sandbox_product_id
	.comm	_MLX5_FPGA_CAP_SANDBOX_PRODUCT_ID_IPSEC,8,3 ## @MLX5_FPGA_CAP_SANDBOX_PRODUCT_ID_IPSEC
	.no_dead_strip	_mlx5_fpga_is_ipsec_device
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function mlx5_fpga_is_ipsec_device
_mlx5_fpga_is_ipsec_device:             ; @mlx5_fpga_is_ipsec_device
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	ldr	w8, [x0]
	cbz	w8, LBB0_4
; %bb.1:
	mov	x19, x0
Lloh0:
	adrp	x8, _fpga@GOTPAGE
Lloh1:
	ldr	x8, [x8, _fpga@GOTPAGEOFF]
Lloh2:
	ldr	w1, [x8]
	bl	_MLX5_CAP_GEN
	cbz	w0, LBB0_5
; %bb.2:
Lloh3:
	adrp	x8, _ieee_vendor_id@GOTPAGE
Lloh4:
	ldr	x8, [x8, _ieee_vendor_id@GOTPAGEOFF]
Lloh5:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_MLX5_CAP_FPGA
Lloh6:
	adrp	x8, _MLX5_FPGA_CAP_SANDBOX_VENDOR_ID_MLNX@GOTPAGE
Lloh7:
	ldr	x8, [x8, _MLX5_FPGA_CAP_SANDBOX_VENDOR_ID_MLNX@GOTPAGEOFF]
Lloh8:
	ldr	x8, [x8]
	cmp	x0, x8
	b.ne	LBB0_4
; %bb.3:
Lloh9:
	adrp	x8, _sandbox_product_id@GOTPAGE
Lloh10:
	ldr	x8, [x8, _sandbox_product_id@GOTPAGEOFF]
Lloh11:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_MLX5_CAP_FPGA
Lloh12:
	adrp	x8, _MLX5_FPGA_CAP_SANDBOX_PRODUCT_ID_IPSEC@GOTPAGE
Lloh13:
	ldr	x8, [x8, _MLX5_FPGA_CAP_SANDBOX_PRODUCT_ID_IPSEC@GOTPAGEOFF]
Lloh14:
	ldr	x8, [x8]
	cmp	x0, x8
	cset	w0, eq
	b	LBB0_5
LBB0_4:
	mov	w0, #0
LBB0_5:
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.cfi_endproc
                                        ; -- End function
	.comm	_fpga,4,2                       ; @fpga
	.comm	_ieee_vendor_id,4,2             ; @ieee_vendor_id
	.comm	_MLX5_FPGA_CAP_SANDBOX_VENDOR_ID_MLNX,8,3 ; @MLX5_FPGA_CAP_SANDBOX_VENDOR_ID_MLNX
	.comm	_sandbox_product_id,4,2         ; @sandbox_product_id
	.comm	_MLX5_FPGA_CAP_SANDBOX_PRODUCT_ID_IPSEC,8,3 ; @MLX5_FPGA_CAP_SANDBOX_PRODUCT_ID_IPSEC
	.no_dead_strip	_mlx5_fpga_is_ipsec_device
.subsections_via_symbols
