	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function v3_pci_setup_resource
_v3_pci_setup_resource:                 ## @v3_pci_setup_resource
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rcx, %rbx
	movq	%rdx, %r14
	movl	%esi, %r12d
	movq	%rdi, %r13
	movq	56(%rdi), %r15
	movq	(%rcx), %rdi
	callq	_resource_type
	cmpl	$128, %eax
	je	LBB0_7
## %bb.1:
	cmpl	$130, %eax
	je	LBB0_18
## %bb.2:
	cmpl	$129, %eax
	jne	LBB0_19
## %bb.3:
	movq	(%rbx), %r14
	leaq	L_.str(%rip), %rax
	movq	%rax, (%r14)
	movl	%r12d, 48(%r13)
	movq	16(%r14), %rax
	subq	8(%rbx), %rax
	leaq	40(%r13), %rcx
	movq	%rax, 40(%r13)
	leaq	L_.str.1(%rip), %rsi
	movq	%r15, %rdi
	movq	%r14, %rdx
	xorl	%eax, %eax
	callq	_dev_dbg
	movq	%r15, %rdi
	movq	%r14, %rsi
	movl	%r12d, %edx
	callq	_devm_pci_remap_iospace
	testl	%eax, %eax
	je	LBB0_5
## %bb.4:
	movl	%eax, %r12d
	leaq	L_.str.2(%rip), %rsi
	movq	%r15, %rdi
	movl	%eax, %edx
	movq	%r14, %rcx
	callq	_dev_warn
	jmp	LBB0_21
LBB0_7:
	movq	(%rbx), %r12
	movq	_IORESOURCE_PREFETCH@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	testl	%eax, 8(%r12)
	je	LBB0_15
## %bb.8:
	leaq	L_.str.3(%rip), %rax
	movq	%rax, (%r12)
	movq	16(%r12), %rax
	movq	%rax, 32(%r13)
	subq	8(%rbx), %rax
	leaq	24(%r13), %rcx
	movq	%rax, 24(%r13)
	leaq	L_.str.4(%rip), %rsi
	xorl	%ebx, %ebx
	movq	%r15, %rdi
	movq	%r12, %rdx
	xorl	%eax, %eax
	callq	_dev_dbg
	movq	%r12, %rdi
	callq	_resource_size
	movq	_SZ_256M@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jne	LBB0_9
## %bb.11:
	movq	16(%r13), %rcx
	testq	%rcx, %rcx
	je	LBB0_14
## %bb.12:
	addq	%rax, %rcx
	cmpq	%rcx, 16(%r12)
	jne	LBB0_13
LBB0_14:
	movq	32(%r13), %rdi
	callq	_v3_addr_to_lb_base
	movq	_V3_LB_BASE_ADR_SIZE_256MB@GOTPCREL(%rip), %rcx
	orl	(%rcx), %eax
	movq	_V3_LB_BASE_PREFETCH@GOTPCREL(%rip), %rcx
	orl	(%rcx), %eax
	movq	_V3_LB_BASE_ENABLE@GOTPCREL(%rip), %rcx
	orl	(%rcx), %eax
	movq	_V3_LB_BASE1@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rsi
	addq	(%r13), %rsi
	movl	%eax, %edi
	callq	_writel
	movq	24(%r13), %rdi
	callq	_v3_addr_to_lb_map
	movq	_V3_LB_MAP_TYPE_MEM@GOTPCREL(%rip), %rcx
	orl	(%rcx), %eax
	movq	_V3_LB_MAP1@GOTPCREL(%rip), %rcx
	jmp	LBB0_6
LBB0_18:
	movq	(%rbx), %rdx
	leaq	L_.str.10(%rip), %rsi
	xorl	%r12d, %r12d
	movq	%r15, %rdi
	xorl	%eax, %eax
	callq	_dev_dbg
	movq	(%rbx), %rax
	movq	16(%rax), %rax
	movq	%rax, (%r14)
	jmp	LBB0_21
LBB0_19:
	movq	(%rbx), %rdi
	callq	_resource_type
	leaq	L_.str.11(%rip), %rsi
	movq	%r15, %rdi
	movl	%eax, %edx
	callq	_dev_info
	jmp	LBB0_20
LBB0_5:
	movl	48(%r13), %edi
	callq	_v3_addr_to_lb_base2
	movq	_V3_LB_BASE2_ENABLE@GOTPCREL(%rip), %rcx
	orl	(%rcx), %eax
	movq	_V3_LB_BASE2@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rsi
	addq	(%r13), %rsi
	movl	%eax, %edi
	callq	_writel
	movq	40(%r13), %rdi
	callq	_v3_addr_to_lb_map2
	movq	_V3_LB_MAP2@GOTPCREL(%rip), %rcx
	jmp	LBB0_6
LBB0_15:
	leaq	L_.str.7(%rip), %rax
	movq	%rax, (%r12)
	movq	16(%r12), %rax
	movq	%rax, 16(%r13)
	subq	8(%rbx), %rax
	leaq	8(%r13), %rcx
	movq	%rax, 8(%r13)
	leaq	L_.str.8(%rip), %rsi
	xorl	%ebx, %ebx
	movq	%r15, %rdi
	movq	%r12, %rdx
	xorl	%eax, %eax
	callq	_dev_dbg
	movq	%r12, %rdi
	callq	_resource_size
	movq	_SZ_256M@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jne	LBB0_16
## %bb.17:
	movq	16(%r13), %rdi
	callq	_v3_addr_to_lb_base
	movq	_V3_LB_BASE_ADR_SIZE_256MB@GOTPCREL(%rip), %rcx
	orl	(%rcx), %eax
	movq	_V3_LB_BASE_ENABLE@GOTPCREL(%rip), %rcx
	orl	(%rcx), %eax
	movq	_V3_LB_BASE0@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rsi
	addq	(%r13), %rsi
	movl	%eax, %edi
	callq	_writel
	movq	8(%r13), %rdi
	callq	_v3_addr_to_lb_map
	movq	_V3_LB_MAP_TYPE_MEM@GOTPCREL(%rip), %rcx
	orl	(%rcx), %eax
	movq	_V3_LB_MAP0@GOTPCREL(%rip), %rcx
LBB0_6:
	movq	(%rcx), %rsi
	addq	(%r13), %rsi
	movl	%eax, %edi
	callq	_writew
LBB0_20:
	xorl	%r12d, %r12d
	jmp	LBB0_21
LBB0_9:
	leaq	L_.str.5(%rip), %rsi
	jmp	LBB0_10
LBB0_16:
	leaq	L_.str.9(%rip), %rsi
LBB0_10:
	movq	%r15, %rdi
	callq	_dev_err
	movq	_EINVAL@GOTPCREL(%rip), %rax
	subl	(%rax), %ebx
	movl	%ebx, %r12d
LBB0_21:
	movl	%r12d, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_13:
	leaq	L_.str.6(%rip), %rsi
	movq	%r15, %rdi
	callq	_dev_err
	movq	_EINVAL@GOTPCREL(%rip), %rax
	xorl	%r12d, %r12d
	subl	(%rax), %r12d
	jmp	LBB0_21
	.cfi_endproc
                                        ## -- End function
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"V3 PCI I/O"

L_.str.1:                               ## @.str.1
	.asciz	"I/O window %pR, bus addr %pap\n"

L_.str.2:                               ## @.str.2
	.asciz	"error %d: failed to map resource %pR\n"

	.comm	_V3_LB_BASE2_ENABLE,4,2         ## @V3_LB_BASE2_ENABLE
	.comm	_V3_LB_BASE2,8,3                ## @V3_LB_BASE2
	.comm	_V3_LB_MAP2,8,3                 ## @V3_LB_MAP2
	.comm	_IORESOURCE_PREFETCH,4,2        ## @IORESOURCE_PREFETCH
L_.str.3:                               ## @.str.3
	.asciz	"V3 PCI PRE-MEM"

L_.str.4:                               ## @.str.4
	.asciz	"PREFETCHABLE MEM window %pR, bus addr %pap\n"

	.comm	_SZ_256M,8,3                    ## @SZ_256M
L_.str.5:                               ## @.str.5
	.asciz	"prefetchable memory range is not 256MB\n"

	.comm	_EINVAL,4,2                     ## @EINVAL
L_.str.6:                               ## @.str.6
	.asciz	"prefetchable memory is not adjacent to non-prefetchable memory\n"

	.comm	_V3_LB_BASE_ADR_SIZE_256MB,4,2  ## @V3_LB_BASE_ADR_SIZE_256MB
	.comm	_V3_LB_BASE_PREFETCH,4,2        ## @V3_LB_BASE_PREFETCH
	.comm	_V3_LB_BASE_ENABLE,4,2          ## @V3_LB_BASE_ENABLE
	.comm	_V3_LB_BASE1,8,3                ## @V3_LB_BASE1
	.comm	_V3_LB_MAP_TYPE_MEM,4,2         ## @V3_LB_MAP_TYPE_MEM
	.comm	_V3_LB_MAP1,8,3                 ## @V3_LB_MAP1
L_.str.7:                               ## @.str.7
	.asciz	"V3 PCI NON-PRE-MEM"

L_.str.8:                               ## @.str.8
	.asciz	"NON-PREFETCHABLE MEM window %pR, bus addr %pap\n"

L_.str.9:                               ## @.str.9
	.asciz	"non-prefetchable memory range is not 256MB\n"

	.comm	_V3_LB_BASE0,8,3                ## @V3_LB_BASE0
	.comm	_V3_LB_MAP0,8,3                 ## @V3_LB_MAP0
L_.str.10:                              ## @.str.10
	.asciz	"BUS %pR\n"

L_.str.11:                              ## @.str.11
	.asciz	"Unknown resource type %lu\n"

	.no_dead_strip	_v3_pci_setup_resource
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function v3_pci_setup_resource
_v3_pci_setup_resource:                 ; @v3_pci_setup_resource
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #80
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x22, x3
	mov	x23, x2
	mov	x21, x1
	mov	x19, x0
	ldr	x20, [x0, #56]
	ldr	x0, [x3]
	bl	_resource_type
	cmp	w0, #128
	b.eq	LBB0_5
; %bb.1:
	cmp	w0, #130
	b.eq	LBB0_10
; %bb.2:
	cmp	w0, #129
	b.ne	LBB0_11
; %bb.3:
Lloh0:
	adrp	x8, l_.str@PAGE
Lloh1:
	add	x8, x8, l_.str@PAGEOFF
	ldp	x23, x9, [x22]
	str	x8, [x23]
	ldr	x8, [x23, #16]
	sub	x8, x8, x9
	mov	x9, x19
	str	x8, [x9, #40]!
	str	w21, [x9, #8]
	str	x9, [sp]
Lloh2:
	adrp	x1, l_.str.1@PAGE
Lloh3:
	add	x1, x1, l_.str.1@PAGEOFF
	mov	x0, x20
	mov	x2, x23
	bl	_dev_dbg
	mov	x0, x20
	mov	x1, x23
	mov	x2, x21
	bl	_devm_pci_remap_iospace
	mov	x21, x0
	cbz	w0, LBB0_12
; %bb.4:
Lloh4:
	adrp	x1, l_.str.2@PAGE
Lloh5:
	add	x1, x1, l_.str.2@PAGEOFF
	mov	x0, x20
	mov	x2, x21
	mov	x3, x23
	bl	_dev_warn
	b	LBB0_21
LBB0_5:
	ldr	x21, [x22]
	ldr	w8, [x21, #8]
Lloh6:
	adrp	x9, _IORESOURCE_PREFETCH@GOTPAGE
Lloh7:
	ldr	x9, [x9, _IORESOURCE_PREFETCH@GOTPAGEOFF]
Lloh8:
	ldr	w9, [x9]
	tst	w9, w8
	b.eq	LBB0_13
; %bb.6:
Lloh9:
	adrp	x8, l_.str.3@PAGE
Lloh10:
	add	x8, x8, l_.str.3@PAGEOFF
	str	x8, [x21]
	ldr	x8, [x21, #16]
	ldr	x9, [x22, #8]
	sub	x9, x8, x9
	mov	x10, x19
	stp	x9, x8, [x10, #24]!
	str	x10, [sp]
Lloh11:
	adrp	x1, l_.str.4@PAGE
Lloh12:
	add	x1, x1, l_.str.4@PAGEOFF
	mov	x0, x20
	mov	x2, x21
	bl	_dev_dbg
	mov	x0, x21
	bl	_resource_size
Lloh13:
	adrp	x8, _SZ_256M@GOTPAGE
Lloh14:
	ldr	x8, [x8, _SZ_256M@GOTPAGEOFF]
Lloh15:
	ldr	x8, [x8]
	cmp	x0, x8
	b.ne	LBB0_17
; %bb.7:
	ldr	x8, [x19, #16]
	cbz	x8, LBB0_9
; %bb.8:
	ldr	x9, [x21, #16]
	add	x8, x8, x0
	cmp	x9, x8
	b.ne	LBB0_19
LBB0_9:
	ldr	x0, [x19, #32]
	bl	_v3_addr_to_lb_base
Lloh16:
	adrp	x8, _V3_LB_BASE_ADR_SIZE_256MB@GOTPAGE
Lloh17:
	ldr	x8, [x8, _V3_LB_BASE_ADR_SIZE_256MB@GOTPAGEOFF]
Lloh18:
	ldr	w8, [x8]
Lloh19:
	adrp	x9, _V3_LB_BASE_PREFETCH@GOTPAGE
Lloh20:
	ldr	x9, [x9, _V3_LB_BASE_PREFETCH@GOTPAGEOFF]
	orr	w8, w8, w0
Lloh21:
	ldr	w9, [x9]
	orr	w8, w8, w9
Lloh22:
	adrp	x9, _V3_LB_BASE_ENABLE@GOTPAGE
Lloh23:
	ldr	x9, [x9, _V3_LB_BASE_ENABLE@GOTPAGEOFF]
Lloh24:
	ldr	w9, [x9]
	orr	w0, w8, w9
	ldr	x8, [x19]
Lloh25:
	adrp	x9, _V3_LB_BASE1@GOTPAGE
Lloh26:
	ldr	x9, [x9, _V3_LB_BASE1@GOTPAGEOFF]
Lloh27:
	ldr	x9, [x9]
	add	x1, x9, x8
	bl	_writel
	ldr	x0, [x19, #24]
	bl	_v3_addr_to_lb_map
Lloh28:
	adrp	x8, _V3_LB_MAP_TYPE_MEM@GOTPAGE
Lloh29:
	ldr	x8, [x8, _V3_LB_MAP_TYPE_MEM@GOTPAGEOFF]
Lloh30:
	ldr	w8, [x8]
	orr	w0, w8, w0
	ldr	x8, [x19]
Lloh31:
	adrp	x9, _V3_LB_MAP1@GOTPAGE
Lloh32:
	ldr	x9, [x9, _V3_LB_MAP1@GOTPAGEOFF]
	b	LBB0_15
LBB0_10:
	ldr	x2, [x22]
Lloh33:
	adrp	x1, l_.str.10@PAGE
Lloh34:
	add	x1, x1, l_.str.10@PAGEOFF
	mov	x0, x20
	bl	_dev_dbg
	mov	w21, #0
	ldr	x8, [x22]
	ldr	x8, [x8, #16]
	str	x8, [x23]
	b	LBB0_21
LBB0_11:
	ldr	x0, [x22]
	bl	_resource_type
	mov	x2, x0
Lloh35:
	adrp	x1, l_.str.11@PAGE
Lloh36:
	add	x1, x1, l_.str.11@PAGEOFF
	mov	x0, x20
	bl	_dev_info
	b	LBB0_16
LBB0_12:
	ldr	w0, [x19, #48]
	bl	_v3_addr_to_lb_base2
Lloh37:
	adrp	x8, _V3_LB_BASE2_ENABLE@GOTPAGE
Lloh38:
	ldr	x8, [x8, _V3_LB_BASE2_ENABLE@GOTPAGEOFF]
Lloh39:
	ldr	w8, [x8]
	orr	w0, w8, w0
	ldr	x8, [x19]
Lloh40:
	adrp	x9, _V3_LB_BASE2@GOTPAGE
Lloh41:
	ldr	x9, [x9, _V3_LB_BASE2@GOTPAGEOFF]
Lloh42:
	ldr	x9, [x9]
	add	x1, x9, x8
	bl	_writel
	ldr	x0, [x19, #40]
	bl	_v3_addr_to_lb_map2
	ldr	x8, [x19]
Lloh43:
	adrp	x9, _V3_LB_MAP2@GOTPAGE
Lloh44:
	ldr	x9, [x9, _V3_LB_MAP2@GOTPAGEOFF]
Lloh45:
	ldr	x9, [x9]
	add	x1, x9, x8
	bl	_writew
	b	LBB0_21
LBB0_13:
Lloh46:
	adrp	x8, l_.str.7@PAGE
Lloh47:
	add	x8, x8, l_.str.7@PAGEOFF
	str	x8, [x21]
	ldr	x8, [x21, #16]
	ldr	x9, [x22, #8]
	sub	x9, x8, x9
	mov	x10, x19
	stp	x9, x8, [x10, #8]!
	str	x10, [sp]
Lloh48:
	adrp	x1, l_.str.8@PAGE
Lloh49:
	add	x1, x1, l_.str.8@PAGEOFF
	mov	x0, x20
	mov	x2, x21
	bl	_dev_dbg
	mov	x0, x21
	bl	_resource_size
Lloh50:
	adrp	x8, _SZ_256M@GOTPAGE
Lloh51:
	ldr	x8, [x8, _SZ_256M@GOTPAGEOFF]
Lloh52:
	ldr	x8, [x8]
	cmp	x0, x8
	b.ne	LBB0_18
; %bb.14:
	ldr	x0, [x19, #16]
	bl	_v3_addr_to_lb_base
Lloh53:
	adrp	x8, _V3_LB_BASE_ADR_SIZE_256MB@GOTPAGE
Lloh54:
	ldr	x8, [x8, _V3_LB_BASE_ADR_SIZE_256MB@GOTPAGEOFF]
Lloh55:
	ldr	w8, [x8]
	orr	w8, w8, w0
Lloh56:
	adrp	x9, _V3_LB_BASE_ENABLE@GOTPAGE
Lloh57:
	ldr	x9, [x9, _V3_LB_BASE_ENABLE@GOTPAGEOFF]
Lloh58:
	ldr	w9, [x9]
	orr	w0, w8, w9
	ldr	x8, [x19]
Lloh59:
	adrp	x9, _V3_LB_BASE0@GOTPAGE
Lloh60:
	ldr	x9, [x9, _V3_LB_BASE0@GOTPAGEOFF]
Lloh61:
	ldr	x9, [x9]
	add	x1, x9, x8
	bl	_writel
	ldr	x0, [x19, #8]
	bl	_v3_addr_to_lb_map
Lloh62:
	adrp	x8, _V3_LB_MAP_TYPE_MEM@GOTPAGE
Lloh63:
	ldr	x8, [x8, _V3_LB_MAP_TYPE_MEM@GOTPAGEOFF]
Lloh64:
	ldr	w8, [x8]
	orr	w0, w8, w0
	ldr	x8, [x19]
Lloh65:
	adrp	x9, _V3_LB_MAP0@GOTPAGE
Lloh66:
	ldr	x9, [x9, _V3_LB_MAP0@GOTPAGEOFF]
LBB0_15:
	ldr	x9, [x9]
	add	x1, x9, x8
	bl	_writew
LBB0_16:
	mov	w21, #0
	b	LBB0_21
LBB0_17:
Lloh67:
	adrp	x1, l_.str.5@PAGE
Lloh68:
	add	x1, x1, l_.str.5@PAGEOFF
	b	LBB0_20
LBB0_18:
Lloh69:
	adrp	x1, l_.str.9@PAGE
Lloh70:
	add	x1, x1, l_.str.9@PAGEOFF
	b	LBB0_20
LBB0_19:
Lloh71:
	adrp	x1, l_.str.6@PAGE
Lloh72:
	add	x1, x1, l_.str.6@PAGEOFF
LBB0_20:
	mov	x0, x20
	bl	_dev_err
Lloh73:
	adrp	x8, _EINVAL@GOTPAGE
Lloh74:
	ldr	x8, [x8, _EINVAL@GOTPAGEOFF]
Lloh75:
	ldr	w8, [x8]
	neg	w21, w8
LBB0_21:
	mov	x0, x21
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #80
	ret
	.loh AdrpAdd	Lloh2, Lloh3
	.loh AdrpAdd	Lloh0, Lloh1
	.loh AdrpAdd	Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh13, Lloh14, Lloh15
	.loh AdrpAdd	Lloh11, Lloh12
	.loh AdrpAdd	Lloh9, Lloh10
	.loh AdrpLdrGot	Lloh31, Lloh32
	.loh AdrpLdrGotLdr	Lloh28, Lloh29, Lloh30
	.loh AdrpLdrGotLdr	Lloh25, Lloh26, Lloh27
	.loh AdrpLdrGotLdr	Lloh22, Lloh23, Lloh24
	.loh AdrpLdrGotLdr	Lloh19, Lloh20, Lloh21
	.loh AdrpLdrGotLdr	Lloh16, Lloh17, Lloh18
	.loh AdrpAdd	Lloh33, Lloh34
	.loh AdrpAdd	Lloh35, Lloh36
	.loh AdrpLdrGotLdr	Lloh43, Lloh44, Lloh45
	.loh AdrpLdrGotLdr	Lloh40, Lloh41, Lloh42
	.loh AdrpLdrGotLdr	Lloh37, Lloh38, Lloh39
	.loh AdrpLdrGotLdr	Lloh50, Lloh51, Lloh52
	.loh AdrpAdd	Lloh48, Lloh49
	.loh AdrpAdd	Lloh46, Lloh47
	.loh AdrpLdrGot	Lloh65, Lloh66
	.loh AdrpLdrGotLdr	Lloh62, Lloh63, Lloh64
	.loh AdrpLdrGotLdr	Lloh59, Lloh60, Lloh61
	.loh AdrpLdrGotLdr	Lloh56, Lloh57, Lloh58
	.loh AdrpLdrGotLdr	Lloh53, Lloh54, Lloh55
	.loh AdrpAdd	Lloh67, Lloh68
	.loh AdrpAdd	Lloh69, Lloh70
	.loh AdrpAdd	Lloh71, Lloh72
	.loh AdrpLdrGotLdr	Lloh73, Lloh74, Lloh75
	.cfi_endproc
                                        ; -- End function
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"V3 PCI I/O"

l_.str.1:                               ; @.str.1
	.asciz	"I/O window %pR, bus addr %pap\n"

l_.str.2:                               ; @.str.2
	.asciz	"error %d: failed to map resource %pR\n"

	.comm	_V3_LB_BASE2_ENABLE,4,2         ; @V3_LB_BASE2_ENABLE
	.comm	_V3_LB_BASE2,8,3                ; @V3_LB_BASE2
	.comm	_V3_LB_MAP2,8,3                 ; @V3_LB_MAP2
	.comm	_IORESOURCE_PREFETCH,4,2        ; @IORESOURCE_PREFETCH
l_.str.3:                               ; @.str.3
	.asciz	"V3 PCI PRE-MEM"

l_.str.4:                               ; @.str.4
	.asciz	"PREFETCHABLE MEM window %pR, bus addr %pap\n"

	.comm	_SZ_256M,8,3                    ; @SZ_256M
l_.str.5:                               ; @.str.5
	.asciz	"prefetchable memory range is not 256MB\n"

	.comm	_EINVAL,4,2                     ; @EINVAL
l_.str.6:                               ; @.str.6
	.asciz	"prefetchable memory is not adjacent to non-prefetchable memory\n"

	.comm	_V3_LB_BASE_ADR_SIZE_256MB,4,2  ; @V3_LB_BASE_ADR_SIZE_256MB
	.comm	_V3_LB_BASE_PREFETCH,4,2        ; @V3_LB_BASE_PREFETCH
	.comm	_V3_LB_BASE_ENABLE,4,2          ; @V3_LB_BASE_ENABLE
	.comm	_V3_LB_BASE1,8,3                ; @V3_LB_BASE1
	.comm	_V3_LB_MAP_TYPE_MEM,4,2         ; @V3_LB_MAP_TYPE_MEM
	.comm	_V3_LB_MAP1,8,3                 ; @V3_LB_MAP1
l_.str.7:                               ; @.str.7
	.asciz	"V3 PCI NON-PRE-MEM"

l_.str.8:                               ; @.str.8
	.asciz	"NON-PREFETCHABLE MEM window %pR, bus addr %pap\n"

l_.str.9:                               ; @.str.9
	.asciz	"non-prefetchable memory range is not 256MB\n"

	.comm	_V3_LB_BASE0,8,3                ; @V3_LB_BASE0
	.comm	_V3_LB_MAP0,8,3                 ; @V3_LB_MAP0
l_.str.10:                              ; @.str.10
	.asciz	"BUS %pR\n"

l_.str.11:                              ; @.str.11
	.asciz	"Unknown resource type %lu\n"

	.no_dead_strip	_v3_pci_setup_resource
.subsections_via_symbols
