	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function pcie_phy_poll_ack
_pcie_phy_poll_ack:                     ## @pcie_phy_poll_ack
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%esi, %r15d
	movq	(%rdi), %rbx
	movq	_PCIE_PHY_STAT@GOTPCREL(%rip), %r12
	movl	(%r12), %esi
	movq	%rbx, %rdi
	callq	_dw_pcie_readl_dbi
	movq	_PCIE_PHY_STAT_ACK@GOTPCREL(%rip), %r13
	andl	(%r13), %eax
	xorl	%r14d, %r14d
	cmpl	%r15d, %eax
	je	LBB0_11
## %bb.1:
	movl	$1, %edi
	callq	_udelay
	movl	(%r12), %esi
	movq	%rbx, %rdi
	callq	_dw_pcie_readl_dbi
	andl	(%r13), %eax
	cmpl	%r15d, %eax
	je	LBB0_11
## %bb.2:
	movl	$1, %edi
	callq	_udelay
	movl	(%r12), %esi
	movq	%rbx, %rdi
	callq	_dw_pcie_readl_dbi
	andl	(%r13), %eax
	cmpl	%r15d, %eax
	je	LBB0_11
## %bb.3:
	movl	$1, %edi
	callq	_udelay
	movl	(%r12), %esi
	movq	%rbx, %rdi
	callq	_dw_pcie_readl_dbi
	andl	(%r13), %eax
	cmpl	%r15d, %eax
	je	LBB0_11
## %bb.4:
	movl	$1, %edi
	callq	_udelay
	movl	(%r12), %esi
	movq	%rbx, %rdi
	callq	_dw_pcie_readl_dbi
	andl	(%r13), %eax
	cmpl	%r15d, %eax
	je	LBB0_11
## %bb.5:
	movl	$1, %edi
	callq	_udelay
	movl	(%r12), %esi
	movq	%rbx, %rdi
	callq	_dw_pcie_readl_dbi
	andl	(%r13), %eax
	cmpl	%r15d, %eax
	je	LBB0_11
## %bb.6:
	movl	$1, %edi
	callq	_udelay
	movl	(%r12), %esi
	movq	%rbx, %rdi
	callq	_dw_pcie_readl_dbi
	andl	(%r13), %eax
	cmpl	%r15d, %eax
	je	LBB0_11
## %bb.7:
	movl	$1, %edi
	callq	_udelay
	movl	(%r12), %esi
	movq	%rbx, %rdi
	callq	_dw_pcie_readl_dbi
	andl	(%r13), %eax
	cmpl	%r15d, %eax
	je	LBB0_11
## %bb.8:
	movl	$1, %edi
	callq	_udelay
	movl	(%r12), %esi
	movq	%rbx, %rdi
	callq	_dw_pcie_readl_dbi
	andl	(%r13), %eax
	cmpl	%r15d, %eax
	je	LBB0_11
## %bb.9:
	movl	$1, %edi
	callq	_udelay
	movl	(%r12), %esi
	movq	%rbx, %rdi
	callq	_dw_pcie_readl_dbi
	andl	(%r13), %eax
	cmpl	%r15d, %eax
	je	LBB0_11
## %bb.10:
	movl	$1, %edi
	callq	_udelay
	movq	_ETIMEDOUT@GOTPCREL(%rip), %rax
	xorl	%r14d, %r14d
	subl	(%rax), %r14d
LBB0_11:
	movl	%r14d, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_PCIE_PHY_STAT,4,2              ## @PCIE_PHY_STAT
	.comm	_PCIE_PHY_STAT_ACK,4,2          ## @PCIE_PHY_STAT_ACK
	.comm	_ETIMEDOUT,4,2                  ## @ETIMEDOUT
	.no_dead_strip	_pcie_phy_poll_ack
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function pcie_phy_poll_ack
_pcie_phy_poll_ack:                     ; @pcie_phy_poll_ack
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x1
	ldr	x20, [x0]
Lloh0:
	adrp	x21, _PCIE_PHY_STAT@GOTPAGE
Lloh1:
	ldr	x21, [x21, _PCIE_PHY_STAT@GOTPAGEOFF]
	ldr	w1, [x21]
	mov	x0, x20
	bl	_dw_pcie_readl_dbi
Lloh2:
	adrp	x22, _PCIE_PHY_STAT_ACK@GOTPAGE
Lloh3:
	ldr	x22, [x22, _PCIE_PHY_STAT_ACK@GOTPAGEOFF]
	ldr	w8, [x22]
	and	w8, w8, w0
	cmp	w8, w19
	b.eq	LBB0_10
; %bb.1:
	mov	w0, #1
	bl	_udelay
	ldr	w1, [x21]
	mov	x0, x20
	bl	_dw_pcie_readl_dbi
	ldr	w8, [x22]
	and	w8, w8, w0
	cmp	w8, w19
	b.eq	LBB0_10
; %bb.2:
	mov	w0, #1
	bl	_udelay
	ldr	w1, [x21]
	mov	x0, x20
	bl	_dw_pcie_readl_dbi
	ldr	w8, [x22]
	and	w8, w8, w0
	cmp	w8, w19
	b.eq	LBB0_10
; %bb.3:
	mov	w0, #1
	bl	_udelay
	ldr	w1, [x21]
	mov	x0, x20
	bl	_dw_pcie_readl_dbi
	ldr	w8, [x22]
	and	w8, w8, w0
	cmp	w8, w19
	b.eq	LBB0_10
; %bb.4:
	mov	w0, #1
	bl	_udelay
	ldr	w1, [x21]
	mov	x0, x20
	bl	_dw_pcie_readl_dbi
	ldr	w8, [x22]
	and	w8, w8, w0
	cmp	w8, w19
	b.eq	LBB0_10
; %bb.5:
	mov	w0, #1
	bl	_udelay
	ldr	w1, [x21]
	mov	x0, x20
	bl	_dw_pcie_readl_dbi
	ldr	w8, [x22]
	and	w8, w8, w0
	cmp	w8, w19
	b.eq	LBB0_10
; %bb.6:
	mov	w0, #1
	bl	_udelay
	ldr	w1, [x21]
	mov	x0, x20
	bl	_dw_pcie_readl_dbi
	ldr	w8, [x22]
	and	w8, w8, w0
	cmp	w8, w19
	b.eq	LBB0_10
; %bb.7:
	mov	w0, #1
	bl	_udelay
	ldr	w1, [x21]
	mov	x0, x20
	bl	_dw_pcie_readl_dbi
	ldr	w8, [x22]
	and	w8, w8, w0
	cmp	w8, w19
	b.eq	LBB0_10
; %bb.8:
	mov	w0, #1
	bl	_udelay
	ldr	w1, [x21]
	mov	x0, x20
	bl	_dw_pcie_readl_dbi
	ldr	w8, [x22]
	and	w8, w8, w0
	cmp	w8, w19
	b.eq	LBB0_10
; %bb.9:
	mov	w0, #1
	bl	_udelay
	ldr	w1, [x21]
	mov	x0, x20
	bl	_dw_pcie_readl_dbi
	ldr	w8, [x22]
	and	w8, w8, w0
	cmp	w8, w19
	b.ne	LBB0_12
LBB0_10:
	mov	w0, #0
LBB0_11:
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
LBB0_12:
	mov	w0, #1
	bl	_udelay
Lloh4:
	adrp	x8, _ETIMEDOUT@GOTPAGE
Lloh5:
	ldr	x8, [x8, _ETIMEDOUT@GOTPAGEOFF]
Lloh6:
	ldr	w8, [x8]
	neg	w0, w8
	b	LBB0_11
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh4, Lloh5, Lloh6
	.cfi_endproc
                                        ; -- End function
	.comm	_PCIE_PHY_STAT,4,2              ; @PCIE_PHY_STAT
	.comm	_PCIE_PHY_STAT_ACK,4,2          ; @PCIE_PHY_STAT_ACK
	.comm	_ETIMEDOUT,4,2                  ; @ETIMEDOUT
	.no_dead_strip	_pcie_phy_poll_ack
.subsections_via_symbols
