	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_mlx5_query_hca_caps            ## -- Begin function mlx5_query_hca_caps
	.p2align	4, 0x90
_mlx5_query_hca_caps:                   ## @mlx5_query_hca_caps
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r14
	pushq	%rbx
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	movq	%rdi, %rbx
	movq	_MLX5_CAP_GENERAL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_mlx5_core_get_caps
	testl	%eax, %eax
	je	LBB0_1
LBB0_38:
	popq	%rbx
	popq	%r14
	popq	%rbp
	retq
LBB0_1:
	movq	_eth_net_offloads@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_MLX5_CAP_GEN
	testq	%rax, %rax
	je	LBB0_3
## %bb.2:
	movq	_MLX5_CAP_ETHERNET_OFFLOADS@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_mlx5_core_get_caps
	testl	%eax, %eax
	jne	LBB0_38
LBB0_3:
	movq	_ipoib_enhanced_offloads@GOTPCREL(%rip), %r14
	movl	(%r14), %esi
	movq	%rbx, %rdi
	callq	_MLX5_CAP_GEN
	testq	%rax, %rax
	je	LBB0_5
## %bb.4:
	movq	_MLX5_CAP_IPOIB_ENHANCED_OFFLOADS@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_mlx5_core_get_caps
	testl	%eax, %eax
	jne	LBB0_38
LBB0_5:
	movq	_pg@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_MLX5_CAP_GEN
	testq	%rax, %rax
	je	LBB0_7
## %bb.6:
	movq	_MLX5_CAP_ODP@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_mlx5_core_get_caps
	testl	%eax, %eax
	jne	LBB0_38
LBB0_7:
	movq	_atomic@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_MLX5_CAP_GEN
	testq	%rax, %rax
	je	LBB0_9
## %bb.8:
	movq	_MLX5_CAP_ATOMIC@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_mlx5_core_get_caps
	testl	%eax, %eax
	jne	LBB0_38
LBB0_9:
	movq	_roce@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_MLX5_CAP_GEN
	testq	%rax, %rax
	je	LBB0_11
## %bb.10:
	movq	_MLX5_CAP_ROCE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_mlx5_core_get_caps
	testl	%eax, %eax
	jne	LBB0_38
LBB0_11:
	movq	_nic_flow_table@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_MLX5_CAP_GEN
	testq	%rax, %rax
	jne	LBB0_13
## %bb.12:
	movl	(%r14), %esi
	movq	%rbx, %rdi
	callq	_MLX5_CAP_GEN
	testq	%rax, %rax
	je	LBB0_14
LBB0_13:
	movq	_MLX5_CAP_FLOW_TABLE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_mlx5_core_get_caps
	testl	%eax, %eax
	jne	LBB0_38
LBB0_14:
	movq	_vport_group_manager@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_MLX5_CAP_GEN
	testq	%rax, %rax
	je	LBB0_17
## %bb.15:
	movq	%rbx, %rdi
	callq	_MLX5_ESWITCH_MANAGER
	testq	%rax, %rax
	je	LBB0_17
## %bb.16:
	movq	_MLX5_CAP_ESWITCH_FLOW_TABLE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_mlx5_core_get_caps
	testl	%eax, %eax
	jne	LBB0_38
LBB0_17:
	movq	%rbx, %rdi
	callq	_MLX5_ESWITCH_MANAGER
	testq	%rax, %rax
	je	LBB0_19
## %bb.18:
	movq	_MLX5_CAP_ESWITCH@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_mlx5_core_get_caps
	testl	%eax, %eax
	jne	LBB0_38
LBB0_19:
	movq	_vector_calc@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_MLX5_CAP_GEN
	testq	%rax, %rax
	je	LBB0_21
## %bb.20:
	movq	_MLX5_CAP_VECTOR_CALC@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_mlx5_core_get_caps
	testl	%eax, %eax
	jne	LBB0_38
LBB0_21:
	movq	_qos@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_MLX5_CAP_GEN
	testq	%rax, %rax
	je	LBB0_23
## %bb.22:
	movq	_MLX5_CAP_QOS@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_mlx5_core_get_caps
	testl	%eax, %eax
	jne	LBB0_38
LBB0_23:
	movq	_debug@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_MLX5_CAP_GEN
	testq	%rax, %rax
	je	LBB0_25
## %bb.24:
	movq	_MLX5_CAP_DEBUG@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_mlx5_core_get_caps
LBB0_25:
	movq	_pcam_reg@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_MLX5_CAP_GEN
	testq	%rax, %rax
	je	LBB0_27
## %bb.26:
	movq	%rbx, %rdi
	callq	_mlx5_get_pcam_reg
LBB0_27:
	movq	_mcam_reg@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_MLX5_CAP_GEN
	testq	%rax, %rax
	je	LBB0_29
## %bb.28:
	movq	%rbx, %rdi
	callq	_mlx5_get_mcam_reg
LBB0_29:
	movq	_qcam_reg@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_MLX5_CAP_GEN
	testq	%rax, %rax
	je	LBB0_31
## %bb.30:
	movq	%rbx, %rdi
	callq	_mlx5_get_qcam_reg
LBB0_31:
	movq	_device_memory@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_MLX5_CAP_GEN
	testq	%rax, %rax
	je	LBB0_33
## %bb.32:
	movq	_MLX5_CAP_DEV_MEM@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_mlx5_core_get_caps
	testl	%eax, %eax
	jne	LBB0_38
LBB0_33:
	movq	_event_cap@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_MLX5_CAP_GEN
	testq	%rax, %rax
	je	LBB0_35
## %bb.34:
	movq	_MLX5_CAP_DEV_EVENT@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_mlx5_core_get_caps
	testl	%eax, %eax
	jne	LBB0_38
LBB0_35:
	movq	_tls@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_MLX5_CAP_GEN
	testq	%rax, %rax
	je	LBB0_37
## %bb.36:
	movq	_MLX5_CAP_TLS@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_mlx5_core_get_caps
	testl	%eax, %eax
	jne	LBB0_38
LBB0_37:
	xorl	%eax, %eax
	jmp	LBB0_38
	.cfi_endproc
                                        ## -- End function
	.comm	_MLX5_CAP_GENERAL,4,2           ## @MLX5_CAP_GENERAL
	.comm	_eth_net_offloads,4,2           ## @eth_net_offloads
	.comm	_MLX5_CAP_ETHERNET_OFFLOADS,4,2 ## @MLX5_CAP_ETHERNET_OFFLOADS
	.comm	_ipoib_enhanced_offloads,4,2    ## @ipoib_enhanced_offloads
	.comm	_MLX5_CAP_IPOIB_ENHANCED_OFFLOADS,4,2 ## @MLX5_CAP_IPOIB_ENHANCED_OFFLOADS
	.comm	_pg,4,2                         ## @pg
	.comm	_MLX5_CAP_ODP,4,2               ## @MLX5_CAP_ODP
	.comm	_atomic,4,2                     ## @atomic
	.comm	_MLX5_CAP_ATOMIC,4,2            ## @MLX5_CAP_ATOMIC
	.comm	_roce,4,2                       ## @roce
	.comm	_MLX5_CAP_ROCE,4,2              ## @MLX5_CAP_ROCE
	.comm	_nic_flow_table,4,2             ## @nic_flow_table
	.comm	_MLX5_CAP_FLOW_TABLE,4,2        ## @MLX5_CAP_FLOW_TABLE
	.comm	_vport_group_manager,4,2        ## @vport_group_manager
	.comm	_MLX5_CAP_ESWITCH_FLOW_TABLE,4,2 ## @MLX5_CAP_ESWITCH_FLOW_TABLE
	.comm	_MLX5_CAP_ESWITCH,4,2           ## @MLX5_CAP_ESWITCH
	.comm	_vector_calc,4,2                ## @vector_calc
	.comm	_MLX5_CAP_VECTOR_CALC,4,2       ## @MLX5_CAP_VECTOR_CALC
	.comm	_qos,4,2                        ## @qos
	.comm	_MLX5_CAP_QOS,4,2               ## @MLX5_CAP_QOS
	.comm	_debug,4,2                      ## @debug
	.comm	_MLX5_CAP_DEBUG,4,2             ## @MLX5_CAP_DEBUG
	.comm	_pcam_reg,4,2                   ## @pcam_reg
	.comm	_mcam_reg,4,2                   ## @mcam_reg
	.comm	_qcam_reg,4,2                   ## @qcam_reg
	.comm	_device_memory,4,2              ## @device_memory
	.comm	_MLX5_CAP_DEV_MEM,4,2           ## @MLX5_CAP_DEV_MEM
	.comm	_event_cap,4,2                  ## @event_cap
	.comm	_MLX5_CAP_DEV_EVENT,4,2         ## @MLX5_CAP_DEV_EVENT
	.comm	_tls,4,2                        ## @tls
	.comm	_MLX5_CAP_TLS,4,2               ## @MLX5_CAP_TLS
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_mlx5_query_hca_caps            ; -- Begin function mlx5_query_hca_caps
	.p2align	2
_mlx5_query_hca_caps:                   ; @mlx5_query_hca_caps
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x19, x0
Lloh0:
	adrp	x8, _MLX5_CAP_GENERAL@GOTPAGE
Lloh1:
	ldr	x8, [x8, _MLX5_CAP_GENERAL@GOTPAGEOFF]
Lloh2:
	ldr	w1, [x8]
	bl	_mlx5_core_get_caps
	cbz	w0, LBB0_2
LBB0_1:
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	ret
LBB0_2:
Lloh3:
	adrp	x8, _eth_net_offloads@GOTPAGE
Lloh4:
	ldr	x8, [x8, _eth_net_offloads@GOTPAGEOFF]
Lloh5:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_MLX5_CAP_GEN
	cbz	x0, LBB0_4
; %bb.3:
Lloh6:
	adrp	x8, _MLX5_CAP_ETHERNET_OFFLOADS@GOTPAGE
Lloh7:
	ldr	x8, [x8, _MLX5_CAP_ETHERNET_OFFLOADS@GOTPAGEOFF]
Lloh8:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_mlx5_core_get_caps
	cbnz	w0, LBB0_1
LBB0_4:
Lloh9:
	adrp	x20, _ipoib_enhanced_offloads@GOTPAGE
Lloh10:
	ldr	x20, [x20, _ipoib_enhanced_offloads@GOTPAGEOFF]
	ldr	w1, [x20]
	mov	x0, x19
	bl	_MLX5_CAP_GEN
	cbz	x0, LBB0_6
; %bb.5:
Lloh11:
	adrp	x8, _MLX5_CAP_IPOIB_ENHANCED_OFFLOADS@GOTPAGE
Lloh12:
	ldr	x8, [x8, _MLX5_CAP_IPOIB_ENHANCED_OFFLOADS@GOTPAGEOFF]
Lloh13:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_mlx5_core_get_caps
	cbnz	w0, LBB0_1
LBB0_6:
Lloh14:
	adrp	x8, _pg@GOTPAGE
Lloh15:
	ldr	x8, [x8, _pg@GOTPAGEOFF]
Lloh16:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_MLX5_CAP_GEN
	cbz	x0, LBB0_8
; %bb.7:
Lloh17:
	adrp	x8, _MLX5_CAP_ODP@GOTPAGE
Lloh18:
	ldr	x8, [x8, _MLX5_CAP_ODP@GOTPAGEOFF]
Lloh19:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_mlx5_core_get_caps
	cbnz	w0, LBB0_1
LBB0_8:
Lloh20:
	adrp	x8, _atomic@GOTPAGE
Lloh21:
	ldr	x8, [x8, _atomic@GOTPAGEOFF]
Lloh22:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_MLX5_CAP_GEN
	cbz	x0, LBB0_10
; %bb.9:
Lloh23:
	adrp	x8, _MLX5_CAP_ATOMIC@GOTPAGE
Lloh24:
	ldr	x8, [x8, _MLX5_CAP_ATOMIC@GOTPAGEOFF]
Lloh25:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_mlx5_core_get_caps
	cbnz	w0, LBB0_1
LBB0_10:
Lloh26:
	adrp	x8, _roce@GOTPAGE
Lloh27:
	ldr	x8, [x8, _roce@GOTPAGEOFF]
Lloh28:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_MLX5_CAP_GEN
	cbz	x0, LBB0_12
; %bb.11:
Lloh29:
	adrp	x8, _MLX5_CAP_ROCE@GOTPAGE
Lloh30:
	ldr	x8, [x8, _MLX5_CAP_ROCE@GOTPAGEOFF]
Lloh31:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_mlx5_core_get_caps
	cbnz	w0, LBB0_1
LBB0_12:
Lloh32:
	adrp	x8, _nic_flow_table@GOTPAGE
Lloh33:
	ldr	x8, [x8, _nic_flow_table@GOTPAGEOFF]
Lloh34:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_MLX5_CAP_GEN
	cbnz	x0, LBB0_14
; %bb.13:
	ldr	w1, [x20]
	mov	x0, x19
	bl	_MLX5_CAP_GEN
	cbz	x0, LBB0_15
LBB0_14:
Lloh35:
	adrp	x8, _MLX5_CAP_FLOW_TABLE@GOTPAGE
Lloh36:
	ldr	x8, [x8, _MLX5_CAP_FLOW_TABLE@GOTPAGEOFF]
Lloh37:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_mlx5_core_get_caps
	cbnz	w0, LBB0_1
LBB0_15:
Lloh38:
	adrp	x8, _vport_group_manager@GOTPAGE
Lloh39:
	ldr	x8, [x8, _vport_group_manager@GOTPAGEOFF]
Lloh40:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_MLX5_CAP_GEN
	cbz	x0, LBB0_18
; %bb.16:
	mov	x0, x19
	bl	_MLX5_ESWITCH_MANAGER
	cbz	x0, LBB0_18
; %bb.17:
Lloh41:
	adrp	x8, _MLX5_CAP_ESWITCH_FLOW_TABLE@GOTPAGE
Lloh42:
	ldr	x8, [x8, _MLX5_CAP_ESWITCH_FLOW_TABLE@GOTPAGEOFF]
Lloh43:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_mlx5_core_get_caps
	cbnz	w0, LBB0_1
LBB0_18:
	mov	x0, x19
	bl	_MLX5_ESWITCH_MANAGER
	cbz	x0, LBB0_20
; %bb.19:
Lloh44:
	adrp	x8, _MLX5_CAP_ESWITCH@GOTPAGE
Lloh45:
	ldr	x8, [x8, _MLX5_CAP_ESWITCH@GOTPAGEOFF]
Lloh46:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_mlx5_core_get_caps
	cbnz	w0, LBB0_1
LBB0_20:
Lloh47:
	adrp	x8, _vector_calc@GOTPAGE
Lloh48:
	ldr	x8, [x8, _vector_calc@GOTPAGEOFF]
Lloh49:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_MLX5_CAP_GEN
	cbz	x0, LBB0_22
; %bb.21:
Lloh50:
	adrp	x8, _MLX5_CAP_VECTOR_CALC@GOTPAGE
Lloh51:
	ldr	x8, [x8, _MLX5_CAP_VECTOR_CALC@GOTPAGEOFF]
Lloh52:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_mlx5_core_get_caps
	cbnz	w0, LBB0_1
LBB0_22:
Lloh53:
	adrp	x8, _qos@GOTPAGE
Lloh54:
	ldr	x8, [x8, _qos@GOTPAGEOFF]
Lloh55:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_MLX5_CAP_GEN
	cbz	x0, LBB0_24
; %bb.23:
Lloh56:
	adrp	x8, _MLX5_CAP_QOS@GOTPAGE
Lloh57:
	ldr	x8, [x8, _MLX5_CAP_QOS@GOTPAGEOFF]
Lloh58:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_mlx5_core_get_caps
	cbnz	w0, LBB0_1
LBB0_24:
Lloh59:
	adrp	x8, _debug@GOTPAGE
Lloh60:
	ldr	x8, [x8, _debug@GOTPAGEOFF]
Lloh61:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_MLX5_CAP_GEN
	cbz	x0, LBB0_26
; %bb.25:
Lloh62:
	adrp	x8, _MLX5_CAP_DEBUG@GOTPAGE
Lloh63:
	ldr	x8, [x8, _MLX5_CAP_DEBUG@GOTPAGEOFF]
Lloh64:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_mlx5_core_get_caps
LBB0_26:
Lloh65:
	adrp	x8, _pcam_reg@GOTPAGE
Lloh66:
	ldr	x8, [x8, _pcam_reg@GOTPAGEOFF]
Lloh67:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_MLX5_CAP_GEN
	cbz	x0, LBB0_28
; %bb.27:
	mov	x0, x19
	bl	_mlx5_get_pcam_reg
LBB0_28:
Lloh68:
	adrp	x8, _mcam_reg@GOTPAGE
Lloh69:
	ldr	x8, [x8, _mcam_reg@GOTPAGEOFF]
Lloh70:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_MLX5_CAP_GEN
	cbz	x0, LBB0_30
; %bb.29:
	mov	x0, x19
	bl	_mlx5_get_mcam_reg
LBB0_30:
Lloh71:
	adrp	x8, _qcam_reg@GOTPAGE
Lloh72:
	ldr	x8, [x8, _qcam_reg@GOTPAGEOFF]
Lloh73:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_MLX5_CAP_GEN
	cbz	x0, LBB0_32
; %bb.31:
	mov	x0, x19
	bl	_mlx5_get_qcam_reg
LBB0_32:
Lloh74:
	adrp	x8, _device_memory@GOTPAGE
Lloh75:
	ldr	x8, [x8, _device_memory@GOTPAGEOFF]
Lloh76:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_MLX5_CAP_GEN
	cbz	x0, LBB0_34
; %bb.33:
Lloh77:
	adrp	x8, _MLX5_CAP_DEV_MEM@GOTPAGE
Lloh78:
	ldr	x8, [x8, _MLX5_CAP_DEV_MEM@GOTPAGEOFF]
Lloh79:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_mlx5_core_get_caps
	cbnz	w0, LBB0_1
LBB0_34:
Lloh80:
	adrp	x8, _event_cap@GOTPAGE
Lloh81:
	ldr	x8, [x8, _event_cap@GOTPAGEOFF]
Lloh82:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_MLX5_CAP_GEN
	cbz	x0, LBB0_36
; %bb.35:
Lloh83:
	adrp	x8, _MLX5_CAP_DEV_EVENT@GOTPAGE
Lloh84:
	ldr	x8, [x8, _MLX5_CAP_DEV_EVENT@GOTPAGEOFF]
Lloh85:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_mlx5_core_get_caps
	cbnz	w0, LBB0_1
LBB0_36:
Lloh86:
	adrp	x8, _tls@GOTPAGE
Lloh87:
	ldr	x8, [x8, _tls@GOTPAGEOFF]
Lloh88:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_MLX5_CAP_GEN
	cbz	x0, LBB0_38
; %bb.37:
Lloh89:
	adrp	x8, _MLX5_CAP_TLS@GOTPAGE
Lloh90:
	ldr	x8, [x8, _MLX5_CAP_TLS@GOTPAGEOFF]
Lloh91:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_mlx5_core_get_caps
	cbnz	w0, LBB0_1
LBB0_38:
	mov	w0, #0
	b	LBB0_1
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGot	Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh16
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh19
	.loh AdrpLdrGotLdr	Lloh20, Lloh21, Lloh22
	.loh AdrpLdrGotLdr	Lloh23, Lloh24, Lloh25
	.loh AdrpLdrGotLdr	Lloh26, Lloh27, Lloh28
	.loh AdrpLdrGotLdr	Lloh29, Lloh30, Lloh31
	.loh AdrpLdrGotLdr	Lloh32, Lloh33, Lloh34
	.loh AdrpLdrGotLdr	Lloh35, Lloh36, Lloh37
	.loh AdrpLdrGotLdr	Lloh38, Lloh39, Lloh40
	.loh AdrpLdrGotLdr	Lloh41, Lloh42, Lloh43
	.loh AdrpLdrGotLdr	Lloh44, Lloh45, Lloh46
	.loh AdrpLdrGotLdr	Lloh47, Lloh48, Lloh49
	.loh AdrpLdrGotLdr	Lloh50, Lloh51, Lloh52
	.loh AdrpLdrGotLdr	Lloh53, Lloh54, Lloh55
	.loh AdrpLdrGotLdr	Lloh56, Lloh57, Lloh58
	.loh AdrpLdrGotLdr	Lloh59, Lloh60, Lloh61
	.loh AdrpLdrGotLdr	Lloh62, Lloh63, Lloh64
	.loh AdrpLdrGotLdr	Lloh65, Lloh66, Lloh67
	.loh AdrpLdrGotLdr	Lloh68, Lloh69, Lloh70
	.loh AdrpLdrGotLdr	Lloh71, Lloh72, Lloh73
	.loh AdrpLdrGotLdr	Lloh74, Lloh75, Lloh76
	.loh AdrpLdrGotLdr	Lloh77, Lloh78, Lloh79
	.loh AdrpLdrGotLdr	Lloh80, Lloh81, Lloh82
	.loh AdrpLdrGotLdr	Lloh83, Lloh84, Lloh85
	.loh AdrpLdrGotLdr	Lloh86, Lloh87, Lloh88
	.loh AdrpLdrGotLdr	Lloh89, Lloh90, Lloh91
	.cfi_endproc
                                        ; -- End function
	.comm	_MLX5_CAP_GENERAL,4,2           ; @MLX5_CAP_GENERAL
	.comm	_eth_net_offloads,4,2           ; @eth_net_offloads
	.comm	_MLX5_CAP_ETHERNET_OFFLOADS,4,2 ; @MLX5_CAP_ETHERNET_OFFLOADS
	.comm	_ipoib_enhanced_offloads,4,2    ; @ipoib_enhanced_offloads
	.comm	_MLX5_CAP_IPOIB_ENHANCED_OFFLOADS,4,2 ; @MLX5_CAP_IPOIB_ENHANCED_OFFLOADS
	.comm	_pg,4,2                         ; @pg
	.comm	_MLX5_CAP_ODP,4,2               ; @MLX5_CAP_ODP
	.comm	_atomic,4,2                     ; @atomic
	.comm	_MLX5_CAP_ATOMIC,4,2            ; @MLX5_CAP_ATOMIC
	.comm	_roce,4,2                       ; @roce
	.comm	_MLX5_CAP_ROCE,4,2              ; @MLX5_CAP_ROCE
	.comm	_nic_flow_table,4,2             ; @nic_flow_table
	.comm	_MLX5_CAP_FLOW_TABLE,4,2        ; @MLX5_CAP_FLOW_TABLE
	.comm	_vport_group_manager,4,2        ; @vport_group_manager
	.comm	_MLX5_CAP_ESWITCH_FLOW_TABLE,4,2 ; @MLX5_CAP_ESWITCH_FLOW_TABLE
	.comm	_MLX5_CAP_ESWITCH,4,2           ; @MLX5_CAP_ESWITCH
	.comm	_vector_calc,4,2                ; @vector_calc
	.comm	_MLX5_CAP_VECTOR_CALC,4,2       ; @MLX5_CAP_VECTOR_CALC
	.comm	_qos,4,2                        ; @qos
	.comm	_MLX5_CAP_QOS,4,2               ; @MLX5_CAP_QOS
	.comm	_debug,4,2                      ; @debug
	.comm	_MLX5_CAP_DEBUG,4,2             ; @MLX5_CAP_DEBUG
	.comm	_pcam_reg,4,2                   ; @pcam_reg
	.comm	_mcam_reg,4,2                   ; @mcam_reg
	.comm	_qcam_reg,4,2                   ; @qcam_reg
	.comm	_device_memory,4,2              ; @device_memory
	.comm	_MLX5_CAP_DEV_MEM,4,2           ; @MLX5_CAP_DEV_MEM
	.comm	_event_cap,4,2                  ; @event_cap
	.comm	_MLX5_CAP_DEV_EVENT,4,2         ; @MLX5_CAP_DEV_EVENT
	.comm	_tls,4,2                        ; @tls
	.comm	_MLX5_CAP_TLS,4,2               ; @MLX5_CAP_TLS
.subsections_via_symbols
