	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function rtw8822b_coex_cfg_ant_switch
_rtw8822b_coex_cfg_ant_switch:          ## @rtw8822b_coex_cfg_ant_switch
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%esi, %eax
	shll	$8, %eax
	addl	%edx, %eax
	cmpl	16(%rdi), %eax
	jne	LBB0_1
## %bb.16:
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_1:
	movl	%edx, %ebx
	movq	%rdi, %r14
	movl	%eax, 16(%rdi)
	cmpq	$0, 8(%rdi)
	movl	$133, %eax
	cmovel	%esi, %eax
	cmpl	$132, %esi
	cmovnel	%esi, %eax
	movl	(%rdi), %r15d
	addl	$-128, %eax
	cmpl	$5, %eax
	ja	LBB0_3
## %bb.2:
	leaq	LJTI0_0(%rip), %rcx
	movslq	(%rcx,%rax,4), %rax
	addq	%rcx, %rax
	jmpq	*%rax
LBB0_11:
	xorl	%ebx, %ebx
	cmpl	$1, %r15d
	sete	%bl
	movq	_REG_LED_CFG@GOTPCREL(%rip), %r15
	movl	(%r15), %esi
	addl	$2, %esi
	movq	_BIT_DPDT_SEL_EN@GOTPCREL(%rip), %rax
	movswl	2(%rax), %edx
	movq	%r14, %rdi
	xorl	%ecx, %ecx
	callq	_rtw_write8_mask
	movl	(%r15), %esi
	addl	$3, %esi
	movq	_BIT_DPDT_WL_SEL@GOTPCREL(%rip), %rax
	movsbl	3(%rax), %edx
	movq	%r14, %rdi
	movl	$1, %ecx
	callq	_rtw_write8_mask
	movq	_REG_RFE_CTRL8@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_BIT_MASK_RFE_SEL89@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r14, %rdi
	movl	$102, %ecx
	callq	_rtw_write8_mask
	movl	$2, %ecx
	subl	%ebx, %ecx
	jmp	LBB0_9
LBB0_13:
	xorl	%ebx, %ebx
	cmpl	$1, %r15d
	sete	%bl
	movq	_REG_LED_CFG@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	addl	$2, %esi
	movq	_BIT_DPDT_SEL_EN@GOTPCREL(%rip), %rax
	movswl	2(%rax), %edx
	movq	%r14, %rdi
	movl	$1, %ecx
	callq	_rtw_write8_mask
	movq	_REG_PAD_CTRL1@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_BIT_SW_DPDT_SEL_DATA@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r14, %rdi
	movl	%ebx, %ecx
	jmp	LBB0_10
LBB0_14:
	movq	_REG_LED_CFG@GOTPCREL(%rip), %rbx
	movl	(%rbx), %esi
	addl	$2, %esi
	movq	_BIT_DPDT_SEL_EN@GOTPCREL(%rip), %rax
	movswl	2(%rax), %edx
	movq	%r14, %rdi
	xorl	%ecx, %ecx
	callq	_rtw_write8_mask
	movl	(%rbx), %esi
	addl	$3, %esi
	movq	_BIT_DPDT_WL_SEL@GOTPCREL(%rip), %rax
	movsbl	3(%rax), %edx
	movq	%r14, %rdi
	movl	$1, %ecx
	jmp	LBB0_10
LBB0_15:
	movq	_REG_LED_CFG@GOTPCREL(%rip), %rbx
	movl	(%rbx), %esi
	addl	$2, %esi
	movq	_BIT_DPDT_SEL_EN@GOTPCREL(%rip), %rax
	movswl	2(%rax), %edx
	movq	%r14, %rdi
	xorl	%ecx, %ecx
	callq	_rtw_write8_mask
	movl	(%rbx), %esi
	addl	$3, %esi
	movq	_BIT_DPDT_WL_SEL@GOTPCREL(%rip), %rax
	movsbl	3(%rax), %edx
	movq	%r14, %rdi
	xorl	%ecx, %ecx
	jmp	LBB0_10
LBB0_3:
	movq	_REG_LED_CFG@GOTPCREL(%rip), %r12
	movl	(%r12), %esi
	addl	$2, %esi
	movq	_BIT_DPDT_SEL_EN@GOTPCREL(%rip), %rax
	movswl	2(%rax), %edx
	movq	%r14, %rdi
	xorl	%ecx, %ecx
	callq	_rtw_write8_mask
	movl	(%r12), %esi
	addl	$3, %esi
	movq	_BIT_DPDT_WL_SEL@GOTPCREL(%rip), %rax
	movsbl	3(%rax), %edx
	movq	%r14, %rdi
	movl	$1, %ecx
	callq	_rtw_write8_mask
	movq	_REG_RFE_CTRL8@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_BIT_MASK_RFE_SEL89@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r14, %rdi
	movl	$119, %ecx
	callq	_rtw_write8_mask
	movq	_COEX_SWITCH_TO_WLG_BT@GOTPCREL(%rip), %rax
	cmpl	%ebx, (%rax)
	jne	LBB0_7
## %bb.4:
	movl	4(%r14), %eax
	cmpl	$4, %eax
	je	LBB0_6
## %bb.5:
	movl	$3, %ecx
	cmpl	$2, %eax
	je	LBB0_6
	jmp	LBB0_9
LBB0_12:
	movq	_REG_LED_CFG@GOTPCREL(%rip), %rbx
	movl	(%rbx), %esi
	addl	$2, %esi
	movq	_BIT_DPDT_SEL_EN@GOTPCREL(%rip), %rax
	movswl	2(%rax), %edx
	movq	%r14, %rdi
	xorl	%ecx, %ecx
	callq	_rtw_write8_mask
	movl	(%rbx), %esi
	addl	$3, %esi
	movq	_BIT_DPDT_WL_SEL@GOTPCREL(%rip), %rax
	movsbl	3(%rax), %edx
	movq	%r14, %rdi
	movl	$1, %ecx
	callq	_rtw_write8_mask
	movq	_REG_RFE_CTRL8@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_BIT_MASK_RFE_SEL89@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r14, %rdi
	movl	$136, %ecx
	jmp	LBB0_10
LBB0_7:
	movq	_COEX_SWITCH_TO_WLG@GOTPCREL(%rip), %rax
	cmpl	%ebx, (%rax)
	jne	LBB0_8
LBB0_6:
	xorl	%eax, %eax
	cmpl	$1, %r15d
	sete	%al
	movl	$2, %ecx
	subl	%eax, %ecx
	jmp	LBB0_9
LBB0_8:
	xorl	%ecx, %ecx
	cmpl	$1, %r15d
	sete	%cl
	incl	%ecx
LBB0_9:
	movq	_REG_RFE_INV8@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_BIT_MASK_RFE_INV89@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r14, %rdi
LBB0_10:
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_rtw_write8_mask                ## TAILCALL
	.cfi_endproc
	.p2align	2, 0x90
	.data_region jt32
.set L0_0_set_11, LBB0_11-LJTI0_0
.set L0_0_set_13, LBB0_13-LJTI0_0
.set L0_0_set_14, LBB0_14-LJTI0_0
.set L0_0_set_15, LBB0_15-LJTI0_0
.set L0_0_set_3, LBB0_3-LJTI0_0
.set L0_0_set_12, LBB0_12-LJTI0_0
LJTI0_0:
	.long	L0_0_set_11
	.long	L0_0_set_13
	.long	L0_0_set_14
	.long	L0_0_set_15
	.long	L0_0_set_3
	.long	L0_0_set_12
	.end_data_region
                                        ## -- End function
	.comm	_REG_LED_CFG,4,2                ## @REG_LED_CFG
	.comm	_BIT_DPDT_SEL_EN,4,2            ## @BIT_DPDT_SEL_EN
	.comm	_BIT_DPDT_WL_SEL,4,2            ## @BIT_DPDT_WL_SEL
	.comm	_REG_RFE_CTRL8,4,2              ## @REG_RFE_CTRL8
	.comm	_BIT_MASK_RFE_SEL89,4,2         ## @BIT_MASK_RFE_SEL89
	.comm	_COEX_SWITCH_TO_WLG_BT,4,2      ## @COEX_SWITCH_TO_WLG_BT
	.comm	_COEX_SWITCH_TO_WLG,4,2         ## @COEX_SWITCH_TO_WLG
	.comm	_REG_RFE_INV8,4,2               ## @REG_RFE_INV8
	.comm	_BIT_MASK_RFE_INV89,4,2         ## @BIT_MASK_RFE_INV89
	.comm	_REG_PAD_CTRL1,4,2              ## @REG_PAD_CTRL1
	.comm	_BIT_SW_DPDT_SEL_DATA,4,2       ## @BIT_SW_DPDT_SEL_DATA
	.no_dead_strip	_rtw8822b_coex_cfg_ant_switch
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function rtw8822b_coex_cfg_ant_switch
_rtw8822b_coex_cfg_ant_switch:          ; @rtw8822b_coex_cfg_ant_switch
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	add	w8, w2, w1, lsl #8
	ldr	w9, [x0, #16]
	cmp	w8, w9
	b.ne	LBB0_2
; %bb.1:
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
LBB0_2:
	mov	x20, x2
	mov	x19, x0
	str	w8, [x0, #16]
	ldr	x8, [x0, #8]
	cmp	x8, #0
	mov	w8, #132
	ccmp	w1, w8, #0, ne
	mov	w8, #133
	csel	w8, w8, w1, eq
	ldr	w21, [x0]
	sub	w8, w8, #128
	cmp	w8, #5
	b.hi	LBB0_6
; %bb.3:
Lloh0:
	adrp	x9, lJTI0_0@PAGE
Lloh1:
	add	x9, x9, lJTI0_0@PAGEOFF
	adr	x10, LBB0_4
	ldrb	w11, [x9, x8]
	add	x10, x10, x11, lsl #2
	br	x10
LBB0_4:
Lloh2:
	adrp	x20, _REG_LED_CFG@GOTPAGE
Lloh3:
	ldr	x20, [x20, _REG_LED_CFG@GOTPAGEOFF]
	ldr	w8, [x20]
	add	w1, w8, #2
Lloh4:
	adrp	x8, _BIT_DPDT_SEL_EN@GOTPAGE
Lloh5:
	ldr	x8, [x8, _BIT_DPDT_SEL_EN@GOTPAGEOFF]
Lloh6:
	ldrsh	w2, [x8, #2]
	mov	x0, x19
	mov	w3, #0
	bl	_rtw_write8_mask
	ldr	w8, [x20]
	add	w1, w8, #3
Lloh7:
	adrp	x8, _BIT_DPDT_WL_SEL@GOTPAGE
Lloh8:
	ldr	x8, [x8, _BIT_DPDT_WL_SEL@GOTPAGEOFF]
Lloh9:
	ldrsb	w2, [x8, #3]
	mov	w20, #1
	mov	x0, x19
	mov	w3, #1
	bl	_rtw_write8_mask
Lloh10:
	adrp	x8, _REG_RFE_CTRL8@GOTPAGE
Lloh11:
	ldr	x8, [x8, _REG_RFE_CTRL8@GOTPAGEOFF]
Lloh12:
	ldr	w1, [x8]
Lloh13:
	adrp	x8, _BIT_MASK_RFE_SEL89@GOTPAGE
Lloh14:
	ldr	x8, [x8, _BIT_MASK_RFE_SEL89@GOTPAGEOFF]
Lloh15:
	ldr	w2, [x8]
	mov	x0, x19
	mov	w3, #102
	bl	_rtw_write8_mask
	cmp	w21, #1
	cinc	w3, w20, ne
	b	LBB0_15
LBB0_5:
Lloh16:
	adrp	x20, _REG_LED_CFG@GOTPAGE
Lloh17:
	ldr	x20, [x20, _REG_LED_CFG@GOTPAGEOFF]
	ldr	w8, [x20]
	add	w1, w8, #2
Lloh18:
	adrp	x8, _BIT_DPDT_SEL_EN@GOTPAGE
Lloh19:
	ldr	x8, [x8, _BIT_DPDT_SEL_EN@GOTPAGEOFF]
Lloh20:
	ldrsh	w2, [x8, #2]
	mov	x0, x19
	mov	w3, #0
	bl	_rtw_write8_mask
	ldr	w8, [x20]
Lloh21:
	adrp	x9, _BIT_DPDT_WL_SEL@GOTPAGE
Lloh22:
	ldr	x9, [x9, _BIT_DPDT_WL_SEL@GOTPAGEOFF]
	add	w1, w8, #3
Lloh23:
	ldrsb	w2, [x9, #3]
	mov	x0, x19
	mov	w3, #1
	b	LBB0_16
LBB0_6:
Lloh24:
	adrp	x22, _REG_LED_CFG@GOTPAGE
Lloh25:
	ldr	x22, [x22, _REG_LED_CFG@GOTPAGEOFF]
	ldr	w8, [x22]
	add	w1, w8, #2
Lloh26:
	adrp	x8, _BIT_DPDT_SEL_EN@GOTPAGE
Lloh27:
	ldr	x8, [x8, _BIT_DPDT_SEL_EN@GOTPAGEOFF]
Lloh28:
	ldrsh	w2, [x8, #2]
	mov	x0, x19
	mov	w3, #0
	bl	_rtw_write8_mask
	ldr	w8, [x22]
	add	w1, w8, #3
Lloh29:
	adrp	x8, _BIT_DPDT_WL_SEL@GOTPAGE
Lloh30:
	ldr	x8, [x8, _BIT_DPDT_WL_SEL@GOTPAGEOFF]
Lloh31:
	ldrsb	w2, [x8, #3]
	mov	w22, #1
	mov	x0, x19
	mov	w3, #1
	bl	_rtw_write8_mask
Lloh32:
	adrp	x8, _REG_RFE_CTRL8@GOTPAGE
Lloh33:
	ldr	x8, [x8, _REG_RFE_CTRL8@GOTPAGEOFF]
Lloh34:
	ldr	w1, [x8]
Lloh35:
	adrp	x8, _BIT_MASK_RFE_SEL89@GOTPAGE
Lloh36:
	ldr	x8, [x8, _BIT_MASK_RFE_SEL89@GOTPAGEOFF]
Lloh37:
	ldr	w2, [x8]
	mov	x0, x19
	mov	w3, #119
	bl	_rtw_write8_mask
Lloh38:
	adrp	x8, _COEX_SWITCH_TO_WLG_BT@GOTPAGE
Lloh39:
	ldr	x8, [x8, _COEX_SWITCH_TO_WLG_BT@GOTPAGEOFF]
Lloh40:
	ldr	w8, [x8]
	cmp	w8, w20
	b.ne	LBB0_13
; %bb.7:
	ldr	w8, [x19, #4]
	cmp	w8, #4
	b.eq	LBB0_9
; %bb.8:
	cmp	w8, #2
	b.ne	LBB0_14
LBB0_9:
	cmp	w21, #1
	mov	w8, #1
	cinc	w3, w8, ne
	b	LBB0_15
LBB0_10:
	cmp	w21, #1
Lloh41:
	adrp	x8, _REG_LED_CFG@GOTPAGE
Lloh42:
	ldr	x8, [x8, _REG_LED_CFG@GOTPAGEOFF]
	cset	w20, eq
Lloh43:
	ldr	w8, [x8]
	add	w1, w8, #2
Lloh44:
	adrp	x8, _BIT_DPDT_SEL_EN@GOTPAGE
Lloh45:
	ldr	x8, [x8, _BIT_DPDT_SEL_EN@GOTPAGEOFF]
Lloh46:
	ldrsh	w2, [x8, #2]
	mov	x0, x19
	mov	w3, #1
	bl	_rtw_write8_mask
Lloh47:
	adrp	x8, _REG_PAD_CTRL1@GOTPAGE
Lloh48:
	ldr	x8, [x8, _REG_PAD_CTRL1@GOTPAGEOFF]
Lloh49:
	adrp	x9, _BIT_SW_DPDT_SEL_DATA@GOTPAGE
Lloh50:
	ldr	x9, [x9, _BIT_SW_DPDT_SEL_DATA@GOTPAGEOFF]
Lloh51:
	ldr	w1, [x8]
Lloh52:
	ldr	w2, [x9]
	mov	x0, x19
	mov	x3, x20
	b	LBB0_16
LBB0_11:
Lloh53:
	adrp	x20, _REG_LED_CFG@GOTPAGE
Lloh54:
	ldr	x20, [x20, _REG_LED_CFG@GOTPAGEOFF]
	ldr	w8, [x20]
	add	w1, w8, #2
Lloh55:
	adrp	x8, _BIT_DPDT_SEL_EN@GOTPAGE
Lloh56:
	ldr	x8, [x8, _BIT_DPDT_SEL_EN@GOTPAGEOFF]
Lloh57:
	ldrsh	w2, [x8, #2]
	mov	x0, x19
	mov	w3, #0
	bl	_rtw_write8_mask
	ldr	w8, [x20]
Lloh58:
	adrp	x9, _BIT_DPDT_WL_SEL@GOTPAGE
Lloh59:
	ldr	x9, [x9, _BIT_DPDT_WL_SEL@GOTPAGEOFF]
	add	w1, w8, #3
Lloh60:
	ldrsb	w2, [x9, #3]
	mov	x0, x19
	mov	w3, #0
	b	LBB0_16
LBB0_12:
Lloh61:
	adrp	x20, _REG_LED_CFG@GOTPAGE
Lloh62:
	ldr	x20, [x20, _REG_LED_CFG@GOTPAGEOFF]
	ldr	w8, [x20]
	add	w1, w8, #2
Lloh63:
	adrp	x8, _BIT_DPDT_SEL_EN@GOTPAGE
Lloh64:
	ldr	x8, [x8, _BIT_DPDT_SEL_EN@GOTPAGEOFF]
Lloh65:
	ldrsh	w2, [x8, #2]
	mov	x0, x19
	mov	w3, #0
	bl	_rtw_write8_mask
	ldr	w8, [x20]
	add	w1, w8, #3
Lloh66:
	adrp	x8, _BIT_DPDT_WL_SEL@GOTPAGE
Lloh67:
	ldr	x8, [x8, _BIT_DPDT_WL_SEL@GOTPAGEOFF]
Lloh68:
	ldrsb	w2, [x8, #3]
	mov	x0, x19
	mov	w3, #1
	bl	_rtw_write8_mask
Lloh69:
	adrp	x8, _REG_RFE_CTRL8@GOTPAGE
Lloh70:
	ldr	x8, [x8, _REG_RFE_CTRL8@GOTPAGEOFF]
Lloh71:
	adrp	x9, _BIT_MASK_RFE_SEL89@GOTPAGE
Lloh72:
	ldr	x9, [x9, _BIT_MASK_RFE_SEL89@GOTPAGEOFF]
Lloh73:
	ldr	w1, [x8]
Lloh74:
	ldr	w2, [x9]
	mov	x0, x19
	mov	w3, #136
	b	LBB0_16
LBB0_13:
Lloh75:
	adrp	x8, _COEX_SWITCH_TO_WLG@GOTPAGE
Lloh76:
	ldr	x8, [x8, _COEX_SWITCH_TO_WLG@GOTPAGEOFF]
Lloh77:
	ldr	w8, [x8]
	cmp	w21, #1
	cinc	w9, w22, eq
	cinc	w10, w22, ne
	cmp	w8, w20
	csel	w3, w9, w10, ne
	b	LBB0_15
LBB0_14:
	mov	w3, #3
LBB0_15:
Lloh78:
	adrp	x8, _REG_RFE_INV8@GOTPAGE
Lloh79:
	ldr	x8, [x8, _REG_RFE_INV8@GOTPAGEOFF]
Lloh80:
	adrp	x9, _BIT_MASK_RFE_INV89@GOTPAGE
Lloh81:
	ldr	x9, [x9, _BIT_MASK_RFE_INV89@GOTPAGEOFF]
Lloh82:
	ldr	w1, [x8]
Lloh83:
	ldr	w2, [x9]
	mov	x0, x19
LBB0_16:
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	_rtw_write8_mask
	.loh AdrpAdd	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh13, Lloh14, Lloh15
	.loh AdrpLdrGotLdr	Lloh10, Lloh11, Lloh12
	.loh AdrpLdrGotLdr	Lloh7, Lloh8, Lloh9
	.loh AdrpLdrGotLdr	Lloh4, Lloh5, Lloh6
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGot	Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh38, Lloh39, Lloh40
	.loh AdrpLdrGotLdr	Lloh35, Lloh36, Lloh37
	.loh AdrpLdrGotLdr	Lloh32, Lloh33, Lloh34
	.loh AdrpLdrGotLdr	Lloh29, Lloh30, Lloh31
	.loh AdrpLdrGotLdr	Lloh26, Lloh27, Lloh28
	.loh AdrpLdrGot	Lloh24, Lloh25
	.loh AdrpLdrGotLdr	Lloh49, Lloh50, Lloh52
	.loh AdrpLdrGotLdr	Lloh47, Lloh48, Lloh51
	.loh AdrpLdrGotLdr	Lloh44, Lloh45, Lloh46
	.loh AdrpLdrGotLdr	Lloh41, Lloh42, Lloh43
	.loh AdrpLdrGotLdr	Lloh58, Lloh59, Lloh60
	.loh AdrpLdrGotLdr	Lloh55, Lloh56, Lloh57
	.loh AdrpLdrGot	Lloh53, Lloh54
	.loh AdrpLdrGotLdr	Lloh71, Lloh72, Lloh74
	.loh AdrpLdrGotLdr	Lloh69, Lloh70, Lloh73
	.loh AdrpLdrGotLdr	Lloh66, Lloh67, Lloh68
	.loh AdrpLdrGotLdr	Lloh63, Lloh64, Lloh65
	.loh AdrpLdrGot	Lloh61, Lloh62
	.loh AdrpLdrGotLdr	Lloh75, Lloh76, Lloh77
	.loh AdrpLdrGotLdr	Lloh80, Lloh81, Lloh83
	.loh AdrpLdrGotLdr	Lloh78, Lloh79, Lloh82
	.cfi_endproc
	.section	__TEXT,__const
lJTI0_0:
	.byte	(LBB0_4-LBB0_4)>>2
	.byte	(LBB0_10-LBB0_4)>>2
	.byte	(LBB0_5-LBB0_4)>>2
	.byte	(LBB0_11-LBB0_4)>>2
	.byte	(LBB0_6-LBB0_4)>>2
	.byte	(LBB0_12-LBB0_4)>>2
                                        ; -- End function
	.comm	_REG_LED_CFG,4,2                ; @REG_LED_CFG
	.comm	_BIT_DPDT_SEL_EN,4,2            ; @BIT_DPDT_SEL_EN
	.comm	_BIT_DPDT_WL_SEL,4,2            ; @BIT_DPDT_WL_SEL
	.comm	_REG_RFE_CTRL8,4,2              ; @REG_RFE_CTRL8
	.comm	_BIT_MASK_RFE_SEL89,4,2         ; @BIT_MASK_RFE_SEL89
	.comm	_COEX_SWITCH_TO_WLG_BT,4,2      ; @COEX_SWITCH_TO_WLG_BT
	.comm	_COEX_SWITCH_TO_WLG,4,2         ; @COEX_SWITCH_TO_WLG
	.comm	_REG_RFE_INV8,4,2               ; @REG_RFE_INV8
	.comm	_BIT_MASK_RFE_INV89,4,2         ; @BIT_MASK_RFE_INV89
	.comm	_REG_PAD_CTRL1,4,2              ; @REG_PAD_CTRL1
	.comm	_BIT_SW_DPDT_SEL_DATA,4,2       ; @BIT_SW_DPDT_SEL_DATA
	.no_dead_strip	_rtw8822b_coex_cfg_ant_switch
.subsections_via_symbols
