	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function ptys2ethtool_update_supported_port
_ptys2ethtool_update_supported_port:    ## @ptys2ethtool_update_supported_port
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r14
	movl	(%rsi), %edi
	callq	_be32_to_cpu
	movl	%eax, %r15d
	movq	_MLX4_10GBASE_T@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_MLX4_PROT_MASK
	movl	%eax, %r12d
	movq	_MLX4_1000BASE_T@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_MLX4_PROT_MASK
	movl	%eax, %ebx
	orl	%r12d, %ebx
	movq	_MLX4_100BASE_TX@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_MLX4_PROT_MASK
	orl	%ebx, %eax
	testl	%r15d, %eax
	je	LBB0_2
## %bb.1:
	movq	_ETHTOOL_LINK_MODE_TP_BIT@GOTPCREL(%rip), %rax
	jmp	LBB0_6
LBB0_2:
	movq	_MLX4_10GBASE_CR@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_MLX4_PROT_MASK
	movl	%eax, %r12d
	movq	_MLX4_10GBASE_SR@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_MLX4_PROT_MASK
	movl	%eax, %r13d
	orl	%r12d, %r13d
	movq	_MLX4_56GBASE_SR4@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_MLX4_PROT_MASK
	movl	%eax, %r12d
	movq	_MLX4_40GBASE_CR4@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_MLX4_PROT_MASK
	movl	%eax, %ebx
	orl	%r12d, %ebx
	orl	%r13d, %ebx
	movq	_MLX4_40GBASE_SR4@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_MLX4_PROT_MASK
	movl	%eax, %r12d
	movq	_MLX4_1000BASE_CX_SGMII@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_MLX4_PROT_MASK
	orl	%r12d, %eax
	orl	%ebx, %eax
	testl	%r15d, %eax
	je	LBB0_4
## %bb.3:
	movq	_ETHTOOL_LINK_MODE_FIBRE_BIT@GOTPCREL(%rip), %rax
	jmp	LBB0_6
LBB0_4:
	movq	_MLX4_56GBASE_KR4@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_MLX4_PROT_MASK
	movl	%eax, %r12d
	movq	_MLX4_40GBASE_KR4@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_MLX4_PROT_MASK
	movl	%eax, %r13d
	orl	%r12d, %r13d
	movq	_MLX4_20GBASE_KR2@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_MLX4_PROT_MASK
	movl	%eax, %r12d
	movq	_MLX4_10GBASE_KR@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_MLX4_PROT_MASK
	movl	%eax, %ebx
	orl	%r12d, %ebx
	orl	%r13d, %ebx
	movq	_MLX4_10GBASE_KX4@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_MLX4_PROT_MASK
	movl	%eax, %r12d
	movq	_MLX4_1000BASE_KX@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_MLX4_PROT_MASK
	orl	%r12d, %eax
	orl	%ebx, %eax
	testl	%r15d, %eax
	je	LBB0_7
## %bb.5:
	movq	_ETHTOOL_LINK_MODE_Backplane_BIT@GOTPCREL(%rip), %rax
LBB0_6:
	movl	(%rax), %edi
	movq	%r14, %rsi
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	___set_bit                      ## TAILCALL
LBB0_7:
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_MLX4_10GBASE_T,4,2             ## @MLX4_10GBASE_T
	.comm	_MLX4_1000BASE_T,4,2            ## @MLX4_1000BASE_T
	.comm	_MLX4_100BASE_TX,4,2            ## @MLX4_100BASE_TX
	.comm	_ETHTOOL_LINK_MODE_TP_BIT,4,2   ## @ETHTOOL_LINK_MODE_TP_BIT
	.comm	_MLX4_10GBASE_CR,4,2            ## @MLX4_10GBASE_CR
	.comm	_MLX4_10GBASE_SR,4,2            ## @MLX4_10GBASE_SR
	.comm	_MLX4_56GBASE_SR4,4,2           ## @MLX4_56GBASE_SR4
	.comm	_MLX4_40GBASE_CR4,4,2           ## @MLX4_40GBASE_CR4
	.comm	_MLX4_40GBASE_SR4,4,2           ## @MLX4_40GBASE_SR4
	.comm	_MLX4_1000BASE_CX_SGMII,4,2     ## @MLX4_1000BASE_CX_SGMII
	.comm	_ETHTOOL_LINK_MODE_FIBRE_BIT,4,2 ## @ETHTOOL_LINK_MODE_FIBRE_BIT
	.comm	_MLX4_56GBASE_KR4,4,2           ## @MLX4_56GBASE_KR4
	.comm	_MLX4_40GBASE_KR4,4,2           ## @MLX4_40GBASE_KR4
	.comm	_MLX4_20GBASE_KR2,4,2           ## @MLX4_20GBASE_KR2
	.comm	_MLX4_10GBASE_KR,4,2            ## @MLX4_10GBASE_KR
	.comm	_MLX4_10GBASE_KX4,4,2           ## @MLX4_10GBASE_KX4
	.comm	_MLX4_1000BASE_KX,4,2           ## @MLX4_1000BASE_KX
	.comm	_ETHTOOL_LINK_MODE_Backplane_BIT,4,2 ## @ETHTOOL_LINK_MODE_Backplane_BIT
	.no_dead_strip	_ptys2ethtool_update_supported_port
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function ptys2ethtool_update_supported_port
_ptys2ethtool_update_supported_port:    ; @ptys2ethtool_update_supported_port
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x0
	ldr	w0, [x1]
	bl	_be32_to_cpu
	mov	x20, x0
Lloh0:
	adrp	x8, _MLX4_10GBASE_T@GOTPAGE
Lloh1:
	ldr	x8, [x8, _MLX4_10GBASE_T@GOTPAGEOFF]
Lloh2:
	ldr	w0, [x8]
	bl	_MLX4_PROT_MASK
	mov	x21, x0
Lloh3:
	adrp	x8, _MLX4_1000BASE_T@GOTPAGE
Lloh4:
	ldr	x8, [x8, _MLX4_1000BASE_T@GOTPAGEOFF]
Lloh5:
	ldr	w0, [x8]
	bl	_MLX4_PROT_MASK
	orr	w21, w0, w21
Lloh6:
	adrp	x8, _MLX4_100BASE_TX@GOTPAGE
Lloh7:
	ldr	x8, [x8, _MLX4_100BASE_TX@GOTPAGEOFF]
Lloh8:
	ldr	w0, [x8]
	bl	_MLX4_PROT_MASK
	orr	w8, w21, w0
	tst	w8, w20
	b.eq	LBB0_2
; %bb.1:
Lloh9:
	adrp	x8, _ETHTOOL_LINK_MODE_TP_BIT@GOTPAGE
Lloh10:
	ldr	x8, [x8, _ETHTOOL_LINK_MODE_TP_BIT@GOTPAGEOFF]
	b	LBB0_6
LBB0_2:
Lloh11:
	adrp	x8, _MLX4_10GBASE_CR@GOTPAGE
Lloh12:
	ldr	x8, [x8, _MLX4_10GBASE_CR@GOTPAGEOFF]
Lloh13:
	ldr	w0, [x8]
	bl	_MLX4_PROT_MASK
	mov	x21, x0
Lloh14:
	adrp	x8, _MLX4_10GBASE_SR@GOTPAGE
Lloh15:
	ldr	x8, [x8, _MLX4_10GBASE_SR@GOTPAGEOFF]
Lloh16:
	ldr	w0, [x8]
	bl	_MLX4_PROT_MASK
	orr	w21, w0, w21
Lloh17:
	adrp	x8, _MLX4_56GBASE_SR4@GOTPAGE
Lloh18:
	ldr	x8, [x8, _MLX4_56GBASE_SR4@GOTPAGEOFF]
Lloh19:
	ldr	w0, [x8]
	bl	_MLX4_PROT_MASK
	orr	w21, w21, w0
Lloh20:
	adrp	x8, _MLX4_40GBASE_CR4@GOTPAGE
Lloh21:
	ldr	x8, [x8, _MLX4_40GBASE_CR4@GOTPAGEOFF]
Lloh22:
	ldr	w0, [x8]
	bl	_MLX4_PROT_MASK
	orr	w21, w21, w0
Lloh23:
	adrp	x8, _MLX4_40GBASE_SR4@GOTPAGE
Lloh24:
	ldr	x8, [x8, _MLX4_40GBASE_SR4@GOTPAGEOFF]
Lloh25:
	ldr	w0, [x8]
	bl	_MLX4_PROT_MASK
	orr	w21, w21, w0
Lloh26:
	adrp	x8, _MLX4_1000BASE_CX_SGMII@GOTPAGE
Lloh27:
	ldr	x8, [x8, _MLX4_1000BASE_CX_SGMII@GOTPAGEOFF]
Lloh28:
	ldr	w0, [x8]
	bl	_MLX4_PROT_MASK
	orr	w8, w21, w0
	tst	w8, w20
	b.eq	LBB0_4
; %bb.3:
Lloh29:
	adrp	x8, _ETHTOOL_LINK_MODE_FIBRE_BIT@GOTPAGE
Lloh30:
	ldr	x8, [x8, _ETHTOOL_LINK_MODE_FIBRE_BIT@GOTPAGEOFF]
	b	LBB0_6
LBB0_4:
Lloh31:
	adrp	x8, _MLX4_56GBASE_KR4@GOTPAGE
Lloh32:
	ldr	x8, [x8, _MLX4_56GBASE_KR4@GOTPAGEOFF]
Lloh33:
	ldr	w0, [x8]
	bl	_MLX4_PROT_MASK
	mov	x21, x0
Lloh34:
	adrp	x8, _MLX4_40GBASE_KR4@GOTPAGE
Lloh35:
	ldr	x8, [x8, _MLX4_40GBASE_KR4@GOTPAGEOFF]
Lloh36:
	ldr	w0, [x8]
	bl	_MLX4_PROT_MASK
	orr	w21, w0, w21
Lloh37:
	adrp	x8, _MLX4_20GBASE_KR2@GOTPAGE
Lloh38:
	ldr	x8, [x8, _MLX4_20GBASE_KR2@GOTPAGEOFF]
Lloh39:
	ldr	w0, [x8]
	bl	_MLX4_PROT_MASK
	orr	w21, w21, w0
Lloh40:
	adrp	x8, _MLX4_10GBASE_KR@GOTPAGE
Lloh41:
	ldr	x8, [x8, _MLX4_10GBASE_KR@GOTPAGEOFF]
Lloh42:
	ldr	w0, [x8]
	bl	_MLX4_PROT_MASK
	orr	w21, w21, w0
Lloh43:
	adrp	x8, _MLX4_10GBASE_KX4@GOTPAGE
Lloh44:
	ldr	x8, [x8, _MLX4_10GBASE_KX4@GOTPAGEOFF]
Lloh45:
	ldr	w0, [x8]
	bl	_MLX4_PROT_MASK
	orr	w21, w21, w0
Lloh46:
	adrp	x8, _MLX4_1000BASE_KX@GOTPAGE
Lloh47:
	ldr	x8, [x8, _MLX4_1000BASE_KX@GOTPAGEOFF]
Lloh48:
	ldr	w0, [x8]
	bl	_MLX4_PROT_MASK
	orr	w8, w21, w0
	tst	w8, w20
	b.eq	LBB0_7
; %bb.5:
Lloh49:
	adrp	x8, _ETHTOOL_LINK_MODE_Backplane_BIT@GOTPAGE
Lloh50:
	ldr	x8, [x8, _ETHTOOL_LINK_MODE_Backplane_BIT@GOTPAGEOFF]
LBB0_6:
	ldr	w0, [x8]
	mov	x1, x19
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	___set_bit
LBB0_7:
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGot	Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh26, Lloh27, Lloh28
	.loh AdrpLdrGotLdr	Lloh23, Lloh24, Lloh25
	.loh AdrpLdrGotLdr	Lloh20, Lloh21, Lloh22
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh19
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh16
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpLdrGot	Lloh29, Lloh30
	.loh AdrpLdrGotLdr	Lloh46, Lloh47, Lloh48
	.loh AdrpLdrGotLdr	Lloh43, Lloh44, Lloh45
	.loh AdrpLdrGotLdr	Lloh40, Lloh41, Lloh42
	.loh AdrpLdrGotLdr	Lloh37, Lloh38, Lloh39
	.loh AdrpLdrGotLdr	Lloh34, Lloh35, Lloh36
	.loh AdrpLdrGotLdr	Lloh31, Lloh32, Lloh33
	.loh AdrpLdrGot	Lloh49, Lloh50
	.cfi_endproc
                                        ; -- End function
	.comm	_MLX4_10GBASE_T,4,2             ; @MLX4_10GBASE_T
	.comm	_MLX4_1000BASE_T,4,2            ; @MLX4_1000BASE_T
	.comm	_MLX4_100BASE_TX,4,2            ; @MLX4_100BASE_TX
	.comm	_ETHTOOL_LINK_MODE_TP_BIT,4,2   ; @ETHTOOL_LINK_MODE_TP_BIT
	.comm	_MLX4_10GBASE_CR,4,2            ; @MLX4_10GBASE_CR
	.comm	_MLX4_10GBASE_SR,4,2            ; @MLX4_10GBASE_SR
	.comm	_MLX4_56GBASE_SR4,4,2           ; @MLX4_56GBASE_SR4
	.comm	_MLX4_40GBASE_CR4,4,2           ; @MLX4_40GBASE_CR4
	.comm	_MLX4_40GBASE_SR4,4,2           ; @MLX4_40GBASE_SR4
	.comm	_MLX4_1000BASE_CX_SGMII,4,2     ; @MLX4_1000BASE_CX_SGMII
	.comm	_ETHTOOL_LINK_MODE_FIBRE_BIT,4,2 ; @ETHTOOL_LINK_MODE_FIBRE_BIT
	.comm	_MLX4_56GBASE_KR4,4,2           ; @MLX4_56GBASE_KR4
	.comm	_MLX4_40GBASE_KR4,4,2           ; @MLX4_40GBASE_KR4
	.comm	_MLX4_20GBASE_KR2,4,2           ; @MLX4_20GBASE_KR2
	.comm	_MLX4_10GBASE_KR,4,2            ; @MLX4_10GBASE_KR
	.comm	_MLX4_10GBASE_KX4,4,2           ; @MLX4_10GBASE_KX4
	.comm	_MLX4_1000BASE_KX,4,2           ; @MLX4_1000BASE_KX
	.comm	_ETHTOOL_LINK_MODE_Backplane_BIT,4,2 ; @ETHTOOL_LINK_MODE_Backplane_BIT
	.no_dead_strip	_ptys2ethtool_update_supported_port
.subsections_via_symbols
