	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function vsc85xx_wol_set
_vsc85xx_wol_set:                       ## @vsc85xx_wol_set
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$40, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rsi, %r12
	movq	%rdi, %r14
	movq	___stack_chk_guard@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	movq	%rax, -48(%rbp)
	movl	$0, -56(%rbp)
	movq	$0, -64(%rbp)
	movq	8(%rdi), %rax
	movq	(%rax), %r15
	callq	_mutex_lock
	movq	_MSCC_PHY_PAGE_EXTENDED_2@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	callq	_phy_select_page
	testl	%eax, %eax
	js	LBB0_1
## %bb.2:
	movl	%eax, -68(%rbp)                 ## 4-byte Spill
	movq	_WAKE_MAGIC@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	testl	%eax, (%r12)
	je	LBB0_7
## %bb.3:
	leaq	-64(%rbp), %rdi
	callq	_ARRAY_SIZE
	testq	%rax, %rax
	je	LBB0_6
## %bb.4:
	addq	$40, %r15
	xorl	%ebx, %ebx
	leaq	-64(%rbp), %r13
	.p2align	4, 0x90
LBB0_5:                                 ## =>This Inner Loop Header: Depth=1
	movl	-8(%r15), %eax
	shll	$8, %eax
	orl	(%r15), %eax
	movl	%eax, -64(%rbp,%rbx,4)
	incq	%rbx
	movq	%r13, %rdi
	callq	_ARRAY_SIZE
	addq	$-16, %r15
	cmpq	%rax, %rbx
	jb	LBB0_5
LBB0_6:
	movq	_MSCC_PHY_WOL_LOWER_MAC_ADDR@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	-64(%rbp), %edx
	movq	%r14, %rdi
	callq	___phy_write
	movq	_MSCC_PHY_WOL_MID_MAC_ADDR@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	-60(%rbp), %edx
	movq	%r14, %rdi
	callq	___phy_write
	movq	_MSCC_PHY_WOL_UPPER_MAC_ADDR@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	-56(%rbp), %edx
	movq	%r14, %rdi
	jmp	LBB0_8
LBB0_1:
	movq	%r14, %rdi
	movl	%eax, %esi
	movl	%eax, %edx
	callq	_phy_restore_page
	movl	%eax, %ebx
	jmp	LBB0_21
LBB0_7:
	movq	_MSCC_PHY_WOL_LOWER_MAC_ADDR@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	xorl	%edx, %edx
	callq	___phy_write
	movq	_MSCC_PHY_WOL_MID_MAC_ADDR@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	xorl	%edx, %edx
	callq	___phy_write
	movq	_MSCC_PHY_WOL_UPPER_MAC_ADDR@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	xorl	%edx, %edx
LBB0_8:
	callq	___phy_write
	movq	_WAKE_MAGICSECURE@GOTPCREL(%rip), %rbx
	movl	(%rbx), %eax
	testl	%eax, (%r12)
	je	LBB0_13
## %bb.9:
	leaq	-64(%rbp), %rdi
	callq	_ARRAY_SIZE
	testq	%rax, %rax
	je	LBB0_12
## %bb.10:
	movl	$5, %r13d
	xorl	%r15d, %r15d
	leaq	-64(%rbp), %rbx
	.p2align	4, 0x90
LBB0_11:                                ## =>This Inner Loop Header: Depth=1
	movq	8(%r12), %rax
	movl	-4(%rax,%r13,4), %ecx
	shll	$8, %ecx
	orl	(%rax,%r13,4), %ecx
	movl	%ecx, -64(%rbp,%r15,4)
	incq	%r15
	movq	%rbx, %rdi
	callq	_ARRAY_SIZE
	addq	$-2, %r13
	cmpq	%rax, %r15
	jb	LBB0_11
LBB0_12:
	movq	_MSCC_PHY_WOL_LOWER_PASSWD@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	-64(%rbp), %edx
	movq	%r14, %rdi
	callq	___phy_write
	movq	_MSCC_PHY_WOL_MID_PASSWD@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	-60(%rbp), %edx
	movq	%r14, %rdi
	callq	___phy_write
	movl	-56(%rbp), %r15d
	movq	_WAKE_MAGICSECURE@GOTPCREL(%rip), %rbx
	jmp	LBB0_14
LBB0_13:
	movq	_MSCC_PHY_WOL_LOWER_PASSWD@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	xorl	%r15d, %r15d
	movq	%r14, %rdi
	xorl	%edx, %edx
	callq	___phy_write
	movq	_MSCC_PHY_WOL_MID_PASSWD@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	xorl	%edx, %edx
	callq	___phy_write
LBB0_14:
	movq	_MSCC_PHY_WOL_UPPER_PASSWD@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	movl	%r15d, %edx
	callq	___phy_write
	movq	_MSCC_PHY_WOL_MAC_CONTROL@GOTPCREL(%rip), %r15
	movl	(%r15), %esi
	movq	%r14, %rdi
	callq	___phy_read
	movl	(%rbx), %ecx
	andl	(%r12), %ecx
	movq	_SECURE_ON_ENABLE@GOTPCREL(%rip), %rdx
	movl	(%rdx), %edx
	movl	%edx, %esi
	orl	%eax, %esi
	notl	%edx
	andl	%eax, %edx
	testl	%ecx, %ecx
	cmovnel	%esi, %edx
	movl	(%r15), %esi
	movq	%r14, %rdi
	callq	___phy_write
	movl	-68(%rbp), %esi                 ## 4-byte Reload
	movl	%esi, %edx
	sarl	$31, %edx
	andl	%esi, %edx
	movq	%r14, %rdi
	callq	_phy_restore_page
	testl	%eax, %eax
	js	LBB0_15
## %bb.16:
	movq	_WAKE_MAGIC@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	andl	(%r12), %ebx
	movq	_MII_VSC85XX_INT_MASK@GOTPCREL(%rip), %r15
	movl	(%r15), %esi
	movq	%r14, %rdi
	callq	_phy_read
	movq	_MII_VSC85XX_INT_MASK_WOL@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	testl	%ebx, %ebx
	je	LBB0_18
## %bb.17:
	orl	%eax, %edx
	movl	(%r15), %esi
	movq	%r14, %rdi
	jmp	LBB0_19
LBB0_15:
	movl	%eax, %ebx
	jmp	LBB0_21
LBB0_18:
	notl	%edx
	andl	%edx, %eax
	movl	(%r15), %esi
	movq	%r14, %rdi
	movl	%eax, %edx
LBB0_19:
	callq	_phy_write
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	LBB0_21
## %bb.20:
	movq	_MII_VSC85XX_INT_STATUS@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	callq	_phy_read
	xorl	%ebx, %ebx
LBB0_21:
	movq	%r14, %rdi
	callq	_mutex_unlock
	movq	___stack_chk_guard@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	cmpq	-48(%rbp), %rax
	jne	LBB0_23
## %bb.22:
	movl	%ebx, %eax
	addq	$40, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_23:
	callq	___stack_chk_fail
	.cfi_endproc
                                        ## -- End function
	.comm	_MSCC_PHY_PAGE_EXTENDED_2,4,2   ## @MSCC_PHY_PAGE_EXTENDED_2
	.comm	_WAKE_MAGIC,4,2                 ## @WAKE_MAGIC
	.comm	_MSCC_PHY_WOL_LOWER_MAC_ADDR,4,2 ## @MSCC_PHY_WOL_LOWER_MAC_ADDR
	.comm	_MSCC_PHY_WOL_MID_MAC_ADDR,4,2  ## @MSCC_PHY_WOL_MID_MAC_ADDR
	.comm	_MSCC_PHY_WOL_UPPER_MAC_ADDR,4,2 ## @MSCC_PHY_WOL_UPPER_MAC_ADDR
	.comm	_WAKE_MAGICSECURE,4,2           ## @WAKE_MAGICSECURE
	.comm	_MSCC_PHY_WOL_LOWER_PASSWD,4,2  ## @MSCC_PHY_WOL_LOWER_PASSWD
	.comm	_MSCC_PHY_WOL_MID_PASSWD,4,2    ## @MSCC_PHY_WOL_MID_PASSWD
	.comm	_MSCC_PHY_WOL_UPPER_PASSWD,4,2  ## @MSCC_PHY_WOL_UPPER_PASSWD
	.comm	_MSCC_PHY_WOL_MAC_CONTROL,4,2   ## @MSCC_PHY_WOL_MAC_CONTROL
	.comm	_SECURE_ON_ENABLE,4,2           ## @SECURE_ON_ENABLE
	.comm	_MII_VSC85XX_INT_MASK,4,2       ## @MII_VSC85XX_INT_MASK
	.comm	_MII_VSC85XX_INT_MASK_WOL,4,2   ## @MII_VSC85XX_INT_MASK_WOL
	.comm	_MII_VSC85XX_INT_STATUS,4,2     ## @MII_VSC85XX_INT_STATUS
	.no_dead_strip	_vsc85xx_wol_set
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function vsc85xx_wol_set
_vsc85xx_wol_set:                       ; @vsc85xx_wol_set
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #112
	.cfi_def_cfa_offset 112
	stp	x26, x25, [sp, #32]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #48]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #64]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #80]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #96]             ; 16-byte Folded Spill
	add	x29, sp, #96
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	mov	x20, x1
	mov	x19, x0
Lloh0:
	adrp	x8, ___stack_chk_guard@GOTPAGE
Lloh1:
	ldr	x8, [x8, ___stack_chk_guard@GOTPAGEOFF]
Lloh2:
	ldr	x8, [x8]
	str	x8, [sp, #24]
	str	wzr, [sp, #16]
	str	xzr, [sp, #8]
	ldr	x8, [x0, #8]
	ldr	x24, [x8]
	bl	_mutex_lock
Lloh3:
	adrp	x8, _MSCC_PHY_PAGE_EXTENDED_2@GOTPAGE
Lloh4:
	ldr	x8, [x8, _MSCC_PHY_PAGE_EXTENDED_2@GOTPAGEOFF]
Lloh5:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_phy_select_page
	mov	x21, x0
	tbnz	w0, #31, LBB0_6
; %bb.1:
	ldr	w8, [x20]
Lloh6:
	adrp	x22, _WAKE_MAGIC@GOTPAGE
Lloh7:
	ldr	x22, [x22, _WAKE_MAGIC@GOTPAGEOFF]
	ldr	w9, [x22]
	tst	w9, w8
	b.eq	LBB0_7
; %bb.2:
	add	x23, sp, #8
	add	x0, sp, #8
	bl	_ARRAY_SIZE
	cbz	x0, LBB0_5
; %bb.3:
	mov	x25, #0
	add	x24, x24, #40
LBB0_4:                                 ; =>This Inner Loop Header: Depth=1
	ldur	w8, [x24, #-8]
	ldr	w9, [x24], #-16
	orr	w8, w9, w8, lsl #8
	str	w8, [x23, x25, lsl #2]
	add	x25, x25, #1
	add	x0, sp, #8
	bl	_ARRAY_SIZE
	cmp	x25, x0
	b.lo	LBB0_4
LBB0_5:
Lloh8:
	adrp	x8, _MSCC_PHY_WOL_LOWER_MAC_ADDR@GOTPAGE
Lloh9:
	ldr	x8, [x8, _MSCC_PHY_WOL_LOWER_MAC_ADDR@GOTPAGEOFF]
Lloh10:
	ldr	w1, [x8]
	ldr	w2, [sp, #8]
	mov	x0, x19
	bl	___phy_write
Lloh11:
	adrp	x8, _MSCC_PHY_WOL_MID_MAC_ADDR@GOTPAGE
Lloh12:
	ldr	x8, [x8, _MSCC_PHY_WOL_MID_MAC_ADDR@GOTPAGEOFF]
Lloh13:
	ldr	w1, [x8]
	ldr	w2, [sp, #12]
	mov	x0, x19
	bl	___phy_write
Lloh14:
	adrp	x8, _MSCC_PHY_WOL_UPPER_MAC_ADDR@GOTPAGE
Lloh15:
	ldr	x8, [x8, _MSCC_PHY_WOL_UPPER_MAC_ADDR@GOTPAGEOFF]
Lloh16:
	ldr	w1, [x8]
	ldr	w2, [sp, #16]
	mov	x0, x19
	b	LBB0_8
LBB0_6:
	mov	x0, x19
	mov	x1, x21
	mov	x2, x21
	bl	_phy_restore_page
	mov	x21, x0
	b	LBB0_21
LBB0_7:
Lloh17:
	adrp	x8, _MSCC_PHY_WOL_LOWER_MAC_ADDR@GOTPAGE
Lloh18:
	ldr	x8, [x8, _MSCC_PHY_WOL_LOWER_MAC_ADDR@GOTPAGEOFF]
Lloh19:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #0
	bl	___phy_write
Lloh20:
	adrp	x8, _MSCC_PHY_WOL_MID_MAC_ADDR@GOTPAGE
Lloh21:
	ldr	x8, [x8, _MSCC_PHY_WOL_MID_MAC_ADDR@GOTPAGEOFF]
Lloh22:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #0
	bl	___phy_write
Lloh23:
	adrp	x8, _MSCC_PHY_WOL_UPPER_MAC_ADDR@GOTPAGE
Lloh24:
	ldr	x8, [x8, _MSCC_PHY_WOL_UPPER_MAC_ADDR@GOTPAGEOFF]
Lloh25:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #0
LBB0_8:
	bl	___phy_write
	ldr	w8, [x20]
Lloh26:
	adrp	x23, _WAKE_MAGICSECURE@GOTPAGE
Lloh27:
	ldr	x23, [x23, _WAKE_MAGICSECURE@GOTPAGEOFF]
	ldr	w9, [x23]
	tst	w9, w8
	b.eq	LBB0_13
; %bb.9:
	add	x24, sp, #8
	add	x0, sp, #8
	bl	_ARRAY_SIZE
	cbz	x0, LBB0_12
; %bb.10:
	mov	x25, #0
	mov	x26, #0
LBB0_11:                                ; =>This Inner Loop Header: Depth=1
	ldr	x8, [x20, #8]
	add	x8, x8, x25
	ldp	w9, w8, [x8, #16]
	orr	w8, w8, w9, lsl #8
	str	w8, [x24, x26, lsl #2]
	add	x26, x26, #1
	add	x0, sp, #8
	bl	_ARRAY_SIZE
	sub	x25, x25, #8
	cmp	x26, x0
	b.lo	LBB0_11
LBB0_12:
Lloh28:
	adrp	x8, _MSCC_PHY_WOL_LOWER_PASSWD@GOTPAGE
Lloh29:
	ldr	x8, [x8, _MSCC_PHY_WOL_LOWER_PASSWD@GOTPAGEOFF]
Lloh30:
	ldr	w1, [x8]
	ldr	w2, [sp, #8]
	mov	x0, x19
	bl	___phy_write
Lloh31:
	adrp	x8, _MSCC_PHY_WOL_MID_PASSWD@GOTPAGE
Lloh32:
	ldr	x8, [x8, _MSCC_PHY_WOL_MID_PASSWD@GOTPAGEOFF]
Lloh33:
	ldr	w1, [x8]
	ldr	w2, [sp, #12]
	mov	x0, x19
	bl	___phy_write
	ldr	w2, [sp, #16]
	b	LBB0_14
LBB0_13:
Lloh34:
	adrp	x8, _MSCC_PHY_WOL_LOWER_PASSWD@GOTPAGE
Lloh35:
	ldr	x8, [x8, _MSCC_PHY_WOL_LOWER_PASSWD@GOTPAGEOFF]
Lloh36:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #0
	bl	___phy_write
Lloh37:
	adrp	x8, _MSCC_PHY_WOL_MID_PASSWD@GOTPAGE
Lloh38:
	ldr	x8, [x8, _MSCC_PHY_WOL_MID_PASSWD@GOTPAGEOFF]
Lloh39:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #0
	bl	___phy_write
	mov	w2, #0
LBB0_14:
Lloh40:
	adrp	x8, _MSCC_PHY_WOL_UPPER_PASSWD@GOTPAGE
Lloh41:
	ldr	x8, [x8, _MSCC_PHY_WOL_UPPER_PASSWD@GOTPAGEOFF]
Lloh42:
	ldr	w1, [x8]
	mov	x0, x19
	bl	___phy_write
Lloh43:
	adrp	x24, _MSCC_PHY_WOL_MAC_CONTROL@GOTPAGE
Lloh44:
	ldr	x24, [x24, _MSCC_PHY_WOL_MAC_CONTROL@GOTPAGEOFF]
	ldr	w1, [x24]
	mov	x0, x19
	bl	___phy_read
	ldr	w8, [x20]
	ldr	w9, [x23]
Lloh45:
	adrp	x10, _SECURE_ON_ENABLE@GOTPAGE
Lloh46:
	ldr	x10, [x10, _SECURE_ON_ENABLE@GOTPAGEOFF]
Lloh47:
	ldr	w10, [x10]
	orr	w11, w10, w0
	bic	w10, w0, w10
	tst	w9, w8
	csel	w2, w10, w11, eq
	ldr	w1, [x24]
	mov	x0, x19
	bl	___phy_write
	cmp	w21, #0
	csel	w2, w21, wzr, lt
	mov	x0, x19
	mov	x1, x21
	bl	_phy_restore_page
	tbnz	w0, #31, LBB0_17
; %bb.15:
	ldr	w8, [x20]
	ldr	w9, [x22]
	and	w21, w9, w8
Lloh48:
	adrp	x20, _MII_VSC85XX_INT_MASK@GOTPAGE
Lloh49:
	ldr	x20, [x20, _MII_VSC85XX_INT_MASK@GOTPAGEOFF]
	ldr	w1, [x20]
	mov	x0, x19
	bl	_phy_read
Lloh50:
	adrp	x8, _MII_VSC85XX_INT_MASK_WOL@GOTPAGE
Lloh51:
	ldr	x8, [x8, _MII_VSC85XX_INT_MASK_WOL@GOTPAGEOFF]
Lloh52:
	ldr	w8, [x8]
	cbz	w21, LBB0_18
; %bb.16:
	orr	w2, w8, w0
	b	LBB0_19
LBB0_17:
	mov	x21, x0
	b	LBB0_21
LBB0_18:
	bic	w2, w0, w8
LBB0_19:
	ldr	w1, [x20]
	mov	x0, x19
	bl	_phy_write
	mov	x21, x0
	cbnz	w0, LBB0_21
; %bb.20:
Lloh53:
	adrp	x8, _MII_VSC85XX_INT_STATUS@GOTPAGE
Lloh54:
	ldr	x8, [x8, _MII_VSC85XX_INT_STATUS@GOTPAGEOFF]
Lloh55:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_phy_read
	mov	w21, #0
LBB0_21:
	mov	x0, x19
	bl	_mutex_unlock
	ldr	x8, [sp, #24]
Lloh56:
	adrp	x9, ___stack_chk_guard@GOTPAGE
Lloh57:
	ldr	x9, [x9, ___stack_chk_guard@GOTPAGEOFF]
Lloh58:
	ldr	x9, [x9]
	cmp	x9, x8
	b.ne	LBB0_23
; %bb.22:
	mov	x0, x21
	ldp	x29, x30, [sp, #96]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #80]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #64]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #48]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #32]             ; 16-byte Folded Reload
	add	sp, sp, #112
	ret
LBB0_23:
	bl	___stack_chk_fail
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGot	Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh16
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh23, Lloh24, Lloh25
	.loh AdrpLdrGotLdr	Lloh20, Lloh21, Lloh22
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh19
	.loh AdrpLdrGot	Lloh26, Lloh27
	.loh AdrpLdrGotLdr	Lloh31, Lloh32, Lloh33
	.loh AdrpLdrGotLdr	Lloh28, Lloh29, Lloh30
	.loh AdrpLdrGotLdr	Lloh37, Lloh38, Lloh39
	.loh AdrpLdrGotLdr	Lloh34, Lloh35, Lloh36
	.loh AdrpLdrGotLdr	Lloh45, Lloh46, Lloh47
	.loh AdrpLdrGot	Lloh43, Lloh44
	.loh AdrpLdrGotLdr	Lloh40, Lloh41, Lloh42
	.loh AdrpLdrGotLdr	Lloh50, Lloh51, Lloh52
	.loh AdrpLdrGot	Lloh48, Lloh49
	.loh AdrpLdrGotLdr	Lloh53, Lloh54, Lloh55
	.loh AdrpLdrGotLdr	Lloh56, Lloh57, Lloh58
	.cfi_endproc
                                        ; -- End function
	.comm	_MSCC_PHY_PAGE_EXTENDED_2,4,2   ; @MSCC_PHY_PAGE_EXTENDED_2
	.comm	_WAKE_MAGIC,4,2                 ; @WAKE_MAGIC
	.comm	_MSCC_PHY_WOL_LOWER_MAC_ADDR,4,2 ; @MSCC_PHY_WOL_LOWER_MAC_ADDR
	.comm	_MSCC_PHY_WOL_MID_MAC_ADDR,4,2  ; @MSCC_PHY_WOL_MID_MAC_ADDR
	.comm	_MSCC_PHY_WOL_UPPER_MAC_ADDR,4,2 ; @MSCC_PHY_WOL_UPPER_MAC_ADDR
	.comm	_WAKE_MAGICSECURE,4,2           ; @WAKE_MAGICSECURE
	.comm	_MSCC_PHY_WOL_LOWER_PASSWD,4,2  ; @MSCC_PHY_WOL_LOWER_PASSWD
	.comm	_MSCC_PHY_WOL_MID_PASSWD,4,2    ; @MSCC_PHY_WOL_MID_PASSWD
	.comm	_MSCC_PHY_WOL_UPPER_PASSWD,4,2  ; @MSCC_PHY_WOL_UPPER_PASSWD
	.comm	_MSCC_PHY_WOL_MAC_CONTROL,4,2   ; @MSCC_PHY_WOL_MAC_CONTROL
	.comm	_SECURE_ON_ENABLE,4,2           ; @SECURE_ON_ENABLE
	.comm	_MII_VSC85XX_INT_MASK,4,2       ; @MII_VSC85XX_INT_MASK
	.comm	_MII_VSC85XX_INT_MASK_WOL,4,2   ; @MII_VSC85XX_INT_MASK_WOL
	.comm	_MII_VSC85XX_INT_STATUS,4,2     ; @MII_VSC85XX_INT_STATUS
	.no_dead_strip	_vsc85xx_wol_set
.subsections_via_symbols
