	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function mlx5_fpga_conn_post_send
_mlx5_fpga_conn_post_send:              ## @mlx5_fpga_conn_post_send
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rsi, %r12
	movq	%rdi, %r14
	movl	4(%rdi), %r15d
	decl	%r15d
	andl	(%rdi), %r15d
	addq	$20, %rdi
	movl	%r15d, %esi
	callq	_mlx5_wq_cyc_get_wqe
	movq	%rax, %r13
	movq	(%r12), %rdi
	callq	_ARRAY_SIZE
	testl	%eax, %eax
	je	LBB0_1
## %bb.2:
	movq	%r15, -48(%rbp)                 ## 8-byte Spill
	xorl	%r15d, %r15d
	xorl	%ebx, %ebx
	.p2align	4, 0x90
LBB0_3:                                 ## =>This Inner Loop Header: Depth=1
	movq	(%r12), %rax
	cmpl	$0, 8(%rax,%r15)
	je	LBB0_5
## %bb.4:                               ##   in Loop: Header=BB0_3 Depth=1
	movl	(%rax,%r15), %edi
	callq	_cpu_to_be32
	movq	%rax, 48(%r13,%r15,2)
	movq	24(%r14), %rax
	movl	(%rax), %edi
	callq	_cpu_to_be32
	movq	%rax, 40(%r13,%r15,2)
	movq	(%r12), %rax
	movl	4(%rax,%r15), %edi
	callq	_cpu_to_be64
	movl	%eax, 32(%r13,%r15,2)
	incq	%rbx
	movq	(%r12), %rdi
	callq	_ARRAY_SIZE
	movl	%eax, %eax
	addq	$12, %r15
	cmpq	%rax, %rbx
	jb	LBB0_3
LBB0_5:
	incl	%ebx
	movq	-48(%rbp), %r15                 ## 8-byte Reload
	jmp	LBB0_6
LBB0_1:
	movl	$1, %ebx
LBB0_6:
	movq	$0, 24(%r13)
	movq	_MLX5_WQE_CTRL_CQ_UPDATE@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 16(%r13)
	movl	(%r14), %eax
	movzwl	%ax, %edi
	shll	$8, %edi
	movq	_MLX5_OPCODE_SEND@GOTPCREL(%rip), %rax
	orl	(%rax), %edi
	callq	_cpu_to_be32
	movq	%rax, 8(%r13)
	movl	16(%r14), %edi
	shll	$8, %edi
	orl	%ebx, %edi
	callq	_cpu_to_be32
	movq	%rax, (%r13)
	incl	(%r14)
	movq	8(%r14), %rax
	movq	%r12, (%rax,%r15,8)
	movq	%r14, %rdi
	movq	%r13, %rsi
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_mlx5_fpga_conn_notify_hw       ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_MLX5_WQE_CTRL_CQ_UPDATE,4,2    ## @MLX5_WQE_CTRL_CQ_UPDATE
	.comm	_MLX5_OPCODE_SEND,4,2           ## @MLX5_OPCODE_SEND
	.no_dead_strip	_mlx5_fpga_conn_post_send
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function mlx5_fpga_conn_post_send
_mlx5_fpga_conn_post_send:              ; @mlx5_fpga_conn_post_send
	.cfi_startproc
; %bb.0:
	stp	x26, x25, [sp, #-80]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	mov	x20, x1
	mov	x19, x0
	ldp	w8, w9, [x0], #20
	sub	w9, w9, #1
	and	w21, w9, w8
	mov	x1, x21
	bl	_mlx5_wq_cyc_get_wqe
	mov	x22, x0
	ldr	x0, [x20]
	bl	_ARRAY_SIZE
	cbz	w0, LBB0_5
; %bb.1:
	mov	x24, #0
	mov	x23, #0
	add	x25, x22, #48
LBB0_2:                                 ; =>This Inner Loop Header: Depth=1
	ldr	x8, [x20]
	add	x9, x8, x24
	ldr	w9, [x9, #8]
	cbz	w9, LBB0_4
; %bb.3:                                ;   in Loop: Header=BB0_2 Depth=1
	ldr	w0, [x8, x24]
	bl	_cpu_to_be32
	str	x0, [x25]
	ldr	x8, [x19, #24]
	ldr	w0, [x8]
	bl	_cpu_to_be32
	stur	x0, [x25, #-8]
	ldr	x8, [x20]
	add	x8, x8, x24
	ldr	w0, [x8, #4]
	bl	_cpu_to_be64
	stur	w0, [x25, #-16]
	add	x23, x23, #1
	ldr	x0, [x20]
	bl	_ARRAY_SIZE
	add	x24, x24, #12
	add	x25, x25, #24
	cmp	x23, w0, uxtw
	b.lo	LBB0_2
LBB0_4:
	add	w23, w23, #1
	b	LBB0_6
LBB0_5:
	mov	w23, #1
LBB0_6:
	str	xzr, [x22, #24]
Lloh0:
	adrp	x8, _MLX5_WQE_CTRL_CQ_UPDATE@GOTPAGE
Lloh1:
	ldr	x8, [x8, _MLX5_WQE_CTRL_CQ_UPDATE@GOTPAGEOFF]
Lloh2:
	ldr	w8, [x8]
	str	w8, [x22, #16]
	ldr	w8, [x19]
	ubfiz	w8, w8, #8, #16
Lloh3:
	adrp	x9, _MLX5_OPCODE_SEND@GOTPAGE
Lloh4:
	ldr	x9, [x9, _MLX5_OPCODE_SEND@GOTPAGEOFF]
Lloh5:
	ldr	w9, [x9]
	orr	w0, w8, w9
	bl	_cpu_to_be32
	str	x0, [x22, #8]
	ldr	w8, [x19, #16]
	orr	w0, w23, w8, lsl #8
	bl	_cpu_to_be32
	str	x0, [x22]
	ldr	w8, [x19]
	add	w8, w8, #1
	str	w8, [x19]
	ldr	x8, [x19, #8]
	str	x20, [x8, x21, lsl #3]
	mov	x0, x19
	mov	x1, x22
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp], #80             ; 16-byte Folded Reload
	b	_mlx5_fpga_conn_notify_hw
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_MLX5_WQE_CTRL_CQ_UPDATE,4,2    ; @MLX5_WQE_CTRL_CQ_UPDATE
	.comm	_MLX5_OPCODE_SEND,4,2           ; @MLX5_OPCODE_SEND
	.no_dead_strip	_mlx5_fpga_conn_post_send
.subsections_via_symbols
