	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function mt7603_mac_write_txwi
_mt7603_mac_write_txwi:                 ## @mt7603_mac_write_txwi
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$88, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%r9, -56(%rbp)                  ## 8-byte Spill
	movq	%r8, -64(%rbp)                  ## 8-byte Spill
	movl	%ecx, %r12d
	movq	%rdx, %r14
	movq	%rsi, -96(%rbp)                 ## 8-byte Spill
	movq	%rdi, %r15
	movq	%rdx, %rdi
	callq	_IEEE80211_SKB_CB
	movq	8(%rax), %r13
	movq	%rax, -72(%rbp)                 ## 8-byte Spill
	movq	16(%rax), %rax
	movq	%rax, -112(%rbp)                ## 8-byte Spill
	movq	8(%r14), %rbx
	movq	%r15, -104(%rbp)                ## 8-byte Spill
	movq	(%r15), %rax
	movl	%r12d, -44(%rbp)                ## 4-byte Spill
	movl	%r12d, %ecx
	movq	(%rax,%rcx,8), %r15
	movq	%r14, %rdi
	callq	_ieee80211_get_hdrlen_from_skb
	movl	%eax, -84(%rbp)                 ## 4-byte Spill
	movq	%rbx, -120(%rbp)                ## 8-byte Spill
	movl	(%rbx), %edi
	callq	_le16_to_cpu
	xorl	%edx, %edx
	testq	%r13, %r13
	je	LBB0_3
## %bb.1:
	movq	(%r13), %rcx
	movl	(%rcx), %esi
	testl	%esi, %esi
	je	LBB0_3
## %bb.2:
	movq	_MT_TXQ_BEACON@GOTPCREL(%rip), %rcx
	movl	-44(%rbp), %edx                 ## 4-byte Reload
	cmpl	%edx, (%rcx)
	leal	16(%rsi), %edx
	cmoval	%esi, %edx
LBB0_3:
	movq	-56(%rbp), %rcx                 ## 8-byte Reload
	testq	%rcx, %rcx
	movq	-64(%rbp), %rsi                 ## 8-byte Reload
	je	LBB0_4
## %bb.5:
	movq	(%rcx), %rcx
	movl	(%rcx), %ecx
	jmp	LBB0_6
LBB0_4:
	movl	$8, %ecx
LBB0_6:
	movl	%edx, -76(%rbp)                 ## 4-byte Spill
	movl	%ecx, -56(%rbp)                 ## 4-byte Spill
	testq	%rsi, %rsi
	jne	LBB0_8
## %bb.7:
	movq	_MT7603_WTBL_RESERVED@GOTPCREL(%rip), %rsi
LBB0_8:
	movl	(%rsi), %ecx
	movl	%ecx, -80(%rbp)                 ## 4-byte Spill
	movq	_IEEE80211_FCTL_FTYPE@GOTPCREL(%rip), %rcx
	movl	(%rcx), %r12d
	andl	%eax, %r12d
	movq	_IEEE80211_FCTL_STYPE@GOTPCREL(%rip), %rcx
	andl	(%rcx), %eax
	sarl	$2, %r12d
	sarl	$4, %eax
	movl	%eax, -64(%rbp)                 ## 4-byte Spill
	movq	_MT_TXD0_TX_BYTES@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_MT_TXD_SIZE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	addl	(%r14), %esi
	callq	_FIELD_PREP
	movl	%eax, %ebx
	movq	_MT_TXD0_Q_IDX@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	(%r15), %esi
	callq	_FIELD_PREP
	orl	%eax, %ebx
	movl	%ebx, %edi
	callq	_cpu_to_le32
	movq	-96(%rbp), %r13                 ## 8-byte Reload
	movl	%eax, (%r13)
	movq	_MT_TXD1_LONG_FORMAT@GOTPCREL(%rip), %rax
	movl	(%rax), %r15d
	movq	_MT_TXD1_OWN_MAC@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	-76(%rbp), %esi                 ## 4-byte Reload
	callq	_FIELD_PREP
	orl	%eax, %r15d
	movq	_MT_TXD1_TID@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_IEEE80211_QOS_CTL_TID_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	andl	4(%r14), %esi
	callq	_FIELD_PREP
	orl	%eax, %r15d
	movq	_MT_TXD1_HDR_FORMAT@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_MT_HDR_FORMAT_802_11@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_FIELD_PREP
	movl	%eax, %ebx
	movq	_MT_TXD1_HDR_INFO@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	-84(%rbp), %eax                 ## 4-byte Reload
	movl	%eax, %esi
	shrl	$31, %esi
	addl	%eax, %esi
	sarl	%esi
	callq	_FIELD_PREP
	orl	%eax, %ebx
	orl	%r15d, %ebx
	movq	_MT_TXD1_WLAN_IDX@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	-80(%rbp), %esi                 ## 4-byte Reload
	callq	_FIELD_PREP
	orl	%eax, %ebx
	movq	_MT_TXD1_PROTECTED@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	xorl	%esi, %esi
	cmpq	$0, 24(%rbp)
	setne	%sil
	callq	_FIELD_PREP
	orl	%eax, %ebx
	movl	%ebx, %edi
	callq	_cpu_to_le32
	movl	%eax, 4(%r13)
	movq	_IEEE80211_TX_CTL_NO_ACK@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movq	-72(%rbp), %rcx                 ## 8-byte Reload
	testl	%eax, (%rcx)
	je	LBB0_10
## %bb.9:
	movq	_MT_TXD1_NO_ACK@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_cpu_to_le32
	orl	%eax, 4(%r13)
LBB0_10:
	movl	16(%rbp), %r14d
	movq	_MT_TXD2_FRAME_TYPE@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	%r12d, %esi
	callq	_FIELD_PREP
	movl	%eax, %ebx
	movq	_MT_TXD2_SUB_TYPE@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	-64(%rbp), %esi                 ## 4-byte Reload
	callq	_FIELD_PREP
	orl	%eax, %ebx
	movq	_MT_TXD2_MULTICAST@GOTPCREL(%rip), %rax
	movl	(%rax), %r15d
	movq	-120(%rbp), %r12                ## 8-byte Reload
	movl	8(%r12), %edi
	callq	_is_multicast_ether_addr
	movl	%r15d, %edi
	movq	-96(%rbp), %r15                 ## 8-byte Reload
	movl	%eax, %esi
	callq	_FIELD_PREP
	orl	%eax, %ebx
	movl	%ebx, %edi
	callq	_cpu_to_le32
	movl	%eax, 8(%r15)
	movq	_IEEE80211_TX_CTL_AMPDU@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movq	-72(%rbp), %rcx                 ## 8-byte Reload
	testl	%eax, (%rcx)
	jne	LBB0_12
## %bb.11:
	movq	_MT_TXD2_BA_DISABLE@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_cpu_to_le32
	orl	%eax, 8(%r15)
LBB0_12:
	movl	$0, 16(%r15)
	movq	_MT_TXD5_TX_STATUS_HOST@GOTPCREL(%rip), %rax
	movq	_MT_TXD5_SW_POWER_MGMT@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ebx
	orl	(%rax), %ebx
	movq	_MT_TXD5_PID@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	%r14d, %esi
	callq	_FIELD_PREP
	orl	%eax, %ebx
	movl	%ebx, %edi
	callq	_cpu_to_le32
	movl	%eax, 20(%r15)
	movl	$0, 24(%r15)
	movq	-112(%rbp), %rbx                ## 8-byte Reload
	cmpq	$0, (%rbx)
	js	LBB0_13
## %bb.14:
	cmpl	$0, 8(%rbx)
	movl	-56(%rbp), %edi                 ## 4-byte Reload
	je	LBB0_21
## %bb.15:
	movq	-72(%rbp), %rax                 ## 8-byte Reload
	movl	(%rax), %edx
	movq	_IEEE80211_TX_CTL_RATE_CTRL_PROBE@GOTPCREL(%rip), %rax
	testl	%edx, (%rax)
	jne	LBB0_21
## %bb.16:
	movq	_IEEE80211_TX_CTL_STBC@GOTPCREL(%rip), %rax
	andl	(%rax), %edx
	leaq	-88(%rbp), %rcx
	movq	-104(%rbp), %rdi                ## 8-byte Reload
	movq	%rbx, %rsi
	callq	_mt7603_mac_tx_rate_val
	movl	%eax, %r14d
	movq	_MT_TXD2_FIX_RATE@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_cpu_to_le32
	orl	%eax, 8(%r15)
	movq	_MT_TXD6_FIXED_BW@GOTPCREL(%rip), %rax
	movl	(%rax), %r13d
	movq	_MT_TXD6_BW@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	-88(%rbp), %esi
	callq	_FIELD_PREP
	orl	%eax, %r13d
	movq	_MT_TXD6_TX_RATE@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	%r14d, %esi
	callq	_FIELD_PREP
	orl	%eax, %r13d
	movl	%r13d, %edi
	callq	_cpu_to_le32
	orl	%eax, 24(%r15)
	movl	12(%rbx), %eax
	movq	_IEEE80211_TX_RC_SHORT_GI@GOTPCREL(%rip), %rcx
	testl	%eax, (%rcx)
	je	LBB0_18
## %bb.17:
	movq	_MT_TXD6_SGI@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_cpu_to_le32
	orl	%eax, 24(%r15)
	movl	12(%rbx), %eax
LBB0_18:
	movq	_IEEE80211_TX_RC_MCS@GOTPCREL(%rip), %rcx
	testl	%eax, (%rcx)
	jne	LBB0_20
## %bb.19:
	movq	_MT_TXD2_BA_DISABLE@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_cpu_to_le32
	orl	%eax, 8(%r15)
LBB0_20:
	movl	8(%rbx), %edi
	jmp	LBB0_21
LBB0_13:
	movl	-56(%rbp), %edi                 ## 4-byte Reload
LBB0_21:
	movq	_MT_TXQ_BEACON@GOTPCREL(%rip), %rax
	movl	-44(%rbp), %ecx                 ## 4-byte Reload
	cmpl	%ecx, (%rax)
	movl	$31, %esi
	cmoval	%edi, %esi
	movq	_MT_TXD3_REM_TX_COUNT@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_FIELD_PREP
	movl	%eax, %ebx
	movq	_MT_TXD3_SN_VALID@GOTPCREL(%rip), %r14
	orl	(%r14), %ebx
	movl	(%r12), %edi
	callq	_ieee80211_is_data_qos
	testq	%rax, %rax
	je	LBB0_24
## %bb.22:
	movl	4(%r12), %edi
	jmp	LBB0_23
LBB0_24:
	movl	(%r12), %edi
	callq	_ieee80211_is_back_req
	testq	%rax, %rax
	je	LBB0_26
## %bb.25:
	movl	(%r12), %edi
LBB0_23:
	callq	_le16_to_cpu
	movl	%eax, %esi
LBB0_27:
	movq	_MT_TXD3_SEQ@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	sarl	$4, %esi
	callq	_FIELD_PREP
	orl	%eax, %ebx
	movl	%ebx, %edi
	callq	_cpu_to_le32
	movl	%eax, 12(%r15)
	movq	24(%rbp), %rdi
	testq	%rdi, %rdi
	je	LBB0_29
## %bb.28:
	callq	_atomic64_inc_return
	movl	%eax, %ebx
	movq	_MT_TXD3_PN_VALID@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_cpu_to_le32
	orl	%eax, 12(%r15)
	movl	$31, %edi
	xorl	%esi, %esi
	callq	_GENMASK
	andl	%eax, %ebx
	movl	%ebx, %edi
	callq	_cpu_to_le32
	movl	%eax, 16(%r15)
	movq	_MT_TXD5_PN_HIGH@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_FIELD_PREP
	movl	%eax, %edi
	callq	_cpu_to_le32
	orl	%eax, 20(%r15)
LBB0_29:
	movl	$0, 28(%r15)
	xorl	%eax, %eax
	addq	$88, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_26:
	movl	(%r14), %eax
	notl	%eax
	andl	%eax, %ebx
	xorl	%esi, %esi
	jmp	LBB0_27
	.cfi_endproc
                                        ## -- End function
	.comm	_MT_TXQ_BEACON,4,2              ## @MT_TXQ_BEACON
	.comm	_MT7603_WTBL_RESERVED,4,2       ## @MT7603_WTBL_RESERVED
	.comm	_IEEE80211_FCTL_FTYPE,4,2       ## @IEEE80211_FCTL_FTYPE
	.comm	_IEEE80211_FCTL_STYPE,4,2       ## @IEEE80211_FCTL_STYPE
	.comm	_MT_TXD0_TX_BYTES,4,2           ## @MT_TXD0_TX_BYTES
	.comm	_MT_TXD_SIZE,4,2                ## @MT_TXD_SIZE
	.comm	_MT_TXD0_Q_IDX,4,2              ## @MT_TXD0_Q_IDX
	.comm	_MT_TXD1_LONG_FORMAT,4,2        ## @MT_TXD1_LONG_FORMAT
	.comm	_MT_TXD1_OWN_MAC,4,2            ## @MT_TXD1_OWN_MAC
	.comm	_MT_TXD1_TID,4,2                ## @MT_TXD1_TID
	.comm	_IEEE80211_QOS_CTL_TID_MASK,4,2 ## @IEEE80211_QOS_CTL_TID_MASK
	.comm	_MT_TXD1_HDR_FORMAT,4,2         ## @MT_TXD1_HDR_FORMAT
	.comm	_MT_HDR_FORMAT_802_11,4,2       ## @MT_HDR_FORMAT_802_11
	.comm	_MT_TXD1_HDR_INFO,4,2           ## @MT_TXD1_HDR_INFO
	.comm	_MT_TXD1_WLAN_IDX,4,2           ## @MT_TXD1_WLAN_IDX
	.comm	_MT_TXD1_PROTECTED,4,2          ## @MT_TXD1_PROTECTED
	.comm	_IEEE80211_TX_CTL_NO_ACK,4,2    ## @IEEE80211_TX_CTL_NO_ACK
	.comm	_MT_TXD1_NO_ACK,4,2             ## @MT_TXD1_NO_ACK
	.comm	_MT_TXD2_FRAME_TYPE,4,2         ## @MT_TXD2_FRAME_TYPE
	.comm	_MT_TXD2_SUB_TYPE,4,2           ## @MT_TXD2_SUB_TYPE
	.comm	_MT_TXD2_MULTICAST,4,2          ## @MT_TXD2_MULTICAST
	.comm	_IEEE80211_TX_CTL_AMPDU,4,2     ## @IEEE80211_TX_CTL_AMPDU
	.comm	_MT_TXD2_BA_DISABLE,4,2         ## @MT_TXD2_BA_DISABLE
	.comm	_MT_TXD5_TX_STATUS_HOST,4,2     ## @MT_TXD5_TX_STATUS_HOST
	.comm	_MT_TXD5_SW_POWER_MGMT,4,2      ## @MT_TXD5_SW_POWER_MGMT
	.comm	_MT_TXD5_PID,4,2                ## @MT_TXD5_PID
	.comm	_IEEE80211_TX_CTL_RATE_CTRL_PROBE,4,2 ## @IEEE80211_TX_CTL_RATE_CTRL_PROBE
	.comm	_IEEE80211_TX_CTL_STBC,4,2      ## @IEEE80211_TX_CTL_STBC
	.comm	_MT_TXD2_FIX_RATE,4,2           ## @MT_TXD2_FIX_RATE
	.comm	_MT_TXD6_FIXED_BW,4,2           ## @MT_TXD6_FIXED_BW
	.comm	_MT_TXD6_BW,4,2                 ## @MT_TXD6_BW
	.comm	_MT_TXD6_TX_RATE,4,2            ## @MT_TXD6_TX_RATE
	.comm	_IEEE80211_TX_RC_SHORT_GI,4,2   ## @IEEE80211_TX_RC_SHORT_GI
	.comm	_MT_TXD6_SGI,4,2                ## @MT_TXD6_SGI
	.comm	_IEEE80211_TX_RC_MCS,4,2        ## @IEEE80211_TX_RC_MCS
	.comm	_MT_TXD3_REM_TX_COUNT,4,2       ## @MT_TXD3_REM_TX_COUNT
	.comm	_MT_TXD3_SN_VALID,4,2           ## @MT_TXD3_SN_VALID
	.comm	_MT_TXD3_SEQ,4,2                ## @MT_TXD3_SEQ
	.comm	_MT_TXD3_PN_VALID,4,2           ## @MT_TXD3_PN_VALID
	.comm	_MT_TXD5_PN_HIGH,4,2            ## @MT_TXD5_PN_HIGH
	.no_dead_strip	_mt7603_mac_write_txwi
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function mt7603_mac_write_txwi
_mt7603_mac_write_txwi:                 ; @mt7603_mac_write_txwi
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #144
	.cfi_def_cfa_offset 144
	stp	x28, x27, [sp, #48]             ; 16-byte Folded Spill
	stp	x26, x25, [sp, #64]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #80]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #96]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #112]            ; 16-byte Folded Spill
	stp	x29, x30, [sp, #128]            ; 16-byte Folded Spill
	add	x29, sp, #128
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	mov	x22, x7
	str	w6, [sp, #20]                   ; 4-byte Folded Spill
	mov	x26, x5
	mov	x25, x4
	mov	x21, x3
	mov	x23, x2
	mov	x19, x1
	mov	x27, x0
	mov	x0, x2
	bl	_IEEE80211_SKB_CB
	mov	x24, x0
	ldr	x28, [x23, #8]
	ldp	x20, x8, [x0, #8]
	str	x8, [sp, #24]                   ; 8-byte Folded Spill
	str	x27, [sp]                       ; 8-byte Folded Spill
	ldr	x8, [x27]
	str	w21, [sp, #40]                  ; 4-byte Folded Spill
	ldr	x21, [x8, w21, uxtw #3]
	mov	x0, x23
	bl	_ieee80211_get_hdrlen_from_skb
	mov	x27, x0
	str	x28, [sp, #32]                  ; 8-byte Folded Spill
	ldr	w0, [x28]
	bl	_le16_to_cpu
Lloh0:
	adrp	x9, _MT_TXQ_BEACON@GOTPAGE
Lloh1:
	ldr	x9, [x9, _MT_TXQ_BEACON@GOTPAGEOFF]
	cbz	x20, LBB0_3
; %bb.1:
	ldr	x8, [x20]
	ldr	w8, [x8]
	cbz	w8, LBB0_5
; %bb.2:
	ldr	w9, [x9]
	add	w10, w8, #16
	ldr	w11, [sp, #40]                  ; 4-byte Folded Reload
	cmp	w9, w11
	csel	w20, w8, w10, hi
LBB0_3:
	mov	x28, x22
	cbz	x26, LBB0_6
LBB0_4:
	ldr	x8, [x26]
	ldr	w8, [x8]
	b	LBB0_7
LBB0_5:
	mov	w20, #0
	mov	x28, x22
	cbnz	x26, LBB0_4
LBB0_6:
	mov	w8, #8
LBB0_7:
	str	w8, [sp, #12]                   ; 4-byte Folded Spill
Lloh2:
	adrp	x8, _MT7603_WTBL_RESERVED@GOTPAGE
Lloh3:
	ldr	x8, [x8, _MT7603_WTBL_RESERVED@GOTPAGEOFF]
	cmp	x25, #0
	csel	x8, x8, x25, eq
	ldr	w25, [x8]
Lloh4:
	adrp	x8, _IEEE80211_FCTL_FTYPE@GOTPAGE
Lloh5:
	ldr	x8, [x8, _IEEE80211_FCTL_FTYPE@GOTPAGEOFF]
Lloh6:
	ldr	w8, [x8]
	and	w8, w8, w0
Lloh7:
	adrp	x9, _IEEE80211_FCTL_STYPE@GOTPAGE
Lloh8:
	ldr	x9, [x9, _IEEE80211_FCTL_STYPE@GOTPAGEOFF]
	asr	w26, w8, #2
Lloh9:
	ldr	w8, [x9]
	and	w8, w8, w0
	asr	w8, w8, #4
	str	w8, [sp, #16]                   ; 4-byte Folded Spill
Lloh10:
	adrp	x8, _MT_TXD0_TX_BYTES@GOTPAGE
Lloh11:
	ldr	x8, [x8, _MT_TXD0_TX_BYTES@GOTPAGEOFF]
Lloh12:
	ldr	w0, [x8]
	ldr	w8, [x23]
Lloh13:
	adrp	x9, _MT_TXD_SIZE@GOTPAGE
Lloh14:
	ldr	x9, [x9, _MT_TXD_SIZE@GOTPAGEOFF]
Lloh15:
	ldr	w9, [x9]
	add	w1, w9, w8
	bl	_FIELD_PREP
	mov	x22, x0
Lloh16:
	adrp	x8, _MT_TXD0_Q_IDX@GOTPAGE
Lloh17:
	ldr	x8, [x8, _MT_TXD0_Q_IDX@GOTPAGEOFF]
Lloh18:
	ldr	w0, [x8]
	ldr	w1, [x21]
	bl	_FIELD_PREP
	orr	w0, w0, w22
	bl	_cpu_to_le32
	str	w0, [x19]
Lloh19:
	adrp	x8, _MT_TXD1_LONG_FORMAT@GOTPAGE
Lloh20:
	ldr	x8, [x8, _MT_TXD1_LONG_FORMAT@GOTPAGEOFF]
Lloh21:
	ldr	w21, [x8]
Lloh22:
	adrp	x8, _MT_TXD1_OWN_MAC@GOTPAGE
Lloh23:
	ldr	x8, [x8, _MT_TXD1_OWN_MAC@GOTPAGEOFF]
Lloh24:
	ldr	w0, [x8]
	mov	x1, x20
	bl	_FIELD_PREP
	orr	w20, w0, w21
Lloh25:
	adrp	x8, _MT_TXD1_TID@GOTPAGE
Lloh26:
	ldr	x8, [x8, _MT_TXD1_TID@GOTPAGEOFF]
Lloh27:
	ldr	w0, [x8]
	ldr	w8, [x23, #4]
Lloh28:
	adrp	x9, _IEEE80211_QOS_CTL_TID_MASK@GOTPAGE
Lloh29:
	ldr	x9, [x9, _IEEE80211_QOS_CTL_TID_MASK@GOTPAGEOFF]
Lloh30:
	ldr	w9, [x9]
	and	w1, w9, w8
	bl	_FIELD_PREP
	orr	w20, w20, w0
Lloh31:
	adrp	x8, _MT_TXD1_HDR_FORMAT@GOTPAGE
Lloh32:
	ldr	x8, [x8, _MT_TXD1_HDR_FORMAT@GOTPAGEOFF]
Lloh33:
	ldr	w0, [x8]
Lloh34:
	adrp	x8, _MT_HDR_FORMAT_802_11@GOTPAGE
Lloh35:
	ldr	x8, [x8, _MT_HDR_FORMAT_802_11@GOTPAGEOFF]
Lloh36:
	ldr	w1, [x8]
	bl	_FIELD_PREP
	orr	w20, w20, w0
Lloh37:
	adrp	x8, _MT_TXD1_HDR_INFO@GOTPAGE
Lloh38:
	ldr	x8, [x8, _MT_TXD1_HDR_INFO@GOTPAGEOFF]
Lloh39:
	ldr	w0, [x8]
	cmp	w27, #0
	cinc	w8, w27, lt
	asr	w1, w8, #1
	bl	_FIELD_PREP
	orr	w20, w20, w0
Lloh40:
	adrp	x8, _MT_TXD1_WLAN_IDX@GOTPAGE
Lloh41:
	ldr	x8, [x8, _MT_TXD1_WLAN_IDX@GOTPAGEOFF]
Lloh42:
	ldr	w0, [x8]
	mov	x1, x25
	bl	_FIELD_PREP
	orr	w20, w20, w0
Lloh43:
	adrp	x8, _MT_TXD1_PROTECTED@GOTPAGE
Lloh44:
	ldr	x8, [x8, _MT_TXD1_PROTECTED@GOTPAGEOFF]
Lloh45:
	ldr	w0, [x8]
	cmp	x28, #0
	cset	w1, ne
	bl	_FIELD_PREP
	orr	w0, w20, w0
	bl	_cpu_to_le32
	str	w0, [x19, #4]
	ldr	w8, [x24]
Lloh46:
	adrp	x9, _IEEE80211_TX_CTL_NO_ACK@GOTPAGE
Lloh47:
	ldr	x9, [x9, _IEEE80211_TX_CTL_NO_ACK@GOTPAGEOFF]
Lloh48:
	ldr	w9, [x9]
	tst	w9, w8
	b.eq	LBB0_9
; %bb.8:
Lloh49:
	adrp	x8, _MT_TXD1_NO_ACK@GOTPAGE
Lloh50:
	ldr	x8, [x8, _MT_TXD1_NO_ACK@GOTPAGEOFF]
Lloh51:
	ldr	w0, [x8]
	bl	_cpu_to_le32
	ldr	w8, [x19, #4]
	orr	w8, w8, w0
	str	w8, [x19, #4]
LBB0_9:
Lloh52:
	adrp	x8, _MT_TXD2_FRAME_TYPE@GOTPAGE
Lloh53:
	ldr	x8, [x8, _MT_TXD2_FRAME_TYPE@GOTPAGEOFF]
Lloh54:
	ldr	w0, [x8]
	mov	x1, x26
	bl	_FIELD_PREP
	mov	x20, x0
Lloh55:
	adrp	x8, _MT_TXD2_SUB_TYPE@GOTPAGE
Lloh56:
	ldr	x8, [x8, _MT_TXD2_SUB_TYPE@GOTPAGEOFF]
Lloh57:
	ldr	w0, [x8]
	ldr	w1, [sp, #16]                   ; 4-byte Folded Reload
	bl	_FIELD_PREP
	orr	w21, w0, w20
Lloh58:
	adrp	x8, _MT_TXD2_MULTICAST@GOTPAGE
Lloh59:
	ldr	x8, [x8, _MT_TXD2_MULTICAST@GOTPAGEOFF]
Lloh60:
	ldr	w20, [x8]
	ldr	x23, [sp, #32]                  ; 8-byte Folded Reload
	ldr	w0, [x23, #8]
	bl	_is_multicast_ether_addr
	mov	x1, x0
	mov	x0, x20
	bl	_FIELD_PREP
	orr	w0, w21, w0
	bl	_cpu_to_le32
	str	w0, [x19, #8]
	ldr	w8, [x24]
Lloh61:
	adrp	x9, _IEEE80211_TX_CTL_AMPDU@GOTPAGE
Lloh62:
	ldr	x9, [x9, _IEEE80211_TX_CTL_AMPDU@GOTPAGEOFF]
Lloh63:
	ldr	w9, [x9]
	tst	w9, w8
	ldr	x25, [sp, #24]                  ; 8-byte Folded Reload
Lloh64:
	adrp	x26, _MT_TXQ_BEACON@GOTPAGE
Lloh65:
	ldr	x26, [x26, _MT_TXQ_BEACON@GOTPAGEOFF]
	b.ne	LBB0_11
; %bb.10:
Lloh66:
	adrp	x8, _MT_TXD2_BA_DISABLE@GOTPAGE
Lloh67:
	ldr	x8, [x8, _MT_TXD2_BA_DISABLE@GOTPAGEOFF]
Lloh68:
	ldr	w0, [x8]
	bl	_cpu_to_le32
	ldr	w8, [x19, #8]
	orr	w8, w8, w0
	str	w8, [x19, #8]
LBB0_11:
	str	wzr, [x19, #16]
Lloh69:
	adrp	x8, _MT_TXD5_TX_STATUS_HOST@GOTPAGE
Lloh70:
	ldr	x8, [x8, _MT_TXD5_TX_STATUS_HOST@GOTPAGEOFF]
Lloh71:
	adrp	x9, _MT_TXD5_SW_POWER_MGMT@GOTPAGE
Lloh72:
	ldr	x9, [x9, _MT_TXD5_SW_POWER_MGMT@GOTPAGEOFF]
Lloh73:
	ldr	w8, [x8]
Lloh74:
	ldr	w9, [x9]
	orr	w20, w9, w8
Lloh75:
	adrp	x8, _MT_TXD5_PID@GOTPAGE
Lloh76:
	ldr	x8, [x8, _MT_TXD5_PID@GOTPAGEOFF]
Lloh77:
	ldr	w0, [x8]
	ldr	w1, [sp, #20]                   ; 4-byte Folded Reload
	bl	_FIELD_PREP
	orr	w0, w20, w0
	bl	_cpu_to_le32
	stp	w0, wzr, [x19, #20]
	ldr	x8, [x25]
	tbnz	x8, #63, LBB0_19
; %bb.12:
	ldr	w8, [x25, #8]
	cbz	w8, LBB0_19
; %bb.13:
	ldr	w8, [x24]
Lloh78:
	adrp	x9, _IEEE80211_TX_CTL_RATE_CTRL_PROBE@GOTPAGE
Lloh79:
	ldr	x9, [x9, _IEEE80211_TX_CTL_RATE_CTRL_PROBE@GOTPAGEOFF]
Lloh80:
	ldr	w9, [x9]
	tst	w9, w8
	ldr	w11, [sp, #12]                  ; 4-byte Folded Reload
	b.ne	LBB0_20
; %bb.14:
Lloh81:
	adrp	x9, _IEEE80211_TX_CTL_STBC@GOTPAGE
Lloh82:
	ldr	x9, [x9, _IEEE80211_TX_CTL_STBC@GOTPAGEOFF]
Lloh83:
	ldr	w9, [x9]
	and	w2, w9, w8
	add	x3, sp, #44
	ldr	x0, [sp]                        ; 8-byte Folded Reload
	mov	x1, x25
	bl	_mt7603_mac_tx_rate_val
	mov	x20, x0
Lloh84:
	adrp	x8, _MT_TXD2_FIX_RATE@GOTPAGE
Lloh85:
	ldr	x8, [x8, _MT_TXD2_FIX_RATE@GOTPAGEOFF]
Lloh86:
	ldr	w0, [x8]
	bl	_cpu_to_le32
	ldr	w8, [x19, #8]
	orr	w8, w8, w0
Lloh87:
	adrp	x9, _MT_TXD6_FIXED_BW@GOTPAGE
Lloh88:
	ldr	x9, [x9, _MT_TXD6_FIXED_BW@GOTPAGEOFF]
	str	w8, [x19, #8]
Lloh89:
	ldr	w21, [x9]
Lloh90:
	adrp	x8, _MT_TXD6_BW@GOTPAGE
Lloh91:
	ldr	x8, [x8, _MT_TXD6_BW@GOTPAGEOFF]
Lloh92:
	ldr	w0, [x8]
	ldr	w1, [sp, #44]
	bl	_FIELD_PREP
	orr	w21, w0, w21
Lloh93:
	adrp	x8, _MT_TXD6_TX_RATE@GOTPAGE
Lloh94:
	ldr	x8, [x8, _MT_TXD6_TX_RATE@GOTPAGEOFF]
Lloh95:
	ldr	w0, [x8]
	mov	x1, x20
	bl	_FIELD_PREP
	orr	w0, w21, w0
	bl	_cpu_to_le32
	ldr	w8, [x19, #24]
	orr	w8, w8, w0
	str	w8, [x19, #24]
	ldr	w8, [x25, #12]
Lloh96:
	adrp	x9, _IEEE80211_TX_RC_SHORT_GI@GOTPAGE
Lloh97:
	ldr	x9, [x9, _IEEE80211_TX_RC_SHORT_GI@GOTPAGEOFF]
Lloh98:
	ldr	w9, [x9]
	tst	w9, w8
	b.eq	LBB0_16
; %bb.15:
Lloh99:
	adrp	x8, _MT_TXD6_SGI@GOTPAGE
Lloh100:
	ldr	x8, [x8, _MT_TXD6_SGI@GOTPAGEOFF]
Lloh101:
	ldr	w0, [x8]
	bl	_cpu_to_le32
	ldr	w8, [x19, #24]
	orr	w8, w8, w0
	str	w8, [x19, #24]
	ldr	w8, [x25, #12]
LBB0_16:
Lloh102:
	adrp	x9, _IEEE80211_TX_RC_MCS@GOTPAGE
Lloh103:
	ldr	x9, [x9, _IEEE80211_TX_RC_MCS@GOTPAGEOFF]
Lloh104:
	ldr	w9, [x9]
	tst	w9, w8
	b.ne	LBB0_18
; %bb.17:
Lloh105:
	adrp	x8, _MT_TXD2_BA_DISABLE@GOTPAGE
Lloh106:
	ldr	x8, [x8, _MT_TXD2_BA_DISABLE@GOTPAGEOFF]
Lloh107:
	ldr	w0, [x8]
	bl	_cpu_to_le32
	ldr	w8, [x19, #8]
	orr	w8, w8, w0
	str	w8, [x19, #8]
LBB0_18:
	ldr	w11, [x25, #8]
	b	LBB0_20
LBB0_19:
	ldr	w11, [sp, #12]                  ; 4-byte Folded Reload
LBB0_20:
	ldr	w8, [x26]
	mov	w9, #31
	ldr	w10, [sp, #40]                  ; 4-byte Folded Reload
	cmp	w8, w10
	csel	w1, w11, w9, hi
Lloh108:
	adrp	x8, _MT_TXD3_REM_TX_COUNT@GOTPAGE
Lloh109:
	ldr	x8, [x8, _MT_TXD3_REM_TX_COUNT@GOTPAGEOFF]
Lloh110:
	ldr	w0, [x8]
	bl	_FIELD_PREP
Lloh111:
	adrp	x21, _MT_TXD3_SN_VALID@GOTPAGE
Lloh112:
	ldr	x21, [x21, _MT_TXD3_SN_VALID@GOTPAGEOFF]
	ldr	w8, [x21]
	orr	w20, w8, w0
	ldr	w0, [x23]
	bl	_ieee80211_is_data_qos
	cbz	x0, LBB0_22
; %bb.21:
	ldr	w0, [x23, #4]
	bl	_le16_to_cpu
	b	LBB0_25
LBB0_22:
	ldr	w0, [x23]
	bl	_ieee80211_is_back_req
	cbz	x0, LBB0_24
; %bb.23:
	ldr	w0, [x23]
	bl	_le16_to_cpu
	b	LBB0_25
LBB0_24:
	ldr	w8, [x21]
	bic	w20, w20, w8
LBB0_25:
Lloh113:
	adrp	x8, _MT_TXD3_SEQ@GOTPAGE
Lloh114:
	ldr	x8, [x8, _MT_TXD3_SEQ@GOTPAGEOFF]
Lloh115:
	ldr	w8, [x8]
	asr	w1, w0, #4
	mov	x0, x8
	bl	_FIELD_PREP
	orr	w0, w0, w20
	bl	_cpu_to_le32
	str	w0, [x19, #12]
	cbz	x28, LBB0_27
; %bb.26:
	mov	x0, x28
	bl	_atomic64_inc_return
	mov	x20, x0
Lloh116:
	adrp	x8, _MT_TXD3_PN_VALID@GOTPAGE
Lloh117:
	ldr	x8, [x8, _MT_TXD3_PN_VALID@GOTPAGEOFF]
Lloh118:
	ldr	w0, [x8]
	bl	_cpu_to_le32
	ldr	w8, [x19, #12]
	orr	w8, w8, w0
	str	w8, [x19, #12]
	mov	w0, #31
	mov	w1, #0
	bl	_GENMASK
	and	w0, w0, w20
	bl	_cpu_to_le32
	str	w0, [x19, #16]
Lloh119:
	adrp	x8, _MT_TXD5_PN_HIGH@GOTPAGE
Lloh120:
	ldr	x8, [x8, _MT_TXD5_PN_HIGH@GOTPAGEOFF]
Lloh121:
	ldr	w0, [x8]
	bl	_FIELD_PREP
	bl	_cpu_to_le32
	ldr	w8, [x19, #20]
	orr	w8, w8, w0
	str	w8, [x19, #20]
LBB0_27:
	str	wzr, [x19, #28]
	mov	w0, #0
	ldp	x29, x30, [sp, #128]            ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #112]            ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #96]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #80]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #64]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp, #48]             ; 16-byte Folded Reload
	add	sp, sp, #144
	ret
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh46, Lloh47, Lloh48
	.loh AdrpLdrGotLdr	Lloh43, Lloh44, Lloh45
	.loh AdrpLdrGotLdr	Lloh40, Lloh41, Lloh42
	.loh AdrpLdrGotLdr	Lloh37, Lloh38, Lloh39
	.loh AdrpLdrGotLdr	Lloh34, Lloh35, Lloh36
	.loh AdrpLdrGotLdr	Lloh31, Lloh32, Lloh33
	.loh AdrpLdrGotLdr	Lloh28, Lloh29, Lloh30
	.loh AdrpLdrGotLdr	Lloh25, Lloh26, Lloh27
	.loh AdrpLdrGotLdr	Lloh22, Lloh23, Lloh24
	.loh AdrpLdrGotLdr	Lloh19, Lloh20, Lloh21
	.loh AdrpLdrGotLdr	Lloh16, Lloh17, Lloh18
	.loh AdrpLdrGotLdr	Lloh13, Lloh14, Lloh15
	.loh AdrpLdrGotLdr	Lloh10, Lloh11, Lloh12
	.loh AdrpLdrGotLdr	Lloh7, Lloh8, Lloh9
	.loh AdrpLdrGotLdr	Lloh4, Lloh5, Lloh6
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpLdrGotLdr	Lloh49, Lloh50, Lloh51
	.loh AdrpLdrGot	Lloh64, Lloh65
	.loh AdrpLdrGotLdr	Lloh61, Lloh62, Lloh63
	.loh AdrpLdrGotLdr	Lloh58, Lloh59, Lloh60
	.loh AdrpLdrGotLdr	Lloh55, Lloh56, Lloh57
	.loh AdrpLdrGotLdr	Lloh52, Lloh53, Lloh54
	.loh AdrpLdrGotLdr	Lloh66, Lloh67, Lloh68
	.loh AdrpLdrGotLdr	Lloh75, Lloh76, Lloh77
	.loh AdrpLdrGotLdr	Lloh71, Lloh72, Lloh74
	.loh AdrpLdrGotLdr	Lloh69, Lloh70, Lloh73
	.loh AdrpLdrGotLdr	Lloh78, Lloh79, Lloh80
	.loh AdrpLdrGotLdr	Lloh96, Lloh97, Lloh98
	.loh AdrpLdrGotLdr	Lloh93, Lloh94, Lloh95
	.loh AdrpLdrGotLdr	Lloh90, Lloh91, Lloh92
	.loh AdrpLdrGotLdr	Lloh87, Lloh88, Lloh89
	.loh AdrpLdrGotLdr	Lloh84, Lloh85, Lloh86
	.loh AdrpLdrGotLdr	Lloh81, Lloh82, Lloh83
	.loh AdrpLdrGotLdr	Lloh99, Lloh100, Lloh101
	.loh AdrpLdrGotLdr	Lloh102, Lloh103, Lloh104
	.loh AdrpLdrGotLdr	Lloh105, Lloh106, Lloh107
	.loh AdrpLdrGot	Lloh111, Lloh112
	.loh AdrpLdrGotLdr	Lloh108, Lloh109, Lloh110
	.loh AdrpLdrGotLdr	Lloh113, Lloh114, Lloh115
	.loh AdrpLdrGotLdr	Lloh119, Lloh120, Lloh121
	.loh AdrpLdrGotLdr	Lloh116, Lloh117, Lloh118
	.cfi_endproc
                                        ; -- End function
	.comm	_MT_TXQ_BEACON,4,2              ; @MT_TXQ_BEACON
	.comm	_MT7603_WTBL_RESERVED,4,2       ; @MT7603_WTBL_RESERVED
	.comm	_IEEE80211_FCTL_FTYPE,4,2       ; @IEEE80211_FCTL_FTYPE
	.comm	_IEEE80211_FCTL_STYPE,4,2       ; @IEEE80211_FCTL_STYPE
	.comm	_MT_TXD0_TX_BYTES,4,2           ; @MT_TXD0_TX_BYTES
	.comm	_MT_TXD_SIZE,4,2                ; @MT_TXD_SIZE
	.comm	_MT_TXD0_Q_IDX,4,2              ; @MT_TXD0_Q_IDX
	.comm	_MT_TXD1_LONG_FORMAT,4,2        ; @MT_TXD1_LONG_FORMAT
	.comm	_MT_TXD1_OWN_MAC,4,2            ; @MT_TXD1_OWN_MAC
	.comm	_MT_TXD1_TID,4,2                ; @MT_TXD1_TID
	.comm	_IEEE80211_QOS_CTL_TID_MASK,4,2 ; @IEEE80211_QOS_CTL_TID_MASK
	.comm	_MT_TXD1_HDR_FORMAT,4,2         ; @MT_TXD1_HDR_FORMAT
	.comm	_MT_HDR_FORMAT_802_11,4,2       ; @MT_HDR_FORMAT_802_11
	.comm	_MT_TXD1_HDR_INFO,4,2           ; @MT_TXD1_HDR_INFO
	.comm	_MT_TXD1_WLAN_IDX,4,2           ; @MT_TXD1_WLAN_IDX
	.comm	_MT_TXD1_PROTECTED,4,2          ; @MT_TXD1_PROTECTED
	.comm	_IEEE80211_TX_CTL_NO_ACK,4,2    ; @IEEE80211_TX_CTL_NO_ACK
	.comm	_MT_TXD1_NO_ACK,4,2             ; @MT_TXD1_NO_ACK
	.comm	_MT_TXD2_FRAME_TYPE,4,2         ; @MT_TXD2_FRAME_TYPE
	.comm	_MT_TXD2_SUB_TYPE,4,2           ; @MT_TXD2_SUB_TYPE
	.comm	_MT_TXD2_MULTICAST,4,2          ; @MT_TXD2_MULTICAST
	.comm	_IEEE80211_TX_CTL_AMPDU,4,2     ; @IEEE80211_TX_CTL_AMPDU
	.comm	_MT_TXD2_BA_DISABLE,4,2         ; @MT_TXD2_BA_DISABLE
	.comm	_MT_TXD5_TX_STATUS_HOST,4,2     ; @MT_TXD5_TX_STATUS_HOST
	.comm	_MT_TXD5_SW_POWER_MGMT,4,2      ; @MT_TXD5_SW_POWER_MGMT
	.comm	_MT_TXD5_PID,4,2                ; @MT_TXD5_PID
	.comm	_IEEE80211_TX_CTL_RATE_CTRL_PROBE,4,2 ; @IEEE80211_TX_CTL_RATE_CTRL_PROBE
	.comm	_IEEE80211_TX_CTL_STBC,4,2      ; @IEEE80211_TX_CTL_STBC
	.comm	_MT_TXD2_FIX_RATE,4,2           ; @MT_TXD2_FIX_RATE
	.comm	_MT_TXD6_FIXED_BW,4,2           ; @MT_TXD6_FIXED_BW
	.comm	_MT_TXD6_BW,4,2                 ; @MT_TXD6_BW
	.comm	_MT_TXD6_TX_RATE,4,2            ; @MT_TXD6_TX_RATE
	.comm	_IEEE80211_TX_RC_SHORT_GI,4,2   ; @IEEE80211_TX_RC_SHORT_GI
	.comm	_MT_TXD6_SGI,4,2                ; @MT_TXD6_SGI
	.comm	_IEEE80211_TX_RC_MCS,4,2        ; @IEEE80211_TX_RC_MCS
	.comm	_MT_TXD3_REM_TX_COUNT,4,2       ; @MT_TXD3_REM_TX_COUNT
	.comm	_MT_TXD3_SN_VALID,4,2           ; @MT_TXD3_SN_VALID
	.comm	_MT_TXD3_SEQ,4,2                ; @MT_TXD3_SEQ
	.comm	_MT_TXD3_PN_VALID,4,2           ; @MT_TXD3_PN_VALID
	.comm	_MT_TXD5_PN_HIGH,4,2            ; @MT_TXD5_PN_HIGH
	.no_dead_strip	_mt7603_mac_write_txwi
.subsections_via_symbols
