	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function b43_nphy_gain_ctl_workarounds_rev1_2
_b43_nphy_gain_ctl_workarounds_rev1_2:  ## @b43_nphy_gain_ctl_workarounds_rev1_2
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$104, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r13
	movq	___stack_chk_guard@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	movq	%rax, -48(%rbp)
	movq	16(%rdi), %rbx
	movl	l___const.b43_nphy_gain_ctl_workarounds_rev1_2.rfseq_events+8(%rip), %eax
	movl	%eax, -56(%rbp)
	movq	l___const.b43_nphy_gain_ctl_workarounds_rev1_2.rfseq_events(%rip), %rax
	movq	%rax, -64(%rbp)
	movl	l___const.b43_nphy_gain_ctl_workarounds_rev1_2.rfseq_delays+8(%rip), %eax
	movl	%eax, -72(%rbp)
	movq	l___const.b43_nphy_gain_ctl_workarounds_rev1_2.rfseq_delays(%rip), %rax
	movq	%rax, -80(%rbp)
	movq	_B43_NPHY_C1_CGAINI@GOTPCREL(%rip), %r15
	movl	(%r15), %esi
	movq	_B43_NPHY_C1_CGAINI_CL2DETECT@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	callq	_b43_phy_set
	movq	_B43_NPHY_C2_CGAINI@GOTPCREL(%rip), %r14
	movl	(%r14), %esi
	movq	_B43_NPHY_C2_CGAINI_CL2DETECT@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r13, %rdi
	callq	_b43_phy_set
	movq	_B43_NPHY_C1_NBCLIPTHRES@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r13, %rdi
	movl	$132, %edx
	callq	_b43_phy_write
	movq	_B43_NPHY_C2_NBCLIPTHRES@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r13, %rdi
	movl	$132, %edx
	callq	_b43_phy_write
	movq	%r13, %rdi
	callq	_b43_is_40mhz
	testq	%rax, %rax
	jne	LBB0_2
## %bb.1:
	movq	_B43_NPHY_CLIP1_NBDWELL_LEN@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r13, %rdi
	movl	$43, %edx
	callq	_b43_phy_write
	movq	_B43_NPHY_CLIP2_NBDWELL_LEN@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r13, %rdi
	movl	$43, %edx
	callq	_b43_phy_write
	movq	_B43_NPHY_W1CLIP1_DWELL_LEN@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r13, %rdi
	movl	$9, %edx
	callq	_b43_phy_write
	movq	_B43_NPHY_W1CLIP2_DWELL_LEN@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r13, %rdi
	movl	$9, %edx
	callq	_b43_phy_write
LBB0_2:
	movq	_B43_NPHY_C1_CLIPWBTHRES@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_B43_NPHY_C1_CLIPWBTHRES_CLIP2@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	notl	%edx
	movq	%r13, %rdi
	movl	$21, %ecx
	callq	_b43_phy_maskset
	movq	_B43_NPHY_C2_CLIPWBTHRES@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_B43_NPHY_C2_CLIPWBTHRES_CLIP2@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	notl	%edx
	movq	%r13, %rdi
	movl	$21, %ecx
	callq	_b43_phy_maskset
	movq	%r13, %rdi
	callq	_b43_is_40mhz
	testq	%rax, %rax
	jne	LBB0_4
## %bb.3:
	movl	(%r15), %esi
	movq	_B43_NPHY_C1_CGAINI_GAINBKOFF@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	notl	%edx
	movq	%r13, %rdi
	movl	$1, %ecx
	callq	_b43_phy_maskset
	movl	(%r14), %esi
	movq	_B43_NPHY_C2_CGAINI_GAINBKOFF@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	notl	%edx
	movq	%r13, %rdi
	movl	$1, %ecx
	callq	_b43_phy_maskset
	movq	_B43_NPHY_C1_CCK_CGAINI@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_B43_NPHY_C1_CCK_CGAINI_GAINBKOFF@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	notl	%edx
	movq	%r13, %rdi
	movl	$1, %ecx
	callq	_b43_phy_maskset
	movq	_B43_NPHY_C2_CCK_CGAINI@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_B43_NPHY_C2_CCK_CGAINI_GAINBKOFF@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	notl	%edx
	movq	%r13, %rdi
	movl	$1, %ecx
	callq	_b43_phy_maskset
LBB0_4:
	movq	_B43_NPHY_CCK_SHIFTB_REF@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r13, %rdi
	movl	$32924, %edx                    ## imm = 0x809C
	callq	_b43_phy_write
	cmpq	$0, 8(%rbx)
	movq	%rbx, -88(%rbp)                 ## 8-byte Spill
	je	LBB0_8
## %bb.5:
	movl	(%r13), %edi
	callq	_b43_current_band
	movq	_NL80211_BAND_2GHZ@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jne	LBB0_7
## %bb.6:
	movq	%r13, %rdi
	callq	_b43_is_40mhz
	movl	$4, %r14d
	testq	%rax, %rax
	jne	LBB0_9
LBB0_7:
	movl	$5, %r14d
	jmp	LBB0_9
LBB0_8:
	movq	%r13, %rdi
	callq	_b43_is_40mhz
	xorl	%r14d, %r14d
	testq	%rax, %rax
	sete	%r14b
	orl	$6, %r14d
LBB0_9:
	movq	_B43_NPHY_C1_INITGAIN@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_B43_NPHY_C1_INITGAIN_HPVGA2@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	notl	%edx
	movq	_B43_NPHY_C1_INITGAIN_HPVGA2_SHIFT@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	movl	%r14d, %eax
	shll	%cl, %eax
	movq	%r13, %rdi
	movl	%eax, %ecx
	callq	_b43_phy_maskset
	movq	_B43_NPHY_C2_INITGAIN@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_B43_NPHY_C2_INITGAIN_HPVGA2@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	notl	%edx
	movq	_B43_NPHY_C2_INITGAIN_HPVGA2_SHIFT@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	movl	%r14d, %eax
	shll	%cl, %eax
	movq	%r13, %rdi
	movl	%eax, %ecx
	callq	_b43_phy_maskset
	movq	_B43_NPHY_TABLE_ADDR@GOTPCREL(%rip), %rbx
	movl	(%rbx), %esi
	movq	%r13, %rdi
	movl	$7430, %edx                     ## imm = 0x1D06
	callq	_b43_phy_write
	shll	$8, %r14d
	leal	124(%r14), %r15d
	movq	_B43_NPHY_TABLE_DATALO@GOTPCREL(%rip), %r12
	movl	(%r12), %esi
	movq	%r13, %rdi
	movl	%r15d, %edx
	callq	_b43_phy_write
	movl	(%r12), %esi
	movq	%r13, %rdi
	movl	%r15d, %edx
	callq	_b43_phy_write
	movl	(%r12), %esi
	movq	%r13, %rdi
	movl	%r15d, %edx
	callq	_b43_phy_write
	movl	(%r12), %esi
	movq	%r13, %rdi
	movl	%r15d, %edx
	callq	_b43_phy_write
	movq	%r13, %rdi
	callq	_b43_nphy_adjust_lna_gain_table
	movq	-88(%rbp), %rax                 ## 8-byte Reload
	cmpq	$0, (%rax)
	je	LBB0_11
## %bb.10:
	movl	(%rbx), %esi
	movq	%r13, %rdi
	movl	$2056, %edx                     ## imm = 0x808
	callq	_b43_phy_write
	movl	(%r12), %esi
	movq	%r13, %rdi
	xorl	%edx, %edx
	callq	_b43_phy_write
	movl	(%r12), %esi
	movq	%r13, %rdi
	movl	$1, %edx
	callq	_b43_phy_write
	movl	(%r12), %esi
	movq	%r13, %rdi
	movl	$1, %edx
	callq	_b43_phy_write
	movl	(%r12), %esi
	movq	%r13, %rdi
	movl	$1, %edx
	callq	_b43_phy_write
	movl	(%rbx), %esi
	movq	%r13, %rdi
	movl	$3080, %edx                     ## imm = 0xC08
	callq	_b43_phy_write
	movl	(%r12), %esi
	movq	%r13, %rdi
	xorl	%edx, %edx
	callq	_b43_phy_write
	movl	(%r12), %esi
	movq	%r13, %rdi
	movl	$1, %edx
	callq	_b43_phy_write
	movl	(%r12), %esi
	movq	%r13, %rdi
	movl	$1, %edx
	callq	_b43_phy_write
	movl	(%r12), %esi
	movq	%r13, %rdi
	movl	$1, %edx
	callq	_b43_phy_write
	movl	(%rbx), %esi
	movq	%r13, %rdi
	movl	$7430, %edx                     ## imm = 0x1D06
	callq	_b43_phy_write
	orl	$116, %r14d
	movl	(%r12), %esi
	movq	%r13, %rdi
	movl	%r14d, %edx
	callq	_b43_phy_write
	movl	(%r12), %esi
	movq	%r13, %rdi
	movl	%r14d, %edx
	callq	_b43_phy_write
	movl	(%r12), %esi
	movq	%r13, %rdi
	movl	%r14d, %edx
	callq	_b43_phy_write
	movl	(%r12), %esi
	movq	%r13, %rdi
	movl	%r14d, %edx
	callq	_b43_phy_write
LBB0_11:
	cmpl	$2, 8(%r13)
	jne	LBB0_14
## %bb.12:
	xorl	%r14d, %r14d
	movl	$32, %eax
	.p2align	4, 0x90
LBB0_13:                                ## =>This Inner Loop Header: Depth=1
	movl	%eax, -88(%rbp)                 ## 4-byte Spill
	movl	%r14d, -92(%rbp)                ## 4-byte Spill
	movl	(%rbx), %esi
	movq	%r13, %rdi
	movl	-88(%rbp), %edx                 ## 4-byte Reload
	callq	_b43_phy_write
	xorl	%r15d, %r15d
	cmpl	$2, %r14d
	setb	%r15b
	movq	%r15, -144(%rbp)                ## 8-byte Spill
	leal	(%r15,%r15), %r14d
	incl	%r14d
                                        ## kill: def $r15d killed $r15d killed $r15 def $r15
	addl	%r15d, %r15d
	movl	(%r12), %esi
	movq	%r13, %rdi
	xorl	%edx, %edx
	callq	_b43_phy_write
	movl	(%r12), %esi
	movq	%r13, %rdi
	movl	%r14d, %edx
	callq	_b43_phy_write
	leal	(%r15,%r15), %edx
	addl	$2, %edx
	movl	(%r12), %esi
	movq	%r13, %rdi
	movq	%rdx, %rbx
	movq	%rdx, -104(%rbp)                ## 8-byte Spill
	callq	_b43_phy_write
	movl	(%r12), %esi
	leal	(%r14,%r14,2), %edx
	movq	%rdx, -128(%rbp)                ## 8-byte Spill
	movq	%r13, %rdi
                                        ## kill: def $edx killed $edx killed $rdx
	callq	_b43_phy_write
	leal	4(,%r15,4), %edx
	movq	%rdx, -120(%rbp)                ## 8-byte Spill
	movl	(%r12), %esi
	movq	%r13, %rdi
                                        ## kill: def $edx killed $edx killed $rdx
	callq	_b43_phy_write
	movl	(%r12), %esi
	leal	(%r14,%r14,4), %edx
	movq	%rdx, -112(%rbp)                ## 8-byte Spill
	movq	%r13, %rdi
                                        ## kill: def $edx killed $edx killed $rdx
	callq	_b43_phy_write
	leal	(%rbx,%rbx,2), %edx
	movl	(%r12), %esi
	movq	%r13, %rdi
	callq	_b43_phy_write
	leal	8(,%r15,8), %ebx
	movl	%ebx, %edx
	subl	%r14d, %edx
	movl	(%r12), %esi
	movq	%r13, %rdi
	callq	_b43_phy_write
	movl	(%r12), %esi
	movq	%r13, %rdi
	movl	%ebx, %edx
	callq	_b43_phy_write
	movl	(%r12), %esi
	leal	(%r14,%r14,8), %edx
	movq	%rdx, -136(%rbp)                ## 8-byte Spill
	movq	%r13, %rdi
                                        ## kill: def $edx killed $edx killed $rdx
	callq	_b43_phy_write
	movq	-104(%rbp), %rax                ## 8-byte Reload
	leal	(%rax,%rax,4), %edx
	movl	(%r12), %esi
	movq	%r13, %rdi
	callq	_b43_phy_write
	movq	-112(%rbp), %rax                ## 8-byte Reload
	leal	(%r15,%rax,2), %edx
	incl	%edx
	movl	(%r12), %esi
	movq	%r13, %rdi
	callq	_b43_phy_write
	movq	-120(%rbp), %rax                ## 8-byte Reload
	leal	(%rax,%rax,2), %edx
	movl	(%r12), %esi
	movq	%r13, %rdi
	callq	_b43_phy_write
	movq	-128(%rbp), %rax                ## 8-byte Reload
	leal	(%r15,%rax,4), %edx
	incl	%edx
	movl	(%r12), %esi
	movq	%r13, %rdi
	callq	_b43_phy_write
	movl	%r14d, %ebx
	shll	$4, %ebx
	movl	%ebx, %edx
	subl	%r14d, %edx
	subl	%r14d, %edx
	movl	-92(%rbp), %r14d                ## 4-byte Reload
	movl	(%r12), %esi
	movq	%r13, %rdi
	callq	_b43_phy_write
	movq	-112(%rbp), %rax                ## 8-byte Reload
	leal	(%rax,%rax,2), %edx
	movl	(%r12), %esi
	movq	%r13, %rdi
	callq	_b43_phy_write
	movl	(%r12), %esi
	movq	%r13, %rdi
	movl	%ebx, %edx
	callq	_b43_phy_write
	movq	-144(%rbp), %rax                ## 8-byte Reload
	leal	(%rbx,%rax,2), %edx
	incl	%edx
	movl	(%r12), %esi
	movq	%r13, %rdi
	callq	_b43_phy_write
	movq	-104(%rbp), %rax                ## 8-byte Reload
	leal	(%rax,%rax,8), %edx
	movl	(%r12), %esi
	movq	%r13, %rdi
	callq	_b43_phy_write
	movq	-136(%rbp), %rax                ## 8-byte Reload
	leal	(%r15,%rax,2), %edx
	incl	%edx
	movq	_B43_NPHY_TABLE_ADDR@GOTPCREL(%rip), %rbx
	movl	(%r12), %esi
	movq	%r13, %rdi
	callq	_b43_phy_write
	movq	-120(%rbp), %rax                ## 8-byte Reload
	leal	(%rax,%rax,4), %edx
	movl	(%r12), %esi
	movq	%r13, %rdi
	callq	_b43_phy_write
	movl	-88(%rbp), %eax                 ## 4-byte Reload
	incl	%r14d
	addl	$1024, %eax                     ## imm = 0x400
	cmpl	$4128, %eax                     ## imm = 0x1020
	jne	LBB0_13
LBB0_14:
	leaq	-64(%rbp), %rdx
	leaq	-80(%rbp), %rcx
	movq	%r13, %rdi
	movl	$5, %esi
	movl	$3, %r8d
	callq	_b43_nphy_set_rf_sequence
	movq	_B43_NPHY_OVER_DGAIN1@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_B43_NPHY_OVER_DGAIN_CCKDGECV@GOTPCREL(%rip), %rax
	movzwl	(%rax), %edx
	xorl	$65535, %edx                    ## imm = 0xFFFF
	movq	_B43_NPHY_OVER_DGAIN_CCKDGECV_SHIFT@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	movl	$90, %eax
	shll	%cl, %eax
	movq	%r13, %rdi
	movl	%eax, %ecx
	callq	_b43_phy_maskset
	movl	(%r13), %edi
	callq	_b43_current_band
	movq	_NL80211_BAND_2GHZ@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jne	LBB0_16
## %bb.15:
	movl	$3165, %edi                     ## imm = 0xC5D
	callq	_B43_PHY_N
	movq	%r13, %rdi
	movl	%eax, %esi
	movl	$65408, %edx                    ## imm = 0xFF80
	movl	$4, %ecx
	callq	_b43_phy_maskset
LBB0_16:
	movq	___stack_chk_guard@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	cmpq	-48(%rbp), %rax
	jne	LBB0_18
## %bb.17:
	addq	$104, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_18:
	callq	___stack_chk_fail
	.cfi_endproc
                                        ## -- End function
	.section	__TEXT,__const
	.p2align	2                               ## @__const.b43_nphy_gain_ctl_workarounds_rev1_2.rfseq_events
l___const.b43_nphy_gain_ctl_workarounds_rev1_2.rfseq_events:
	.long	6                               ## 0x6
	.long	8                               ## 0x8
	.long	7                               ## 0x7

	.p2align	2                               ## @__const.b43_nphy_gain_ctl_workarounds_rev1_2.rfseq_delays
l___const.b43_nphy_gain_ctl_workarounds_rev1_2.rfseq_delays:
	.long	10                              ## 0xa
	.long	30                              ## 0x1e
	.long	1                               ## 0x1

	.comm	_B43_NPHY_C1_CGAINI,4,2         ## @B43_NPHY_C1_CGAINI
	.comm	_B43_NPHY_C1_CGAINI_CL2DETECT,4,2 ## @B43_NPHY_C1_CGAINI_CL2DETECT
	.comm	_B43_NPHY_C2_CGAINI,4,2         ## @B43_NPHY_C2_CGAINI
	.comm	_B43_NPHY_C2_CGAINI_CL2DETECT,4,2 ## @B43_NPHY_C2_CGAINI_CL2DETECT
	.comm	_B43_NPHY_C1_NBCLIPTHRES,4,2    ## @B43_NPHY_C1_NBCLIPTHRES
	.comm	_B43_NPHY_C2_NBCLIPTHRES,4,2    ## @B43_NPHY_C2_NBCLIPTHRES
	.comm	_B43_NPHY_CLIP1_NBDWELL_LEN,4,2 ## @B43_NPHY_CLIP1_NBDWELL_LEN
	.comm	_B43_NPHY_CLIP2_NBDWELL_LEN,4,2 ## @B43_NPHY_CLIP2_NBDWELL_LEN
	.comm	_B43_NPHY_W1CLIP1_DWELL_LEN,4,2 ## @B43_NPHY_W1CLIP1_DWELL_LEN
	.comm	_B43_NPHY_W1CLIP2_DWELL_LEN,4,2 ## @B43_NPHY_W1CLIP2_DWELL_LEN
	.comm	_B43_NPHY_C1_CLIPWBTHRES,4,2    ## @B43_NPHY_C1_CLIPWBTHRES
	.comm	_B43_NPHY_C1_CLIPWBTHRES_CLIP2,4,2 ## @B43_NPHY_C1_CLIPWBTHRES_CLIP2
	.comm	_B43_NPHY_C2_CLIPWBTHRES,4,2    ## @B43_NPHY_C2_CLIPWBTHRES
	.comm	_B43_NPHY_C2_CLIPWBTHRES_CLIP2,4,2 ## @B43_NPHY_C2_CLIPWBTHRES_CLIP2
	.comm	_B43_NPHY_C1_CGAINI_GAINBKOFF,4,2 ## @B43_NPHY_C1_CGAINI_GAINBKOFF
	.comm	_B43_NPHY_C2_CGAINI_GAINBKOFF,4,2 ## @B43_NPHY_C2_CGAINI_GAINBKOFF
	.comm	_B43_NPHY_C1_CCK_CGAINI,4,2     ## @B43_NPHY_C1_CCK_CGAINI
	.comm	_B43_NPHY_C1_CCK_CGAINI_GAINBKOFF,4,2 ## @B43_NPHY_C1_CCK_CGAINI_GAINBKOFF
	.comm	_B43_NPHY_C2_CCK_CGAINI,4,2     ## @B43_NPHY_C2_CCK_CGAINI
	.comm	_B43_NPHY_C2_CCK_CGAINI_GAINBKOFF,4,2 ## @B43_NPHY_C2_CCK_CGAINI_GAINBKOFF
	.comm	_B43_NPHY_CCK_SHIFTB_REF,4,2    ## @B43_NPHY_CCK_SHIFTB_REF
	.comm	_NL80211_BAND_2GHZ,8,3          ## @NL80211_BAND_2GHZ
	.comm	_B43_NPHY_C1_INITGAIN,4,2       ## @B43_NPHY_C1_INITGAIN
	.comm	_B43_NPHY_C1_INITGAIN_HPVGA2,4,2 ## @B43_NPHY_C1_INITGAIN_HPVGA2
	.comm	_B43_NPHY_C1_INITGAIN_HPVGA2_SHIFT,4,2 ## @B43_NPHY_C1_INITGAIN_HPVGA2_SHIFT
	.comm	_B43_NPHY_C2_INITGAIN,4,2       ## @B43_NPHY_C2_INITGAIN
	.comm	_B43_NPHY_C2_INITGAIN_HPVGA2,4,2 ## @B43_NPHY_C2_INITGAIN_HPVGA2
	.comm	_B43_NPHY_C2_INITGAIN_HPVGA2_SHIFT,4,2 ## @B43_NPHY_C2_INITGAIN_HPVGA2_SHIFT
	.comm	_B43_NPHY_TABLE_ADDR,4,2        ## @B43_NPHY_TABLE_ADDR
	.comm	_B43_NPHY_TABLE_DATALO,4,2      ## @B43_NPHY_TABLE_DATALO
	.comm	_B43_NPHY_OVER_DGAIN1,4,2       ## @B43_NPHY_OVER_DGAIN1
	.comm	_B43_NPHY_OVER_DGAIN_CCKDGECV,4,2 ## @B43_NPHY_OVER_DGAIN_CCKDGECV
	.comm	_B43_NPHY_OVER_DGAIN_CCKDGECV_SHIFT,4,2 ## @B43_NPHY_OVER_DGAIN_CCKDGECV_SHIFT
	.no_dead_strip	_b43_nphy_gain_ctl_workarounds_rev1_2
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function b43_nphy_gain_ctl_workarounds_rev1_2
_b43_nphy_gain_ctl_workarounds_rev1_2:  ; @b43_nphy_gain_ctl_workarounds_rev1_2
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #144
	.cfi_def_cfa_offset 144
	stp	x28, x27, [sp, #48]             ; 16-byte Folded Spill
	stp	x26, x25, [sp, #64]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #80]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #96]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #112]            ; 16-byte Folded Spill
	stp	x29, x30, [sp, #128]            ; 16-byte Folded Spill
	add	x29, sp, #128
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	mov	x19, x0
Lloh0:
	adrp	x8, ___stack_chk_guard@GOTPAGE
Lloh1:
	ldr	x8, [x8, ___stack_chk_guard@GOTPAGEOFF]
Lloh2:
	ldr	x8, [x8]
	str	x8, [sp, #40]
	ldr	x21, [x0, #16]
Lloh3:
	adrp	x8, l___const.b43_nphy_gain_ctl_workarounds_rev1_2.rfseq_events@PAGE
Lloh4:
	add	x8, x8, l___const.b43_nphy_gain_ctl_workarounds_rev1_2.rfseq_events@PAGEOFF
	ldr	x9, [x8]
	str	x9, [sp, #24]
	ldr	w8, [x8, #8]
	str	w8, [sp, #32]
Lloh5:
	adrp	x8, l___const.b43_nphy_gain_ctl_workarounds_rev1_2.rfseq_delays@PAGE
Lloh6:
	add	x8, x8, l___const.b43_nphy_gain_ctl_workarounds_rev1_2.rfseq_delays@PAGEOFF
	ldr	x9, [x8]
	str	x9, [sp, #8]
	ldr	w8, [x8, #8]
	str	w8, [sp, #16]
Lloh7:
	adrp	x22, _B43_NPHY_C1_CGAINI@GOTPAGE
Lloh8:
	ldr	x22, [x22, _B43_NPHY_C1_CGAINI@GOTPAGEOFF]
	ldr	w1, [x22]
Lloh9:
	adrp	x8, _B43_NPHY_C1_CGAINI_CL2DETECT@GOTPAGE
Lloh10:
	ldr	x8, [x8, _B43_NPHY_C1_CGAINI_CL2DETECT@GOTPAGEOFF]
Lloh11:
	ldr	w2, [x8]
	bl	_b43_phy_set
Lloh12:
	adrp	x20, _B43_NPHY_C2_CGAINI@GOTPAGE
Lloh13:
	ldr	x20, [x20, _B43_NPHY_C2_CGAINI@GOTPAGEOFF]
	ldr	w1, [x20]
Lloh14:
	adrp	x8, _B43_NPHY_C2_CGAINI_CL2DETECT@GOTPAGE
Lloh15:
	ldr	x8, [x8, _B43_NPHY_C2_CGAINI_CL2DETECT@GOTPAGEOFF]
Lloh16:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_b43_phy_set
Lloh17:
	adrp	x8, _B43_NPHY_C1_NBCLIPTHRES@GOTPAGE
Lloh18:
	ldr	x8, [x8, _B43_NPHY_C1_NBCLIPTHRES@GOTPAGEOFF]
Lloh19:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #132
	bl	_b43_phy_write
Lloh20:
	adrp	x8, _B43_NPHY_C2_NBCLIPTHRES@GOTPAGE
Lloh21:
	ldr	x8, [x8, _B43_NPHY_C2_NBCLIPTHRES@GOTPAGEOFF]
Lloh22:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #132
	bl	_b43_phy_write
	mov	x0, x19
	bl	_b43_is_40mhz
	cbnz	x0, LBB0_2
; %bb.1:
Lloh23:
	adrp	x8, _B43_NPHY_CLIP1_NBDWELL_LEN@GOTPAGE
Lloh24:
	ldr	x8, [x8, _B43_NPHY_CLIP1_NBDWELL_LEN@GOTPAGEOFF]
Lloh25:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #43
	bl	_b43_phy_write
Lloh26:
	adrp	x8, _B43_NPHY_CLIP2_NBDWELL_LEN@GOTPAGE
Lloh27:
	ldr	x8, [x8, _B43_NPHY_CLIP2_NBDWELL_LEN@GOTPAGEOFF]
Lloh28:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #43
	bl	_b43_phy_write
Lloh29:
	adrp	x8, _B43_NPHY_W1CLIP1_DWELL_LEN@GOTPAGE
Lloh30:
	ldr	x8, [x8, _B43_NPHY_W1CLIP1_DWELL_LEN@GOTPAGEOFF]
Lloh31:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #9
	bl	_b43_phy_write
Lloh32:
	adrp	x8, _B43_NPHY_W1CLIP2_DWELL_LEN@GOTPAGE
Lloh33:
	ldr	x8, [x8, _B43_NPHY_W1CLIP2_DWELL_LEN@GOTPAGEOFF]
Lloh34:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #9
	bl	_b43_phy_write
LBB0_2:
Lloh35:
	adrp	x8, _B43_NPHY_C1_CLIPWBTHRES@GOTPAGE
Lloh36:
	ldr	x8, [x8, _B43_NPHY_C1_CLIPWBTHRES@GOTPAGEOFF]
Lloh37:
	ldr	w1, [x8]
Lloh38:
	adrp	x8, _B43_NPHY_C1_CLIPWBTHRES_CLIP2@GOTPAGE
Lloh39:
	ldr	x8, [x8, _B43_NPHY_C1_CLIPWBTHRES_CLIP2@GOTPAGEOFF]
Lloh40:
	ldr	w8, [x8]
	mvn	w2, w8
	mov	x0, x19
	mov	w3, #21
	bl	_b43_phy_maskset
Lloh41:
	adrp	x8, _B43_NPHY_C2_CLIPWBTHRES@GOTPAGE
Lloh42:
	ldr	x8, [x8, _B43_NPHY_C2_CLIPWBTHRES@GOTPAGEOFF]
Lloh43:
	ldr	w1, [x8]
Lloh44:
	adrp	x8, _B43_NPHY_C2_CLIPWBTHRES_CLIP2@GOTPAGE
Lloh45:
	ldr	x8, [x8, _B43_NPHY_C2_CLIPWBTHRES_CLIP2@GOTPAGEOFF]
Lloh46:
	ldr	w8, [x8]
	mvn	w2, w8
	mov	x0, x19
	mov	w3, #21
	bl	_b43_phy_maskset
	mov	x0, x19
	bl	_b43_is_40mhz
	cbnz	x0, LBB0_4
; %bb.3:
	ldr	w1, [x22]
Lloh47:
	adrp	x8, _B43_NPHY_C1_CGAINI_GAINBKOFF@GOTPAGE
Lloh48:
	ldr	x8, [x8, _B43_NPHY_C1_CGAINI_GAINBKOFF@GOTPAGEOFF]
Lloh49:
	ldr	w8, [x8]
	mvn	w2, w8
	mov	x0, x19
	mov	w3, #1
	bl	_b43_phy_maskset
	ldr	w1, [x20]
Lloh50:
	adrp	x8, _B43_NPHY_C2_CGAINI_GAINBKOFF@GOTPAGE
Lloh51:
	ldr	x8, [x8, _B43_NPHY_C2_CGAINI_GAINBKOFF@GOTPAGEOFF]
Lloh52:
	ldr	w8, [x8]
	mvn	w2, w8
	mov	x0, x19
	mov	w3, #1
	bl	_b43_phy_maskset
Lloh53:
	adrp	x8, _B43_NPHY_C1_CCK_CGAINI@GOTPAGE
Lloh54:
	ldr	x8, [x8, _B43_NPHY_C1_CCK_CGAINI@GOTPAGEOFF]
Lloh55:
	ldr	w1, [x8]
Lloh56:
	adrp	x8, _B43_NPHY_C1_CCK_CGAINI_GAINBKOFF@GOTPAGE
Lloh57:
	ldr	x8, [x8, _B43_NPHY_C1_CCK_CGAINI_GAINBKOFF@GOTPAGEOFF]
Lloh58:
	ldr	w8, [x8]
	mvn	w2, w8
	mov	x0, x19
	mov	w3, #1
	bl	_b43_phy_maskset
Lloh59:
	adrp	x8, _B43_NPHY_C2_CCK_CGAINI@GOTPAGE
Lloh60:
	ldr	x8, [x8, _B43_NPHY_C2_CCK_CGAINI@GOTPAGEOFF]
Lloh61:
	ldr	w1, [x8]
Lloh62:
	adrp	x8, _B43_NPHY_C2_CCK_CGAINI_GAINBKOFF@GOTPAGE
Lloh63:
	ldr	x8, [x8, _B43_NPHY_C2_CCK_CGAINI_GAINBKOFF@GOTPAGEOFF]
Lloh64:
	ldr	w8, [x8]
	mvn	w2, w8
	mov	x0, x19
	mov	w3, #1
	bl	_b43_phy_maskset
LBB0_4:
Lloh65:
	adrp	x8, _B43_NPHY_CCK_SHIFTB_REF@GOTPAGE
Lloh66:
	ldr	x8, [x8, _B43_NPHY_CCK_SHIFTB_REF@GOTPAGEOFF]
Lloh67:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #32924
	bl	_b43_phy_write
	ldr	x8, [x21, #8]
Lloh68:
	adrp	x20, _NL80211_BAND_2GHZ@GOTPAGE
Lloh69:
	ldr	x20, [x20, _NL80211_BAND_2GHZ@GOTPAGEOFF]
	cbz	x8, LBB0_9
; %bb.5:
	ldr	w0, [x19]
	bl	_b43_current_band
	ldr	x8, [x20]
	cmp	x0, x8
	b.ne	LBB0_8
; %bb.6:
	mov	x0, x19
	bl	_b43_is_40mhz
	cbz	x0, LBB0_8
; %bb.7:
	mov	w22, #4
	b	LBB0_10
LBB0_8:
	mov	w22, #5
	b	LBB0_10
LBB0_9:
	mov	x0, x19
	bl	_b43_is_40mhz
	cmp	x0, #0
	mov	w8, #6
	cinc	w22, w8, eq
LBB0_10:
Lloh70:
	adrp	x8, _B43_NPHY_C1_INITGAIN@GOTPAGE
Lloh71:
	ldr	x8, [x8, _B43_NPHY_C1_INITGAIN@GOTPAGEOFF]
Lloh72:
	ldr	w1, [x8]
Lloh73:
	adrp	x8, _B43_NPHY_C1_INITGAIN_HPVGA2@GOTPAGE
Lloh74:
	ldr	x8, [x8, _B43_NPHY_C1_INITGAIN_HPVGA2@GOTPAGEOFF]
Lloh75:
	ldr	w8, [x8]
	mvn	w2, w8
Lloh76:
	adrp	x8, _B43_NPHY_C1_INITGAIN_HPVGA2_SHIFT@GOTPAGE
Lloh77:
	ldr	x8, [x8, _B43_NPHY_C1_INITGAIN_HPVGA2_SHIFT@GOTPAGEOFF]
Lloh78:
	ldr	w8, [x8]
	lsl	w3, w22, w8
	mov	x0, x19
	bl	_b43_phy_maskset
Lloh79:
	adrp	x8, _B43_NPHY_C2_INITGAIN@GOTPAGE
Lloh80:
	ldr	x8, [x8, _B43_NPHY_C2_INITGAIN@GOTPAGEOFF]
Lloh81:
	ldr	w1, [x8]
Lloh82:
	adrp	x8, _B43_NPHY_C2_INITGAIN_HPVGA2@GOTPAGE
Lloh83:
	ldr	x8, [x8, _B43_NPHY_C2_INITGAIN_HPVGA2@GOTPAGEOFF]
Lloh84:
	ldr	w8, [x8]
	mvn	w2, w8
Lloh85:
	adrp	x8, _B43_NPHY_C2_INITGAIN_HPVGA2_SHIFT@GOTPAGE
Lloh86:
	ldr	x8, [x8, _B43_NPHY_C2_INITGAIN_HPVGA2_SHIFT@GOTPAGEOFF]
Lloh87:
	ldr	w8, [x8]
	lsl	w3, w22, w8
	mov	x0, x19
	bl	_b43_phy_maskset
Lloh88:
	adrp	x25, _B43_NPHY_TABLE_ADDR@GOTPAGE
Lloh89:
	ldr	x25, [x25, _B43_NPHY_TABLE_ADDR@GOTPAGEOFF]
	ldr	w1, [x25]
	mov	x0, x19
	mov	w2, #7430
	bl	_b43_phy_write
	mov	w20, #124
	bfi	w20, w22, #8, #24
Lloh90:
	adrp	x26, _B43_NPHY_TABLE_DATALO@GOTPAGE
Lloh91:
	ldr	x26, [x26, _B43_NPHY_TABLE_DATALO@GOTPAGEOFF]
	ldr	w1, [x26]
	mov	x0, x19
	mov	x2, x20
	bl	_b43_phy_write
	ldr	w1, [x26]
	mov	x0, x19
	mov	x2, x20
	bl	_b43_phy_write
	ldr	w1, [x26]
	mov	x0, x19
	mov	x2, x20
	bl	_b43_phy_write
	ldr	w1, [x26]
	mov	x0, x19
	mov	x2, x20
	bl	_b43_phy_write
	mov	x0, x19
	bl	_b43_nphy_adjust_lna_gain_table
	ldr	x8, [x21]
	cbz	x8, LBB0_12
; %bb.11:
	lsl	w20, w22, #8
	ldr	w1, [x25]
	mov	x0, x19
	mov	w2, #2056
	bl	_b43_phy_write
	ldr	w1, [x26]
	mov	x0, x19
	mov	w2, #0
	bl	_b43_phy_write
	ldr	w1, [x26]
	mov	x0, x19
	mov	w2, #1
	bl	_b43_phy_write
	ldr	w1, [x26]
	mov	x0, x19
	mov	w2, #1
	bl	_b43_phy_write
	ldr	w1, [x26]
	mov	x0, x19
	mov	w2, #1
	bl	_b43_phy_write
	ldr	w1, [x25]
	mov	x0, x19
	mov	w2, #3080
	bl	_b43_phy_write
	ldr	w1, [x26]
	mov	x0, x19
	mov	w2, #0
	bl	_b43_phy_write
	ldr	w1, [x26]
	mov	x0, x19
	mov	w2, #1
	bl	_b43_phy_write
	ldr	w1, [x26]
	mov	x0, x19
	mov	w2, #1
	bl	_b43_phy_write
	ldr	w1, [x26]
	mov	x0, x19
	mov	w2, #1
	bl	_b43_phy_write
	ldr	w1, [x25]
	mov	x0, x19
	mov	w2, #7430
	bl	_b43_phy_write
	mov	w8, #116
	orr	w20, w20, w8
	ldr	w1, [x26]
	mov	x0, x19
	mov	x2, x20
	bl	_b43_phy_write
	ldr	w1, [x26]
	mov	x0, x19
	mov	x2, x20
	bl	_b43_phy_write
	ldr	w1, [x26]
	mov	x0, x19
	mov	x2, x20
	bl	_b43_phy_write
	ldr	w1, [x26]
	mov	x0, x19
	mov	x2, x20
	bl	_b43_phy_write
LBB0_12:
	ldr	w8, [x19, #8]
	cmp	w8, #2
	b.ne	LBB0_15
; %bb.13:
	mov	w27, #0
	mov	w28, #0
	mov	w24, #19
LBB0_14:                                ; =>This Inner Loop Header: Depth=1
	ldr	w1, [x25]
	add	w2, w27, #32
	mov	x0, x19
	bl	_b43_phy_write
	cmp	w28, #1
	mov	w8, #3
	csinc	w20, w8, wzr, ls
	ldr	w1, [x26]
	mov	x0, x19
	mov	w2, #0
	bl	_b43_phy_write
	ldr	w1, [x26]
	mov	x0, x19
	mov	x2, x20
	bl	_b43_phy_write
	lsl	w21, w20, #1
	ldr	w1, [x26]
	mov	x0, x19
	mov	x2, x21
	bl	_b43_phy_write
	ldr	w1, [x26]
	add	w22, w21, w20
	mov	x0, x19
	mov	x2, x22
	bl	_b43_phy_write
	lsl	w2, w20, #2
	ldr	w1, [x26]
	mov	x0, x19
	bl	_b43_phy_write
	ldr	w1, [x26]
	mov	x21, x20
	bfi	w21, w20, #2, #2
	mov	x0, x19
	mov	x2, x21
	bl	_b43_phy_write
	lsl	w2, w22, #1
	ldr	w1, [x26]
	mov	x0, x19
	bl	_b43_phy_write
	lsl	w23, w20, #3
	sub	w2, w23, w20
	ldr	w1, [x26]
	mov	x0, x19
	bl	_b43_phy_write
	ldr	w1, [x26]
	mov	x0, x19
	mov	x2, x23
	bl	_b43_phy_write
	ldr	w1, [x26]
	mov	x23, x20
	bfi	w23, w20, #3, #2
	mov	x0, x19
	mov	x2, x23
	bl	_b43_phy_write
	lsl	w2, w21, #1
	ldr	w1, [x26]
	mov	x0, x19
	bl	_b43_phy_write
	mov	w8, #11
	mul	w2, w20, w8
	ldr	w1, [x26]
	mov	x0, x19
	bl	_b43_phy_write
	lsl	w2, w22, #2
	ldr	w1, [x26]
	mov	x0, x19
	bl	_b43_phy_write
	mov	w8, #13
	mul	w2, w20, w8
	ldr	w1, [x26]
	mov	x0, x19
	bl	_b43_phy_write
	mov	w8, #14
	mul	w2, w20, w8
	ldr	w1, [x26]
	mov	x0, x19
	bl	_b43_phy_write
	lsl	w22, w20, #4
	sub	w2, w22, w20
	ldr	w1, [x26]
	mov	x0, x19
	bl	_b43_phy_write
	ldr	w1, [x26]
	mov	x0, x19
	mov	x2, x22
	bl	_b43_phy_write
	mov	x2, x20
	bfi	w2, w20, #4, #2
	ldr	w1, [x26]
	mov	x0, x19
	bl	_b43_phy_write
	lsl	w2, w23, #1
	ldr	w1, [x26]
	mov	x0, x19
	bl	_b43_phy_write
	mul	w2, w20, w24
	ldr	w1, [x26]
	mov	x0, x19
	bl	_b43_phy_write
	lsl	w2, w21, #2
	ldr	w1, [x26]
	mov	x0, x19
	bl	_b43_phy_write
	add	w28, w28, #1
	add	w27, w27, #1024
	cmp	w28, #4
	b.ne	LBB0_14
LBB0_15:
	add	x2, sp, #24
	add	x3, sp, #8
	mov	x0, x19
	mov	w1, #5
	mov	w4, #3
	bl	_b43_nphy_set_rf_sequence
Lloh92:
	adrp	x8, _B43_NPHY_OVER_DGAIN1@GOTPAGE
Lloh93:
	ldr	x8, [x8, _B43_NPHY_OVER_DGAIN1@GOTPAGEOFF]
Lloh94:
	ldr	w1, [x8]
Lloh95:
	adrp	x8, _B43_NPHY_OVER_DGAIN_CCKDGECV@GOTPAGE
Lloh96:
	ldr	x8, [x8, _B43_NPHY_OVER_DGAIN_CCKDGECV@GOTPAGEOFF]
	ldrh	w8, [x8]
	eor	w2, w8, #0xffff
Lloh97:
	adrp	x8, _B43_NPHY_OVER_DGAIN_CCKDGECV_SHIFT@GOTPAGE
Lloh98:
	ldr	x8, [x8, _B43_NPHY_OVER_DGAIN_CCKDGECV_SHIFT@GOTPAGEOFF]
Lloh99:
	ldr	w8, [x8]
	mov	w9, #90
	lsl	w3, w9, w8
	mov	x0, x19
	bl	_b43_phy_maskset
	ldr	w0, [x19]
	bl	_b43_current_band
Lloh100:
	adrp	x8, _NL80211_BAND_2GHZ@GOTPAGE
Lloh101:
	ldr	x8, [x8, _NL80211_BAND_2GHZ@GOTPAGEOFF]
Lloh102:
	ldr	x8, [x8]
	cmp	x0, x8
	b.ne	LBB0_17
; %bb.16:
	mov	w0, #3165
	bl	_B43_PHY_N
	mov	x1, x0
	mov	x0, x19
	mov	w2, #65408
	mov	w3, #4
	bl	_b43_phy_maskset
LBB0_17:
	ldr	x8, [sp, #40]
Lloh103:
	adrp	x9, ___stack_chk_guard@GOTPAGE
Lloh104:
	ldr	x9, [x9, ___stack_chk_guard@GOTPAGEOFF]
Lloh105:
	ldr	x9, [x9]
	cmp	x9, x8
	b.ne	LBB0_19
; %bb.18:
	ldp	x29, x30, [sp, #128]            ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #112]            ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #96]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #80]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #64]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp, #48]             ; 16-byte Folded Reload
	add	sp, sp, #144
	ret
LBB0_19:
	bl	___stack_chk_fail
	.loh AdrpLdrGotLdr	Lloh20, Lloh21, Lloh22
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh19
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh16
	.loh AdrpLdrGot	Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGot	Lloh7, Lloh8
	.loh AdrpAdd	Lloh5, Lloh6
	.loh AdrpAdd	Lloh3, Lloh4
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh32, Lloh33, Lloh34
	.loh AdrpLdrGotLdr	Lloh29, Lloh30, Lloh31
	.loh AdrpLdrGotLdr	Lloh26, Lloh27, Lloh28
	.loh AdrpLdrGotLdr	Lloh23, Lloh24, Lloh25
	.loh AdrpLdrGotLdr	Lloh44, Lloh45, Lloh46
	.loh AdrpLdrGotLdr	Lloh41, Lloh42, Lloh43
	.loh AdrpLdrGotLdr	Lloh38, Lloh39, Lloh40
	.loh AdrpLdrGotLdr	Lloh35, Lloh36, Lloh37
	.loh AdrpLdrGotLdr	Lloh62, Lloh63, Lloh64
	.loh AdrpLdrGotLdr	Lloh59, Lloh60, Lloh61
	.loh AdrpLdrGotLdr	Lloh56, Lloh57, Lloh58
	.loh AdrpLdrGotLdr	Lloh53, Lloh54, Lloh55
	.loh AdrpLdrGotLdr	Lloh50, Lloh51, Lloh52
	.loh AdrpLdrGotLdr	Lloh47, Lloh48, Lloh49
	.loh AdrpLdrGot	Lloh68, Lloh69
	.loh AdrpLdrGotLdr	Lloh65, Lloh66, Lloh67
	.loh AdrpLdrGot	Lloh90, Lloh91
	.loh AdrpLdrGot	Lloh88, Lloh89
	.loh AdrpLdrGotLdr	Lloh85, Lloh86, Lloh87
	.loh AdrpLdrGotLdr	Lloh82, Lloh83, Lloh84
	.loh AdrpLdrGotLdr	Lloh79, Lloh80, Lloh81
	.loh AdrpLdrGotLdr	Lloh76, Lloh77, Lloh78
	.loh AdrpLdrGotLdr	Lloh73, Lloh74, Lloh75
	.loh AdrpLdrGotLdr	Lloh70, Lloh71, Lloh72
	.loh AdrpLdrGotLdr	Lloh100, Lloh101, Lloh102
	.loh AdrpLdrGotLdr	Lloh97, Lloh98, Lloh99
	.loh AdrpLdrGot	Lloh95, Lloh96
	.loh AdrpLdrGotLdr	Lloh92, Lloh93, Lloh94
	.loh AdrpLdrGotLdr	Lloh103, Lloh104, Lloh105
	.cfi_endproc
                                        ; -- End function
	.section	__TEXT,__const
	.p2align	2                               ; @__const.b43_nphy_gain_ctl_workarounds_rev1_2.rfseq_events
l___const.b43_nphy_gain_ctl_workarounds_rev1_2.rfseq_events:
	.long	6                               ; 0x6
	.long	8                               ; 0x8
	.long	7                               ; 0x7

	.p2align	2                               ; @__const.b43_nphy_gain_ctl_workarounds_rev1_2.rfseq_delays
l___const.b43_nphy_gain_ctl_workarounds_rev1_2.rfseq_delays:
	.long	10                              ; 0xa
	.long	30                              ; 0x1e
	.long	1                               ; 0x1

	.comm	_B43_NPHY_C1_CGAINI,4,2         ; @B43_NPHY_C1_CGAINI
	.comm	_B43_NPHY_C1_CGAINI_CL2DETECT,4,2 ; @B43_NPHY_C1_CGAINI_CL2DETECT
	.comm	_B43_NPHY_C2_CGAINI,4,2         ; @B43_NPHY_C2_CGAINI
	.comm	_B43_NPHY_C2_CGAINI_CL2DETECT,4,2 ; @B43_NPHY_C2_CGAINI_CL2DETECT
	.comm	_B43_NPHY_C1_NBCLIPTHRES,4,2    ; @B43_NPHY_C1_NBCLIPTHRES
	.comm	_B43_NPHY_C2_NBCLIPTHRES,4,2    ; @B43_NPHY_C2_NBCLIPTHRES
	.comm	_B43_NPHY_CLIP1_NBDWELL_LEN,4,2 ; @B43_NPHY_CLIP1_NBDWELL_LEN
	.comm	_B43_NPHY_CLIP2_NBDWELL_LEN,4,2 ; @B43_NPHY_CLIP2_NBDWELL_LEN
	.comm	_B43_NPHY_W1CLIP1_DWELL_LEN,4,2 ; @B43_NPHY_W1CLIP1_DWELL_LEN
	.comm	_B43_NPHY_W1CLIP2_DWELL_LEN,4,2 ; @B43_NPHY_W1CLIP2_DWELL_LEN
	.comm	_B43_NPHY_C1_CLIPWBTHRES,4,2    ; @B43_NPHY_C1_CLIPWBTHRES
	.comm	_B43_NPHY_C1_CLIPWBTHRES_CLIP2,4,2 ; @B43_NPHY_C1_CLIPWBTHRES_CLIP2
	.comm	_B43_NPHY_C2_CLIPWBTHRES,4,2    ; @B43_NPHY_C2_CLIPWBTHRES
	.comm	_B43_NPHY_C2_CLIPWBTHRES_CLIP2,4,2 ; @B43_NPHY_C2_CLIPWBTHRES_CLIP2
	.comm	_B43_NPHY_C1_CGAINI_GAINBKOFF,4,2 ; @B43_NPHY_C1_CGAINI_GAINBKOFF
	.comm	_B43_NPHY_C2_CGAINI_GAINBKOFF,4,2 ; @B43_NPHY_C2_CGAINI_GAINBKOFF
	.comm	_B43_NPHY_C1_CCK_CGAINI,4,2     ; @B43_NPHY_C1_CCK_CGAINI
	.comm	_B43_NPHY_C1_CCK_CGAINI_GAINBKOFF,4,2 ; @B43_NPHY_C1_CCK_CGAINI_GAINBKOFF
	.comm	_B43_NPHY_C2_CCK_CGAINI,4,2     ; @B43_NPHY_C2_CCK_CGAINI
	.comm	_B43_NPHY_C2_CCK_CGAINI_GAINBKOFF,4,2 ; @B43_NPHY_C2_CCK_CGAINI_GAINBKOFF
	.comm	_B43_NPHY_CCK_SHIFTB_REF,4,2    ; @B43_NPHY_CCK_SHIFTB_REF
	.comm	_NL80211_BAND_2GHZ,8,3          ; @NL80211_BAND_2GHZ
	.comm	_B43_NPHY_C1_INITGAIN,4,2       ; @B43_NPHY_C1_INITGAIN
	.comm	_B43_NPHY_C1_INITGAIN_HPVGA2,4,2 ; @B43_NPHY_C1_INITGAIN_HPVGA2
	.comm	_B43_NPHY_C1_INITGAIN_HPVGA2_SHIFT,4,2 ; @B43_NPHY_C1_INITGAIN_HPVGA2_SHIFT
	.comm	_B43_NPHY_C2_INITGAIN,4,2       ; @B43_NPHY_C2_INITGAIN
	.comm	_B43_NPHY_C2_INITGAIN_HPVGA2,4,2 ; @B43_NPHY_C2_INITGAIN_HPVGA2
	.comm	_B43_NPHY_C2_INITGAIN_HPVGA2_SHIFT,4,2 ; @B43_NPHY_C2_INITGAIN_HPVGA2_SHIFT
	.comm	_B43_NPHY_TABLE_ADDR,4,2        ; @B43_NPHY_TABLE_ADDR
	.comm	_B43_NPHY_TABLE_DATALO,4,2      ; @B43_NPHY_TABLE_DATALO
	.comm	_B43_NPHY_OVER_DGAIN1,4,2       ; @B43_NPHY_OVER_DGAIN1
	.comm	_B43_NPHY_OVER_DGAIN_CCKDGECV,4,2 ; @B43_NPHY_OVER_DGAIN_CCKDGECV
	.comm	_B43_NPHY_OVER_DGAIN_CCKDGECV_SHIFT,4,2 ; @B43_NPHY_OVER_DGAIN_CCKDGECV_SHIFT
	.no_dead_strip	_b43_nphy_gain_ctl_workarounds_rev1_2
.subsections_via_symbols
