	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function il3945_tx_reset
_il3945_tx_reset:                       ## @il3945_tx_reset
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -24
	movq	%rdi, %rbx
	movq	_ALM_SCD_MODE_REG@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	$2, %edx
	callq	_il_wr_prph
	movq	_ALM_SCD_ARASTAT_REG@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	movl	$1, %edx
	callq	_il_wr_prph
	movq	_ALM_SCD_TXFACT_REG@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	movl	$63, %edx
	callq	_il_wr_prph
	movq	_ALM_SCD_SBYP_MODE_1_REG@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	movl	$65536, %edx                    ## imm = 0x10000
	callq	_il_wr_prph
	movq	_ALM_SCD_SBYP_MODE_2_REG@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	movl	$196610, %edx                   ## imm = 0x30002
	callq	_il_wr_prph
	movq	_ALM_SCD_TXF4MF_REG@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	movl	$4, %edx
	callq	_il_wr_prph
	movq	_ALM_SCD_TXF5MF_REG@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	movl	$5, %edx
	callq	_il_wr_prph
	movq	_FH39_TSSR_CBB_BASE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	(%rbx), %edx
	movq	%rbx, %rdi
	callq	_il_wr
	movq	_FH39_TSSR_TX_MSG_CONFIG_REG_VAL_SNOOP_RD_TXPD_ON@GOTPCREL(%rip), %rax
	movq	_FH39_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RD_TXPD_ON@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	orl	(%rax), %edx
	movq	_FH39_TSSR_TX_MSG_CONFIG_REG_VAL_MAX_FRAG_SIZE_128B@GOTPCREL(%rip), %rax
	orl	(%rax), %edx
	movq	_FH39_TSSR_TX_MSG_CONFIG_REG_VAL_SNOOP_RD_TFD_ON@GOTPCREL(%rip), %rax
	orl	(%rax), %edx
	movq	_FH39_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RD_CBB_ON@GOTPCREL(%rip), %rax
	orl	(%rax), %edx
	movq	_FH39_TSSR_MSG_CONFIG@GOTPCREL(%rip), %rax
	movq	_FH39_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RSP_WAIT_TH@GOTPCREL(%rip), %rcx
	orl	(%rcx), %edx
	movl	(%rax), %esi
	movq	_FH39_TSSR_TX_MSG_CONFIG_REG_VAL_RSP_WAIT_TH@GOTPCREL(%rip), %rax
	orl	(%rax), %edx
	movq	%rbx, %rdi
	callq	_il_wr
	xorl	%eax, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_ALM_SCD_MODE_REG,4,2           ## @ALM_SCD_MODE_REG
	.comm	_ALM_SCD_ARASTAT_REG,4,2        ## @ALM_SCD_ARASTAT_REG
	.comm	_ALM_SCD_TXFACT_REG,4,2         ## @ALM_SCD_TXFACT_REG
	.comm	_ALM_SCD_SBYP_MODE_1_REG,4,2    ## @ALM_SCD_SBYP_MODE_1_REG
	.comm	_ALM_SCD_SBYP_MODE_2_REG,4,2    ## @ALM_SCD_SBYP_MODE_2_REG
	.comm	_ALM_SCD_TXF4MF_REG,4,2         ## @ALM_SCD_TXF4MF_REG
	.comm	_ALM_SCD_TXF5MF_REG,4,2         ## @ALM_SCD_TXF5MF_REG
	.comm	_FH39_TSSR_CBB_BASE,4,2         ## @FH39_TSSR_CBB_BASE
	.comm	_FH39_TSSR_MSG_CONFIG,4,2       ## @FH39_TSSR_MSG_CONFIG
	.comm	_FH39_TSSR_TX_MSG_CONFIG_REG_VAL_SNOOP_RD_TXPD_ON,4,2 ## @FH39_TSSR_TX_MSG_CONFIG_REG_VAL_SNOOP_RD_TXPD_ON
	.comm	_FH39_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RD_TXPD_ON,4,2 ## @FH39_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RD_TXPD_ON
	.comm	_FH39_TSSR_TX_MSG_CONFIG_REG_VAL_MAX_FRAG_SIZE_128B,4,2 ## @FH39_TSSR_TX_MSG_CONFIG_REG_VAL_MAX_FRAG_SIZE_128B
	.comm	_FH39_TSSR_TX_MSG_CONFIG_REG_VAL_SNOOP_RD_TFD_ON,4,2 ## @FH39_TSSR_TX_MSG_CONFIG_REG_VAL_SNOOP_RD_TFD_ON
	.comm	_FH39_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RD_CBB_ON,4,2 ## @FH39_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RD_CBB_ON
	.comm	_FH39_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RSP_WAIT_TH,4,2 ## @FH39_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RSP_WAIT_TH
	.comm	_FH39_TSSR_TX_MSG_CONFIG_REG_VAL_RSP_WAIT_TH,4,2 ## @FH39_TSSR_TX_MSG_CONFIG_REG_VAL_RSP_WAIT_TH
	.no_dead_strip	_il3945_tx_reset
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function il3945_tx_reset
_il3945_tx_reset:                       ; @il3945_tx_reset
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x19, x0
Lloh0:
	adrp	x8, _ALM_SCD_MODE_REG@GOTPAGE
Lloh1:
	ldr	x8, [x8, _ALM_SCD_MODE_REG@GOTPAGEOFF]
Lloh2:
	ldr	w1, [x8]
	mov	w2, #2
	bl	_il_wr_prph
Lloh3:
	adrp	x8, _ALM_SCD_ARASTAT_REG@GOTPAGE
Lloh4:
	ldr	x8, [x8, _ALM_SCD_ARASTAT_REG@GOTPAGEOFF]
Lloh5:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #1
	bl	_il_wr_prph
Lloh6:
	adrp	x8, _ALM_SCD_TXFACT_REG@GOTPAGE
Lloh7:
	ldr	x8, [x8, _ALM_SCD_TXFACT_REG@GOTPAGEOFF]
Lloh8:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #63
	bl	_il_wr_prph
Lloh9:
	adrp	x8, _ALM_SCD_SBYP_MODE_1_REG@GOTPAGE
Lloh10:
	ldr	x8, [x8, _ALM_SCD_SBYP_MODE_1_REG@GOTPAGEOFF]
Lloh11:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #65536
	bl	_il_wr_prph
Lloh12:
	adrp	x8, _ALM_SCD_SBYP_MODE_2_REG@GOTPAGE
Lloh13:
	ldr	x8, [x8, _ALM_SCD_SBYP_MODE_2_REG@GOTPAGEOFF]
Lloh14:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #2
	movk	w2, #3, lsl #16
	bl	_il_wr_prph
Lloh15:
	adrp	x8, _ALM_SCD_TXF4MF_REG@GOTPAGE
Lloh16:
	ldr	x8, [x8, _ALM_SCD_TXF4MF_REG@GOTPAGEOFF]
Lloh17:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #4
	bl	_il_wr_prph
Lloh18:
	adrp	x8, _ALM_SCD_TXF5MF_REG@GOTPAGE
Lloh19:
	ldr	x8, [x8, _ALM_SCD_TXF5MF_REG@GOTPAGEOFF]
Lloh20:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #5
	bl	_il_wr_prph
Lloh21:
	adrp	x8, _FH39_TSSR_CBB_BASE@GOTPAGE
Lloh22:
	ldr	x8, [x8, _FH39_TSSR_CBB_BASE@GOTPAGEOFF]
Lloh23:
	ldr	w1, [x8]
	ldr	w2, [x19]
	mov	x0, x19
	bl	_il_wr
Lloh24:
	adrp	x8, _FH39_TSSR_MSG_CONFIG@GOTPAGE
Lloh25:
	ldr	x8, [x8, _FH39_TSSR_MSG_CONFIG@GOTPAGEOFF]
Lloh26:
	ldr	w1, [x8]
Lloh27:
	adrp	x8, _FH39_TSSR_TX_MSG_CONFIG_REG_VAL_SNOOP_RD_TXPD_ON@GOTPAGE
Lloh28:
	ldr	x8, [x8, _FH39_TSSR_TX_MSG_CONFIG_REG_VAL_SNOOP_RD_TXPD_ON@GOTPAGEOFF]
Lloh29:
	ldr	w8, [x8]
Lloh30:
	adrp	x9, _FH39_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RD_TXPD_ON@GOTPAGE
Lloh31:
	ldr	x9, [x9, _FH39_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RD_TXPD_ON@GOTPAGEOFF]
Lloh32:
	ldr	w9, [x9]
	orr	w8, w9, w8
Lloh33:
	adrp	x9, _FH39_TSSR_TX_MSG_CONFIG_REG_VAL_MAX_FRAG_SIZE_128B@GOTPAGE
Lloh34:
	ldr	x9, [x9, _FH39_TSSR_TX_MSG_CONFIG_REG_VAL_MAX_FRAG_SIZE_128B@GOTPAGEOFF]
Lloh35:
	ldr	w9, [x9]
	orr	w8, w8, w9
Lloh36:
	adrp	x9, _FH39_TSSR_TX_MSG_CONFIG_REG_VAL_SNOOP_RD_TFD_ON@GOTPAGE
Lloh37:
	ldr	x9, [x9, _FH39_TSSR_TX_MSG_CONFIG_REG_VAL_SNOOP_RD_TFD_ON@GOTPAGEOFF]
Lloh38:
	ldr	w9, [x9]
	orr	w8, w8, w9
Lloh39:
	adrp	x9, _FH39_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RD_CBB_ON@GOTPAGE
Lloh40:
	ldr	x9, [x9, _FH39_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RD_CBB_ON@GOTPAGEOFF]
Lloh41:
	ldr	w9, [x9]
	orr	w8, w8, w9
Lloh42:
	adrp	x9, _FH39_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RSP_WAIT_TH@GOTPAGE
Lloh43:
	ldr	x9, [x9, _FH39_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RSP_WAIT_TH@GOTPAGEOFF]
Lloh44:
	ldr	w9, [x9]
	orr	w8, w8, w9
Lloh45:
	adrp	x9, _FH39_TSSR_TX_MSG_CONFIG_REG_VAL_RSP_WAIT_TH@GOTPAGE
Lloh46:
	ldr	x9, [x9, _FH39_TSSR_TX_MSG_CONFIG_REG_VAL_RSP_WAIT_TH@GOTPAGEOFF]
Lloh47:
	ldr	w9, [x9]
	orr	w2, w8, w9
	mov	x0, x19
	bl	_il_wr
	mov	w0, #0
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh45, Lloh46, Lloh47
	.loh AdrpLdrGotLdr	Lloh42, Lloh43, Lloh44
	.loh AdrpLdrGotLdr	Lloh39, Lloh40, Lloh41
	.loh AdrpLdrGotLdr	Lloh36, Lloh37, Lloh38
	.loh AdrpLdrGotLdr	Lloh33, Lloh34, Lloh35
	.loh AdrpLdrGotLdr	Lloh30, Lloh31, Lloh32
	.loh AdrpLdrGotLdr	Lloh27, Lloh28, Lloh29
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_ALM_SCD_MODE_REG,4,2           ; @ALM_SCD_MODE_REG
	.comm	_ALM_SCD_ARASTAT_REG,4,2        ; @ALM_SCD_ARASTAT_REG
	.comm	_ALM_SCD_TXFACT_REG,4,2         ; @ALM_SCD_TXFACT_REG
	.comm	_ALM_SCD_SBYP_MODE_1_REG,4,2    ; @ALM_SCD_SBYP_MODE_1_REG
	.comm	_ALM_SCD_SBYP_MODE_2_REG,4,2    ; @ALM_SCD_SBYP_MODE_2_REG
	.comm	_ALM_SCD_TXF4MF_REG,4,2         ; @ALM_SCD_TXF4MF_REG
	.comm	_ALM_SCD_TXF5MF_REG,4,2         ; @ALM_SCD_TXF5MF_REG
	.comm	_FH39_TSSR_CBB_BASE,4,2         ; @FH39_TSSR_CBB_BASE
	.comm	_FH39_TSSR_MSG_CONFIG,4,2       ; @FH39_TSSR_MSG_CONFIG
	.comm	_FH39_TSSR_TX_MSG_CONFIG_REG_VAL_SNOOP_RD_TXPD_ON,4,2 ; @FH39_TSSR_TX_MSG_CONFIG_REG_VAL_SNOOP_RD_TXPD_ON
	.comm	_FH39_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RD_TXPD_ON,4,2 ; @FH39_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RD_TXPD_ON
	.comm	_FH39_TSSR_TX_MSG_CONFIG_REG_VAL_MAX_FRAG_SIZE_128B,4,2 ; @FH39_TSSR_TX_MSG_CONFIG_REG_VAL_MAX_FRAG_SIZE_128B
	.comm	_FH39_TSSR_TX_MSG_CONFIG_REG_VAL_SNOOP_RD_TFD_ON,4,2 ; @FH39_TSSR_TX_MSG_CONFIG_REG_VAL_SNOOP_RD_TFD_ON
	.comm	_FH39_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RD_CBB_ON,4,2 ; @FH39_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RD_CBB_ON
	.comm	_FH39_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RSP_WAIT_TH,4,2 ; @FH39_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RSP_WAIT_TH
	.comm	_FH39_TSSR_TX_MSG_CONFIG_REG_VAL_RSP_WAIT_TH,4,2 ; @FH39_TSSR_TX_MSG_CONFIG_REG_VAL_RSP_WAIT_TH
	.no_dead_strip	_il3945_tx_reset
.subsections_via_symbols
