	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function cdns_dp_phy_run
_cdns_dp_phy_run:                       ## @cdns_dp_phy_run
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %rbx
	movq	_PHY_PMA_XCVR_PLLCLK_EN_ACK@GOTPCREL(%rip), %rax
	movq	(%rax), %rdi
	addq	8(%rbx), %rdi
	movq	_POLL_TIMEOUT_US@GOTPCREL(%rip), %rax
	movl	(%rax), %r8d
	xorl	%r12d, %r12d
	xorl	%edx, %edx
	xorl	%ecx, %ecx
	callq	_readl_poll_timeout
	movq	_ETIMEDOUT@GOTPCREL(%rip), %rcx
	addl	(%rcx), %eax
	jne	LBB0_2
## %bb.1:
	movl	16(%rbx), %edi
	leaq	L_.str(%rip), %rsi
	callq	_dev_err
LBB0_2:
	movl	$100, %edi
	callq	_ndelay
	movl	(%rbx), %eax
	decl	%eax
	movl	$1, %r14d
	movl	$0, %r15d
	cmpl	$3, %eax
	ja	LBB0_4
## %bb.3:
	cltq
	leaq	L_switch.table.cdns_dp_phy_run(%rip), %rcx
	movl	(%rcx,%rax,4), %r14d
	leaq	L_switch.table.cdns_dp_phy_run.2(%rip), %rcx
	movl	(%rcx,%rax,4), %r12d
	leaq	L_switch.table.cdns_dp_phy_run.3(%rip), %rcx
	movl	(%rcx,%rax,4), %r15d
LBB0_4:
	movq	_PHY_PMA_XCVR_POWER_STATE_REQ@GOTPCREL(%rip), %r13
	movq	(%r13), %rsi
	addq	8(%rbx), %rsi
	movl	%r12d, %edi
	callq	_writel
	movq	_PHY_PMA_XCVR_POWER_STATE_ACK@GOTPCREL(%rip), %r12
	movq	(%r12), %rdi
	addq	8(%rbx), %rdi
	movq	_POLL_TIMEOUT_US@GOTPCREL(%rip), %rax
	movl	(%rax), %r8d
	movl	%r14d, %edx
	xorl	%ecx, %ecx
	callq	_readl_poll_timeout
	movq	_ETIMEDOUT@GOTPCREL(%rip), %rcx
	addl	(%rcx), %eax
	jne	LBB0_6
## %bb.5:
	movl	16(%rbx), %edi
	leaq	L_.str.1(%rip), %rsi
	callq	_dev_err
LBB0_6:
	movq	(%r13), %rsi
	addq	8(%rbx), %rsi
	xorl	%edi, %edi
	callq	_writel
	movl	$100, %edi
	callq	_ndelay
	movq	(%r13), %rsi
	addq	8(%rbx), %rsi
	movl	%r15d, %edi
	callq	_writel
	movq	(%r12), %rdi
	addq	8(%rbx), %rdi
	movq	_POLL_TIMEOUT_US@GOTPCREL(%rip), %rax
	movl	(%rax), %r8d
	movl	%r14d, %edx
	xorl	%ecx, %ecx
	callq	_readl_poll_timeout
	movq	_ETIMEDOUT@GOTPCREL(%rip), %rcx
	addl	(%rcx), %eax
	jne	LBB0_8
## %bb.7:
	movl	16(%rbx), %edi
	leaq	L_.str.1(%rip), %rsi
	callq	_dev_err
LBB0_8:
	movq	(%r13), %rsi
	addq	8(%rbx), %rsi
	xorl	%edi, %edi
	callq	_writel
	movl	$100, %edi
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_ndelay                         ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_PHY_PMA_XCVR_PLLCLK_EN_ACK,8,3 ## @PHY_PMA_XCVR_PLLCLK_EN_ACK
	.comm	_POLL_TIMEOUT_US,4,2            ## @POLL_TIMEOUT_US
	.comm	_ETIMEDOUT,4,2                  ## @ETIMEDOUT
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"timeout waiting for link PLL clock enable ack\n"

	.comm	_PHY_PMA_XCVR_POWER_STATE_REQ,8,3 ## @PHY_PMA_XCVR_POWER_STATE_REQ
	.comm	_PHY_PMA_XCVR_POWER_STATE_ACK,8,3 ## @PHY_PMA_XCVR_POWER_STATE_ACK
L_.str.1:                               ## @.str.1
	.asciz	"timeout waiting for link power state ack\n"

	.no_dead_strip	_cdns_dp_phy_run
	.section	__TEXT,__literal16,16byte_literals
	.p2align	2                               ## @switch.table.cdns_dp_phy_run
L_switch.table.cdns_dp_phy_run:
	.long	0                               ## 0x0
	.long	0                               ## 0x0
	.long	1                               ## 0x1
	.long	0                               ## 0x0

	.p2align	2                               ## @switch.table.cdns_dp_phy_run.2
L_switch.table.cdns_dp_phy_run.2:
	.long	4                               ## 0x4
	.long	1028                            ## 0x404
	.long	0                               ## 0x0
	.long	67372036                        ## 0x4040404

	.p2align	2                               ## @switch.table.cdns_dp_phy_run.3
L_switch.table.cdns_dp_phy_run.3:
	.long	1                               ## 0x1
	.long	257                             ## 0x101
	.long	0                               ## 0x0
	.long	16843009                        ## 0x1010101

.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function cdns_dp_phy_run
_cdns_dp_phy_run:                       ; @cdns_dp_phy_run
	.cfi_startproc
; %bb.0:
	stp	x26, x25, [sp, #-80]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	mov	x19, x0
Lloh0:
	adrp	x8, _PHY_PMA_XCVR_PLLCLK_EN_ACK@GOTPAGE
Lloh1:
	ldr	x8, [x8, _PHY_PMA_XCVR_PLLCLK_EN_ACK@GOTPAGEOFF]
	ldr	x9, [x0, #8]
Lloh2:
	ldr	x8, [x8]
	add	x0, x8, x9
Lloh3:
	adrp	x22, _POLL_TIMEOUT_US@GOTPAGE
Lloh4:
	ldr	x22, [x22, _POLL_TIMEOUT_US@GOTPAGEOFF]
	ldr	w4, [x22]
	mov	w2, #0
	mov	w3, #0
	bl	_readl_poll_timeout
Lloh5:
	adrp	x23, _ETIMEDOUT@GOTPAGE
Lloh6:
	ldr	x23, [x23, _ETIMEDOUT@GOTPAGEOFF]
	ldr	w8, [x23]
	cmn	w0, w8
	b.ne	LBB0_2
; %bb.1:
	ldr	w0, [x19, #16]
Lloh7:
	adrp	x1, l_.str@PAGE
Lloh8:
	add	x1, x1, l_.str@PAGEOFF
	bl	_dev_err
LBB0_2:
	mov	w0, #100
	bl	_ndelay
	ldr	w8, [x19]
	sub	w8, w8, #1
	cmp	w8, #3
	b.hi	LBB0_4
; %bb.3:
	sbfiz	x8, x8, #2, #32
Lloh9:
	adrp	x9, l_switch.table.cdns_dp_phy_run@PAGE
Lloh10:
	add	x9, x9, l_switch.table.cdns_dp_phy_run@PAGEOFF
	ldr	w20, [x9, x8]
Lloh11:
	adrp	x9, l_switch.table.cdns_dp_phy_run.2@PAGE
Lloh12:
	add	x9, x9, l_switch.table.cdns_dp_phy_run.2@PAGEOFF
	ldr	w0, [x9, x8]
Lloh13:
	adrp	x9, l_switch.table.cdns_dp_phy_run.3@PAGE
Lloh14:
	add	x9, x9, l_switch.table.cdns_dp_phy_run.3@PAGEOFF
	ldr	w21, [x9, x8]
	b	LBB0_5
LBB0_4:
	mov	w0, #0
	mov	w21, #0
	mov	w20, #1
LBB0_5:
	ldr	x8, [x19, #8]
Lloh15:
	adrp	x24, _PHY_PMA_XCVR_POWER_STATE_REQ@GOTPAGE
Lloh16:
	ldr	x24, [x24, _PHY_PMA_XCVR_POWER_STATE_REQ@GOTPAGEOFF]
	ldr	x9, [x24]
	add	x1, x9, x8
	bl	_writel
	ldr	x8, [x19, #8]
Lloh17:
	adrp	x25, _PHY_PMA_XCVR_POWER_STATE_ACK@GOTPAGE
Lloh18:
	ldr	x25, [x25, _PHY_PMA_XCVR_POWER_STATE_ACK@GOTPAGEOFF]
	ldr	x9, [x25]
	add	x0, x9, x8
	ldr	w4, [x22]
	mov	x2, x20
	mov	w3, #0
	bl	_readl_poll_timeout
	ldr	w8, [x23]
	cmn	w0, w8
	b.ne	LBB0_7
; %bb.6:
	ldr	w0, [x19, #16]
Lloh19:
	adrp	x1, l_.str.1@PAGE
Lloh20:
	add	x1, x1, l_.str.1@PAGEOFF
	bl	_dev_err
LBB0_7:
	ldr	x8, [x19, #8]
	ldr	x9, [x24]
	add	x1, x9, x8
	mov	w0, #0
	bl	_writel
	mov	w0, #100
	bl	_ndelay
	ldr	x8, [x19, #8]
	ldr	x9, [x24]
	add	x1, x9, x8
	mov	x0, x21
	bl	_writel
	ldr	x8, [x19, #8]
	ldr	x9, [x25]
	add	x0, x9, x8
	ldr	w4, [x22]
	mov	x2, x20
	mov	w3, #0
	bl	_readl_poll_timeout
	ldr	w8, [x23]
	cmn	w0, w8
	b.ne	LBB0_9
; %bb.8:
	ldr	w0, [x19, #16]
Lloh21:
	adrp	x1, l_.str.1@PAGE
Lloh22:
	add	x1, x1, l_.str.1@PAGEOFF
	bl	_dev_err
LBB0_9:
	ldr	x8, [x19, #8]
	ldr	x9, [x24]
	add	x1, x9, x8
	mov	w0, #0
	bl	_writel
	mov	w0, #100
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp], #80             ; 16-byte Folded Reload
	b	_ndelay
	.loh AdrpLdrGot	Lloh5, Lloh6
	.loh AdrpLdrGot	Lloh3, Lloh4
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpAdd	Lloh7, Lloh8
	.loh AdrpAdd	Lloh13, Lloh14
	.loh AdrpAdd	Lloh11, Lloh12
	.loh AdrpAdd	Lloh9, Lloh10
	.loh AdrpLdrGot	Lloh17, Lloh18
	.loh AdrpLdrGot	Lloh15, Lloh16
	.loh AdrpAdd	Lloh19, Lloh20
	.loh AdrpAdd	Lloh21, Lloh22
	.cfi_endproc
                                        ; -- End function
	.comm	_PHY_PMA_XCVR_PLLCLK_EN_ACK,8,3 ; @PHY_PMA_XCVR_PLLCLK_EN_ACK
	.comm	_POLL_TIMEOUT_US,4,2            ; @POLL_TIMEOUT_US
	.comm	_ETIMEDOUT,4,2                  ; @ETIMEDOUT
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"timeout waiting for link PLL clock enable ack\n"

	.comm	_PHY_PMA_XCVR_POWER_STATE_REQ,8,3 ; @PHY_PMA_XCVR_POWER_STATE_REQ
	.comm	_PHY_PMA_XCVR_POWER_STATE_ACK,8,3 ; @PHY_PMA_XCVR_POWER_STATE_ACK
l_.str.1:                               ; @.str.1
	.asciz	"timeout waiting for link power state ack\n"

	.no_dead_strip	_cdns_dp_phy_run
	.section	__TEXT,__literal16,16byte_literals
	.p2align	2                               ; @switch.table.cdns_dp_phy_run
l_switch.table.cdns_dp_phy_run:
	.long	0                               ; 0x0
	.long	0                               ; 0x0
	.long	1                               ; 0x1
	.long	0                               ; 0x0

	.p2align	2                               ; @switch.table.cdns_dp_phy_run.2
l_switch.table.cdns_dp_phy_run.2:
	.long	4                               ; 0x4
	.long	1028                            ; 0x404
	.long	0                               ; 0x0
	.long	67372036                        ; 0x4040404

	.p2align	2                               ; @switch.table.cdns_dp_phy_run.3
l_switch.table.cdns_dp_phy_run.3:
	.long	1                               ; 0x1
	.long	257                             ; 0x101
	.long	0                               ; 0x0
	.long	16843009                        ; 0x1010101

.subsections_via_symbols
