	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function mvebu_pci_bridge_emul_pcie_conf_read
_mvebu_pci_bridge_emul_pcie_conf_read:  ## @mvebu_pci_bridge_emul_pcie_conf_read
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -24
                                        ## kill: def $esi killed $esi def $rsi
	addl	$-128, %esi
	cmpl	$5, %esi
	ja	LBB0_3
## %bb.1:
	movq	%rdx, %rbx
	movq	(%rdi), %rdi
	leaq	LJTI0_0(%rip), %rax
	movslq	(%rax,%rsi,4), %rcx
	addq	%rax, %rcx
	jmpq	*%rcx
LBB0_2:
	movq	_PCI_EXP_SLTSTA_PDS@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	shll	$16, %eax
	jmp	LBB0_12
LBB0_3:
	movq	_PCI_BRIDGE_EMUL_NOT_HANDLED@GOTPCREL(%rip), %rax
	jmp	LBB0_13
LBB0_4:
	movq	_PCIE_RC_RTSTA@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	jmp	LBB0_11
LBB0_5:
	movq	_PCIE_CAP_PCIEXP@GOTPCREL(%rip), %rax
	movl	$130, %esi
	jmp	LBB0_10
LBB0_6:
	movq	_PCIE_CAP_PCIEXP@GOTPCREL(%rip), %rax
	movl	$131, %esi
	addl	(%rax), %esi
	callq	_mvebu_readl
	movl	%eax, %ecx
	movq	_PCI_EXP_LNKCAP_CLKPM@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	jmp	LBB0_8
LBB0_7:
	movq	_PCIE_CAP_PCIEXP@GOTPCREL(%rip), %rax
	movl	$132, %esi
	addl	(%rax), %esi
	callq	_mvebu_readl
	movl	%eax, %ecx
	movq	_PCI_EXP_DEVCTL_URRE@GOTPCREL(%rip), %rdx
	movq	_PCI_EXP_DEVCTL_FERE@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	orl	(%rdx), %eax
	movq	_PCI_EXP_DEVCTL_NFERE@GOTPCREL(%rip), %rdx
	orl	(%rdx), %eax
	movq	_PCI_EXP_DEVCTL_CERE@GOTPCREL(%rip), %rdx
	orl	(%rdx), %eax
LBB0_8:
	notl	%eax
	andl	%ecx, %eax
	jmp	LBB0_12
LBB0_9:
	movq	_PCIE_CAP_PCIEXP@GOTPCREL(%rip), %rax
	movl	$133, %esi
LBB0_10:
	addl	(%rax), %esi
LBB0_11:
	callq	_mvebu_readl
LBB0_12:
	movl	%eax, (%rbx)
	movq	_PCI_BRIDGE_EMUL_HANDLED@GOTPCREL(%rip), %rax
LBB0_13:
	movl	(%rax), %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%rbp
	retq
	.cfi_endproc
	.p2align	2, 0x90
	.data_region jt32
.set L0_0_set_2, LBB0_2-LJTI0_0
.set L0_0_set_4, LBB0_4-LJTI0_0
.set L0_0_set_5, LBB0_5-LJTI0_0
.set L0_0_set_6, LBB0_6-LJTI0_0
.set L0_0_set_7, LBB0_7-LJTI0_0
.set L0_0_set_9, LBB0_9-LJTI0_0
LJTI0_0:
	.long	L0_0_set_2
	.long	L0_0_set_4
	.long	L0_0_set_5
	.long	L0_0_set_6
	.long	L0_0_set_7
	.long	L0_0_set_9
	.end_data_region
                                        ## -- End function
	.comm	_PCIE_CAP_PCIEXP,4,2            ## @PCIE_CAP_PCIEXP
	.comm	_PCI_EXP_DEVCTL_URRE,4,2        ## @PCI_EXP_DEVCTL_URRE
	.comm	_PCI_EXP_DEVCTL_FERE,4,2        ## @PCI_EXP_DEVCTL_FERE
	.comm	_PCI_EXP_DEVCTL_NFERE,4,2       ## @PCI_EXP_DEVCTL_NFERE
	.comm	_PCI_EXP_DEVCTL_CERE,4,2        ## @PCI_EXP_DEVCTL_CERE
	.comm	_PCI_EXP_LNKCAP_CLKPM,4,2       ## @PCI_EXP_LNKCAP_CLKPM
	.comm	_PCI_EXP_SLTSTA_PDS,4,2         ## @PCI_EXP_SLTSTA_PDS
	.comm	_PCIE_RC_RTSTA,4,2              ## @PCIE_RC_RTSTA
	.comm	_PCI_BRIDGE_EMUL_NOT_HANDLED,4,2 ## @PCI_BRIDGE_EMUL_NOT_HANDLED
	.comm	_PCI_BRIDGE_EMUL_HANDLED,4,2    ## @PCI_BRIDGE_EMUL_HANDLED
	.no_dead_strip	_mvebu_pci_bridge_emul_pcie_conf_read
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function mvebu_pci_bridge_emul_pcie_conf_read
_mvebu_pci_bridge_emul_pcie_conf_read:  ; @mvebu_pci_bridge_emul_pcie_conf_read
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	sub	w8, w1, #128
	cmp	w8, #5
	b.hi	LBB0_3
; %bb.1:
	mov	x19, x2
	ldr	x0, [x0]
Lloh0:
	adrp	x9, lJTI0_0@PAGE
Lloh1:
	add	x9, x9, lJTI0_0@PAGEOFF
	adr	x10, LBB0_2
	ldrb	w11, [x9, x8]
	add	x10, x10, x11, lsl #2
	br	x10
LBB0_2:
Lloh2:
	adrp	x8, _PCI_EXP_SLTSTA_PDS@GOTPAGE
Lloh3:
	ldr	x8, [x8, _PCI_EXP_SLTSTA_PDS@GOTPAGEOFF]
Lloh4:
	ldr	w8, [x8]
	lsl	w0, w8, #16
	b	LBB0_10
LBB0_3:
Lloh5:
	adrp	x8, _PCI_BRIDGE_EMUL_NOT_HANDLED@GOTPAGE
Lloh6:
	ldr	x8, [x8, _PCI_BRIDGE_EMUL_NOT_HANDLED@GOTPAGEOFF]
	b	LBB0_11
LBB0_4:
Lloh7:
	adrp	x8, _PCIE_RC_RTSTA@GOTPAGE
Lloh8:
	ldr	x8, [x8, _PCIE_RC_RTSTA@GOTPAGEOFF]
Lloh9:
	ldr	w1, [x8]
	b	LBB0_9
LBB0_5:
Lloh10:
	adrp	x8, _PCIE_CAP_PCIEXP@GOTPAGE
Lloh11:
	ldr	x8, [x8, _PCIE_CAP_PCIEXP@GOTPAGEOFF]
Lloh12:
	ldr	w8, [x8]
	add	w1, w8, #130
	b	LBB0_9
LBB0_6:
Lloh13:
	adrp	x8, _PCIE_CAP_PCIEXP@GOTPAGE
Lloh14:
	ldr	x8, [x8, _PCIE_CAP_PCIEXP@GOTPAGEOFF]
Lloh15:
	ldr	w8, [x8]
	add	w1, w8, #131
	bl	_mvebu_readl
Lloh16:
	adrp	x8, _PCI_EXP_LNKCAP_CLKPM@GOTPAGE
Lloh17:
	ldr	x8, [x8, _PCI_EXP_LNKCAP_CLKPM@GOTPAGEOFF]
Lloh18:
	ldr	w8, [x8]
	bic	w0, w0, w8
	b	LBB0_10
LBB0_7:
Lloh19:
	adrp	x8, _PCIE_CAP_PCIEXP@GOTPAGE
Lloh20:
	ldr	x8, [x8, _PCIE_CAP_PCIEXP@GOTPAGEOFF]
Lloh21:
	ldr	w8, [x8]
	add	w1, w8, #132
	bl	_mvebu_readl
Lloh22:
	adrp	x8, _PCI_EXP_DEVCTL_URRE@GOTPAGE
Lloh23:
	ldr	x8, [x8, _PCI_EXP_DEVCTL_URRE@GOTPAGEOFF]
Lloh24:
	adrp	x9, _PCI_EXP_DEVCTL_FERE@GOTPAGE
Lloh25:
	ldr	x9, [x9, _PCI_EXP_DEVCTL_FERE@GOTPAGEOFF]
Lloh26:
	ldr	w8, [x8]
Lloh27:
	ldr	w9, [x9]
	orr	w8, w9, w8
Lloh28:
	adrp	x9, _PCI_EXP_DEVCTL_NFERE@GOTPAGE
Lloh29:
	ldr	x9, [x9, _PCI_EXP_DEVCTL_NFERE@GOTPAGEOFF]
Lloh30:
	ldr	w9, [x9]
	orr	w8, w8, w9
Lloh31:
	adrp	x9, _PCI_EXP_DEVCTL_CERE@GOTPAGE
Lloh32:
	ldr	x9, [x9, _PCI_EXP_DEVCTL_CERE@GOTPAGEOFF]
Lloh33:
	ldr	w9, [x9]
	orr	w8, w8, w9
	bic	w0, w0, w8
	b	LBB0_10
LBB0_8:
Lloh34:
	adrp	x8, _PCIE_CAP_PCIEXP@GOTPAGE
Lloh35:
	ldr	x8, [x8, _PCIE_CAP_PCIEXP@GOTPAGEOFF]
Lloh36:
	ldr	w8, [x8]
	add	w1, w8, #133
LBB0_9:
	bl	_mvebu_readl
LBB0_10:
	str	w0, [x19]
Lloh37:
	adrp	x8, _PCI_BRIDGE_EMUL_HANDLED@GOTPAGE
Lloh38:
	ldr	x8, [x8, _PCI_BRIDGE_EMUL_HANDLED@GOTPAGEOFF]
LBB0_11:
	ldr	w0, [x8]
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	ret
	.loh AdrpAdd	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGot	Lloh5, Lloh6
	.loh AdrpLdrGotLdr	Lloh7, Lloh8, Lloh9
	.loh AdrpLdrGotLdr	Lloh10, Lloh11, Lloh12
	.loh AdrpLdrGotLdr	Lloh16, Lloh17, Lloh18
	.loh AdrpLdrGotLdr	Lloh13, Lloh14, Lloh15
	.loh AdrpLdrGotLdr	Lloh31, Lloh32, Lloh33
	.loh AdrpLdrGotLdr	Lloh28, Lloh29, Lloh30
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh27
	.loh AdrpLdrGotLdr	Lloh22, Lloh23, Lloh26
	.loh AdrpLdrGotLdr	Lloh19, Lloh20, Lloh21
	.loh AdrpLdrGotLdr	Lloh34, Lloh35, Lloh36
	.loh AdrpLdrGot	Lloh37, Lloh38
	.cfi_endproc
	.section	__TEXT,__const
lJTI0_0:
	.byte	(LBB0_2-LBB0_2)>>2
	.byte	(LBB0_4-LBB0_2)>>2
	.byte	(LBB0_5-LBB0_2)>>2
	.byte	(LBB0_6-LBB0_2)>>2
	.byte	(LBB0_7-LBB0_2)>>2
	.byte	(LBB0_8-LBB0_2)>>2
                                        ; -- End function
	.comm	_PCIE_CAP_PCIEXP,4,2            ; @PCIE_CAP_PCIEXP
	.comm	_PCI_EXP_DEVCTL_URRE,4,2        ; @PCI_EXP_DEVCTL_URRE
	.comm	_PCI_EXP_DEVCTL_FERE,4,2        ; @PCI_EXP_DEVCTL_FERE
	.comm	_PCI_EXP_DEVCTL_NFERE,4,2       ; @PCI_EXP_DEVCTL_NFERE
	.comm	_PCI_EXP_DEVCTL_CERE,4,2        ; @PCI_EXP_DEVCTL_CERE
	.comm	_PCI_EXP_LNKCAP_CLKPM,4,2       ; @PCI_EXP_LNKCAP_CLKPM
	.comm	_PCI_EXP_SLTSTA_PDS,4,2         ; @PCI_EXP_SLTSTA_PDS
	.comm	_PCIE_RC_RTSTA,4,2              ; @PCIE_RC_RTSTA
	.comm	_PCI_BRIDGE_EMUL_NOT_HANDLED,4,2 ; @PCI_BRIDGE_EMUL_NOT_HANDLED
	.comm	_PCI_BRIDGE_EMUL_HANDLED,4,2    ; @PCI_BRIDGE_EMUL_HANDLED
	.no_dead_strip	_mvebu_pci_bridge_emul_pcie_conf_read
.subsections_via_symbols
