	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function advk_pcie_init_msi_irq_domain
_advk_pcie_init_msi_irq_domain:         ## @advk_pcie_init_msi_irq_domain
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %rbx
	movq	72(%rdi), %rax
	movq	(%rax), %r14
	addq	$64, %rdi
	callq	_mutex_init
	leaq	L_.str(%rip), %rax
	movq	%rax, 48(%rbx)
	movq	_advk_msi_irq_compose_msi_msg@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 60(%rbx)
	movq	_advk_msi_set_affinity@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 56(%rbx)
	leaq	L_.str.1(%rip), %rax
	movq	%rax, 32(%rbx)
	movq	_MSI_FLAG_USE_DEF_DOM_OPS@GOTPCREL(%rip), %rax
	movq	_MSI_FLAG_USE_DEF_CHIP_OPS@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	orl	(%rax), %ecx
	movq	_MSI_FLAG_MULTI_PCI_MSI@GOTPCREL(%rip), %rax
	orl	(%rax), %ecx
	leaq	32(%rbx), %rax
	movl	%ecx, 16(%rbx)
	movq	%rax, 24(%rbx)
	leaq	8(%rbx), %rdi
	callq	_virt_to_phys
	movl	%eax, %r15d
	movl	%eax, %edi
	callq	_lower_32_bits
	movq	_PCIE_MSI_ADDR_LOW_REG@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	movq	%rbx, %rdi
	movl	%eax, %esi
	callq	_advk_writel
	movl	%r15d, %edi
	callq	_upper_32_bits
	movq	_PCIE_MSI_ADDR_HIGH_REG@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	movq	%rbx, %rdi
	movl	%eax, %esi
	callq	_advk_writel
	movq	_MSI_IRQ_NUM@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_advk_msi_domain_ops@GOTPCREL(%rip), %rdx
	xorl	%r15d, %r15d
	xorl	%edi, %edi
	movq	%rbx, %rcx
	callq	_irq_domain_add_linear
	movl	%eax, (%rbx)
	testl	%eax, %eax
	je	LBB0_3
## %bb.1:
	leaq	16(%rbx), %r12
	movq	%r14, %rdi
	callq	_of_node_to_fwnode
	movl	(%rbx), %edx
	movl	%eax, %edi
	movq	%r12, %rsi
	callq	_pci_msi_create_irq_domain
	movl	%eax, 4(%rbx)
	testl	%eax, %eax
	jne	LBB0_4
## %bb.2:
	movl	(%rbx), %edi
	callq	_irq_domain_remove
LBB0_3:
	movq	_ENOMEM@GOTPCREL(%rip), %rax
	xorl	%r15d, %r15d
	subl	(%rax), %r15d
LBB0_4:
	movl	%r15d, %eax
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"MSI"

	.comm	_advk_msi_irq_compose_msi_msg,4,2 ## @advk_msi_irq_compose_msi_msg
	.comm	_advk_msi_set_affinity,4,2      ## @advk_msi_set_affinity
L_.str.1:                               ## @.str.1
	.asciz	"advk-MSI"

	.comm	_MSI_FLAG_USE_DEF_DOM_OPS,4,2   ## @MSI_FLAG_USE_DEF_DOM_OPS
	.comm	_MSI_FLAG_USE_DEF_CHIP_OPS,4,2  ## @MSI_FLAG_USE_DEF_CHIP_OPS
	.comm	_MSI_FLAG_MULTI_PCI_MSI,4,2     ## @MSI_FLAG_MULTI_PCI_MSI
	.comm	_PCIE_MSI_ADDR_LOW_REG,4,2      ## @PCIE_MSI_ADDR_LOW_REG
	.comm	_PCIE_MSI_ADDR_HIGH_REG,4,2     ## @PCIE_MSI_ADDR_HIGH_REG
	.comm	_MSI_IRQ_NUM,4,2                ## @MSI_IRQ_NUM
	.comm	_advk_msi_domain_ops,4,2        ## @advk_msi_domain_ops
	.comm	_ENOMEM,4,2                     ## @ENOMEM
	.no_dead_strip	_advk_pcie_init_msi_irq_domain
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function advk_pcie_init_msi_irq_domain
_advk_pcie_init_msi_irq_domain:         ; @advk_pcie_init_msi_irq_domain
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x0
	ldr	x8, [x0, #72]
	ldr	x20, [x8]
	add	x0, x0, #64
	bl	_mutex_init
Lloh0:
	adrp	x8, l_.str@PAGE
Lloh1:
	add	x8, x8, l_.str@PAGEOFF
	str	x8, [x19, #48]
Lloh2:
	adrp	x8, _advk_msi_irq_compose_msi_msg@GOTPAGE
Lloh3:
	ldr	x8, [x8, _advk_msi_irq_compose_msi_msg@GOTPAGEOFF]
Lloh4:
	ldr	w8, [x8]
Lloh5:
	adrp	x9, _advk_msi_set_affinity@GOTPAGE
Lloh6:
	ldr	x9, [x9, _advk_msi_set_affinity@GOTPAGEOFF]
Lloh7:
	ldr	w9, [x9]
	stp	w9, w8, [x19, #56]
Lloh8:
	adrp	x8, l_.str.1@PAGE
Lloh9:
	add	x8, x8, l_.str.1@PAGEOFF
	mov	x9, x19
	str	x8, [x9, #32]!
Lloh10:
	adrp	x8, _MSI_FLAG_USE_DEF_DOM_OPS@GOTPAGE
Lloh11:
	ldr	x8, [x8, _MSI_FLAG_USE_DEF_DOM_OPS@GOTPAGEOFF]
Lloh12:
	adrp	x10, _MSI_FLAG_USE_DEF_CHIP_OPS@GOTPAGE
Lloh13:
	ldr	x10, [x10, _MSI_FLAG_USE_DEF_CHIP_OPS@GOTPAGEOFF]
Lloh14:
	ldr	w8, [x8]
Lloh15:
	ldr	w10, [x10]
	orr	w8, w10, w8
Lloh16:
	adrp	x10, _MSI_FLAG_MULTI_PCI_MSI@GOTPAGE
Lloh17:
	ldr	x10, [x10, _MSI_FLAG_MULTI_PCI_MSI@GOTPAGEOFF]
Lloh18:
	ldr	w10, [x10]
	orr	w8, w8, w10
	mov	x21, x19
	str	w8, [x21, #16]!
	str	x9, [x19, #24]
	add	x0, x19, #8
	bl	_virt_to_phys
	mov	x22, x0
	bl	_lower_32_bits
	mov	x1, x0
Lloh19:
	adrp	x8, _PCIE_MSI_ADDR_LOW_REG@GOTPAGE
Lloh20:
	ldr	x8, [x8, _PCIE_MSI_ADDR_LOW_REG@GOTPAGEOFF]
Lloh21:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_advk_writel
	mov	x0, x22
	bl	_upper_32_bits
	mov	x1, x0
Lloh22:
	adrp	x8, _PCIE_MSI_ADDR_HIGH_REG@GOTPAGE
Lloh23:
	ldr	x8, [x8, _PCIE_MSI_ADDR_HIGH_REG@GOTPAGEOFF]
Lloh24:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_advk_writel
Lloh25:
	adrp	x8, _MSI_IRQ_NUM@GOTPAGE
Lloh26:
	ldr	x8, [x8, _MSI_IRQ_NUM@GOTPAGEOFF]
Lloh27:
	ldr	w1, [x8]
Lloh28:
	adrp	x2, _advk_msi_domain_ops@GOTPAGE
Lloh29:
	ldr	x2, [x2, _advk_msi_domain_ops@GOTPAGEOFF]
	mov	x0, #0
	mov	x3, x19
	bl	_irq_domain_add_linear
	str	w0, [x19]
	cbz	w0, LBB0_4
; %bb.1:
	mov	x0, x20
	bl	_of_node_to_fwnode
	ldr	w2, [x19]
	mov	x1, x21
	bl	_pci_msi_create_irq_domain
	str	w0, [x19, #4]
	cbz	w0, LBB0_3
; %bb.2:
	mov	w0, #0
	b	LBB0_5
LBB0_3:
	ldr	w0, [x19]
	bl	_irq_domain_remove
LBB0_4:
Lloh30:
	adrp	x8, _ENOMEM@GOTPAGE
Lloh31:
	ldr	x8, [x8, _ENOMEM@GOTPAGEOFF]
Lloh32:
	ldr	w8, [x8]
	neg	w0, w8
LBB0_5:
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGot	Lloh28, Lloh29
	.loh AdrpLdrGotLdr	Lloh25, Lloh26, Lloh27
	.loh AdrpLdrGotLdr	Lloh22, Lloh23, Lloh24
	.loh AdrpLdrGotLdr	Lloh19, Lloh20, Lloh21
	.loh AdrpLdrGotLdr	Lloh16, Lloh17, Lloh18
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh15
	.loh AdrpLdrGotLdr	Lloh10, Lloh11, Lloh14
	.loh AdrpAdd	Lloh8, Lloh9
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpAdd	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh30, Lloh31, Lloh32
	.cfi_endproc
                                        ; -- End function
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"MSI"

	.comm	_advk_msi_irq_compose_msi_msg,4,2 ; @advk_msi_irq_compose_msi_msg
	.comm	_advk_msi_set_affinity,4,2      ; @advk_msi_set_affinity
l_.str.1:                               ; @.str.1
	.asciz	"advk-MSI"

	.comm	_MSI_FLAG_USE_DEF_DOM_OPS,4,2   ; @MSI_FLAG_USE_DEF_DOM_OPS
	.comm	_MSI_FLAG_USE_DEF_CHIP_OPS,4,2  ; @MSI_FLAG_USE_DEF_CHIP_OPS
	.comm	_MSI_FLAG_MULTI_PCI_MSI,4,2     ; @MSI_FLAG_MULTI_PCI_MSI
	.comm	_PCIE_MSI_ADDR_LOW_REG,4,2      ; @PCIE_MSI_ADDR_LOW_REG
	.comm	_PCIE_MSI_ADDR_HIGH_REG,4,2     ; @PCIE_MSI_ADDR_HIGH_REG
	.comm	_MSI_IRQ_NUM,4,2                ; @MSI_IRQ_NUM
	.comm	_advk_msi_domain_ops,4,2        ; @advk_msi_domain_ops
	.comm	_ENOMEM,4,2                     ; @ENOMEM
	.no_dead_strip	_advk_pcie_init_msi_irq_domain
.subsections_via_symbols
