	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_ath9k_hw_reset                 ## -- Begin function ath9k_hw_reset
	.p2align	4, 0x90
_ath9k_hw_reset:                        ## @ath9k_hw_reset
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$56, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%ecx, %r13d
	movq	%rdx, %r12
	movq	%rsi, %r14
	movq	%rdi, %rbx
	callq	_ath9k_hw_common
	movq	%rax, -72(%rbp)                 ## 8-byte Spill
	movl	(%rbx), %eax
	movl	%eax, -52(%rbp)                 ## 4-byte Spill
	movq	%rbx, %rdi
	callq	_ath9k_hw_mci_is_enabled
	testq	%rax, %rax
	je	LBB0_2
## %bb.1:
	movq	%rbx, %rdi
	movq	%r14, %rsi
	callq	_ar9003_mci_start_reset
	xorl	%r15d, %r15d
	testl	%eax, %eax
	jne	LBB0_68
LBB0_2:
	movq	_ATH9K_PM_AWAKE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_ath9k_hw_setpower
	testl	%eax, %eax
	je	LBB0_3
## %bb.5:
	movq	96(%rbx), %rsi
	testq	%rsi, %rsi
	je	LBB0_8
## %bb.6:
	cmpl	$0, (%rbx)
	jne	LBB0_8
## %bb.7:
	movq	%rbx, %rdi
	callq	_ath9k_hw_getnf
LBB0_8:
	movq	%r12, 88(%rbx)
	testq	%r12, %r12
	je	LBB0_13
## %bb.9:
	movq	(%r14), %rax
	cmpq	(%r12), %rax
	jne	LBB0_11
## %bb.10:
	movq	8(%r14), %rax
	cmpq	8(%r12), %rax
	jne	LBB0_11
## %bb.12:
	movq	_PAPRD_PACKET_SENT@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	leaq	16(%r12), %rsi
	callq	_clear_bit
	jmp	LBB0_13
LBB0_11:
	movq	%r12, %rdi
	xorl	%esi, %esi
	movl	$24, %edx
	callq	_memset
	movq	%rbx, %rdi
	movq	%r14, %rsi
	callq	_ath9k_init_nfcal_hist_buffer
LBB0_13:
	movl	16(%r14), %edx
	movq	%rbx, %rdi
	movq	%r14, %rsi
	callq	_ath9k_hw_getchan_noise
	movl	%eax, 80(%rbx)
	testl	%r13d, %r13d
	je	LBB0_16
## %bb.14:
	movq	%rbx, %rdi
	movq	%r14, %rsi
	callq	_ath9k_hw_do_fastcc
	testl	%eax, %eax
	je	LBB0_15
LBB0_16:
	movq	%rbx, %rdi
	callq	_ath9k_hw_mci_is_enabled
	testq	%rax, %rax
	je	LBB0_18
## %bb.17:
	movq	%rbx, %rdi
	movl	-52(%rbp), %esi                 ## 4-byte Reload
	callq	_ar9003_mci_stop_bt
LBB0_18:
	movq	_AR_DEF_ANTENNA@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_REG_READ
	testq	%rax, %rax
	movl	$1, %r15d
	cmovneq	%rax, %r15
	movq	_AR_STA_ID1@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_REG_READ
	movq	_AR_STA_ID1_BASE_RATE_11B@GOTPCREL(%rip), %rcx
	andq	(%rcx), %rax
	movq	%rax, -96(%rbp)                 ## 8-byte Spill
	leaq	-48(%rbp), %rdi
	callq	_ktime_get_raw_ts64
	movq	%rbx, %rdi
	callq	_ath9k_hw_gettsf64
	movq	%rax, -64(%rbp)                 ## 8-byte Spill
	movq	_AR_CFG_LED@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_REG_READ
	movq	_AR_CFG_LED_ASSOC_CTL@GOTPCREL(%rip), %rcx
	movq	_AR_CFG_LED_MODE_SEL@GOTPCREL(%rip), %rdx
	movq	(%rdx), %r13
	orq	(%rcx), %r13
	movq	_AR_CFG_LED_BLINK_THRESH_SEL@GOTPCREL(%rip), %rcx
	orq	(%rcx), %r13
	movq	%rax, -88(%rbp)                 ## 8-byte Spill
	movq	_AR_CFG_LED_BLINK_SLOW@GOTPCREL(%rip), %rax
	orq	(%rax), %r13
	movq	%rbx, %rdi
	callq	_ath9k_hw_mark_phy_inactive
	movl	$0, 4(%rbx)
	movq	%rbx, %rdi
	callq	_AR_SREV_9271
	testq	%rax, %rax
	je	LBB0_21
## %bb.19:
	cmpl	$0, 8(%rbx)
	je	LBB0_21
## %bb.20:
	movq	_AR9271_RESET_POWER_DOWN_CONTROL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_AR9271_RADIO_RF_RST@GOTPCREL(%rip), %rax
	movq	(%rax), %rdx
	movq	%rbx, %rdi
	callq	_REG_WRITE
	movl	$50, %edi
	callq	_udelay
LBB0_21:
	movq	%rbx, %rdi
	movq	%r14, %rsi
	callq	_ath9k_hw_chip_reset
	testl	%eax, %eax
	je	LBB0_22
## %bb.23:
	movq	%rbx, %rdi
	callq	_AR_SREV_9271
	testq	%rax, %rax
	je	LBB0_26
## %bb.24:
	cmpl	$0, 8(%rbx)
	je	LBB0_26
## %bb.25:
	movl	$0, 8(%rbx)
	movq	_AR9271_RESET_POWER_DOWN_CONTROL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_AR9271_GATE_MAC_CTL@GOTPCREL(%rip), %rax
	movq	(%rax), %rdx
	movq	%rbx, %rdi
	callq	_REG_WRITE
	movl	$50, %edi
	callq	_udelay
LBB0_26:
	leaq	-48(%rbp), %rdi
	xorl	%esi, %esi
	callq	_ath9k_hw_get_tsf_offset
	movq	-64(%rbp), %rcx                 ## 8-byte Reload
	leaq	(%rax,%rcx), %rsi
	movq	%rbx, %rdi
	callq	_ath9k_hw_settsf64
	movq	%rbx, %rdi
	callq	_AR_SREV_9280_20_OR_LATER
	testq	%rax, %rax
	je	LBB0_28
## %bb.27:
	movq	_AR_GPIO_INPUT_EN_VAL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_AR_GPIO_JTAG_DISABLE@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	callq	_REG_SET_BIT
LBB0_28:
	movq	%r15, -80(%rbp)                 ## 8-byte Spill
	movq	%rbx, %rdi
	callq	_AR_SREV_9300_20_OR_LATER
	testq	%rax, %rax
	jne	LBB0_30
## %bb.29:
	movq	%rbx, %rdi
	callq	_ar9002_hw_enable_async_fifo
LBB0_30:
	movq	%rbx, %rdi
	movq	%r14, %rsi
	callq	_ath9k_hw_process_ini
	movl	%eax, %r15d
	testl	%eax, %eax
	jne	LBB0_68
## %bb.31:
	movq	%rbx, %rdi
	movq	%r14, %rsi
	callq	_ath9k_hw_set_rfmode
	movq	%rbx, %rdi
	callq	_ath9k_hw_mci_is_enabled
	testq	%rax, %rax
	je	LBB0_33
## %bb.32:
	movq	%r14, %rdi
	callq	_IS_CHAN_2GHZ
	movq	%rbx, %rdi
	xorl	%esi, %esi
	movl	%eax, %edx
	movl	-52(%rbp), %ecx                 ## 4-byte Reload
	callq	_ar9003_mci_reset
LBB0_33:
	movq	%rbx, %rdi
	callq	_AR_SREV_9100
	testq	%rax, %rax
	movq	-80(%rbp), %r15                 ## 8-byte Reload
	je	LBB0_36
## %bb.34:
	movq	%rbx, %rdi
	callq	_ath9k_hw_gettsf64
	cmpq	-64(%rbp), %rax                 ## 8-byte Folded Reload
	jge	LBB0_36
## %bb.35:
	leaq	-48(%rbp), %rdi
	xorl	%esi, %esi
	callq	_ath9k_hw_get_tsf_offset
	movq	-64(%rbp), %rsi                 ## 8-byte Reload
	addq	%rax, %rsi
	movq	%rbx, %rdi
	callq	_ath9k_hw_settsf64
LBB0_36:
	movq	%rbx, %rdi
	callq	_ath9k_hw_init_mfp
	movq	%rbx, %rdi
	movq	%r14, %rsi
	callq	_ath9k_hw_set_delta_slope
	movq	%rbx, %rdi
	movq	%r14, %rsi
	callq	_ath9k_hw_spur_mitigate_freq
	movq	72(%rbx), %rax
	movq	%rbx, %rdi
	movq	%r14, %rsi
	callq	*(%rax)
	movq	%rbx, %rdi
	movq	-96(%rbp), %rsi                 ## 8-byte Reload
	movq	%r15, %rdx
	callq	_ath9k_hw_reset_opmode
	movq	%rbx, %rdi
	movq	%r14, %rsi
	callq	_ath9k_hw_rf_set_freq
	movl	%eax, %r15d
	testl	%eax, %eax
	jne	LBB0_68
## %bb.37:
	movq	%rbx, %rdi
	callq	_ath9k_hw_set_clockrate
	movq	%rbx, %rdi
	callq	_ath9k_hw_init_queues
	movl	64(%rbx), %esi
	movq	%rbx, %rdi
	callq	_ath9k_hw_init_interrupt_masks
	movq	%rbx, %rdi
	callq	_ath9k_hw_ani_cache_ini_regs
	movq	%rbx, %rdi
	callq	_ath9k_hw_init_qos
	movq	_ATH9K_HW_CAP_RFSILENT@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	testl	%eax, 60(%rbx)
	je	LBB0_39
## %bb.38:
	movl	56(%rbx), %esi
	leaq	L_.str.1(%rip), %rdx
	movq	%rbx, %rdi
	callq	_ath9k_hw_gpio_request_in
LBB0_39:
	movq	%rbx, %rdi
	callq	_ath9k_hw_init_global_settings
	movq	%rbx, %rdi
	callq	_AR_SREV_9287
	testq	%rax, %rax
	movq	_AR_STA_ID1@GOTPCREL(%rip), %r15
	je	LBB0_42
## %bb.40:
	movq	%rbx, %rdi
	callq	_AR_SREV_9287_13_OR_LATER
	testq	%rax, %rax
	je	LBB0_42
## %bb.41:
	movq	_AR_MAC_PCU_LOGIC_ANALYZER@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_AR_MAC_PCU_LOGIC_ANALYZER_DISBUG20768@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	callq	_REG_SET_BIT
	movq	_AR_AHB_MODE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_AR_AHB_CUSTOM_BURST_EN@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	_AR_AHB_CUSTOM_BURST_ASYNC_FIFO_VAL@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movq	%rbx, %rdi
	callq	_REG_RMW_FIELD
	movq	_AR_PCU_MISC_MODE2@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_AR_PCU_MISC_MODE2_ENABLE_AGGWEP@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	callq	_REG_SET_BIT
LBB0_42:
	movl	(%r15), %esi
	movq	_AR_STA_ID1_PRESERVE_SEQNUM@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	callq	_REG_SET_BIT
	movq	%rbx, %rdi
	callq	_ath9k_hw_set_dma
	movq	%rbx, %rdi
	callq	_ath9k_hw_mci_is_enabled
	testq	%rax, %rax
	jne	LBB0_44
## %bb.43:
	movq	_AR_OBS@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	$8, %edx
	movq	%rbx, %rdi
	callq	_REG_WRITE
LBB0_44:
	movq	%rbx, %rdi
	callq	_ENABLE_REG_RMW_BUFFER
	cmpq	$0, 48(%rbx)
	je	LBB0_46
## %bb.45:
	movq	_AR_RIMT@GOTPCREL(%rip), %r15
	movl	(%r15), %esi
	movq	_AR_RIMT_LAST@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movl	24(%rbx), %ecx
	movq	%rbx, %rdi
	callq	_REG_RMW_FIELD
	movl	(%r15), %esi
	movq	_AR_RIMT_FIRST@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movl	28(%rbx), %ecx
	movq	%rbx, %rdi
	callq	_REG_RMW_FIELD
LBB0_46:
	cmpq	$0, 40(%rbx)
	je	LBB0_48
## %bb.47:
	movq	_AR_TIMT@GOTPCREL(%rip), %r15
	movl	(%r15), %esi
	movq	_AR_TIMT_LAST@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	movl	$300, %ecx                      ## imm = 0x12C
	callq	_REG_RMW_FIELD
	movl	(%r15), %esi
	movq	_AR_TIMT_FIRST@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	movl	$750, %ecx                      ## imm = 0x2EE
	callq	_REG_RMW_FIELD
LBB0_48:
	movq	%rbx, %rdi
	callq	_REG_RMW_BUFFER_FLUSH
	movq	%rbx, %rdi
	movq	%r14, %rsi
	callq	_ath9k_hw_init_bb
	testq	%r12, %r12
	je	LBB0_50
## %bb.49:
	movq	_TXIQCAL_DONE@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	leaq	16(%r12), %r15
	movq	%r15, %rsi
	callq	_clear_bit
	movq	_TXCLCAL_DONE@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	%r15, %rsi
	callq	_clear_bit
LBB0_50:
	movq	%rbx, %rdi
	movq	%r14, %rsi
	callq	_ath9k_hw_init_cal
	testl	%eax, %eax
	je	LBB0_3
## %bb.51:
	movq	%rbx, %rdi
	callq	_ath9k_hw_mci_is_enabled
	testq	%rax, %rax
	je	LBB0_53
## %bb.52:
	movq	%rbx, %rdi
	movq	%r14, %rsi
	movq	%r12, %rdx
	callq	_ar9003_mci_end_reset
	testq	%rax, %rax
	je	LBB0_53
LBB0_3:
	movq	_EIO@GOTPCREL(%rip), %rax
	jmp	LBB0_4
LBB0_22:
	leaq	L_.str(%rip), %rsi
	movq	-72(%rbp), %rdi                 ## 8-byte Reload
	callq	_ath_err
	movq	_EINVAL@GOTPCREL(%rip), %rax
LBB0_4:
	xorl	%r15d, %r15d
	subl	(%rax), %r15d
	jmp	LBB0_68
LBB0_15:
	xorl	%r15d, %r15d
LBB0_68:
	movl	%r15d, %eax
	addq	$56, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_53:
	andq	-88(%rbp), %r13                 ## 8-byte Folded Reload
	movq	%rbx, %rdi
	callq	_ENABLE_REGWRITE_BUFFER
	movq	%rbx, %rdi
	callq	_ath9k_hw_restore_chainmask
	movq	_AR_CFG_LED@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_AR_CFG_SCLK_32KHZ@GOTPCREL(%rip), %rax
	orq	(%rax), %r13
	movq	%rbx, %rdi
	movq	%r13, %rdx
	callq	_REG_WRITE
	movq	%rbx, %rdi
	callq	_REGWRITE_BUFFER_FLUSH
	movq	%rbx, %rdi
	callq	_ath9k_hw_gen_timer_start_tsf2
	movq	%rbx, %rdi
	callq	_ath9k_hw_init_desc
	movq	%rbx, %rdi
	callq	_ath9k_hw_btcoex_is_enabled
	testq	%rax, %rax
	je	LBB0_55
## %bb.54:
	movq	%rbx, %rdi
	callq	_ath9k_hw_btcoex_enable
LBB0_55:
	movq	%rbx, %rdi
	callq	_ath9k_hw_mci_is_enabled
	testq	%rax, %rax
	je	LBB0_57
## %bb.56:
	movq	%rbx, %rdi
	callq	_ar9003_mci_check_bt
LBB0_57:
	movq	%rbx, %rdi
	callq	_AR_SREV_9300_20_OR_LATER
	testq	%rax, %rax
	je	LBB0_59
## %bb.58:
	movq	%rbx, %rdi
	movq	%r14, %rsi
	callq	_ath9k_hw_loadnf
	movq	%rbx, %rdi
	movl	$1, %esi
	callq	_ath9k_hw_start_nfcal
LBB0_59:
	movq	%rbx, %rdi
	callq	_AR_SREV_9300_20_OR_LATER
	testq	%rax, %rax
	je	LBB0_61
## %bb.60:
	movq	%rbx, %rdi
	callq	_ar9003_hw_bb_watchdog_config
LBB0_61:
	movq	_HW_PHYRESTART_CLC_WAR@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	testl	%eax, 32(%rbx)
	je	LBB0_63
## %bb.62:
	movq	%rbx, %rdi
	callq	_ar9003_hw_disable_phy_restart
LBB0_63:
	movq	%rbx, %rdi
	callq	_ath9k_hw_apply_gpio_override
	movq	%rbx, %rdi
	callq	_AR_SREV_9565
	testq	%rax, %rax
	je	LBB0_66
## %bb.64:
	movq	-72(%rbp), %rax                 ## 8-byte Reload
	cmpq	$0, (%rax)
	je	LBB0_66
## %bb.65:
	movq	_AR_BTCOEX_WL_LNADIV@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_AR_BTCOEX_WL_LNADIV_FORCE_ON@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	callq	_REG_SET_BIT
LBB0_66:
	movq	16(%rbx), %rax
	xorl	%r15d, %r15d
	cmpq	$0, (%rax)
	je	LBB0_68
## %bb.67:
	movq	%r14, %rdi
	callq	_IS_CHAN_HT40
	movl	%eax, 12(%rbx)
	movq	%rbx, %rdi
	callq	_ath9k_hw_set_radar_params
	jmp	LBB0_68
	.cfi_endproc
                                        ## -- End function
	.comm	_ATH9K_PM_AWAKE,4,2             ## @ATH9K_PM_AWAKE
	.comm	_EIO,4,2                        ## @EIO
	.comm	_PAPRD_PACKET_SENT,4,2          ## @PAPRD_PACKET_SENT
	.comm	_AR_DEF_ANTENNA,4,2             ## @AR_DEF_ANTENNA
	.comm	_AR_STA_ID1,4,2                 ## @AR_STA_ID1
	.comm	_AR_STA_ID1_BASE_RATE_11B,8,3   ## @AR_STA_ID1_BASE_RATE_11B
	.comm	_AR_CFG_LED,4,2                 ## @AR_CFG_LED
	.comm	_AR_CFG_LED_ASSOC_CTL,8,3       ## @AR_CFG_LED_ASSOC_CTL
	.comm	_AR_CFG_LED_MODE_SEL,8,3        ## @AR_CFG_LED_MODE_SEL
	.comm	_AR_CFG_LED_BLINK_THRESH_SEL,8,3 ## @AR_CFG_LED_BLINK_THRESH_SEL
	.comm	_AR_CFG_LED_BLINK_SLOW,8,3      ## @AR_CFG_LED_BLINK_SLOW
	.comm	_AR9271_RESET_POWER_DOWN_CONTROL,4,2 ## @AR9271_RESET_POWER_DOWN_CONTROL
	.comm	_AR9271_RADIO_RF_RST,8,3        ## @AR9271_RADIO_RF_RST
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"Chip reset failed\n"

	.comm	_EINVAL,4,2                     ## @EINVAL
	.comm	_AR9271_GATE_MAC_CTL,8,3        ## @AR9271_GATE_MAC_CTL
	.comm	_AR_GPIO_INPUT_EN_VAL,4,2       ## @AR_GPIO_INPUT_EN_VAL
	.comm	_AR_GPIO_JTAG_DISABLE,4,2       ## @AR_GPIO_JTAG_DISABLE
	.comm	_ATH9K_HW_CAP_RFSILENT,4,2      ## @ATH9K_HW_CAP_RFSILENT
L_.str.1:                               ## @.str.1
	.asciz	"ath9k-rfkill"

	.comm	_AR_MAC_PCU_LOGIC_ANALYZER,4,2  ## @AR_MAC_PCU_LOGIC_ANALYZER
	.comm	_AR_MAC_PCU_LOGIC_ANALYZER_DISBUG20768,4,2 ## @AR_MAC_PCU_LOGIC_ANALYZER_DISBUG20768
	.comm	_AR_AHB_MODE,4,2                ## @AR_AHB_MODE
	.comm	_AR_AHB_CUSTOM_BURST_EN,4,2     ## @AR_AHB_CUSTOM_BURST_EN
	.comm	_AR_AHB_CUSTOM_BURST_ASYNC_FIFO_VAL,4,2 ## @AR_AHB_CUSTOM_BURST_ASYNC_FIFO_VAL
	.comm	_AR_PCU_MISC_MODE2,4,2          ## @AR_PCU_MISC_MODE2
	.comm	_AR_PCU_MISC_MODE2_ENABLE_AGGWEP,4,2 ## @AR_PCU_MISC_MODE2_ENABLE_AGGWEP
	.comm	_AR_STA_ID1_PRESERVE_SEQNUM,4,2 ## @AR_STA_ID1_PRESERVE_SEQNUM
	.comm	_AR_OBS,4,2                     ## @AR_OBS
	.comm	_AR_RIMT,4,2                    ## @AR_RIMT
	.comm	_AR_RIMT_LAST,4,2               ## @AR_RIMT_LAST
	.comm	_AR_RIMT_FIRST,4,2              ## @AR_RIMT_FIRST
	.comm	_AR_TIMT,4,2                    ## @AR_TIMT
	.comm	_AR_TIMT_LAST,4,2               ## @AR_TIMT_LAST
	.comm	_AR_TIMT_FIRST,4,2              ## @AR_TIMT_FIRST
	.comm	_TXIQCAL_DONE,4,2               ## @TXIQCAL_DONE
	.comm	_TXCLCAL_DONE,4,2               ## @TXCLCAL_DONE
	.comm	_AR_CFG_SCLK_32KHZ,8,3          ## @AR_CFG_SCLK_32KHZ
	.comm	_HW_PHYRESTART_CLC_WAR,4,2      ## @HW_PHYRESTART_CLC_WAR
	.comm	_AR_BTCOEX_WL_LNADIV,4,2        ## @AR_BTCOEX_WL_LNADIV
	.comm	_AR_BTCOEX_WL_LNADIV_FORCE_ON,4,2 ## @AR_BTCOEX_WL_LNADIV_FORCE_ON
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_ath9k_hw_reset                 ; -- Begin function ath9k_hw_reset
	.p2align	2
_ath9k_hw_reset:                        ; @ath9k_hw_reset
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #144
	.cfi_def_cfa_offset 144
	stp	x28, x27, [sp, #48]             ; 16-byte Folded Spill
	stp	x26, x25, [sp, #64]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #80]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #96]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #112]            ; 16-byte Folded Spill
	stp	x29, x30, [sp, #128]            ; 16-byte Folded Spill
	add	x29, sp, #128
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	mov	x23, x3
	mov	x22, x2
	mov	x20, x1
	mov	x19, x0
	bl	_ath9k_hw_common
	mov	x21, x0
	ldr	w24, [x19]
	mov	x0, x19
	bl	_ath9k_hw_mci_is_enabled
	cbz	x0, LBB0_3
; %bb.1:
	mov	x0, x19
	mov	x1, x20
	bl	_ar9003_mci_start_reset
	cbz	w0, LBB0_3
LBB0_2:
	mov	w0, #0
	b	LBB0_53
LBB0_3:
Lloh0:
	adrp	x8, _ATH9K_PM_AWAKE@GOTPAGE
Lloh1:
	ldr	x8, [x8, _ATH9K_PM_AWAKE@GOTPAGEOFF]
Lloh2:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_ath9k_hw_setpower
	cbz	w0, LBB0_50
; %bb.4:
	ldr	x1, [x19, #96]
	cbz	x1, LBB0_7
; %bb.5:
	ldr	w8, [x19]
	cbnz	w8, LBB0_7
; %bb.6:
	mov	x0, x19
	bl	_ath9k_hw_getnf
LBB0_7:
	str	x22, [x19, #88]
	cbz	x22, LBB0_12
; %bb.8:
	ldr	x8, [x20]
	ldr	x9, [x22]
	cmp	x8, x9
	b.ne	LBB0_11
; %bb.9:
	ldr	x8, [x20, #8]
	ldr	x9, [x22, #8]
	cmp	x8, x9
	b.ne	LBB0_11
; %bb.10:
Lloh3:
	adrp	x8, _PAPRD_PACKET_SENT@GOTPAGE
Lloh4:
	ldr	x8, [x8, _PAPRD_PACKET_SENT@GOTPAGEOFF]
Lloh5:
	ldr	w0, [x8]
	add	x1, x22, #16
	bl	_clear_bit
	b	LBB0_12
LBB0_11:
	mov	x0, x22
	mov	w1, #0
	mov	w2, #24
	bl	_memset
	mov	x0, x19
	mov	x1, x20
	bl	_ath9k_init_nfcal_hist_buffer
LBB0_12:
	ldr	w2, [x20, #16]
	mov	x0, x19
	mov	x1, x20
	bl	_ath9k_hw_getchan_noise
	str	w0, [x19, #80]
	cbz	w23, LBB0_14
; %bb.13:
	mov	x0, x19
	mov	x1, x20
	bl	_ath9k_hw_do_fastcc
	cbz	w0, LBB0_53
LBB0_14:
	mov	x0, x19
	bl	_ath9k_hw_mci_is_enabled
	cbz	x0, LBB0_16
; %bb.15:
	mov	x0, x19
	mov	x1, x24
	bl	_ar9003_mci_stop_bt
LBB0_16:
Lloh6:
	adrp	x8, _AR_DEF_ANTENNA@GOTPAGE
Lloh7:
	ldr	x8, [x8, _AR_DEF_ANTENNA@GOTPAGEOFF]
Lloh8:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_REG_READ
	cmp	x0, #0
	csinc	x25, x0, xzr, ne
Lloh9:
	adrp	x23, _AR_STA_ID1@GOTPAGE
Lloh10:
	ldr	x23, [x23, _AR_STA_ID1@GOTPAGEOFF]
	ldr	w1, [x23]
	mov	x0, x19
	bl	_REG_READ
	mov	x27, x0
Lloh11:
	adrp	x8, _AR_STA_ID1_BASE_RATE_11B@GOTPAGE
Lloh12:
	ldr	x8, [x8, _AR_STA_ID1_BASE_RATE_11B@GOTPAGEOFF]
Lloh13:
	ldr	x28, [x8]
	add	x0, sp, #40
	bl	_ktime_get_raw_ts64
	mov	x0, x19
	bl	_ath9k_hw_gettsf64
	mov	x26, x0
Lloh14:
	adrp	x8, _AR_CFG_LED@GOTPAGE
Lloh15:
	ldr	x8, [x8, _AR_CFG_LED@GOTPAGEOFF]
Lloh16:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_REG_READ
	str	x0, [sp, #32]                   ; 8-byte Folded Spill
Lloh17:
	adrp	x8, _AR_CFG_LED_ASSOC_CTL@GOTPAGE
Lloh18:
	ldr	x8, [x8, _AR_CFG_LED_ASSOC_CTL@GOTPAGEOFF]
Lloh19:
	ldr	x8, [x8]
	str	x8, [sp, #24]                   ; 8-byte Folded Spill
Lloh20:
	adrp	x8, _AR_CFG_LED_MODE_SEL@GOTPAGE
Lloh21:
	ldr	x8, [x8, _AR_CFG_LED_MODE_SEL@GOTPAGEOFF]
Lloh22:
	ldr	x8, [x8]
	str	x8, [sp, #16]                   ; 8-byte Folded Spill
Lloh23:
	adrp	x8, _AR_CFG_LED_BLINK_THRESH_SEL@GOTPAGE
Lloh24:
	ldr	x8, [x8, _AR_CFG_LED_BLINK_THRESH_SEL@GOTPAGEOFF]
Lloh25:
	ldr	x8, [x8]
	str	x8, [sp, #8]                    ; 8-byte Folded Spill
Lloh26:
	adrp	x8, _AR_CFG_LED_BLINK_SLOW@GOTPAGE
Lloh27:
	ldr	x8, [x8, _AR_CFG_LED_BLINK_SLOW@GOTPAGEOFF]
Lloh28:
	ldr	x8, [x8]
	str	x8, [sp]                        ; 8-byte Folded Spill
	mov	x0, x19
	bl	_ath9k_hw_mark_phy_inactive
	str	wzr, [x19, #4]
	mov	x0, x19
	bl	_AR_SREV_9271
	cbz	x0, LBB0_19
; %bb.17:
	ldr	w8, [x19, #8]
	cbz	w8, LBB0_19
; %bb.18:
Lloh29:
	adrp	x8, _AR9271_RESET_POWER_DOWN_CONTROL@GOTPAGE
Lloh30:
	ldr	x8, [x8, _AR9271_RESET_POWER_DOWN_CONTROL@GOTPAGEOFF]
Lloh31:
	ldr	w1, [x8]
Lloh32:
	adrp	x8, _AR9271_RADIO_RF_RST@GOTPAGE
Lloh33:
	ldr	x8, [x8, _AR9271_RADIO_RF_RST@GOTPAGEOFF]
Lloh34:
	ldr	x2, [x8]
	mov	x0, x19
	bl	_REG_WRITE
	mov	w0, #50
	bl	_udelay
LBB0_19:
	mov	x0, x19
	mov	x1, x20
	bl	_ath9k_hw_chip_reset
	cbz	w0, LBB0_51
; %bb.20:
	mov	x0, x19
	bl	_AR_SREV_9271
	cbz	x0, LBB0_23
; %bb.21:
	ldr	w8, [x19, #8]
	cbz	w8, LBB0_23
; %bb.22:
	str	wzr, [x19, #8]
Lloh35:
	adrp	x8, _AR9271_RESET_POWER_DOWN_CONTROL@GOTPAGE
Lloh36:
	ldr	x8, [x8, _AR9271_RESET_POWER_DOWN_CONTROL@GOTPAGEOFF]
Lloh37:
	ldr	w1, [x8]
Lloh38:
	adrp	x8, _AR9271_GATE_MAC_CTL@GOTPAGE
Lloh39:
	ldr	x8, [x8, _AR9271_GATE_MAC_CTL@GOTPAGEOFF]
Lloh40:
	ldr	x2, [x8]
	mov	x0, x19
	bl	_REG_WRITE
	mov	w0, #50
	bl	_udelay
LBB0_23:
	add	x0, sp, #40
	mov	x1, #0
	bl	_ath9k_hw_get_tsf_offset
	add	x1, x0, x26
	mov	x0, x19
	bl	_ath9k_hw_settsf64
	mov	x0, x19
	bl	_AR_SREV_9280_20_OR_LATER
	cbz	x0, LBB0_25
; %bb.24:
Lloh41:
	adrp	x8, _AR_GPIO_INPUT_EN_VAL@GOTPAGE
Lloh42:
	ldr	x8, [x8, _AR_GPIO_INPUT_EN_VAL@GOTPAGEOFF]
Lloh43:
	ldr	w1, [x8]
Lloh44:
	adrp	x8, _AR_GPIO_JTAG_DISABLE@GOTPAGE
Lloh45:
	ldr	x8, [x8, _AR_GPIO_JTAG_DISABLE@GOTPAGEOFF]
Lloh46:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_REG_SET_BIT
LBB0_25:
	mov	x0, x19
	bl	_AR_SREV_9300_20_OR_LATER
	cbnz	x0, LBB0_27
; %bb.26:
	mov	x0, x19
	bl	_ar9002_hw_enable_async_fifo
LBB0_27:
	mov	x0, x19
	mov	x1, x20
	bl	_ath9k_hw_process_ini
	cbnz	w0, LBB0_53
; %bb.28:
	and	x27, x28, x27
	mov	x0, x19
	mov	x1, x20
	bl	_ath9k_hw_set_rfmode
	mov	x0, x19
	bl	_ath9k_hw_mci_is_enabled
	cbz	x0, LBB0_30
; %bb.29:
	mov	x0, x20
	bl	_IS_CHAN_2GHZ
	mov	x2, x0
	mov	x0, x19
	mov	w1, #0
	mov	x3, x24
	bl	_ar9003_mci_reset
LBB0_30:
	mov	x0, x19
	bl	_AR_SREV_9100
	cbz	x0, LBB0_33
; %bb.31:
	mov	x0, x19
	bl	_ath9k_hw_gettsf64
	cmp	x0, x26
	b.ge	LBB0_33
; %bb.32:
	add	x0, sp, #40
	mov	x1, #0
	bl	_ath9k_hw_get_tsf_offset
	add	x1, x0, x26
	mov	x0, x19
	bl	_ath9k_hw_settsf64
LBB0_33:
	mov	x0, x19
	bl	_ath9k_hw_init_mfp
	mov	x0, x19
	mov	x1, x20
	bl	_ath9k_hw_set_delta_slope
	mov	x0, x19
	mov	x1, x20
	bl	_ath9k_hw_spur_mitigate_freq
	ldr	x8, [x19, #72]
	ldr	x8, [x8]
	mov	x0, x19
	mov	x1, x20
	blr	x8
	mov	x0, x19
	mov	x1, x27
	mov	x2, x25
	bl	_ath9k_hw_reset_opmode
	mov	x0, x19
	mov	x1, x20
	bl	_ath9k_hw_rf_set_freq
	cbnz	w0, LBB0_53
; %bb.34:
	mov	x0, x19
	bl	_ath9k_hw_set_clockrate
	mov	x0, x19
	bl	_ath9k_hw_init_queues
	ldr	w1, [x19, #64]
	mov	x0, x19
	bl	_ath9k_hw_init_interrupt_masks
	mov	x0, x19
	bl	_ath9k_hw_ani_cache_ini_regs
	mov	x0, x19
	bl	_ath9k_hw_init_qos
	ldr	w8, [x19, #60]
Lloh47:
	adrp	x9, _ATH9K_HW_CAP_RFSILENT@GOTPAGE
Lloh48:
	ldr	x9, [x9, _ATH9K_HW_CAP_RFSILENT@GOTPAGEOFF]
Lloh49:
	ldr	w9, [x9]
	tst	w9, w8
	b.eq	LBB0_36
; %bb.35:
	ldr	w1, [x19, #56]
Lloh50:
	adrp	x2, l_.str.1@PAGE
Lloh51:
	add	x2, x2, l_.str.1@PAGEOFF
	mov	x0, x19
	bl	_ath9k_hw_gpio_request_in
LBB0_36:
	mov	x0, x19
	bl	_ath9k_hw_init_global_settings
	mov	x0, x19
	bl	_AR_SREV_9287
	cbz	x0, LBB0_39
; %bb.37:
	mov	x0, x19
	bl	_AR_SREV_9287_13_OR_LATER
	cbz	x0, LBB0_39
; %bb.38:
Lloh52:
	adrp	x8, _AR_MAC_PCU_LOGIC_ANALYZER@GOTPAGE
Lloh53:
	ldr	x8, [x8, _AR_MAC_PCU_LOGIC_ANALYZER@GOTPAGEOFF]
Lloh54:
	ldr	w1, [x8]
Lloh55:
	adrp	x8, _AR_MAC_PCU_LOGIC_ANALYZER_DISBUG20768@GOTPAGE
Lloh56:
	ldr	x8, [x8, _AR_MAC_PCU_LOGIC_ANALYZER_DISBUG20768@GOTPAGEOFF]
Lloh57:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_REG_SET_BIT
Lloh58:
	adrp	x8, _AR_AHB_MODE@GOTPAGE
Lloh59:
	ldr	x8, [x8, _AR_AHB_MODE@GOTPAGEOFF]
Lloh60:
	ldr	w1, [x8]
Lloh61:
	adrp	x8, _AR_AHB_CUSTOM_BURST_EN@GOTPAGE
Lloh62:
	ldr	x8, [x8, _AR_AHB_CUSTOM_BURST_EN@GOTPAGEOFF]
Lloh63:
	ldr	w2, [x8]
Lloh64:
	adrp	x8, _AR_AHB_CUSTOM_BURST_ASYNC_FIFO_VAL@GOTPAGE
Lloh65:
	ldr	x8, [x8, _AR_AHB_CUSTOM_BURST_ASYNC_FIFO_VAL@GOTPAGEOFF]
Lloh66:
	ldr	w3, [x8]
	mov	x0, x19
	bl	_REG_RMW_FIELD
Lloh67:
	adrp	x8, _AR_PCU_MISC_MODE2@GOTPAGE
Lloh68:
	ldr	x8, [x8, _AR_PCU_MISC_MODE2@GOTPAGEOFF]
Lloh69:
	ldr	w1, [x8]
Lloh70:
	adrp	x8, _AR_PCU_MISC_MODE2_ENABLE_AGGWEP@GOTPAGE
Lloh71:
	ldr	x8, [x8, _AR_PCU_MISC_MODE2_ENABLE_AGGWEP@GOTPAGEOFF]
Lloh72:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_REG_SET_BIT
LBB0_39:
	ldr	w1, [x23]
Lloh73:
	adrp	x8, _AR_STA_ID1_PRESERVE_SEQNUM@GOTPAGE
Lloh74:
	ldr	x8, [x8, _AR_STA_ID1_PRESERVE_SEQNUM@GOTPAGEOFF]
Lloh75:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_REG_SET_BIT
	mov	x0, x19
	bl	_ath9k_hw_set_dma
	mov	x0, x19
	bl	_ath9k_hw_mci_is_enabled
	cbnz	x0, LBB0_41
; %bb.40:
Lloh76:
	adrp	x8, _AR_OBS@GOTPAGE
Lloh77:
	ldr	x8, [x8, _AR_OBS@GOTPAGEOFF]
Lloh78:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #8
	bl	_REG_WRITE
LBB0_41:
	mov	x0, x19
	bl	_ENABLE_REG_RMW_BUFFER
	ldr	x8, [x19, #48]
	cbz	x8, LBB0_43
; %bb.42:
Lloh79:
	adrp	x23, _AR_RIMT@GOTPAGE
Lloh80:
	ldr	x23, [x23, _AR_RIMT@GOTPAGEOFF]
	ldr	w1, [x23]
Lloh81:
	adrp	x8, _AR_RIMT_LAST@GOTPAGE
Lloh82:
	ldr	x8, [x8, _AR_RIMT_LAST@GOTPAGEOFF]
Lloh83:
	ldr	w2, [x8]
	ldr	w3, [x19, #24]
	mov	x0, x19
	bl	_REG_RMW_FIELD
	ldr	w1, [x23]
Lloh84:
	adrp	x8, _AR_RIMT_FIRST@GOTPAGE
Lloh85:
	ldr	x8, [x8, _AR_RIMT_FIRST@GOTPAGEOFF]
Lloh86:
	ldr	w2, [x8]
	ldr	w3, [x19, #28]
	mov	x0, x19
	bl	_REG_RMW_FIELD
LBB0_43:
	ldr	x8, [x19, #40]
	cbz	x8, LBB0_45
; %bb.44:
Lloh87:
	adrp	x23, _AR_TIMT@GOTPAGE
Lloh88:
	ldr	x23, [x23, _AR_TIMT@GOTPAGEOFF]
	ldr	w1, [x23]
Lloh89:
	adrp	x8, _AR_TIMT_LAST@GOTPAGE
Lloh90:
	ldr	x8, [x8, _AR_TIMT_LAST@GOTPAGEOFF]
Lloh91:
	ldr	w2, [x8]
	mov	x0, x19
	mov	w3, #300
	bl	_REG_RMW_FIELD
	ldr	w1, [x23]
Lloh92:
	adrp	x8, _AR_TIMT_FIRST@GOTPAGE
Lloh93:
	ldr	x8, [x8, _AR_TIMT_FIRST@GOTPAGEOFF]
Lloh94:
	ldr	w2, [x8]
	mov	x0, x19
	mov	w3, #750
	bl	_REG_RMW_FIELD
LBB0_45:
	mov	x0, x19
	bl	_REG_RMW_BUFFER_FLUSH
	mov	x0, x19
	mov	x1, x20
	bl	_ath9k_hw_init_bb
	cbz	x22, LBB0_47
; %bb.46:
Lloh95:
	adrp	x8, _TXIQCAL_DONE@GOTPAGE
Lloh96:
	ldr	x8, [x8, _TXIQCAL_DONE@GOTPAGEOFF]
Lloh97:
	ldr	w0, [x8]
	add	x24, x22, #16
	mov	x1, x24
	bl	_clear_bit
Lloh98:
	adrp	x8, _TXCLCAL_DONE@GOTPAGE
Lloh99:
	ldr	x8, [x8, _TXCLCAL_DONE@GOTPAGEOFF]
Lloh100:
	ldr	w0, [x8]
	mov	x1, x24
	bl	_clear_bit
LBB0_47:
	mov	x0, x19
	mov	x1, x20
	bl	_ath9k_hw_init_cal
	cbz	w0, LBB0_50
; %bb.48:
	mov	x0, x19
	bl	_ath9k_hw_mci_is_enabled
	cbz	x0, LBB0_54
; %bb.49:
	mov	x0, x19
	mov	x1, x20
	mov	x2, x22
	bl	_ar9003_mci_end_reset
	cbz	x0, LBB0_54
LBB0_50:
Lloh101:
	adrp	x8, _EIO@GOTPAGE
Lloh102:
	ldr	x8, [x8, _EIO@GOTPAGEOFF]
	b	LBB0_52
LBB0_51:
Lloh103:
	adrp	x1, l_.str@PAGE
Lloh104:
	add	x1, x1, l_.str@PAGEOFF
	mov	x0, x21
	bl	_ath_err
Lloh105:
	adrp	x8, _EINVAL@GOTPAGE
Lloh106:
	ldr	x8, [x8, _EINVAL@GOTPAGEOFF]
LBB0_52:
	ldr	w8, [x8]
	neg	w0, w8
LBB0_53:
	ldp	x29, x30, [sp, #128]            ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #112]            ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #96]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #80]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #64]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp, #48]             ; 16-byte Folded Reload
	add	sp, sp, #144
	ret
LBB0_54:
	ldp	x9, x8, [sp, #16]               ; 16-byte Folded Reload
	orr	x8, x9, x8
	ldr	x9, [sp, #8]                    ; 8-byte Folded Reload
	orr	x8, x8, x9
	ldr	x9, [sp]                        ; 8-byte Folded Reload
	orr	x8, x8, x9
	ldr	x9, [sp, #32]                   ; 8-byte Folded Reload
	and	x22, x8, x9
	mov	x0, x19
	bl	_ENABLE_REGWRITE_BUFFER
	mov	x0, x19
	bl	_ath9k_hw_restore_chainmask
Lloh107:
	adrp	x8, _AR_CFG_LED@GOTPAGE
Lloh108:
	ldr	x8, [x8, _AR_CFG_LED@GOTPAGEOFF]
Lloh109:
	ldr	w1, [x8]
Lloh110:
	adrp	x8, _AR_CFG_SCLK_32KHZ@GOTPAGE
Lloh111:
	ldr	x8, [x8, _AR_CFG_SCLK_32KHZ@GOTPAGEOFF]
Lloh112:
	ldr	x8, [x8]
	orr	x2, x8, x22
	mov	x0, x19
	bl	_REG_WRITE
	mov	x0, x19
	bl	_REGWRITE_BUFFER_FLUSH
	mov	x0, x19
	bl	_ath9k_hw_gen_timer_start_tsf2
	mov	x0, x19
	bl	_ath9k_hw_init_desc
	mov	x0, x19
	bl	_ath9k_hw_btcoex_is_enabled
	cbz	x0, LBB0_56
; %bb.55:
	mov	x0, x19
	bl	_ath9k_hw_btcoex_enable
LBB0_56:
	mov	x0, x19
	bl	_ath9k_hw_mci_is_enabled
	cbz	x0, LBB0_58
; %bb.57:
	mov	x0, x19
	bl	_ar9003_mci_check_bt
LBB0_58:
	mov	x0, x19
	bl	_AR_SREV_9300_20_OR_LATER
	cbz	x0, LBB0_60
; %bb.59:
	mov	x0, x19
	mov	x1, x20
	bl	_ath9k_hw_loadnf
	mov	x0, x19
	mov	w1, #1
	bl	_ath9k_hw_start_nfcal
LBB0_60:
	mov	x0, x19
	bl	_AR_SREV_9300_20_OR_LATER
	cbz	x0, LBB0_62
; %bb.61:
	mov	x0, x19
	bl	_ar9003_hw_bb_watchdog_config
LBB0_62:
	ldr	w8, [x19, #32]
Lloh113:
	adrp	x9, _HW_PHYRESTART_CLC_WAR@GOTPAGE
Lloh114:
	ldr	x9, [x9, _HW_PHYRESTART_CLC_WAR@GOTPAGEOFF]
Lloh115:
	ldr	w9, [x9]
	tst	w9, w8
	b.eq	LBB0_64
; %bb.63:
	mov	x0, x19
	bl	_ar9003_hw_disable_phy_restart
LBB0_64:
	mov	x0, x19
	bl	_ath9k_hw_apply_gpio_override
	mov	x0, x19
	bl	_AR_SREV_9565
	cbz	x0, LBB0_67
; %bb.65:
	ldr	x8, [x21]
	cbz	x8, LBB0_67
; %bb.66:
Lloh116:
	adrp	x8, _AR_BTCOEX_WL_LNADIV@GOTPAGE
Lloh117:
	ldr	x8, [x8, _AR_BTCOEX_WL_LNADIV@GOTPAGEOFF]
Lloh118:
	ldr	w1, [x8]
Lloh119:
	adrp	x8, _AR_BTCOEX_WL_LNADIV_FORCE_ON@GOTPAGE
Lloh120:
	ldr	x8, [x8, _AR_BTCOEX_WL_LNADIV_FORCE_ON@GOTPAGEOFF]
Lloh121:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_REG_SET_BIT
LBB0_67:
	ldr	x8, [x19, #16]
	ldr	x8, [x8]
	cbz	x8, LBB0_2
; %bb.68:
	mov	x0, x20
	bl	_IS_CHAN_HT40
	str	w0, [x19, #12]
	mov	x0, x19
	bl	_ath9k_hw_set_radar_params
	b	LBB0_2
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh26, Lloh27, Lloh28
	.loh AdrpLdrGotLdr	Lloh23, Lloh24, Lloh25
	.loh AdrpLdrGotLdr	Lloh20, Lloh21, Lloh22
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh19
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh16
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpLdrGot	Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh32, Lloh33, Lloh34
	.loh AdrpLdrGotLdr	Lloh29, Lloh30, Lloh31
	.loh AdrpLdrGotLdr	Lloh38, Lloh39, Lloh40
	.loh AdrpLdrGotLdr	Lloh35, Lloh36, Lloh37
	.loh AdrpLdrGotLdr	Lloh44, Lloh45, Lloh46
	.loh AdrpLdrGotLdr	Lloh41, Lloh42, Lloh43
	.loh AdrpLdrGotLdr	Lloh47, Lloh48, Lloh49
	.loh AdrpAdd	Lloh50, Lloh51
	.loh AdrpLdrGotLdr	Lloh70, Lloh71, Lloh72
	.loh AdrpLdrGotLdr	Lloh67, Lloh68, Lloh69
	.loh AdrpLdrGotLdr	Lloh64, Lloh65, Lloh66
	.loh AdrpLdrGotLdr	Lloh61, Lloh62, Lloh63
	.loh AdrpLdrGotLdr	Lloh58, Lloh59, Lloh60
	.loh AdrpLdrGotLdr	Lloh55, Lloh56, Lloh57
	.loh AdrpLdrGotLdr	Lloh52, Lloh53, Lloh54
	.loh AdrpLdrGotLdr	Lloh73, Lloh74, Lloh75
	.loh AdrpLdrGotLdr	Lloh76, Lloh77, Lloh78
	.loh AdrpLdrGotLdr	Lloh84, Lloh85, Lloh86
	.loh AdrpLdrGotLdr	Lloh81, Lloh82, Lloh83
	.loh AdrpLdrGot	Lloh79, Lloh80
	.loh AdrpLdrGotLdr	Lloh92, Lloh93, Lloh94
	.loh AdrpLdrGotLdr	Lloh89, Lloh90, Lloh91
	.loh AdrpLdrGot	Lloh87, Lloh88
	.loh AdrpLdrGotLdr	Lloh98, Lloh99, Lloh100
	.loh AdrpLdrGotLdr	Lloh95, Lloh96, Lloh97
	.loh AdrpLdrGot	Lloh101, Lloh102
	.loh AdrpLdrGot	Lloh105, Lloh106
	.loh AdrpAdd	Lloh103, Lloh104
	.loh AdrpLdrGotLdr	Lloh110, Lloh111, Lloh112
	.loh AdrpLdrGotLdr	Lloh107, Lloh108, Lloh109
	.loh AdrpLdrGotLdr	Lloh113, Lloh114, Lloh115
	.loh AdrpLdrGotLdr	Lloh119, Lloh120, Lloh121
	.loh AdrpLdrGotLdr	Lloh116, Lloh117, Lloh118
	.cfi_endproc
                                        ; -- End function
	.comm	_ATH9K_PM_AWAKE,4,2             ; @ATH9K_PM_AWAKE
	.comm	_EIO,4,2                        ; @EIO
	.comm	_PAPRD_PACKET_SENT,4,2          ; @PAPRD_PACKET_SENT
	.comm	_AR_DEF_ANTENNA,4,2             ; @AR_DEF_ANTENNA
	.comm	_AR_STA_ID1,4,2                 ; @AR_STA_ID1
	.comm	_AR_STA_ID1_BASE_RATE_11B,8,3   ; @AR_STA_ID1_BASE_RATE_11B
	.comm	_AR_CFG_LED,4,2                 ; @AR_CFG_LED
	.comm	_AR_CFG_LED_ASSOC_CTL,8,3       ; @AR_CFG_LED_ASSOC_CTL
	.comm	_AR_CFG_LED_MODE_SEL,8,3        ; @AR_CFG_LED_MODE_SEL
	.comm	_AR_CFG_LED_BLINK_THRESH_SEL,8,3 ; @AR_CFG_LED_BLINK_THRESH_SEL
	.comm	_AR_CFG_LED_BLINK_SLOW,8,3      ; @AR_CFG_LED_BLINK_SLOW
	.comm	_AR9271_RESET_POWER_DOWN_CONTROL,4,2 ; @AR9271_RESET_POWER_DOWN_CONTROL
	.comm	_AR9271_RADIO_RF_RST,8,3        ; @AR9271_RADIO_RF_RST
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"Chip reset failed\n"

	.comm	_EINVAL,4,2                     ; @EINVAL
	.comm	_AR9271_GATE_MAC_CTL,8,3        ; @AR9271_GATE_MAC_CTL
	.comm	_AR_GPIO_INPUT_EN_VAL,4,2       ; @AR_GPIO_INPUT_EN_VAL
	.comm	_AR_GPIO_JTAG_DISABLE,4,2       ; @AR_GPIO_JTAG_DISABLE
	.comm	_ATH9K_HW_CAP_RFSILENT,4,2      ; @ATH9K_HW_CAP_RFSILENT
l_.str.1:                               ; @.str.1
	.asciz	"ath9k-rfkill"

	.comm	_AR_MAC_PCU_LOGIC_ANALYZER,4,2  ; @AR_MAC_PCU_LOGIC_ANALYZER
	.comm	_AR_MAC_PCU_LOGIC_ANALYZER_DISBUG20768,4,2 ; @AR_MAC_PCU_LOGIC_ANALYZER_DISBUG20768
	.comm	_AR_AHB_MODE,4,2                ; @AR_AHB_MODE
	.comm	_AR_AHB_CUSTOM_BURST_EN,4,2     ; @AR_AHB_CUSTOM_BURST_EN
	.comm	_AR_AHB_CUSTOM_BURST_ASYNC_FIFO_VAL,4,2 ; @AR_AHB_CUSTOM_BURST_ASYNC_FIFO_VAL
	.comm	_AR_PCU_MISC_MODE2,4,2          ; @AR_PCU_MISC_MODE2
	.comm	_AR_PCU_MISC_MODE2_ENABLE_AGGWEP,4,2 ; @AR_PCU_MISC_MODE2_ENABLE_AGGWEP
	.comm	_AR_STA_ID1_PRESERVE_SEQNUM,4,2 ; @AR_STA_ID1_PRESERVE_SEQNUM
	.comm	_AR_OBS,4,2                     ; @AR_OBS
	.comm	_AR_RIMT,4,2                    ; @AR_RIMT
	.comm	_AR_RIMT_LAST,4,2               ; @AR_RIMT_LAST
	.comm	_AR_RIMT_FIRST,4,2              ; @AR_RIMT_FIRST
	.comm	_AR_TIMT,4,2                    ; @AR_TIMT
	.comm	_AR_TIMT_LAST,4,2               ; @AR_TIMT_LAST
	.comm	_AR_TIMT_FIRST,4,2              ; @AR_TIMT_FIRST
	.comm	_TXIQCAL_DONE,4,2               ; @TXIQCAL_DONE
	.comm	_TXCLCAL_DONE,4,2               ; @TXCLCAL_DONE
	.comm	_AR_CFG_SCLK_32KHZ,8,3          ; @AR_CFG_SCLK_32KHZ
	.comm	_HW_PHYRESTART_CLC_WAR,4,2      ; @HW_PHYRESTART_CLC_WAR
	.comm	_AR_BTCOEX_WL_LNADIV,4,2        ; @AR_BTCOEX_WL_LNADIV
	.comm	_AR_BTCOEX_WL_LNADIV_FORCE_ON,4,2 ; @AR_BTCOEX_WL_LNADIV_FORCE_ON
.subsections_via_symbols
