	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function dr_actions_apply_tx
_dr_actions_apply_tx:                   ## @dr_actions_apply_tx
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$40, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rcx, %rbx
	movq	%rdx, %r15
	movq	%rsi, %r14
	movq	%rdi, -72(%rbp)                 ## 8-byte Spill
	movq	%rdx, -48(%rbp)
	movq	_DR_ACTION_TYP_L2_TO_TNL_L2@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	movb	$1, %r13b
	cmpq	$0, (%rsi,%rax,8)
	jne	LBB0_2
## %bb.1:
	movq	_DR_ACTION_TYP_L2_TO_TNL_L3@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	cmpq	$0, (%r14,%rax,8)
	setne	%r13b
LBB0_2:
	movq	%r8, -56(%rbp)                  ## 8-byte Spill
	movq	_DR_ACTION_TYP_MODIFY_HDR@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	cmpq	$0, (%r14,%rax,8)
	je	LBB0_4
## %bb.3:
	movq	_MLX5DR_STE_TYPE_MODIFY_PKT@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r15, %rdi
	callq	_mlx5dr_ste_set_entry_type
	movl	32(%rbx), %edx
	movl	36(%rbx), %esi
	movq	%r15, %rdi
	callq	_mlx5dr_ste_set_rewrite_actions
LBB0_4:
	movzbl	%r13b, %r13d
	movq	_DR_ACTION_TYP_PUSH_VLAN@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	movq	%r14, -64(%rbp)                 ## 8-byte Spill
	cmpq	$0, (%r14,%rax,8)
	je	LBB0_11
## %bb.5:
	cmpl	$0, 16(%rbx)
	jle	LBB0_11
## %bb.6:
	movq	_DR_ACTION_TYP_MODIFY_HDR@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	movq	-64(%rbp), %rcx                 ## 8-byte Reload
	cmpq	$0, (%rcx,%rax,8)
	je	LBB0_8
## %bb.7:
	movq	_MLX5DR_STE_TYPE_TX@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movl	12(%rbx), %ecx
	leaq	-48(%rbp), %rdi
	movq	-56(%rbp), %rsi                 ## 8-byte Reload
	callq	_dr_actions_init_next_ste
	movq	-48(%rbp), %r15
LBB0_8:
	movq	24(%rbx), %rax
	movl	(%rax), %esi
	movq	%r15, %rdi
	movl	%r13d, %edx
	callq	_mlx5dr_ste_set_tx_push_vlan
	cmpl	$2, 16(%rbx)
	movq	-56(%rbp), %r12                 ## 8-byte Reload
	jl	LBB0_11
## %bb.9:
	movl	$1, %r14d
	leaq	-48(%rbp), %r15
	.p2align	4, 0x90
LBB0_10:                                ## =>This Inner Loop Header: Depth=1
	movq	_MLX5DR_STE_TYPE_TX@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movl	12(%rbx), %ecx
	movq	%r15, %rdi
	movq	%r12, %rsi
	callq	_dr_actions_init_next_ste
	movq	-48(%rbp), %rdi
	movq	24(%rbx), %rax
	movl	(%rax,%r14,4), %esi
	movl	%r13d, %edx
	callq	_mlx5dr_ste_set_tx_push_vlan
	incq	%r14
	movslq	16(%rbx), %rax
	cmpq	%rax, %r14
	jl	LBB0_10
LBB0_11:
	testl	%r13d, %r13d
	movq	-64(%rbp), %r14                 ## 8-byte Reload
	je	LBB0_17
## %bb.12:
	movq	_DR_ACTION_TYP_MODIFY_HDR@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	cmpq	$0, (%r14,%rax,8)
	jne	LBB0_14
## %bb.13:
	movq	_DR_ACTION_TYP_PUSH_VLAN@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	cmpq	$0, (%r14,%rax,8)
	je	LBB0_15
LBB0_14:
	movq	_MLX5DR_STE_TYPE_TX@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movl	12(%rbx), %ecx
	leaq	-48(%rbp), %rdi
	movq	-56(%rbp), %rsi                 ## 8-byte Reload
	callq	_dr_actions_init_next_ste
LBB0_15:
	movq	-48(%rbp), %rdi
	movl	4(%rbx), %edx
	movl	8(%rbx), %esi
	movq	_DR_ACTION_TYP_L2_TO_TNL_L3@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	movq	(%r14,%rax,8), %rcx
	callq	_mlx5dr_ste_set_tx_encap
	movq	-72(%rbp), %rax                 ## 8-byte Reload
	movl	(%rax), %edi
	movq	_prio_tag_required@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_MLX5_CAP_GEN
	testq	%rax, %rax
	je	LBB0_17
## %bb.16:
	movq	-48(%rbp), %rdi
	callq	_mlx5dr_ste_set_go_back_bit
LBB0_17:
	movq	_DR_ACTION_TYP_CTR@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	cmpq	$0, (%r14,%rax,8)
	je	LBB0_19
## %bb.18:
	movq	-48(%rbp), %rdi
	movl	(%rbx), %esi
	callq	_mlx5dr_ste_set_counter_id
LBB0_19:
	addq	$40, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_DR_ACTION_TYP_L2_TO_TNL_L2,8,3 ## @DR_ACTION_TYP_L2_TO_TNL_L2
	.comm	_DR_ACTION_TYP_L2_TO_TNL_L3,8,3 ## @DR_ACTION_TYP_L2_TO_TNL_L3
	.comm	_DR_ACTION_TYP_MODIFY_HDR,8,3   ## @DR_ACTION_TYP_MODIFY_HDR
	.comm	_MLX5DR_STE_TYPE_MODIFY_PKT,4,2 ## @MLX5DR_STE_TYPE_MODIFY_PKT
	.comm	_DR_ACTION_TYP_PUSH_VLAN,8,3    ## @DR_ACTION_TYP_PUSH_VLAN
	.comm	_MLX5DR_STE_TYPE_TX,4,2         ## @MLX5DR_STE_TYPE_TX
	.comm	_prio_tag_required,4,2          ## @prio_tag_required
	.comm	_DR_ACTION_TYP_CTR,8,3          ## @DR_ACTION_TYP_CTR
	.no_dead_strip	_dr_actions_apply_tx
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function dr_actions_apply_tx
_dr_actions_apply_tx:                   ; @dr_actions_apply_tx
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #112
	.cfi_def_cfa_offset 112
	stp	x28, x27, [sp, #16]             ; 16-byte Folded Spill
	stp	x26, x25, [sp, #32]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #48]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #64]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #80]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #96]             ; 16-byte Folded Spill
	add	x29, sp, #96
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	mov	x22, x4
	mov	x19, x3
	mov	x24, x2
	mov	x20, x1
	mov	x21, x0
	str	x2, [sp, #8]
Lloh0:
	adrp	x8, _DR_ACTION_TYP_L2_TO_TNL_L2@GOTPAGE
Lloh1:
	ldr	x8, [x8, _DR_ACTION_TYP_L2_TO_TNL_L2@GOTPAGEOFF]
Lloh2:
	ldr	x8, [x8]
	ldr	x8, [x1, x8, lsl #3]
	cbz	x8, LBB0_2
; %bb.1:
	mov	w23, #1
	b	LBB0_3
LBB0_2:
Lloh3:
	adrp	x8, _DR_ACTION_TYP_L2_TO_TNL_L3@GOTPAGE
Lloh4:
	ldr	x8, [x8, _DR_ACTION_TYP_L2_TO_TNL_L3@GOTPAGEOFF]
Lloh5:
	ldr	x8, [x8]
	ldr	x8, [x20, x8, lsl #3]
	cmp	x8, #0
	cset	w23, ne
LBB0_3:
Lloh6:
	adrp	x25, _DR_ACTION_TYP_MODIFY_HDR@GOTPAGE
Lloh7:
	ldr	x25, [x25, _DR_ACTION_TYP_MODIFY_HDR@GOTPAGEOFF]
	ldr	x8, [x25]
	ldr	x8, [x20, x8, lsl #3]
	cbz	x8, LBB0_5
; %bb.4:
Lloh8:
	adrp	x8, _MLX5DR_STE_TYPE_MODIFY_PKT@GOTPAGE
Lloh9:
	ldr	x8, [x8, _MLX5DR_STE_TYPE_MODIFY_PKT@GOTPAGEOFF]
Lloh10:
	ldr	w1, [x8]
	mov	x0, x24
	bl	_mlx5dr_ste_set_entry_type
	ldp	w2, w1, [x19, #32]
	mov	x0, x24
	bl	_mlx5dr_ste_set_rewrite_actions
LBB0_5:
Lloh11:
	adrp	x26, _DR_ACTION_TYP_PUSH_VLAN@GOTPAGE
Lloh12:
	ldr	x26, [x26, _DR_ACTION_TYP_PUSH_VLAN@GOTPAGEOFF]
	ldr	x8, [x26]
	ldr	x8, [x20, x8, lsl #3]
	cbz	x8, LBB0_12
; %bb.6:
	ldr	w8, [x19, #16]
	cmp	w8, #1
	b.lt	LBB0_12
; %bb.7:
	ldr	x8, [x25]
	ldr	x8, [x20, x8, lsl #3]
Lloh13:
	adrp	x27, _MLX5DR_STE_TYPE_TX@GOTPAGE
Lloh14:
	ldr	x27, [x27, _MLX5DR_STE_TYPE_TX@GOTPAGEOFF]
	cbz	x8, LBB0_9
; %bb.8:
	ldr	w2, [x27]
	ldr	w3, [x19, #12]
	add	x0, sp, #8
	mov	x1, x22
	bl	_dr_actions_init_next_ste
	ldr	x24, [sp, #8]
LBB0_9:
	ldr	x8, [x19, #24]
	ldr	w1, [x8]
	mov	x0, x24
	mov	x2, x23
	bl	_mlx5dr_ste_set_tx_push_vlan
	ldr	w8, [x19, #16]
	cmp	w8, #2
	b.lt	LBB0_12
; %bb.10:
	mov	w24, #1
LBB0_11:                                ; =>This Inner Loop Header: Depth=1
	ldr	w2, [x27]
	ldr	w3, [x19, #12]
	add	x0, sp, #8
	mov	x1, x22
	bl	_dr_actions_init_next_ste
	ldr	x0, [sp, #8]
	ldr	x8, [x19, #24]
	ldr	w1, [x8, x24, lsl #2]
	mov	x2, x23
	bl	_mlx5dr_ste_set_tx_push_vlan
	add	x24, x24, #1
	ldrsw	x8, [x19, #16]
	cmp	x24, x8
	b.lt	LBB0_11
LBB0_12:
	cbz	w23, LBB0_18
; %bb.13:
	ldr	x8, [x25]
	ldr	x8, [x20, x8, lsl #3]
	cbnz	x8, LBB0_15
; %bb.14:
	ldr	x8, [x26]
	ldr	x8, [x20, x8, lsl #3]
	cbz	x8, LBB0_16
LBB0_15:
Lloh15:
	adrp	x8, _MLX5DR_STE_TYPE_TX@GOTPAGE
Lloh16:
	ldr	x8, [x8, _MLX5DR_STE_TYPE_TX@GOTPAGEOFF]
Lloh17:
	ldr	w2, [x8]
	ldr	w3, [x19, #12]
	add	x0, sp, #8
	mov	x1, x22
	bl	_dr_actions_init_next_ste
LBB0_16:
	ldr	x0, [sp, #8]
	ldp	w2, w1, [x19, #4]
Lloh18:
	adrp	x8, _DR_ACTION_TYP_L2_TO_TNL_L3@GOTPAGE
Lloh19:
	ldr	x8, [x8, _DR_ACTION_TYP_L2_TO_TNL_L3@GOTPAGEOFF]
Lloh20:
	ldr	x8, [x8]
	ldr	x3, [x20, x8, lsl #3]
	bl	_mlx5dr_ste_set_tx_encap
	ldr	w0, [x21]
Lloh21:
	adrp	x8, _prio_tag_required@GOTPAGE
Lloh22:
	ldr	x8, [x8, _prio_tag_required@GOTPAGEOFF]
Lloh23:
	ldr	w1, [x8]
	bl	_MLX5_CAP_GEN
	cbz	x0, LBB0_18
; %bb.17:
	ldr	x0, [sp, #8]
	bl	_mlx5dr_ste_set_go_back_bit
LBB0_18:
Lloh24:
	adrp	x8, _DR_ACTION_TYP_CTR@GOTPAGE
Lloh25:
	ldr	x8, [x8, _DR_ACTION_TYP_CTR@GOTPAGEOFF]
Lloh26:
	ldr	x8, [x8]
	ldr	x8, [x20, x8, lsl #3]
	cbz	x8, LBB0_20
; %bb.19:
	ldr	x0, [sp, #8]
	ldr	w1, [x19]
	bl	_mlx5dr_ste_set_counter_id
LBB0_20:
	ldp	x29, x30, [sp, #96]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #80]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #64]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #48]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #32]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #112
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGot	Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGot	Lloh11, Lloh12
	.loh AdrpLdrGot	Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.cfi_endproc
                                        ; -- End function
	.comm	_DR_ACTION_TYP_L2_TO_TNL_L2,8,3 ; @DR_ACTION_TYP_L2_TO_TNL_L2
	.comm	_DR_ACTION_TYP_L2_TO_TNL_L3,8,3 ; @DR_ACTION_TYP_L2_TO_TNL_L3
	.comm	_DR_ACTION_TYP_MODIFY_HDR,8,3   ; @DR_ACTION_TYP_MODIFY_HDR
	.comm	_MLX5DR_STE_TYPE_MODIFY_PKT,4,2 ; @MLX5DR_STE_TYPE_MODIFY_PKT
	.comm	_DR_ACTION_TYP_PUSH_VLAN,8,3    ; @DR_ACTION_TYP_PUSH_VLAN
	.comm	_MLX5DR_STE_TYPE_TX,4,2         ; @MLX5DR_STE_TYPE_TX
	.comm	_prio_tag_required,4,2          ; @prio_tag_required
	.comm	_DR_ACTION_TYP_CTR,8,3          ; @DR_ACTION_TYP_CTR
	.no_dead_strip	_dr_actions_apply_tx
.subsections_via_symbols
