	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function hisi_femac_port_init
_hisi_femac_port_init:                  ## @hisi_femac_port_init
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r14
	pushq	%rbx
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	movq	%rdi, %rbx
	movq	_MAC_PORTSEL_STAT_CPU@GOTPCREL(%rip), %rax
	movq	16(%rdi), %rcx
	movq	(%rcx), %rcx
	movq	(%rcx), %rcx
	movq	_PHY_INTERFACE_MODE_RMII@GOTPCREL(%rip), %rdx
	xorl	%edi, %edi
	cmpq	(%rdx), %rcx
	jne	LBB0_2
## %bb.1:
	movq	_MAC_PORTSEL_RMII@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edi
LBB0_2:
	orl	(%rax), %edi
	movq	_MAC_PORTSEL@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	addq	(%rbx), %rsi
	callq	_writel
	movq	_IRQ_ENA_PORT0_MASK@GOTPCREL(%rip), %r14
	movl	(%r14), %edi
	movq	_GLB_IRQ_RAW@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	addq	8(%rbx), %rsi
	callq	_writel
	movq	_IRQ_ENA_PORT0@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	orl	(%r14), %esi
	movq	%rbx, %rdi
	callq	_hisi_femac_irq_disable
	movq	_GLB_FWCTRL@GOTPCREL(%rip), %r14
	movq	(%r14), %rdi
	addq	8(%rbx), %rdi
	callq	_readl
	movq	_FWCTRL_VLAN_ENABLE@GOTPCREL(%rip), %rcx
	movq	_FWCTRL_FWALL2CPU@GOTPCREL(%rip), %rdx
	movl	(%rdx), %edi
	orl	(%rcx), %edi
	notl	%edi
	andl	%eax, %edi
	movq	_FWCTRL_FW2CPU_ENA@GOTPCREL(%rip), %rax
	orl	(%rax), %edi
	movq	(%r14), %rsi
	addq	8(%rbx), %rsi
	callq	_writel
	movq	_GLB_MACTCTRL@GOTPCREL(%rip), %r14
	movq	(%r14), %rdi
	addq	8(%rbx), %rdi
	callq	_readl
	movq	_MACTCTRL_BROAD2CPU@GOTPCREL(%rip), %rcx
	movq	_MACTCTRL_MACT_ENA@GOTPCREL(%rip), %rdx
	orl	(%rcx), %eax
	orl	(%rdx), %eax
	movq	(%r14), %rsi
	addq	8(%rbx), %rsi
	movl	%eax, %edi
	callq	_writel
	movq	_MAC_SET@GOTPCREL(%rip), %r14
	movq	(%r14), %rdi
	addq	(%rbx), %rdi
	callq	_readl
	movq	_MAX_FRAME_SIZE_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edi
	notl	%edi
	andl	%eax, %edi
	movq	_MAX_FRAME_SIZE@GOTPCREL(%rip), %rax
	orl	(%rax), %edi
	movq	(%r14), %rsi
	addq	(%rbx), %rsi
	callq	_writel
	movq	_RX_COALESCED_FRAMES@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_RX_COALESCED_FRAME_OFFSET@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	shll	%cl, %edi
	movq	_RX_COALESCED_TIMER@GOTPCREL(%rip), %rax
	orl	(%rax), %edi
	movq	_RX_COALESCE_SET@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	addq	(%rbx), %rsi
	callq	_writel
	movq	_HW_RX_FIFO_DEPTH@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_RX_DEPTH_OFFSET@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	shll	%cl, %edi
	movq	_HW_TX_FIFO_DEPTH@GOTPCREL(%rip), %rax
	orl	(%rax), %edi
	movq	_QLEN_SET@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	addq	(%rbx), %rsi
	popq	%rbx
	popq	%r14
	popq	%rbp
	jmp	_writel                         ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_MAC_PORTSEL_STAT_CPU,4,2       ## @MAC_PORTSEL_STAT_CPU
	.comm	_PHY_INTERFACE_MODE_RMII,8,3    ## @PHY_INTERFACE_MODE_RMII
	.comm	_MAC_PORTSEL_RMII,4,2           ## @MAC_PORTSEL_RMII
	.comm	_MAC_PORTSEL,8,3                ## @MAC_PORTSEL
	.comm	_IRQ_ENA_PORT0_MASK,4,2         ## @IRQ_ENA_PORT0_MASK
	.comm	_GLB_IRQ_RAW,8,3                ## @GLB_IRQ_RAW
	.comm	_IRQ_ENA_PORT0,4,2              ## @IRQ_ENA_PORT0
	.comm	_GLB_FWCTRL,8,3                 ## @GLB_FWCTRL
	.comm	_FWCTRL_VLAN_ENABLE,4,2         ## @FWCTRL_VLAN_ENABLE
	.comm	_FWCTRL_FWALL2CPU,4,2           ## @FWCTRL_FWALL2CPU
	.comm	_FWCTRL_FW2CPU_ENA,4,2          ## @FWCTRL_FW2CPU_ENA
	.comm	_GLB_MACTCTRL,8,3               ## @GLB_MACTCTRL
	.comm	_MACTCTRL_BROAD2CPU,4,2         ## @MACTCTRL_BROAD2CPU
	.comm	_MACTCTRL_MACT_ENA,4,2          ## @MACTCTRL_MACT_ENA
	.comm	_MAC_SET,8,3                    ## @MAC_SET
	.comm	_MAX_FRAME_SIZE_MASK,4,2        ## @MAX_FRAME_SIZE_MASK
	.comm	_MAX_FRAME_SIZE,4,2             ## @MAX_FRAME_SIZE
	.comm	_RX_COALESCED_TIMER,4,2         ## @RX_COALESCED_TIMER
	.comm	_RX_COALESCED_FRAMES,4,2        ## @RX_COALESCED_FRAMES
	.comm	_RX_COALESCED_FRAME_OFFSET,4,2  ## @RX_COALESCED_FRAME_OFFSET
	.comm	_RX_COALESCE_SET,8,3            ## @RX_COALESCE_SET
	.comm	_HW_RX_FIFO_DEPTH,4,2           ## @HW_RX_FIFO_DEPTH
	.comm	_RX_DEPTH_OFFSET,4,2            ## @RX_DEPTH_OFFSET
	.comm	_HW_TX_FIFO_DEPTH,4,2           ## @HW_TX_FIFO_DEPTH
	.comm	_QLEN_SET,8,3                   ## @QLEN_SET
	.no_dead_strip	_hisi_femac_port_init
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function hisi_femac_port_init
_hisi_femac_port_init:                  ; @hisi_femac_port_init
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x19, x0
Lloh0:
	adrp	x8, _MAC_PORTSEL_STAT_CPU@GOTPAGE
Lloh1:
	ldr	x8, [x8, _MAC_PORTSEL_STAT_CPU@GOTPAGEOFF]
Lloh2:
	ldr	w8, [x8]
	ldr	x9, [x0, #16]
	ldr	x9, [x9]
	ldr	x9, [x9]
Lloh3:
	adrp	x10, _PHY_INTERFACE_MODE_RMII@GOTPAGE
Lloh4:
	ldr	x10, [x10, _PHY_INTERFACE_MODE_RMII@GOTPAGEOFF]
Lloh5:
	ldr	x10, [x10]
Lloh6:
	adrp	x11, _MAC_PORTSEL_RMII@GOTPAGE
Lloh7:
	ldr	x11, [x11, _MAC_PORTSEL_RMII@GOTPAGEOFF]
Lloh8:
	ldr	w11, [x11]
	cmp	x9, x10
	csel	w9, w11, wzr, eq
	orr	w0, w9, w8
	ldr	x8, [x19]
Lloh9:
	adrp	x9, _MAC_PORTSEL@GOTPAGE
Lloh10:
	ldr	x9, [x9, _MAC_PORTSEL@GOTPAGEOFF]
Lloh11:
	ldr	x9, [x9]
	add	x1, x9, x8
	bl	_writel
Lloh12:
	adrp	x20, _IRQ_ENA_PORT0_MASK@GOTPAGE
Lloh13:
	ldr	x20, [x20, _IRQ_ENA_PORT0_MASK@GOTPAGEOFF]
	ldr	w0, [x20]
	ldr	x8, [x19, #8]
Lloh14:
	adrp	x9, _GLB_IRQ_RAW@GOTPAGE
Lloh15:
	ldr	x9, [x9, _GLB_IRQ_RAW@GOTPAGEOFF]
Lloh16:
	ldr	x9, [x9]
	add	x1, x9, x8
	bl	_writel
	ldr	w8, [x20]
Lloh17:
	adrp	x9, _IRQ_ENA_PORT0@GOTPAGE
Lloh18:
	ldr	x9, [x9, _IRQ_ENA_PORT0@GOTPAGEOFF]
Lloh19:
	ldr	w9, [x9]
	orr	w1, w9, w8
	mov	x0, x19
	bl	_hisi_femac_irq_disable
	ldr	x8, [x19, #8]
Lloh20:
	adrp	x20, _GLB_FWCTRL@GOTPAGE
Lloh21:
	ldr	x20, [x20, _GLB_FWCTRL@GOTPAGEOFF]
	ldr	x9, [x20]
	add	x0, x9, x8
	bl	_readl
Lloh22:
	adrp	x8, _FWCTRL_VLAN_ENABLE@GOTPAGE
Lloh23:
	ldr	x8, [x8, _FWCTRL_VLAN_ENABLE@GOTPAGEOFF]
Lloh24:
	ldr	w8, [x8]
Lloh25:
	adrp	x9, _FWCTRL_FWALL2CPU@GOTPAGE
Lloh26:
	ldr	x9, [x9, _FWCTRL_FWALL2CPU@GOTPAGEOFF]
Lloh27:
	ldr	w9, [x9]
	orr	w8, w9, w8
Lloh28:
	adrp	x9, _FWCTRL_FW2CPU_ENA@GOTPAGE
Lloh29:
	ldr	x9, [x9, _FWCTRL_FW2CPU_ENA@GOTPAGEOFF]
	bic	w8, w0, w8
Lloh30:
	ldr	w9, [x9]
	orr	w0, w8, w9
	ldr	x8, [x19, #8]
	ldr	x9, [x20]
	add	x1, x9, x8
	bl	_writel
	ldr	x8, [x19, #8]
Lloh31:
	adrp	x20, _GLB_MACTCTRL@GOTPAGE
Lloh32:
	ldr	x20, [x20, _GLB_MACTCTRL@GOTPAGEOFF]
	ldr	x9, [x20]
	add	x0, x9, x8
	bl	_readl
Lloh33:
	adrp	x8, _MACTCTRL_BROAD2CPU@GOTPAGE
Lloh34:
	ldr	x8, [x8, _MACTCTRL_BROAD2CPU@GOTPAGEOFF]
Lloh35:
	ldr	w8, [x8]
Lloh36:
	adrp	x9, _MACTCTRL_MACT_ENA@GOTPAGE
Lloh37:
	ldr	x9, [x9, _MACTCTRL_MACT_ENA@GOTPAGEOFF]
Lloh38:
	ldr	w9, [x9]
	orr	w8, w8, w0
	orr	w0, w8, w9
	ldr	x8, [x19, #8]
	ldr	x9, [x20]
	add	x1, x9, x8
	bl	_writel
	ldr	x8, [x19]
Lloh39:
	adrp	x20, _MAC_SET@GOTPAGE
Lloh40:
	ldr	x20, [x20, _MAC_SET@GOTPAGEOFF]
	ldr	x9, [x20]
	add	x0, x9, x8
	bl	_readl
Lloh41:
	adrp	x8, _MAX_FRAME_SIZE_MASK@GOTPAGE
Lloh42:
	ldr	x8, [x8, _MAX_FRAME_SIZE_MASK@GOTPAGEOFF]
Lloh43:
	ldr	w8, [x8]
Lloh44:
	adrp	x9, _MAX_FRAME_SIZE@GOTPAGE
Lloh45:
	ldr	x9, [x9, _MAX_FRAME_SIZE@GOTPAGEOFF]
	bic	w8, w0, w8
Lloh46:
	ldr	w9, [x9]
	orr	w0, w8, w9
	ldr	x8, [x19]
	ldr	x9, [x20]
	add	x1, x9, x8
	bl	_writel
Lloh47:
	adrp	x8, _RX_COALESCED_TIMER@GOTPAGE
Lloh48:
	ldr	x8, [x8, _RX_COALESCED_TIMER@GOTPAGEOFF]
Lloh49:
	adrp	x9, _RX_COALESCED_FRAMES@GOTPAGE
Lloh50:
	ldr	x9, [x9, _RX_COALESCED_FRAMES@GOTPAGEOFF]
Lloh51:
	ldr	w8, [x8]
Lloh52:
	ldr	w9, [x9]
Lloh53:
	adrp	x10, _RX_COALESCED_FRAME_OFFSET@GOTPAGE
Lloh54:
	ldr	x10, [x10, _RX_COALESCED_FRAME_OFFSET@GOTPAGEOFF]
Lloh55:
	ldr	w10, [x10]
	lsl	w9, w9, w10
	orr	w0, w9, w8
	ldr	x8, [x19]
Lloh56:
	adrp	x9, _RX_COALESCE_SET@GOTPAGE
Lloh57:
	ldr	x9, [x9, _RX_COALESCE_SET@GOTPAGEOFF]
Lloh58:
	ldr	x9, [x9]
	add	x1, x9, x8
	bl	_writel
Lloh59:
	adrp	x8, _HW_RX_FIFO_DEPTH@GOTPAGE
Lloh60:
	ldr	x8, [x8, _HW_RX_FIFO_DEPTH@GOTPAGEOFF]
Lloh61:
	ldr	w8, [x8]
Lloh62:
	adrp	x9, _RX_DEPTH_OFFSET@GOTPAGE
Lloh63:
	ldr	x9, [x9, _RX_DEPTH_OFFSET@GOTPAGEOFF]
Lloh64:
	ldr	w9, [x9]
	lsl	w8, w8, w9
Lloh65:
	adrp	x9, _HW_TX_FIFO_DEPTH@GOTPAGE
Lloh66:
	ldr	x9, [x9, _HW_TX_FIFO_DEPTH@GOTPAGEOFF]
Lloh67:
	ldr	w9, [x9]
	orr	w0, w8, w9
	ldr	x8, [x19]
Lloh68:
	adrp	x9, _QLEN_SET@GOTPAGE
Lloh69:
	ldr	x9, [x9, _QLEN_SET@GOTPAGEOFF]
Lloh70:
	ldr	x9, [x9]
	add	x1, x9, x8
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	b	_writel
	.loh AdrpLdrGotLdr	Lloh68, Lloh69, Lloh70
	.loh AdrpLdrGotLdr	Lloh65, Lloh66, Lloh67
	.loh AdrpLdrGotLdr	Lloh62, Lloh63, Lloh64
	.loh AdrpLdrGotLdr	Lloh59, Lloh60, Lloh61
	.loh AdrpLdrGotLdr	Lloh56, Lloh57, Lloh58
	.loh AdrpLdrGotLdr	Lloh53, Lloh54, Lloh55
	.loh AdrpLdrGotLdr	Lloh49, Lloh50, Lloh52
	.loh AdrpLdrGotLdr	Lloh47, Lloh48, Lloh51
	.loh AdrpLdrGotLdr	Lloh44, Lloh45, Lloh46
	.loh AdrpLdrGotLdr	Lloh41, Lloh42, Lloh43
	.loh AdrpLdrGot	Lloh39, Lloh40
	.loh AdrpLdrGotLdr	Lloh36, Lloh37, Lloh38
	.loh AdrpLdrGotLdr	Lloh33, Lloh34, Lloh35
	.loh AdrpLdrGot	Lloh31, Lloh32
	.loh AdrpLdrGotLdr	Lloh28, Lloh29, Lloh30
	.loh AdrpLdrGotLdr	Lloh25, Lloh26, Lloh27
	.loh AdrpLdrGotLdr	Lloh22, Lloh23, Lloh24
	.loh AdrpLdrGot	Lloh20, Lloh21
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh19
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh16
	.loh AdrpLdrGot	Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_MAC_PORTSEL_STAT_CPU,4,2       ; @MAC_PORTSEL_STAT_CPU
	.comm	_PHY_INTERFACE_MODE_RMII,8,3    ; @PHY_INTERFACE_MODE_RMII
	.comm	_MAC_PORTSEL_RMII,4,2           ; @MAC_PORTSEL_RMII
	.comm	_MAC_PORTSEL,8,3                ; @MAC_PORTSEL
	.comm	_IRQ_ENA_PORT0_MASK,4,2         ; @IRQ_ENA_PORT0_MASK
	.comm	_GLB_IRQ_RAW,8,3                ; @GLB_IRQ_RAW
	.comm	_IRQ_ENA_PORT0,4,2              ; @IRQ_ENA_PORT0
	.comm	_GLB_FWCTRL,8,3                 ; @GLB_FWCTRL
	.comm	_FWCTRL_VLAN_ENABLE,4,2         ; @FWCTRL_VLAN_ENABLE
	.comm	_FWCTRL_FWALL2CPU,4,2           ; @FWCTRL_FWALL2CPU
	.comm	_FWCTRL_FW2CPU_ENA,4,2          ; @FWCTRL_FW2CPU_ENA
	.comm	_GLB_MACTCTRL,8,3               ; @GLB_MACTCTRL
	.comm	_MACTCTRL_BROAD2CPU,4,2         ; @MACTCTRL_BROAD2CPU
	.comm	_MACTCTRL_MACT_ENA,4,2          ; @MACTCTRL_MACT_ENA
	.comm	_MAC_SET,8,3                    ; @MAC_SET
	.comm	_MAX_FRAME_SIZE_MASK,4,2        ; @MAX_FRAME_SIZE_MASK
	.comm	_MAX_FRAME_SIZE,4,2             ; @MAX_FRAME_SIZE
	.comm	_RX_COALESCED_TIMER,4,2         ; @RX_COALESCED_TIMER
	.comm	_RX_COALESCED_FRAMES,4,2        ; @RX_COALESCED_FRAMES
	.comm	_RX_COALESCED_FRAME_OFFSET,4,2  ; @RX_COALESCED_FRAME_OFFSET
	.comm	_RX_COALESCE_SET,8,3            ; @RX_COALESCE_SET
	.comm	_HW_RX_FIFO_DEPTH,4,2           ; @HW_RX_FIFO_DEPTH
	.comm	_RX_DEPTH_OFFSET,4,2            ; @RX_DEPTH_OFFSET
	.comm	_HW_TX_FIFO_DEPTH,4,2           ; @HW_TX_FIFO_DEPTH
	.comm	_QLEN_SET,8,3                   ; @QLEN_SET
	.no_dead_strip	_hisi_femac_port_init
.subsections_via_symbols
