	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function iwl_pcie_apm_stop
_iwl_pcie_apm_stop:                     ## @iwl_pcie_apm_stop
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%esi, %ebx
	movq	%rdi, %r14
	leaq	L_.str(%rip), %rsi
	callq	_IWL_DEBUG_INFO
	testl	%ebx, %ebx
	je	LBB0_8
## %bb.1:
	movq	_STATUS_DEVICE_ENABLED@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	leaq	16(%r14), %rsi
	callq	_test_bit
	testl	%eax, %eax
	jne	LBB0_3
## %bb.2:
	movq	%r14, %rdi
	callq	_iwl_pcie_apm_init
LBB0_3:
	movq	(%r14), %rax
	movq	(%rax), %rax
	movq	_IWL_DEVICE_FAMILY_7000@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jne	LBB0_5
## %bb.4:
	movq	_APMG_PCIDEV_STT_REG@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_APMG_PCIDEV_STT_VAL_WAKE_ME@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r14, %rdi
	callq	_iwl_set_bits_prph
	jmp	LBB0_7
LBB0_5:
	movq	_IWL_DEVICE_FAMILY_8000@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jl	LBB0_7
## %bb.6:
	movq	_CSR_DBG_LINK_PWR_MGMT_REG@GOTPCREL(%rip), %r15
	movl	(%r15), %esi
	movq	_CSR_RESET_LINK_PWR_MGMT_DISABLED@GOTPCREL(%rip), %rbx
	movl	(%rbx), %edx
	movq	%r14, %rdi
	callq	_iwl_set_bit
	movq	_CSR_HW_IF_CONFIG_REG@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_CSR_HW_IF_CONFIG_REG_PREPARE@GOTPCREL(%rip), %rax
	movq	_CSR_HW_IF_CONFIG_REG_ENABLE_PME@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	orl	(%rax), %edx
	movq	%r14, %rdi
	callq	_iwl_set_bit
	movl	$1, %edi
	callq	_mdelay
	movl	(%r15), %esi
	movl	(%rbx), %edx
	movq	%r14, %rdi
	callq	_iwl_clear_bit
LBB0_7:
	movl	$5, %edi
	callq	_mdelay
LBB0_8:
	movq	_STATUS_DEVICE_ENABLED@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	leaq	16(%r14), %rsi
	callq	_clear_bit
	movq	%r14, %rdi
	callq	_iwl_pcie_apm_stop_master
	movq	8(%r14), %rax
	cmpq	$0, (%rax)
	je	LBB0_10
## %bb.9:
	movq	%r14, %rdi
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_iwl_pcie_apm_lp_xtal_enable    ## TAILCALL
LBB0_10:
	movq	%r14, %rdi
	callq	_iwl_trans_pcie_sw_reset
	movq	_CSR_GP_CNTRL@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	movq	(%r14), %rax
	movq	8(%rax), %rax
	movl	(%rax), %edi
	callq	_BIT
	movq	%r14, %rdi
	movl	%ebx, %esi
	movl	%eax, %edx
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_iwl_clear_bit                  ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"Stop card, put in low power state\n"

	.comm	_STATUS_DEVICE_ENABLED,4,2      ## @STATUS_DEVICE_ENABLED
	.comm	_IWL_DEVICE_FAMILY_7000,8,3     ## @IWL_DEVICE_FAMILY_7000
	.comm	_APMG_PCIDEV_STT_REG,4,2        ## @APMG_PCIDEV_STT_REG
	.comm	_APMG_PCIDEV_STT_VAL_WAKE_ME,4,2 ## @APMG_PCIDEV_STT_VAL_WAKE_ME
	.comm	_IWL_DEVICE_FAMILY_8000,8,3     ## @IWL_DEVICE_FAMILY_8000
	.comm	_CSR_DBG_LINK_PWR_MGMT_REG,4,2  ## @CSR_DBG_LINK_PWR_MGMT_REG
	.comm	_CSR_RESET_LINK_PWR_MGMT_DISABLED,4,2 ## @CSR_RESET_LINK_PWR_MGMT_DISABLED
	.comm	_CSR_HW_IF_CONFIG_REG,4,2       ## @CSR_HW_IF_CONFIG_REG
	.comm	_CSR_HW_IF_CONFIG_REG_PREPARE,4,2 ## @CSR_HW_IF_CONFIG_REG_PREPARE
	.comm	_CSR_HW_IF_CONFIG_REG_ENABLE_PME,4,2 ## @CSR_HW_IF_CONFIG_REG_ENABLE_PME
	.comm	_CSR_GP_CNTRL,4,2               ## @CSR_GP_CNTRL
	.no_dead_strip	_iwl_pcie_apm_stop
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function iwl_pcie_apm_stop
_iwl_pcie_apm_stop:                     ; @iwl_pcie_apm_stop
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x20, x1
	mov	x19, x0
Lloh0:
	adrp	x1, l_.str@PAGE
Lloh1:
	add	x1, x1, l_.str@PAGEOFF
	bl	_IWL_DEBUG_INFO
Lloh2:
	adrp	x21, _STATUS_DEVICE_ENABLED@GOTPAGE
Lloh3:
	ldr	x21, [x21, _STATUS_DEVICE_ENABLED@GOTPAGEOFF]
	cbz	w20, LBB0_8
; %bb.1:
	ldr	w0, [x21]
	add	x1, x19, #16
	bl	_test_bit
	cbnz	w0, LBB0_3
; %bb.2:
	mov	x0, x19
	bl	_iwl_pcie_apm_init
LBB0_3:
	ldr	x8, [x19]
	ldr	x8, [x8]
Lloh4:
	adrp	x9, _IWL_DEVICE_FAMILY_7000@GOTPAGE
Lloh5:
	ldr	x9, [x9, _IWL_DEVICE_FAMILY_7000@GOTPAGEOFF]
Lloh6:
	ldr	x9, [x9]
	cmp	x8, x9
	b.ne	LBB0_5
; %bb.4:
Lloh7:
	adrp	x8, _APMG_PCIDEV_STT_REG@GOTPAGE
Lloh8:
	ldr	x8, [x8, _APMG_PCIDEV_STT_REG@GOTPAGEOFF]
Lloh9:
	ldr	w1, [x8]
Lloh10:
	adrp	x8, _APMG_PCIDEV_STT_VAL_WAKE_ME@GOTPAGE
Lloh11:
	ldr	x8, [x8, _APMG_PCIDEV_STT_VAL_WAKE_ME@GOTPAGEOFF]
Lloh12:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_iwl_set_bits_prph
	b	LBB0_7
LBB0_5:
Lloh13:
	adrp	x9, _IWL_DEVICE_FAMILY_8000@GOTPAGE
Lloh14:
	ldr	x9, [x9, _IWL_DEVICE_FAMILY_8000@GOTPAGEOFF]
Lloh15:
	ldr	x9, [x9]
	cmp	x8, x9
	b.lt	LBB0_7
; %bb.6:
Lloh16:
	adrp	x20, _CSR_DBG_LINK_PWR_MGMT_REG@GOTPAGE
Lloh17:
	ldr	x20, [x20, _CSR_DBG_LINK_PWR_MGMT_REG@GOTPAGEOFF]
	ldr	w1, [x20]
Lloh18:
	adrp	x22, _CSR_RESET_LINK_PWR_MGMT_DISABLED@GOTPAGE
Lloh19:
	ldr	x22, [x22, _CSR_RESET_LINK_PWR_MGMT_DISABLED@GOTPAGEOFF]
	ldr	w2, [x22]
	mov	x0, x19
	bl	_iwl_set_bit
Lloh20:
	adrp	x8, _CSR_HW_IF_CONFIG_REG@GOTPAGE
Lloh21:
	ldr	x8, [x8, _CSR_HW_IF_CONFIG_REG@GOTPAGEOFF]
Lloh22:
	adrp	x9, _CSR_HW_IF_CONFIG_REG_PREPARE@GOTPAGE
Lloh23:
	ldr	x9, [x9, _CSR_HW_IF_CONFIG_REG_PREPARE@GOTPAGEOFF]
Lloh24:
	ldr	w1, [x8]
Lloh25:
	ldr	w8, [x9]
Lloh26:
	adrp	x9, _CSR_HW_IF_CONFIG_REG_ENABLE_PME@GOTPAGE
Lloh27:
	ldr	x9, [x9, _CSR_HW_IF_CONFIG_REG_ENABLE_PME@GOTPAGEOFF]
Lloh28:
	ldr	w9, [x9]
	orr	w2, w9, w8
	mov	x0, x19
	bl	_iwl_set_bit
	mov	w0, #1
	bl	_mdelay
	ldr	w1, [x20]
	ldr	w2, [x22]
	mov	x0, x19
	bl	_iwl_clear_bit
LBB0_7:
	mov	w0, #5
	bl	_mdelay
LBB0_8:
	ldr	w0, [x21]
	add	x1, x19, #16
	bl	_clear_bit
	mov	x0, x19
	bl	_iwl_pcie_apm_stop_master
	ldr	x8, [x19, #8]
	ldr	x8, [x8]
	cbz	x8, LBB0_10
; %bb.9:
	mov	x0, x19
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	_iwl_pcie_apm_lp_xtal_enable
LBB0_10:
	mov	x0, x19
	bl	_iwl_trans_pcie_sw_reset
Lloh29:
	adrp	x8, _CSR_GP_CNTRL@GOTPAGE
Lloh30:
	ldr	x8, [x8, _CSR_GP_CNTRL@GOTPAGEOFF]
Lloh31:
	ldr	w20, [x8]
	ldr	x8, [x19]
	ldr	x8, [x8, #8]
	ldr	w0, [x8]
	bl	_BIT
	mov	x2, x0
	mov	x0, x19
	mov	x1, x20
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	_iwl_clear_bit
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpAdd	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh4, Lloh5, Lloh6
	.loh AdrpLdrGotLdr	Lloh10, Lloh11, Lloh12
	.loh AdrpLdrGotLdr	Lloh7, Lloh8, Lloh9
	.loh AdrpLdrGotLdr	Lloh13, Lloh14, Lloh15
	.loh AdrpLdrGotLdr	Lloh26, Lloh27, Lloh28
	.loh AdrpLdrGotLdr	Lloh22, Lloh23, Lloh25
	.loh AdrpLdrGotLdr	Lloh20, Lloh21, Lloh24
	.loh AdrpLdrGot	Lloh18, Lloh19
	.loh AdrpLdrGot	Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh29, Lloh30, Lloh31
	.cfi_endproc
                                        ; -- End function
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"Stop card, put in low power state\n"

	.comm	_STATUS_DEVICE_ENABLED,4,2      ; @STATUS_DEVICE_ENABLED
	.comm	_IWL_DEVICE_FAMILY_7000,8,3     ; @IWL_DEVICE_FAMILY_7000
	.comm	_APMG_PCIDEV_STT_REG,4,2        ; @APMG_PCIDEV_STT_REG
	.comm	_APMG_PCIDEV_STT_VAL_WAKE_ME,4,2 ; @APMG_PCIDEV_STT_VAL_WAKE_ME
	.comm	_IWL_DEVICE_FAMILY_8000,8,3     ; @IWL_DEVICE_FAMILY_8000
	.comm	_CSR_DBG_LINK_PWR_MGMT_REG,4,2  ; @CSR_DBG_LINK_PWR_MGMT_REG
	.comm	_CSR_RESET_LINK_PWR_MGMT_DISABLED,4,2 ; @CSR_RESET_LINK_PWR_MGMT_DISABLED
	.comm	_CSR_HW_IF_CONFIG_REG,4,2       ; @CSR_HW_IF_CONFIG_REG
	.comm	_CSR_HW_IF_CONFIG_REG_PREPARE,4,2 ; @CSR_HW_IF_CONFIG_REG_PREPARE
	.comm	_CSR_HW_IF_CONFIG_REG_ENABLE_PME,4,2 ; @CSR_HW_IF_CONFIG_REG_ENABLE_PME
	.comm	_CSR_GP_CNTRL,4,2               ; @CSR_GP_CNTRL
	.no_dead_strip	_iwl_pcie_apm_stop
.subsections_via_symbols
