	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_rtl92ee_phy_bb_config          ## -- Begin function rtl92ee_phy_bb_config
	.p2align	4, 0x90
_rtl92ee_phy_bb_config:                 ## @rtl92ee_phy_bb_config
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r14
	callq	_rtl_priv
	movq	%rax, %r13
	movq	%r14, %rdi
	callq	_phy_init_bb_rf_register_def
	movq	_REG_SYS_FUNC_EN@GOTPCREL(%rip), %rbx
	movq	(%rbx), %rsi
	movq	%r13, %rdi
	callq	_rtl_read_word
	movl	%eax, %r15d
	movq	(%rbx), %r12
	movl	$13, %edi
	callq	_BIT
	movl	%eax, %ebx
	xorl	%edi, %edi
	callq	_BIT
	orl	%eax, %ebx
	movl	$1, %edi
	callq	_BIT
	orl	%eax, %ebx
	orl	%r15d, %ebx
	movq	%r13, %rdi
	movq	%r12, %rsi
	movl	%ebx, %edx
	callq	_rtl_write_word
	movq	_REG_RF_CTRL@GOTPCREL(%rip), %rax
	movq	_RF_EN@GOTPCREL(%rip), %rcx
	movq	_RF_RSTB@GOTPCREL(%rip), %rdx
	movl	(%rdx), %edx
	orl	(%rcx), %edx
	movq	(%rax), %rsi
	movq	_RF_SDMRSTB@GOTPCREL(%rip), %rax
	orl	(%rax), %edx
	movq	%r13, %rdi
	callq	_rtl_write_byte
	movq	_FEN_PPLL@GOTPCREL(%rip), %rax
	movq	_FEN_PCIEA@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	orl	(%rax), %edx
	movq	_FEN_DIO_PCIE@GOTPCREL(%rip), %rax
	orl	(%rax), %edx
	movq	_FEN_BB_GLB_RSTN@GOTPCREL(%rip), %rax
	orl	(%rax), %edx
	movq	_REG_SYS_FUNC_EN@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	movq	_FEN_BBRSTB@GOTPCREL(%rip), %rax
	orl	(%rax), %edx
	movq	%r13, %rdi
	callq	_rtl_write_byte
	movq	_REG_AFE_XTAL_CTRL@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	incq	%rsi
	movq	%r13, %rdi
	movl	$128, %edx
	callq	_rtl_write_byte
	movq	%r13, %rdi
	movl	$76, %esi
	callq	_rtl_read_dword
	movl	%eax, %ebx
	movl	$23, %edi
	callq	_BIT
	orl	%eax, %ebx
	movq	%r13, %rdi
	movl	$76, %esi
	movl	%ebx, %edx
	callq	_rtl_write_dword
	movq	%r14, %rdi
	callq	__rtl92ee_phy_bb8192ee_config_parafile
	movl	%eax, %ebx
	movl	(%r13), %eax
	andl	$63, %eax
	movq	_REG_MAC_PHY_CTRL@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	movl	%eax, %ecx
	shll	$6, %ecx
	orl	%eax, %ecx
	movq	%r14, %rdi
	movl	$16773120, %edx                 ## imm = 0xFFF000
	callq	_rtl_set_bbreg
	movl	%ebx, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_REG_SYS_FUNC_EN,8,3            ## @REG_SYS_FUNC_EN
	.comm	_REG_RF_CTRL,8,3                ## @REG_RF_CTRL
	.comm	_RF_EN,4,2                      ## @RF_EN
	.comm	_RF_RSTB,4,2                    ## @RF_RSTB
	.comm	_RF_SDMRSTB,4,2                 ## @RF_SDMRSTB
	.comm	_FEN_PPLL,4,2                   ## @FEN_PPLL
	.comm	_FEN_PCIEA,4,2                  ## @FEN_PCIEA
	.comm	_FEN_DIO_PCIE,4,2               ## @FEN_DIO_PCIE
	.comm	_FEN_BB_GLB_RSTN,4,2            ## @FEN_BB_GLB_RSTN
	.comm	_FEN_BBRSTB,4,2                 ## @FEN_BBRSTB
	.comm	_REG_AFE_XTAL_CTRL,8,3          ## @REG_AFE_XTAL_CTRL
	.comm	_REG_MAC_PHY_CTRL,4,2           ## @REG_MAC_PHY_CTRL
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_rtl92ee_phy_bb_config          ; -- Begin function rtl92ee_phy_bb_config
	.p2align	2
_rtl92ee_phy_bb_config:                 ; @rtl92ee_phy_bb_config
	.cfi_startproc
; %bb.0:
	stp	x24, x23, [sp, #-64]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x19, x0
	bl	_rtl_priv
	mov	x20, x0
	mov	x0, x19
	bl	_phy_init_bb_rf_register_def
Lloh0:
	adrp	x23, _REG_SYS_FUNC_EN@GOTPAGE
Lloh1:
	ldr	x23, [x23, _REG_SYS_FUNC_EN@GOTPAGEOFF]
	ldr	x1, [x23]
	mov	x0, x20
	bl	_rtl_read_word
	mov	x21, x0
	ldr	x22, [x23]
	mov	w0, #13
	bl	_BIT
	orr	w21, w0, w21
	mov	w0, #0
	bl	_BIT
	orr	w21, w21, w0
	mov	w0, #1
	bl	_BIT
	orr	w2, w21, w0
	mov	x0, x20
	mov	x1, x22
	bl	_rtl_write_word
Lloh2:
	adrp	x8, _REG_RF_CTRL@GOTPAGE
Lloh3:
	ldr	x8, [x8, _REG_RF_CTRL@GOTPAGEOFF]
Lloh4:
	ldr	x1, [x8]
Lloh5:
	adrp	x8, _RF_EN@GOTPAGE
Lloh6:
	ldr	x8, [x8, _RF_EN@GOTPAGEOFF]
Lloh7:
	ldr	w8, [x8]
Lloh8:
	adrp	x9, _RF_RSTB@GOTPAGE
Lloh9:
	ldr	x9, [x9, _RF_RSTB@GOTPAGEOFF]
Lloh10:
	ldr	w9, [x9]
	orr	w8, w9, w8
Lloh11:
	adrp	x9, _RF_SDMRSTB@GOTPAGE
Lloh12:
	ldr	x9, [x9, _RF_SDMRSTB@GOTPAGEOFF]
Lloh13:
	ldr	w9, [x9]
	orr	w2, w8, w9
	mov	x0, x20
	bl	_rtl_write_byte
Lloh14:
	adrp	x8, _FEN_PPLL@GOTPAGE
Lloh15:
	ldr	x8, [x8, _FEN_PPLL@GOTPAGEOFF]
	ldr	x1, [x23]
Lloh16:
	ldr	w8, [x8]
Lloh17:
	adrp	x9, _FEN_PCIEA@GOTPAGE
Lloh18:
	ldr	x9, [x9, _FEN_PCIEA@GOTPAGEOFF]
Lloh19:
	ldr	w9, [x9]
	orr	w8, w9, w8
Lloh20:
	adrp	x9, _FEN_DIO_PCIE@GOTPAGE
Lloh21:
	ldr	x9, [x9, _FEN_DIO_PCIE@GOTPAGEOFF]
Lloh22:
	ldr	w9, [x9]
	orr	w8, w8, w9
Lloh23:
	adrp	x9, _FEN_BB_GLB_RSTN@GOTPAGE
Lloh24:
	ldr	x9, [x9, _FEN_BB_GLB_RSTN@GOTPAGEOFF]
Lloh25:
	ldr	w9, [x9]
	orr	w8, w8, w9
Lloh26:
	adrp	x9, _FEN_BBRSTB@GOTPAGE
Lloh27:
	ldr	x9, [x9, _FEN_BBRSTB@GOTPAGEOFF]
Lloh28:
	ldr	w9, [x9]
	orr	w2, w8, w9
	mov	x0, x20
	bl	_rtl_write_byte
Lloh29:
	adrp	x8, _REG_AFE_XTAL_CTRL@GOTPAGE
Lloh30:
	ldr	x8, [x8, _REG_AFE_XTAL_CTRL@GOTPAGEOFF]
Lloh31:
	ldr	x8, [x8]
	add	x1, x8, #1
	mov	x0, x20
	mov	w2, #128
	bl	_rtl_write_byte
	mov	x0, x20
	mov	w1, #76
	bl	_rtl_read_dword
	mov	x21, x0
	mov	w0, #23
	bl	_BIT
	orr	w2, w0, w21
	mov	x0, x20
	mov	w1, #76
	bl	_rtl_write_dword
	mov	x0, x19
	bl	__rtl92ee_phy_bb8192ee_config_parafile
	mov	x21, x0
	ldr	w8, [x20]
	and	w3, w8, #0x3f
Lloh32:
	adrp	x8, _REG_MAC_PHY_CTRL@GOTPAGE
Lloh33:
	ldr	x8, [x8, _REG_MAC_PHY_CTRL@GOTPAGEOFF]
Lloh34:
	ldr	w1, [x8]
	bfi	w3, w3, #6, #6
	mov	x0, x19
	mov	w2, #16773120
	bl	_rtl_set_bbreg
	mov	x0, x21
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh32, Lloh33, Lloh34
	.loh AdrpLdrGotLdr	Lloh29, Lloh30, Lloh31
	.loh AdrpLdrGotLdr	Lloh26, Lloh27, Lloh28
	.loh AdrpLdrGotLdr	Lloh23, Lloh24, Lloh25
	.loh AdrpLdrGotLdr	Lloh20, Lloh21, Lloh22
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh19
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh16
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGot	Lloh0, Lloh1
	.cfi_endproc
                                        ; -- End function
	.comm	_REG_SYS_FUNC_EN,8,3            ; @REG_SYS_FUNC_EN
	.comm	_REG_RF_CTRL,8,3                ; @REG_RF_CTRL
	.comm	_RF_EN,4,2                      ; @RF_EN
	.comm	_RF_RSTB,4,2                    ; @RF_RSTB
	.comm	_RF_SDMRSTB,4,2                 ; @RF_SDMRSTB
	.comm	_FEN_PPLL,4,2                   ; @FEN_PPLL
	.comm	_FEN_PCIEA,4,2                  ; @FEN_PCIEA
	.comm	_FEN_DIO_PCIE,4,2               ; @FEN_DIO_PCIE
	.comm	_FEN_BB_GLB_RSTN,4,2            ; @FEN_BB_GLB_RSTN
	.comm	_FEN_BBRSTB,4,2                 ; @FEN_BBRSTB
	.comm	_REG_AFE_XTAL_CTRL,8,3          ; @REG_AFE_XTAL_CTRL
	.comm	_REG_MAC_PHY_CTRL,4,2           ; @REG_MAC_PHY_CTRL
.subsections_via_symbols
