	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function vsc824x_add_skew
_vsc824x_add_skew:                      ## @vsc824x_add_skew
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r14
	pushq	%rbx
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	movq	%rdi, %rbx
	movq	_MII_VSC8244_EXT_CON1@GOTPCREL(%rip), %r14
	movl	(%r14), %esi
	callq	_phy_read
	testl	%eax, %eax
	js	LBB0_1
## %bb.2:
	movq	_MII_VSC8244_EXTCON1_TX_SKEW_MASK@GOTPCREL(%rip), %rcx
	movq	_MII_VSC8244_EXTCON1_RX_SKEW_MASK@GOTPCREL(%rip), %rdx
	movl	(%rdx), %edx
	orl	(%rcx), %edx
	notl	%edx
	andl	%edx, %eax
	movq	_MII_VSC8244_EXTCON1_TX_SKEW@GOTPCREL(%rip), %rcx
	movq	_MII_VSC8244_EXTCON1_RX_SKEW@GOTPCREL(%rip), %rdx
	movl	(%rdx), %edx
	orl	(%rcx), %edx
	orl	%eax, %edx
	movl	(%r14), %esi
	movq	%rbx, %rdi
	popq	%rbx
	popq	%r14
	popq	%rbp
	jmp	_phy_write                      ## TAILCALL
LBB0_1:
	popq	%rbx
	popq	%r14
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_MII_VSC8244_EXT_CON1,4,2       ## @MII_VSC8244_EXT_CON1
	.comm	_MII_VSC8244_EXTCON1_TX_SKEW_MASK,4,2 ## @MII_VSC8244_EXTCON1_TX_SKEW_MASK
	.comm	_MII_VSC8244_EXTCON1_RX_SKEW_MASK,4,2 ## @MII_VSC8244_EXTCON1_RX_SKEW_MASK
	.comm	_MII_VSC8244_EXTCON1_TX_SKEW,4,2 ## @MII_VSC8244_EXTCON1_TX_SKEW
	.comm	_MII_VSC8244_EXTCON1_RX_SKEW,4,2 ## @MII_VSC8244_EXTCON1_RX_SKEW
	.no_dead_strip	_vsc824x_add_skew
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function vsc824x_add_skew
_vsc824x_add_skew:                      ; @vsc824x_add_skew
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x19, x0
Lloh0:
	adrp	x20, _MII_VSC8244_EXT_CON1@GOTPAGE
Lloh1:
	ldr	x20, [x20, _MII_VSC8244_EXT_CON1@GOTPAGEOFF]
	ldr	w1, [x20]
	bl	_phy_read
	tbnz	w0, #31, LBB0_2
; %bb.1:
Lloh2:
	adrp	x8, _MII_VSC8244_EXTCON1_TX_SKEW_MASK@GOTPAGE
Lloh3:
	ldr	x8, [x8, _MII_VSC8244_EXTCON1_TX_SKEW_MASK@GOTPAGEOFF]
Lloh4:
	ldr	w8, [x8]
Lloh5:
	adrp	x9, _MII_VSC8244_EXTCON1_RX_SKEW_MASK@GOTPAGE
Lloh6:
	ldr	x9, [x9, _MII_VSC8244_EXTCON1_RX_SKEW_MASK@GOTPAGEOFF]
Lloh7:
	ldr	w9, [x9]
	orr	w8, w9, w8
	bic	w8, w0, w8
Lloh8:
	adrp	x9, _MII_VSC8244_EXTCON1_TX_SKEW@GOTPAGE
Lloh9:
	ldr	x9, [x9, _MII_VSC8244_EXTCON1_TX_SKEW@GOTPAGEOFF]
Lloh10:
	ldr	w9, [x9]
Lloh11:
	adrp	x10, _MII_VSC8244_EXTCON1_RX_SKEW@GOTPAGE
Lloh12:
	ldr	x10, [x10, _MII_VSC8244_EXTCON1_RX_SKEW@GOTPAGEOFF]
Lloh13:
	ldr	w10, [x10]
	orr	w9, w10, w9
	orr	w2, w9, w8
	ldr	w1, [x20]
	mov	x0, x19
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	b	_phy_write
LBB0_2:
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.cfi_endproc
                                        ; -- End function
	.comm	_MII_VSC8244_EXT_CON1,4,2       ; @MII_VSC8244_EXT_CON1
	.comm	_MII_VSC8244_EXTCON1_TX_SKEW_MASK,4,2 ; @MII_VSC8244_EXTCON1_TX_SKEW_MASK
	.comm	_MII_VSC8244_EXTCON1_RX_SKEW_MASK,4,2 ; @MII_VSC8244_EXTCON1_RX_SKEW_MASK
	.comm	_MII_VSC8244_EXTCON1_TX_SKEW,4,2 ; @MII_VSC8244_EXTCON1_TX_SKEW
	.comm	_MII_VSC8244_EXTCON1_RX_SKEW,4,2 ; @MII_VSC8244_EXTCON1_RX_SKEW
	.no_dead_strip	_vsc824x_add_skew
.subsections_via_symbols
