	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function update_gid
_update_gid:                            ## @update_gid
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%edx, %r14d
	movq	%rdi, %r12
	movq	(%rsi), %r13
	movl	(%r13), %edi
	callq	_be32_to_cpu
	movl	%eax, %r15d
	movl	176(%r13), %edi
	callq	_be32_to_cpu
	shrl	$16, %eax
	movzbl	%al, %eax
	movq	_MLX4_QP_ST_UD@GOTPCREL(%rip), %rcx
	cmpq	%rax, (%rcx)
	jne	LBB0_4
## %bb.1:
	xorl	%ebx, %ebx
	btl	$6, 168(%r13)
	adcl	$1, %ebx
	movq	%r12, %rdi
	movl	%ebx, %esi
	callq	_mlx4_is_eth
	testq	%rax, %rax
	je	LBB0_3
## %bb.2:
	movq	%r12, %rdi
	movl	%r14d, %esi
	movl	%ebx, %edx
	callq	_mlx4_get_base_gid_ix
	orl	$128, %eax
	movl	%eax, 172(%r13)
	jmp	LBB0_16
LBB0_4:
	movq	_MLX4_QP_ST_RC@GOTPCREL(%rip), %rcx
	cmpq	%rax, (%rcx)
	je	LBB0_7
## %bb.5:
	movq	_MLX4_QP_ST_XRC@GOTPCREL(%rip), %rcx
	cmpq	%rax, (%rcx)
	je	LBB0_7
## %bb.6:
	movq	_MLX4_QP_ST_UC@GOTPCREL(%rip), %rcx
	cmpq	%rax, (%rcx)
	jne	LBB0_16
LBB0_7:
	movq	_MLX4_QP_OPTPAR_PRIMARY_ADDR_PATH@GOTPCREL(%rip), %rax
	testl	%r15d, (%rax)
	je	LBB0_12
## %bb.8:
	xorl	%ebx, %ebx
	btl	$6, 168(%r13)
	adcl	$1, %ebx
	movq	%r12, %rdi
	movl	%ebx, %esi
	callq	_mlx4_is_eth
	testq	%rax, %rax
	je	LBB0_10
## %bb.9:
	movq	%r12, %rdi
	movl	%r14d, %esi
	movl	%ebx, %edx
	callq	_mlx4_get_base_gid_ix
	addl	172(%r13), %eax
	jmp	LBB0_11
LBB0_3:
	orl	$128, %r14d
	movl	%r14d, 172(%r13)
	jmp	LBB0_16
LBB0_10:
	movl	%r14d, %eax
LBB0_11:
	andl	$127, %eax
	movl	%eax, 172(%r13)
LBB0_12:
	movq	_MLX4_QP_OPTPAR_ALT_ADDR_PATH@GOTPCREL(%rip), %rax
	testl	%r15d, (%rax)
	je	LBB0_16
## %bb.13:
	xorl	%ebx, %ebx
	btl	$6, 160(%r13)
	adcl	$1, %ebx
	movq	%r12, %rdi
	movl	%ebx, %esi
	callq	_mlx4_is_eth
	testq	%rax, %rax
	je	LBB0_15
## %bb.14:
	movq	%r12, %rdi
	movl	%r14d, %esi
	movl	%ebx, %edx
	callq	_mlx4_get_base_gid_ix
	addl	164(%r13), %eax
	andl	$127, %eax
	movl	%eax, 164(%r13)
	jmp	LBB0_16
LBB0_15:
	andl	$127, %r14d
	movl	%r14d, 164(%r13)
LBB0_16:
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_MLX4_QP_ST_UD,8,3              ## @MLX4_QP_ST_UD
	.comm	_MLX4_QP_ST_RC,8,3              ## @MLX4_QP_ST_RC
	.comm	_MLX4_QP_ST_XRC,8,3             ## @MLX4_QP_ST_XRC
	.comm	_MLX4_QP_ST_UC,8,3              ## @MLX4_QP_ST_UC
	.comm	_MLX4_QP_OPTPAR_PRIMARY_ADDR_PATH,4,2 ## @MLX4_QP_OPTPAR_PRIMARY_ADDR_PATH
	.comm	_MLX4_QP_OPTPAR_ALT_ADDR_PATH,4,2 ## @MLX4_QP_OPTPAR_ALT_ADDR_PATH
	.no_dead_strip	_update_gid
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function update_gid
_update_gid:                            ; @update_gid
	.cfi_startproc
; %bb.0:
	stp	x24, x23, [sp, #-64]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x19, x2
	mov	x20, x0
	ldr	x23, [x1]
	ldr	w0, [x23]
	bl	_be32_to_cpu
	mov	x21, x0
	ldr	w0, [x23, #176]
	bl	_be32_to_cpu
	ubfx	w8, w0, #16, #8
Lloh0:
	adrp	x9, _MLX4_QP_ST_UD@GOTPAGE
Lloh1:
	ldr	x9, [x9, _MLX4_QP_ST_UD@GOTPAGEOFF]
Lloh2:
	ldr	x9, [x9]
	cmp	x9, x8
	b.ne	LBB0_3
; %bb.1:
	ldr	w8, [x23, #168]
	ubfx	w8, w8, #6, #1
	add	w21, w8, #1
	mov	x0, x20
	mov	x1, x21
	bl	_mlx4_is_eth
	cbz	x0, LBB0_7
; %bb.2:
	mov	x0, x20
	mov	x1, x19
	mov	x2, x21
	bl	_mlx4_get_base_gid_ix
	orr	w8, w0, #0x80
	str	w8, [x23, #172]
	b	LBB0_15
LBB0_3:
Lloh3:
	adrp	x9, _MLX4_QP_ST_RC@GOTPAGE
Lloh4:
	ldr	x9, [x9, _MLX4_QP_ST_RC@GOTPAGEOFF]
Lloh5:
	ldr	x9, [x9]
Lloh6:
	adrp	x10, _MLX4_QP_ST_XRC@GOTPAGE
Lloh7:
	ldr	x10, [x10, _MLX4_QP_ST_XRC@GOTPAGEOFF]
Lloh8:
	ldr	x10, [x10]
Lloh9:
	adrp	x11, _MLX4_QP_ST_UC@GOTPAGE
Lloh10:
	ldr	x11, [x11, _MLX4_QP_ST_UC@GOTPAGEOFF]
Lloh11:
	ldr	x11, [x11]
	cmp	x9, x8
	ccmp	x10, x8, #4, ne
	ccmp	x11, x8, #4, ne
	b.ne	LBB0_15
; %bb.4:
Lloh12:
	adrp	x8, _MLX4_QP_OPTPAR_PRIMARY_ADDR_PATH@GOTPAGE
Lloh13:
	ldr	x8, [x8, _MLX4_QP_OPTPAR_PRIMARY_ADDR_PATH@GOTPAGEOFF]
Lloh14:
	ldr	w8, [x8]
	tst	w8, w21
	b.eq	LBB0_10
; %bb.5:
	ldr	w8, [x23, #168]
	ubfx	w8, w8, #6, #1
	add	w22, w8, #1
	mov	x0, x20
	mov	x1, x22
	bl	_mlx4_is_eth
	cbz	x0, LBB0_8
; %bb.6:
	mov	x0, x20
	mov	x1, x19
	mov	x2, x22
	bl	_mlx4_get_base_gid_ix
	ldr	w8, [x23, #172]
	add	w8, w8, w0
	and	w8, w8, #0x7f
	b	LBB0_9
LBB0_7:
	orr	w8, w19, #0x80
	str	w8, [x23, #172]
	b	LBB0_15
LBB0_8:
	and	w8, w19, #0x7f
LBB0_9:
	str	w8, [x23, #172]
LBB0_10:
Lloh15:
	adrp	x8, _MLX4_QP_OPTPAR_ALT_ADDR_PATH@GOTPAGE
Lloh16:
	ldr	x8, [x8, _MLX4_QP_OPTPAR_ALT_ADDR_PATH@GOTPAGEOFF]
Lloh17:
	ldr	w8, [x8]
	tst	w8, w21
	b.eq	LBB0_15
; %bb.11:
	ldr	w8, [x23, #160]
	ubfx	w8, w8, #6, #1
	add	w21, w8, #1
	mov	x0, x20
	mov	x1, x21
	bl	_mlx4_is_eth
	cbz	x0, LBB0_13
; %bb.12:
	mov	x0, x20
	mov	x1, x19
	mov	x2, x21
	bl	_mlx4_get_base_gid_ix
	ldr	w8, [x23, #164]
	add	w8, w8, w0
	and	w8, w8, #0x7f
	b	LBB0_14
LBB0_13:
	and	w8, w19, #0x7f
LBB0_14:
	str	w8, [x23, #164]
LBB0_15:
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.cfi_endproc
                                        ; -- End function
	.comm	_MLX4_QP_ST_UD,8,3              ; @MLX4_QP_ST_UD
	.comm	_MLX4_QP_ST_RC,8,3              ; @MLX4_QP_ST_RC
	.comm	_MLX4_QP_ST_XRC,8,3             ; @MLX4_QP_ST_XRC
	.comm	_MLX4_QP_ST_UC,8,3              ; @MLX4_QP_ST_UC
	.comm	_MLX4_QP_OPTPAR_PRIMARY_ADDR_PATH,4,2 ; @MLX4_QP_OPTPAR_PRIMARY_ADDR_PATH
	.comm	_MLX4_QP_OPTPAR_ALT_ADDR_PATH,4,2 ; @MLX4_QP_OPTPAR_ALT_ADDR_PATH
	.no_dead_strip	_update_gid
.subsections_via_symbols
