	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function mtk_pcie_enable_port
_mtk_pcie_enable_port:                  ## @mtk_pcie_enable_port
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %rbx
	movq	40(%rdi), %r15
	movq	8(%r15), %r14
	movl	(%rdi), %edi
	callq	_clk_prepare_enable
	testl	%eax, %eax
	je	LBB0_2
## %bb.1:
	movl	28(%rbx), %edx
	leaq	L_.str(%rip), %rsi
	movq	%r14, %rdi
	callq	_dev_err
	jmp	LBB0_25
LBB0_2:
	movl	4(%rbx), %edi
	callq	_clk_prepare_enable
	testl	%eax, %eax
	je	LBB0_4
## %bb.3:
	movl	28(%rbx), %edx
	leaq	L_.str.1(%rip), %rsi
	movq	%r14, %rdi
	callq	_dev_err
	jmp	LBB0_24
LBB0_4:
	movl	8(%rbx), %edi
	callq	_clk_prepare_enable
	testl	%eax, %eax
	je	LBB0_6
## %bb.5:
	movl	28(%rbx), %edx
	leaq	L_.str.2(%rip), %rsi
	movq	%r14, %rdi
	callq	_dev_err
	jmp	LBB0_23
LBB0_6:
	movl	12(%rbx), %edi
	callq	_clk_prepare_enable
	testl	%eax, %eax
	je	LBB0_8
## %bb.7:
	movl	28(%rbx), %edx
	leaq	L_.str.3(%rip), %rsi
	movq	%r14, %rdi
	callq	_dev_err
	jmp	LBB0_22
LBB0_8:
	movl	16(%rbx), %edi
	callq	_clk_prepare_enable
	testl	%eax, %eax
	je	LBB0_10
## %bb.9:
	movl	28(%rbx), %edx
	leaq	L_.str.4(%rip), %rsi
	movq	%r14, %rdi
	callq	_dev_err
	jmp	LBB0_21
LBB0_10:
	movl	20(%rbx), %edi
	callq	_clk_prepare_enable
	testl	%eax, %eax
	je	LBB0_12
## %bb.11:
	movl	28(%rbx), %edx
	leaq	L_.str.5(%rip), %rsi
	movq	%r14, %rdi
	callq	_dev_err
	jmp	LBB0_20
LBB0_12:
	movl	32(%rbx), %edi
	callq	_reset_control_assert
	movl	32(%rbx), %edi
	callq	_reset_control_deassert
	movl	24(%rbx), %edi
	callq	_phy_init
	testl	%eax, %eax
	je	LBB0_14
## %bb.13:
	movl	28(%rbx), %edx
	leaq	L_.str.6(%rip), %rsi
	movq	%r14, %rdi
	callq	_dev_err
	jmp	LBB0_19
LBB0_14:
	movl	24(%rbx), %edi
	callq	_phy_power_on
	testl	%eax, %eax
	je	LBB0_16
## %bb.15:
	movl	28(%rbx), %edx
	leaq	L_.str.7(%rip), %rsi
	movq	%r14, %rdi
	callq	_dev_err
	jmp	LBB0_18
LBB0_16:
	movq	(%r15), %rax
	movq	%rbx, %rdi
	callq	*(%rax)
	testl	%eax, %eax
	je	LBB0_26
## %bb.17:
	movl	28(%rbx), %edx
	leaq	L_.str.8(%rip), %rsi
	movq	%r14, %rdi
	callq	_dev_info
	movl	24(%rbx), %edi
	callq	_phy_power_off
LBB0_18:
	movl	24(%rbx), %edi
	callq	_phy_exit
LBB0_19:
	movl	20(%rbx), %edi
	callq	_clk_disable_unprepare
LBB0_20:
	movl	16(%rbx), %edi
	callq	_clk_disable_unprepare
LBB0_21:
	movl	12(%rbx), %edi
	callq	_clk_disable_unprepare
LBB0_22:
	movl	8(%rbx), %edi
	callq	_clk_disable_unprepare
LBB0_23:
	movl	4(%rbx), %edi
	callq	_clk_disable_unprepare
LBB0_24:
	movl	(%rbx), %edi
	callq	_clk_disable_unprepare
LBB0_25:
	movq	%rbx, %rdi
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_mtk_pcie_port_free             ## TAILCALL
LBB0_26:
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"failed to enable sys_ck%d clock\n"

L_.str.1:                               ## @.str.1
	.asciz	"failed to enable ahb_ck%d\n"

L_.str.2:                               ## @.str.2
	.asciz	"failed to enable aux_ck%d\n"

L_.str.3:                               ## @.str.3
	.asciz	"failed to enable axi_ck%d\n"

L_.str.4:                               ## @.str.4
	.asciz	"failed to enable obff_ck%d\n"

L_.str.5:                               ## @.str.5
	.asciz	"failed to enable pipe_ck%d\n"

L_.str.6:                               ## @.str.6
	.asciz	"failed to initialize port%d phy\n"

L_.str.7:                               ## @.str.7
	.asciz	"failed to power on port%d phy\n"

L_.str.8:                               ## @.str.8
	.asciz	"Port%d link down\n"

	.no_dead_strip	_mtk_pcie_enable_port
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function mtk_pcie_enable_port
_mtk_pcie_enable_port:                  ; @mtk_pcie_enable_port
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x0
	ldr	x21, [x0, #40]
	ldr	x20, [x21, #8]
	ldr	w0, [x0]
	bl	_clk_prepare_enable
	cbz	w0, LBB0_2
; %bb.1:
	ldr	w2, [x19, #28]
Lloh0:
	adrp	x1, l_.str@PAGE
Lloh1:
	add	x1, x1, l_.str@PAGEOFF
	mov	x0, x20
	bl	_dev_err
	b	LBB0_25
LBB0_2:
	ldr	w0, [x19, #4]
	bl	_clk_prepare_enable
	cbz	w0, LBB0_4
; %bb.3:
	ldr	w2, [x19, #28]
Lloh2:
	adrp	x1, l_.str.1@PAGE
Lloh3:
	add	x1, x1, l_.str.1@PAGEOFF
	mov	x0, x20
	bl	_dev_err
	b	LBB0_24
LBB0_4:
	ldr	w0, [x19, #8]
	bl	_clk_prepare_enable
	cbz	w0, LBB0_6
; %bb.5:
	ldr	w2, [x19, #28]
Lloh4:
	adrp	x1, l_.str.2@PAGE
Lloh5:
	add	x1, x1, l_.str.2@PAGEOFF
	mov	x0, x20
	bl	_dev_err
	b	LBB0_23
LBB0_6:
	ldr	w0, [x19, #12]
	bl	_clk_prepare_enable
	cbz	w0, LBB0_8
; %bb.7:
	ldr	w2, [x19, #28]
Lloh6:
	adrp	x1, l_.str.3@PAGE
Lloh7:
	add	x1, x1, l_.str.3@PAGEOFF
	mov	x0, x20
	bl	_dev_err
	b	LBB0_22
LBB0_8:
	ldr	w0, [x19, #16]
	bl	_clk_prepare_enable
	cbz	w0, LBB0_10
; %bb.9:
	ldr	w2, [x19, #28]
Lloh8:
	adrp	x1, l_.str.4@PAGE
Lloh9:
	add	x1, x1, l_.str.4@PAGEOFF
	mov	x0, x20
	bl	_dev_err
	b	LBB0_21
LBB0_10:
	ldr	w0, [x19, #20]
	bl	_clk_prepare_enable
	cbz	w0, LBB0_12
; %bb.11:
	ldr	w2, [x19, #28]
Lloh10:
	adrp	x1, l_.str.5@PAGE
Lloh11:
	add	x1, x1, l_.str.5@PAGEOFF
	mov	x0, x20
	bl	_dev_err
	b	LBB0_20
LBB0_12:
	ldr	w0, [x19, #32]
	bl	_reset_control_assert
	ldr	w0, [x19, #32]
	bl	_reset_control_deassert
	ldr	w0, [x19, #24]
	bl	_phy_init
	cbz	w0, LBB0_14
; %bb.13:
	ldr	w2, [x19, #28]
Lloh12:
	adrp	x1, l_.str.6@PAGE
Lloh13:
	add	x1, x1, l_.str.6@PAGEOFF
	mov	x0, x20
	bl	_dev_err
	b	LBB0_19
LBB0_14:
	ldr	w0, [x19, #24]
	bl	_phy_power_on
	cbz	w0, LBB0_16
; %bb.15:
	ldr	w2, [x19, #28]
Lloh14:
	adrp	x1, l_.str.7@PAGE
Lloh15:
	add	x1, x1, l_.str.7@PAGEOFF
	mov	x0, x20
	bl	_dev_err
	b	LBB0_18
LBB0_16:
	ldr	x8, [x21]
	ldr	x8, [x8]
	mov	x0, x19
	blr	x8
	cbz	w0, LBB0_26
; %bb.17:
	ldr	w2, [x19, #28]
Lloh16:
	adrp	x1, l_.str.8@PAGE
Lloh17:
	add	x1, x1, l_.str.8@PAGEOFF
	mov	x0, x20
	bl	_dev_info
	ldr	w0, [x19, #24]
	bl	_phy_power_off
LBB0_18:
	ldr	w0, [x19, #24]
	bl	_phy_exit
LBB0_19:
	ldr	w0, [x19, #20]
	bl	_clk_disable_unprepare
LBB0_20:
	ldr	w0, [x19, #16]
	bl	_clk_disable_unprepare
LBB0_21:
	ldr	w0, [x19, #12]
	bl	_clk_disable_unprepare
LBB0_22:
	ldr	w0, [x19, #8]
	bl	_clk_disable_unprepare
LBB0_23:
	ldr	w0, [x19, #4]
	bl	_clk_disable_unprepare
LBB0_24:
	ldr	w0, [x19]
	bl	_clk_disable_unprepare
LBB0_25:
	mov	x0, x19
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	_mtk_pcie_port_free
LBB0_26:
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
	.loh AdrpAdd	Lloh0, Lloh1
	.loh AdrpAdd	Lloh2, Lloh3
	.loh AdrpAdd	Lloh4, Lloh5
	.loh AdrpAdd	Lloh6, Lloh7
	.loh AdrpAdd	Lloh8, Lloh9
	.loh AdrpAdd	Lloh10, Lloh11
	.loh AdrpAdd	Lloh12, Lloh13
	.loh AdrpAdd	Lloh14, Lloh15
	.loh AdrpAdd	Lloh16, Lloh17
	.cfi_endproc
                                        ; -- End function
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"failed to enable sys_ck%d clock\n"

l_.str.1:                               ; @.str.1
	.asciz	"failed to enable ahb_ck%d\n"

l_.str.2:                               ; @.str.2
	.asciz	"failed to enable aux_ck%d\n"

l_.str.3:                               ; @.str.3
	.asciz	"failed to enable axi_ck%d\n"

l_.str.4:                               ; @.str.4
	.asciz	"failed to enable obff_ck%d\n"

l_.str.5:                               ; @.str.5
	.asciz	"failed to enable pipe_ck%d\n"

l_.str.6:                               ; @.str.6
	.asciz	"failed to initialize port%d phy\n"

l_.str.7:                               ; @.str.7
	.asciz	"failed to power on port%d phy\n"

l_.str.8:                               ; @.str.8
	.asciz	"Port%d link down\n"

	.no_dead_strip	_mtk_pcie_enable_port
.subsections_via_symbols
