	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function iavf_enable_wb_on_itr
_iavf_enable_wb_on_itr:                 ## @iavf_enable_wb_on_itr
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	8(%rsi), %rax
	movq	_IAVF_TXR_FLAGS_WB_ON_ITR@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	testl	%ecx, (%rax)
	je	LBB0_3
## %bb.1:
	movq	%rsi, %rbx
	cmpl	$0, (%rsi)
	jne	LBB0_3
## %bb.2:
	movq	_IAVF_VFINT_DYN_CTLN1_WB_ON_ITR_MASK@GOTPCREL(%rip), %rax
	movq	_IAVF_VFINT_DYN_CTLN1_ITR_INDX_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %r14d
	orl	(%rax), %r14d
	movq	(%rdi), %r15
	movl	4(%rbx), %edi
	callq	_IAVF_VFINT_DYN_CTLN1
	movq	%r15, %rdi
	movl	%eax, %esi
	movl	%r14d, %edx
	callq	_wr32
	movl	$1, (%rbx)
LBB0_3:
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_IAVF_TXR_FLAGS_WB_ON_ITR,4,2   ## @IAVF_TXR_FLAGS_WB_ON_ITR
	.comm	_IAVF_VFINT_DYN_CTLN1_WB_ON_ITR_MASK,4,2 ## @IAVF_VFINT_DYN_CTLN1_WB_ON_ITR_MASK
	.comm	_IAVF_VFINT_DYN_CTLN1_ITR_INDX_MASK,4,2 ## @IAVF_VFINT_DYN_CTLN1_ITR_INDX_MASK
	.no_dead_strip	_iavf_enable_wb_on_itr
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function iavf_enable_wb_on_itr
_iavf_enable_wb_on_itr:                 ; @iavf_enable_wb_on_itr
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	ldr	x8, [x1, #8]
	ldr	w8, [x8]
Lloh0:
	adrp	x9, _IAVF_TXR_FLAGS_WB_ON_ITR@GOTPAGE
Lloh1:
	ldr	x9, [x9, _IAVF_TXR_FLAGS_WB_ON_ITR@GOTPAGEOFF]
Lloh2:
	ldr	w9, [x9]
	tst	w9, w8
	b.eq	LBB0_3
; %bb.1:
	mov	x19, x1
	ldr	w8, [x1]
	cbnz	w8, LBB0_3
; %bb.2:
Lloh3:
	adrp	x8, _IAVF_VFINT_DYN_CTLN1_WB_ON_ITR_MASK@GOTPAGE
Lloh4:
	ldr	x8, [x8, _IAVF_VFINT_DYN_CTLN1_WB_ON_ITR_MASK@GOTPAGEOFF]
Lloh5:
	ldr	w8, [x8]
Lloh6:
	adrp	x9, _IAVF_VFINT_DYN_CTLN1_ITR_INDX_MASK@GOTPAGE
Lloh7:
	ldr	x9, [x9, _IAVF_VFINT_DYN_CTLN1_ITR_INDX_MASK@GOTPAGEOFF]
Lloh8:
	ldr	w9, [x9]
	orr	w20, w9, w8
	ldr	x21, [x0]
	ldr	w0, [x19, #4]
	bl	_IAVF_VFINT_DYN_CTLN1
	mov	x1, x0
	mov	x0, x21
	mov	x2, x20
	bl	_wr32
	mov	w8, #1
	str	w8, [x19]
LBB0_3:
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.cfi_endproc
                                        ; -- End function
	.comm	_IAVF_TXR_FLAGS_WB_ON_ITR,4,2   ; @IAVF_TXR_FLAGS_WB_ON_ITR
	.comm	_IAVF_VFINT_DYN_CTLN1_WB_ON_ITR_MASK,4,2 ; @IAVF_VFINT_DYN_CTLN1_WB_ON_ITR_MASK
	.comm	_IAVF_VFINT_DYN_CTLN1_ITR_INDX_MASK,4,2 ; @IAVF_VFINT_DYN_CTLN1_ITR_INDX_MASK
	.no_dead_strip	_iavf_enable_wb_on_itr
.subsections_via_symbols
