	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function dw_pci_bottom_mask
_dw_pci_bottom_mask:                    ## @dw_pci_bottom_mask
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %rbx
	callq	_irq_data_get_irq_chip_data
	movq	%rax, %r14
	movq	%rax, %rdi
	callq	_raw_spin_lock_irqsave
	movl	(%rbx), %eax
	movq	_MAX_MSI_IRQS_PER_CTRL@GOTPCREL(%rip), %rcx
	xorl	%edx, %edx
	divl	(%rcx)
	movl	%eax, %r15d
	movl	%edx, %edi
	movq	_MSI_REG_CTRL_BLOCK_SIZE@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	imull	%r15d, %ebx
	callq	_BIT
	movq	8(%r14), %rcx
	orl	(%rcx,%r15,4), %eax
	movl	%eax, (%rcx,%r15,4)
	movq	_PCIE_MSI_INTR0_MASK@GOTPCREL(%rip), %rcx
	addq	(%rcx), %rbx
	movq	%r14, %rdi
	movq	%rbx, %rsi
	movl	$4, %edx
	movl	%eax, %ecx
	callq	_dw_pcie_wr_own_conf
	movq	%r14, %rdi
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_raw_spin_unlock_irqrestore     ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_MAX_MSI_IRQS_PER_CTRL,4,2      ## @MAX_MSI_IRQS_PER_CTRL
	.comm	_MSI_REG_CTRL_BLOCK_SIZE,4,2    ## @MSI_REG_CTRL_BLOCK_SIZE
	.comm	_PCIE_MSI_INTR0_MASK,8,3        ## @PCIE_MSI_INTR0_MASK
	.no_dead_strip	_dw_pci_bottom_mask
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function dw_pci_bottom_mask
_dw_pci_bottom_mask:                    ; @dw_pci_bottom_mask
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x0
	bl	_irq_data_get_irq_chip_data
	mov	x20, x0
	bl	_raw_spin_lock_irqsave
	ldr	w8, [x19]
Lloh0:
	adrp	x9, _MAX_MSI_IRQS_PER_CTRL@GOTPAGE
Lloh1:
	ldr	x9, [x9, _MAX_MSI_IRQS_PER_CTRL@GOTPAGEOFF]
Lloh2:
	ldr	w9, [x9]
	udiv	w19, w8, w9
Lloh3:
	adrp	x10, _MSI_REG_CTRL_BLOCK_SIZE@GOTPAGE
Lloh4:
	ldr	x10, [x10, _MSI_REG_CTRL_BLOCK_SIZE@GOTPAGEOFF]
Lloh5:
	ldr	w10, [x10]
	mul	w21, w10, w19
	msub	w0, w19, w9, w8
	bl	_BIT
	ldr	x8, [x20, #8]
	lsl	x9, x19, #2
	ldr	w10, [x8, x9]
	orr	w3, w10, w0
	str	w3, [x8, x9]
Lloh6:
	adrp	x8, _PCIE_MSI_INTR0_MASK@GOTPAGE
Lloh7:
	ldr	x8, [x8, _PCIE_MSI_INTR0_MASK@GOTPAGEOFF]
Lloh8:
	ldr	x8, [x8]
	add	x1, x8, x21
	mov	x0, x20
	mov	w2, #4
	bl	_dw_pcie_wr_own_conf
	mov	x0, x20
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	_raw_spin_unlock_irqrestore
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_MAX_MSI_IRQS_PER_CTRL,4,2      ; @MAX_MSI_IRQS_PER_CTRL
	.comm	_MSI_REG_CTRL_BLOCK_SIZE,4,2    ; @MSI_REG_CTRL_BLOCK_SIZE
	.comm	_PCIE_MSI_INTR0_MASK,8,3        ; @PCIE_MSI_INTR0_MASK
	.no_dead_strip	_dw_pci_bottom_mask
.subsections_via_symbols
