	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function rtl8169_init_phy
_rtl8169_init_phy:                      ## @rtl8169_init_phy
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r14
	pushq	%rbx
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	movq	%rsi, %rbx
	movq	%rdi, %r14
	callq	_rtl_hw_phy_config
	movq	(%rbx), %rax
	movq	_RTL_GIGA_MAC_VER_06@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jg	LBB0_2
## %bb.1:
	movl	12(%rbx), %edi
	movq	_PCI_LATENCY_TIMER@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	$64, %edx
	callq	_pci_write_config_byte
	movl	12(%rbx), %edi
	movq	_PCI_CACHE_LINE_SIZE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	$8, %edx
	callq	_pci_write_config_byte
	movq	_drv@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	leaq	L_.str(%rip), %rcx
	movq	%rbx, %rdi
	movq	%r14, %rdx
	callq	_netif_dbg
	movq	%rbx, %rdi
	movl	$130, %esi
	movl	$1, %edx
	callq	_RTL_W8
LBB0_2:
	movl	8(%rbx), %edi
	callq	_phy_speed_up
	movl	8(%rbx), %edi
	popq	%rbx
	popq	%r14
	popq	%rbp
	jmp	_genphy_soft_reset              ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_RTL_GIGA_MAC_VER_06,8,3        ## @RTL_GIGA_MAC_VER_06
	.comm	_PCI_LATENCY_TIMER,4,2          ## @PCI_LATENCY_TIMER
	.comm	_PCI_CACHE_LINE_SIZE,4,2        ## @PCI_CACHE_LINE_SIZE
	.comm	_drv,4,2                        ## @drv
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"Set MAC Reg C+CR Offset 0x82h = 0x01h\n"

	.no_dead_strip	_rtl8169_init_phy
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function rtl8169_init_phy
_rtl8169_init_phy:                      ; @rtl8169_init_phy
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x19, x1
	mov	x20, x0
	bl	_rtl_hw_phy_config
	ldr	x8, [x19]
Lloh0:
	adrp	x9, _RTL_GIGA_MAC_VER_06@GOTPAGE
Lloh1:
	ldr	x9, [x9, _RTL_GIGA_MAC_VER_06@GOTPAGEOFF]
Lloh2:
	ldr	x9, [x9]
	cmp	x8, x9
	b.gt	LBB0_2
; %bb.1:
	ldr	w0, [x19, #12]
Lloh3:
	adrp	x8, _PCI_LATENCY_TIMER@GOTPAGE
Lloh4:
	ldr	x8, [x8, _PCI_LATENCY_TIMER@GOTPAGEOFF]
Lloh5:
	ldr	w1, [x8]
	mov	w2, #64
	bl	_pci_write_config_byte
	ldr	w0, [x19, #12]
Lloh6:
	adrp	x8, _PCI_CACHE_LINE_SIZE@GOTPAGE
Lloh7:
	ldr	x8, [x8, _PCI_CACHE_LINE_SIZE@GOTPAGEOFF]
Lloh8:
	ldr	w1, [x8]
	mov	w2, #8
	bl	_pci_write_config_byte
Lloh9:
	adrp	x8, _drv@GOTPAGE
Lloh10:
	ldr	x8, [x8, _drv@GOTPAGEOFF]
Lloh11:
	ldr	w1, [x8]
Lloh12:
	adrp	x3, l_.str@PAGE
Lloh13:
	add	x3, x3, l_.str@PAGEOFF
	mov	x0, x19
	mov	x2, x20
	bl	_netif_dbg
	mov	x0, x19
	mov	w1, #130
	mov	w2, #1
	bl	_RTL_W8
LBB0_2:
	ldr	w0, [x19, #8]
	bl	_phy_speed_up
	ldr	w0, [x19, #8]
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	b	_genphy_soft_reset
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpAdd	Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.cfi_endproc
                                        ; -- End function
	.comm	_RTL_GIGA_MAC_VER_06,8,3        ; @RTL_GIGA_MAC_VER_06
	.comm	_PCI_LATENCY_TIMER,4,2          ; @PCI_LATENCY_TIMER
	.comm	_PCI_CACHE_LINE_SIZE,4,2        ; @PCI_CACHE_LINE_SIZE
	.comm	_drv,4,2                        ; @drv
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"Set MAC Reg C+CR Offset 0x82h = 0x01h\n"

	.no_dead_strip	_rtl8169_init_phy
.subsections_via_symbols
