	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function tegra_pcie_port_enable
_tegra_pcie_port_enable:                ## @tegra_pcie_port_enable
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %rbx
	callq	_tegra_pcie_port_get_pex_ctrl
	movq	%rax, %r14
	movq	8(%rbx), %rdi
	movq	(%rdi), %r15
	movq	%rax, %rsi
	callq	_afi_readl
	movq	_AFI_PEX_CTRL_REFCLK_EN@GOTPCREL(%rip), %rcx
	orq	(%rcx), %rax
	movq	16(%r15), %rcx
	testq	%rcx, %rcx
	je	LBB0_2
## %bb.1:
	movq	_AFI_PEX_CTRL_CLKREQ_EN@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rcx
LBB0_2:
	orq	%rcx, %rax
	movq	_AFI_PEX_CTRL_OVERRIDE_EN@GOTPCREL(%rip), %rcx
	orq	(%rcx), %rax
	movq	8(%rbx), %rdi
	movq	%rax, %rsi
	movq	%r14, %rdx
	callq	_afi_writel
	movq	%rbx, %rdi
	callq	_tegra_pcie_port_reset
	cmpq	$0, 8(%r15)
	je	LBB0_4
## %bb.3:
	movq	_RP_VEND_CTL2@GOTPCREL(%rip), %r14
	movq	(%r14), %rdi
	addq	(%rbx), %rdi
	callq	_readl
	movq	_RP_VEND_CTL2_PCA_ENABLE@GOTPCREL(%rip), %rcx
	orq	(%rcx), %rax
	movq	(%r14), %rsi
	addq	(%rbx), %rsi
	movq	%rax, %rdi
	callq	_writel
LBB0_4:
	movq	%rbx, %rdi
	callq	_tegra_pcie_enable_rp_features
	cmpq	$0, (%r15)
	je	LBB0_6
## %bb.5:
	movq	%rbx, %rdi
	callq	_tegra_pcie_program_ectl_settings
LBB0_6:
	movq	%rbx, %rdi
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_tegra_pcie_apply_sw_fixup      ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_AFI_PEX_CTRL_REFCLK_EN,8,3     ## @AFI_PEX_CTRL_REFCLK_EN
	.comm	_AFI_PEX_CTRL_CLKREQ_EN,8,3     ## @AFI_PEX_CTRL_CLKREQ_EN
	.comm	_AFI_PEX_CTRL_OVERRIDE_EN,8,3   ## @AFI_PEX_CTRL_OVERRIDE_EN
	.comm	_RP_VEND_CTL2,8,3               ## @RP_VEND_CTL2
	.comm	_RP_VEND_CTL2_PCA_ENABLE,8,3    ## @RP_VEND_CTL2_PCA_ENABLE
	.no_dead_strip	_tegra_pcie_port_enable
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function tegra_pcie_port_enable
_tegra_pcie_port_enable:                ; @tegra_pcie_port_enable
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x0
	bl	_tegra_pcie_port_get_pex_ctrl
	mov	x20, x0
	ldr	x0, [x19, #8]
	ldr	x21, [x0]
	mov	x1, x20
	bl	_afi_readl
Lloh0:
	adrp	x8, _AFI_PEX_CTRL_REFCLK_EN@GOTPAGE
Lloh1:
	ldr	x8, [x8, _AFI_PEX_CTRL_REFCLK_EN@GOTPAGEOFF]
Lloh2:
	ldr	x8, [x8]
	orr	x8, x8, x0
	ldr	x9, [x21, #16]
Lloh3:
	adrp	x10, _AFI_PEX_CTRL_CLKREQ_EN@GOTPAGE
Lloh4:
	ldr	x10, [x10, _AFI_PEX_CTRL_CLKREQ_EN@GOTPAGEOFF]
Lloh5:
	ldr	x10, [x10]
	cmp	x9, #0
	csel	x9, xzr, x10, eq
	orr	x8, x8, x9
Lloh6:
	adrp	x9, _AFI_PEX_CTRL_OVERRIDE_EN@GOTPAGE
Lloh7:
	ldr	x9, [x9, _AFI_PEX_CTRL_OVERRIDE_EN@GOTPAGEOFF]
Lloh8:
	ldr	x9, [x9]
	orr	x1, x8, x9
	ldr	x0, [x19, #8]
	mov	x2, x20
	bl	_afi_writel
	mov	x0, x19
	bl	_tegra_pcie_port_reset
	ldr	x8, [x21, #8]
	cbz	x8, LBB0_2
; %bb.1:
	ldr	x8, [x19]
Lloh9:
	adrp	x20, _RP_VEND_CTL2@GOTPAGE
Lloh10:
	ldr	x20, [x20, _RP_VEND_CTL2@GOTPAGEOFF]
	ldr	x9, [x20]
	add	x0, x9, x8
	bl	_readl
Lloh11:
	adrp	x8, _RP_VEND_CTL2_PCA_ENABLE@GOTPAGE
Lloh12:
	ldr	x8, [x8, _RP_VEND_CTL2_PCA_ENABLE@GOTPAGEOFF]
Lloh13:
	ldr	x8, [x8]
	orr	x0, x8, x0
	ldr	x8, [x19]
	ldr	x9, [x20]
	add	x1, x9, x8
	bl	_writel
LBB0_2:
	mov	x0, x19
	bl	_tegra_pcie_enable_rp_features
	ldr	x8, [x21]
	cbz	x8, LBB0_4
; %bb.3:
	mov	x0, x19
	bl	_tegra_pcie_program_ectl_settings
LBB0_4:
	mov	x0, x19
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	_tegra_pcie_apply_sw_fixup
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpLdrGot	Lloh9, Lloh10
	.cfi_endproc
                                        ; -- End function
	.comm	_AFI_PEX_CTRL_REFCLK_EN,8,3     ; @AFI_PEX_CTRL_REFCLK_EN
	.comm	_AFI_PEX_CTRL_CLKREQ_EN,8,3     ; @AFI_PEX_CTRL_CLKREQ_EN
	.comm	_AFI_PEX_CTRL_OVERRIDE_EN,8,3   ; @AFI_PEX_CTRL_OVERRIDE_EN
	.comm	_RP_VEND_CTL2,8,3               ; @RP_VEND_CTL2
	.comm	_RP_VEND_CTL2_PCA_ENABLE,8,3    ; @RP_VEND_CTL2_PCA_ENABLE
	.no_dead_strip	_tegra_pcie_port_enable
.subsections_via_symbols
