	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function mvpp2_prs_def_flow_init
_mvpp2_prs_def_flow_init:               ## @mvpp2_prs_def_flow_init
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	_MVPP2_MAX_PORTS@GOTPCREL(%rip), %rax
	cmpl	$0, (%rax)
	jle	LBB0_3
## %bb.1:
	movq	%rdi, %r12
	xorl	%r13d, %r13d
	xorl	%ebx, %ebx
	.p2align	4, 0x90
LBB0_2:                                 ## =>This Inner Loop Header: Depth=1
	leaq	-48(%rbp), %r15
	movq	%r15, %rdi
	xorl	%esi, %esi
	movl	$8, %edx
	callq	_memset
	movq	_MVPP2_PRS_LU_FLOWS@GOTPCREL(%rip), %r14
	movl	(%r14), %esi
	movq	%r15, %rdi
	callq	_mvpp2_prs_tcam_lu_set
	movq	_MVPP2_PE_FIRST_DEFAULT_FLOW@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	addq	%r13, %rax
	movq	%rax, -48(%rbp)
	movq	%r15, %rdi
	xorl	%esi, %esi
	callq	_mvpp2_prs_tcam_port_map_set
	movq	_MVPP2_PRS_FLOW_ID_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r15, %rdi
	movl	%ebx, %esi
	callq	_mvpp2_prs_sram_ai_update
	movq	_MVPP2_PRS_SRAM_LU_DONE_BIT@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r15, %rdi
	movl	$1, %edx
	callq	_mvpp2_prs_sram_bits_set
	movq	-48(%rbp), %rsi
	movl	(%r14), %edx
	movq	%r12, %rdi
	callq	_mvpp2_prs_shadow_set
	movq	%r12, %rdi
	movq	%r15, %rsi
	callq	_mvpp2_prs_hw_write
	movq	_MVPP2_MAX_PORTS@GOTPCREL(%rip), %rax
	incq	%rbx
	movslq	(%rax), %rax
	decq	%r13
	cmpq	%rax, %rbx
	jl	LBB0_2
LBB0_3:
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_MVPP2_MAX_PORTS,4,2            ## @MVPP2_MAX_PORTS
	.comm	_MVPP2_PRS_LU_FLOWS,4,2         ## @MVPP2_PRS_LU_FLOWS
	.comm	_MVPP2_PE_FIRST_DEFAULT_FLOW,8,3 ## @MVPP2_PE_FIRST_DEFAULT_FLOW
	.comm	_MVPP2_PRS_FLOW_ID_MASK,4,2     ## @MVPP2_PRS_FLOW_ID_MASK
	.comm	_MVPP2_PRS_SRAM_LU_DONE_BIT,4,2 ## @MVPP2_PRS_SRAM_LU_DONE_BIT
	.no_dead_strip	_mvpp2_prs_def_flow_init
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function mvpp2_prs_def_flow_init
_mvpp2_prs_def_flow_init:               ; @mvpp2_prs_def_flow_init
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #96
	.cfi_def_cfa_offset 96
	stp	x26, x25, [sp, #16]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #32]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #48]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #64]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #80]             ; 16-byte Folded Spill
	add	x29, sp, #80
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
Lloh0:
	adrp	x21, _MVPP2_MAX_PORTS@GOTPAGE
Lloh1:
	ldr	x21, [x21, _MVPP2_MAX_PORTS@GOTPAGEOFF]
	ldr	w8, [x21]
	cmp	w8, #1
	b.lt	LBB0_3
; %bb.1:
	mov	x19, x0
	mov	x22, #0
	mov	x20, #0
Lloh2:
	adrp	x23, _MVPP2_PRS_LU_FLOWS@GOTPAGE
Lloh3:
	ldr	x23, [x23, _MVPP2_PRS_LU_FLOWS@GOTPAGEOFF]
Lloh4:
	adrp	x24, _MVPP2_PE_FIRST_DEFAULT_FLOW@GOTPAGE
Lloh5:
	ldr	x24, [x24, _MVPP2_PE_FIRST_DEFAULT_FLOW@GOTPAGEOFF]
Lloh6:
	adrp	x25, _MVPP2_PRS_FLOW_ID_MASK@GOTPAGE
Lloh7:
	ldr	x25, [x25, _MVPP2_PRS_FLOW_ID_MASK@GOTPAGEOFF]
Lloh8:
	adrp	x26, _MVPP2_PRS_SRAM_LU_DONE_BIT@GOTPAGE
Lloh9:
	ldr	x26, [x26, _MVPP2_PRS_SRAM_LU_DONE_BIT@GOTPAGEOFF]
LBB0_2:                                 ; =>This Inner Loop Header: Depth=1
	add	x0, sp, #8
	mov	w1, #0
	mov	w2, #8
	bl	_memset
	ldr	w1, [x23]
	add	x0, sp, #8
	bl	_mvpp2_prs_tcam_lu_set
	ldr	x8, [x24]
	add	x8, x22, x8
	str	x8, [sp, #8]
	add	x0, sp, #8
	mov	w1, #0
	bl	_mvpp2_prs_tcam_port_map_set
	ldr	w2, [x25]
	add	x0, sp, #8
	mov	x1, x20
	bl	_mvpp2_prs_sram_ai_update
	ldr	w1, [x26]
	add	x0, sp, #8
	mov	w2, #1
	bl	_mvpp2_prs_sram_bits_set
	ldr	x1, [sp, #8]
	ldr	w2, [x23]
	mov	x0, x19
	bl	_mvpp2_prs_shadow_set
	add	x1, sp, #8
	mov	x0, x19
	bl	_mvpp2_prs_hw_write
	add	x20, x20, #1
	ldrsw	x8, [x21]
	sub	x22, x22, #1
	cmp	x20, x8
	b.lt	LBB0_2
LBB0_3:
	ldp	x29, x30, [sp, #80]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #64]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #48]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #32]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #96
	ret
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGot	Lloh8, Lloh9
	.loh AdrpLdrGot	Lloh6, Lloh7
	.loh AdrpLdrGot	Lloh4, Lloh5
	.loh AdrpLdrGot	Lloh2, Lloh3
	.cfi_endproc
                                        ; -- End function
	.comm	_MVPP2_MAX_PORTS,4,2            ; @MVPP2_MAX_PORTS
	.comm	_MVPP2_PRS_LU_FLOWS,4,2         ; @MVPP2_PRS_LU_FLOWS
	.comm	_MVPP2_PE_FIRST_DEFAULT_FLOW,8,3 ; @MVPP2_PE_FIRST_DEFAULT_FLOW
	.comm	_MVPP2_PRS_FLOW_ID_MASK,4,2     ; @MVPP2_PRS_FLOW_ID_MASK
	.comm	_MVPP2_PRS_SRAM_LU_DONE_BIT,4,2 ; @MVPP2_PRS_SRAM_LU_DONE_BIT
	.no_dead_strip	_mvpp2_prs_def_flow_init
.subsections_via_symbols
