	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function link_status_10g_bcom
_link_status_10g_bcom:                  ## @link_status_10g_bcom
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rsi, %r14
	movq	%rdi, %rbx
	movl	8(%rdi), %esi
	movq	_BCM8704_PMA_PMD_DEV_ADDR@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	_BCM8704_PMD_RCV_SIGDET@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	callq	_mdio_read
	testl	%eax, %eax
	js	LBB0_1
## %bb.2:
	movq	_PMD_RCV_SIGDET_GLOBAL@GOTPCREL(%rip), %rcx
	xorl	%r15d, %r15d
	testl	%eax, (%rcx)
	je	LBB0_8
## %bb.3:
	movl	8(%rbx), %esi
	movq	_BCM8704_PCS_DEV_ADDR@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	_BCM8704_PCS_10G_R_STATUS@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movq	%rbx, %rdi
	callq	_mdio_read
	testl	%eax, %eax
	js	LBB0_9
## %bb.4:
	movq	_PCS_10G_R_STATUS_BLK_LOCK@GOTPCREL(%rip), %rcx
	testl	%eax, (%rcx)
	je	LBB0_8
## %bb.5:
	movl	8(%rbx), %esi
	movq	_BCM8704_PHYXS_DEV_ADDR@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	_BCM8704_PHYXS_XGXS_LANE_STAT@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movq	%rbx, %rdi
	callq	_mdio_read
	testl	%eax, %eax
	js	LBB0_9
## %bb.6:
	movq	_PHYXS_XGXS_LANE_STAT_ALINGED@GOTPCREL(%rip), %rcx
	movq	_PHYXS_XGXS_LANE_STAT_MAGIC@GOTPCREL(%rip), %rdx
	movl	(%rdx), %edx
	orl	(%rcx), %edx
	movq	_PHYXS_XGXS_LANE_STAT_LANE3@GOTPCREL(%rip), %rcx
	orl	(%rcx), %edx
	movq	_PHYXS_XGXS_LANE_STAT_LANE2@GOTPCREL(%rip), %rcx
	orl	(%rcx), %edx
	movq	_PHYXS_XGXS_LANE_STAT_LANE1@GOTPCREL(%rip), %rcx
	orl	(%rcx), %edx
	movq	_PHYXS_XGXS_LANE_STAT_LANE0@GOTPCREL(%rip), %rcx
	orl	(%rcx), %edx
	cmpl	%edx, %eax
	jne	LBB0_8
## %bb.7:
	movq	_SPEED_10000@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 4(%rbx)
	movq	_DUPLEX_FULL@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, (%rbx)
	movl	$1, %r15d
LBB0_8:
	xorl	%eax, %eax
	jmp	LBB0_9
LBB0_1:
	xorl	%r15d, %r15d
LBB0_9:
	movl	%r15d, (%r14)
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_BCM8704_PMA_PMD_DEV_ADDR,4,2   ## @BCM8704_PMA_PMD_DEV_ADDR
	.comm	_BCM8704_PMD_RCV_SIGDET,4,2     ## @BCM8704_PMD_RCV_SIGDET
	.comm	_PMD_RCV_SIGDET_GLOBAL,4,2      ## @PMD_RCV_SIGDET_GLOBAL
	.comm	_BCM8704_PCS_DEV_ADDR,4,2       ## @BCM8704_PCS_DEV_ADDR
	.comm	_BCM8704_PCS_10G_R_STATUS,4,2   ## @BCM8704_PCS_10G_R_STATUS
	.comm	_PCS_10G_R_STATUS_BLK_LOCK,4,2  ## @PCS_10G_R_STATUS_BLK_LOCK
	.comm	_BCM8704_PHYXS_DEV_ADDR,4,2     ## @BCM8704_PHYXS_DEV_ADDR
	.comm	_BCM8704_PHYXS_XGXS_LANE_STAT,4,2 ## @BCM8704_PHYXS_XGXS_LANE_STAT
	.comm	_PHYXS_XGXS_LANE_STAT_ALINGED,4,2 ## @PHYXS_XGXS_LANE_STAT_ALINGED
	.comm	_PHYXS_XGXS_LANE_STAT_MAGIC,4,2 ## @PHYXS_XGXS_LANE_STAT_MAGIC
	.comm	_PHYXS_XGXS_LANE_STAT_LANE3,4,2 ## @PHYXS_XGXS_LANE_STAT_LANE3
	.comm	_PHYXS_XGXS_LANE_STAT_LANE2,4,2 ## @PHYXS_XGXS_LANE_STAT_LANE2
	.comm	_PHYXS_XGXS_LANE_STAT_LANE1,4,2 ## @PHYXS_XGXS_LANE_STAT_LANE1
	.comm	_PHYXS_XGXS_LANE_STAT_LANE0,4,2 ## @PHYXS_XGXS_LANE_STAT_LANE0
	.comm	_SPEED_10000,4,2                ## @SPEED_10000
	.comm	_DUPLEX_FULL,4,2                ## @DUPLEX_FULL
	.no_dead_strip	_link_status_10g_bcom
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function link_status_10g_bcom
_link_status_10g_bcom:                  ; @link_status_10g_bcom
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x19, x1
	mov	x20, x0
	ldr	w1, [x0, #8]
Lloh0:
	adrp	x8, _BCM8704_PMA_PMD_DEV_ADDR@GOTPAGE
Lloh1:
	ldr	x8, [x8, _BCM8704_PMA_PMD_DEV_ADDR@GOTPAGEOFF]
Lloh2:
	ldr	w2, [x8]
Lloh3:
	adrp	x8, _BCM8704_PMD_RCV_SIGDET@GOTPAGE
Lloh4:
	ldr	x8, [x8, _BCM8704_PMD_RCV_SIGDET@GOTPAGEOFF]
Lloh5:
	ldr	w3, [x8]
	bl	_mdio_read
	tbnz	w0, #31, LBB0_8
; %bb.1:
Lloh6:
	adrp	x8, _PMD_RCV_SIGDET_GLOBAL@GOTPAGE
Lloh7:
	ldr	x8, [x8, _PMD_RCV_SIGDET_GLOBAL@GOTPAGEOFF]
Lloh8:
	ldr	w8, [x8]
	tst	w8, w0
	b.eq	LBB0_7
; %bb.2:
	ldr	w1, [x20, #8]
Lloh9:
	adrp	x8, _BCM8704_PCS_DEV_ADDR@GOTPAGE
Lloh10:
	ldr	x8, [x8, _BCM8704_PCS_DEV_ADDR@GOTPAGEOFF]
Lloh11:
	ldr	w2, [x8]
Lloh12:
	adrp	x8, _BCM8704_PCS_10G_R_STATUS@GOTPAGE
Lloh13:
	ldr	x8, [x8, _BCM8704_PCS_10G_R_STATUS@GOTPAGEOFF]
Lloh14:
	ldr	w3, [x8]
	mov	x0, x20
	bl	_mdio_read
	tbnz	w0, #31, LBB0_8
; %bb.3:
Lloh15:
	adrp	x8, _PCS_10G_R_STATUS_BLK_LOCK@GOTPAGE
Lloh16:
	ldr	x8, [x8, _PCS_10G_R_STATUS_BLK_LOCK@GOTPAGEOFF]
Lloh17:
	ldr	w8, [x8]
	tst	w8, w0
	b.eq	LBB0_7
; %bb.4:
	ldr	w1, [x20, #8]
Lloh18:
	adrp	x8, _BCM8704_PHYXS_DEV_ADDR@GOTPAGE
Lloh19:
	ldr	x8, [x8, _BCM8704_PHYXS_DEV_ADDR@GOTPAGEOFF]
Lloh20:
	ldr	w2, [x8]
Lloh21:
	adrp	x8, _BCM8704_PHYXS_XGXS_LANE_STAT@GOTPAGE
Lloh22:
	ldr	x8, [x8, _BCM8704_PHYXS_XGXS_LANE_STAT@GOTPAGEOFF]
Lloh23:
	ldr	w3, [x8]
	mov	x0, x20
	bl	_mdio_read
	tbnz	w0, #31, LBB0_8
; %bb.5:
Lloh24:
	adrp	x8, _PHYXS_XGXS_LANE_STAT_ALINGED@GOTPAGE
Lloh25:
	ldr	x8, [x8, _PHYXS_XGXS_LANE_STAT_ALINGED@GOTPAGEOFF]
Lloh26:
	ldr	w8, [x8]
Lloh27:
	adrp	x9, _PHYXS_XGXS_LANE_STAT_MAGIC@GOTPAGE
Lloh28:
	ldr	x9, [x9, _PHYXS_XGXS_LANE_STAT_MAGIC@GOTPAGEOFF]
Lloh29:
	ldr	w9, [x9]
	orr	w8, w9, w8
Lloh30:
	adrp	x9, _PHYXS_XGXS_LANE_STAT_LANE3@GOTPAGE
Lloh31:
	ldr	x9, [x9, _PHYXS_XGXS_LANE_STAT_LANE3@GOTPAGEOFF]
Lloh32:
	ldr	w9, [x9]
Lloh33:
	adrp	x10, _PHYXS_XGXS_LANE_STAT_LANE2@GOTPAGE
Lloh34:
	ldr	x10, [x10, _PHYXS_XGXS_LANE_STAT_LANE2@GOTPAGEOFF]
	orr	w8, w8, w9
Lloh35:
	ldr	w9, [x10]
	orr	w8, w8, w9
Lloh36:
	adrp	x9, _PHYXS_XGXS_LANE_STAT_LANE1@GOTPAGE
Lloh37:
	ldr	x9, [x9, _PHYXS_XGXS_LANE_STAT_LANE1@GOTPAGEOFF]
Lloh38:
	ldr	w9, [x9]
	orr	w8, w8, w9
Lloh39:
	adrp	x9, _PHYXS_XGXS_LANE_STAT_LANE0@GOTPAGE
Lloh40:
	ldr	x9, [x9, _PHYXS_XGXS_LANE_STAT_LANE0@GOTPAGEOFF]
Lloh41:
	ldr	w9, [x9]
	orr	w8, w8, w9
	cmp	w0, w8
	b.ne	LBB0_7
; %bb.6:
	mov	w0, #0
Lloh42:
	adrp	x8, _SPEED_10000@GOTPAGE
Lloh43:
	ldr	x8, [x8, _SPEED_10000@GOTPAGEOFF]
Lloh44:
	ldr	w8, [x8]
Lloh45:
	adrp	x9, _DUPLEX_FULL@GOTPAGE
Lloh46:
	ldr	x9, [x9, _DUPLEX_FULL@GOTPAGEOFF]
Lloh47:
	ldr	w9, [x9]
	stp	w9, w8, [x20]
	mov	w8, #1
	b	LBB0_9
LBB0_7:
	mov	w0, #0
LBB0_8:
	mov	w8, #0
LBB0_9:
	str	w8, [x19]
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh39, Lloh40, Lloh41
	.loh AdrpLdrGotLdr	Lloh36, Lloh37, Lloh38
	.loh AdrpLdrGotLdr	Lloh33, Lloh34, Lloh35
	.loh AdrpLdrGotLdr	Lloh30, Lloh31, Lloh32
	.loh AdrpLdrGotLdr	Lloh27, Lloh28, Lloh29
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.loh AdrpLdrGotLdr	Lloh45, Lloh46, Lloh47
	.loh AdrpLdrGotLdr	Lloh42, Lloh43, Lloh44
	.cfi_endproc
                                        ; -- End function
	.comm	_BCM8704_PMA_PMD_DEV_ADDR,4,2   ; @BCM8704_PMA_PMD_DEV_ADDR
	.comm	_BCM8704_PMD_RCV_SIGDET,4,2     ; @BCM8704_PMD_RCV_SIGDET
	.comm	_PMD_RCV_SIGDET_GLOBAL,4,2      ; @PMD_RCV_SIGDET_GLOBAL
	.comm	_BCM8704_PCS_DEV_ADDR,4,2       ; @BCM8704_PCS_DEV_ADDR
	.comm	_BCM8704_PCS_10G_R_STATUS,4,2   ; @BCM8704_PCS_10G_R_STATUS
	.comm	_PCS_10G_R_STATUS_BLK_LOCK,4,2  ; @PCS_10G_R_STATUS_BLK_LOCK
	.comm	_BCM8704_PHYXS_DEV_ADDR,4,2     ; @BCM8704_PHYXS_DEV_ADDR
	.comm	_BCM8704_PHYXS_XGXS_LANE_STAT,4,2 ; @BCM8704_PHYXS_XGXS_LANE_STAT
	.comm	_PHYXS_XGXS_LANE_STAT_ALINGED,4,2 ; @PHYXS_XGXS_LANE_STAT_ALINGED
	.comm	_PHYXS_XGXS_LANE_STAT_MAGIC,4,2 ; @PHYXS_XGXS_LANE_STAT_MAGIC
	.comm	_PHYXS_XGXS_LANE_STAT_LANE3,4,2 ; @PHYXS_XGXS_LANE_STAT_LANE3
	.comm	_PHYXS_XGXS_LANE_STAT_LANE2,4,2 ; @PHYXS_XGXS_LANE_STAT_LANE2
	.comm	_PHYXS_XGXS_LANE_STAT_LANE1,4,2 ; @PHYXS_XGXS_LANE_STAT_LANE1
	.comm	_PHYXS_XGXS_LANE_STAT_LANE0,4,2 ; @PHYXS_XGXS_LANE_STAT_LANE0
	.comm	_SPEED_10000,4,2                ; @SPEED_10000
	.comm	_DUPLEX_FULL,4,2                ; @DUPLEX_FULL
	.no_dead_strip	_link_status_10g_bcom
.subsections_via_symbols
