	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function sky2_phy_power_down
_sky2_phy_power_down:                   ## @sky2_phy_power_down
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%esi, %r14d
	movq	%rdi, %rbx
	movq	_GPHY_CTRL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	%r14d, %edi
	callq	_SK_REG
	movq	_GPC_RST_CLR@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	movq	%rbx, %rdi
	movl	%eax, %esi
	callq	_sky2_write8
	movq	_GMAC_CTRL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	%r14d, %edi
	callq	_SK_REG
	movq	_GMC_RST_CLR@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	movq	%rbx, %rdi
	movl	%eax, %esi
	callq	_sky2_write8
	movq	_SKY2_HW_NEWER_PHY@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	testl	%eax, (%rbx)
	je	LBB0_2
## %bb.1:
	movq	_PHY_MARV_EXT_ADR@GOTPCREL(%rip), %r15
	movl	(%r15), %edx
	movq	%rbx, %rdi
	movl	%r14d, %esi
	movl	$2, %ecx
	callq	_gm_phy_write
	movq	_PHY_MARV_PHY_CTRL@GOTPCREL(%rip), %r12
	movl	(%r12), %edx
	movq	%rbx, %rdi
	movl	%r14d, %esi
	callq	_gm_phy_read
	movq	_PHY_M_MAC_GMIF_PUP@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	notl	%ecx
	andl	%eax, %ecx
	movl	(%r12), %edx
	movq	%rbx, %rdi
	movl	%r14d, %esi
	callq	_gm_phy_write
	movl	(%r15), %edx
	movq	%rbx, %rdi
	movl	%r14d, %esi
	xorl	%ecx, %ecx
	callq	_gm_phy_write
LBB0_2:
	movq	_GM_GPCR_FL_PASS@GOTPCREL(%rip), %rax
	movq	_GM_GPCR_SPEED_100@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	orl	(%rax), %ecx
	movq	_GM_GPCR_AU_DUP_DIS@GOTPCREL(%rip), %rax
	orl	(%rax), %ecx
	movq	_GM_GP_CTRL@GOTPCREL(%rip), %rax
	movq	_GM_GPCR_AU_FCT_DIS@GOTPCREL(%rip), %rdx
	orl	(%rdx), %ecx
	movl	(%rax), %edx
	movq	_GM_GPCR_AU_SPD_DIS@GOTPCREL(%rip), %rax
	orl	(%rax), %ecx
	movq	%rbx, %rdi
	movl	%r14d, %esi
	callq	_gma_write16
	movq	8(%rbx), %rax
	movq	_CHIP_ID_YUKON_EC@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	je	LBB0_6
## %bb.3:
	movq	_CHIP_ID_YUKON_EC_U@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jne	LBB0_5
## %bb.4:
	movq	_PHY_MARV_EXT_ADR@GOTPCREL(%rip), %r15
	movl	(%r15), %edx
	movq	%rbx, %rdi
	movl	%r14d, %esi
	movl	$2, %ecx
	callq	_gm_phy_write
	movq	_PHY_MARV_PHY_CTRL@GOTPCREL(%rip), %r12
	movl	(%r12), %edx
	movq	%rbx, %rdi
	movl	%r14d, %esi
	callq	_gm_phy_read
	movq	_PHY_M_PC_POW_D_ENA@GOTPCREL(%rip), %rcx
	orl	(%rcx), %eax
	movl	(%r12), %edx
	movq	%rbx, %rdi
	movl	%r14d, %esi
	movl	%eax, %ecx
	callq	_gm_phy_write
	movl	(%r15), %edx
	movq	%rbx, %rdi
	movl	%r14d, %esi
	xorl	%ecx, %ecx
	callq	_gm_phy_write
LBB0_5:
	movq	_PHY_MARV_CTRL@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	_PHY_CT_PDOWN@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movq	%rbx, %rdi
	movl	%r14d, %esi
	callq	_gm_phy_write
LBB0_6:
	movq	_B2_TST_CTRL1@GOTPCREL(%rip), %r15
	movl	(%r15), %esi
	movq	_TST_CFG_WRITE_ON@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	callq	_sky2_write8
	movq	_PCI_DEV_REG1@GOTPCREL(%rip), %r12
	movl	(%r12), %esi
	movq	%rbx, %rdi
	callq	_sky2_pci_read32
	movq	_phy_power@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rcx
	movl	%r14d, %edx
	orl	(%rcx,%rdx,4), %eax
	movl	(%r12), %esi
	movq	%rbx, %rdi
	movl	%eax, %edx
	callq	_sky2_pci_write32
	movl	(%r15), %esi
	movq	_TST_CFG_WRITE_OFF@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_sky2_write8                    ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_GPHY_CTRL,4,2                  ## @GPHY_CTRL
	.comm	_GPC_RST_CLR,4,2                ## @GPC_RST_CLR
	.comm	_GMAC_CTRL,4,2                  ## @GMAC_CTRL
	.comm	_GMC_RST_CLR,4,2                ## @GMC_RST_CLR
	.comm	_SKY2_HW_NEWER_PHY,4,2          ## @SKY2_HW_NEWER_PHY
	.comm	_PHY_MARV_EXT_ADR,4,2           ## @PHY_MARV_EXT_ADR
	.comm	_PHY_MARV_PHY_CTRL,4,2          ## @PHY_MARV_PHY_CTRL
	.comm	_PHY_M_MAC_GMIF_PUP,4,2         ## @PHY_M_MAC_GMIF_PUP
	.comm	_GM_GP_CTRL,4,2                 ## @GM_GP_CTRL
	.comm	_GM_GPCR_FL_PASS,4,2            ## @GM_GPCR_FL_PASS
	.comm	_GM_GPCR_SPEED_100,4,2          ## @GM_GPCR_SPEED_100
	.comm	_GM_GPCR_AU_DUP_DIS,4,2         ## @GM_GPCR_AU_DUP_DIS
	.comm	_GM_GPCR_AU_FCT_DIS,4,2         ## @GM_GPCR_AU_FCT_DIS
	.comm	_GM_GPCR_AU_SPD_DIS,4,2         ## @GM_GPCR_AU_SPD_DIS
	.comm	_CHIP_ID_YUKON_EC,8,3           ## @CHIP_ID_YUKON_EC
	.comm	_CHIP_ID_YUKON_EC_U,8,3         ## @CHIP_ID_YUKON_EC_U
	.comm	_PHY_M_PC_POW_D_ENA,4,2         ## @PHY_M_PC_POW_D_ENA
	.comm	_PHY_MARV_CTRL,4,2              ## @PHY_MARV_CTRL
	.comm	_PHY_CT_PDOWN,4,2               ## @PHY_CT_PDOWN
	.comm	_B2_TST_CTRL1,4,2               ## @B2_TST_CTRL1
	.comm	_TST_CFG_WRITE_ON,4,2           ## @TST_CFG_WRITE_ON
	.comm	_PCI_DEV_REG1,4,2               ## @PCI_DEV_REG1
	.comm	_phy_power,8,3                  ## @phy_power
	.comm	_TST_CFG_WRITE_OFF,4,2          ## @TST_CFG_WRITE_OFF
	.no_dead_strip	_sky2_phy_power_down
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function sky2_phy_power_down
_sky2_phy_power_down:                   ; @sky2_phy_power_down
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x20, x1
	mov	x19, x0
Lloh0:
	adrp	x8, _GPHY_CTRL@GOTPAGE
Lloh1:
	ldr	x8, [x8, _GPHY_CTRL@GOTPAGEOFF]
Lloh2:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_SK_REG
	mov	x1, x0
Lloh3:
	adrp	x8, _GPC_RST_CLR@GOTPAGE
Lloh4:
	ldr	x8, [x8, _GPC_RST_CLR@GOTPAGEOFF]
Lloh5:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_sky2_write8
Lloh6:
	adrp	x8, _GMAC_CTRL@GOTPAGE
Lloh7:
	ldr	x8, [x8, _GMAC_CTRL@GOTPAGEOFF]
Lloh8:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_SK_REG
	mov	x1, x0
Lloh9:
	adrp	x8, _GMC_RST_CLR@GOTPAGE
Lloh10:
	ldr	x8, [x8, _GMC_RST_CLR@GOTPAGEOFF]
Lloh11:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_sky2_write8
	ldr	w8, [x19]
Lloh12:
	adrp	x9, _SKY2_HW_NEWER_PHY@GOTPAGE
Lloh13:
	ldr	x9, [x9, _SKY2_HW_NEWER_PHY@GOTPAGEOFF]
Lloh14:
	ldr	w9, [x9]
	tst	w9, w8
	b.eq	LBB0_2
; %bb.1:
Lloh15:
	adrp	x21, _PHY_MARV_EXT_ADR@GOTPAGE
Lloh16:
	ldr	x21, [x21, _PHY_MARV_EXT_ADR@GOTPAGEOFF]
	ldr	w2, [x21]
	mov	x0, x19
	mov	x1, x20
	mov	w3, #2
	bl	_gm_phy_write
Lloh17:
	adrp	x22, _PHY_MARV_PHY_CTRL@GOTPAGE
Lloh18:
	ldr	x22, [x22, _PHY_MARV_PHY_CTRL@GOTPAGEOFF]
	ldr	w2, [x22]
	mov	x0, x19
	mov	x1, x20
	bl	_gm_phy_read
Lloh19:
	adrp	x8, _PHY_M_MAC_GMIF_PUP@GOTPAGE
Lloh20:
	ldr	x8, [x8, _PHY_M_MAC_GMIF_PUP@GOTPAGEOFF]
Lloh21:
	ldr	w8, [x8]
	bic	w3, w0, w8
	ldr	w2, [x22]
	mov	x0, x19
	mov	x1, x20
	bl	_gm_phy_write
	ldr	w2, [x21]
	mov	x0, x19
	mov	x1, x20
	mov	w3, #0
	bl	_gm_phy_write
LBB0_2:
Lloh22:
	adrp	x8, _GM_GP_CTRL@GOTPAGE
Lloh23:
	ldr	x8, [x8, _GM_GP_CTRL@GOTPAGEOFF]
Lloh24:
	adrp	x9, _GM_GPCR_FL_PASS@GOTPAGE
Lloh25:
	ldr	x9, [x9, _GM_GPCR_FL_PASS@GOTPAGEOFF]
Lloh26:
	ldr	w2, [x8]
Lloh27:
	ldr	w8, [x9]
Lloh28:
	adrp	x9, _GM_GPCR_SPEED_100@GOTPAGE
Lloh29:
	ldr	x9, [x9, _GM_GPCR_SPEED_100@GOTPAGEOFF]
Lloh30:
	ldr	w9, [x9]
	orr	w8, w9, w8
Lloh31:
	adrp	x9, _GM_GPCR_AU_DUP_DIS@GOTPAGE
Lloh32:
	ldr	x9, [x9, _GM_GPCR_AU_DUP_DIS@GOTPAGEOFF]
Lloh33:
	ldr	w9, [x9]
	orr	w8, w8, w9
Lloh34:
	adrp	x9, _GM_GPCR_AU_FCT_DIS@GOTPAGE
Lloh35:
	ldr	x9, [x9, _GM_GPCR_AU_FCT_DIS@GOTPAGEOFF]
Lloh36:
	ldr	w9, [x9]
	orr	w8, w8, w9
Lloh37:
	adrp	x9, _GM_GPCR_AU_SPD_DIS@GOTPAGE
Lloh38:
	ldr	x9, [x9, _GM_GPCR_AU_SPD_DIS@GOTPAGEOFF]
Lloh39:
	ldr	w9, [x9]
	orr	w3, w8, w9
	mov	x0, x19
	mov	x1, x20
	bl	_gma_write16
	ldr	x8, [x19, #8]
Lloh40:
	adrp	x9, _CHIP_ID_YUKON_EC@GOTPAGE
Lloh41:
	ldr	x9, [x9, _CHIP_ID_YUKON_EC@GOTPAGEOFF]
Lloh42:
	ldr	x9, [x9]
	cmp	x8, x9
	b.eq	LBB0_6
; %bb.3:
Lloh43:
	adrp	x9, _CHIP_ID_YUKON_EC_U@GOTPAGE
Lloh44:
	ldr	x9, [x9, _CHIP_ID_YUKON_EC_U@GOTPAGEOFF]
Lloh45:
	ldr	x9, [x9]
	cmp	x8, x9
	b.ne	LBB0_5
; %bb.4:
Lloh46:
	adrp	x21, _PHY_MARV_EXT_ADR@GOTPAGE
Lloh47:
	ldr	x21, [x21, _PHY_MARV_EXT_ADR@GOTPAGEOFF]
	ldr	w2, [x21]
	mov	x0, x19
	mov	x1, x20
	mov	w3, #2
	bl	_gm_phy_write
Lloh48:
	adrp	x22, _PHY_MARV_PHY_CTRL@GOTPAGE
Lloh49:
	ldr	x22, [x22, _PHY_MARV_PHY_CTRL@GOTPAGEOFF]
	ldr	w2, [x22]
	mov	x0, x19
	mov	x1, x20
	bl	_gm_phy_read
Lloh50:
	adrp	x8, _PHY_M_PC_POW_D_ENA@GOTPAGE
Lloh51:
	ldr	x8, [x8, _PHY_M_PC_POW_D_ENA@GOTPAGEOFF]
Lloh52:
	ldr	w8, [x8]
	orr	w3, w8, w0
	ldr	w2, [x22]
	mov	x0, x19
	mov	x1, x20
	bl	_gm_phy_write
	ldr	w2, [x21]
	mov	x0, x19
	mov	x1, x20
	mov	w3, #0
	bl	_gm_phy_write
LBB0_5:
Lloh53:
	adrp	x8, _PHY_MARV_CTRL@GOTPAGE
Lloh54:
	ldr	x8, [x8, _PHY_MARV_CTRL@GOTPAGEOFF]
Lloh55:
	ldr	w2, [x8]
Lloh56:
	adrp	x8, _PHY_CT_PDOWN@GOTPAGE
Lloh57:
	ldr	x8, [x8, _PHY_CT_PDOWN@GOTPAGEOFF]
Lloh58:
	ldr	w3, [x8]
	mov	x0, x19
	mov	x1, x20
	bl	_gm_phy_write
LBB0_6:
Lloh59:
	adrp	x21, _B2_TST_CTRL1@GOTPAGE
Lloh60:
	ldr	x21, [x21, _B2_TST_CTRL1@GOTPAGEOFF]
	ldr	w1, [x21]
Lloh61:
	adrp	x8, _TST_CFG_WRITE_ON@GOTPAGE
Lloh62:
	ldr	x8, [x8, _TST_CFG_WRITE_ON@GOTPAGEOFF]
Lloh63:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_sky2_write8
Lloh64:
	adrp	x22, _PCI_DEV_REG1@GOTPAGE
Lloh65:
	ldr	x22, [x22, _PCI_DEV_REG1@GOTPAGEOFF]
	ldr	w1, [x22]
	mov	x0, x19
	bl	_sky2_pci_read32
Lloh66:
	adrp	x8, _phy_power@GOTPAGE
Lloh67:
	ldr	x8, [x8, _phy_power@GOTPAGEOFF]
Lloh68:
	ldr	x8, [x8]
	ldr	w8, [x8, w20, uxtw #2]
	orr	w2, w8, w0
	ldr	w1, [x22]
	mov	x0, x19
	bl	_sky2_pci_write32
	ldr	w1, [x21]
Lloh69:
	adrp	x8, _TST_CFG_WRITE_OFF@GOTPAGE
Lloh70:
	ldr	x8, [x8, _TST_CFG_WRITE_OFF@GOTPAGEOFF]
Lloh71:
	ldr	w2, [x8]
	mov	x0, x19
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	_sky2_write8
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh19, Lloh20, Lloh21
	.loh AdrpLdrGot	Lloh17, Lloh18
	.loh AdrpLdrGot	Lloh15, Lloh16
	.loh AdrpLdrGotLdr	Lloh40, Lloh41, Lloh42
	.loh AdrpLdrGotLdr	Lloh37, Lloh38, Lloh39
	.loh AdrpLdrGotLdr	Lloh34, Lloh35, Lloh36
	.loh AdrpLdrGotLdr	Lloh31, Lloh32, Lloh33
	.loh AdrpLdrGotLdr	Lloh28, Lloh29, Lloh30
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh27
	.loh AdrpLdrGotLdr	Lloh22, Lloh23, Lloh26
	.loh AdrpLdrGotLdr	Lloh43, Lloh44, Lloh45
	.loh AdrpLdrGotLdr	Lloh50, Lloh51, Lloh52
	.loh AdrpLdrGot	Lloh48, Lloh49
	.loh AdrpLdrGot	Lloh46, Lloh47
	.loh AdrpLdrGotLdr	Lloh56, Lloh57, Lloh58
	.loh AdrpLdrGotLdr	Lloh53, Lloh54, Lloh55
	.loh AdrpLdrGotLdr	Lloh69, Lloh70, Lloh71
	.loh AdrpLdrGotLdr	Lloh66, Lloh67, Lloh68
	.loh AdrpLdrGot	Lloh64, Lloh65
	.loh AdrpLdrGotLdr	Lloh61, Lloh62, Lloh63
	.loh AdrpLdrGot	Lloh59, Lloh60
	.cfi_endproc
                                        ; -- End function
	.comm	_GPHY_CTRL,4,2                  ; @GPHY_CTRL
	.comm	_GPC_RST_CLR,4,2                ; @GPC_RST_CLR
	.comm	_GMAC_CTRL,4,2                  ; @GMAC_CTRL
	.comm	_GMC_RST_CLR,4,2                ; @GMC_RST_CLR
	.comm	_SKY2_HW_NEWER_PHY,4,2          ; @SKY2_HW_NEWER_PHY
	.comm	_PHY_MARV_EXT_ADR,4,2           ; @PHY_MARV_EXT_ADR
	.comm	_PHY_MARV_PHY_CTRL,4,2          ; @PHY_MARV_PHY_CTRL
	.comm	_PHY_M_MAC_GMIF_PUP,4,2         ; @PHY_M_MAC_GMIF_PUP
	.comm	_GM_GP_CTRL,4,2                 ; @GM_GP_CTRL
	.comm	_GM_GPCR_FL_PASS,4,2            ; @GM_GPCR_FL_PASS
	.comm	_GM_GPCR_SPEED_100,4,2          ; @GM_GPCR_SPEED_100
	.comm	_GM_GPCR_AU_DUP_DIS,4,2         ; @GM_GPCR_AU_DUP_DIS
	.comm	_GM_GPCR_AU_FCT_DIS,4,2         ; @GM_GPCR_AU_FCT_DIS
	.comm	_GM_GPCR_AU_SPD_DIS,4,2         ; @GM_GPCR_AU_SPD_DIS
	.comm	_CHIP_ID_YUKON_EC,8,3           ; @CHIP_ID_YUKON_EC
	.comm	_CHIP_ID_YUKON_EC_U,8,3         ; @CHIP_ID_YUKON_EC_U
	.comm	_PHY_M_PC_POW_D_ENA,4,2         ; @PHY_M_PC_POW_D_ENA
	.comm	_PHY_MARV_CTRL,4,2              ; @PHY_MARV_CTRL
	.comm	_PHY_CT_PDOWN,4,2               ; @PHY_CT_PDOWN
	.comm	_B2_TST_CTRL1,4,2               ; @B2_TST_CTRL1
	.comm	_TST_CFG_WRITE_ON,4,2           ; @TST_CFG_WRITE_ON
	.comm	_PCI_DEV_REG1,4,2               ; @PCI_DEV_REG1
	.comm	_phy_power,8,3                  ; @phy_power
	.comm	_TST_CFG_WRITE_OFF,4,2          ; @TST_CFG_WRITE_OFF
	.no_dead_strip	_sky2_phy_power_down
.subsections_via_symbols
