	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function mlxsw_sp1_acl_ctcam_region_catchall_add
_mlxsw_sp1_acl_ctcam_region_catchall_add: ## @mlxsw_sp1_acl_ctcam_region_catchall_add
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rsi, %r14
	movq	%rdi, %r12
	leaq	24(%rsi), %rbx
	movq	_MLXSW_SP_ACL_TCAM_CATCHALL_PRIO@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	callq	_mlxsw_sp_acl_ctcam_chunk_init
	movl	(%r12), %edi
	xorl	%esi, %esi
	callq	_mlxsw_sp_acl_rulei_create
	movq	%rax, %r13
	movq	%rax, %rdi
	callq	_IS_ERR
	testq	%rax, %rax
	je	LBB0_2
## %bb.1:
	movq	%r13, %rdi
	callq	_PTR_ERR
	movl	%eax, %r15d
	jmp	LBB0_7
LBB0_2:
	movq	%r13, %rdi
	callq	_mlxsw_sp_acl_rulei_act_continue
	movl	%eax, %r15d
	movl	%eax, %edi
	callq	_WARN_ON
	testq	%rax, %rax
	jne	LBB0_6
## %bb.3:
	movq	%r13, %rdi
	callq	_mlxsw_sp_acl_rulei_commit
	movl	%eax, %r15d
	testl	%eax, %eax
	jne	LBB0_6
## %bb.4:
	leaq	16(%r14), %rcx
	movq	%rbx, %rsi
	xorl	%ebx, %ebx
	movq	%r12, %rdi
	movq	%r14, %rdx
	movq	%r13, %r8
	xorl	%r9d, %r9d
	callq	_mlxsw_sp_acl_ctcam_entry_add
	movl	%eax, %r15d
	testl	%eax, %eax
	je	LBB0_5
LBB0_6:
	movq	%r13, %rdi
	callq	_mlxsw_sp_acl_rulei_destroy
LBB0_7:
	movq	%r14, %rdi
	callq	_mlxsw_sp_acl_ctcam_chunk_fini
	movl	%r15d, %ebx
LBB0_8:
	movl	%ebx, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_5:
	movq	%r13, 8(%r14)
	jmp	LBB0_8
	.cfi_endproc
                                        ## -- End function
	.comm	_MLXSW_SP_ACL_TCAM_CATCHALL_PRIO,4,2 ## @MLXSW_SP_ACL_TCAM_CATCHALL_PRIO
	.no_dead_strip	_mlxsw_sp1_acl_ctcam_region_catchall_add
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function mlxsw_sp1_acl_ctcam_region_catchall_add
_mlxsw_sp1_acl_ctcam_region_catchall_add: ; @mlxsw_sp1_acl_ctcam_region_catchall_add
	.cfi_startproc
; %bb.0:
	stp	x24, x23, [sp, #-64]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x19, x1
	mov	x21, x0
	add	x22, x1, #24
Lloh0:
	adrp	x8, _MLXSW_SP_ACL_TCAM_CATCHALL_PRIO@GOTPAGE
Lloh1:
	ldr	x8, [x8, _MLXSW_SP_ACL_TCAM_CATCHALL_PRIO@GOTPAGEOFF]
Lloh2:
	ldr	w2, [x8]
	mov	x0, x22
	bl	_mlxsw_sp_acl_ctcam_chunk_init
	ldr	w0, [x21]
	mov	x1, #0
	bl	_mlxsw_sp_acl_rulei_create
	mov	x20, x0
	bl	_IS_ERR
	cbz	x0, LBB0_2
; %bb.1:
	mov	x0, x20
	bl	_PTR_ERR
	mov	x23, x0
	b	LBB0_6
LBB0_2:
	mov	x0, x20
	bl	_mlxsw_sp_acl_rulei_act_continue
	mov	x23, x0
	bl	_WARN_ON
	cbnz	x0, LBB0_5
; %bb.3:
	mov	x0, x20
	bl	_mlxsw_sp_acl_rulei_commit
	mov	x23, x0
	cbnz	w0, LBB0_5
; %bb.4:
	add	x3, x19, #16
	mov	x0, x21
	mov	x1, x22
	mov	x2, x19
	mov	x4, x20
	mov	w5, #0
	bl	_mlxsw_sp_acl_ctcam_entry_add
	mov	x23, x0
	cbz	w0, LBB0_8
LBB0_5:
	mov	x0, x20
	bl	_mlxsw_sp_acl_rulei_destroy
LBB0_6:
	mov	x0, x19
	bl	_mlxsw_sp_acl_ctcam_chunk_fini
LBB0_7:
	mov	x0, x23
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	ret
LBB0_8:
	str	x20, [x19, #8]
	b	LBB0_7
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_MLXSW_SP_ACL_TCAM_CATCHALL_PRIO,4,2 ; @MLXSW_SP_ACL_TCAM_CATCHALL_PRIO
	.no_dead_strip	_mlxsw_sp1_acl_ctcam_region_catchall_add
.subsections_via_symbols
