	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function rcar_pcie_setup_window
_rcar_pcie_setup_window:                ## @rcar_pcie_setup_window
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdx, %r15
	movq	%rsi, %r14
	movl	%edi, %r12d
	callq	_PCIEPTCTLR
	movq	%r14, %rdi
	xorl	%esi, %esi
	movl	%eax, %edx
	callq	_rcar_pci_write_reg
	movq	%r15, %rdi
	callq	_resource_size
	movl	%eax, %edi
	callq	_roundup_pow_of_two
	movq	_SZ_128@GOTPCREL(%rip), %rcx
	cltd
	idivl	(%rcx)
                                        ## kill: def $eax killed $eax def $rax
	shll	$7, %eax
	leal	-128(%rax), %ebx
	movl	%r12d, %edi
	callq	_PCIEPAMR
	movq	%r14, %rdi
	movl	%ebx, %esi
	movl	%eax, %edx
	callq	_rcar_pci_write_reg
	movq	_IORESOURCE_IO@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	4(%r15), %ebx
	testl	%eax, (%r15)
	je	LBB0_2
## %bb.1:
	movl	%ebx, %edi
	callq	_pci_pio_to_address
	movl	%eax, %ebx
LBB0_2:
	movl	%ebx, %edi
	callq	_upper_32_bits
	movl	%eax, %r13d
	movl	%r12d, %edi
	callq	_PCIEPAUR
	movq	%r14, %rdi
	movl	%r13d, %esi
	movl	%eax, %edx
	callq	_rcar_pci_write_reg
	movl	%ebx, %edi
	callq	_lower_32_bits
	movl	%eax, %ebx
	andl	$-128, %ebx
	movl	%r12d, %edi
	callq	_PCIEPALR
	movq	%r14, %rdi
	movl	%ebx, %esi
	movl	%eax, %edx
	callq	_rcar_pci_write_reg
	movq	_PAR_ENABLE@GOTPCREL(%rip), %rax
	movq	_IORESOURCE_IO@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ebx
	andl	(%r15), %ebx
	je	LBB0_4
## %bb.3:
	movq	_IO_SPACE@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ebx
LBB0_4:
	orl	(%rax), %ebx
	movl	%r12d, %edi
	callq	_PCIEPTCTLR
	movq	%r14, %rdi
	movl	%ebx, %esi
	movl	%eax, %edx
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_rcar_pci_write_reg             ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_SZ_128,4,2                     ## @SZ_128
	.comm	_IORESOURCE_IO,4,2              ## @IORESOURCE_IO
	.comm	_PAR_ENABLE,4,2                 ## @PAR_ENABLE
	.comm	_IO_SPACE,4,2                   ## @IO_SPACE
	.no_dead_strip	_rcar_pcie_setup_window
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function rcar_pcie_setup_window
_rcar_pcie_setup_window:                ; @rcar_pcie_setup_window
	.cfi_startproc
; %bb.0:
	stp	x24, x23, [sp, #-64]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x21, x2
	mov	x19, x1
	mov	x20, x0
	bl	_PCIEPTCTLR
	mov	x2, x0
	mov	x0, x19
	mov	w1, #0
	bl	_rcar_pci_write_reg
	mov	x0, x21
	bl	_resource_size
	bl	_roundup_pow_of_two
Lloh0:
	adrp	x8, _SZ_128@GOTPAGE
Lloh1:
	ldr	x8, [x8, _SZ_128@GOTPAGEOFF]
Lloh2:
	ldr	w8, [x8]
	sdiv	w8, w0, w8
	lsl	w8, w8, #7
	sub	w22, w8, #128
	mov	x0, x20
	bl	_PCIEPAMR
	mov	x2, x0
	mov	x0, x19
	mov	x1, x22
	bl	_rcar_pci_write_reg
Lloh3:
	adrp	x24, _IORESOURCE_IO@GOTPAGE
Lloh4:
	ldr	x24, [x24, _IORESOURCE_IO@GOTPAGEOFF]
	ldr	w8, [x24]
	ldp	w9, w22, [x21]
	tst	w8, w9
	b.eq	LBB0_2
; %bb.1:
	mov	x0, x22
	bl	_pci_pio_to_address
	mov	x22, x0
LBB0_2:
	mov	x0, x22
	bl	_upper_32_bits
	mov	x23, x0
	mov	x0, x20
	bl	_PCIEPAUR
	mov	x2, x0
	mov	x0, x19
	mov	x1, x23
	bl	_rcar_pci_write_reg
	mov	x0, x22
	bl	_lower_32_bits
	and	w22, w0, #0xffffff80
	mov	x0, x20
	bl	_PCIEPALR
	mov	x2, x0
	mov	x0, x19
	mov	x1, x22
	bl	_rcar_pci_write_reg
Lloh5:
	adrp	x8, _PAR_ENABLE@GOTPAGE
Lloh6:
	ldr	x8, [x8, _PAR_ENABLE@GOTPAGEOFF]
Lloh7:
	ldr	w8, [x8]
	ldr	w9, [x21]
	ldr	w10, [x24]
Lloh8:
	adrp	x11, _IO_SPACE@GOTPAGE
Lloh9:
	ldr	x11, [x11, _IO_SPACE@GOTPAGEOFF]
Lloh10:
	ldr	w11, [x11]
	tst	w10, w9
	csel	w9, wzr, w11, eq
	orr	w21, w9, w8
	mov	x0, x20
	bl	_PCIEPTCTLR
	mov	x2, x0
	mov	x0, x19
	mov	x1, x21
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	b	_rcar_pci_write_reg
	.loh AdrpLdrGot	Lloh3, Lloh4
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.cfi_endproc
                                        ; -- End function
	.comm	_SZ_128,4,2                     ; @SZ_128
	.comm	_IORESOURCE_IO,4,2              ; @IORESOURCE_IO
	.comm	_PAR_ENABLE,4,2                 ; @PAR_ENABLE
	.comm	_IO_SPACE,4,2                   ; @IO_SPACE
	.no_dead_strip	_rcar_pcie_setup_window
.subsections_via_symbols
