	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function mtk_hw_init
_mtk_hw_init:                           ## @mtk_hw_init
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r15
	movq	_MTK_HW_INIT@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	leaq	24(%r15), %rsi
	callq	_test_and_set_bit
	xorl	%r14d, %r14d
	testq	%rax, %rax
	jne	LBB0_15
## %bb.1:
	movl	(%r15), %edi
	callq	_pm_runtime_enable
	movl	(%r15), %edi
	callq	_pm_runtime_get_sync
	movq	%r15, %rdi
	callq	_mtk_clk_enable
	movl	%eax, %ebx
	testl	%eax, %eax
	je	LBB0_2
LBB0_5:
	movl	(%r15), %edi
	callq	_pm_runtime_put_sync
	movl	(%r15), %edi
	callq	_pm_runtime_disable
	movl	%ebx, %r14d
LBB0_15:
	movl	%r14d, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_2:
	movq	16(%r15), %rax
	movl	(%rax), %edi
	movq	_MTK_SOC_MT7628@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_MTK_HAS_CAPS
	testq	%rax, %rax
	je	LBB0_7
## %bb.3:
	movl	(%r15), %edi
	callq	_device_reset
	testl	%eax, %eax
	je	LBB0_6
## %bb.4:
	movl	%eax, %ebx
	movl	(%r15), %edi
	leaq	L_.str(%rip), %rsi
	callq	_dev_err
	jmp	LBB0_5
LBB0_7:
	movq	_RSTCTRL_FE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r15, %rdi
	callq	_ethsys_reset
	movq	_RSTCTRL_PPE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r15, %rdi
	callq	_ethsys_reset
	movq	8(%r15), %rdi
	testq	%rdi, %rdi
	je	LBB0_9
## %bb.8:
	movq	_GPIO_DRV_SEL10@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	$2560, %edx                     ## imm = 0xA00
	callq	_regmap_write
	movq	8(%r15), %rdi
	movq	_GPIO_OD33_CTRL8@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	$5, %edx
	callq	_regmap_write
	movq	8(%r15), %rdi
	movq	_GPIO_BIAS_CTRL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	xorl	%edx, %edx
	callq	_regmap_write
LBB0_9:
	movq	_MTK_MAC_COUNT@GOTPCREL(%rip), %r13
	cmpl	$0, (%r13)
	jle	LBB0_12
## %bb.10:
	xorl	%ebx, %ebx
	movq	_MAC_MCR_FORCE_LINK_DOWN@GOTPCREL(%rip), %r12
	.p2align	4, 0x90
LBB0_11:                                ## =>This Inner Loop Header: Depth=1
	movl	(%r12), %r14d
	movl	%ebx, %edi
	callq	_MTK_MAC_MCR
	movq	%r15, %rdi
	movl	%r14d, %esi
	movl	%eax, %edx
	callq	_mtk_w32
	incl	%ebx
	cmpl	(%r13), %ebx
	jl	LBB0_11
LBB0_12:
	movq	_MTK_CDMQ_IG_CTRL@GOTPCREL(%rip), %rbx
	movl	(%rbx), %esi
	movq	%r15, %rdi
	callq	_mtk_r32
	movq	_MTK_CDMQ_STAG_EN@GOTPCREL(%rip), %rcx
	orl	(%rcx), %eax
	movl	(%rbx), %edx
	movq	%r15, %rdi
	movl	%eax, %esi
	callq	_mtk_w32
	movq	_MTK_CDMP_EG_CTRL@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r15, %rdi
	movl	$1, %esi
	callq	_mtk_w32
	movq	_MTK_PDMA_DELAY_RX_DELAY@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_MTK_PDMA_DELAY_INT@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r15, %rdi
	callq	_mtk_w32
	movq	_MTK_QDMA_DELAY_INT@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	xorl	%r14d, %r14d
	movq	%r15, %rdi
	xorl	%esi, %esi
	callq	_mtk_w32
	movq	%r15, %rdi
	movl	$-1, %esi
	callq	_mtk_tx_irq_disable
	movq	%r15, %rdi
	movl	$-1, %esi
	callq	_mtk_rx_irq_disable
	movq	_RST_GL_PSE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_MTK_RST_GL@GOTPCREL(%rip), %rbx
	movl	(%rbx), %edx
	movq	%r15, %rdi
	callq	_mtk_w32
	movl	(%rbx), %edx
	movq	%r15, %rdi
	xorl	%esi, %esi
	callq	_mtk_w32
	movq	_MTK_TX_DONE_INT@GOTPCREL(%rip), %r12
	movl	(%r12), %esi
	movq	_MTK_PDMA_INT_GRP1@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r15, %rdi
	callq	_mtk_w32
	movq	_MTK_RX_DONE_INT@GOTPCREL(%rip), %rbx
	movl	(%rbx), %esi
	movq	_MTK_PDMA_INT_GRP2@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r15, %rdi
	callq	_mtk_w32
	movl	(%r12), %esi
	movq	_MTK_QDMA_INT_GRP1@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r15, %rdi
	callq	_mtk_w32
	movl	(%rbx), %esi
	movq	_MTK_QDMA_INT_GRP2@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r15, %rdi
	callq	_mtk_w32
	movq	_MTK_FE_INT_GRP@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r15, %rdi
	movl	$553783296, %esi                ## imm = 0x21021000
	callq	_mtk_w32
	cmpl	$0, (%r13)
	jle	LBB0_15
## %bb.13:
	xorl	%r14d, %r14d
	xorl	%r12d, %r12d
	.p2align	4, 0x90
LBB0_14:                                ## =>This Inner Loop Header: Depth=1
	movl	%r12d, %edi
	callq	_MTK_GDMA_FWD_CFG
	movq	%r15, %rdi
	movl	%eax, %esi
	callq	_mtk_r32
	movl	%eax, %ebx
	andl	$-65536, %ebx                   ## imm = 0xFFFF0000
	movq	_MTK_GDMA_ICS_EN@GOTPCREL(%rip), %rax
	orl	(%rax), %ebx
	movq	_MTK_GDMA_TCS_EN@GOTPCREL(%rip), %rax
	orl	(%rax), %ebx
	movq	_MTK_GDMA_UCS_EN@GOTPCREL(%rip), %rax
	orl	(%rax), %ebx
	movl	%r12d, %edi
	callq	_MTK_GDMA_FWD_CFG
	movq	%r15, %rdi
	movl	%ebx, %esi
	movl	%eax, %edx
	callq	_mtk_w32
	incl	%r12d
	cmpl	(%r13), %r12d
	jl	LBB0_14
	jmp	LBB0_15
LBB0_6:
	movq	_MTK_PDMA_DELAY_RX_DELAY@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_MTK_PDMA_DELAY_INT@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r15, %rdi
	callq	_mtk_w32
	movq	%r15, %rdi
	movl	$-1, %esi
	callq	_mtk_tx_irq_disable
	movq	%r15, %rdi
	movl	$-1, %esi
	callq	_mtk_rx_irq_disable
	jmp	LBB0_15
	.cfi_endproc
                                        ## -- End function
	.comm	_MTK_HW_INIT,4,2                ## @MTK_HW_INIT
	.comm	_MTK_SOC_MT7628,4,2             ## @MTK_SOC_MT7628
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"MAC reset failed!\n"

	.comm	_MTK_PDMA_DELAY_RX_DELAY,4,2    ## @MTK_PDMA_DELAY_RX_DELAY
	.comm	_MTK_PDMA_DELAY_INT,4,2         ## @MTK_PDMA_DELAY_INT
	.comm	_RSTCTRL_FE,4,2                 ## @RSTCTRL_FE
	.comm	_RSTCTRL_PPE,4,2                ## @RSTCTRL_PPE
	.comm	_GPIO_DRV_SEL10,4,2             ## @GPIO_DRV_SEL10
	.comm	_GPIO_OD33_CTRL8,4,2            ## @GPIO_OD33_CTRL8
	.comm	_GPIO_BIAS_CTRL,4,2             ## @GPIO_BIAS_CTRL
	.comm	_MTK_MAC_COUNT,4,2              ## @MTK_MAC_COUNT
	.comm	_MAC_MCR_FORCE_LINK_DOWN,4,2    ## @MAC_MCR_FORCE_LINK_DOWN
	.comm	_MTK_CDMQ_IG_CTRL,4,2           ## @MTK_CDMQ_IG_CTRL
	.comm	_MTK_CDMQ_STAG_EN,4,2           ## @MTK_CDMQ_STAG_EN
	.comm	_MTK_CDMP_EG_CTRL,4,2           ## @MTK_CDMP_EG_CTRL
	.comm	_MTK_QDMA_DELAY_INT,4,2         ## @MTK_QDMA_DELAY_INT
	.comm	_RST_GL_PSE,4,2                 ## @RST_GL_PSE
	.comm	_MTK_RST_GL,4,2                 ## @MTK_RST_GL
	.comm	_MTK_TX_DONE_INT,4,2            ## @MTK_TX_DONE_INT
	.comm	_MTK_PDMA_INT_GRP1,4,2          ## @MTK_PDMA_INT_GRP1
	.comm	_MTK_RX_DONE_INT,4,2            ## @MTK_RX_DONE_INT
	.comm	_MTK_PDMA_INT_GRP2,4,2          ## @MTK_PDMA_INT_GRP2
	.comm	_MTK_QDMA_INT_GRP1,4,2          ## @MTK_QDMA_INT_GRP1
	.comm	_MTK_QDMA_INT_GRP2,4,2          ## @MTK_QDMA_INT_GRP2
	.comm	_MTK_FE_INT_GRP,4,2             ## @MTK_FE_INT_GRP
	.comm	_MTK_GDMA_ICS_EN,4,2            ## @MTK_GDMA_ICS_EN
	.comm	_MTK_GDMA_TCS_EN,4,2            ## @MTK_GDMA_TCS_EN
	.comm	_MTK_GDMA_UCS_EN,4,2            ## @MTK_GDMA_UCS_EN
	.no_dead_strip	_mtk_hw_init
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function mtk_hw_init
_mtk_hw_init:                           ; @mtk_hw_init
	.cfi_startproc
; %bb.0:
	stp	x26, x25, [sp, #-80]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	mov	x19, x0
Lloh0:
	adrp	x8, _MTK_HW_INIT@GOTPAGE
Lloh1:
	ldr	x8, [x8, _MTK_HW_INIT@GOTPAGEOFF]
Lloh2:
	ldr	w0, [x8]
	add	x1, x19, #24
	bl	_test_and_set_bit
	cbz	x0, LBB0_2
LBB0_1:
	mov	w20, #0
	b	LBB0_4
LBB0_2:
	ldr	w0, [x19]
	bl	_pm_runtime_enable
	ldr	w0, [x19]
	bl	_pm_runtime_get_sync
	mov	x0, x19
	bl	_mtk_clk_enable
	mov	x20, x0
	cbz	w0, LBB0_5
LBB0_3:
	ldr	w0, [x19]
	bl	_pm_runtime_put_sync
	ldr	w0, [x19]
	bl	_pm_runtime_disable
LBB0_4:
	mov	x0, x20
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp], #80             ; 16-byte Folded Reload
	ret
LBB0_5:
	ldr	x8, [x19, #16]
	ldr	w0, [x8]
Lloh3:
	adrp	x8, _MTK_SOC_MT7628@GOTPAGE
Lloh4:
	ldr	x8, [x8, _MTK_SOC_MT7628@GOTPAGEOFF]
Lloh5:
	ldr	w1, [x8]
	bl	_MTK_HAS_CAPS
	cbz	x0, LBB0_8
; %bb.6:
	ldr	w0, [x19]
	bl	_device_reset
	mov	x20, x0
	cbz	w0, LBB0_16
; %bb.7:
	ldr	w0, [x19]
Lloh6:
	adrp	x1, l_.str@PAGE
Lloh7:
	add	x1, x1, l_.str@PAGEOFF
	bl	_dev_err
	b	LBB0_3
LBB0_8:
Lloh8:
	adrp	x8, _RSTCTRL_FE@GOTPAGE
Lloh9:
	ldr	x8, [x8, _RSTCTRL_FE@GOTPAGEOFF]
Lloh10:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_ethsys_reset
Lloh11:
	adrp	x8, _RSTCTRL_PPE@GOTPAGE
Lloh12:
	ldr	x8, [x8, _RSTCTRL_PPE@GOTPAGEOFF]
Lloh13:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_ethsys_reset
	ldr	x0, [x19, #8]
	cbz	x0, LBB0_10
; %bb.9:
Lloh14:
	adrp	x8, _GPIO_DRV_SEL10@GOTPAGE
Lloh15:
	ldr	x8, [x8, _GPIO_DRV_SEL10@GOTPAGEOFF]
Lloh16:
	ldr	w1, [x8]
	mov	w2, #2560
	bl	_regmap_write
	ldr	x0, [x19, #8]
Lloh17:
	adrp	x8, _GPIO_OD33_CTRL8@GOTPAGE
Lloh18:
	ldr	x8, [x8, _GPIO_OD33_CTRL8@GOTPAGEOFF]
Lloh19:
	ldr	w1, [x8]
	mov	w2, #5
	bl	_regmap_write
	ldr	x0, [x19, #8]
Lloh20:
	adrp	x8, _GPIO_BIAS_CTRL@GOTPAGE
Lloh21:
	ldr	x8, [x8, _GPIO_BIAS_CTRL@GOTPAGEOFF]
Lloh22:
	ldr	w1, [x8]
	mov	w2, #0
	bl	_regmap_write
LBB0_10:
Lloh23:
	adrp	x22, _MTK_MAC_COUNT@GOTPAGE
Lloh24:
	ldr	x22, [x22, _MTK_MAC_COUNT@GOTPAGEOFF]
	ldr	w8, [x22]
	cmp	w8, #1
	b.lt	LBB0_13
; %bb.11:
	mov	w20, #0
Lloh25:
	adrp	x23, _MAC_MCR_FORCE_LINK_DOWN@GOTPAGE
Lloh26:
	ldr	x23, [x23, _MAC_MCR_FORCE_LINK_DOWN@GOTPAGEOFF]
LBB0_12:                                ; =>This Inner Loop Header: Depth=1
	ldr	w21, [x23]
	mov	x0, x20
	bl	_MTK_MAC_MCR
	mov	x2, x0
	mov	x0, x19
	mov	x1, x21
	bl	_mtk_w32
	add	w20, w20, #1
	ldr	w8, [x22]
	cmp	w20, w8
	b.lt	LBB0_12
LBB0_13:
Lloh27:
	adrp	x20, _MTK_CDMQ_IG_CTRL@GOTPAGE
Lloh28:
	ldr	x20, [x20, _MTK_CDMQ_IG_CTRL@GOTPAGEOFF]
	ldr	w1, [x20]
	mov	x0, x19
	bl	_mtk_r32
Lloh29:
	adrp	x8, _MTK_CDMQ_STAG_EN@GOTPAGE
Lloh30:
	ldr	x8, [x8, _MTK_CDMQ_STAG_EN@GOTPAGEOFF]
Lloh31:
	ldr	w8, [x8]
	orr	w1, w8, w0
	ldr	w2, [x20]
	mov	x0, x19
	bl	_mtk_w32
Lloh32:
	adrp	x8, _MTK_CDMP_EG_CTRL@GOTPAGE
Lloh33:
	ldr	x8, [x8, _MTK_CDMP_EG_CTRL@GOTPAGEOFF]
Lloh34:
	ldr	w2, [x8]
	mov	x0, x19
	mov	w1, #1
	bl	_mtk_w32
Lloh35:
	adrp	x8, _MTK_PDMA_DELAY_RX_DELAY@GOTPAGE
Lloh36:
	ldr	x8, [x8, _MTK_PDMA_DELAY_RX_DELAY@GOTPAGEOFF]
Lloh37:
	ldr	w1, [x8]
Lloh38:
	adrp	x8, _MTK_PDMA_DELAY_INT@GOTPAGE
Lloh39:
	ldr	x8, [x8, _MTK_PDMA_DELAY_INT@GOTPAGEOFF]
Lloh40:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_mtk_w32
Lloh41:
	adrp	x8, _MTK_QDMA_DELAY_INT@GOTPAGE
Lloh42:
	ldr	x8, [x8, _MTK_QDMA_DELAY_INT@GOTPAGEOFF]
Lloh43:
	ldr	w2, [x8]
	mov	x0, x19
	mov	w1, #0
	bl	_mtk_w32
	mov	x0, x19
	mov	w1, #-1
	bl	_mtk_tx_irq_disable
	mov	x0, x19
	mov	w1, #-1
	bl	_mtk_rx_irq_disable
Lloh44:
	adrp	x8, _RST_GL_PSE@GOTPAGE
Lloh45:
	ldr	x8, [x8, _RST_GL_PSE@GOTPAGEOFF]
Lloh46:
	ldr	w1, [x8]
Lloh47:
	adrp	x20, _MTK_RST_GL@GOTPAGE
Lloh48:
	ldr	x20, [x20, _MTK_RST_GL@GOTPAGEOFF]
	ldr	w2, [x20]
	mov	x0, x19
	bl	_mtk_w32
	ldr	w2, [x20]
	mov	x0, x19
	mov	w1, #0
	bl	_mtk_w32
Lloh49:
	adrp	x20, _MTK_TX_DONE_INT@GOTPAGE
Lloh50:
	ldr	x20, [x20, _MTK_TX_DONE_INT@GOTPAGEOFF]
	ldr	w1, [x20]
Lloh51:
	adrp	x8, _MTK_PDMA_INT_GRP1@GOTPAGE
Lloh52:
	ldr	x8, [x8, _MTK_PDMA_INT_GRP1@GOTPAGEOFF]
Lloh53:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_mtk_w32
Lloh54:
	adrp	x21, _MTK_RX_DONE_INT@GOTPAGE
Lloh55:
	ldr	x21, [x21, _MTK_RX_DONE_INT@GOTPAGEOFF]
	ldr	w1, [x21]
Lloh56:
	adrp	x8, _MTK_PDMA_INT_GRP2@GOTPAGE
Lloh57:
	ldr	x8, [x8, _MTK_PDMA_INT_GRP2@GOTPAGEOFF]
Lloh58:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_mtk_w32
	ldr	w1, [x20]
Lloh59:
	adrp	x8, _MTK_QDMA_INT_GRP1@GOTPAGE
Lloh60:
	ldr	x8, [x8, _MTK_QDMA_INT_GRP1@GOTPAGEOFF]
Lloh61:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_mtk_w32
	ldr	w1, [x21]
Lloh62:
	adrp	x8, _MTK_QDMA_INT_GRP2@GOTPAGE
Lloh63:
	ldr	x8, [x8, _MTK_QDMA_INT_GRP2@GOTPAGEOFF]
Lloh64:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_mtk_w32
Lloh65:
	adrp	x8, _MTK_FE_INT_GRP@GOTPAGE
Lloh66:
	ldr	x8, [x8, _MTK_FE_INT_GRP@GOTPAGEOFF]
Lloh67:
	ldr	w2, [x8]
	mov	x0, x19
	mov	w1, #4096
	movk	w1, #8450, lsl #16
	bl	_mtk_w32
	ldr	w8, [x22]
	cmp	w8, #1
	b.lt	LBB0_1
; %bb.14:
	mov	w20, #0
Lloh68:
	adrp	x23, _MTK_GDMA_ICS_EN@GOTPAGE
Lloh69:
	ldr	x23, [x23, _MTK_GDMA_ICS_EN@GOTPAGEOFF]
Lloh70:
	adrp	x24, _MTK_GDMA_TCS_EN@GOTPAGE
Lloh71:
	ldr	x24, [x24, _MTK_GDMA_TCS_EN@GOTPAGEOFF]
Lloh72:
	adrp	x25, _MTK_GDMA_UCS_EN@GOTPAGE
Lloh73:
	ldr	x25, [x25, _MTK_GDMA_UCS_EN@GOTPAGEOFF]
LBB0_15:                                ; =>This Inner Loop Header: Depth=1
	mov	x0, x20
	bl	_MTK_GDMA_FWD_CFG
	mov	x1, x0
	mov	x0, x19
	bl	_mtk_r32
	and	w8, w0, #0xffff0000
	ldr	w9, [x23]
	ldr	w10, [x24]
	ldr	w11, [x25]
	orr	w8, w8, w9
	orr	w8, w8, w10
	orr	w21, w8, w11
	mov	x0, x20
	bl	_MTK_GDMA_FWD_CFG
	mov	x2, x0
	mov	x0, x19
	mov	x1, x21
	bl	_mtk_w32
	add	w20, w20, #1
	ldr	w8, [x22]
	cmp	w20, w8
	b.lt	LBB0_15
	b	LBB0_1
LBB0_16:
Lloh74:
	adrp	x8, _MTK_PDMA_DELAY_RX_DELAY@GOTPAGE
Lloh75:
	ldr	x8, [x8, _MTK_PDMA_DELAY_RX_DELAY@GOTPAGEOFF]
Lloh76:
	ldr	w1, [x8]
Lloh77:
	adrp	x8, _MTK_PDMA_DELAY_INT@GOTPAGE
Lloh78:
	ldr	x8, [x8, _MTK_PDMA_DELAY_INT@GOTPAGEOFF]
Lloh79:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_mtk_w32
	mov	x0, x19
	mov	w1, #-1
	bl	_mtk_tx_irq_disable
	mov	x0, x19
	mov	w1, #-1
	bl	_mtk_rx_irq_disable
	b	LBB0_4
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpAdd	Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh20, Lloh21, Lloh22
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh19
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh16
	.loh AdrpLdrGot	Lloh23, Lloh24
	.loh AdrpLdrGot	Lloh25, Lloh26
	.loh AdrpLdrGotLdr	Lloh65, Lloh66, Lloh67
	.loh AdrpLdrGotLdr	Lloh62, Lloh63, Lloh64
	.loh AdrpLdrGotLdr	Lloh59, Lloh60, Lloh61
	.loh AdrpLdrGotLdr	Lloh56, Lloh57, Lloh58
	.loh AdrpLdrGot	Lloh54, Lloh55
	.loh AdrpLdrGotLdr	Lloh51, Lloh52, Lloh53
	.loh AdrpLdrGot	Lloh49, Lloh50
	.loh AdrpLdrGot	Lloh47, Lloh48
	.loh AdrpLdrGotLdr	Lloh44, Lloh45, Lloh46
	.loh AdrpLdrGotLdr	Lloh41, Lloh42, Lloh43
	.loh AdrpLdrGotLdr	Lloh38, Lloh39, Lloh40
	.loh AdrpLdrGotLdr	Lloh35, Lloh36, Lloh37
	.loh AdrpLdrGotLdr	Lloh32, Lloh33, Lloh34
	.loh AdrpLdrGotLdr	Lloh29, Lloh30, Lloh31
	.loh AdrpLdrGot	Lloh27, Lloh28
	.loh AdrpLdrGot	Lloh72, Lloh73
	.loh AdrpLdrGot	Lloh70, Lloh71
	.loh AdrpLdrGot	Lloh68, Lloh69
	.loh AdrpLdrGotLdr	Lloh77, Lloh78, Lloh79
	.loh AdrpLdrGotLdr	Lloh74, Lloh75, Lloh76
	.cfi_endproc
                                        ; -- End function
	.comm	_MTK_HW_INIT,4,2                ; @MTK_HW_INIT
	.comm	_MTK_SOC_MT7628,4,2             ; @MTK_SOC_MT7628
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"MAC reset failed!\n"

	.comm	_MTK_PDMA_DELAY_RX_DELAY,4,2    ; @MTK_PDMA_DELAY_RX_DELAY
	.comm	_MTK_PDMA_DELAY_INT,4,2         ; @MTK_PDMA_DELAY_INT
	.comm	_RSTCTRL_FE,4,2                 ; @RSTCTRL_FE
	.comm	_RSTCTRL_PPE,4,2                ; @RSTCTRL_PPE
	.comm	_GPIO_DRV_SEL10,4,2             ; @GPIO_DRV_SEL10
	.comm	_GPIO_OD33_CTRL8,4,2            ; @GPIO_OD33_CTRL8
	.comm	_GPIO_BIAS_CTRL,4,2             ; @GPIO_BIAS_CTRL
	.comm	_MTK_MAC_COUNT,4,2              ; @MTK_MAC_COUNT
	.comm	_MAC_MCR_FORCE_LINK_DOWN,4,2    ; @MAC_MCR_FORCE_LINK_DOWN
	.comm	_MTK_CDMQ_IG_CTRL,4,2           ; @MTK_CDMQ_IG_CTRL
	.comm	_MTK_CDMQ_STAG_EN,4,2           ; @MTK_CDMQ_STAG_EN
	.comm	_MTK_CDMP_EG_CTRL,4,2           ; @MTK_CDMP_EG_CTRL
	.comm	_MTK_QDMA_DELAY_INT,4,2         ; @MTK_QDMA_DELAY_INT
	.comm	_RST_GL_PSE,4,2                 ; @RST_GL_PSE
	.comm	_MTK_RST_GL,4,2                 ; @MTK_RST_GL
	.comm	_MTK_TX_DONE_INT,4,2            ; @MTK_TX_DONE_INT
	.comm	_MTK_PDMA_INT_GRP1,4,2          ; @MTK_PDMA_INT_GRP1
	.comm	_MTK_RX_DONE_INT,4,2            ; @MTK_RX_DONE_INT
	.comm	_MTK_PDMA_INT_GRP2,4,2          ; @MTK_PDMA_INT_GRP2
	.comm	_MTK_QDMA_INT_GRP1,4,2          ; @MTK_QDMA_INT_GRP1
	.comm	_MTK_QDMA_INT_GRP2,4,2          ; @MTK_QDMA_INT_GRP2
	.comm	_MTK_FE_INT_GRP,4,2             ; @MTK_FE_INT_GRP
	.comm	_MTK_GDMA_ICS_EN,4,2            ; @MTK_GDMA_ICS_EN
	.comm	_MTK_GDMA_TCS_EN,4,2            ; @MTK_GDMA_TCS_EN
	.comm	_MTK_GDMA_UCS_EN,4,2            ; @MTK_GDMA_UCS_EN
	.no_dead_strip	_mtk_hw_init
.subsections_via_symbols
