	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function mvpp2_txq_deinit
_mvpp2_txq_deinit:                      ## @mvpp2_txq_deinit
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rsi, %r14
	movq	%rdi, %r15
	movq	(%rdi), %r12
	cmpl	$0, (%r12)
	je	LBB0_5
## %bb.1:
	xorl	%ebx, %ebx
	movq	_TSO_HEADER_SIZE@GOTPCREL(%rip), %r13
	jmp	LBB0_2
	.p2align	4, 0x90
LBB0_4:                                 ##   in Loop: Header=BB0_2 Depth=1
	movq	$0, 8(%r12)
	incl	%ebx
	movq	(%r15), %r12
	cmpl	(%r12), %ebx
	jae	LBB0_5
LBB0_2:                                 ## =>This Inner Loop Header: Depth=1
	movl	48(%r14), %edi
	movl	%ebx, %esi
	callq	_per_cpu_ptr
	movq	%rax, %r12
	movl	24(%rax), %edi
	callq	_kfree
	movq	8(%r12), %rdx
	testq	%rdx, %rdx
	je	LBB0_4
## %bb.3:                               ##   in Loop: Header=BB0_2 Depth=1
	movq	8(%r15), %rax
	movl	(%rax), %edi
	movl	(%r13), %esi
	imull	(%r12), %esi
	movq	16(%r12), %rcx
	callq	_dma_free_coherent
	jmp	LBB0_4
LBB0_5:
	movq	40(%r14), %rdx
	testq	%rdx, %rdx
	je	LBB0_7
## %bb.6:
	movq	8(%r15), %rax
	movl	(%rax), %edi
	movq	_MVPP2_DESC_ALIGNED_SIZE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	imull	(%r14), %esi
	movq	16(%r14), %rcx
	callq	_dma_free_coherent
	movq	(%r15), %r12
LBB0_7:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 32(%r14)
	movups	%xmm0, 16(%r14)
	movl	8(%r14), %edi
	callq	_MVPP2_TXQ_SCHED_TOKEN_CNTR_REG
	movq	%r12, %rdi
	movl	%eax, %esi
	xorl	%edx, %edx
	callq	_mvpp2_write
	movq	(%r15), %rbx
	xorl	%eax, %eax
	callq	_get_cpu
	movq	%rbx, %rdi
	movl	%eax, %esi
	callq	_mvpp2_cpu_to_thread
	movl	%eax, %ebx
	movq	(%r15), %rdi
	movq	_MVPP2_TXQ_NUM_REG@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movl	4(%r14), %ecx
	movl	%ebx, %esi
	callq	_mvpp2_thread_write
	movq	(%r15), %rdi
	movq	_MVPP2_TXQ_DESC_ADDR_REG@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movl	%ebx, %esi
	xorl	%ecx, %ecx
	callq	_mvpp2_thread_write
	movq	(%r15), %rdi
	movq	_MVPP2_TXQ_DESC_SIZE_REG@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movl	%ebx, %esi
	xorl	%ecx, %ecx
	callq	_mvpp2_thread_write
	xorl	%eax, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_put_cpu                        ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_TSO_HEADER_SIZE,4,2            ## @TSO_HEADER_SIZE
	.comm	_MVPP2_DESC_ALIGNED_SIZE,4,2    ## @MVPP2_DESC_ALIGNED_SIZE
	.comm	_MVPP2_TXQ_NUM_REG,4,2          ## @MVPP2_TXQ_NUM_REG
	.comm	_MVPP2_TXQ_DESC_ADDR_REG,4,2    ## @MVPP2_TXQ_DESC_ADDR_REG
	.comm	_MVPP2_TXQ_DESC_SIZE_REG,4,2    ## @MVPP2_TXQ_DESC_SIZE_REG
	.no_dead_strip	_mvpp2_txq_deinit
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function mvpp2_txq_deinit
_mvpp2_txq_deinit:                      ; @mvpp2_txq_deinit
	.cfi_startproc
; %bb.0:
	stp	x24, x23, [sp, #-64]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x20, x1
	mov	x19, x0
	ldr	x22, [x0]
	ldr	w8, [x22]
	cbz	w8, LBB0_5
; %bb.1:
	mov	w21, #0
Lloh0:
	adrp	x23, _TSO_HEADER_SIZE@GOTPAGE
Lloh1:
	ldr	x23, [x23, _TSO_HEADER_SIZE@GOTPAGEOFF]
	b	LBB0_3
LBB0_2:                                 ;   in Loop: Header=BB0_3 Depth=1
	str	xzr, [x22, #8]
	add	w21, w21, #1
	ldr	x22, [x19]
	ldr	w8, [x22]
	cmp	w21, w8
	b.hs	LBB0_5
LBB0_3:                                 ; =>This Inner Loop Header: Depth=1
	ldr	w0, [x20, #48]
	mov	x1, x21
	bl	_per_cpu_ptr
	mov	x22, x0
	ldr	w0, [x0, #24]
	bl	_kfree
	ldr	x2, [x22, #8]
	cbz	x2, LBB0_2
; %bb.4:                                ;   in Loop: Header=BB0_3 Depth=1
	ldr	x8, [x19, #8]
	ldr	w0, [x8]
	ldr	w8, [x22]
	ldr	w9, [x23]
	mul	w1, w9, w8
	ldr	x3, [x22, #16]
	bl	_dma_free_coherent
	b	LBB0_2
LBB0_5:
	ldr	x2, [x20, #40]
	cbz	x2, LBB0_7
; %bb.6:
	ldr	x8, [x19, #8]
	ldr	w0, [x8]
	ldr	w8, [x20]
Lloh2:
	adrp	x9, _MVPP2_DESC_ALIGNED_SIZE@GOTPAGE
Lloh3:
	ldr	x9, [x9, _MVPP2_DESC_ALIGNED_SIZE@GOTPAGEOFF]
Lloh4:
	ldr	w9, [x9]
	mul	w1, w9, w8
	ldr	x3, [x20, #16]
	bl	_dma_free_coherent
	ldr	x22, [x19]
LBB0_7:
	movi.2d	v0, #0000000000000000
	stp	q0, q0, [x20, #16]
	ldr	w0, [x20, #8]
	bl	_MVPP2_TXQ_SCHED_TOKEN_CNTR_REG
	mov	x1, x0
	mov	x0, x22
	mov	w2, #0
	bl	_mvpp2_write
	ldr	x21, [x19]
	bl	_get_cpu
	mov	x1, x0
	mov	x0, x21
	bl	_mvpp2_cpu_to_thread
	mov	x21, x0
	ldr	x0, [x19]
Lloh5:
	adrp	x8, _MVPP2_TXQ_NUM_REG@GOTPAGE
Lloh6:
	ldr	x8, [x8, _MVPP2_TXQ_NUM_REG@GOTPAGEOFF]
Lloh7:
	ldr	w2, [x8]
	ldr	w3, [x20, #4]
	mov	x1, x21
	bl	_mvpp2_thread_write
	ldr	x0, [x19]
Lloh8:
	adrp	x8, _MVPP2_TXQ_DESC_ADDR_REG@GOTPAGE
Lloh9:
	ldr	x8, [x8, _MVPP2_TXQ_DESC_ADDR_REG@GOTPAGEOFF]
Lloh10:
	ldr	w2, [x8]
	mov	x1, x21
	mov	w3, #0
	bl	_mvpp2_thread_write
	ldr	x0, [x19]
Lloh11:
	adrp	x8, _MVPP2_TXQ_DESC_SIZE_REG@GOTPAGE
Lloh12:
	ldr	x8, [x8, _MVPP2_TXQ_DESC_SIZE_REG@GOTPAGEOFF]
Lloh13:
	ldr	w2, [x8]
	mov	x1, x21
	mov	w3, #0
	bl	_mvpp2_thread_write
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	b	_put_cpu
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.cfi_endproc
                                        ; -- End function
	.comm	_TSO_HEADER_SIZE,4,2            ; @TSO_HEADER_SIZE
	.comm	_MVPP2_DESC_ALIGNED_SIZE,4,2    ; @MVPP2_DESC_ALIGNED_SIZE
	.comm	_MVPP2_TXQ_NUM_REG,4,2          ; @MVPP2_TXQ_NUM_REG
	.comm	_MVPP2_TXQ_DESC_ADDR_REG,4,2    ; @MVPP2_TXQ_DESC_ADDR_REG
	.comm	_MVPP2_TXQ_DESC_SIZE_REG,4,2    ; @MVPP2_TXQ_DESC_SIZE_REG
	.no_dead_strip	_mvpp2_txq_deinit
.subsections_via_symbols
