	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function configure_adc
_configure_adc:                         ## @configure_adc
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r14
	pushq	%rbx
	subq	$16, %rsp
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	movl	%edi, %ebx
	movq	_INTEL_MSIC_ADC1CNTL1@GOTPCREL(%rip), %r14
	movl	(%r14), %edi
	leaq	-20(%rbp), %rsi
	callq	_intel_msic_reg_read
	testl	%eax, %eax
	jne	LBB0_5
## %bb.1:
	testl	%ebx, %ebx
	je	LBB0_3
## %bb.2:
	movq	_MSIC_ADC_ENBL@GOTPCREL(%rip), %rax
	movq	_MSIC_ADC_START@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	orl	(%rax), %esi
	orl	-20(%rbp), %esi
	jmp	LBB0_4
LBB0_3:
	movq	_MSIC_ADC_START@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	notl	%esi
	andl	-20(%rbp), %esi
LBB0_4:
	movl	%esi, -20(%rbp)
	movl	(%r14), %edi
	callq	_intel_msic_reg_write
LBB0_5:
	addq	$16, %rsp
	popq	%rbx
	popq	%r14
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_INTEL_MSIC_ADC1CNTL1,4,2       ## @INTEL_MSIC_ADC1CNTL1
	.comm	_MSIC_ADC_ENBL,4,2              ## @MSIC_ADC_ENBL
	.comm	_MSIC_ADC_START,4,2             ## @MSIC_ADC_START
	.no_dead_strip	_configure_adc
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function configure_adc
_configure_adc:                         ; @configure_adc
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #48
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x19, x0
Lloh0:
	adrp	x20, _INTEL_MSIC_ADC1CNTL1@GOTPAGE
Lloh1:
	ldr	x20, [x20, _INTEL_MSIC_ADC1CNTL1@GOTPAGEOFF]
	ldr	w0, [x20]
	add	x1, sp, #12
	bl	_intel_msic_reg_read
	cbnz	w0, LBB0_5
; %bb.1:
	cbz	w19, LBB0_3
; %bb.2:
Lloh2:
	adrp	x8, _MSIC_ADC_ENBL@GOTPAGE
Lloh3:
	ldr	x8, [x8, _MSIC_ADC_ENBL@GOTPAGEOFF]
Lloh4:
	ldr	w8, [x8]
Lloh5:
	adrp	x9, _MSIC_ADC_START@GOTPAGE
Lloh6:
	ldr	x9, [x9, _MSIC_ADC_START@GOTPAGEOFF]
Lloh7:
	ldr	w9, [x9]
	orr	w8, w9, w8
	ldr	w9, [sp, #12]
	orr	w1, w8, w9
	b	LBB0_4
LBB0_3:
Lloh8:
	adrp	x8, _MSIC_ADC_START@GOTPAGE
Lloh9:
	ldr	x8, [x8, _MSIC_ADC_START@GOTPAGEOFF]
Lloh10:
	ldr	w8, [x8]
	ldr	w9, [sp, #12]
	bic	w1, w9, w8
LBB0_4:
	str	w1, [sp, #12]
	ldr	w0, [x20]
	bl	_intel_msic_reg_write
LBB0_5:
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #48
	ret
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.cfi_endproc
                                        ; -- End function
	.comm	_INTEL_MSIC_ADC1CNTL1,4,2       ; @INTEL_MSIC_ADC1CNTL1
	.comm	_MSIC_ADC_ENBL,4,2              ; @MSIC_ADC_ENBL
	.comm	_MSIC_ADC_START,4,2             ; @MSIC_ADC_START
	.no_dead_strip	_configure_adc
.subsections_via_symbols
