	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_mt76x0_phy_calibrate           ## -- Begin function mt76x0_phy_calibrate
	.p2align	4, 0x90
_mt76x0_phy_calibrate:                  ## @mt76x0_phy_calibrate
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$40, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%esi, -48(%rbp)                 ## 4-byte Spill
	movq	%rdi, %r14
	movq	(%rdi), %r15
	movq	(%r15), %rbx
	movq	_NL80211_BAND_5GHZ@GOTPCREL(%rip), %rax
	movq	(%rax), %r13
	cmpq	%r13, %rbx
	sete	%r12b
	callq	_is_mt7630
	testq	%rax, %rax
	je	LBB0_1
## %bb.8:
	addq	$40, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_1:
	movq	%r13, -64(%rbp)                 ## 8-byte Spill
	movq	%rbx, -72(%rbp)                 ## 8-byte Spill
	movb	%r12b, -44(%rbp)                ## 1-byte Spill
	movl	$0, -52(%rbp)                   ## 4-byte Folded Spill
	cmpl	$0, -48(%rbp)                   ## 4-byte Folded Reload
	je	LBB0_4
## %bb.2:
	movq	_MCU_CAL_R@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	xorl	%edx, %edx
	callq	_mt76x02_mcu_calibrate
	movq	_MCU_CAL_VCO@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	8(%r15), %edx
	movq	%r14, %rdi
	callq	_mt76x02_mcu_calibrate
	movl	$10, %edi
	movl	$20, %esi
	callq	_usleep_range
	movq	%r14, %rdi
	callq	_mt76x0_tssi_enabled
	testq	%rax, %rax
	je	LBB0_4
## %bb.3:
	movq	_MT_MAC_SYS_CTRL@GOTPCREL(%rip), %rbx
	movl	(%rbx), %esi
	movq	_MT_MAC_SYS_CTRL_ENABLE_RX@GOTPCREL(%rip), %r12
	movl	(%r12), %edx
	movq	%r14, %rdi
	callq	_mt76_wr
	movq	%r14, %rdi
	callq	_mt76x0_phy_tssi_dc_calibrate
	movl	(%rbx), %esi
	movq	_MT_MAC_SYS_CTRL_ENABLE_TX@GOTPCREL(%rip), %rax
	movl	(%r12), %edx
	orl	(%rax), %edx
	movq	%r14, %rdi
	callq	_mt76_wr
LBB0_4:
	movl	-52(%rbp), %eax                 ## 4-byte Reload
	movb	-44(%rbp), %cl                  ## 1-byte Reload
	movb	%cl, %al
	movl	%eax, -52(%rbp)                 ## 4-byte Spill
	movq	_MT_TX_ALC_CFG_0@GOTPCREL(%rip), %rbx
	movl	(%rbx), %esi
	movq	%r14, %rdi
	callq	_mt76_rr
	movl	%eax, -48(%rbp)                 ## 4-byte Spill
	movl	(%rbx), %esi
	movq	%r14, %rdi
	xorl	%edx, %edx
	callq	_mt76_wr
	movl	$500, %edi                      ## imm = 0x1F4
	movl	$700, %esi                      ## imm = 0x2BC
	callq	_usleep_range
	movq	_IBI@GOTPCREL(%rip), %rbx
	movl	(%rbx), %edi
	movl	$9, %esi
	callq	_MT_BBP
	movq	%r14, %rdi
	movl	%eax, %esi
	callq	_mt76_rr
	movl	%eax, -44(%rbp)                 ## 4-byte Spill
	movl	(%rbx), %edi
	movl	$9, %esi
	callq	_MT_BBP
	movq	%r14, %rdi
	movl	%eax, %esi
	movl	$-130, %edx
	callq	_mt76_wr
	movl	$1536, %edx                     ## imm = 0x600
	movq	-64(%rbp), %rax                 ## 8-byte Reload
	cmpq	%rax, -72(%rbp)                 ## 8-byte Folded Reload
	jne	LBB0_7
## %bb.5:
	movl	8(%r15), %eax
	movl	$1793, %edx                     ## imm = 0x701
	cmpl	$100, %eax
	jl	LBB0_7
## %bb.6:
	xorl	%edx, %edx
	cmpl	$140, %eax
	setae	%dl
	shll	$8, %edx
	orl	$2049, %edx                     ## imm = 0x801
LBB0_7:
	movq	_MCU_CAL_FULL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	callq	_mt76x02_mcu_calibrate
	movl	$350, %edi                      ## imm = 0x15E
	callq	_msleep
	movq	_MCU_CAL_LC@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	movl	-52(%rbp), %edx                 ## 4-byte Reload
	callq	_mt76x02_mcu_calibrate
	movl	$15000, %edi                    ## imm = 0x3A98
	movl	$20000, %esi                    ## imm = 0x4E20
	callq	_usleep_range
	movq	_IBI@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	$9, %esi
	callq	_MT_BBP
	movq	%r14, %rdi
	movl	%eax, %esi
	movl	-44(%rbp), %edx                 ## 4-byte Reload
	callq	_mt76_wr
	movq	_MT_TX_ALC_CFG_0@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	movl	-48(%rbp), %edx                 ## 4-byte Reload
	callq	_mt76_wr
	movq	_MCU_CAL_RXDCOC@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	movl	$1, %edx
	addq	$40, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_mt76x02_mcu_calibrate          ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_NL80211_BAND_5GHZ,8,3          ## @NL80211_BAND_5GHZ
	.comm	_MCU_CAL_R,4,2                  ## @MCU_CAL_R
	.comm	_MCU_CAL_VCO,4,2                ## @MCU_CAL_VCO
	.comm	_MT_MAC_SYS_CTRL,4,2            ## @MT_MAC_SYS_CTRL
	.comm	_MT_MAC_SYS_CTRL_ENABLE_RX,4,2  ## @MT_MAC_SYS_CTRL_ENABLE_RX
	.comm	_MT_MAC_SYS_CTRL_ENABLE_TX,4,2  ## @MT_MAC_SYS_CTRL_ENABLE_TX
	.comm	_MT_TX_ALC_CFG_0,4,2            ## @MT_TX_ALC_CFG_0
	.comm	_IBI,4,2                        ## @IBI
	.comm	_MCU_CAL_FULL,4,2               ## @MCU_CAL_FULL
	.comm	_MCU_CAL_LC,4,2                 ## @MCU_CAL_LC
	.comm	_MCU_CAL_RXDCOC,4,2             ## @MCU_CAL_RXDCOC
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_mt76x0_phy_calibrate           ; -- Begin function mt76x0_phy_calibrate
	.p2align	2
_mt76x0_phy_calibrate:                  ; @mt76x0_phy_calibrate
	.cfi_startproc
; %bb.0:
	stp	x28, x27, [sp, #-96]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 96
	stp	x26, x25, [sp, #16]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #32]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #48]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #64]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #80]             ; 16-byte Folded Spill
	add	x29, sp, #80
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	mov	x21, x1
	mov	x19, x0
	ldr	x23, [x0]
	ldr	x24, [x23]
Lloh0:
	adrp	x8, _NL80211_BAND_5GHZ@GOTPAGE
Lloh1:
	ldr	x8, [x8, _NL80211_BAND_5GHZ@GOTPAGEOFF]
Lloh2:
	ldr	x25, [x8]
	cmp	x24, x25
	cset	w20, eq
	bl	_is_mt7630
	cbz	x0, LBB0_2
; %bb.1:
	ldp	x29, x30, [sp, #80]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #64]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #48]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #32]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #16]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp], #96             ; 16-byte Folded Reload
	ret
LBB0_2:
	cbz	w21, LBB0_5
; %bb.3:
Lloh3:
	adrp	x8, _MCU_CAL_R@GOTPAGE
Lloh4:
	ldr	x8, [x8, _MCU_CAL_R@GOTPAGEOFF]
Lloh5:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #0
	bl	_mt76x02_mcu_calibrate
Lloh6:
	adrp	x8, _MCU_CAL_VCO@GOTPAGE
Lloh7:
	ldr	x8, [x8, _MCU_CAL_VCO@GOTPAGEOFF]
Lloh8:
	ldr	w1, [x8]
	ldr	w2, [x23, #8]
	mov	x0, x19
	bl	_mt76x02_mcu_calibrate
	mov	w0, #10
	mov	w1, #20
	bl	_usleep_range
	mov	x0, x19
	bl	_mt76x0_tssi_enabled
	cbz	x0, LBB0_5
; %bb.4:
Lloh9:
	adrp	x21, _MT_MAC_SYS_CTRL@GOTPAGE
Lloh10:
	ldr	x21, [x21, _MT_MAC_SYS_CTRL@GOTPAGEOFF]
	ldr	w1, [x21]
Lloh11:
	adrp	x22, _MT_MAC_SYS_CTRL_ENABLE_RX@GOTPAGE
Lloh12:
	ldr	x22, [x22, _MT_MAC_SYS_CTRL_ENABLE_RX@GOTPAGEOFF]
	ldr	w2, [x22]
	mov	x0, x19
	bl	_mt76_wr
	mov	x0, x19
	bl	_mt76x0_phy_tssi_dc_calibrate
	ldr	w1, [x21]
Lloh13:
	adrp	x8, _MT_MAC_SYS_CTRL_ENABLE_TX@GOTPAGE
Lloh14:
	ldr	x8, [x8, _MT_MAC_SYS_CTRL_ENABLE_TX@GOTPAGEOFF]
Lloh15:
	ldr	w8, [x8]
	ldr	w9, [x22]
	orr	w2, w9, w8
	mov	x0, x19
	bl	_mt76_wr
LBB0_5:
Lloh16:
	adrp	x26, _MT_TX_ALC_CFG_0@GOTPAGE
Lloh17:
	ldr	x26, [x26, _MT_TX_ALC_CFG_0@GOTPAGEOFF]
	ldr	w1, [x26]
	mov	x0, x19
	bl	_mt76_rr
	mov	x21, x0
	ldr	w1, [x26]
	mov	x0, x19
	mov	w2, #0
	bl	_mt76_wr
	mov	w0, #500
	mov	w1, #700
	bl	_usleep_range
Lloh18:
	adrp	x27, _IBI@GOTPAGE
Lloh19:
	ldr	x27, [x27, _IBI@GOTPAGEOFF]
	ldr	w0, [x27]
	mov	w1, #9
	bl	_MT_BBP
	mov	x1, x0
	mov	x0, x19
	bl	_mt76_rr
	mov	x22, x0
	ldr	w0, [x27]
	mov	w1, #9
	bl	_MT_BBP
	mov	x1, x0
	mov	x0, x19
	mov	w2, #-130
	bl	_mt76_wr
	cmp	x24, x25
	b.ne	LBB0_7
; %bb.6:
	ldr	w8, [x23, #8]
	mov	w9, #1793
	mov	w10, #2305
	mov	w11, #2049
	cmp	w8, #140
	csel	w10, w11, w10, lo
	cmp	w8, #100
	csel	w2, w9, w10, lt
	b	LBB0_8
LBB0_7:
	mov	w2, #1536
LBB0_8:
Lloh20:
	adrp	x8, _MCU_CAL_FULL@GOTPAGE
Lloh21:
	ldr	x8, [x8, _MCU_CAL_FULL@GOTPAGEOFF]
Lloh22:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_mt76x02_mcu_calibrate
	mov	w0, #350
	bl	_msleep
Lloh23:
	adrp	x8, _MCU_CAL_LC@GOTPAGE
Lloh24:
	ldr	x8, [x8, _MCU_CAL_LC@GOTPAGEOFF]
Lloh25:
	ldr	w1, [x8]
	mov	x0, x19
	mov	x2, x20
	bl	_mt76x02_mcu_calibrate
	mov	w0, #15000
	mov	w1, #20000
	bl	_usleep_range
	ldr	w0, [x27]
	mov	w1, #9
	bl	_MT_BBP
	mov	x1, x0
	mov	x0, x19
	mov	x2, x22
	bl	_mt76_wr
	ldr	w1, [x26]
	mov	x0, x19
	mov	x2, x21
	bl	_mt76_wr
Lloh26:
	adrp	x8, _MCU_CAL_RXDCOC@GOTPAGE
Lloh27:
	ldr	x8, [x8, _MCU_CAL_RXDCOC@GOTPAGEOFF]
Lloh28:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #1
	ldp	x29, x30, [sp, #80]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #64]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #48]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #32]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #16]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp], #96             ; 16-byte Folded Reload
	b	_mt76x02_mcu_calibrate
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh13, Lloh14, Lloh15
	.loh AdrpLdrGot	Lloh11, Lloh12
	.loh AdrpLdrGot	Lloh9, Lloh10
	.loh AdrpLdrGot	Lloh18, Lloh19
	.loh AdrpLdrGot	Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh26, Lloh27, Lloh28
	.loh AdrpLdrGotLdr	Lloh23, Lloh24, Lloh25
	.loh AdrpLdrGotLdr	Lloh20, Lloh21, Lloh22
	.cfi_endproc
                                        ; -- End function
	.comm	_NL80211_BAND_5GHZ,8,3          ; @NL80211_BAND_5GHZ
	.comm	_MCU_CAL_R,4,2                  ; @MCU_CAL_R
	.comm	_MCU_CAL_VCO,4,2                ; @MCU_CAL_VCO
	.comm	_MT_MAC_SYS_CTRL,4,2            ; @MT_MAC_SYS_CTRL
	.comm	_MT_MAC_SYS_CTRL_ENABLE_RX,4,2  ; @MT_MAC_SYS_CTRL_ENABLE_RX
	.comm	_MT_MAC_SYS_CTRL_ENABLE_TX,4,2  ; @MT_MAC_SYS_CTRL_ENABLE_TX
	.comm	_MT_TX_ALC_CFG_0,4,2            ; @MT_TX_ALC_CFG_0
	.comm	_IBI,4,2                        ; @IBI
	.comm	_MCU_CAL_FULL,4,2               ; @MCU_CAL_FULL
	.comm	_MCU_CAL_LC,4,2                 ; @MCU_CAL_LC
	.comm	_MCU_CAL_RXDCOC,4,2             ; @MCU_CAL_RXDCOC
.subsections_via_symbols
