	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function qed_dq_init_pf
_qed_dq_init_pf:                        ## @qed_dq_init_pf
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r14
	movq	(%rdi), %rcx
	movq	(%rcx), %rax
	movq	%rcx, %r13
	movl	(%rax), %r15d
	movq	_DQ_RANGE_SHIFT@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	movq	%rax, %rbx
	sarl	%cl, %r15d
	movq	_DORQ_REG_PF_MAX_ICID_0_RT_OFFSET@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	%r15d, %edx
	callq	_STORE_RT_REG
	movq	(%r13), %rax
	movl	4(%rax), %r12d
	movb	(%rbx), %cl
	sarl	%cl, %r12d
	movq	_DORQ_REG_VF_MAX_ICID_0_RT_OFFSET@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	movl	%r12d, %edx
	callq	_STORE_RT_REG
	movq	(%r13), %rax
	movl	8(%rax), %ebx
	movq	_DQ_RANGE_SHIFT@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	sarl	%cl, %ebx
	addl	%r15d, %ebx
	movq	_DORQ_REG_PF_MAX_ICID_1_RT_OFFSET@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	movl	%ebx, %edx
	callq	_STORE_RT_REG
	movq	(%r13), %rax
	movl	12(%rax), %r15d
	movq	_DQ_RANGE_SHIFT@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	sarl	%cl, %r15d
	addl	%r12d, %r15d
	movq	_DORQ_REG_VF_MAX_ICID_1_RT_OFFSET@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	movl	%r15d, %edx
	callq	_STORE_RT_REG
	movq	(%r13), %rax
	movl	16(%rax), %r12d
	movq	_DQ_RANGE_SHIFT@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	sarl	%cl, %r12d
	addl	%ebx, %r12d
	movq	_DORQ_REG_PF_MAX_ICID_2_RT_OFFSET@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	movl	%r12d, %edx
	callq	_STORE_RT_REG
	movq	(%r13), %rax
	movl	20(%rax), %ebx
	movq	_DQ_RANGE_SHIFT@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	sarl	%cl, %ebx
	addl	%r15d, %ebx
	movq	_DORQ_REG_VF_MAX_ICID_2_RT_OFFSET@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	movl	%ebx, %edx
	callq	_STORE_RT_REG
	movq	(%r13), %rax
	movl	24(%rax), %r15d
	movq	_DQ_RANGE_SHIFT@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	sarl	%cl, %r15d
	addl	%r12d, %r15d
	movq	_DORQ_REG_PF_MAX_ICID_3_RT_OFFSET@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	movl	%r15d, %edx
	callq	_STORE_RT_REG
	movq	(%r13), %rax
	movl	28(%rax), %r12d
	movq	_DQ_RANGE_SHIFT@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	sarl	%cl, %r12d
	addl	%ebx, %r12d
	movq	_DORQ_REG_VF_MAX_ICID_3_RT_OFFSET@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	movl	%r12d, %edx
	callq	_STORE_RT_REG
	movq	(%r13), %rax
	movl	32(%rax), %ebx
	movq	_DQ_RANGE_SHIFT@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	sarl	%cl, %ebx
	addl	%r15d, %ebx
	movq	_DORQ_REG_PF_MAX_ICID_4_RT_OFFSET@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	movl	%ebx, %edx
	callq	_STORE_RT_REG
	movq	%r13, %r15
	movq	(%r13), %rax
	movl	36(%rax), %r13d
	movq	_DQ_RANGE_SHIFT@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	sarl	%cl, %r13d
	addl	%r12d, %r13d
	movq	_DORQ_REG_VF_MAX_ICID_4_RT_OFFSET@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	movl	%r13d, %edx
	callq	_STORE_RT_REG
	movq	(%r15), %rax
	movq	%r15, %r12
	movl	40(%rax), %r15d
	movq	_DQ_RANGE_SHIFT@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	sarl	%cl, %r15d
	addl	%ebx, %r15d
	movq	_DORQ_REG_PF_MAX_ICID_5_RT_OFFSET@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	movl	%r15d, %edx
	callq	_STORE_RT_REG
	movq	(%r12), %rax
	movl	44(%rax), %ebx
	movq	_DQ_RANGE_SHIFT@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	sarl	%cl, %ebx
	addl	%r13d, %ebx
	movq	_DORQ_REG_VF_MAX_ICID_5_RT_OFFSET@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	movl	%ebx, %edx
	callq	_STORE_RT_REG
	movq	_DORQ_REG_PF_MAX_ICID_6_RT_OFFSET@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	movl	%r15d, %edx
	callq	_STORE_RT_REG
	movq	_DORQ_REG_VF_MAX_ICID_6_RT_OFFSET@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	movl	%ebx, %edx
	callq	_STORE_RT_REG
	movq	_DORQ_REG_PF_MAX_ICID_7_RT_OFFSET@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	movl	%r15d, %edx
	callq	_STORE_RT_REG
	movq	_DORQ_REG_VF_MAX_ICID_7_RT_OFFSET@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	movl	%ebx, %edx
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_STORE_RT_REG                   ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_DQ_RANGE_SHIFT,4,2             ## @DQ_RANGE_SHIFT
	.comm	_DORQ_REG_PF_MAX_ICID_0_RT_OFFSET,4,2 ## @DORQ_REG_PF_MAX_ICID_0_RT_OFFSET
	.comm	_DORQ_REG_VF_MAX_ICID_0_RT_OFFSET,4,2 ## @DORQ_REG_VF_MAX_ICID_0_RT_OFFSET
	.comm	_DORQ_REG_PF_MAX_ICID_1_RT_OFFSET,4,2 ## @DORQ_REG_PF_MAX_ICID_1_RT_OFFSET
	.comm	_DORQ_REG_VF_MAX_ICID_1_RT_OFFSET,4,2 ## @DORQ_REG_VF_MAX_ICID_1_RT_OFFSET
	.comm	_DORQ_REG_PF_MAX_ICID_2_RT_OFFSET,4,2 ## @DORQ_REG_PF_MAX_ICID_2_RT_OFFSET
	.comm	_DORQ_REG_VF_MAX_ICID_2_RT_OFFSET,4,2 ## @DORQ_REG_VF_MAX_ICID_2_RT_OFFSET
	.comm	_DORQ_REG_PF_MAX_ICID_3_RT_OFFSET,4,2 ## @DORQ_REG_PF_MAX_ICID_3_RT_OFFSET
	.comm	_DORQ_REG_VF_MAX_ICID_3_RT_OFFSET,4,2 ## @DORQ_REG_VF_MAX_ICID_3_RT_OFFSET
	.comm	_DORQ_REG_PF_MAX_ICID_4_RT_OFFSET,4,2 ## @DORQ_REG_PF_MAX_ICID_4_RT_OFFSET
	.comm	_DORQ_REG_VF_MAX_ICID_4_RT_OFFSET,4,2 ## @DORQ_REG_VF_MAX_ICID_4_RT_OFFSET
	.comm	_DORQ_REG_PF_MAX_ICID_5_RT_OFFSET,4,2 ## @DORQ_REG_PF_MAX_ICID_5_RT_OFFSET
	.comm	_DORQ_REG_VF_MAX_ICID_5_RT_OFFSET,4,2 ## @DORQ_REG_VF_MAX_ICID_5_RT_OFFSET
	.comm	_DORQ_REG_PF_MAX_ICID_6_RT_OFFSET,4,2 ## @DORQ_REG_PF_MAX_ICID_6_RT_OFFSET
	.comm	_DORQ_REG_VF_MAX_ICID_6_RT_OFFSET,4,2 ## @DORQ_REG_VF_MAX_ICID_6_RT_OFFSET
	.comm	_DORQ_REG_PF_MAX_ICID_7_RT_OFFSET,4,2 ## @DORQ_REG_PF_MAX_ICID_7_RT_OFFSET
	.comm	_DORQ_REG_VF_MAX_ICID_7_RT_OFFSET,4,2 ## @DORQ_REG_VF_MAX_ICID_7_RT_OFFSET
	.no_dead_strip	_qed_dq_init_pf
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function qed_dq_init_pf
_qed_dq_init_pf:                        ; @qed_dq_init_pf
	.cfi_startproc
; %bb.0:
	stp	x24, x23, [sp, #-64]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x19, x0
	ldr	x22, [x0]
	ldr	x8, [x22]
Lloh0:
	adrp	x23, _DQ_RANGE_SHIFT@GOTPAGE
Lloh1:
	ldr	x23, [x23, _DQ_RANGE_SHIFT@GOTPAGEOFF]
	ldr	w8, [x8]
	ldr	w9, [x23]
	asr	w20, w8, w9
Lloh2:
	adrp	x8, _DORQ_REG_PF_MAX_ICID_0_RT_OFFSET@GOTPAGE
Lloh3:
	ldr	x8, [x8, _DORQ_REG_PF_MAX_ICID_0_RT_OFFSET@GOTPAGEOFF]
Lloh4:
	ldr	w1, [x8]
	mov	x2, x20
	bl	_STORE_RT_REG
	ldr	x8, [x22]
	ldr	w8, [x8, #4]
	ldr	w9, [x23]
	asr	w21, w8, w9
Lloh5:
	adrp	x8, _DORQ_REG_VF_MAX_ICID_0_RT_OFFSET@GOTPAGE
Lloh6:
	ldr	x8, [x8, _DORQ_REG_VF_MAX_ICID_0_RT_OFFSET@GOTPAGEOFF]
Lloh7:
	ldr	w1, [x8]
	mov	x0, x19
	mov	x2, x21
	bl	_STORE_RT_REG
	ldr	x8, [x22]
	ldr	w8, [x8, #8]
	ldr	w9, [x23]
	asr	w8, w8, w9
	add	w20, w8, w20
Lloh8:
	adrp	x8, _DORQ_REG_PF_MAX_ICID_1_RT_OFFSET@GOTPAGE
Lloh9:
	ldr	x8, [x8, _DORQ_REG_PF_MAX_ICID_1_RT_OFFSET@GOTPAGEOFF]
Lloh10:
	ldr	w1, [x8]
	mov	x0, x19
	mov	x2, x20
	bl	_STORE_RT_REG
	ldr	x8, [x22]
	ldr	w8, [x8, #12]
	ldr	w9, [x23]
	asr	w8, w8, w9
	add	w21, w8, w21
Lloh11:
	adrp	x8, _DORQ_REG_VF_MAX_ICID_1_RT_OFFSET@GOTPAGE
Lloh12:
	ldr	x8, [x8, _DORQ_REG_VF_MAX_ICID_1_RT_OFFSET@GOTPAGEOFF]
Lloh13:
	ldr	w1, [x8]
	mov	x0, x19
	mov	x2, x21
	bl	_STORE_RT_REG
	ldr	x8, [x22]
	ldr	w8, [x8, #16]
	ldr	w9, [x23]
	asr	w8, w8, w9
	add	w20, w8, w20
Lloh14:
	adrp	x8, _DORQ_REG_PF_MAX_ICID_2_RT_OFFSET@GOTPAGE
Lloh15:
	ldr	x8, [x8, _DORQ_REG_PF_MAX_ICID_2_RT_OFFSET@GOTPAGEOFF]
Lloh16:
	ldr	w1, [x8]
	mov	x0, x19
	mov	x2, x20
	bl	_STORE_RT_REG
	ldr	x8, [x22]
	ldr	w8, [x8, #20]
	ldr	w9, [x23]
	asr	w8, w8, w9
	add	w21, w8, w21
Lloh17:
	adrp	x8, _DORQ_REG_VF_MAX_ICID_2_RT_OFFSET@GOTPAGE
Lloh18:
	ldr	x8, [x8, _DORQ_REG_VF_MAX_ICID_2_RT_OFFSET@GOTPAGEOFF]
Lloh19:
	ldr	w1, [x8]
	mov	x0, x19
	mov	x2, x21
	bl	_STORE_RT_REG
	ldr	x8, [x22]
	ldr	w8, [x8, #24]
	ldr	w9, [x23]
	asr	w8, w8, w9
	add	w20, w8, w20
Lloh20:
	adrp	x8, _DORQ_REG_PF_MAX_ICID_3_RT_OFFSET@GOTPAGE
Lloh21:
	ldr	x8, [x8, _DORQ_REG_PF_MAX_ICID_3_RT_OFFSET@GOTPAGEOFF]
Lloh22:
	ldr	w1, [x8]
	mov	x0, x19
	mov	x2, x20
	bl	_STORE_RT_REG
	ldr	x8, [x22]
	ldr	w8, [x8, #28]
	ldr	w9, [x23]
	asr	w8, w8, w9
	add	w21, w8, w21
Lloh23:
	adrp	x8, _DORQ_REG_VF_MAX_ICID_3_RT_OFFSET@GOTPAGE
Lloh24:
	ldr	x8, [x8, _DORQ_REG_VF_MAX_ICID_3_RT_OFFSET@GOTPAGEOFF]
Lloh25:
	ldr	w1, [x8]
	mov	x0, x19
	mov	x2, x21
	bl	_STORE_RT_REG
	ldr	x8, [x22]
	ldr	w8, [x8, #32]
	ldr	w9, [x23]
	asr	w8, w8, w9
	add	w20, w8, w20
Lloh26:
	adrp	x8, _DORQ_REG_PF_MAX_ICID_4_RT_OFFSET@GOTPAGE
Lloh27:
	ldr	x8, [x8, _DORQ_REG_PF_MAX_ICID_4_RT_OFFSET@GOTPAGEOFF]
Lloh28:
	ldr	w1, [x8]
	mov	x0, x19
	mov	x2, x20
	bl	_STORE_RT_REG
	ldr	x8, [x22]
	ldr	w8, [x8, #36]
	ldr	w9, [x23]
	asr	w8, w8, w9
	add	w21, w8, w21
Lloh29:
	adrp	x8, _DORQ_REG_VF_MAX_ICID_4_RT_OFFSET@GOTPAGE
Lloh30:
	ldr	x8, [x8, _DORQ_REG_VF_MAX_ICID_4_RT_OFFSET@GOTPAGEOFF]
Lloh31:
	ldr	w1, [x8]
	mov	x0, x19
	mov	x2, x21
	bl	_STORE_RT_REG
	ldr	x8, [x22]
	ldr	w8, [x8, #40]
	ldr	w9, [x23]
	asr	w8, w8, w9
	add	w20, w8, w20
Lloh32:
	adrp	x8, _DORQ_REG_PF_MAX_ICID_5_RT_OFFSET@GOTPAGE
Lloh33:
	ldr	x8, [x8, _DORQ_REG_PF_MAX_ICID_5_RT_OFFSET@GOTPAGEOFF]
Lloh34:
	ldr	w1, [x8]
	mov	x0, x19
	mov	x2, x20
	bl	_STORE_RT_REG
	ldr	x8, [x22]
	ldr	w8, [x8, #44]
	ldr	w9, [x23]
	asr	w8, w8, w9
	add	w21, w8, w21
Lloh35:
	adrp	x8, _DORQ_REG_VF_MAX_ICID_5_RT_OFFSET@GOTPAGE
Lloh36:
	ldr	x8, [x8, _DORQ_REG_VF_MAX_ICID_5_RT_OFFSET@GOTPAGEOFF]
Lloh37:
	ldr	w1, [x8]
	mov	x0, x19
	mov	x2, x21
	bl	_STORE_RT_REG
Lloh38:
	adrp	x8, _DORQ_REG_PF_MAX_ICID_6_RT_OFFSET@GOTPAGE
Lloh39:
	ldr	x8, [x8, _DORQ_REG_PF_MAX_ICID_6_RT_OFFSET@GOTPAGEOFF]
Lloh40:
	ldr	w1, [x8]
	mov	x0, x19
	mov	x2, x20
	bl	_STORE_RT_REG
Lloh41:
	adrp	x8, _DORQ_REG_VF_MAX_ICID_6_RT_OFFSET@GOTPAGE
Lloh42:
	ldr	x8, [x8, _DORQ_REG_VF_MAX_ICID_6_RT_OFFSET@GOTPAGEOFF]
Lloh43:
	ldr	w1, [x8]
	mov	x0, x19
	mov	x2, x21
	bl	_STORE_RT_REG
Lloh44:
	adrp	x8, _DORQ_REG_PF_MAX_ICID_7_RT_OFFSET@GOTPAGE
Lloh45:
	ldr	x8, [x8, _DORQ_REG_PF_MAX_ICID_7_RT_OFFSET@GOTPAGEOFF]
Lloh46:
	ldr	w1, [x8]
	mov	x0, x19
	mov	x2, x20
	bl	_STORE_RT_REG
Lloh47:
	adrp	x8, _DORQ_REG_VF_MAX_ICID_7_RT_OFFSET@GOTPAGE
Lloh48:
	ldr	x8, [x8, _DORQ_REG_VF_MAX_ICID_7_RT_OFFSET@GOTPAGEOFF]
Lloh49:
	ldr	w1, [x8]
	mov	x0, x19
	mov	x2, x21
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	b	_STORE_RT_REG
	.loh AdrpLdrGotLdr	Lloh47, Lloh48, Lloh49
	.loh AdrpLdrGotLdr	Lloh44, Lloh45, Lloh46
	.loh AdrpLdrGotLdr	Lloh41, Lloh42, Lloh43
	.loh AdrpLdrGotLdr	Lloh38, Lloh39, Lloh40
	.loh AdrpLdrGotLdr	Lloh35, Lloh36, Lloh37
	.loh AdrpLdrGotLdr	Lloh32, Lloh33, Lloh34
	.loh AdrpLdrGotLdr	Lloh29, Lloh30, Lloh31
	.loh AdrpLdrGotLdr	Lloh26, Lloh27, Lloh28
	.loh AdrpLdrGotLdr	Lloh23, Lloh24, Lloh25
	.loh AdrpLdrGotLdr	Lloh20, Lloh21, Lloh22
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh19
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh16
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGot	Lloh0, Lloh1
	.cfi_endproc
                                        ; -- End function
	.comm	_DQ_RANGE_SHIFT,4,2             ; @DQ_RANGE_SHIFT
	.comm	_DORQ_REG_PF_MAX_ICID_0_RT_OFFSET,4,2 ; @DORQ_REG_PF_MAX_ICID_0_RT_OFFSET
	.comm	_DORQ_REG_VF_MAX_ICID_0_RT_OFFSET,4,2 ; @DORQ_REG_VF_MAX_ICID_0_RT_OFFSET
	.comm	_DORQ_REG_PF_MAX_ICID_1_RT_OFFSET,4,2 ; @DORQ_REG_PF_MAX_ICID_1_RT_OFFSET
	.comm	_DORQ_REG_VF_MAX_ICID_1_RT_OFFSET,4,2 ; @DORQ_REG_VF_MAX_ICID_1_RT_OFFSET
	.comm	_DORQ_REG_PF_MAX_ICID_2_RT_OFFSET,4,2 ; @DORQ_REG_PF_MAX_ICID_2_RT_OFFSET
	.comm	_DORQ_REG_VF_MAX_ICID_2_RT_OFFSET,4,2 ; @DORQ_REG_VF_MAX_ICID_2_RT_OFFSET
	.comm	_DORQ_REG_PF_MAX_ICID_3_RT_OFFSET,4,2 ; @DORQ_REG_PF_MAX_ICID_3_RT_OFFSET
	.comm	_DORQ_REG_VF_MAX_ICID_3_RT_OFFSET,4,2 ; @DORQ_REG_VF_MAX_ICID_3_RT_OFFSET
	.comm	_DORQ_REG_PF_MAX_ICID_4_RT_OFFSET,4,2 ; @DORQ_REG_PF_MAX_ICID_4_RT_OFFSET
	.comm	_DORQ_REG_VF_MAX_ICID_4_RT_OFFSET,4,2 ; @DORQ_REG_VF_MAX_ICID_4_RT_OFFSET
	.comm	_DORQ_REG_PF_MAX_ICID_5_RT_OFFSET,4,2 ; @DORQ_REG_PF_MAX_ICID_5_RT_OFFSET
	.comm	_DORQ_REG_VF_MAX_ICID_5_RT_OFFSET,4,2 ; @DORQ_REG_VF_MAX_ICID_5_RT_OFFSET
	.comm	_DORQ_REG_PF_MAX_ICID_6_RT_OFFSET,4,2 ; @DORQ_REG_PF_MAX_ICID_6_RT_OFFSET
	.comm	_DORQ_REG_VF_MAX_ICID_6_RT_OFFSET,4,2 ; @DORQ_REG_VF_MAX_ICID_6_RT_OFFSET
	.comm	_DORQ_REG_PF_MAX_ICID_7_RT_OFFSET,4,2 ; @DORQ_REG_PF_MAX_ICID_7_RT_OFFSET
	.comm	_DORQ_REG_VF_MAX_ICID_7_RT_OFFSET,4,2 ; @DORQ_REG_VF_MAX_ICID_7_RT_OFFSET
	.no_dead_strip	_qed_dq_init_pf
.subsections_via_symbols
