	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function iwl_pcie_load_firmware_chunk_fh
_iwl_pcie_load_firmware_chunk_fh:       ## @iwl_pcie_load_firmware_chunk_fh
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%ecx, %r14d
	movl	%edx, %r15d
	movl	%esi, %r12d
	movq	%rdi, %r13
	movq	_FH_SRVC_CHNL@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	%rax, %rbx
	callq	_FH_TCSR_CHNL_TX_CONFIG_REG
	movq	_FH_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_PAUSE@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	movq	%r13, %rdi
	movl	%eax, %esi
	callq	_iwl_write32
	movl	(%rbx), %edi
	callq	_FH_SRVC_CHNL_SRAM_ADDR_REG
	movq	%r13, %rdi
	movl	%eax, %esi
	movl	%r12d, %edx
	callq	_iwl_write32
	movl	(%rbx), %edi
	callq	_FH_TFDIB_CTRL0_REG
	movq	_FH_MEM_TFDIB_DRAM_ADDR_LSB_MSK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	andl	%r15d, %edx
	movq	%r13, %rdi
	movl	%eax, %esi
	callq	_iwl_write32
	movl	(%rbx), %edi
	callq	_FH_TFDIB_CTRL1_REG
	movl	%eax, %r12d
	movl	%r15d, %edi
	callq	_iwl_get_dma_hi_addr
	movq	_FH_MEM_TFDIB_REG1_ADDR_BITSHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shll	%cl, %eax
	orl	%eax, %r14d
	movq	%r13, %rdi
	movl	%r12d, %esi
	movl	%r14d, %edx
	callq	_iwl_write32
	movl	(%rbx), %edi
	movq	%rbx, %r15
	callq	_FH_TCSR_CHNL_TX_BUF_STS_REG
	movl	%eax, %r14d
	movq	_FH_TCSR_CHNL_TX_BUF_STS_REG_POS_TB_NUM@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_BIT
	movl	%eax, %ebx
	movq	_FH_TCSR_CHNL_TX_BUF_STS_REG_POS_TB_IDX@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_BIT
	orl	%eax, %ebx
	movq	_FH_TCSR_CHNL_TX_BUF_STS_REG_VAL_TFDB_VALID@GOTPCREL(%rip), %rax
	orl	(%rax), %ebx
	movq	%r13, %rdi
	movl	%r14d, %esi
	movl	%ebx, %edx
	callq	_iwl_write32
	movl	(%r15), %edi
	callq	_FH_TCSR_CHNL_TX_CONFIG_REG
	movq	_FH_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_ENABLE@GOTPCREL(%rip), %rcx
	movq	_FH_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_DISABLE@GOTPCREL(%rip), %rdx
	movl	(%rdx), %edx
	orl	(%rcx), %edx
	movq	_FH_TCSR_TX_CONFIG_REG_VAL_CIRQ_HOST_ENDTFD@GOTPCREL(%rip), %rcx
	orl	(%rcx), %edx
	movq	%r13, %rdi
	movl	%eax, %esi
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_iwl_write32                    ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_FH_SRVC_CHNL,4,2               ## @FH_SRVC_CHNL
	.comm	_FH_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_PAUSE,4,2 ## @FH_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_PAUSE
	.comm	_FH_MEM_TFDIB_DRAM_ADDR_LSB_MSK,4,2 ## @FH_MEM_TFDIB_DRAM_ADDR_LSB_MSK
	.comm	_FH_MEM_TFDIB_REG1_ADDR_BITSHIFT,4,2 ## @FH_MEM_TFDIB_REG1_ADDR_BITSHIFT
	.comm	_FH_TCSR_CHNL_TX_BUF_STS_REG_POS_TB_NUM,4,2 ## @FH_TCSR_CHNL_TX_BUF_STS_REG_POS_TB_NUM
	.comm	_FH_TCSR_CHNL_TX_BUF_STS_REG_POS_TB_IDX,4,2 ## @FH_TCSR_CHNL_TX_BUF_STS_REG_POS_TB_IDX
	.comm	_FH_TCSR_CHNL_TX_BUF_STS_REG_VAL_TFDB_VALID,4,2 ## @FH_TCSR_CHNL_TX_BUF_STS_REG_VAL_TFDB_VALID
	.comm	_FH_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_ENABLE,4,2 ## @FH_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_ENABLE
	.comm	_FH_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_DISABLE,4,2 ## @FH_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_DISABLE
	.comm	_FH_TCSR_TX_CONFIG_REG_VAL_CIRQ_HOST_ENDTFD,4,2 ## @FH_TCSR_TX_CONFIG_REG_VAL_CIRQ_HOST_ENDTFD
	.no_dead_strip	_iwl_pcie_load_firmware_chunk_fh
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function iwl_pcie_load_firmware_chunk_fh
_iwl_pcie_load_firmware_chunk_fh:       ; @iwl_pcie_load_firmware_chunk_fh
	.cfi_startproc
; %bb.0:
	stp	x24, x23, [sp, #-64]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x20, x3
	mov	x21, x2
	mov	x22, x1
	mov	x19, x0
Lloh0:
	adrp	x23, _FH_SRVC_CHNL@GOTPAGE
Lloh1:
	ldr	x23, [x23, _FH_SRVC_CHNL@GOTPAGEOFF]
	ldr	w0, [x23]
	bl	_FH_TCSR_CHNL_TX_CONFIG_REG
	mov	x1, x0
Lloh2:
	adrp	x8, _FH_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_PAUSE@GOTPAGE
Lloh3:
	ldr	x8, [x8, _FH_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_PAUSE@GOTPAGEOFF]
Lloh4:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_iwl_write32
	ldr	w0, [x23]
	bl	_FH_SRVC_CHNL_SRAM_ADDR_REG
	mov	x1, x0
	mov	x0, x19
	mov	x2, x22
	bl	_iwl_write32
	ldr	w0, [x23]
	bl	_FH_TFDIB_CTRL0_REG
	mov	x1, x0
Lloh5:
	adrp	x8, _FH_MEM_TFDIB_DRAM_ADDR_LSB_MSK@GOTPAGE
Lloh6:
	ldr	x8, [x8, _FH_MEM_TFDIB_DRAM_ADDR_LSB_MSK@GOTPAGEOFF]
Lloh7:
	ldr	w8, [x8]
	and	w2, w8, w21
	mov	x0, x19
	bl	_iwl_write32
	ldr	w0, [x23]
	bl	_FH_TFDIB_CTRL1_REG
	mov	x22, x0
	mov	x0, x21
	bl	_iwl_get_dma_hi_addr
Lloh8:
	adrp	x8, _FH_MEM_TFDIB_REG1_ADDR_BITSHIFT@GOTPAGE
Lloh9:
	ldr	x8, [x8, _FH_MEM_TFDIB_REG1_ADDR_BITSHIFT@GOTPAGEOFF]
Lloh10:
	ldr	w8, [x8]
	lsl	w8, w0, w8
	orr	w2, w8, w20
	mov	x0, x19
	mov	x1, x22
	bl	_iwl_write32
	ldr	w0, [x23]
	bl	_FH_TCSR_CHNL_TX_BUF_STS_REG
	mov	x20, x0
Lloh11:
	adrp	x8, _FH_TCSR_CHNL_TX_BUF_STS_REG_POS_TB_NUM@GOTPAGE
Lloh12:
	ldr	x8, [x8, _FH_TCSR_CHNL_TX_BUF_STS_REG_POS_TB_NUM@GOTPAGEOFF]
Lloh13:
	ldr	w0, [x8]
	bl	_BIT
	mov	x21, x0
Lloh14:
	adrp	x8, _FH_TCSR_CHNL_TX_BUF_STS_REG_POS_TB_IDX@GOTPAGE
Lloh15:
	ldr	x8, [x8, _FH_TCSR_CHNL_TX_BUF_STS_REG_POS_TB_IDX@GOTPAGEOFF]
Lloh16:
	ldr	w0, [x8]
	bl	_BIT
	orr	w8, w0, w21
Lloh17:
	adrp	x9, _FH_TCSR_CHNL_TX_BUF_STS_REG_VAL_TFDB_VALID@GOTPAGE
Lloh18:
	ldr	x9, [x9, _FH_TCSR_CHNL_TX_BUF_STS_REG_VAL_TFDB_VALID@GOTPAGEOFF]
Lloh19:
	ldr	w9, [x9]
	orr	w2, w8, w9
	mov	x0, x19
	mov	x1, x20
	bl	_iwl_write32
	ldr	w0, [x23]
	bl	_FH_TCSR_CHNL_TX_CONFIG_REG
	mov	x1, x0
Lloh20:
	adrp	x8, _FH_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_ENABLE@GOTPAGE
Lloh21:
	ldr	x8, [x8, _FH_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_ENABLE@GOTPAGEOFF]
Lloh22:
	ldr	w8, [x8]
Lloh23:
	adrp	x9, _FH_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_DISABLE@GOTPAGE
Lloh24:
	ldr	x9, [x9, _FH_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_DISABLE@GOTPAGEOFF]
Lloh25:
	ldr	w9, [x9]
Lloh26:
	adrp	x10, _FH_TCSR_TX_CONFIG_REG_VAL_CIRQ_HOST_ENDTFD@GOTPAGE
Lloh27:
	ldr	x10, [x10, _FH_TCSR_TX_CONFIG_REG_VAL_CIRQ_HOST_ENDTFD@GOTPAGEOFF]
	orr	w8, w9, w8
Lloh28:
	ldr	w9, [x10]
	orr	w2, w8, w9
	mov	x0, x19
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	b	_iwl_write32
	.loh AdrpLdrGotLdr	Lloh26, Lloh27, Lloh28
	.loh AdrpLdrGotLdr	Lloh23, Lloh24, Lloh25
	.loh AdrpLdrGotLdr	Lloh20, Lloh21, Lloh22
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh19
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh16
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGot	Lloh0, Lloh1
	.cfi_endproc
                                        ; -- End function
	.comm	_FH_SRVC_CHNL,4,2               ; @FH_SRVC_CHNL
	.comm	_FH_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_PAUSE,4,2 ; @FH_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_PAUSE
	.comm	_FH_MEM_TFDIB_DRAM_ADDR_LSB_MSK,4,2 ; @FH_MEM_TFDIB_DRAM_ADDR_LSB_MSK
	.comm	_FH_MEM_TFDIB_REG1_ADDR_BITSHIFT,4,2 ; @FH_MEM_TFDIB_REG1_ADDR_BITSHIFT
	.comm	_FH_TCSR_CHNL_TX_BUF_STS_REG_POS_TB_NUM,4,2 ; @FH_TCSR_CHNL_TX_BUF_STS_REG_POS_TB_NUM
	.comm	_FH_TCSR_CHNL_TX_BUF_STS_REG_POS_TB_IDX,4,2 ; @FH_TCSR_CHNL_TX_BUF_STS_REG_POS_TB_IDX
	.comm	_FH_TCSR_CHNL_TX_BUF_STS_REG_VAL_TFDB_VALID,4,2 ; @FH_TCSR_CHNL_TX_BUF_STS_REG_VAL_TFDB_VALID
	.comm	_FH_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_ENABLE,4,2 ; @FH_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_ENABLE
	.comm	_FH_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_DISABLE,4,2 ; @FH_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_DISABLE
	.comm	_FH_TCSR_TX_CONFIG_REG_VAL_CIRQ_HOST_ENDTFD,4,2 ; @FH_TCSR_TX_CONFIG_REG_VAL_CIRQ_HOST_ENDTFD
	.no_dead_strip	_iwl_pcie_load_firmware_chunk_fh
.subsections_via_symbols
