	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function ingenic_pinmux_gpio_set_direction
_ingenic_pinmux_gpio_set_direction:     ## @ingenic_pinmux_gpio_set_direction
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%ecx, %r15d
	movl	%edx, %r14d
	movq	%rdi, %rbx
	callq	_pinctrl_dev_get_drvdata
	movq	%rax, %r12
	movq	_PINS_PER_GPIO_CHIP@GOTPCREL(%rip), %rcx
	movl	%r14d, %eax
	xorl	%edx, %edx
	divl	(%rcx)
	movl	%edx, %ecx
	movl	(%rbx), %edi
	addb	$65, %al
	testl	%r15d, %r15d
	leaq	L_.str.2(%rip), %rdx
	leaq	L_.str.1(%rip), %r8
	cmoveq	%rdx, %r8
	movsbl	%al, %edx
	leaq	L_.str(%rip), %rsi
	callq	_dev_dbg
	movq	(%r12), %rax
	movq	_ID_X1000@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jge	LBB0_1
## %bb.2:
	movq	_ID_JZ4760@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jge	LBB0_3
## %bb.4:
	xorl	%ebx, %ebx
	testl	%r15d, %r15d
	sete	%bl
	movq	_JZ4740_GPIO_SELECT@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r12, %rdi
	movl	%r14d, %esi
	xorl	%ecx, %ecx
	callq	_ingenic_config_pin
	movq	_JZ4740_GPIO_DIR@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r12, %rdi
	movl	%r14d, %esi
	movl	%ebx, %ecx
	callq	_ingenic_config_pin
	movq	_JZ4740_GPIO_FUNC@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r12, %rdi
	movl	%r14d, %esi
	xorl	%ecx, %ecx
	jmp	LBB0_5
LBB0_1:
	movq	_JZ4760_GPIO_INT@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r12, %rdi
	movl	%r14d, %esi
	xorl	%ecx, %ecx
	callq	_ingenic_shadow_config_pin
	movq	_GPIO_MSK@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r12, %rdi
	movl	%r14d, %esi
	movl	$1, %ecx
	callq	_ingenic_shadow_config_pin
	movq	_JZ4760_GPIO_PAT1@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r12, %rdi
	movl	%r14d, %esi
	movl	%r15d, %ecx
	callq	_ingenic_shadow_config_pin
	movq	%r12, %rdi
	movl	%r14d, %esi
	callq	_ingenic_shadow_config_pin_load
	jmp	LBB0_6
LBB0_3:
	movq	_JZ4760_GPIO_INT@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r12, %rdi
	movl	%r14d, %esi
	xorl	%ecx, %ecx
	callq	_ingenic_config_pin
	movq	_GPIO_MSK@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r12, %rdi
	movl	%r14d, %esi
	movl	$1, %ecx
	callq	_ingenic_config_pin
	movq	_JZ4760_GPIO_PAT1@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r12, %rdi
	movl	%r14d, %esi
	movl	%r15d, %ecx
LBB0_5:
	callq	_ingenic_config_pin
LBB0_6:
	xorl	%eax, %eax
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_PINS_PER_GPIO_CHIP,4,2         ## @PINS_PER_GPIO_CHIP
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"set pin P%c%u to %sput\n"

L_.str.1:                               ## @.str.1
	.asciz	"in"

L_.str.2:                               ## @.str.2
	.asciz	"out"

	.comm	_ID_X1000,8,3                   ## @ID_X1000
	.comm	_JZ4760_GPIO_INT,4,2            ## @JZ4760_GPIO_INT
	.comm	_GPIO_MSK,4,2                   ## @GPIO_MSK
	.comm	_JZ4760_GPIO_PAT1,4,2           ## @JZ4760_GPIO_PAT1
	.comm	_ID_JZ4760,8,3                  ## @ID_JZ4760
	.comm	_JZ4740_GPIO_SELECT,4,2         ## @JZ4740_GPIO_SELECT
	.comm	_JZ4740_GPIO_DIR,4,2            ## @JZ4740_GPIO_DIR
	.comm	_JZ4740_GPIO_FUNC,4,2           ## @JZ4740_GPIO_FUNC
	.no_dead_strip	_ingenic_pinmux_gpio_set_direction
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function ingenic_pinmux_gpio_set_direction
_ingenic_pinmux_gpio_set_direction:     ; @ingenic_pinmux_gpio_set_direction
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x21, x3
	mov	x19, x2
	mov	x22, x0
	bl	_pinctrl_dev_get_drvdata
	mov	x20, x0
Lloh0:
	adrp	x8, _PINS_PER_GPIO_CHIP@GOTPAGE
Lloh1:
	ldr	x8, [x8, _PINS_PER_GPIO_CHIP@GOTPAGEOFF]
Lloh2:
	ldr	w8, [x8]
	udiv	w9, w19, w8
	msub	w3, w9, w8, w19
	ldr	w0, [x22]
Lloh3:
	adrp	x8, l_.str.1@PAGE
Lloh4:
	add	x8, x8, l_.str.1@PAGEOFF
	add	w9, w9, #65
Lloh5:
	adrp	x10, l_.str.2@PAGE
Lloh6:
	add	x10, x10, l_.str.2@PAGEOFF
	cmp	w21, #0
	csel	x4, x10, x8, eq
	sxtb	w2, w9
Lloh7:
	adrp	x1, l_.str@PAGE
Lloh8:
	add	x1, x1, l_.str@PAGEOFF
	bl	_dev_dbg
	ldr	x8, [x20]
Lloh9:
	adrp	x9, _ID_X1000@GOTPAGE
Lloh10:
	ldr	x9, [x9, _ID_X1000@GOTPAGEOFF]
Lloh11:
	ldr	x9, [x9]
	cmp	x8, x9
	b.ge	LBB0_3
; %bb.1:
Lloh12:
	adrp	x9, _ID_JZ4760@GOTPAGE
Lloh13:
	ldr	x9, [x9, _ID_JZ4760@GOTPAGEOFF]
Lloh14:
	ldr	x9, [x9]
	cmp	x8, x9
	b.ge	LBB0_4
; %bb.2:
	cmp	w21, #0
	cset	w21, eq
Lloh15:
	adrp	x8, _JZ4740_GPIO_SELECT@GOTPAGE
Lloh16:
	ldr	x8, [x8, _JZ4740_GPIO_SELECT@GOTPAGEOFF]
Lloh17:
	ldr	w2, [x8]
	mov	x0, x20
	mov	x1, x19
	mov	w3, #0
	bl	_ingenic_config_pin
Lloh18:
	adrp	x8, _JZ4740_GPIO_DIR@GOTPAGE
Lloh19:
	ldr	x8, [x8, _JZ4740_GPIO_DIR@GOTPAGEOFF]
Lloh20:
	ldr	w2, [x8]
	mov	x0, x20
	mov	x1, x19
	mov	x3, x21
	bl	_ingenic_config_pin
Lloh21:
	adrp	x8, _JZ4740_GPIO_FUNC@GOTPAGE
Lloh22:
	ldr	x8, [x8, _JZ4740_GPIO_FUNC@GOTPAGEOFF]
Lloh23:
	ldr	w2, [x8]
	mov	x0, x20
	mov	x1, x19
	mov	w3, #0
	b	LBB0_5
LBB0_3:
Lloh24:
	adrp	x8, _JZ4760_GPIO_INT@GOTPAGE
Lloh25:
	ldr	x8, [x8, _JZ4760_GPIO_INT@GOTPAGEOFF]
Lloh26:
	ldr	w2, [x8]
	mov	x0, x20
	mov	x1, x19
	mov	w3, #0
	bl	_ingenic_shadow_config_pin
Lloh27:
	adrp	x8, _GPIO_MSK@GOTPAGE
Lloh28:
	ldr	x8, [x8, _GPIO_MSK@GOTPAGEOFF]
Lloh29:
	ldr	w2, [x8]
	mov	x0, x20
	mov	x1, x19
	mov	w3, #1
	bl	_ingenic_shadow_config_pin
Lloh30:
	adrp	x8, _JZ4760_GPIO_PAT1@GOTPAGE
Lloh31:
	ldr	x8, [x8, _JZ4760_GPIO_PAT1@GOTPAGEOFF]
Lloh32:
	ldr	w2, [x8]
	mov	x0, x20
	mov	x1, x19
	mov	x3, x21
	bl	_ingenic_shadow_config_pin
	mov	x0, x20
	mov	x1, x19
	bl	_ingenic_shadow_config_pin_load
	b	LBB0_6
LBB0_4:
Lloh33:
	adrp	x8, _JZ4760_GPIO_INT@GOTPAGE
Lloh34:
	ldr	x8, [x8, _JZ4760_GPIO_INT@GOTPAGEOFF]
Lloh35:
	ldr	w2, [x8]
	mov	x0, x20
	mov	x1, x19
	mov	w3, #0
	bl	_ingenic_config_pin
Lloh36:
	adrp	x8, _GPIO_MSK@GOTPAGE
Lloh37:
	ldr	x8, [x8, _GPIO_MSK@GOTPAGEOFF]
Lloh38:
	ldr	w2, [x8]
	mov	x0, x20
	mov	x1, x19
	mov	w3, #1
	bl	_ingenic_config_pin
Lloh39:
	adrp	x8, _JZ4760_GPIO_PAT1@GOTPAGE
Lloh40:
	ldr	x8, [x8, _JZ4760_GPIO_PAT1@GOTPAGEOFF]
Lloh41:
	ldr	w2, [x8]
	mov	x0, x20
	mov	x1, x19
	mov	x3, x21
LBB0_5:
	bl	_ingenic_config_pin
LBB0_6:
	mov	w0, #0
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpAdd	Lloh7, Lloh8
	.loh AdrpAdd	Lloh5, Lloh6
	.loh AdrpAdd	Lloh3, Lloh4
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh30, Lloh31, Lloh32
	.loh AdrpLdrGotLdr	Lloh27, Lloh28, Lloh29
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.loh AdrpLdrGotLdr	Lloh39, Lloh40, Lloh41
	.loh AdrpLdrGotLdr	Lloh36, Lloh37, Lloh38
	.loh AdrpLdrGotLdr	Lloh33, Lloh34, Lloh35
	.cfi_endproc
                                        ; -- End function
	.comm	_PINS_PER_GPIO_CHIP,4,2         ; @PINS_PER_GPIO_CHIP
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"set pin P%c%u to %sput\n"

l_.str.1:                               ; @.str.1
	.asciz	"in"

l_.str.2:                               ; @.str.2
	.asciz	"out"

	.comm	_ID_X1000,8,3                   ; @ID_X1000
	.comm	_JZ4760_GPIO_INT,4,2            ; @JZ4760_GPIO_INT
	.comm	_GPIO_MSK,4,2                   ; @GPIO_MSK
	.comm	_JZ4760_GPIO_PAT1,4,2           ; @JZ4760_GPIO_PAT1
	.comm	_ID_JZ4760,8,3                  ; @ID_JZ4760
	.comm	_JZ4740_GPIO_SELECT,4,2         ; @JZ4740_GPIO_SELECT
	.comm	_JZ4740_GPIO_DIR,4,2            ; @JZ4740_GPIO_DIR
	.comm	_JZ4740_GPIO_FUNC,4,2           ; @JZ4740_GPIO_FUNC
	.no_dead_strip	_ingenic_pinmux_gpio_set_direction
.subsections_via_symbols
