	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function mvpp2_rx_irqs_setup
_mvpp2_rx_irqs_setup:                   ## @mvpp2_rx_irqs_setup
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r15
	movq	24(%rdi), %r14
	movq	(%r14), %rax
	movq	_MVPP21@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jne	LBB0_1
## %bb.7:
	movl	(%r15), %edi
	callq	_MVPP21_ISR_RXQ_GROUP_REG
	movl	4(%r15), %edx
	movq	%r14, %rdi
	movl	%eax, %esi
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_mvpp2_write                    ## TAILCALL
LBB0_1:
	movl	8(%r15), %eax
	testl	%eax, %eax
	jle	LBB0_6
## %bb.2:
	xorl	%ebx, %ebx
	xorl	%r12d, %r12d
	jmp	LBB0_3
	.p2align	4, 0x90
LBB0_5:                                 ##   in Loop: Header=BB0_3 Depth=1
	incq	%r12
	movslq	%eax, %rcx
	addq	$12, %rbx
	cmpq	%rcx, %r12
	jge	LBB0_6
LBB0_3:                                 ## =>This Inner Loop Header: Depth=1
	movq	16(%r15), %r13
	cmpl	$0, (%r13,%rbx)
	je	LBB0_5
## %bb.4:                               ##   in Loop: Header=BB0_3 Depth=1
	movl	(%r15), %edx
	movq	_MVPP22_ISR_RXQ_GROUP_INDEX_GROUP_OFFSET@GOTPCREL(%rip), %rax
	movzbl	(%rax), %ecx
	shll	%cl, %edx
	orl	4(%r13,%rbx), %edx
	movq	_MVPP22_ISR_RXQ_GROUP_INDEX_REG@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	callq	_mvpp2_write
	movl	(%r13,%rbx), %edx
	movq	_MVPP22_ISR_RXQ_SUB_GROUP_SIZE_OFFSET@GOTPCREL(%rip), %rax
	movzbl	(%rax), %ecx
	shll	%cl, %edx
	orl	8(%r13,%rbx), %edx
	movq	_MVPP22_ISR_RXQ_SUB_GROUP_CONFIG_REG@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	callq	_mvpp2_write
	movl	8(%r15), %eax
	jmp	LBB0_5
LBB0_6:
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_MVPP21,8,3                     ## @MVPP21
	.comm	_MVPP22_ISR_RXQ_GROUP_INDEX_GROUP_OFFSET,4,2 ## @MVPP22_ISR_RXQ_GROUP_INDEX_GROUP_OFFSET
	.comm	_MVPP22_ISR_RXQ_GROUP_INDEX_REG,4,2 ## @MVPP22_ISR_RXQ_GROUP_INDEX_REG
	.comm	_MVPP22_ISR_RXQ_SUB_GROUP_SIZE_OFFSET,4,2 ## @MVPP22_ISR_RXQ_SUB_GROUP_SIZE_OFFSET
	.comm	_MVPP22_ISR_RXQ_SUB_GROUP_CONFIG_REG,4,2 ## @MVPP22_ISR_RXQ_SUB_GROUP_CONFIG_REG
	.no_dead_strip	_mvpp2_rx_irqs_setup
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function mvpp2_rx_irqs_setup
_mvpp2_rx_irqs_setup:                   ; @mvpp2_rx_irqs_setup
	.cfi_startproc
; %bb.0:
	stp	x28, x27, [sp, #-96]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 96
	stp	x26, x25, [sp, #16]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #32]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #48]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #64]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #80]             ; 16-byte Folded Spill
	add	x29, sp, #80
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	mov	x20, x0
	ldr	x19, [x0, #24]
	ldr	x8, [x19]
Lloh0:
	adrp	x9, _MVPP21@GOTPAGE
Lloh1:
	ldr	x9, [x9, _MVPP21@GOTPAGEOFF]
Lloh2:
	ldr	x9, [x9]
	cmp	x8, x9
	b.ne	LBB0_2
; %bb.1:
	ldr	w0, [x20]
	bl	_MVPP21_ISR_RXQ_GROUP_REG
	mov	x1, x0
	ldr	w2, [x20, #4]
	mov	x0, x19
	ldp	x29, x30, [sp, #80]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #64]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #48]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #32]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #16]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp], #96             ; 16-byte Folded Reload
	b	_mvpp2_write
LBB0_2:
	ldr	w8, [x20, #8]
	cmp	w8, #1
	b.lt	LBB0_7
; %bb.3:
	mov	x21, #0
	mov	x22, #0
Lloh3:
	adrp	x23, _MVPP22_ISR_RXQ_GROUP_INDEX_GROUP_OFFSET@GOTPAGE
Lloh4:
	ldr	x23, [x23, _MVPP22_ISR_RXQ_GROUP_INDEX_GROUP_OFFSET@GOTPAGEOFF]
Lloh5:
	adrp	x24, _MVPP22_ISR_RXQ_GROUP_INDEX_REG@GOTPAGE
Lloh6:
	ldr	x24, [x24, _MVPP22_ISR_RXQ_GROUP_INDEX_REG@GOTPAGEOFF]
Lloh7:
	adrp	x25, _MVPP22_ISR_RXQ_SUB_GROUP_SIZE_OFFSET@GOTPAGE
Lloh8:
	ldr	x25, [x25, _MVPP22_ISR_RXQ_SUB_GROUP_SIZE_OFFSET@GOTPAGEOFF]
Lloh9:
	adrp	x26, _MVPP22_ISR_RXQ_SUB_GROUP_CONFIG_REG@GOTPAGE
Lloh10:
	ldr	x26, [x26, _MVPP22_ISR_RXQ_SUB_GROUP_CONFIG_REG@GOTPAGEOFF]
	b	LBB0_5
LBB0_4:                                 ;   in Loop: Header=BB0_5 Depth=1
	add	x22, x22, #1
	add	x21, x21, #12
	cmp	x22, w8, sxtw
	b.ge	LBB0_7
LBB0_5:                                 ; =>This Inner Loop Header: Depth=1
	ldr	x9, [x20, #16]
	ldr	w10, [x9, x21]
	cbz	w10, LBB0_4
; %bb.6:                                ;   in Loop: Header=BB0_5 Depth=1
	add	x27, x9, x21
	ldr	w8, [x27, #4]
	ldr	w9, [x20]
	ldr	w10, [x23]
	lsl	w9, w9, w10
	orr	w2, w9, w8
	ldr	w1, [x24]
	mov	x0, x19
	bl	_mvpp2_write
	ldr	w8, [x27, #8]
	ldr	w9, [x27]
	ldr	w10, [x25]
	lsl	w9, w9, w10
	orr	w2, w9, w8
	ldr	w1, [x26]
	mov	x0, x19
	bl	_mvpp2_write
	ldr	w8, [x20, #8]
	b	LBB0_4
LBB0_7:
	ldp	x29, x30, [sp, #80]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #64]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #48]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #32]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #16]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp], #96             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGot	Lloh9, Lloh10
	.loh AdrpLdrGot	Lloh7, Lloh8
	.loh AdrpLdrGot	Lloh5, Lloh6
	.loh AdrpLdrGot	Lloh3, Lloh4
	.cfi_endproc
                                        ; -- End function
	.comm	_MVPP21,8,3                     ; @MVPP21
	.comm	_MVPP22_ISR_RXQ_GROUP_INDEX_GROUP_OFFSET,4,2 ; @MVPP22_ISR_RXQ_GROUP_INDEX_GROUP_OFFSET
	.comm	_MVPP22_ISR_RXQ_GROUP_INDEX_REG,4,2 ; @MVPP22_ISR_RXQ_GROUP_INDEX_REG
	.comm	_MVPP22_ISR_RXQ_SUB_GROUP_SIZE_OFFSET,4,2 ; @MVPP22_ISR_RXQ_SUB_GROUP_SIZE_OFFSET
	.comm	_MVPP22_ISR_RXQ_SUB_GROUP_CONFIG_REG,4,2 ; @MVPP22_ISR_RXQ_SUB_GROUP_CONFIG_REG
	.no_dead_strip	_mvpp2_rx_irqs_setup
.subsections_via_symbols
