	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function rockchip_pcie_phy_init
_rockchip_pcie_phy_init:                ## @rockchip_pcie_phy_init
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r14
	callq	_phy_get_drvdata
	movq	%rax, %rdi
	callq	_to_pcie_phy
	movq	%rax, %rbx
	movq	%rax, %rdi
	callq	_mutex_lock
	movl	4(%rbx), %eax
	leal	1(%rax), %ecx
	movl	%ecx, 4(%rbx)
	xorl	%r15d, %r15d
	testl	%eax, %eax
	jne	LBB0_6
## %bb.1:
	movl	8(%rbx), %edi
	callq	_clk_prepare_enable
	testl	%eax, %eax
	je	LBB0_3
## %bb.2:
	movl	%eax, %r12d
	leaq	L_.str(%rip), %rsi
	movq	%r14, %rdi
	xorl	%eax, %eax
	callq	_dev_err
	jmp	LBB0_5
LBB0_3:
	movl	12(%rbx), %edi
	callq	_reset_control_assert
	testl	%eax, %eax
	je	LBB0_6
## %bb.4:
	movl	%eax, %r12d
	leaq	L_.str.1(%rip), %rsi
	movq	%r14, %rdi
	movl	%eax, %edx
	xorl	%eax, %eax
	callq	_dev_err
	movl	8(%rbx), %edi
	callq	_clk_disable_unprepare
LBB0_5:
	movl	%r12d, %r15d
	decl	4(%rbx)
LBB0_6:
	movq	%rbx, %rdi
	callq	_mutex_unlock
	movl	%r15d, %eax
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"Fail to enable pcie ref clock.\n"

L_.str.1:                               ## @.str.1
	.asciz	"assert phy_rst err %d\n"

	.no_dead_strip	_rockchip_pcie_phy_init
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function rockchip_pcie_phy_init
_rockchip_pcie_phy_init:                ; @rockchip_pcie_phy_init
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #64
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x20, x0
	bl	_phy_get_drvdata
	bl	_to_pcie_phy
	mov	x19, x0
	bl	_mutex_lock
	ldr	w8, [x19, #4]
	add	w9, w8, #1
	str	w9, [x19, #4]
	cbz	w8, LBB0_2
; %bb.1:
	mov	w21, #0
	b	LBB0_7
LBB0_2:
	ldr	w0, [x19, #8]
	bl	_clk_prepare_enable
	cbz	w0, LBB0_4
; %bb.3:
	mov	x21, x0
Lloh0:
	adrp	x1, l_.str@PAGE
Lloh1:
	add	x1, x1, l_.str@PAGEOFF
	mov	x0, x20
	bl	_dev_err
	b	LBB0_6
LBB0_4:
	ldr	w0, [x19, #12]
	bl	_reset_control_assert
	mov	x21, x0
	cbz	w0, LBB0_7
; %bb.5:
	str	x21, [sp]
Lloh2:
	adrp	x1, l_.str.1@PAGE
Lloh3:
	add	x1, x1, l_.str.1@PAGEOFF
	mov	x0, x20
	bl	_dev_err
	ldr	w0, [x19, #8]
	bl	_clk_disable_unprepare
LBB0_6:
	ldr	w8, [x19, #4]
	sub	w8, w8, #1
	str	w8, [x19, #4]
LBB0_7:
	mov	x0, x19
	bl	_mutex_unlock
	mov	x0, x21
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #64
	ret
	.loh AdrpAdd	Lloh0, Lloh1
	.loh AdrpAdd	Lloh2, Lloh3
	.cfi_endproc
                                        ; -- End function
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"Fail to enable pcie ref clock.\n"

l_.str.1:                               ; @.str.1
	.asciz	"assert phy_rst err %d\n"

	.no_dead_strip	_rockchip_pcie_phy_init
.subsections_via_symbols
