	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function aqr_config_intr
_aqr_config_intr:                       ## @aqr_config_intr
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %rbx
	movq	(%rdi), %r14
	movq	_PHY_INTERRUPT_ENABLED@GOTPCREL(%rip), %rax
	movq	(%rax), %r15
	xorl	%ecx, %ecx
	movq	_MDIO_MMD_AN@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_MDIO_AN_TX_VEND_INT_MASK2@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	cmpq	%r15, %r14
	jne	LBB0_2
## %bb.1:
	movq	_MDIO_AN_TX_VEND_INT_MASK2_LINK@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
LBB0_2:
	movq	%rbx, %rdi
	callq	_phy_write_mmd
	testl	%eax, %eax
	js	LBB0_6
## %bb.3:
	xorl	%ecx, %ecx
	movq	_MDIO_MMD_VEND1@GOTPCREL(%rip), %r12
	movl	(%r12), %esi
	movq	_VEND1_GLOBAL_INT_STD_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	cmpq	%r15, %r14
	jne	LBB0_5
## %bb.4:
	movq	_VEND1_GLOBAL_INT_STD_MASK_ALL@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
LBB0_5:
	movq	%rbx, %rdi
	callq	_phy_write_mmd
	testl	%eax, %eax
	js	LBB0_6
## %bb.7:
	movq	_VEND1_GLOBAL_INT_VEND_MASK_GLOBAL3@GOTPCREL(%rip), %rax
	movq	_VEND1_GLOBAL_INT_VEND_MASK_AN@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edi
	orl	(%rax), %edi
	xorl	%ecx, %ecx
	cmpq	%r15, %r14
	movl	(%r12), %esi
	movq	_VEND1_GLOBAL_INT_VEND_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	cmovel	%edi, %ecx
	movq	%rbx, %rdi
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_phy_write_mmd                  ## TAILCALL
LBB0_6:
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_PHY_INTERRUPT_ENABLED,8,3      ## @PHY_INTERRUPT_ENABLED
	.comm	_MDIO_MMD_AN,4,2                ## @MDIO_MMD_AN
	.comm	_MDIO_AN_TX_VEND_INT_MASK2,4,2  ## @MDIO_AN_TX_VEND_INT_MASK2
	.comm	_MDIO_AN_TX_VEND_INT_MASK2_LINK,4,2 ## @MDIO_AN_TX_VEND_INT_MASK2_LINK
	.comm	_MDIO_MMD_VEND1,4,2             ## @MDIO_MMD_VEND1
	.comm	_VEND1_GLOBAL_INT_STD_MASK,4,2  ## @VEND1_GLOBAL_INT_STD_MASK
	.comm	_VEND1_GLOBAL_INT_STD_MASK_ALL,4,2 ## @VEND1_GLOBAL_INT_STD_MASK_ALL
	.comm	_VEND1_GLOBAL_INT_VEND_MASK,4,2 ## @VEND1_GLOBAL_INT_VEND_MASK
	.comm	_VEND1_GLOBAL_INT_VEND_MASK_GLOBAL3,4,2 ## @VEND1_GLOBAL_INT_VEND_MASK_GLOBAL3
	.comm	_VEND1_GLOBAL_INT_VEND_MASK_AN,4,2 ## @VEND1_GLOBAL_INT_VEND_MASK_AN
	.no_dead_strip	_aqr_config_intr
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function aqr_config_intr
_aqr_config_intr:                       ; @aqr_config_intr
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x0
	ldr	x20, [x0]
Lloh0:
	adrp	x8, _PHY_INTERRUPT_ENABLED@GOTPAGE
Lloh1:
	ldr	x8, [x8, _PHY_INTERRUPT_ENABLED@GOTPAGEOFF]
Lloh2:
	ldr	x21, [x8]
Lloh3:
	adrp	x8, _MDIO_MMD_AN@GOTPAGE
Lloh4:
	ldr	x8, [x8, _MDIO_MMD_AN@GOTPAGEOFF]
Lloh5:
	ldr	w1, [x8]
Lloh6:
	adrp	x8, _MDIO_AN_TX_VEND_INT_MASK2@GOTPAGE
Lloh7:
	ldr	x8, [x8, _MDIO_AN_TX_VEND_INT_MASK2@GOTPAGEOFF]
Lloh8:
	ldr	w2, [x8]
Lloh9:
	adrp	x8, _MDIO_AN_TX_VEND_INT_MASK2_LINK@GOTPAGE
Lloh10:
	ldr	x8, [x8, _MDIO_AN_TX_VEND_INT_MASK2_LINK@GOTPAGEOFF]
Lloh11:
	ldr	w8, [x8]
	cmp	x20, x21
	csel	w3, w8, wzr, eq
	bl	_phy_write_mmd
	tbnz	w0, #31, LBB0_3
; %bb.1:
Lloh12:
	adrp	x22, _MDIO_MMD_VEND1@GOTPAGE
Lloh13:
	ldr	x22, [x22, _MDIO_MMD_VEND1@GOTPAGEOFF]
	ldr	w1, [x22]
Lloh14:
	adrp	x8, _VEND1_GLOBAL_INT_STD_MASK@GOTPAGE
Lloh15:
	ldr	x8, [x8, _VEND1_GLOBAL_INT_STD_MASK@GOTPAGEOFF]
Lloh16:
	ldr	w2, [x8]
Lloh17:
	adrp	x8, _VEND1_GLOBAL_INT_STD_MASK_ALL@GOTPAGE
Lloh18:
	ldr	x8, [x8, _VEND1_GLOBAL_INT_STD_MASK_ALL@GOTPAGEOFF]
Lloh19:
	ldr	w8, [x8]
	cmp	x20, x21
	csel	w3, w8, wzr, eq
	mov	x0, x19
	bl	_phy_write_mmd
	tbnz	w0, #31, LBB0_3
; %bb.2:
	ldr	w1, [x22]
Lloh20:
	adrp	x8, _VEND1_GLOBAL_INT_VEND_MASK@GOTPAGE
Lloh21:
	ldr	x8, [x8, _VEND1_GLOBAL_INT_VEND_MASK@GOTPAGEOFF]
Lloh22:
	adrp	x9, _VEND1_GLOBAL_INT_VEND_MASK_GLOBAL3@GOTPAGE
Lloh23:
	ldr	x9, [x9, _VEND1_GLOBAL_INT_VEND_MASK_GLOBAL3@GOTPAGEOFF]
Lloh24:
	ldr	w2, [x8]
Lloh25:
	ldr	w8, [x9]
Lloh26:
	adrp	x9, _VEND1_GLOBAL_INT_VEND_MASK_AN@GOTPAGE
Lloh27:
	ldr	x9, [x9, _VEND1_GLOBAL_INT_VEND_MASK_AN@GOTPAGEOFF]
Lloh28:
	ldr	w9, [x9]
	orr	w8, w9, w8
	cmp	x20, x21
	csel	w3, w8, wzr, eq
	mov	x0, x19
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	_phy_write_mmd
LBB0_3:
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh19
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh16
	.loh AdrpLdrGot	Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh26, Lloh27, Lloh28
	.loh AdrpLdrGotLdr	Lloh22, Lloh23, Lloh25
	.loh AdrpLdrGotLdr	Lloh20, Lloh21, Lloh24
	.cfi_endproc
                                        ; -- End function
	.comm	_PHY_INTERRUPT_ENABLED,8,3      ; @PHY_INTERRUPT_ENABLED
	.comm	_MDIO_MMD_AN,4,2                ; @MDIO_MMD_AN
	.comm	_MDIO_AN_TX_VEND_INT_MASK2,4,2  ; @MDIO_AN_TX_VEND_INT_MASK2
	.comm	_MDIO_AN_TX_VEND_INT_MASK2_LINK,4,2 ; @MDIO_AN_TX_VEND_INT_MASK2_LINK
	.comm	_MDIO_MMD_VEND1,4,2             ; @MDIO_MMD_VEND1
	.comm	_VEND1_GLOBAL_INT_STD_MASK,4,2  ; @VEND1_GLOBAL_INT_STD_MASK
	.comm	_VEND1_GLOBAL_INT_STD_MASK_ALL,4,2 ; @VEND1_GLOBAL_INT_STD_MASK_ALL
	.comm	_VEND1_GLOBAL_INT_VEND_MASK,4,2 ; @VEND1_GLOBAL_INT_VEND_MASK
	.comm	_VEND1_GLOBAL_INT_VEND_MASK_GLOBAL3,4,2 ; @VEND1_GLOBAL_INT_VEND_MASK_GLOBAL3
	.comm	_VEND1_GLOBAL_INT_VEND_MASK_AN,4,2 ; @VEND1_GLOBAL_INT_VEND_MASK_AN
	.no_dead_strip	_aqr_config_intr
.subsections_via_symbols
