	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_iwl_pcie_prepare_card_hw       ## -- Begin function iwl_pcie_prepare_card_hw
	.p2align	4, 0x90
_iwl_pcie_prepare_card_hw:              ## @iwl_pcie_prepare_card_hw
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r14
	leaq	L_.str(%rip), %rsi
	callq	_IWL_DEBUG_INFO
	movq	%r14, %rdi
	callq	_iwl_pcie_set_hw_ready
	xorl	%ebx, %ebx
	testl	%eax, %eax
	jns	LBB0_8
## %bb.1:
	movq	_CSR_DBG_LINK_PWR_MGMT_REG@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_CSR_RESET_LINK_PWR_MGMT_DISABLED@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r14, %rdi
	callq	_iwl_set_bit
	movl	$1000, %edi                     ## imm = 0x3E8
	movl	$2000, %esi                     ## imm = 0x7D0
	callq	_usleep_range
	xorl	%r15d, %r15d
	movq	_CSR_HW_IF_CONFIG_REG@GOTPCREL(%rip), %rax
	movq	_CSR_HW_IF_CONFIG_REG_PREPARE@GOTPCREL(%rip), %rcx
	xorl	%r12d, %r12d
LBB0_2:                                 ## =>This Loop Header: Depth=1
                                        ##     Child Loop BB0_3 Depth 2
	movl	(%rax), %esi
	movl	(%rcx), %edx
	movq	%r14, %rdi
	callq	_iwl_set_bit
	movl	%r12d, %r13d
	.p2align	4, 0x90
LBB0_3:                                 ##   Parent Loop BB0_2 Depth=1
                                        ## =>  This Inner Loop Header: Depth=2
	movq	%r14, %rdi
	callq	_iwl_pcie_set_hw_ready
	testl	%eax, %eax
	jns	LBB0_4
## %bb.5:                               ##   in Loop: Header=BB0_3 Depth=2
	movl	%eax, %ebx
	movl	$200, %edi
	movl	$1000, %esi                     ## imm = 0x3E8
	callq	_usleep_range
	leal	200(%r13), %r12d
	cmpl	$149800, %r13d                  ## imm = 0x24928
	movl	%r12d, %r13d
	jl	LBB0_3
## %bb.6:                               ##   in Loop: Header=BB0_2 Depth=1
	movl	$25, %edi
	callq	_msleep
	incl	%r15d
	cmpl	$10, %r15d
	movq	_CSR_HW_IF_CONFIG_REG@GOTPCREL(%rip), %rax
	movq	_CSR_HW_IF_CONFIG_REG_PREPARE@GOTPCREL(%rip), %rcx
	jne	LBB0_2
## %bb.7:
	leaq	L_.str.1(%rip), %rsi
	movq	%r14, %rdi
	callq	_IWL_ERR
	jmp	LBB0_8
LBB0_4:
	xorl	%ebx, %ebx
LBB0_8:
	movl	%ebx, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"iwl_trans_prepare_card_hw enter\n"

	.comm	_CSR_DBG_LINK_PWR_MGMT_REG,4,2  ## @CSR_DBG_LINK_PWR_MGMT_REG
	.comm	_CSR_RESET_LINK_PWR_MGMT_DISABLED,4,2 ## @CSR_RESET_LINK_PWR_MGMT_DISABLED
	.comm	_CSR_HW_IF_CONFIG_REG,4,2       ## @CSR_HW_IF_CONFIG_REG
	.comm	_CSR_HW_IF_CONFIG_REG_PREPARE,4,2 ## @CSR_HW_IF_CONFIG_REG_PREPARE
L_.str.1:                               ## @.str.1
	.asciz	"Couldn't prepare the card\n"

.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_iwl_pcie_prepare_card_hw       ; -- Begin function iwl_pcie_prepare_card_hw
	.p2align	2
_iwl_pcie_prepare_card_hw:              ; @iwl_pcie_prepare_card_hw
	.cfi_startproc
; %bb.0:
	stp	x26, x25, [sp, #-80]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	mov	x19, x0
Lloh0:
	adrp	x1, l_.str@PAGE
Lloh1:
	add	x1, x1, l_.str@PAGEOFF
	bl	_IWL_DEBUG_INFO
	mov	x0, x19
	bl	_iwl_pcie_set_hw_ready
	tbnz	w0, #31, LBB0_3
LBB0_1:
	mov	w20, #0
LBB0_2:
	mov	x0, x20
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp], #80             ; 16-byte Folded Reload
	ret
LBB0_3:
Lloh2:
	adrp	x8, _CSR_DBG_LINK_PWR_MGMT_REG@GOTPAGE
Lloh3:
	ldr	x8, [x8, _CSR_DBG_LINK_PWR_MGMT_REG@GOTPAGEOFF]
Lloh4:
	ldr	w1, [x8]
Lloh5:
	adrp	x8, _CSR_RESET_LINK_PWR_MGMT_DISABLED@GOTPAGE
Lloh6:
	ldr	x8, [x8, _CSR_RESET_LINK_PWR_MGMT_DISABLED@GOTPAGEOFF]
Lloh7:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_iwl_set_bit
	mov	w0, #1000
	mov	w1, #2000
	bl	_usleep_range
	mov	w21, #0
	mov	w25, #0
Lloh8:
	adrp	x22, _CSR_HW_IF_CONFIG_REG@GOTPAGE
Lloh9:
	ldr	x22, [x22, _CSR_HW_IF_CONFIG_REG@GOTPAGEOFF]
Lloh10:
	adrp	x23, _CSR_HW_IF_CONFIG_REG_PREPARE@GOTPAGE
Lloh11:
	ldr	x23, [x23, _CSR_HW_IF_CONFIG_REG_PREPARE@GOTPAGEOFF]
	mov	w24, #18728
	movk	w24, #2, lsl #16
LBB0_4:                                 ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_5 Depth 2
	ldr	w1, [x22]
	ldr	w2, [x23]
	mov	x0, x19
	bl	_iwl_set_bit
	mov	x26, x25
LBB0_5:                                 ;   Parent Loop BB0_4 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	mov	x0, x19
	bl	_iwl_pcie_set_hw_ready
	tbz	w0, #31, LBB0_1
; %bb.6:                                ;   in Loop: Header=BB0_5 Depth=2
	mov	x20, x0
	mov	w0, #200
	mov	w1, #1000
	bl	_usleep_range
	add	w25, w26, #200
	cmp	w26, w24
	mov	x26, x25
	b.lt	LBB0_5
; %bb.7:                                ;   in Loop: Header=BB0_4 Depth=1
	mov	w0, #25
	bl	_msleep
	add	w21, w21, #1
	cmp	w21, #10
	b.ne	LBB0_4
; %bb.8:
Lloh12:
	adrp	x1, l_.str.1@PAGE
Lloh13:
	add	x1, x1, l_.str.1@PAGEOFF
	mov	x0, x19
	bl	_IWL_ERR
	b	LBB0_2
	.loh AdrpAdd	Lloh0, Lloh1
	.loh AdrpLdrGot	Lloh10, Lloh11
	.loh AdrpLdrGot	Lloh8, Lloh9
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpAdd	Lloh12, Lloh13
	.cfi_endproc
                                        ; -- End function
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"iwl_trans_prepare_card_hw enter\n"

	.comm	_CSR_DBG_LINK_PWR_MGMT_REG,4,2  ; @CSR_DBG_LINK_PWR_MGMT_REG
	.comm	_CSR_RESET_LINK_PWR_MGMT_DISABLED,4,2 ; @CSR_RESET_LINK_PWR_MGMT_DISABLED
	.comm	_CSR_HW_IF_CONFIG_REG,4,2       ; @CSR_HW_IF_CONFIG_REG
	.comm	_CSR_HW_IF_CONFIG_REG_PREPARE,4,2 ; @CSR_HW_IF_CONFIG_REG_PREPARE
l_.str.1:                               ; @.str.1
	.asciz	"Couldn't prepare the card\n"

.subsections_via_symbols
