	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function inno_hdmi_phy_rk3228_power_on
_inno_hdmi_phy_rk3228_power_on:         ## @inno_hdmi_phy_rk3228_power_on
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdx, %r15
	movq	%rsi, %r14
	movq	%rdi, %r13
	movq	_RK3228_PDATAEN_DISABLE@GOTPCREL(%rip), %rbx
	movl	(%rbx), %ecx
	movl	$2, %esi
	movl	%ecx, %edx
	callq	_inno_update_bits
	movq	_RK3228_PRE_PLL_POWER_DOWN@GOTPCREL(%rip), %rax
	movq	_RK3228_POST_PLL_POWER_DOWN@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	orl	(%rax), %ecx
	movq	%r13, %rdi
	movl	$224, %esi
	movl	%ecx, %edx
	callq	_inno_update_bits
	movq	_RK3228_POST_PLL_PRE_DIV_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %r12d
	movl	12(%r14), %edi
	callq	_RK3228_POST_PLL_PRE_DIV
	movq	%r13, %rdi
	movl	$233, %esi
	movl	%r12d, %edx
	movl	%eax, %ecx
	callq	_inno_update_bits
	movq	_RK3228_POST_PLL_FB_DIV_8_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %r12d
	movl	8(%r14), %edi
	callq	_RK3228_POST_PLL_FB_DIV_8
	movq	%r13, %rdi
	movl	$235, %esi
	movl	%r12d, %edx
	movl	%eax, %ecx
	callq	_inno_update_bits
	movl	8(%r14), %edi
	callq	_RK3228_POST_PLL_FB_DIV_7_0
	movq	%r13, %rdi
	movl	$234, %esi
	movl	%eax, %edx
	callq	_inno_write
	movl	(%r14), %eax
	cmpl	$1, %eax
	jne	LBB0_2
## %bb.1:
	movq	_RK3228_POST_PLL_POST_DIV_ENABLE@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r13, %rdi
	movl	$233, %esi
	xorl	%ecx, %ecx
	jmp	LBB0_3
LBB0_2:
	movl	%eax, %ebx
	shrl	$31, %ebx
	addl	%eax, %ebx
	sarl	%ebx
	decl	%ebx
	movq	_RK3228_POST_PLL_POST_DIV_ENABLE@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movq	%r13, %rdi
	movl	$233, %esi
	movl	%ecx, %edx
	callq	_inno_update_bits
	movq	_RK3228_POST_PLL_POST_DIV_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %r12d
	movl	%ebx, %edi
	movq	_RK3228_PDATAEN_DISABLE@GOTPCREL(%rip), %rbx
	callq	_RK3228_POST_PLL_POST_DIV
	movq	%r13, %rdi
	movl	$235, %esi
	movl	%r12d, %edx
	movl	%eax, %ecx
LBB0_3:
	callq	_inno_update_bits
	movq	(%r15), %rax
	movl	(%rax), %edx
	movq	%r13, %rdi
	movl	$239, %esi
	callq	_inno_write
	movq	(%r15), %rax
	movl	4(%rax), %edx
	movq	%r13, %rdi
	movl	$240, %esi
	callq	_inno_write
	movq	(%r15), %rax
	movl	8(%rax), %edx
	movq	%r13, %rdi
	movl	$241, %esi
	callq	_inno_write
	movq	(%r15), %rax
	movl	12(%rax), %edx
	movq	%r13, %rdi
	movl	$242, %esi
	callq	_inno_write
	movq	_RK3228_POST_PLL_POWER_DOWN@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	_RK3228_PRE_PLL_POWER_DOWN@GOTPCREL(%rip), %rax
	orl	(%rax), %edx
	movq	%r13, %rdi
	movl	$224, %esi
	xorl	%ecx, %ecx
	callq	_inno_update_bits
	movq	_RK3228_BANDGAP_ENABLE@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movq	%r13, %rdi
	movl	$225, %esi
	movl	%ecx, %edx
	callq	_inno_update_bits
	movq	_RK3228_TMDS_DRIVER_ENABLE@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movq	%r13, %rdi
	movl	$225, %esi
	movl	%ecx, %edx
	callq	_inno_update_bits
	movq	_RK3228_POST_PLL_LOCK_STATUS@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	andl	$4, %ecx
	movq	%r13, %rdi
	movl	$235, %esi
	movl	$4, %edx
	movl	$100, %r8d
	movl	$100000, %r9d                   ## imm = 0x186A0
	callq	_inno_poll
	movl	%eax, %r15d
	testl	%eax, %eax
	je	LBB0_5
## %bb.4:
	movl	(%r13), %edi
	leaq	L_.str(%rip), %rsi
	callq	_dev_err
	jmp	LBB0_8
LBB0_5:
	cmpl	$340000001, 4(%r14)             ## imm = 0x1443FD01
	jl	LBB0_7
## %bb.6:
	movl	$100, %edi
	callq	_msleep
LBB0_7:
	movl	(%rbx), %edx
	movq	%r13, %rdi
	movl	$2, %esi
	xorl	%ecx, %ecx
	callq	_inno_update_bits
LBB0_8:
	movl	%r15d, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_RK3228_PDATAEN_DISABLE,4,2     ## @RK3228_PDATAEN_DISABLE
	.comm	_RK3228_PRE_PLL_POWER_DOWN,4,2  ## @RK3228_PRE_PLL_POWER_DOWN
	.comm	_RK3228_POST_PLL_POWER_DOWN,4,2 ## @RK3228_POST_PLL_POWER_DOWN
	.comm	_RK3228_POST_PLL_PRE_DIV_MASK,4,2 ## @RK3228_POST_PLL_PRE_DIV_MASK
	.comm	_RK3228_POST_PLL_FB_DIV_8_MASK,4,2 ## @RK3228_POST_PLL_FB_DIV_8_MASK
	.comm	_RK3228_POST_PLL_POST_DIV_ENABLE,4,2 ## @RK3228_POST_PLL_POST_DIV_ENABLE
	.comm	_RK3228_POST_PLL_POST_DIV_MASK,4,2 ## @RK3228_POST_PLL_POST_DIV_MASK
	.comm	_RK3228_BANDGAP_ENABLE,4,2      ## @RK3228_BANDGAP_ENABLE
	.comm	_RK3228_TMDS_DRIVER_ENABLE,4,2  ## @RK3228_TMDS_DRIVER_ENABLE
	.comm	_RK3228_POST_PLL_LOCK_STATUS,4,2 ## @RK3228_POST_PLL_LOCK_STATUS
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"Post-PLL locking failed\n"

	.no_dead_strip	_inno_hdmi_phy_rk3228_power_on
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function inno_hdmi_phy_rk3228_power_on
_inno_hdmi_phy_rk3228_power_on:         ; @inno_hdmi_phy_rk3228_power_on
	.cfi_startproc
; %bb.0:
	stp	x26, x25, [sp, #-80]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	mov	x21, x2
	mov	x20, x1
	mov	x19, x0
Lloh0:
	adrp	x24, _RK3228_PDATAEN_DISABLE@GOTPAGE
Lloh1:
	ldr	x24, [x24, _RK3228_PDATAEN_DISABLE@GOTPAGEOFF]
	ldr	w2, [x24]
	mov	w1, #2
	mov	x3, x2
	bl	_inno_update_bits
Lloh2:
	adrp	x25, _RK3228_PRE_PLL_POWER_DOWN@GOTPAGE
Lloh3:
	ldr	x25, [x25, _RK3228_PRE_PLL_POWER_DOWN@GOTPAGEOFF]
	ldr	w8, [x25]
Lloh4:
	adrp	x26, _RK3228_POST_PLL_POWER_DOWN@GOTPAGE
Lloh5:
	ldr	x26, [x26, _RK3228_POST_PLL_POWER_DOWN@GOTPAGEOFF]
	ldr	w9, [x26]
	orr	w2, w9, w8
	mov	x0, x19
	mov	w1, #224
	mov	x3, x2
	bl	_inno_update_bits
Lloh6:
	adrp	x8, _RK3228_POST_PLL_PRE_DIV_MASK@GOTPAGE
Lloh7:
	ldr	x8, [x8, _RK3228_POST_PLL_PRE_DIV_MASK@GOTPAGEOFF]
Lloh8:
	ldr	w22, [x8]
	ldr	w0, [x20, #12]
	bl	_RK3228_POST_PLL_PRE_DIV
	mov	x3, x0
	mov	x0, x19
	mov	w1, #233
	mov	x2, x22
	bl	_inno_update_bits
Lloh9:
	adrp	x8, _RK3228_POST_PLL_FB_DIV_8_MASK@GOTPAGE
Lloh10:
	ldr	x8, [x8, _RK3228_POST_PLL_FB_DIV_8_MASK@GOTPAGEOFF]
Lloh11:
	ldr	w22, [x8]
	ldr	w0, [x20, #8]
	bl	_RK3228_POST_PLL_FB_DIV_8
	mov	x3, x0
	mov	x0, x19
	mov	w1, #235
	mov	x2, x22
	bl	_inno_update_bits
	ldr	w0, [x20, #8]
	bl	_RK3228_POST_PLL_FB_DIV_7_0
	mov	x2, x0
	mov	x0, x19
	mov	w1, #234
	bl	_inno_write
	ldr	w8, [x20]
	cmp	w8, #1
	b.ne	LBB0_2
; %bb.1:
Lloh12:
	adrp	x8, _RK3228_POST_PLL_POST_DIV_ENABLE@GOTPAGE
Lloh13:
	ldr	x8, [x8, _RK3228_POST_PLL_POST_DIV_ENABLE@GOTPAGEOFF]
Lloh14:
	ldr	w2, [x8]
	mov	x0, x19
	mov	w1, #233
	mov	w3, #0
	b	LBB0_3
LBB0_2:
	cmp	w8, #0
	cinc	w8, w8, lt
	asr	w8, w8, #1
	sub	w22, w8, #1
Lloh15:
	adrp	x8, _RK3228_POST_PLL_POST_DIV_ENABLE@GOTPAGE
Lloh16:
	ldr	x8, [x8, _RK3228_POST_PLL_POST_DIV_ENABLE@GOTPAGEOFF]
Lloh17:
	ldr	w2, [x8]
	mov	x0, x19
	mov	w1, #233
	mov	x3, x2
	bl	_inno_update_bits
Lloh18:
	adrp	x8, _RK3228_POST_PLL_POST_DIV_MASK@GOTPAGE
Lloh19:
	ldr	x8, [x8, _RK3228_POST_PLL_POST_DIV_MASK@GOTPAGEOFF]
Lloh20:
	ldr	w23, [x8]
	mov	x0, x22
	bl	_RK3228_POST_PLL_POST_DIV
	mov	x3, x0
	mov	x0, x19
	mov	w1, #235
	mov	x2, x23
LBB0_3:
	bl	_inno_update_bits
	ldr	x8, [x21]
	ldr	w2, [x8]
	mov	x0, x19
	mov	w1, #239
	bl	_inno_write
	ldr	x8, [x21]
	ldr	w2, [x8, #4]
	mov	x0, x19
	mov	w1, #240
	bl	_inno_write
	ldr	x8, [x21]
	ldr	w2, [x8, #8]
	mov	x0, x19
	mov	w1, #241
	bl	_inno_write
	ldr	x8, [x21]
	ldr	w2, [x8, #12]
	mov	x0, x19
	mov	w1, #242
	bl	_inno_write
	ldr	w8, [x25]
	ldr	w9, [x26]
	orr	w2, w9, w8
	mov	x0, x19
	mov	w1, #224
	mov	w3, #0
	bl	_inno_update_bits
Lloh21:
	adrp	x8, _RK3228_BANDGAP_ENABLE@GOTPAGE
Lloh22:
	ldr	x8, [x8, _RK3228_BANDGAP_ENABLE@GOTPAGEOFF]
Lloh23:
	ldr	w2, [x8]
	mov	x0, x19
	mov	w1, #225
	mov	x3, x2
	bl	_inno_update_bits
Lloh24:
	adrp	x8, _RK3228_TMDS_DRIVER_ENABLE@GOTPAGE
Lloh25:
	ldr	x8, [x8, _RK3228_TMDS_DRIVER_ENABLE@GOTPAGEOFF]
Lloh26:
	ldr	w2, [x8]
	mov	x0, x19
	mov	w1, #225
	mov	x3, x2
	bl	_inno_update_bits
Lloh27:
	adrp	x8, _RK3228_POST_PLL_LOCK_STATUS@GOTPAGE
Lloh28:
	ldr	x8, [x8, _RK3228_POST_PLL_LOCK_STATUS@GOTPAGEOFF]
Lloh29:
	ldr	w8, [x8]
	and	w3, w8, #0x4
	mov	x0, x19
	mov	w1, #235
	mov	w2, #4
	mov	w4, #100
	mov	w5, #34464
	movk	w5, #1, lsl #16
	bl	_inno_poll
	mov	x21, x0
	cbz	w0, LBB0_5
; %bb.4:
	ldr	w0, [x19]
Lloh30:
	adrp	x1, l_.str@PAGE
Lloh31:
	add	x1, x1, l_.str@PAGEOFF
	bl	_dev_err
	b	LBB0_8
LBB0_5:
	ldr	w8, [x20, #4]
	mov	w9, #64769
	movk	w9, #5187, lsl #16
	cmp	w8, w9
	b.lt	LBB0_7
; %bb.6:
	mov	w0, #100
	bl	_msleep
LBB0_7:
	ldr	w2, [x24]
	mov	x0, x19
	mov	w1, #2
	mov	w3, #0
	bl	_inno_update_bits
LBB0_8:
	mov	x0, x21
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp], #80             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGot	Lloh4, Lloh5
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh27, Lloh28, Lloh29
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpAdd	Lloh30, Lloh31
	.cfi_endproc
                                        ; -- End function
	.comm	_RK3228_PDATAEN_DISABLE,4,2     ; @RK3228_PDATAEN_DISABLE
	.comm	_RK3228_PRE_PLL_POWER_DOWN,4,2  ; @RK3228_PRE_PLL_POWER_DOWN
	.comm	_RK3228_POST_PLL_POWER_DOWN,4,2 ; @RK3228_POST_PLL_POWER_DOWN
	.comm	_RK3228_POST_PLL_PRE_DIV_MASK,4,2 ; @RK3228_POST_PLL_PRE_DIV_MASK
	.comm	_RK3228_POST_PLL_FB_DIV_8_MASK,4,2 ; @RK3228_POST_PLL_FB_DIV_8_MASK
	.comm	_RK3228_POST_PLL_POST_DIV_ENABLE,4,2 ; @RK3228_POST_PLL_POST_DIV_ENABLE
	.comm	_RK3228_POST_PLL_POST_DIV_MASK,4,2 ; @RK3228_POST_PLL_POST_DIV_MASK
	.comm	_RK3228_BANDGAP_ENABLE,4,2      ; @RK3228_BANDGAP_ENABLE
	.comm	_RK3228_TMDS_DRIVER_ENABLE,4,2  ; @RK3228_TMDS_DRIVER_ENABLE
	.comm	_RK3228_POST_PLL_LOCK_STATUS,4,2 ; @RK3228_POST_PLL_LOCK_STATUS
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"Post-PLL locking failed\n"

	.no_dead_strip	_inno_hdmi_phy_rk3228_power_on
.subsections_via_symbols
