	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function iwl_trans_pcie_wait_txqs_empty
_iwl_trans_pcie_wait_txqs_empty:        ## @iwl_trans_pcie_wait_txqs_empty
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%esi, %r14d
	movq	%rdi, %r15
	callq	_IWL_TRANS_GET_PCIE_TRANS
	movq	%rax, %r12
	movq	(%r15), %rax
	movq	(%rax), %rax
	cmpl	$0, (%rax)
	jle	LBB0_7
## %bb.1:
	xorl	%ebx, %ebx
	jmp	LBB0_2
	.p2align	4, 0x90
LBB0_6:                                 ##   in Loop: Header=BB0_2 Depth=1
	incl	%ebx
	movq	(%r15), %rax
	movq	(%rax), %rax
	cmpl	(%rax), %ebx
	jge	LBB0_7
LBB0_2:                                 ## =>This Inner Loop Header: Depth=1
	cmpl	(%r12), %ebx
	je	LBB0_6
## %bb.3:                               ##   in Loop: Header=BB0_2 Depth=1
	movl	4(%r12), %esi
	movl	%ebx, %edi
	callq	_test_bit
	testl	%eax, %eax
	je	LBB0_6
## %bb.4:                               ##   in Loop: Header=BB0_2 Depth=1
	movl	%ebx, %edi
	callq	_BIT
	testl	%r14d, %eax
	je	LBB0_6
## %bb.5:                               ##   in Loop: Header=BB0_2 Depth=1
	movq	%r15, %rdi
	movl	%ebx, %esi
	callq	_iwl_trans_pcie_wait_txq_empty
	testl	%eax, %eax
	je	LBB0_6
	jmp	LBB0_8
LBB0_7:
	xorl	%eax, %eax
LBB0_8:
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.no_dead_strip	_iwl_trans_pcie_wait_txqs_empty
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function iwl_trans_pcie_wait_txqs_empty
_iwl_trans_pcie_wait_txqs_empty:        ; @iwl_trans_pcie_wait_txqs_empty
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x1
	mov	x20, x0
	bl	_IWL_TRANS_GET_PCIE_TRANS
	ldr	x8, [x20]
	ldr	x8, [x8]
	ldr	w8, [x8]
	cmp	w8, #1
	b.lt	LBB0_7
; %bb.1:
	mov	x21, x0
	mov	w22, #0
	b	LBB0_3
LBB0_2:                                 ;   in Loop: Header=BB0_3 Depth=1
	add	w22, w22, #1
	ldr	x8, [x20]
	ldr	x8, [x8]
	ldr	w8, [x8]
	cmp	w22, w8
	b.ge	LBB0_7
LBB0_3:                                 ; =>This Inner Loop Header: Depth=1
	ldr	w8, [x21]
	cmp	w22, w8
	b.eq	LBB0_2
; %bb.4:                                ;   in Loop: Header=BB0_3 Depth=1
	ldr	w1, [x21, #4]
	mov	x0, x22
	bl	_test_bit
	cbz	w0, LBB0_2
; %bb.5:                                ;   in Loop: Header=BB0_3 Depth=1
	mov	x0, x22
	bl	_BIT
	tst	w0, w19
	b.eq	LBB0_2
; %bb.6:                                ;   in Loop: Header=BB0_3 Depth=1
	mov	x0, x20
	mov	x1, x22
	bl	_iwl_trans_pcie_wait_txq_empty
	cbz	w0, LBB0_2
	b	LBB0_8
LBB0_7:
	mov	w0, #0
LBB0_8:
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
	.cfi_endproc
                                        ; -- End function
	.no_dead_strip	_iwl_trans_pcie_wait_txqs_empty
.subsections_via_symbols
