	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function ar9285_hw_cl_cal
_ar9285_hw_cl_cal:                      ## @ar9285_hw_cl_cal
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rsi, %r15
	movq	%rdi, %rbx
	callq	_ath9k_hw_common
	movq	%rax, -48(%rbp)                 ## 8-byte Spill
	movq	_AR_PHY_CL_CAL_CTL@GOTPCREL(%rip), %r13
	movl	(%r13), %esi
	movq	_AR_PHY_CL_CAL_ENABLE@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	callq	_REG_SET_BIT
	movq	%r15, %rdi
	callq	_IS_CHAN_HT20
	testq	%rax, %rax
	je	LBB0_5
## %bb.1:
	movl	(%r13), %esi
	movq	_AR_PHY_PARALLEL_CAL_ENABLE@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	callq	_REG_SET_BIT
	movq	_AR_PHY_TURBO@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_AR_PHY_FC_DYN2040_EN@GOTPCREL(%rip), %r12
	movl	(%r12), %edx
	movq	%rbx, %rdi
	callq	_REG_SET_BIT
	movq	_AR_PHY_AGC_CONTROL@GOTPCREL(%rip), %r15
	movl	(%r15), %esi
	movq	_AR_PHY_AGC_CONTROL_FLTR_CAL@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	callq	_REG_CLR_BIT
	movq	_AR_PHY_TPCRG1@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_AR_PHY_TPCRG1_PD_CAL_ENABLE@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	callq	_REG_CLR_BIT
	movl	(%r15), %esi
	movq	_AR_PHY_AGC_CONTROL_CAL@GOTPCREL(%rip), %r14
	movl	(%r14), %edx
	movq	%rbx, %rdi
	callq	_REG_SET_BIT
	movl	(%r15), %esi
	movl	(%r14), %edx
	movq	_AH_WAIT_TIMEOUT@GOTPCREL(%rip), %r14
	movl	(%r14), %r8d
	xorl	%r15d, %r15d
	movq	%rbx, %rdi
	xorl	%ecx, %ecx
	callq	_ath9k_hw_wait
	testl	%eax, %eax
	je	LBB0_2
## %bb.4:
	movq	_AR_PHY_TURBO@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	(%r12), %edx
	movq	%rbx, %rdi
	callq	_REG_CLR_BIT
	movl	(%r13), %esi
	movq	_AR_PHY_PARALLEL_CAL_ENABLE@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	callq	_REG_CLR_BIT
	movl	(%r13), %esi
	movq	_AR_PHY_CL_CAL_ENABLE@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	callq	_REG_CLR_BIT
LBB0_5:
	movq	_AR_PHY_ADC_CTL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_AR_PHY_ADC_CTL_OFF_PWDADC@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	callq	_REG_CLR_BIT
	movq	_AR_PHY_AGC_CONTROL@GOTPCREL(%rip), %r14
	movl	(%r14), %esi
	movq	_AR_PHY_AGC_CONTROL_FLTR_CAL@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	callq	_REG_SET_BIT
	movq	_AR_PHY_TPCRG1@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_AR_PHY_TPCRG1_PD_CAL_ENABLE@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	callq	_REG_SET_BIT
	movl	(%r14), %esi
	movq	_AR_PHY_AGC_CONTROL_CAL@GOTPCREL(%rip), %r15
	movl	(%r15), %edx
	movq	%rbx, %rdi
	callq	_REG_SET_BIT
	movl	(%r14), %esi
	movl	(%r15), %edx
	movq	_AH_WAIT_TIMEOUT@GOTPCREL(%rip), %r12
	movl	(%r12), %r8d
	xorl	%r15d, %r15d
	movq	%rbx, %rdi
	xorl	%ecx, %ecx
	callq	_ath9k_hw_wait
	testl	%eax, %eax
	je	LBB0_6
## %bb.7:
	movq	_AR_PHY_ADC_CTL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_AR_PHY_ADC_CTL_OFF_PWDADC@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	callq	_REG_SET_BIT
	movl	(%r13), %esi
	movq	_AR_PHY_CL_CAL_ENABLE@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	callq	_REG_CLR_BIT
	movl	(%r14), %esi
	movq	_AR_PHY_AGC_CONTROL_FLTR_CAL@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	callq	_REG_CLR_BIT
	movl	$1, %r15d
	jmp	LBB0_8
LBB0_6:
	movq	_CALIBRATE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movslq	(%r12), %rax
	jmp	LBB0_3
LBB0_2:
	movq	_CALIBRATE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movslq	(%r14), %rax
LBB0_3:
	imulq	$274877907, %rax, %rcx          ## imm = 0x10624DD3
	movq	%rcx, %rax
	shrq	$63, %rax
	sarq	$38, %rcx
	addl	%eax, %ecx
	leaq	L_.str(%rip), %rdx
	movq	-48(%rbp), %rdi                 ## 8-byte Reload
                                        ## kill: def $ecx killed $ecx killed $rcx
	callq	_ath_dbg
LBB0_8:
	movl	%r15d, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_AR_PHY_CL_CAL_CTL,4,2          ## @AR_PHY_CL_CAL_CTL
	.comm	_AR_PHY_CL_CAL_ENABLE,4,2       ## @AR_PHY_CL_CAL_ENABLE
	.comm	_AR_PHY_PARALLEL_CAL_ENABLE,4,2 ## @AR_PHY_PARALLEL_CAL_ENABLE
	.comm	_AR_PHY_TURBO,4,2               ## @AR_PHY_TURBO
	.comm	_AR_PHY_FC_DYN2040_EN,4,2       ## @AR_PHY_FC_DYN2040_EN
	.comm	_AR_PHY_AGC_CONTROL,4,2         ## @AR_PHY_AGC_CONTROL
	.comm	_AR_PHY_AGC_CONTROL_FLTR_CAL,4,2 ## @AR_PHY_AGC_CONTROL_FLTR_CAL
	.comm	_AR_PHY_TPCRG1,4,2              ## @AR_PHY_TPCRG1
	.comm	_AR_PHY_TPCRG1_PD_CAL_ENABLE,4,2 ## @AR_PHY_TPCRG1_PD_CAL_ENABLE
	.comm	_AR_PHY_AGC_CONTROL_CAL,4,2     ## @AR_PHY_AGC_CONTROL_CAL
	.comm	_AH_WAIT_TIMEOUT,4,2            ## @AH_WAIT_TIMEOUT
	.comm	_CALIBRATE,4,2                  ## @CALIBRATE
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"offset calibration failed to complete in %d ms; noisy environment?\n"

	.comm	_AR_PHY_ADC_CTL,4,2             ## @AR_PHY_ADC_CTL
	.comm	_AR_PHY_ADC_CTL_OFF_PWDADC,4,2  ## @AR_PHY_ADC_CTL_OFF_PWDADC
	.no_dead_strip	_ar9285_hw_cl_cal
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function ar9285_hw_cl_cal
_ar9285_hw_cl_cal:                      ; @ar9285_hw_cl_cal
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #112
	.cfi_def_cfa_offset 112
	stp	x28, x27, [sp, #16]             ; 16-byte Folded Spill
	stp	x26, x25, [sp, #32]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #48]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #64]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #80]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #96]             ; 16-byte Folded Spill
	add	x29, sp, #96
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	mov	x21, x1
	mov	x20, x0
	bl	_ath9k_hw_common
	mov	x25, x0
Lloh0:
	adrp	x19, _AR_PHY_CL_CAL_CTL@GOTPAGE
Lloh1:
	ldr	x19, [x19, _AR_PHY_CL_CAL_CTL@GOTPAGEOFF]
	ldr	w1, [x19]
Lloh2:
	adrp	x24, _AR_PHY_CL_CAL_ENABLE@GOTPAGE
Lloh3:
	ldr	x24, [x24, _AR_PHY_CL_CAL_ENABLE@GOTPAGEOFF]
	ldr	w2, [x24]
	mov	x0, x20
	bl	_REG_SET_BIT
	mov	x0, x21
	bl	_IS_CHAN_HT20
Lloh4:
	adrp	x21, _AR_PHY_AGC_CONTROL@GOTPAGE
Lloh5:
	ldr	x21, [x21, _AR_PHY_AGC_CONTROL@GOTPAGEOFF]
Lloh6:
	adrp	x27, _AR_PHY_AGC_CONTROL_FLTR_CAL@GOTPAGE
Lloh7:
	ldr	x27, [x27, _AR_PHY_AGC_CONTROL_FLTR_CAL@GOTPAGEOFF]
Lloh8:
	adrp	x22, _AR_PHY_TPCRG1@GOTPAGE
Lloh9:
	ldr	x22, [x22, _AR_PHY_TPCRG1@GOTPAGEOFF]
Lloh10:
	adrp	x23, _AR_PHY_TPCRG1_PD_CAL_ENABLE@GOTPAGE
Lloh11:
	ldr	x23, [x23, _AR_PHY_TPCRG1_PD_CAL_ENABLE@GOTPAGEOFF]
Lloh12:
	adrp	x26, _AR_PHY_AGC_CONTROL_CAL@GOTPAGE
Lloh13:
	ldr	x26, [x26, _AR_PHY_AGC_CONTROL_CAL@GOTPAGEOFF]
Lloh14:
	adrp	x28, _AH_WAIT_TIMEOUT@GOTPAGE
Lloh15:
	ldr	x28, [x28, _AH_WAIT_TIMEOUT@GOTPAGEOFF]
	cbz	x0, LBB0_3
; %bb.1:
	str	x25, [sp, #8]                   ; 8-byte Folded Spill
	ldr	w1, [x19]
Lloh16:
	adrp	x8, _AR_PHY_PARALLEL_CAL_ENABLE@GOTPAGE
Lloh17:
	ldr	x8, [x8, _AR_PHY_PARALLEL_CAL_ENABLE@GOTPAGEOFF]
Lloh18:
	ldr	w2, [x8]
	mov	x0, x20
	bl	_REG_SET_BIT
Lloh19:
	adrp	x25, _AR_PHY_TURBO@GOTPAGE
Lloh20:
	ldr	x25, [x25, _AR_PHY_TURBO@GOTPAGEOFF]
	ldr	w1, [x25]
Lloh21:
	adrp	x24, _AR_PHY_FC_DYN2040_EN@GOTPAGE
Lloh22:
	ldr	x24, [x24, _AR_PHY_FC_DYN2040_EN@GOTPAGEOFF]
	ldr	w2, [x24]
	mov	x0, x20
	bl	_REG_SET_BIT
	ldr	w1, [x21]
	ldr	w2, [x27]
	mov	x0, x20
	bl	_REG_CLR_BIT
	ldr	w1, [x22]
	ldr	w2, [x23]
	mov	x0, x20
	bl	_REG_CLR_BIT
	ldr	w1, [x21]
	ldr	w2, [x26]
	mov	x0, x20
	bl	_REG_SET_BIT
	ldr	w1, [x21]
	ldr	w2, [x26]
	ldr	w4, [x28]
	mov	x0, x20
	mov	w3, #0
	bl	_ath9k_hw_wait
	cbz	w0, LBB0_6
; %bb.2:
	ldr	w1, [x25]
	ldr	w2, [x24]
	mov	x0, x20
	bl	_REG_CLR_BIT
	ldr	w1, [x19]
Lloh23:
	adrp	x8, _AR_PHY_PARALLEL_CAL_ENABLE@GOTPAGE
Lloh24:
	ldr	x8, [x8, _AR_PHY_PARALLEL_CAL_ENABLE@GOTPAGEOFF]
Lloh25:
	ldr	w2, [x8]
	mov	x0, x20
	bl	_REG_CLR_BIT
	ldr	w1, [x19]
Lloh26:
	adrp	x24, _AR_PHY_CL_CAL_ENABLE@GOTPAGE
Lloh27:
	ldr	x24, [x24, _AR_PHY_CL_CAL_ENABLE@GOTPAGEOFF]
	ldr	w2, [x24]
	mov	x0, x20
	bl	_REG_CLR_BIT
	ldr	x25, [sp, #8]                   ; 8-byte Folded Reload
Lloh28:
	adrp	x27, _AR_PHY_AGC_CONTROL_FLTR_CAL@GOTPAGE
Lloh29:
	ldr	x27, [x27, _AR_PHY_AGC_CONTROL_FLTR_CAL@GOTPAGEOFF]
LBB0_3:
Lloh30:
	adrp	x8, _AR_PHY_ADC_CTL@GOTPAGE
Lloh31:
	ldr	x8, [x8, _AR_PHY_ADC_CTL@GOTPAGEOFF]
Lloh32:
	ldr	w1, [x8]
Lloh33:
	adrp	x8, _AR_PHY_ADC_CTL_OFF_PWDADC@GOTPAGE
Lloh34:
	ldr	x8, [x8, _AR_PHY_ADC_CTL_OFF_PWDADC@GOTPAGEOFF]
Lloh35:
	ldr	w2, [x8]
	mov	x0, x20
	bl	_REG_CLR_BIT
	ldr	w1, [x21]
	ldr	w2, [x27]
	mov	x0, x20
	bl	_REG_SET_BIT
	ldr	w1, [x22]
	ldr	w2, [x23]
	mov	x0, x20
	bl	_REG_SET_BIT
	ldr	w1, [x21]
	ldr	w2, [x26]
	mov	x0, x20
	bl	_REG_SET_BIT
	ldr	w1, [x21]
	ldr	w2, [x26]
	ldr	w4, [x28]
	mov	x0, x20
	mov	w3, #0
	bl	_ath9k_hw_wait
	cbz	w0, LBB0_5
; %bb.4:
Lloh36:
	adrp	x8, _AR_PHY_ADC_CTL@GOTPAGE
Lloh37:
	ldr	x8, [x8, _AR_PHY_ADC_CTL@GOTPAGEOFF]
Lloh38:
	ldr	w1, [x8]
Lloh39:
	adrp	x8, _AR_PHY_ADC_CTL_OFF_PWDADC@GOTPAGE
Lloh40:
	ldr	x8, [x8, _AR_PHY_ADC_CTL_OFF_PWDADC@GOTPAGEOFF]
Lloh41:
	ldr	w2, [x8]
	mov	x0, x20
	bl	_REG_SET_BIT
	ldr	w1, [x19]
	ldr	w2, [x24]
	mov	x0, x20
	bl	_REG_CLR_BIT
	ldr	w1, [x21]
	ldr	w2, [x27]
	mov	x0, x20
	bl	_REG_CLR_BIT
	mov	w0, #1
	b	LBB0_8
LBB0_5:
Lloh42:
	adrp	x8, _CALIBRATE@GOTPAGE
Lloh43:
	ldr	x8, [x8, _CALIBRATE@GOTPAGEOFF]
Lloh44:
	ldr	w1, [x8]
	ldrsw	x8, [x28]
	mov	w9, #19923
	movk	w9, #4194, lsl #16
	mul	x8, x8, x9
	lsr	x9, x8, #63
	asr	x8, x8, #38
	add	w3, w8, w9
Lloh45:
	adrp	x2, l_.str@PAGE
Lloh46:
	add	x2, x2, l_.str@PAGEOFF
	mov	x0, x25
	b	LBB0_7
LBB0_6:
Lloh47:
	adrp	x8, _CALIBRATE@GOTPAGE
Lloh48:
	ldr	x8, [x8, _CALIBRATE@GOTPAGEOFF]
Lloh49:
	ldr	w1, [x8]
	ldrsw	x8, [x28]
	mov	w9, #19923
	movk	w9, #4194, lsl #16
	mul	x8, x8, x9
	lsr	x9, x8, #63
	asr	x8, x8, #38
	add	w3, w8, w9
Lloh50:
	adrp	x2, l_.str@PAGE
Lloh51:
	add	x2, x2, l_.str@PAGEOFF
	ldr	x0, [sp, #8]                    ; 8-byte Folded Reload
LBB0_7:
	bl	_ath_dbg
	mov	w0, #0
LBB0_8:
	ldp	x29, x30, [sp, #96]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #80]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #64]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #48]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #32]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #112
	ret
	.loh AdrpLdrGot	Lloh14, Lloh15
	.loh AdrpLdrGot	Lloh12, Lloh13
	.loh AdrpLdrGot	Lloh10, Lloh11
	.loh AdrpLdrGot	Lloh8, Lloh9
	.loh AdrpLdrGot	Lloh6, Lloh7
	.loh AdrpLdrGot	Lloh4, Lloh5
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGot	Lloh21, Lloh22
	.loh AdrpLdrGot	Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh16, Lloh17, Lloh18
	.loh AdrpLdrGot	Lloh28, Lloh29
	.loh AdrpLdrGot	Lloh26, Lloh27
	.loh AdrpLdrGotLdr	Lloh23, Lloh24, Lloh25
	.loh AdrpLdrGotLdr	Lloh33, Lloh34, Lloh35
	.loh AdrpLdrGotLdr	Lloh30, Lloh31, Lloh32
	.loh AdrpLdrGotLdr	Lloh39, Lloh40, Lloh41
	.loh AdrpLdrGotLdr	Lloh36, Lloh37, Lloh38
	.loh AdrpAdd	Lloh45, Lloh46
	.loh AdrpLdrGotLdr	Lloh42, Lloh43, Lloh44
	.loh AdrpAdd	Lloh50, Lloh51
	.loh AdrpLdrGotLdr	Lloh47, Lloh48, Lloh49
	.cfi_endproc
                                        ; -- End function
	.comm	_AR_PHY_CL_CAL_CTL,4,2          ; @AR_PHY_CL_CAL_CTL
	.comm	_AR_PHY_CL_CAL_ENABLE,4,2       ; @AR_PHY_CL_CAL_ENABLE
	.comm	_AR_PHY_PARALLEL_CAL_ENABLE,4,2 ; @AR_PHY_PARALLEL_CAL_ENABLE
	.comm	_AR_PHY_TURBO,4,2               ; @AR_PHY_TURBO
	.comm	_AR_PHY_FC_DYN2040_EN,4,2       ; @AR_PHY_FC_DYN2040_EN
	.comm	_AR_PHY_AGC_CONTROL,4,2         ; @AR_PHY_AGC_CONTROL
	.comm	_AR_PHY_AGC_CONTROL_FLTR_CAL,4,2 ; @AR_PHY_AGC_CONTROL_FLTR_CAL
	.comm	_AR_PHY_TPCRG1,4,2              ; @AR_PHY_TPCRG1
	.comm	_AR_PHY_TPCRG1_PD_CAL_ENABLE,4,2 ; @AR_PHY_TPCRG1_PD_CAL_ENABLE
	.comm	_AR_PHY_AGC_CONTROL_CAL,4,2     ; @AR_PHY_AGC_CONTROL_CAL
	.comm	_AH_WAIT_TIMEOUT,4,2            ; @AH_WAIT_TIMEOUT
	.comm	_CALIBRATE,4,2                  ; @CALIBRATE
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"offset calibration failed to complete in %d ms; noisy environment?\n"

	.comm	_AR_PHY_ADC_CTL,4,2             ; @AR_PHY_ADC_CTL
	.comm	_AR_PHY_ADC_CTL_OFF_PWDADC,4,2  ; @AR_PHY_ADC_CTL_OFF_PWDADC
	.no_dead_strip	_ar9285_hw_cl_cal
.subsections_via_symbols
