	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function rtl_hw_start_8169
_rtl_hw_start_8169:                     ## @rtl_hw_start_8169
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -24
	movq	%rdi, %rbx
	movq	(%rdi), %rax
	movq	_RTL_GIGA_MAC_VER_05@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jne	LBB0_2
## %bb.1:
	movl	16(%rbx), %edi
	movq	_PCI_CACHE_LINE_SIZE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	$8, %edx
	callq	_pci_write_config_byte
LBB0_2:
	movq	_EarlyTxThres@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_NoEarlyTx@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	callq	_RTL_W8
	movq	_PCIMulRW@GOTPCREL(%rip), %rax
	movl	8(%rbx), %edx
	orl	(%rax), %edx
	movl	%edx, 8(%rbx)
	movq	(%rbx), %rax
	movq	_RTL_GIGA_MAC_VER_02@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	je	LBB0_4
## %bb.3:
	movq	_RTL_GIGA_MAC_VER_03@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jne	LBB0_5
LBB0_4:
	movq	_drv@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	12(%rbx), %edx
	leaq	L_.str(%rip), %rcx
	movq	%rbx, %rdi
	callq	_netif_dbg
	movl	$16384, %edx                    ## imm = 0x4000
	orl	8(%rbx), %edx
	movl	%edx, 8(%rbx)
LBB0_5:
	movq	_CPlusCmd@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_RTL_W16
	movq	(%rbx), %rsi
	movq	%rbx, %rdi
	callq	_rtl8169_set_magic_reg
	movq	_RxMissed@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	xorl	%edx, %edx
	callq	_RTL_W32
	movq	_IntrMitigate@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	xorl	%edx, %edx
	addq	$8, %rsp
	popq	%rbx
	popq	%rbp
	jmp	_RTL_W16                        ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_RTL_GIGA_MAC_VER_05,8,3        ## @RTL_GIGA_MAC_VER_05
	.comm	_PCI_CACHE_LINE_SIZE,4,2        ## @PCI_CACHE_LINE_SIZE
	.comm	_EarlyTxThres,4,2               ## @EarlyTxThres
	.comm	_NoEarlyTx,4,2                  ## @NoEarlyTx
	.comm	_PCIMulRW,4,2                   ## @PCIMulRW
	.comm	_RTL_GIGA_MAC_VER_02,8,3        ## @RTL_GIGA_MAC_VER_02
	.comm	_RTL_GIGA_MAC_VER_03,8,3        ## @RTL_GIGA_MAC_VER_03
	.comm	_drv,4,2                        ## @drv
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"Set MAC Reg C+CR Offset 0xe0. Bit 3 and Bit 14 MUST be 1\n"

	.comm	_CPlusCmd,4,2                   ## @CPlusCmd
	.comm	_RxMissed,4,2                   ## @RxMissed
	.comm	_IntrMitigate,4,2               ## @IntrMitigate
	.no_dead_strip	_rtl_hw_start_8169
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function rtl_hw_start_8169
_rtl_hw_start_8169:                     ; @rtl_hw_start_8169
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x19, x0
	ldr	x8, [x0]
Lloh0:
	adrp	x9, _RTL_GIGA_MAC_VER_05@GOTPAGE
Lloh1:
	ldr	x9, [x9, _RTL_GIGA_MAC_VER_05@GOTPAGEOFF]
Lloh2:
	ldr	x9, [x9]
	cmp	x8, x9
	b.ne	LBB0_2
; %bb.1:
	ldr	w0, [x19, #16]
Lloh3:
	adrp	x8, _PCI_CACHE_LINE_SIZE@GOTPAGE
Lloh4:
	ldr	x8, [x8, _PCI_CACHE_LINE_SIZE@GOTPAGEOFF]
Lloh5:
	ldr	w1, [x8]
	mov	w2, #8
	bl	_pci_write_config_byte
LBB0_2:
Lloh6:
	adrp	x8, _EarlyTxThres@GOTPAGE
Lloh7:
	ldr	x8, [x8, _EarlyTxThres@GOTPAGEOFF]
Lloh8:
	ldr	w1, [x8]
Lloh9:
	adrp	x8, _NoEarlyTx@GOTPAGE
Lloh10:
	ldr	x8, [x8, _NoEarlyTx@GOTPAGEOFF]
Lloh11:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_RTL_W8
Lloh12:
	adrp	x8, _PCIMulRW@GOTPAGE
Lloh13:
	ldr	x8, [x8, _PCIMulRW@GOTPAGEOFF]
Lloh14:
	ldr	w8, [x8]
	ldr	w9, [x19, #8]
	orr	w2, w9, w8
	str	w2, [x19, #8]
	ldr	x8, [x19]
Lloh15:
	adrp	x9, _RTL_GIGA_MAC_VER_02@GOTPAGE
Lloh16:
	ldr	x9, [x9, _RTL_GIGA_MAC_VER_02@GOTPAGEOFF]
Lloh17:
	ldr	x9, [x9]
Lloh18:
	adrp	x10, _RTL_GIGA_MAC_VER_03@GOTPAGE
Lloh19:
	ldr	x10, [x10, _RTL_GIGA_MAC_VER_03@GOTPAGEOFF]
Lloh20:
	ldr	x10, [x10]
	cmp	x8, x9
	ccmp	x8, x10, #4, ne
	b.ne	LBB0_4
; %bb.3:
Lloh21:
	adrp	x8, _drv@GOTPAGE
Lloh22:
	ldr	x8, [x8, _drv@GOTPAGEOFF]
Lloh23:
	ldr	w1, [x8]
	ldr	w2, [x19, #12]
Lloh24:
	adrp	x3, l_.str@PAGE
Lloh25:
	add	x3, x3, l_.str@PAGEOFF
	mov	x0, x19
	bl	_netif_dbg
	ldr	w8, [x19, #8]
	orr	w2, w8, #0x4000
	str	w2, [x19, #8]
LBB0_4:
Lloh26:
	adrp	x8, _CPlusCmd@GOTPAGE
Lloh27:
	ldr	x8, [x8, _CPlusCmd@GOTPAGEOFF]
Lloh28:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_RTL_W16
	ldr	x1, [x19]
	mov	x0, x19
	bl	_rtl8169_set_magic_reg
Lloh29:
	adrp	x8, _RxMissed@GOTPAGE
Lloh30:
	ldr	x8, [x8, _RxMissed@GOTPAGEOFF]
Lloh31:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #0
	bl	_RTL_W32
Lloh32:
	adrp	x8, _IntrMitigate@GOTPAGE
Lloh33:
	ldr	x8, [x8, _IntrMitigate@GOTPAGEOFF]
Lloh34:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #0
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	b	_RTL_W16
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpAdd	Lloh24, Lloh25
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh32, Lloh33, Lloh34
	.loh AdrpLdrGotLdr	Lloh29, Lloh30, Lloh31
	.loh AdrpLdrGotLdr	Lloh26, Lloh27, Lloh28
	.cfi_endproc
                                        ; -- End function
	.comm	_RTL_GIGA_MAC_VER_05,8,3        ; @RTL_GIGA_MAC_VER_05
	.comm	_PCI_CACHE_LINE_SIZE,4,2        ; @PCI_CACHE_LINE_SIZE
	.comm	_EarlyTxThres,4,2               ; @EarlyTxThres
	.comm	_NoEarlyTx,4,2                  ; @NoEarlyTx
	.comm	_PCIMulRW,4,2                   ; @PCIMulRW
	.comm	_RTL_GIGA_MAC_VER_02,8,3        ; @RTL_GIGA_MAC_VER_02
	.comm	_RTL_GIGA_MAC_VER_03,8,3        ; @RTL_GIGA_MAC_VER_03
	.comm	_drv,4,2                        ; @drv
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"Set MAC Reg C+CR Offset 0xe0. Bit 3 and Bit 14 MUST be 1\n"

	.comm	_CPlusCmd,4,2                   ; @CPlusCmd
	.comm	_RxMissed,4,2                   ; @RxMissed
	.comm	_IntrMitigate,4,2               ; @IntrMitigate
	.no_dead_strip	_rtl_hw_start_8169
.subsections_via_symbols
