	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function rt2800_init_rfcsr_30xx
_rt2800_init_rfcsr_30xx:                ## @rt2800_init_rfcsr_30xx
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %rbx
	movl	$30, %esi
	callq	_rt2800_rf_init_calibration
	movq	%rbx, %rdi
	movl	$4, %esi
	movl	$64, %edx
	callq	_rt2800_rfcsr_write
	movq	%rbx, %rdi
	movl	$5, %esi
	movl	$3, %edx
	callq	_rt2800_rfcsr_write
	movq	%rbx, %rdi
	movl	$6, %esi
	movl	$2, %edx
	callq	_rt2800_rfcsr_write
	movq	%rbx, %rdi
	movl	$7, %esi
	movl	$96, %edx
	callq	_rt2800_rfcsr_write
	movq	%rbx, %rdi
	movl	$9, %esi
	movl	$15, %edx
	callq	_rt2800_rfcsr_write
	movq	%rbx, %rdi
	movl	$10, %esi
	movl	$65, %edx
	callq	_rt2800_rfcsr_write
	movq	%rbx, %rdi
	movl	$11, %esi
	movl	$33, %edx
	callq	_rt2800_rfcsr_write
	movq	%rbx, %rdi
	movl	$12, %esi
	movl	$123, %edx
	callq	_rt2800_rfcsr_write
	movq	%rbx, %rdi
	movl	$14, %esi
	movl	$144, %edx
	callq	_rt2800_rfcsr_write
	movq	%rbx, %rdi
	movl	$15, %esi
	movl	$88, %edx
	callq	_rt2800_rfcsr_write
	movq	%rbx, %rdi
	movl	$16, %esi
	movl	$179, %edx
	callq	_rt2800_rfcsr_write
	movq	%rbx, %rdi
	movl	$17, %esi
	movl	$146, %edx
	callq	_rt2800_rfcsr_write
	movq	%rbx, %rdi
	movl	$18, %esi
	movl	$44, %edx
	callq	_rt2800_rfcsr_write
	movq	%rbx, %rdi
	movl	$19, %esi
	movl	$2, %edx
	callq	_rt2800_rfcsr_write
	movq	%rbx, %rdi
	movl	$20, %esi
	movl	$186, %edx
	callq	_rt2800_rfcsr_write
	movq	%rbx, %rdi
	movl	$21, %esi
	movl	$219, %edx
	callq	_rt2800_rfcsr_write
	movq	%rbx, %rdi
	movl	$24, %esi
	movl	$22, %edx
	callq	_rt2800_rfcsr_write
	movq	%rbx, %rdi
	movl	$25, %esi
	movl	$3, %edx
	callq	_rt2800_rfcsr_write
	movq	%rbx, %rdi
	movl	$29, %esi
	movl	$31, %edx
	callq	_rt2800_rfcsr_write
	movq	_RT3070@GOTPCREL(%rip), %r15
	movl	(%r15), %esi
	movq	_REV_RT3070F@GOTPCREL(%rip), %r12
	movl	(%r12), %edx
	movq	%rbx, %rdi
	callq	_rt2x00_rt_rev_lt
	testq	%rax, %rax
	je	LBB0_2
## %bb.1:
	movq	_LDO_CFG0@GOTPCREL(%rip), %r13
	movl	(%r13), %esi
	movq	%rbx, %rdi
	callq	_rt2800_register_read
	movl	%eax, -44(%rbp)
	movq	_LDO_CFG0_BGSEL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	leaq	-44(%rbp), %r14
	movq	%r14, %rdi
	movl	$1, %edx
	callq	_rt2x00_set_field32
	movq	_LDO_CFG0_LDO_CORE_VLEVEL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	movl	$3, %edx
	callq	_rt2x00_set_field32
	movl	(%r13), %esi
	jmp	LBB0_8
LBB0_2:
	movq	_RT3071@GOTPCREL(%rip), %r13
	movl	(%r13), %esi
	movq	%rbx, %rdi
	callq	_rt2x00_rt
	testq	%rax, %rax
	jne	LBB0_4
## %bb.3:
	movq	_RT3090@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_rt2x00_rt
	testq	%rax, %rax
	je	LBB0_9
LBB0_4:
	movq	%rbx, %rdi
	movl	$31, %esi
	movl	$20, %edx
	callq	_rt2800_rfcsr_write
	movq	%rbx, %rdi
	movl	$6, %esi
	callq	_rt2800_rfcsr_read
	movl	%eax, -48(%rbp)
	movq	_RFCSR6_R2@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	leaq	-48(%rbp), %rdi
	movl	$1, %edx
	callq	_rt2x00_set_field8
	movl	-48(%rbp), %edx
	movq	%rbx, %rdi
	movl	$6, %esi
	callq	_rt2800_rfcsr_write
	movq	_LDO_CFG0@GOTPCREL(%rip), %r14
	movl	(%r14), %esi
	movq	%rbx, %rdi
	callq	_rt2800_register_read
	movl	%eax, -44(%rbp)
	movq	_LDO_CFG0_BGSEL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	leaq	-44(%rbp), %rdi
	movl	$1, %edx
	callq	_rt2x00_set_field32
	movl	(%r13), %esi
	movq	_REV_RT3071E@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	callq	_rt2x00_rt_rev_lt
	testq	%rax, %rax
	jne	LBB0_6
## %bb.5:
	movq	_RT3090@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_REV_RT3090E@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	callq	_rt2x00_rt_rev_lt
	testq	%rax, %rax
	je	LBB0_7
LBB0_6:
	movq	_EEPROM_NIC_CONF1@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_rt2800_eeprom_read
	movq	_EEPROM_NIC_CONF1_DAC_TEST@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	movl	%eax, %edi
	callq	_rt2x00_get_field16
	xorl	%ecx, %ecx
	testq	%rax, %rax
	setne	%cl
	movq	_LDO_CFG0_LDO_CORE_VLEVEL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	leal	(%rcx,%rcx,2), %edx
	leaq	-44(%rbp), %rdi
	callq	_rt2x00_set_field32
LBB0_7:
	movl	(%r14), %esi
	movl	-44(%rbp), %edx
	movq	%rbx, %rdi
	callq	_rt2800_register_write
	movq	_GPIO_SWITCH@GOTPCREL(%rip), %r14
	movl	(%r14), %esi
	movq	%rbx, %rdi
	callq	_rt2800_register_read
	movl	%eax, -44(%rbp)
	movq	_GPIO_SWITCH_5@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	leaq	-44(%rbp), %rdi
	xorl	%edx, %edx
	callq	_rt2x00_set_field32
	movl	(%r14), %esi
LBB0_8:
	movl	-44(%rbp), %edx
	movq	%rbx, %rdi
	callq	_rt2800_register_write
LBB0_9:
	movq	%rbx, %rdi
	callq	_rt2800_rx_filter_calibration
	movl	(%r15), %esi
	movl	(%r12), %edx
	movq	%rbx, %rdi
	callq	_rt2x00_rt_rev_lt
	testq	%rax, %rax
	jne	LBB0_12
## %bb.10:
	movq	_RT3071@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_REV_RT3071E@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	callq	_rt2x00_rt_rev_lt
	testq	%rax, %rax
	jne	LBB0_12
## %bb.11:
	movq	_RT3090@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_REV_RT3090E@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	callq	_rt2x00_rt_rev_lt
	testq	%rax, %rax
	je	LBB0_13
LBB0_12:
	movq	%rbx, %rdi
	movl	$27, %esi
	movl	$3, %edx
	callq	_rt2800_rfcsr_write
LBB0_13:
	movq	%rbx, %rdi
	callq	_rt2800_led_open_drain_enable
	movq	%rbx, %rdi
	callq	_rt2800_normal_mode_setup_3xxx
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_RT3070,4,2                     ## @RT3070
	.comm	_REV_RT3070F,4,2                ## @REV_RT3070F
	.comm	_LDO_CFG0,4,2                   ## @LDO_CFG0
	.comm	_LDO_CFG0_BGSEL,4,2             ## @LDO_CFG0_BGSEL
	.comm	_LDO_CFG0_LDO_CORE_VLEVEL,4,2   ## @LDO_CFG0_LDO_CORE_VLEVEL
	.comm	_RT3071,4,2                     ## @RT3071
	.comm	_RT3090,4,2                     ## @RT3090
	.comm	_RFCSR6_R2,4,2                  ## @RFCSR6_R2
	.comm	_REV_RT3071E,4,2                ## @REV_RT3071E
	.comm	_REV_RT3090E,4,2                ## @REV_RT3090E
	.comm	_EEPROM_NIC_CONF1,4,2           ## @EEPROM_NIC_CONF1
	.comm	_EEPROM_NIC_CONF1_DAC_TEST,4,2  ## @EEPROM_NIC_CONF1_DAC_TEST
	.comm	_GPIO_SWITCH,4,2                ## @GPIO_SWITCH
	.comm	_GPIO_SWITCH_5,4,2              ## @GPIO_SWITCH_5
	.no_dead_strip	_rt2800_init_rfcsr_30xx
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function rt2800_init_rfcsr_30xx
_rt2800_init_rfcsr_30xx:                ; @rt2800_init_rfcsr_30xx
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #80
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x19, x0
	mov	w1, #30
	bl	_rt2800_rf_init_calibration
	mov	x0, x19
	mov	w1, #4
	mov	w2, #64
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #5
	mov	w2, #3
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #6
	mov	w2, #2
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #7
	mov	w2, #96
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #9
	mov	w2, #15
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #10
	mov	w2, #65
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #11
	mov	w2, #33
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #12
	mov	w2, #123
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #14
	mov	w2, #144
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #15
	mov	w2, #88
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #16
	mov	w2, #179
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #17
	mov	w2, #146
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #18
	mov	w2, #44
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #19
	mov	w2, #2
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #20
	mov	w2, #186
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #21
	mov	w2, #219
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #24
	mov	w2, #22
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #25
	mov	w2, #3
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #29
	mov	w2, #31
	bl	_rt2800_rfcsr_write
Lloh0:
	adrp	x20, _RT3070@GOTPAGE
Lloh1:
	ldr	x20, [x20, _RT3070@GOTPAGEOFF]
	ldr	w1, [x20]
Lloh2:
	adrp	x21, _REV_RT3070F@GOTPAGE
Lloh3:
	ldr	x21, [x21, _REV_RT3070F@GOTPAGEOFF]
	ldr	w2, [x21]
	mov	x0, x19
	bl	_rt2x00_rt_rev_lt
	cbz	x0, LBB0_2
; %bb.1:
Lloh4:
	adrp	x22, _LDO_CFG0@GOTPAGE
Lloh5:
	ldr	x22, [x22, _LDO_CFG0@GOTPAGEOFF]
	ldr	w1, [x22]
	mov	x0, x19
	bl	_rt2800_register_read
	str	w0, [sp, #8]
Lloh6:
	adrp	x8, _LDO_CFG0_BGSEL@GOTPAGE
Lloh7:
	ldr	x8, [x8, _LDO_CFG0_BGSEL@GOTPAGEOFF]
Lloh8:
	ldr	w1, [x8]
	add	x0, sp, #8
	mov	w2, #1
	bl	_rt2x00_set_field32
Lloh9:
	adrp	x8, _LDO_CFG0_LDO_CORE_VLEVEL@GOTPAGE
Lloh10:
	ldr	x8, [x8, _LDO_CFG0_LDO_CORE_VLEVEL@GOTPAGEOFF]
Lloh11:
	ldr	w1, [x8]
	add	x0, sp, #8
	mov	w2, #3
	b	LBB0_8
LBB0_2:
Lloh12:
	adrp	x23, _RT3071@GOTPAGE
Lloh13:
	ldr	x23, [x23, _RT3071@GOTPAGEOFF]
	ldr	w1, [x23]
	mov	x0, x19
	bl	_rt2x00_rt
	cbnz	x0, LBB0_4
; %bb.3:
Lloh14:
	adrp	x8, _RT3090@GOTPAGE
Lloh15:
	ldr	x8, [x8, _RT3090@GOTPAGEOFF]
Lloh16:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_rt2x00_rt
	cbz	x0, LBB0_9
LBB0_4:
	mov	x0, x19
	mov	w1, #31
	mov	w2, #20
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #6
	bl	_rt2800_rfcsr_read
	str	w0, [sp, #12]
Lloh17:
	adrp	x8, _RFCSR6_R2@GOTPAGE
Lloh18:
	ldr	x8, [x8, _RFCSR6_R2@GOTPAGEOFF]
Lloh19:
	ldr	w1, [x8]
	add	x0, sp, #12
	mov	w2, #1
	bl	_rt2x00_set_field8
	ldr	w2, [sp, #12]
	mov	x0, x19
	mov	w1, #6
	bl	_rt2800_rfcsr_write
Lloh20:
	adrp	x22, _LDO_CFG0@GOTPAGE
Lloh21:
	ldr	x22, [x22, _LDO_CFG0@GOTPAGEOFF]
	ldr	w1, [x22]
	mov	x0, x19
	bl	_rt2800_register_read
	str	w0, [sp, #8]
Lloh22:
	adrp	x8, _LDO_CFG0_BGSEL@GOTPAGE
Lloh23:
	ldr	x8, [x8, _LDO_CFG0_BGSEL@GOTPAGEOFF]
Lloh24:
	ldr	w1, [x8]
	add	x0, sp, #8
	mov	w2, #1
	bl	_rt2x00_set_field32
	ldr	w1, [x23]
Lloh25:
	adrp	x8, _REV_RT3071E@GOTPAGE
Lloh26:
	ldr	x8, [x8, _REV_RT3071E@GOTPAGEOFF]
Lloh27:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_rt2x00_rt_rev_lt
	cbnz	x0, LBB0_6
; %bb.5:
Lloh28:
	adrp	x8, _RT3090@GOTPAGE
Lloh29:
	ldr	x8, [x8, _RT3090@GOTPAGEOFF]
Lloh30:
	ldr	w1, [x8]
Lloh31:
	adrp	x8, _REV_RT3090E@GOTPAGE
Lloh32:
	ldr	x8, [x8, _REV_RT3090E@GOTPAGEOFF]
Lloh33:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_rt2x00_rt_rev_lt
	cbz	x0, LBB0_7
LBB0_6:
Lloh34:
	adrp	x8, _EEPROM_NIC_CONF1@GOTPAGE
Lloh35:
	ldr	x8, [x8, _EEPROM_NIC_CONF1@GOTPAGEOFF]
Lloh36:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_rt2800_eeprom_read
Lloh37:
	adrp	x8, _EEPROM_NIC_CONF1_DAC_TEST@GOTPAGE
Lloh38:
	ldr	x8, [x8, _EEPROM_NIC_CONF1_DAC_TEST@GOTPAGEOFF]
Lloh39:
	ldr	w1, [x8]
	bl	_rt2x00_get_field16
Lloh40:
	adrp	x8, _LDO_CFG0_LDO_CORE_VLEVEL@GOTPAGE
Lloh41:
	ldr	x8, [x8, _LDO_CFG0_LDO_CORE_VLEVEL@GOTPAGEOFF]
Lloh42:
	ldr	w1, [x8]
	cmp	x0, #0
	mov	w8, #3
	csel	w2, wzr, w8, eq
	add	x0, sp, #8
	bl	_rt2x00_set_field32
LBB0_7:
	ldr	w1, [x22]
	ldr	w2, [sp, #8]
	mov	x0, x19
	bl	_rt2800_register_write
Lloh43:
	adrp	x22, _GPIO_SWITCH@GOTPAGE
Lloh44:
	ldr	x22, [x22, _GPIO_SWITCH@GOTPAGEOFF]
	ldr	w1, [x22]
	mov	x0, x19
	bl	_rt2800_register_read
	str	w0, [sp, #8]
Lloh45:
	adrp	x8, _GPIO_SWITCH_5@GOTPAGE
Lloh46:
	ldr	x8, [x8, _GPIO_SWITCH_5@GOTPAGEOFF]
Lloh47:
	ldr	w1, [x8]
	add	x0, sp, #8
	mov	w2, #0
LBB0_8:
	bl	_rt2x00_set_field32
	ldr	w1, [x22]
	ldr	w2, [sp, #8]
	mov	x0, x19
	bl	_rt2800_register_write
LBB0_9:
	mov	x0, x19
	bl	_rt2800_rx_filter_calibration
	ldr	w1, [x20]
	ldr	w2, [x21]
	mov	x0, x19
	bl	_rt2x00_rt_rev_lt
	cbnz	x0, LBB0_12
; %bb.10:
Lloh48:
	adrp	x8, _RT3071@GOTPAGE
Lloh49:
	ldr	x8, [x8, _RT3071@GOTPAGEOFF]
Lloh50:
	ldr	w1, [x8]
Lloh51:
	adrp	x8, _REV_RT3071E@GOTPAGE
Lloh52:
	ldr	x8, [x8, _REV_RT3071E@GOTPAGEOFF]
Lloh53:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_rt2x00_rt_rev_lt
	cbnz	x0, LBB0_12
; %bb.11:
Lloh54:
	adrp	x8, _RT3090@GOTPAGE
Lloh55:
	ldr	x8, [x8, _RT3090@GOTPAGEOFF]
Lloh56:
	ldr	w1, [x8]
Lloh57:
	adrp	x8, _REV_RT3090E@GOTPAGE
Lloh58:
	ldr	x8, [x8, _REV_RT3090E@GOTPAGEOFF]
Lloh59:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_rt2x00_rt_rev_lt
	cbz	x0, LBB0_13
LBB0_12:
	mov	x0, x19
	mov	w1, #27
	mov	w2, #3
	bl	_rt2800_rfcsr_write
LBB0_13:
	mov	x0, x19
	bl	_rt2800_led_open_drain_enable
	mov	x0, x19
	bl	_rt2800_normal_mode_setup_3xxx
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #80
	ret
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGot	Lloh4, Lloh5
	.loh AdrpLdrGot	Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh16
	.loh AdrpLdrGotLdr	Lloh25, Lloh26, Lloh27
	.loh AdrpLdrGotLdr	Lloh22, Lloh23, Lloh24
	.loh AdrpLdrGot	Lloh20, Lloh21
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh19
	.loh AdrpLdrGotLdr	Lloh31, Lloh32, Lloh33
	.loh AdrpLdrGotLdr	Lloh28, Lloh29, Lloh30
	.loh AdrpLdrGotLdr	Lloh40, Lloh41, Lloh42
	.loh AdrpLdrGotLdr	Lloh37, Lloh38, Lloh39
	.loh AdrpLdrGotLdr	Lloh34, Lloh35, Lloh36
	.loh AdrpLdrGotLdr	Lloh45, Lloh46, Lloh47
	.loh AdrpLdrGot	Lloh43, Lloh44
	.loh AdrpLdrGotLdr	Lloh51, Lloh52, Lloh53
	.loh AdrpLdrGotLdr	Lloh48, Lloh49, Lloh50
	.loh AdrpLdrGotLdr	Lloh57, Lloh58, Lloh59
	.loh AdrpLdrGotLdr	Lloh54, Lloh55, Lloh56
	.cfi_endproc
                                        ; -- End function
	.comm	_RT3070,4,2                     ; @RT3070
	.comm	_REV_RT3070F,4,2                ; @REV_RT3070F
	.comm	_LDO_CFG0,4,2                   ; @LDO_CFG0
	.comm	_LDO_CFG0_BGSEL,4,2             ; @LDO_CFG0_BGSEL
	.comm	_LDO_CFG0_LDO_CORE_VLEVEL,4,2   ; @LDO_CFG0_LDO_CORE_VLEVEL
	.comm	_RT3071,4,2                     ; @RT3071
	.comm	_RT3090,4,2                     ; @RT3090
	.comm	_RFCSR6_R2,4,2                  ; @RFCSR6_R2
	.comm	_REV_RT3071E,4,2                ; @REV_RT3071E
	.comm	_REV_RT3090E,4,2                ; @REV_RT3090E
	.comm	_EEPROM_NIC_CONF1,4,2           ; @EEPROM_NIC_CONF1
	.comm	_EEPROM_NIC_CONF1_DAC_TEST,4,2  ; @EEPROM_NIC_CONF1_DAC_TEST
	.comm	_GPIO_SWITCH,4,2                ; @GPIO_SWITCH
	.comm	_GPIO_SWITCH_5,4,2              ; @GPIO_SWITCH_5
	.no_dead_strip	_rt2800_init_rfcsr_30xx
.subsections_via_symbols
