	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function mlx5_lag_fib_route_event
_mlx5_lag_fib_route_event:              ## @mlx5_lag_fib_route_event
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdx, %rbx
	movq	%rdi, %r14
	movq	_FIB_EVENT_ENTRY_DEL@GOTPCREL(%rip), %rax
	cmpq	%rsi, (%rax)
	jne	LBB0_3
## %bb.1:
	cmpq	%rbx, 16(%r14)
	jne	LBB0_16
## %bb.2:
	movq	$0, 16(%r14)
	jmp	LBB0_16
LBB0_3:
	movq	%rbx, %rdi
	callq	_fib_info_num_path
	cmpl	$2, %eax
	je	LBB0_7
## %bb.4:
	cmpl	$1, %eax
	jne	LBB0_16
## %bb.5:
	movq	%r14, %rdi
	callq	___mlx5_lag_is_active
	testq	%rax, %rax
	je	LBB0_16
## %bb.6:
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	_fib_info_nh
	movq	(%rax), %rsi
	movq	%r14, %rdi
	callq	_mlx5_lag_dev_get_netdev_idx
                                        ## kill: def $eax killed $eax def $rax
	leal	1(%rax), %esi
	movq	%r14, %rdi
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_mlx5_lag_set_port_affinity     ## TAILCALL
LBB0_7:
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	_fib_info_nh
	movq	%rax, %r15
	movq	%rbx, %rdi
	movl	$1, %esi
	callq	_fib_info_nh
	movq	(%r15), %rsi
	movq	8(%r14), %rcx
	movq	(%rcx), %rdx
	cmpq	%rdx, %rsi
	jne	LBB0_8
## %bb.9:
	movq	16(%rcx), %rdi
	cmpq	%rdi, (%rax)
	je	LBB0_12
## %bb.10:
	cmpq	%rdi, %rsi
	je	LBB0_11
	jmp	LBB0_17
LBB0_8:
	movq	16(%rcx), %rdi
	cmpq	%rdi, %rsi
	jne	LBB0_17
LBB0_11:
	cmpq	%rdx, (%rax)
	jne	LBB0_17
LBB0_12:
	cmpq	$0, 16(%r14)
	jne	LBB0_15
## %bb.13:
	movq	%r14, %rdi
	callq	___mlx5_lag_is_active
	testq	%rax, %rax
	jne	LBB0_15
## %bb.14:
	movl	(%r14), %eax
	movl	%eax, -32(%rbp)
	movq	_MLX5_LAG_FLAG_MULTIPATH@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	leaq	-32(%rbp), %rsi
	movq	%r14, %rdi
	callq	_mlx5_activate_lag
LBB0_15:
	movq	%r14, %rdi
	xorl	%esi, %esi
	callq	_mlx5_lag_set_port_affinity
	movq	%rbx, 16(%r14)
LBB0_16:
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_17:
	movl	8(%rcx), %edi
	leaq	L_.str(%rip), %rsi
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_mlx5_core_warn                 ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_FIB_EVENT_ENTRY_DEL,8,3        ## @FIB_EVENT_ENTRY_DEL
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"Multipath offload require two ports of the same HCA\n"

	.comm	_MLX5_LAG_FLAG_MULTIPATH,4,2    ## @MLX5_LAG_FLAG_MULTIPATH
	.no_dead_strip	_mlx5_lag_fib_route_event
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function mlx5_lag_fib_route_event
_mlx5_lag_fib_route_event:              ; @mlx5_lag_fib_route_event
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #64
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x20, x2
	mov	x19, x0
Lloh0:
	adrp	x8, _FIB_EVENT_ENTRY_DEL@GOTPAGE
Lloh1:
	ldr	x8, [x8, _FIB_EVENT_ENTRY_DEL@GOTPAGEOFF]
Lloh2:
	ldr	x8, [x8]
	cmp	x8, x1
	b.ne	LBB0_3
; %bb.1:
	ldr	x8, [x19, #16]
	cmp	x8, x20
	b.ne	LBB0_16
; %bb.2:
	str	xzr, [x19, #16]
	b	LBB0_16
LBB0_3:
	mov	x0, x20
	bl	_fib_info_num_path
	cmp	w0, #2
	b.eq	LBB0_7
; %bb.4:
	cmp	w0, #1
	b.ne	LBB0_16
; %bb.5:
	mov	x0, x19
	bl	___mlx5_lag_is_active
	cbz	x0, LBB0_16
; %bb.6:
	mov	x0, x20
	mov	w1, #0
	bl	_fib_info_nh
	ldr	x1, [x0]
	mov	x0, x19
	bl	_mlx5_lag_dev_get_netdev_idx
	add	w1, w0, #1
	mov	x0, x19
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #64
	b	_mlx5_lag_set_port_affinity
LBB0_7:
	mov	x0, x20
	mov	w1, #0
	bl	_fib_info_nh
	mov	x21, x0
	mov	x0, x20
	mov	w1, #1
	bl	_fib_info_nh
	ldr	x10, [x21]
	ldr	x8, [x19, #8]
	ldr	x9, [x8]
	cmp	x10, x9
	b.ne	LBB0_10
; %bb.8:
	ldr	x12, [x0]
	ldr	x11, [x8, #16]
	cmp	x12, x11
	b.eq	LBB0_12
; %bb.9:
	cmp	x10, x11
	b.eq	LBB0_11
	b	LBB0_17
LBB0_10:
	ldr	x11, [x8, #16]
	cmp	x10, x11
	b.ne	LBB0_17
LBB0_11:
	ldr	x10, [x0]
	cmp	x10, x9
	b.ne	LBB0_17
LBB0_12:
	ldr	x8, [x19, #16]
	cbnz	x8, LBB0_15
; %bb.13:
	mov	x0, x19
	bl	___mlx5_lag_is_active
	cbnz	x0, LBB0_15
; %bb.14:
	ldr	w8, [x19]
	str	w8, [sp, #8]
Lloh3:
	adrp	x8, _MLX5_LAG_FLAG_MULTIPATH@GOTPAGE
Lloh4:
	ldr	x8, [x8, _MLX5_LAG_FLAG_MULTIPATH@GOTPAGEOFF]
Lloh5:
	ldr	w2, [x8]
	add	x1, sp, #8
	mov	x0, x19
	bl	_mlx5_activate_lag
LBB0_15:
	mov	x0, x19
	mov	w1, #0
	bl	_mlx5_lag_set_port_affinity
	str	x20, [x19, #16]
LBB0_16:
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #64
	ret
LBB0_17:
	ldr	w0, [x8, #8]
Lloh6:
	adrp	x1, l_.str@PAGE
Lloh7:
	add	x1, x1, l_.str@PAGEOFF
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #64
	b	_mlx5_core_warn
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpAdd	Lloh6, Lloh7
	.cfi_endproc
                                        ; -- End function
	.comm	_FIB_EVENT_ENTRY_DEL,8,3        ; @FIB_EVENT_ENTRY_DEL
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"Multipath offload require two ports of the same HCA\n"

	.comm	_MLX5_LAG_FLAG_MULTIPATH,4,2    ; @MLX5_LAG_FLAG_MULTIPATH
	.no_dead_strip	_mlx5_lag_fib_route_event
.subsections_via_symbols
