	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function mlxsw_sp_rif_vrrp_op
_mlxsw_sp_rif_vrrp_op:                  ## @mlxsw_sp_rif_vrrp_op
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$24, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%ecx, %ebx
	movq	%rdx, %r12
	movl	%esi, %r13d
	movq	%rdi, %r14
	movq	___stack_chk_guard@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	movq	%rax, -48(%rbp)
	movq	_MLXSW_REG_RITR_LEN@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	callq	____chkstk_darwin
	addq	$15, %rax
	andq	$-16, %rax
	subq	%rax, %rsp
	movq	%rsp, %r15
	testl	%ebx, %ebx
	je	LBB0_1
## %bb.2:
	movl	20(%r12), %ebx
	jmp	LBB0_3
LBB0_1:
	xorl	%ebx, %ebx
LBB0_3:
	movq	%r12, %rdi
	callq	_mlxsw_sp_rif_macvlan_is_vrrp4
	testq	%rax, %rax
	jne	LBB0_6
## %bb.4:
	movq	%r12, %rdi
	callq	_mlxsw_sp_rif_macvlan_is_vrrp6
	testl	%eax, %eax
	je	LBB0_5
LBB0_6:
	movl	%ebx, -52(%rbp)                 ## 4-byte Spill
	movq	%r15, %rdi
	movl	%r13d, %esi
	callq	_mlxsw_reg_ritr_rif_pack
	movl	(%r14), %ebx
	movq	_ritr@GOTPCREL(%rip), %r13
	movl	(%r13), %edi
	callq	_MLXSW_REG
	movl	%ebx, %edi
	movl	%eax, %esi
	movq	%r15, %rdx
	callq	_mlxsw_reg_query
	testl	%eax, %eax
	jne	LBB0_11
## %bb.7:
	movq	%r12, %rdi
	callq	_mlxsw_sp_rif_macvlan_is_vrrp4
	movq	%r15, %rdi
	testq	%rax, %rax
	je	LBB0_9
## %bb.8:
	movl	-52(%rbp), %esi                 ## 4-byte Reload
	callq	_mlxsw_reg_ritr_if_vrrp_id_ipv4_set
	jmp	LBB0_10
LBB0_5:
	xorl	%eax, %eax
	jmp	LBB0_11
LBB0_9:
	movl	-52(%rbp), %esi                 ## 4-byte Reload
	callq	_mlxsw_reg_ritr_if_vrrp_id_ipv6_set
LBB0_10:
	movl	(%r14), %ebx
	movl	(%r13), %edi
	callq	_MLXSW_REG
	movl	%ebx, %edi
	movl	%eax, %esi
	movq	%r15, %rdx
	callq	_mlxsw_reg_write
LBB0_11:
	movq	___stack_chk_guard@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rcx
	cmpq	-48(%rbp), %rcx
	jne	LBB0_13
## %bb.12:
	leaq	-40(%rbp), %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_13:
	callq	___stack_chk_fail
	.cfi_endproc
                                        ## -- End function
	.comm	_MLXSW_REG_RITR_LEN,4,2         ## @MLXSW_REG_RITR_LEN
	.comm	_ritr,4,2                       ## @ritr
	.no_dead_strip	_mlxsw_sp_rif_vrrp_op
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function mlxsw_sp_rif_vrrp_op
_mlxsw_sp_rif_vrrp_op:                  ; @mlxsw_sp_rif_vrrp_op
	.cfi_startproc
; %bb.0:
	stp	x24, x23, [sp, #-64]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	sub	sp, sp, #16
	mov	x21, x2
	mov	x23, x1
	mov	x19, x0
Lloh0:
	adrp	x8, ___stack_chk_guard@GOTPAGE
Lloh1:
	ldr	x8, [x8, ___stack_chk_guard@GOTPAGEOFF]
Lloh2:
	ldr	x8, [x8]
	stur	x8, [x29, #-56]
Lloh3:
	adrp	x8, _MLXSW_REG_RITR_LEN@GOTPAGE
Lloh4:
	ldr	x8, [x8, _MLXSW_REG_RITR_LEN@GOTPAGEOFF]
Lloh5:
	ldr	w8, [x8]
	mov	x9, x8
Lloh6:
	adrp	x16, ___chkstk_darwin@GOTPAGE
Lloh7:
	ldr	x16, [x16, ___chkstk_darwin@GOTPAGEOFF]
	blr	x16
	mov	x9, sp
	add	x8, x8, #15
	and	x8, x8, #0x1fffffff0
	sub	x20, x9, x8
	mov	sp, x20
	cbz	w3, LBB0_2
; %bb.1:
	ldr	w22, [x21, #20]
	b	LBB0_3
LBB0_2:
	mov	w22, #0
LBB0_3:
	mov	x0, x21
	bl	_mlxsw_sp_rif_macvlan_is_vrrp4
	cbnz	x0, LBB0_5
; %bb.4:
	mov	x0, x21
	bl	_mlxsw_sp_rif_macvlan_is_vrrp6
	cbz	w0, LBB0_10
LBB0_5:
	mov	x0, x20
	mov	x1, x23
	bl	_mlxsw_reg_ritr_rif_pack
	ldr	w23, [x19]
Lloh8:
	adrp	x24, _ritr@GOTPAGE
Lloh9:
	ldr	x24, [x24, _ritr@GOTPAGEOFF]
	ldr	w0, [x24]
	bl	_MLXSW_REG
	mov	x1, x0
	mov	x0, x23
	mov	x2, x20
	bl	_mlxsw_reg_query
	cbnz	w0, LBB0_10
; %bb.6:
	mov	x0, x21
	bl	_mlxsw_sp_rif_macvlan_is_vrrp4
	cbz	x0, LBB0_8
; %bb.7:
	mov	x0, x20
	mov	x1, x22
	bl	_mlxsw_reg_ritr_if_vrrp_id_ipv4_set
	b	LBB0_9
LBB0_8:
	mov	x0, x20
	mov	x1, x22
	bl	_mlxsw_reg_ritr_if_vrrp_id_ipv6_set
LBB0_9:
	ldr	w19, [x19]
	ldr	w0, [x24]
	bl	_MLXSW_REG
	mov	x1, x0
	mov	x0, x19
	mov	x2, x20
	bl	_mlxsw_reg_write
LBB0_10:
	ldur	x8, [x29, #-56]
Lloh10:
	adrp	x9, ___stack_chk_guard@GOTPAGE
Lloh11:
	ldr	x9, [x9, ___stack_chk_guard@GOTPAGEOFF]
Lloh12:
	ldr	x9, [x9]
	cmp	x9, x8
	b.ne	LBB0_12
; %bb.11:
	sub	sp, x29, #48
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	ret
LBB0_12:
	bl	___stack_chk_fail
	.loh AdrpLdrGot	Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGot	Lloh8, Lloh9
	.loh AdrpLdrGotLdr	Lloh10, Lloh11, Lloh12
	.cfi_endproc
                                        ; -- End function
	.comm	_MLXSW_REG_RITR_LEN,4,2         ; @MLXSW_REG_RITR_LEN
	.comm	_ritr,4,2                       ; @ritr
	.no_dead_strip	_mlxsw_sp_rif_vrrp_op
.subsections_via_symbols
