	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function exynos5_usbdrd_phy_init
_exynos5_usbdrd_phy_init:               ## @exynos5_usbdrd_phy_init
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	callq	_phy_get_drvdata
	movq	%rax, %r15
	movq	%rax, %rdi
	callq	_to_usbdrd_phy
	movq	%rax, %r12
	movl	(%rax), %edi
	callq	_clk_prepare_enable
	movl	%eax, %r14d
	testl	%eax, %eax
	jne	LBB0_2
## %bb.1:
	movq	_EXYNOS5_DRD_PHYREG0@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	addq	8(%r12), %rsi
	xorl	%edi, %edi
	callq	_writel
	movq	_EXYNOS5_DRD_PHYRESUME@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	addq	8(%r12), %rsi
	xorl	%edi, %edi
	callq	_writel
	movq	_LINKSYSTEM_XHCI_VERSION_CONTROL@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	movl	$32, %edi
	callq	_LINKSYSTEM_FLADJ
	orl	%eax, %ebx
	movq	_EXYNOS5_DRD_LINKSYSTEM@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	addq	8(%r12), %rsi
	movl	%ebx, %edi
	callq	_writel
	movq	_EXYNOS5_DRD_PHYPARAM0@GOTPCREL(%rip), %rbx
	movq	(%rbx), %rdi
	addq	8(%r12), %rdi
	callq	_readl
	movq	_PHYPARAM0_REF_USE_PAD@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edi
	notl	%edi
	andl	%eax, %edi
	movq	(%rbx), %rsi
	addq	8(%r12), %rsi
	callq	_writel
	movq	_EXYNOS5_DRD_PHYUTMICLKSEL@GOTPCREL(%rip), %rbx
	movq	(%rbx), %rdi
	addq	8(%r12), %rdi
	callq	_readl
	movq	_PHYUTMICLKSEL_UTMI_CLKSEL@GOTPCREL(%rip), %rcx
	orl	(%rcx), %eax
	movq	(%rbx), %rsi
	addq	8(%r12), %rsi
	movl	%eax, %edi
	callq	_writel
	movq	(%r15), %rax
	movq	%r12, %rdi
	callq	*8(%rax)
	movq	(%r15), %rax
	movq	%r15, %rdi
	callq	*(%rax)
	movl	%eax, %ebx
	movq	_PHYCLKRST_RETENABLEN@GOTPCREL(%rip), %rax
	movq	_PHYCLKRST_REF_SSP_EN@GOTPCREL(%rip), %rcx
	movq	_PHYCLKRST_SSC_EN@GOTPCREL(%rip), %rdx
	movq	_PHYCLKRST_COMMONONN@GOTPCREL(%rip), %rsi
	movq	_PHYCLKRST_PORTRESET@GOTPCREL(%rip), %r15
	orl	(%rax), %ebx
	orl	(%rcx), %ebx
	orl	(%rdx), %ebx
	orl	(%rsi), %ebx
	orl	(%r15), %ebx
	movq	_EXYNOS5_DRD_PHYCLKRST@GOTPCREL(%rip), %r13
	movq	(%r13), %rsi
	addq	8(%r12), %rsi
	movl	%ebx, %edi
	callq	_writel
	movl	$10, %edi
	callq	_udelay
	movl	(%r15), %edi
	notl	%edi
	andl	%ebx, %edi
	movq	(%r13), %rsi
	addq	8(%r12), %rsi
	callq	_writel
	movl	(%r12), %edi
	callq	_clk_disable_unprepare
LBB0_2:
	movl	%r14d, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_EXYNOS5_DRD_PHYREG0,8,3        ## @EXYNOS5_DRD_PHYREG0
	.comm	_EXYNOS5_DRD_PHYRESUME,8,3      ## @EXYNOS5_DRD_PHYRESUME
	.comm	_LINKSYSTEM_XHCI_VERSION_CONTROL,4,2 ## @LINKSYSTEM_XHCI_VERSION_CONTROL
	.comm	_EXYNOS5_DRD_LINKSYSTEM,8,3     ## @EXYNOS5_DRD_LINKSYSTEM
	.comm	_EXYNOS5_DRD_PHYPARAM0,8,3      ## @EXYNOS5_DRD_PHYPARAM0
	.comm	_PHYPARAM0_REF_USE_PAD,4,2      ## @PHYPARAM0_REF_USE_PAD
	.comm	_EXYNOS5_DRD_PHYUTMICLKSEL,8,3  ## @EXYNOS5_DRD_PHYUTMICLKSEL
	.comm	_PHYUTMICLKSEL_UTMI_CLKSEL,4,2  ## @PHYUTMICLKSEL_UTMI_CLKSEL
	.comm	_PHYCLKRST_RETENABLEN,4,2       ## @PHYCLKRST_RETENABLEN
	.comm	_PHYCLKRST_REF_SSP_EN,4,2       ## @PHYCLKRST_REF_SSP_EN
	.comm	_PHYCLKRST_SSC_EN,4,2           ## @PHYCLKRST_SSC_EN
	.comm	_PHYCLKRST_COMMONONN,4,2        ## @PHYCLKRST_COMMONONN
	.comm	_PHYCLKRST_PORTRESET,4,2        ## @PHYCLKRST_PORTRESET
	.comm	_EXYNOS5_DRD_PHYCLKRST,8,3      ## @EXYNOS5_DRD_PHYCLKRST
	.no_dead_strip	_exynos5_usbdrd_phy_init
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function exynos5_usbdrd_phy_init
_exynos5_usbdrd_phy_init:               ; @exynos5_usbdrd_phy_init
	.cfi_startproc
; %bb.0:
	stp	x24, x23, [sp, #-64]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	bl	_phy_get_drvdata
	mov	x21, x0
	bl	_to_usbdrd_phy
	mov	x19, x0
	ldr	w0, [x0]
	bl	_clk_prepare_enable
	mov	x20, x0
	cbnz	w0, LBB0_2
; %bb.1:
	ldr	x8, [x19, #8]
Lloh0:
	adrp	x9, _EXYNOS5_DRD_PHYREG0@GOTPAGE
Lloh1:
	ldr	x9, [x9, _EXYNOS5_DRD_PHYREG0@GOTPAGEOFF]
Lloh2:
	ldr	x9, [x9]
	add	x1, x9, x8
	bl	_writel
	ldr	x8, [x19, #8]
Lloh3:
	adrp	x9, _EXYNOS5_DRD_PHYRESUME@GOTPAGE
Lloh4:
	ldr	x9, [x9, _EXYNOS5_DRD_PHYRESUME@GOTPAGEOFF]
Lloh5:
	ldr	x9, [x9]
	add	x1, x9, x8
	mov	w0, #0
	bl	_writel
Lloh6:
	adrp	x8, _LINKSYSTEM_XHCI_VERSION_CONTROL@GOTPAGE
Lloh7:
	ldr	x8, [x8, _LINKSYSTEM_XHCI_VERSION_CONTROL@GOTPAGEOFF]
Lloh8:
	ldr	w22, [x8]
	mov	w0, #32
	bl	_LINKSYSTEM_FLADJ
	orr	w0, w0, w22
	ldr	x8, [x19, #8]
Lloh9:
	adrp	x9, _EXYNOS5_DRD_LINKSYSTEM@GOTPAGE
Lloh10:
	ldr	x9, [x9, _EXYNOS5_DRD_LINKSYSTEM@GOTPAGEOFF]
Lloh11:
	ldr	x9, [x9]
	add	x1, x9, x8
	bl	_writel
	ldr	x8, [x19, #8]
Lloh12:
	adrp	x22, _EXYNOS5_DRD_PHYPARAM0@GOTPAGE
Lloh13:
	ldr	x22, [x22, _EXYNOS5_DRD_PHYPARAM0@GOTPAGEOFF]
	ldr	x9, [x22]
	add	x0, x9, x8
	bl	_readl
Lloh14:
	adrp	x8, _PHYPARAM0_REF_USE_PAD@GOTPAGE
Lloh15:
	ldr	x8, [x8, _PHYPARAM0_REF_USE_PAD@GOTPAGEOFF]
Lloh16:
	ldr	w8, [x8]
	bic	w0, w0, w8
	ldr	x8, [x19, #8]
	ldr	x9, [x22]
	add	x1, x9, x8
	bl	_writel
	ldr	x8, [x19, #8]
Lloh17:
	adrp	x22, _EXYNOS5_DRD_PHYUTMICLKSEL@GOTPAGE
Lloh18:
	ldr	x22, [x22, _EXYNOS5_DRD_PHYUTMICLKSEL@GOTPAGEOFF]
	ldr	x9, [x22]
	add	x0, x9, x8
	bl	_readl
Lloh19:
	adrp	x8, _PHYUTMICLKSEL_UTMI_CLKSEL@GOTPAGE
Lloh20:
	ldr	x8, [x8, _PHYUTMICLKSEL_UTMI_CLKSEL@GOTPAGEOFF]
Lloh21:
	ldr	w8, [x8]
	orr	w0, w8, w0
	ldr	x8, [x19, #8]
	ldr	x9, [x22]
	add	x1, x9, x8
	bl	_writel
	ldr	x8, [x21]
	ldr	x8, [x8, #8]
	mov	x0, x19
	blr	x8
	ldr	x8, [x21]
	ldr	x8, [x8]
	mov	x0, x21
	blr	x8
Lloh22:
	adrp	x8, _PHYCLKRST_RETENABLEN@GOTPAGE
Lloh23:
	ldr	x8, [x8, _PHYCLKRST_RETENABLEN@GOTPAGEOFF]
Lloh24:
	ldr	w8, [x8]
Lloh25:
	adrp	x9, _PHYCLKRST_REF_SSP_EN@GOTPAGE
Lloh26:
	ldr	x9, [x9, _PHYCLKRST_REF_SSP_EN@GOTPAGEOFF]
Lloh27:
	adrp	x10, _PHYCLKRST_SSC_EN@GOTPAGE
Lloh28:
	ldr	x10, [x10, _PHYCLKRST_SSC_EN@GOTPAGEOFF]
Lloh29:
	ldr	w9, [x9]
Lloh30:
	ldr	w10, [x10]
Lloh31:
	adrp	x11, _PHYCLKRST_COMMONONN@GOTPAGE
Lloh32:
	ldr	x11, [x11, _PHYCLKRST_COMMONONN@GOTPAGEOFF]
Lloh33:
	adrp	x22, _PHYCLKRST_PORTRESET@GOTPAGE
Lloh34:
	ldr	x22, [x22, _PHYCLKRST_PORTRESET@GOTPAGEOFF]
Lloh35:
	ldr	w11, [x11]
	ldr	w12, [x22]
	orr	w8, w8, w0
	orr	w8, w8, w9
	orr	w8, w8, w10
	orr	w8, w8, w11
	orr	w21, w8, w12
	ldr	x8, [x19, #8]
Lloh36:
	adrp	x23, _EXYNOS5_DRD_PHYCLKRST@GOTPAGE
Lloh37:
	ldr	x23, [x23, _EXYNOS5_DRD_PHYCLKRST@GOTPAGEOFF]
	ldr	x9, [x23]
	add	x1, x9, x8
	mov	x0, x21
	bl	_writel
	mov	w0, #10
	bl	_udelay
	ldr	w8, [x22]
	bic	w0, w21, w8
	ldr	x8, [x19, #8]
	ldr	x9, [x23]
	add	x1, x9, x8
	bl	_writel
	ldr	w0, [x19]
	bl	_clk_disable_unprepare
LBB0_2:
	mov	x0, x20
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGot	Lloh36, Lloh37
	.loh AdrpLdrGot	Lloh33, Lloh34
	.loh AdrpLdrGotLdr	Lloh31, Lloh32, Lloh35
	.loh AdrpLdrGotLdr	Lloh27, Lloh28, Lloh30
	.loh AdrpLdrGotLdr	Lloh25, Lloh26, Lloh29
	.loh AdrpLdrGotLdr	Lloh22, Lloh23, Lloh24
	.loh AdrpLdrGotLdr	Lloh19, Lloh20, Lloh21
	.loh AdrpLdrGot	Lloh17, Lloh18
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh16
	.loh AdrpLdrGot	Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_EXYNOS5_DRD_PHYREG0,8,3        ; @EXYNOS5_DRD_PHYREG0
	.comm	_EXYNOS5_DRD_PHYRESUME,8,3      ; @EXYNOS5_DRD_PHYRESUME
	.comm	_LINKSYSTEM_XHCI_VERSION_CONTROL,4,2 ; @LINKSYSTEM_XHCI_VERSION_CONTROL
	.comm	_EXYNOS5_DRD_LINKSYSTEM,8,3     ; @EXYNOS5_DRD_LINKSYSTEM
	.comm	_EXYNOS5_DRD_PHYPARAM0,8,3      ; @EXYNOS5_DRD_PHYPARAM0
	.comm	_PHYPARAM0_REF_USE_PAD,4,2      ; @PHYPARAM0_REF_USE_PAD
	.comm	_EXYNOS5_DRD_PHYUTMICLKSEL,8,3  ; @EXYNOS5_DRD_PHYUTMICLKSEL
	.comm	_PHYUTMICLKSEL_UTMI_CLKSEL,4,2  ; @PHYUTMICLKSEL_UTMI_CLKSEL
	.comm	_PHYCLKRST_RETENABLEN,4,2       ; @PHYCLKRST_RETENABLEN
	.comm	_PHYCLKRST_REF_SSP_EN,4,2       ; @PHYCLKRST_REF_SSP_EN
	.comm	_PHYCLKRST_SSC_EN,4,2           ; @PHYCLKRST_SSC_EN
	.comm	_PHYCLKRST_COMMONONN,4,2        ; @PHYCLKRST_COMMONONN
	.comm	_PHYCLKRST_PORTRESET,4,2        ; @PHYCLKRST_PORTRESET
	.comm	_EXYNOS5_DRD_PHYCLKRST,8,3      ; @EXYNOS5_DRD_PHYCLKRST
	.no_dead_strip	_exynos5_usbdrd_phy_init
.subsections_via_symbols
