	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function mii_init
_mii_init:                              ## @mii_init
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r14
	pushq	%rbx
	subq	$16, %rsp
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	movq	%rdi, %r14
	movl	8(%rdi), %edi
	callq	_PHYID_GET_PHY_ID
                                        ## kill: def $eax killed $eax def $rax
	addl	$-128, %eax
	cmpl	$5, %eax
	ja	LBB0_13
## %bb.1:
	leaq	LJTI0_0(%rip), %rcx
	movslq	(%rcx,%rax,4), %rax
	addq	%rcx, %rax
	jmpq	*%rax
LBB0_2:
	movq	_ADVERTISE_PAUSE_ASYM@GOTPCREL(%rip), %rax
	movq	_ADVERTISE_PAUSE_CAP@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edi
	orl	(%rax), %edi
	movq	_MII_ADVERTISE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	4(%r14), %edx
	callq	_MII_REG_BITS_ON
	movq	_VELOCITY_DUPLEX_FULL@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movq	_TCSR_ECHODIS@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edi
	movq	_MII_SREVISION@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	movl	4(%r14), %edx
	testl	%eax, (%r14)
	jne	LBB0_12
## %bb.3:
	callq	_MII_REG_BITS_OFF
	jmp	LBB0_13
LBB0_4:
	movq	_PSCR_ACRSTX@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_MII_REG_PSCR@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	4(%r14), %edx
	callq	_MII_REG_BITS_ON
	movq	_ADVERTISE_PAUSE_ASYM@GOTPCREL(%rip), %rax
	movq	_ADVERTISE_PAUSE_CAP@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edi
	orl	(%rax), %edi
	movq	_MII_ADVERTISE@GOTPCREL(%rip), %rax
	jmp	LBB0_11
LBB0_5:
	movq	_ADVERTISE_PAUSE_ASYM@GOTPCREL(%rip), %rax
	movq	_ADVERTISE_PAUSE_CAP@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edi
	orl	(%rax), %edi
	movq	_MII_ADVERTISE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	4(%r14), %edx
	callq	_MII_REG_BITS_ON
	jmp	LBB0_6
LBB0_8:
	movq	_ADVERTISE_PAUSE_ASYM@GOTPCREL(%rip), %rax
	movq	_ADVERTISE_PAUSE_CAP@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edi
	orl	(%rax), %edi
	movq	_MII_ADVERTISE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	4(%r14), %edx
	callq	_MII_REG_BITS_OFF
LBB0_6:
	movq	_VELOCITY_DUPLEX_FULL@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movq	_TCSR_ECHODIS@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edi
	movq	_MII_SREVISION@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	movl	4(%r14), %edx
	testl	%eax, (%r14)
	je	LBB0_9
## %bb.7:
	callq	_MII_REG_BITS_ON
	jmp	LBB0_10
LBB0_9:
	callq	_MII_REG_BITS_OFF
LBB0_10:
	movq	_PLED_LALBE@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_MII_TPISTATUS@GOTPCREL(%rip), %rax
LBB0_11:
	movl	(%rax), %esi
	movl	4(%r14), %edx
LBB0_12:
	callq	_MII_REG_BITS_ON
LBB0_13:
	movl	4(%r14), %edi
	movq	_MII_BMCR@GOTPCREL(%rip), %rbx
	movl	(%rbx), %esi
	leaq	-20(%rbp), %rdx
	callq	_velocity_mii_read
	movl	-20(%rbp), %edx
	movq	_BMCR_ISOLATE@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	testl	%edx, %eax
	je	LBB0_15
## %bb.14:
	notl	%eax
	andl	%eax, %edx
	movl	%edx, -20(%rbp)
	movl	4(%r14), %edi
	movl	(%rbx), %esi
	callq	_velocity_mii_write
LBB0_15:
	addq	$16, %rsp
	popq	%rbx
	popq	%r14
	popq	%rbp
	retq
	.cfi_endproc
	.p2align	2, 0x90
	.data_region jt32
.set L0_0_set_2, LBB0_2-LJTI0_0
.set L0_0_set_4, LBB0_4-LJTI0_0
.set L0_0_set_5, LBB0_5-LJTI0_0
.set L0_0_set_8, LBB0_8-LJTI0_0
LJTI0_0:
	.long	L0_0_set_2
	.long	L0_0_set_2
	.long	L0_0_set_4
	.long	L0_0_set_4
	.long	L0_0_set_5
	.long	L0_0_set_8
	.end_data_region
                                        ## -- End function
	.comm	_ADVERTISE_PAUSE_ASYM,4,2       ## @ADVERTISE_PAUSE_ASYM
	.comm	_ADVERTISE_PAUSE_CAP,4,2        ## @ADVERTISE_PAUSE_CAP
	.comm	_MII_ADVERTISE,4,2              ## @MII_ADVERTISE
	.comm	_VELOCITY_DUPLEX_FULL,4,2       ## @VELOCITY_DUPLEX_FULL
	.comm	_TCSR_ECHODIS,4,2               ## @TCSR_ECHODIS
	.comm	_MII_SREVISION,4,2              ## @MII_SREVISION
	.comm	_PLED_LALBE,4,2                 ## @PLED_LALBE
	.comm	_MII_TPISTATUS,4,2              ## @MII_TPISTATUS
	.comm	_PSCR_ACRSTX,4,2                ## @PSCR_ACRSTX
	.comm	_MII_REG_PSCR,4,2               ## @MII_REG_PSCR
	.comm	_MII_BMCR,4,2                   ## @MII_BMCR
	.comm	_BMCR_ISOLATE,4,2               ## @BMCR_ISOLATE
	.no_dead_strip	_mii_init
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function mii_init
_mii_init:                              ; @mii_init
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #48
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x19, x0
	ldr	w0, [x0, #8]
	bl	_PHYID_GET_PHY_ID
	sub	w8, w0, #128
	cmp	w8, #5
	b.hi	LBB0_13
; %bb.1:
Lloh0:
	adrp	x9, lJTI0_0@PAGE
Lloh1:
	add	x9, x9, lJTI0_0@PAGEOFF
	adr	x10, LBB0_2
	ldrb	w11, [x9, x8]
	add	x10, x10, x11, lsl #2
	br	x10
LBB0_2:
Lloh2:
	adrp	x8, _ADVERTISE_PAUSE_ASYM@GOTPAGE
Lloh3:
	ldr	x8, [x8, _ADVERTISE_PAUSE_ASYM@GOTPAGEOFF]
Lloh4:
	ldr	w8, [x8]
Lloh5:
	adrp	x9, _ADVERTISE_PAUSE_CAP@GOTPAGE
Lloh6:
	ldr	x9, [x9, _ADVERTISE_PAUSE_CAP@GOTPAGEOFF]
Lloh7:
	ldr	w9, [x9]
	orr	w0, w9, w8
Lloh8:
	adrp	x8, _MII_ADVERTISE@GOTPAGE
Lloh9:
	ldr	x8, [x8, _MII_ADVERTISE@GOTPAGEOFF]
Lloh10:
	ldr	w1, [x8]
	ldr	w2, [x19, #4]
	bl	_MII_REG_BITS_ON
Lloh11:
	adrp	x8, _VELOCITY_DUPLEX_FULL@GOTPAGE
Lloh12:
	ldr	x8, [x8, _VELOCITY_DUPLEX_FULL@GOTPAGEOFF]
Lloh13:
	ldr	w8, [x8]
Lloh14:
	adrp	x9, _TCSR_ECHODIS@GOTPAGE
Lloh15:
	ldr	x9, [x9, _TCSR_ECHODIS@GOTPAGEOFF]
Lloh16:
	ldr	w0, [x9]
Lloh17:
	adrp	x9, _MII_SREVISION@GOTPAGE
Lloh18:
	ldr	x9, [x9, _MII_SREVISION@GOTPAGEOFF]
Lloh19:
	ldr	w1, [x9]
	ldp	w9, w2, [x19]
	tst	w8, w9
	b.ne	LBB0_12
; %bb.3:
	bl	_MII_REG_BITS_OFF
	b	LBB0_13
LBB0_4:
Lloh20:
	adrp	x8, _PSCR_ACRSTX@GOTPAGE
Lloh21:
	ldr	x8, [x8, _PSCR_ACRSTX@GOTPAGEOFF]
Lloh22:
	ldr	w0, [x8]
Lloh23:
	adrp	x8, _MII_REG_PSCR@GOTPAGE
Lloh24:
	ldr	x8, [x8, _MII_REG_PSCR@GOTPAGEOFF]
Lloh25:
	ldr	w1, [x8]
	ldr	w2, [x19, #4]
	bl	_MII_REG_BITS_ON
Lloh26:
	adrp	x8, _ADVERTISE_PAUSE_ASYM@GOTPAGE
Lloh27:
	ldr	x8, [x8, _ADVERTISE_PAUSE_ASYM@GOTPAGEOFF]
Lloh28:
	ldr	w8, [x8]
Lloh29:
	adrp	x9, _ADVERTISE_PAUSE_CAP@GOTPAGE
Lloh30:
	ldr	x9, [x9, _ADVERTISE_PAUSE_CAP@GOTPAGEOFF]
Lloh31:
	ldr	w9, [x9]
	orr	w0, w9, w8
Lloh32:
	adrp	x8, _MII_ADVERTISE@GOTPAGE
Lloh33:
	ldr	x8, [x8, _MII_ADVERTISE@GOTPAGEOFF]
	b	LBB0_11
LBB0_5:
Lloh34:
	adrp	x8, _ADVERTISE_PAUSE_ASYM@GOTPAGE
Lloh35:
	ldr	x8, [x8, _ADVERTISE_PAUSE_ASYM@GOTPAGEOFF]
Lloh36:
	ldr	w8, [x8]
Lloh37:
	adrp	x9, _ADVERTISE_PAUSE_CAP@GOTPAGE
Lloh38:
	ldr	x9, [x9, _ADVERTISE_PAUSE_CAP@GOTPAGEOFF]
Lloh39:
	ldr	w9, [x9]
	orr	w0, w9, w8
Lloh40:
	adrp	x8, _MII_ADVERTISE@GOTPAGE
Lloh41:
	ldr	x8, [x8, _MII_ADVERTISE@GOTPAGEOFF]
Lloh42:
	ldr	w1, [x8]
	ldr	w2, [x19, #4]
	bl	_MII_REG_BITS_ON
	b	LBB0_7
LBB0_6:
Lloh43:
	adrp	x8, _ADVERTISE_PAUSE_ASYM@GOTPAGE
Lloh44:
	ldr	x8, [x8, _ADVERTISE_PAUSE_ASYM@GOTPAGEOFF]
Lloh45:
	ldr	w8, [x8]
Lloh46:
	adrp	x9, _ADVERTISE_PAUSE_CAP@GOTPAGE
Lloh47:
	ldr	x9, [x9, _ADVERTISE_PAUSE_CAP@GOTPAGEOFF]
Lloh48:
	ldr	w9, [x9]
	orr	w0, w9, w8
Lloh49:
	adrp	x8, _MII_ADVERTISE@GOTPAGE
Lloh50:
	ldr	x8, [x8, _MII_ADVERTISE@GOTPAGEOFF]
Lloh51:
	ldr	w1, [x8]
	ldr	w2, [x19, #4]
	bl	_MII_REG_BITS_OFF
LBB0_7:
Lloh52:
	adrp	x8, _VELOCITY_DUPLEX_FULL@GOTPAGE
Lloh53:
	ldr	x8, [x8, _VELOCITY_DUPLEX_FULL@GOTPAGEOFF]
Lloh54:
	ldr	w8, [x8]
Lloh55:
	adrp	x9, _TCSR_ECHODIS@GOTPAGE
Lloh56:
	ldr	x9, [x9, _TCSR_ECHODIS@GOTPAGEOFF]
Lloh57:
	ldr	w0, [x9]
Lloh58:
	adrp	x9, _MII_SREVISION@GOTPAGE
Lloh59:
	ldr	x9, [x9, _MII_SREVISION@GOTPAGEOFF]
Lloh60:
	ldr	w1, [x9]
	ldp	w9, w2, [x19]
	tst	w8, w9
	b.eq	LBB0_9
; %bb.8:
	bl	_MII_REG_BITS_ON
	b	LBB0_10
LBB0_9:
	bl	_MII_REG_BITS_OFF
LBB0_10:
Lloh61:
	adrp	x8, _PLED_LALBE@GOTPAGE
Lloh62:
	ldr	x8, [x8, _PLED_LALBE@GOTPAGEOFF]
Lloh63:
	ldr	w0, [x8]
Lloh64:
	adrp	x8, _MII_TPISTATUS@GOTPAGE
Lloh65:
	ldr	x8, [x8, _MII_TPISTATUS@GOTPAGEOFF]
LBB0_11:
	ldr	w1, [x8]
	ldr	w2, [x19, #4]
LBB0_12:
	bl	_MII_REG_BITS_ON
LBB0_13:
	ldr	w0, [x19, #4]
Lloh66:
	adrp	x20, _MII_BMCR@GOTPAGE
Lloh67:
	ldr	x20, [x20, _MII_BMCR@GOTPAGEOFF]
	ldr	w1, [x20]
	add	x2, sp, #12
	bl	_velocity_mii_read
	ldr	w8, [sp, #12]
Lloh68:
	adrp	x9, _BMCR_ISOLATE@GOTPAGE
Lloh69:
	ldr	x9, [x9, _BMCR_ISOLATE@GOTPAGEOFF]
Lloh70:
	ldr	w9, [x9]
	tst	w9, w8
	b.eq	LBB0_15
; %bb.14:
	bic	w2, w8, w9
	str	w2, [sp, #12]
	ldr	w0, [x19, #4]
	ldr	w1, [x20]
	bl	_velocity_mii_write
LBB0_15:
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #48
	ret
	.loh AdrpAdd	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh19
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh16
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGot	Lloh32, Lloh33
	.loh AdrpLdrGotLdr	Lloh29, Lloh30, Lloh31
	.loh AdrpLdrGotLdr	Lloh26, Lloh27, Lloh28
	.loh AdrpLdrGotLdr	Lloh23, Lloh24, Lloh25
	.loh AdrpLdrGotLdr	Lloh20, Lloh21, Lloh22
	.loh AdrpLdrGotLdr	Lloh40, Lloh41, Lloh42
	.loh AdrpLdrGotLdr	Lloh37, Lloh38, Lloh39
	.loh AdrpLdrGotLdr	Lloh34, Lloh35, Lloh36
	.loh AdrpLdrGotLdr	Lloh49, Lloh50, Lloh51
	.loh AdrpLdrGotLdr	Lloh46, Lloh47, Lloh48
	.loh AdrpLdrGotLdr	Lloh43, Lloh44, Lloh45
	.loh AdrpLdrGotLdr	Lloh58, Lloh59, Lloh60
	.loh AdrpLdrGotLdr	Lloh55, Lloh56, Lloh57
	.loh AdrpLdrGotLdr	Lloh52, Lloh53, Lloh54
	.loh AdrpLdrGot	Lloh64, Lloh65
	.loh AdrpLdrGotLdr	Lloh61, Lloh62, Lloh63
	.loh AdrpLdrGotLdr	Lloh68, Lloh69, Lloh70
	.loh AdrpLdrGot	Lloh66, Lloh67
	.cfi_endproc
	.section	__TEXT,__const
lJTI0_0:
	.byte	(LBB0_2-LBB0_2)>>2
	.byte	(LBB0_2-LBB0_2)>>2
	.byte	(LBB0_4-LBB0_2)>>2
	.byte	(LBB0_4-LBB0_2)>>2
	.byte	(LBB0_5-LBB0_2)>>2
	.byte	(LBB0_6-LBB0_2)>>2
                                        ; -- End function
	.comm	_ADVERTISE_PAUSE_ASYM,4,2       ; @ADVERTISE_PAUSE_ASYM
	.comm	_ADVERTISE_PAUSE_CAP,4,2        ; @ADVERTISE_PAUSE_CAP
	.comm	_MII_ADVERTISE,4,2              ; @MII_ADVERTISE
	.comm	_VELOCITY_DUPLEX_FULL,4,2       ; @VELOCITY_DUPLEX_FULL
	.comm	_TCSR_ECHODIS,4,2               ; @TCSR_ECHODIS
	.comm	_MII_SREVISION,4,2              ; @MII_SREVISION
	.comm	_PLED_LALBE,4,2                 ; @PLED_LALBE
	.comm	_MII_TPISTATUS,4,2              ; @MII_TPISTATUS
	.comm	_PSCR_ACRSTX,4,2                ; @PSCR_ACRSTX
	.comm	_MII_REG_PSCR,4,2               ; @MII_REG_PSCR
	.comm	_MII_BMCR,4,2                   ; @MII_BMCR
	.comm	_BMCR_ISOLATE,4,2               ; @BMCR_ISOLATE
	.no_dead_strip	_mii_init
.subsections_via_symbols
