	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function mlxsw_sp2_port_speed_base
_mlxsw_sp2_port_speed_base:             ## @mlxsw_sp2_port_speed_base
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$24, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdx, %r14
	movl	%esi, %r15d
	movq	%rdi, %r12
	movq	___stack_chk_guard@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	movq	%rax, -48(%rbp)
	movq	_MLXSW_REG_PTYS_LEN@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	callq	____chkstk_darwin
	addq	$15, %rax
	andq	$-16, %rax
	subq	%rax, %rsp
	movq	%rsp, %r13
	movq	%r13, %rdi
	movl	%r15d, %esi
	xorl	%edx, %edx
	xorl	%ecx, %ecx
	callq	_mlxsw_reg_ptys_ext_eth_pack
	movl	(%r12), %ebx
	movq	_ptys@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_MLXSW_REG
	movl	%ebx, %edi
	movl	%eax, %esi
	movq	%r13, %rdx
	callq	_mlxsw_reg_query
	movl	%eax, %r15d
	testl	%eax, %eax
	jne	LBB0_7
## %bb.1:
	xorl	%r15d, %r15d
	leaq	-52(%rbp), %rsi
	movq	%r13, %rdi
	xorl	%edx, %edx
	xorl	%ecx, %ecx
	callq	_mlxsw_reg_ptys_ext_eth_unpack
	movl	-52(%rbp), %eax
	movq	_MLXSW_REG_PTYS_EXT_ETH_SPEED_50GAUI_1_LAUI_1_50GBASE_CR_KR@GOTPCREL(%rip), %rcx
	testl	%eax, (%rcx)
	je	LBB0_4
## %bb.2:
	movq	_MLXSW_SP_PORT_BASE_SPEED_50G@GOTPCREL(%rip), %rax
	jmp	LBB0_3
LBB0_4:
	movq	_MLXSW_REG_PTYS_EXT_ETH_SPEED_25GAUI_1_25GBASE_CR_KR@GOTPCREL(%rip), %rcx
	testl	%eax, (%rcx)
	je	LBB0_6
## %bb.5:
	movq	_MLXSW_SP_PORT_BASE_SPEED_25G@GOTPCREL(%rip), %rax
LBB0_3:
	movl	(%rax), %eax
	movl	%eax, (%r14)
LBB0_7:
	movq	___stack_chk_guard@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	cmpq	-48(%rbp), %rax
	jne	LBB0_9
## %bb.8:
	movl	%r15d, %eax
	leaq	-40(%rbp), %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_6:
	movq	_EIO@GOTPCREL(%rip), %rax
	xorl	%r15d, %r15d
	subl	(%rax), %r15d
	jmp	LBB0_7
LBB0_9:
	callq	___stack_chk_fail
	.cfi_endproc
                                        ## -- End function
	.comm	_MLXSW_REG_PTYS_LEN,4,2         ## @MLXSW_REG_PTYS_LEN
	.comm	_ptys,4,2                       ## @ptys
	.comm	_MLXSW_REG_PTYS_EXT_ETH_SPEED_50GAUI_1_LAUI_1_50GBASE_CR_KR,4,2 ## @MLXSW_REG_PTYS_EXT_ETH_SPEED_50GAUI_1_LAUI_1_50GBASE_CR_KR
	.comm	_MLXSW_SP_PORT_BASE_SPEED_50G,4,2 ## @MLXSW_SP_PORT_BASE_SPEED_50G
	.comm	_MLXSW_REG_PTYS_EXT_ETH_SPEED_25GAUI_1_25GBASE_CR_KR,4,2 ## @MLXSW_REG_PTYS_EXT_ETH_SPEED_25GAUI_1_25GBASE_CR_KR
	.comm	_MLXSW_SP_PORT_BASE_SPEED_25G,4,2 ## @MLXSW_SP_PORT_BASE_SPEED_25G
	.comm	_EIO,4,2                        ## @EIO
	.no_dead_strip	_mlxsw_sp2_port_speed_base
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function mlxsw_sp2_port_speed_base
_mlxsw_sp2_port_speed_base:             ; @mlxsw_sp2_port_speed_base
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	sub	sp, sp, #16
	mov	x19, x2
	mov	x21, x0
Lloh0:
	adrp	x8, ___stack_chk_guard@GOTPAGE
Lloh1:
	ldr	x8, [x8, ___stack_chk_guard@GOTPAGEOFF]
Lloh2:
	ldr	x8, [x8]
	stur	x8, [x29, #-40]
Lloh3:
	adrp	x8, _MLXSW_REG_PTYS_LEN@GOTPAGE
Lloh4:
	ldr	x8, [x8, _MLXSW_REG_PTYS_LEN@GOTPAGEOFF]
Lloh5:
	ldr	w8, [x8]
	mov	x9, x8
Lloh6:
	adrp	x16, ___chkstk_darwin@GOTPAGE
Lloh7:
	ldr	x16, [x16, ___chkstk_darwin@GOTPAGEOFF]
	blr	x16
	mov	x9, sp
	add	x8, x8, #15
	and	x8, x8, #0x1fffffff0
	sub	x20, x9, x8
	mov	sp, x20
	mov	x0, x20
	mov	w2, #0
	mov	w3, #0
	bl	_mlxsw_reg_ptys_ext_eth_pack
	ldr	w21, [x21]
Lloh8:
	adrp	x8, _ptys@GOTPAGE
Lloh9:
	ldr	x8, [x8, _ptys@GOTPAGEOFF]
Lloh10:
	ldr	w0, [x8]
	bl	_MLXSW_REG
	mov	x1, x0
	mov	x0, x21
	mov	x2, x20
	bl	_mlxsw_reg_query
	cbnz	w0, LBB0_6
; %bb.1:
	sub	x1, x29, #44
	mov	x0, x20
	mov	x2, #0
	mov	x3, #0
	bl	_mlxsw_reg_ptys_ext_eth_unpack
	ldur	w8, [x29, #-44]
Lloh11:
	adrp	x9, _MLXSW_REG_PTYS_EXT_ETH_SPEED_50GAUI_1_LAUI_1_50GBASE_CR_KR@GOTPAGE
Lloh12:
	ldr	x9, [x9, _MLXSW_REG_PTYS_EXT_ETH_SPEED_50GAUI_1_LAUI_1_50GBASE_CR_KR@GOTPAGEOFF]
Lloh13:
	ldr	w9, [x9]
	tst	w9, w8
	b.eq	LBB0_3
; %bb.2:
	mov	w0, #0
Lloh14:
	adrp	x8, _MLXSW_SP_PORT_BASE_SPEED_50G@GOTPAGE
Lloh15:
	ldr	x8, [x8, _MLXSW_SP_PORT_BASE_SPEED_50G@GOTPAGEOFF]
	b	LBB0_5
LBB0_3:
Lloh16:
	adrp	x9, _MLXSW_REG_PTYS_EXT_ETH_SPEED_25GAUI_1_25GBASE_CR_KR@GOTPAGE
Lloh17:
	ldr	x9, [x9, _MLXSW_REG_PTYS_EXT_ETH_SPEED_25GAUI_1_25GBASE_CR_KR@GOTPAGEOFF]
Lloh18:
	ldr	w9, [x9]
	tst	w9, w8
	b.eq	LBB0_8
; %bb.4:
	mov	w0, #0
Lloh19:
	adrp	x8, _MLXSW_SP_PORT_BASE_SPEED_25G@GOTPAGE
Lloh20:
	ldr	x8, [x8, _MLXSW_SP_PORT_BASE_SPEED_25G@GOTPAGEOFF]
LBB0_5:
	ldr	w8, [x8]
	str	w8, [x19]
LBB0_6:
	ldur	x8, [x29, #-40]
Lloh21:
	adrp	x9, ___stack_chk_guard@GOTPAGE
Lloh22:
	ldr	x9, [x9, ___stack_chk_guard@GOTPAGEOFF]
Lloh23:
	ldr	x9, [x9]
	cmp	x9, x8
	b.ne	LBB0_9
; %bb.7:
	sub	sp, x29, #32
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
LBB0_8:
Lloh24:
	adrp	x8, _EIO@GOTPAGE
Lloh25:
	ldr	x8, [x8, _EIO@GOTPAGEOFF]
Lloh26:
	ldr	w8, [x8]
	neg	w0, w8
	b	LBB0_6
LBB0_9:
	bl	___stack_chk_fail
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGot	Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpLdrGot	Lloh14, Lloh15
	.loh AdrpLdrGotLdr	Lloh16, Lloh17, Lloh18
	.loh AdrpLdrGot	Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.cfi_endproc
                                        ; -- End function
	.comm	_MLXSW_REG_PTYS_LEN,4,2         ; @MLXSW_REG_PTYS_LEN
	.comm	_ptys,4,2                       ; @ptys
	.comm	_MLXSW_REG_PTYS_EXT_ETH_SPEED_50GAUI_1_LAUI_1_50GBASE_CR_KR,4,2 ; @MLXSW_REG_PTYS_EXT_ETH_SPEED_50GAUI_1_LAUI_1_50GBASE_CR_KR
	.comm	_MLXSW_SP_PORT_BASE_SPEED_50G,4,2 ; @MLXSW_SP_PORT_BASE_SPEED_50G
	.comm	_MLXSW_REG_PTYS_EXT_ETH_SPEED_25GAUI_1_25GBASE_CR_KR,4,2 ; @MLXSW_REG_PTYS_EXT_ETH_SPEED_25GAUI_1_25GBASE_CR_KR
	.comm	_MLXSW_SP_PORT_BASE_SPEED_25G,4,2 ; @MLXSW_SP_PORT_BASE_SPEED_25G
	.comm	_EIO,4,2                        ; @EIO
	.no_dead_strip	_mlxsw_sp2_port_speed_base
.subsections_via_symbols
