	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function ath5k_hw_init_core_clock
_ath5k_hw_init_core_clock:              ## @ath5k_hw_init_core_clock
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r12
	movq	32(%rdi), %rbx
	callq	_ath5k_hw_common
	movl	(%rbx), %ecx
	cmpl	$129, %ecx
	movl	$22, %edx
	movl	$44, %esi
	cmovel	%edx, %esi
	cmpl	$130, %ecx
	movl	$40, %ebx
	cmovnel	%esi, %ebx
	movl	(%r12), %ecx
	cmpl	$131, %ecx
	je	LBB0_5
## %bb.1:
	cmpl	$133, %ecx
	je	LBB0_4
## %bb.2:
	cmpl	$132, %ecx
	jne	LBB0_6
## %bb.3:
	addl	%ebx, %ebx
	jmp	LBB0_6
LBB0_5:
	shrl	$2, %ebx
	jmp	LBB0_6
LBB0_4:
	shrl	%ebx
LBB0_6:
	movl	%ebx, (%rax)
	leal	-1(%rbx), %edi
	movq	_AR5K_USEC_1@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_AR5K_REG_SM
	movl	%eax, -44(%rbp)                 ## 4-byte Spill
	movq	8(%r12), %rax
	movq	_AR5K_AR5210@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	je	LBB0_8
## %bb.7:
	movq	_AR5K_DCU_GBL_IFS_MISC@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_AR5K_DCU_GBL_IFS_MISC_USEC_DUR@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r12, %rdi
	movl	%ebx, %ecx
	callq	_AR5K_REG_WRITE_BITS
LBB0_8:
	movq	16(%r12), %rax
	movq	_AR5K_RF5112@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	sete	%cl
	movq	_AR5K_RF2413@GOTPCREL(%rip), %rdx
	cmpq	(%rdx), %rax
	sete	%dl
	orb	%cl, %dl
	movq	_AR5K_RF5413@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	sete	%cl
	movq	_AR5K_RF2316@GOTPCREL(%rip), %rsi
	cmpq	(%rsi), %rax
	sete	%bl
	orb	%cl, %bl
	orb	%dl, %bl
	movq	_AR5K_RF2317@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	sete	%al
	orb	%bl, %al
	movzbl	%al, %eax
	leal	31(,%rax,8), %edi
	movq	_AR5K_USEC_32@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_AR5K_REG_SM
	movl	%eax, %r15d
	movq	_AR5K_USEC_5211@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r12, %rdi
	callq	_ath5k_hw_reg_read
	movl	%eax, %ebx
	movq	_AR5K_USEC_TX_LATENCY_5211@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	%ebx, %edi
	callq	_AR5K_REG_MS
	movl	%eax, %r13d
	movq	_AR5K_USEC_RX_LATENCY_5211@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	%ebx, %edi
	callq	_AR5K_REG_MS
	movl	%eax, %r14d
	movq	_AR5K_INIT_TXF2TXD_START_DEFAULT@GOTPCREL(%rip), %rsi
	movq	8(%r12), %rcx
	movq	24(%r12), %rax
	movq	_AR5K_AR5210@GOTPCREL(%rip), %rdx
	cmpq	(%rdx), %rcx
	jne	LBB0_10
## %bb.9:
	movq	_AR5K_INIT_TX_LATENCY_5210@GOTPCREL(%rip), %rcx
	movq	_AR5K_INIT_RX_LATENCY_5210@GOTPCREL(%rip), %rdx
	movl	(%rcx), %r13d
	movl	(%rdx), %r14d
LBB0_10:
	movl	(%rsi), %ebx
	movq	_AR5K_SREV_AR5211@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jge	LBB0_12
## %bb.11:
	movq	_AR5K_USEC_TX_LATENCY_5210@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	%r13d, %edi
	callq	_AR5K_REG_SM
	movl	%eax, %r13d
	movq	_AR5K_USEC_RX_LATENCY_5210@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	%r14d, %edi
	callq	_AR5K_REG_SM
	movl	%eax, %r14d
	jmp	LBB0_18
LBB0_12:
	movl	(%r12), %eax
	cmpl	$131, %eax
	je	LBB0_16
## %bb.13:
	cmpl	$132, %eax
	je	LBB0_17
## %bb.14:
	cmpl	$133, %eax
	jne	LBB0_18
## %bb.15:
	addl	%r13d, %r13d
	movq	_AR5K_USEC_TX_LATENCY_5211@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	%r13d, %edi
	callq	_AR5K_REG_SM
	movl	%eax, %r13d
	movq	_AR5K_INIT_RX_LAT_MAX@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_AR5K_USEC_RX_LATENCY_5211@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_AR5K_REG_SM
	movl	%eax, %r14d
	movq	_AR5K_INIT_TXF2TXD_START_DELAY_10MHZ@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	jmp	LBB0_18
LBB0_16:
	shll	$2, %r13d
	movq	_AR5K_USEC_TX_LATENCY_5211@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	%r13d, %edi
	callq	_AR5K_REG_SM
	movl	%eax, %r13d
	movq	_AR5K_INIT_RX_LAT_MAX@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_AR5K_USEC_RX_LATENCY_5211@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_AR5K_REG_SM
	movl	%eax, %r14d
	movq	_AR5K_INIT_TXF2TXD_START_DELAY_5MHZ@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	jmp	LBB0_18
LBB0_17:
	movq	_AR5K_INIT_TX_LAT_MIN@GOTPCREL(%rip), %rax
	movl	(%rax), %r13d
	movl	%r14d, %edi
	shrl	$31, %edi
	addl	%r14d, %edi
	sarl	%edi
	movq	_AR5K_USEC_RX_LATENCY_5211@GOTPCREL(%rip), %rax
	movq	%rsi, %rbx
	movl	(%rax), %esi
	callq	_AR5K_REG_SM
	movl	%eax, %r14d
	movl	(%rbx), %ebx
LBB0_18:
	orl	%r14d, %r13d
	orl	-44(%rbp), %r15d                ## 4-byte Folded Reload
	orl	%r13d, %r15d
	movq	_AR5K_USEC@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r12, %rdi
	movl	%r15d, %esi
	callq	_ath5k_hw_reg_write
	movq	16(%r12), %rax
	movq	_AR5K_RF5112@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jne	LBB0_19
## %bb.20:
	movq	_AR5K_PHY_RF_CTL2@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_AR5K_PHY_RF_CTL2_TXF2TXD_START@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r12, %rdi
	movl	%ebx, %ecx
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_AR5K_REG_WRITE_BITS            ## TAILCALL
LBB0_19:
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_AR5K_USEC_1,4,2                ## @AR5K_USEC_1
	.comm	_AR5K_AR5210,8,3                ## @AR5K_AR5210
	.comm	_AR5K_DCU_GBL_IFS_MISC,4,2      ## @AR5K_DCU_GBL_IFS_MISC
	.comm	_AR5K_DCU_GBL_IFS_MISC_USEC_DUR,4,2 ## @AR5K_DCU_GBL_IFS_MISC_USEC_DUR
	.comm	_AR5K_RF5112,8,3                ## @AR5K_RF5112
	.comm	_AR5K_RF2413,8,3                ## @AR5K_RF2413
	.comm	_AR5K_RF5413,8,3                ## @AR5K_RF5413
	.comm	_AR5K_RF2316,8,3                ## @AR5K_RF2316
	.comm	_AR5K_RF2317,8,3                ## @AR5K_RF2317
	.comm	_AR5K_USEC_32,4,2               ## @AR5K_USEC_32
	.comm	_AR5K_USEC_5211,4,2             ## @AR5K_USEC_5211
	.comm	_AR5K_USEC_TX_LATENCY_5211,4,2  ## @AR5K_USEC_TX_LATENCY_5211
	.comm	_AR5K_USEC_RX_LATENCY_5211,4,2  ## @AR5K_USEC_RX_LATENCY_5211
	.comm	_AR5K_INIT_TXF2TXD_START_DEFAULT,4,2 ## @AR5K_INIT_TXF2TXD_START_DEFAULT
	.comm	_AR5K_INIT_TX_LATENCY_5210,4,2  ## @AR5K_INIT_TX_LATENCY_5210
	.comm	_AR5K_INIT_RX_LATENCY_5210,4,2  ## @AR5K_INIT_RX_LATENCY_5210
	.comm	_AR5K_SREV_AR5211,8,3           ## @AR5K_SREV_AR5211
	.comm	_AR5K_USEC_TX_LATENCY_5210,4,2  ## @AR5K_USEC_TX_LATENCY_5210
	.comm	_AR5K_USEC_RX_LATENCY_5210,4,2  ## @AR5K_USEC_RX_LATENCY_5210
	.comm	_AR5K_INIT_RX_LAT_MAX,4,2       ## @AR5K_INIT_RX_LAT_MAX
	.comm	_AR5K_INIT_TXF2TXD_START_DELAY_10MHZ,4,2 ## @AR5K_INIT_TXF2TXD_START_DELAY_10MHZ
	.comm	_AR5K_INIT_TXF2TXD_START_DELAY_5MHZ,4,2 ## @AR5K_INIT_TXF2TXD_START_DELAY_5MHZ
	.comm	_AR5K_INIT_TX_LAT_MIN,4,2       ## @AR5K_INIT_TX_LAT_MIN
	.comm	_AR5K_USEC,4,2                  ## @AR5K_USEC
	.comm	_AR5K_PHY_RF_CTL2,4,2           ## @AR5K_PHY_RF_CTL2
	.comm	_AR5K_PHY_RF_CTL2_TXF2TXD_START,4,2 ## @AR5K_PHY_RF_CTL2_TXF2TXD_START
	.no_dead_strip	_ath5k_hw_init_core_clock
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function ath5k_hw_init_core_clock
_ath5k_hw_init_core_clock:              ; @ath5k_hw_init_core_clock
	.cfi_startproc
; %bb.0:
	stp	x28, x27, [sp, #-96]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 96
	stp	x26, x25, [sp, #16]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #32]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #48]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #64]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #80]             ; 16-byte Folded Spill
	add	x29, sp, #80
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	mov	x19, x0
	ldr	x20, [x0, #32]
	bl	_ath5k_hw_common
	ldr	w8, [x20]
	mov	w9, #44
	mov	w10, #22
	cmp	w8, #129
	csel	w9, w10, w9, eq
	mov	w10, #40
	cmp	w8, #130
	csel	w8, w10, w9, eq
	ldr	w9, [x19]
	lsr	w10, w8, #2
	lsr	w11, w8, #1
	lsl	w12, w8, #1
	cmp	w9, #132
	csel	w8, w8, w12, ne
	cmp	w9, #133
	csel	w8, w11, w8, eq
	cmp	w9, #131
	csel	w21, w10, w8, eq
	str	w21, [x0]
	sub	w0, w21, #1
Lloh0:
	adrp	x8, _AR5K_USEC_1@GOTPAGE
Lloh1:
	ldr	x8, [x8, _AR5K_USEC_1@GOTPAGEOFF]
Lloh2:
	ldr	w1, [x8]
	bl	_AR5K_REG_SM
	mov	x20, x0
	ldr	x8, [x19, #8]
Lloh3:
	adrp	x27, _AR5K_AR5210@GOTPAGE
Lloh4:
	ldr	x27, [x27, _AR5K_AR5210@GOTPAGEOFF]
	ldr	x9, [x27]
	cmp	x8, x9
	b.eq	LBB0_2
; %bb.1:
Lloh5:
	adrp	x8, _AR5K_DCU_GBL_IFS_MISC@GOTPAGE
Lloh6:
	ldr	x8, [x8, _AR5K_DCU_GBL_IFS_MISC@GOTPAGEOFF]
Lloh7:
	ldr	w1, [x8]
Lloh8:
	adrp	x8, _AR5K_DCU_GBL_IFS_MISC_USEC_DUR@GOTPAGE
Lloh9:
	ldr	x8, [x8, _AR5K_DCU_GBL_IFS_MISC_USEC_DUR@GOTPAGEOFF]
Lloh10:
	ldr	w2, [x8]
	mov	x0, x19
	mov	x3, x21
	bl	_AR5K_REG_WRITE_BITS
LBB0_2:
	ldr	x8, [x19, #16]
Lloh11:
	adrp	x9, _AR5K_RF5112@GOTPAGE
Lloh12:
	ldr	x9, [x9, _AR5K_RF5112@GOTPAGEOFF]
Lloh13:
	ldr	x9, [x9]
Lloh14:
	adrp	x10, _AR5K_RF2413@GOTPAGE
Lloh15:
	ldr	x10, [x10, _AR5K_RF2413@GOTPAGEOFF]
Lloh16:
	ldr	x10, [x10]
Lloh17:
	adrp	x11, _AR5K_RF5413@GOTPAGE
Lloh18:
	ldr	x11, [x11, _AR5K_RF5413@GOTPAGEOFF]
Lloh19:
	ldr	x11, [x11]
Lloh20:
	adrp	x12, _AR5K_RF2316@GOTPAGE
Lloh21:
	ldr	x12, [x12, _AR5K_RF2316@GOTPAGEOFF]
Lloh22:
	ldr	x12, [x12]
Lloh23:
	adrp	x13, _AR5K_RF2317@GOTPAGE
Lloh24:
	ldr	x13, [x13, _AR5K_RF2317@GOTPAGEOFF]
Lloh25:
	ldr	x13, [x13]
	cmp	x8, x13
	ccmp	x8, x12, #4, ne
	ccmp	x8, x11, #4, ne
	ccmp	x8, x10, #4, ne
	ccmp	x8, x9, #4, ne
	mov	w8, #31
	mov	w9, #39
	csel	w0, w9, w8, eq
Lloh26:
	adrp	x8, _AR5K_USEC_32@GOTPAGE
Lloh27:
	ldr	x8, [x8, _AR5K_USEC_32@GOTPAGEOFF]
Lloh28:
	ldr	w1, [x8]
	bl	_AR5K_REG_SM
	mov	x21, x0
Lloh29:
	adrp	x8, _AR5K_USEC_5211@GOTPAGE
Lloh30:
	ldr	x8, [x8, _AR5K_USEC_5211@GOTPAGEOFF]
Lloh31:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_ath5k_hw_reg_read
	mov	x22, x0
Lloh32:
	adrp	x28, _AR5K_USEC_TX_LATENCY_5211@GOTPAGE
Lloh33:
	ldr	x28, [x28, _AR5K_USEC_TX_LATENCY_5211@GOTPAGEOFF]
	ldr	w1, [x28]
	bl	_AR5K_REG_MS
	mov	x24, x0
Lloh34:
	adrp	x26, _AR5K_USEC_RX_LATENCY_5211@GOTPAGE
Lloh35:
	ldr	x26, [x26, _AR5K_USEC_RX_LATENCY_5211@GOTPAGEOFF]
	ldr	w1, [x26]
	mov	x0, x22
	bl	_AR5K_REG_MS
Lloh36:
	adrp	x25, _AR5K_INIT_TXF2TXD_START_DEFAULT@GOTPAGE
Lloh37:
	ldr	x25, [x25, _AR5K_INIT_TXF2TXD_START_DEFAULT@GOTPAGEOFF]
	ldr	w23, [x25]
	ldr	x8, [x19, #8]
	ldr	x9, [x27]
Lloh38:
	adrp	x10, _AR5K_INIT_TX_LATENCY_5210@GOTPAGE
Lloh39:
	ldr	x10, [x10, _AR5K_INIT_TX_LATENCY_5210@GOTPAGEOFF]
Lloh40:
	ldr	w10, [x10]
Lloh41:
	adrp	x11, _AR5K_INIT_RX_LATENCY_5210@GOTPAGE
Lloh42:
	ldr	x11, [x11, _AR5K_INIT_RX_LATENCY_5210@GOTPAGEOFF]
Lloh43:
	ldr	w11, [x11]
	cmp	x8, x9
	csel	w22, w10, w24, eq
	csel	w24, w11, w0, eq
	ldr	x8, [x19, #24]
Lloh44:
	adrp	x9, _AR5K_SREV_AR5211@GOTPAGE
Lloh45:
	ldr	x9, [x9, _AR5K_SREV_AR5211@GOTPAGEOFF]
Lloh46:
	ldr	x9, [x9]
	cmp	x8, x9
	b.ge	LBB0_4
; %bb.3:
Lloh47:
	adrp	x8, _AR5K_USEC_TX_LATENCY_5210@GOTPAGE
Lloh48:
	ldr	x8, [x8, _AR5K_USEC_TX_LATENCY_5210@GOTPAGEOFF]
Lloh49:
	ldr	w1, [x8]
	mov	x0, x22
	bl	_AR5K_REG_SM
	mov	x22, x0
Lloh50:
	adrp	x8, _AR5K_USEC_RX_LATENCY_5210@GOTPAGE
Lloh51:
	ldr	x8, [x8, _AR5K_USEC_RX_LATENCY_5210@GOTPAGEOFF]
Lloh52:
	ldr	w1, [x8]
	mov	x0, x24
	bl	_AR5K_REG_SM
	mov	x24, x0
	b	LBB0_10
LBB0_4:
	ldr	w8, [x19]
	cmp	w8, #131
	b.eq	LBB0_8
; %bb.5:
	cmp	w8, #132
	b.eq	LBB0_9
; %bb.6:
	cmp	w8, #133
	b.ne	LBB0_10
; %bb.7:
	lsl	w0, w22, #1
	ldr	w1, [x28]
	bl	_AR5K_REG_SM
	mov	x22, x0
Lloh53:
	adrp	x8, _AR5K_INIT_RX_LAT_MAX@GOTPAGE
Lloh54:
	ldr	x8, [x8, _AR5K_INIT_RX_LAT_MAX@GOTPAGEOFF]
Lloh55:
	ldr	w0, [x8]
	ldr	w1, [x26]
	bl	_AR5K_REG_SM
	mov	x24, x0
Lloh56:
	adrp	x8, _AR5K_INIT_TXF2TXD_START_DELAY_10MHZ@GOTPAGE
Lloh57:
	ldr	x8, [x8, _AR5K_INIT_TXF2TXD_START_DELAY_10MHZ@GOTPAGEOFF]
Lloh58:
	ldr	w23, [x8]
	b	LBB0_10
LBB0_8:
	lsl	w0, w22, #2
	ldr	w1, [x28]
	bl	_AR5K_REG_SM
	mov	x22, x0
Lloh59:
	adrp	x8, _AR5K_INIT_RX_LAT_MAX@GOTPAGE
Lloh60:
	ldr	x8, [x8, _AR5K_INIT_RX_LAT_MAX@GOTPAGEOFF]
Lloh61:
	ldr	w0, [x8]
	ldr	w1, [x26]
	bl	_AR5K_REG_SM
	mov	x24, x0
Lloh62:
	adrp	x8, _AR5K_INIT_TXF2TXD_START_DELAY_5MHZ@GOTPAGE
Lloh63:
	ldr	x8, [x8, _AR5K_INIT_TXF2TXD_START_DELAY_5MHZ@GOTPAGEOFF]
Lloh64:
	ldr	w23, [x8]
	b	LBB0_10
LBB0_9:
Lloh65:
	adrp	x8, _AR5K_INIT_TX_LAT_MIN@GOTPAGE
Lloh66:
	ldr	x8, [x8, _AR5K_INIT_TX_LAT_MIN@GOTPAGEOFF]
Lloh67:
	ldr	w22, [x8]
	cmp	w24, #0
	cinc	w8, w24, lt
	asr	w0, w8, #1
	ldr	w1, [x26]
	bl	_AR5K_REG_SM
	mov	x24, x0
	ldr	w23, [x25]
LBB0_10:
	orr	w8, w21, w20
	orr	w8, w8, w22
	orr	w1, w8, w24
Lloh68:
	adrp	x8, _AR5K_USEC@GOTPAGE
Lloh69:
	ldr	x8, [x8, _AR5K_USEC@GOTPAGEOFF]
Lloh70:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_ath5k_hw_reg_write
	ldr	x8, [x19, #16]
Lloh71:
	adrp	x9, _AR5K_RF5112@GOTPAGE
Lloh72:
	ldr	x9, [x9, _AR5K_RF5112@GOTPAGEOFF]
Lloh73:
	ldr	x9, [x9]
	cmp	x8, x9
	b.ne	LBB0_12
; %bb.11:
Lloh74:
	adrp	x8, _AR5K_PHY_RF_CTL2@GOTPAGE
Lloh75:
	ldr	x8, [x8, _AR5K_PHY_RF_CTL2@GOTPAGEOFF]
Lloh76:
	adrp	x9, _AR5K_PHY_RF_CTL2_TXF2TXD_START@GOTPAGE
Lloh77:
	ldr	x9, [x9, _AR5K_PHY_RF_CTL2_TXF2TXD_START@GOTPAGEOFF]
Lloh78:
	ldr	w1, [x8]
Lloh79:
	ldr	w2, [x9]
	mov	x0, x19
	mov	x3, x23
	ldp	x29, x30, [sp, #80]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #64]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #48]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #32]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #16]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp], #96             ; 16-byte Folded Reload
	b	_AR5K_REG_WRITE_BITS
LBB0_12:
	ldp	x29, x30, [sp, #80]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #64]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #48]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #32]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #16]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp], #96             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGot	Lloh3, Lloh4
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh44, Lloh45, Lloh46
	.loh AdrpLdrGotLdr	Lloh41, Lloh42, Lloh43
	.loh AdrpLdrGotLdr	Lloh38, Lloh39, Lloh40
	.loh AdrpLdrGot	Lloh36, Lloh37
	.loh AdrpLdrGot	Lloh34, Lloh35
	.loh AdrpLdrGot	Lloh32, Lloh33
	.loh AdrpLdrGotLdr	Lloh29, Lloh30, Lloh31
	.loh AdrpLdrGotLdr	Lloh26, Lloh27, Lloh28
	.loh AdrpLdrGotLdr	Lloh23, Lloh24, Lloh25
	.loh AdrpLdrGotLdr	Lloh20, Lloh21, Lloh22
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh19
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh16
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh50, Lloh51, Lloh52
	.loh AdrpLdrGotLdr	Lloh47, Lloh48, Lloh49
	.loh AdrpLdrGotLdr	Lloh56, Lloh57, Lloh58
	.loh AdrpLdrGotLdr	Lloh53, Lloh54, Lloh55
	.loh AdrpLdrGotLdr	Lloh62, Lloh63, Lloh64
	.loh AdrpLdrGotLdr	Lloh59, Lloh60, Lloh61
	.loh AdrpLdrGotLdr	Lloh65, Lloh66, Lloh67
	.loh AdrpLdrGotLdr	Lloh71, Lloh72, Lloh73
	.loh AdrpLdrGotLdr	Lloh68, Lloh69, Lloh70
	.loh AdrpLdrGotLdr	Lloh76, Lloh77, Lloh79
	.loh AdrpLdrGotLdr	Lloh74, Lloh75, Lloh78
	.cfi_endproc
                                        ; -- End function
	.comm	_AR5K_USEC_1,4,2                ; @AR5K_USEC_1
	.comm	_AR5K_AR5210,8,3                ; @AR5K_AR5210
	.comm	_AR5K_DCU_GBL_IFS_MISC,4,2      ; @AR5K_DCU_GBL_IFS_MISC
	.comm	_AR5K_DCU_GBL_IFS_MISC_USEC_DUR,4,2 ; @AR5K_DCU_GBL_IFS_MISC_USEC_DUR
	.comm	_AR5K_RF5112,8,3                ; @AR5K_RF5112
	.comm	_AR5K_RF2413,8,3                ; @AR5K_RF2413
	.comm	_AR5K_RF5413,8,3                ; @AR5K_RF5413
	.comm	_AR5K_RF2316,8,3                ; @AR5K_RF2316
	.comm	_AR5K_RF2317,8,3                ; @AR5K_RF2317
	.comm	_AR5K_USEC_32,4,2               ; @AR5K_USEC_32
	.comm	_AR5K_USEC_5211,4,2             ; @AR5K_USEC_5211
	.comm	_AR5K_USEC_TX_LATENCY_5211,4,2  ; @AR5K_USEC_TX_LATENCY_5211
	.comm	_AR5K_USEC_RX_LATENCY_5211,4,2  ; @AR5K_USEC_RX_LATENCY_5211
	.comm	_AR5K_INIT_TXF2TXD_START_DEFAULT,4,2 ; @AR5K_INIT_TXF2TXD_START_DEFAULT
	.comm	_AR5K_INIT_TX_LATENCY_5210,4,2  ; @AR5K_INIT_TX_LATENCY_5210
	.comm	_AR5K_INIT_RX_LATENCY_5210,4,2  ; @AR5K_INIT_RX_LATENCY_5210
	.comm	_AR5K_SREV_AR5211,8,3           ; @AR5K_SREV_AR5211
	.comm	_AR5K_USEC_TX_LATENCY_5210,4,2  ; @AR5K_USEC_TX_LATENCY_5210
	.comm	_AR5K_USEC_RX_LATENCY_5210,4,2  ; @AR5K_USEC_RX_LATENCY_5210
	.comm	_AR5K_INIT_RX_LAT_MAX,4,2       ; @AR5K_INIT_RX_LAT_MAX
	.comm	_AR5K_INIT_TXF2TXD_START_DELAY_10MHZ,4,2 ; @AR5K_INIT_TXF2TXD_START_DELAY_10MHZ
	.comm	_AR5K_INIT_TXF2TXD_START_DELAY_5MHZ,4,2 ; @AR5K_INIT_TXF2TXD_START_DELAY_5MHZ
	.comm	_AR5K_INIT_TX_LAT_MIN,4,2       ; @AR5K_INIT_TX_LAT_MIN
	.comm	_AR5K_USEC,4,2                  ; @AR5K_USEC
	.comm	_AR5K_PHY_RF_CTL2,4,2           ; @AR5K_PHY_RF_CTL2
	.comm	_AR5K_PHY_RF_CTL2_TXF2TXD_START,4,2 ; @AR5K_PHY_RF_CTL2_TXF2TXD_START
	.no_dead_strip	_ath5k_hw_init_core_clock
.subsections_via_symbols
