	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.section	__TEXT,__literal16,16byte_literals
	.p2align	4                               ## -- Begin function mlx4_QUERY_DEV_CAP_wrapper
LCPI0_0:
	.space	4
	.long	4294967295                      ## 0xffffffff
	.long	4294967295                      ## 0xffffffff
	.long	4294967295                      ## 0xffffffff
LCPI0_1:
	.long	0                               ## 0x0
	.long	1                               ## 0x1
	.long	2                               ## 0x2
	.long	3                               ## 0x3
LCPI0_2:
	.long	4                               ## 0x4
	.long	4                               ## 0x4
	.long	4                               ## 0x4
	.long	4                               ## 0x4
LCPI0_3:
	.long	1065353216                      ## 0x3f800000
	.long	1065353216                      ## 0x3f800000
	.long	1065353216                      ## 0x3f800000
	.long	1065353216                      ## 0x3f800000
LCPI0_4:
	.long	8                               ## 0x8
	.long	8                               ## 0x8
	.long	8                               ## 0x8
	.long	8                               ## 0x8
LCPI0_5:
	.long	12                              ## 0xc
	.long	12                              ## 0xc
	.long	12                              ## 0xc
	.long	12                              ## 0xc
LCPI0_6:
	.long	16                              ## 0x10
	.long	16                              ## 0x10
	.long	16                              ## 0x10
	.long	16                              ## 0x10
	.section	__TEXT,__text,regular,pure_instructions
	.globl	_mlx4_QUERY_DEV_CAP_wrapper
	.p2align	4, 0x90
_mlx4_QUERY_DEV_CAP_wrapper:            ## @mlx4_QUERY_DEV_CAP_wrapper
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$24, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%r8, %r15
	movl	%esi, -56(%rbp)                 ## 4-byte Spill
	movq	%rdi, %r14
	movl	4(%r8), %edx
	movq	_MLX4_CMD_QUERY_DEV_CAP@GOTPCREL(%rip), %rax
	movl	(%rax), %r9d
	movq	_MLX4_CMD_TIME_CLASS_A@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movq	_MLX4_CMD_NATIVE@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ebx
	xorl	%r13d, %r13d
	xorl	%esi, %esi
	xorl	%ecx, %ecx
	xorl	%r8d, %r8d
	pushq	%rbx
	pushq	%rax
	callq	_mlx4_cmd_box
	addq	$16, %rsp
	movl	%eax, %r12d
	testl	%eax, %eax
	jne	LBB0_19
## %bb.1:
	movl	(%r15), %edi
	callq	_disable_unsupported_roce_caps
	movq	%r15, -64(%rbp)                 ## 8-byte Spill
	movl	(%r15), %esi
	movq	_QUERY_DEV_CAP_EXT_FLAGS_OFFSET@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	callq	_MLX4_GET
	movq	_MLX4_DEV_CAP_FLAG_MEM_WINDOW@GOTPCREL(%rip), %rax
	movl	(%rax), %r12d
	notl	%r12d
	movq	%r14, %rdi
	movl	-56(%rbp), %esi                 ## 4-byte Reload
	callq	_mlx4_get_active_ports
	movl	%eax, %r15d
	movl	(%r14), %esi
	movl	%eax, %edi
	callq	_find_first_bit
	movl	%eax, %ebx
	movq	%r14, -56(%rbp)                 ## 8-byte Spill
	movl	(%r14), %esi
	movl	%r15d, -44(%rbp)                ## 4-byte Spill
	movl	%r15d, %edi
	callq	_bitmap_weight
	testl	%eax, %eax
	jle	LBB0_2
## %bb.20:
	xorl	%r14d, %r14d
	.p2align	4, 0x90
LBB0_21:                                ## =>This Inner Loop Header: Depth=1
	leal	(%rbx,%r14), %ecx
	movq	_MLX4_DEV_CAP_FLAG_WOL_PORT1@GOTPCREL(%rip), %rax
	movl	(%rax), %r15d
	movl	%r15d, %eax
                                        ## kill: def $cl killed $cl killed $ecx
	shll	%cl, %eax
	movl	%r14d, %ecx
	shll	%cl, %r15d
	movl	%r15d, %ecx
	orl	%r12d, %ecx
	notl	%r15d
	andl	%r12d, %r15d
	testl	%r12d, %eax
	cmovnel	%ecx, %r15d
	leal	1(%r14), %r13d
	movq	-56(%rbp), %rax                 ## 8-byte Reload
	movl	(%rax), %esi
	movl	-44(%rbp), %edi                 ## 4-byte Reload
	callq	_bitmap_weight
	addl	%ebx, %eax
	leal	(%rbx,%r14), %ecx
	incl	%ecx
	movl	%r15d, %r12d
	movl	%r13d, %r14d
	cmpl	%eax, %ecx
	jl	LBB0_21
	jmp	LBB0_3
LBB0_2:
	movl	%r12d, %r15d
LBB0_3:
	movq	-56(%rbp), %r12                 ## 8-byte Reload
	movl	(%r12), %eax
	movl	%eax, %ecx
	subl	%r13d, %ecx
	jle	LBB0_4
## %bb.5:
	movq	_MLX4_DEV_CAP_FLAG_WOL_PORT1@GOTPCREL(%rip), %rdx
	movl	(%rdx), %edx
	cmpl	$8, %ecx
	jae	LBB0_7
## %bb.6:
	movl	-44(%rbp), %ebx                 ## 4-byte Reload
	movq	_QUERY_DEV_CAP_EXT_FLAGS_OFFSET@GOTPCREL(%rip), %r8
	jmp	LBB0_15
LBB0_4:
	movl	-44(%rbp), %ebx                 ## 4-byte Reload
	movq	_QUERY_DEV_CAP_EXT_FLAGS_OFFSET@GOTPCREL(%rip), %r8
	jmp	LBB0_16
LBB0_7:
	movl	%ecx, %esi
	andl	$-8, %esi
	movdqa	LCPI0_0(%rip), %xmm2            ## xmm2 = <u,4294967295,4294967295,4294967295>
	pinsrd	$0, %r15d, %xmm2
	movd	%r13d, %xmm0
	pshufd	$0, %xmm0, %xmm4                ## xmm4 = xmm0[0,0,0,0]
	paddd	LCPI0_1(%rip), %xmm4
	movd	%edx, %xmm0
	pshufd	$0, %xmm0, %xmm0                ## xmm0 = xmm0[0,0,0,0]
	leal	-8(%rsi), %edi
	movl	%edi, %ebx
	shrl	$3, %ebx
	incl	%ebx
	testl	%edi, %edi
	movq	_QUERY_DEV_CAP_EXT_FLAGS_OFFSET@GOTPCREL(%rip), %r8
	je	LBB0_8
## %bb.9:
	movl	%ebx, %edi
	andl	$-2, %edi
	pcmpeqd	%xmm5, %xmm5
	movdqa	LCPI0_2(%rip), %xmm8            ## xmm8 = [4,4,4,4]
	movdqa	LCPI0_3(%rip), %xmm12           ## xmm12 = [1065353216,1065353216,1065353216,1065353216]
	movdqa	LCPI0_4(%rip), %xmm9            ## xmm9 = [8,8,8,8]
	movdqa	LCPI0_5(%rip), %xmm10           ## xmm10 = [12,12,12,12]
	movdqa	LCPI0_6(%rip), %xmm11           ## xmm11 = [16,16,16,16]
	movdqa	%xmm2, %xmm7
	.p2align	4, 0x90
LBB0_10:                                ## =>This Inner Loop Header: Depth=1
	movdqa	%xmm4, %xmm2
	paddd	%xmm8, %xmm2
	movdqa	%xmm4, %xmm6
	pslld	$23, %xmm6
	paddd	%xmm12, %xmm6
	cvttps2dq	%xmm6, %xmm6
	pmulld	%xmm0, %xmm6
	pslld	$23, %xmm2
	paddd	%xmm12, %xmm2
	cvttps2dq	%xmm2, %xmm3
	pmulld	%xmm0, %xmm3
	movdqa	%xmm4, %xmm2
	paddd	%xmm9, %xmm2
	movdqa	%xmm4, %xmm1
	paddd	%xmm10, %xmm1
	pslld	$23, %xmm2
	paddd	%xmm12, %xmm2
	cvttps2dq	%xmm2, %xmm2
	pmulld	%xmm0, %xmm2
	por	%xmm6, %xmm2
	pandn	%xmm7, %xmm2
	pslld	$23, %xmm1
	paddd	%xmm12, %xmm1
	cvttps2dq	%xmm1, %xmm6
	pmulld	%xmm0, %xmm6
	por	%xmm3, %xmm6
	pandn	%xmm5, %xmm6
	paddd	%xmm11, %xmm4
	movdqa	%xmm2, %xmm7
	movdqa	%xmm6, %xmm5
	addl	$-2, %edi
	jne	LBB0_10
## %bb.11:
	testb	$1, %bl
	je	LBB0_13
LBB0_12:
	movdqa	LCPI0_2(%rip), %xmm1            ## xmm1 = [4,4,4,4]
	paddd	%xmm4, %xmm1
	pslld	$23, %xmm4
	movdqa	LCPI0_3(%rip), %xmm3            ## xmm3 = [1065353216,1065353216,1065353216,1065353216]
	paddd	%xmm3, %xmm4
	cvttps2dq	%xmm4, %xmm4
	pmulld	%xmm0, %xmm4
	pandn	%xmm2, %xmm4
	pslld	$23, %xmm1
	paddd	%xmm3, %xmm1
	cvttps2dq	%xmm1, %xmm1
	pmulld	%xmm0, %xmm1
	pandn	%xmm6, %xmm1
	movdqa	%xmm4, %xmm2
	movdqa	%xmm1, %xmm6
LBB0_13:
	pand	%xmm6, %xmm2
	pshufd	$238, %xmm2, %xmm0              ## xmm0 = xmm2[2,3,2,3]
	pand	%xmm2, %xmm0
	pshufd	$85, %xmm0, %xmm1               ## xmm1 = xmm0[1,1,1,1]
	pand	%xmm0, %xmm1
	movd	%xmm1, %r15d
	cmpl	%esi, %ecx
	movl	-44(%rbp), %ebx                 ## 4-byte Reload
	je	LBB0_16
## %bb.14:
	addl	%esi, %r13d
	.p2align	4, 0x90
LBB0_15:                                ## =>This Inner Loop Header: Depth=1
	movl	%edx, %esi
	movl	%r13d, %ecx
	shll	%cl, %esi
	notl	%esi
	andl	%esi, %r15d
	incl	%r13d
	cmpl	%r13d, %eax
	jne	LBB0_15
LBB0_16:
	movq	_MLX4_DEV_CAP_FLAG_RSS_IP_FRAG@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	notl	%esi
	andl	%r15d, %esi
	movq	-64(%rbp), %r15                 ## 8-byte Reload
	movl	(%r15), %edi
	movl	(%r8), %edx
	callq	_MLX4_PUT
	movl	(%r15), %esi
	movq	_QUERY_DEV_CAP_VL_PORT_OFFSET@GOTPCREL(%rip), %r14
	movl	(%r14), %edx
	callq	_MLX4_GET
	movl	(%r12), %esi
	movl	%ebx, %edi
	callq	_bitmap_weight
	movl	%eax, %r13d
	movl	%eax, %ebx
	andl	$15, %ebx
	movl	(%r15), %edi
	movl	(%r14), %edx
	movl	%ebx, %esi
	callq	_MLX4_PUT
	movl	(%r15), %esi
	movq	_QUERY_DEV_CAP_CQ_TS_SUPPORT_OFFSET@GOTPCREL(%rip), %r14
	movl	(%r14), %edx
	movl	%ebx, %edi
	callq	_MLX4_GET
	movl	(%r15), %edi
	movl	(%r14), %edx
	movl	%ebx, %esi
	callq	_MLX4_PUT
	movl	(%r15), %esi
	movq	_QUERY_DEV_CAP_VXLAN@GOTPCREL(%rip), %r14
	movl	(%r14), %edx
	movl	%ebx, %edi
	callq	_MLX4_GET
	movl	%r13d, %ebx
	andl	$7, %ebx
	movl	(%r15), %edi
	movl	(%r14), %edx
	movl	%ebx, %esi
	callq	_MLX4_PUT
	movl	(%r15), %esi
	movq	_QUERY_DEV_CAP_PORT_BEACON_OFFSET@GOTPCREL(%rip), %r14
	movl	(%r14), %edx
	movl	%ebx, %edi
	callq	_MLX4_GET
	movl	(%r15), %edi
	movl	(%r14), %edx
	movl	%ebx, %esi
	callq	_MLX4_PUT
	movl	(%r15), %esi
	movq	_QUERY_DEV_CAP_BF_OFFSET@GOTPCREL(%rip), %r14
	movl	(%r14), %edx
	movl	%ebx, %edi
	callq	_MLX4_GET
	movl	(%r15), %edi
	movl	(%r14), %edx
	movl	%ebx, %esi
	callq	_MLX4_PUT
	movl	(%r15), %esi
	movq	_QUERY_DEV_CAP_BMME_FLAGS_OFFSET@GOTPCREL(%rip), %r14
	movl	(%r14), %edx
	callq	_MLX4_GET
	movl	(%r15), %edi
	movl	(%r14), %edx
	movq	%r12, %r14
	xorl	%r12d, %r12d
	xorl	%esi, %esi
	callq	_MLX4_PUT
	movq	8(%r14), %rax
	movq	_MLX4_STEERING_MODE_DEVICE_MANAGED@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	je	LBB0_18
## %bb.17:
	movl	(%r15), %esi
	movq	_QUERY_DEV_CAP_FLOW_STEERING_RANGE_EN_OFFSET@GOTPCREL(%rip), %r14
	movl	(%r14), %edx
	movl	%ebx, %edi
	callq	_MLX4_GET
	movl	(%r15), %edi
	movl	(%r14), %edx
	movl	%ebx, %esi
	callq	_MLX4_PUT
LBB0_18:
	movl	(%r15), %esi
	movq	_QUERY_DEV_CAP_FLOW_STEERING_IPOIB_OFFSET@GOTPCREL(%rip), %r14
	movl	(%r14), %edx
	movl	%ebx, %edi
	callq	_MLX4_GET
	movl	(%r15), %edi
	movl	(%r14), %edx
	movl	%ebx, %esi
	callq	_MLX4_PUT
	movl	(%r15), %esi
	movq	_QUERY_DEV_CAP_EXT_2_FLAGS_OFFSET@GOTPCREL(%rip), %r14
	movl	(%r14), %edx
	callq	_MLX4_GET
	movl	(%r15), %edi
	movl	(%r14), %edx
	xorl	%esi, %esi
	callq	_MLX4_PUT
	movl	(%r15), %esi
	movq	_QUERY_DEV_CAP_ECN_QCN_VER_OFFSET@GOTPCREL(%rip), %r14
	movl	(%r14), %edx
	movl	%ebx, %edi
	callq	_MLX4_GET
	movl	%r13d, %ebx
	andl	$6, %ebx
	movl	(%r15), %edi
	movl	(%r14), %edx
	movl	%ebx, %esi
	callq	_MLX4_PUT
	movl	(%r15), %edi
	movq	_QUERY_DEV_CAP_QP_RATE_LIMIT_NUM_OFFSET@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	xorl	%esi, %esi
	callq	_MLX4_PUT
	movl	(%r15), %esi
	movq	_QUERY_DEV_CAP_CQ_EQ_CACHE_LINE_STRIDE@GOTPCREL(%rip), %r14
	movl	(%r14), %edx
	movl	%ebx, %edi
	callq	_MLX4_GET
	movl	(%r15), %edi
	movl	(%r14), %edx
	movl	%ebx, %esi
	callq	_MLX4_PUT
	movl	(%r15), %esi
	movq	_QUERY_DEV_CAP_CONFIG_DEV_OFFSET@GOTPCREL(%rip), %r14
	movl	(%r14), %edx
	movl	%ebx, %edi
	callq	_MLX4_GET
	andl	$2, %r13d
	movl	(%r15), %edi
	movl	(%r14), %edx
	movl	%r13d, %esi
	callq	_MLX4_PUT
LBB0_19:
	movl	%r12d, %eax
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_8:
	pcmpeqd	%xmm6, %xmm6
	testb	$1, %bl
	jne	LBB0_12
	jmp	LBB0_13
	.cfi_endproc
                                        ## -- End function
	.comm	_MLX4_CMD_QUERY_DEV_CAP,4,2     ## @MLX4_CMD_QUERY_DEV_CAP
	.comm	_MLX4_CMD_TIME_CLASS_A,4,2      ## @MLX4_CMD_TIME_CLASS_A
	.comm	_MLX4_CMD_NATIVE,4,2            ## @MLX4_CMD_NATIVE
	.comm	_QUERY_DEV_CAP_EXT_FLAGS_OFFSET,4,2 ## @QUERY_DEV_CAP_EXT_FLAGS_OFFSET
	.comm	_MLX4_DEV_CAP_FLAG_PORT_MNG_CHG_EV,4,2 ## @MLX4_DEV_CAP_FLAG_PORT_MNG_CHG_EV
	.comm	_MLX4_DEV_CAP_FLAG_MEM_WINDOW,4,2 ## @MLX4_DEV_CAP_FLAG_MEM_WINDOW
	.comm	_MLX4_DEV_CAP_FLAG_WOL_PORT1,4,2 ## @MLX4_DEV_CAP_FLAG_WOL_PORT1
	.comm	_MLX4_DEV_CAP_FLAG_RSS_IP_FRAG,4,2 ## @MLX4_DEV_CAP_FLAG_RSS_IP_FRAG
	.comm	_QUERY_DEV_CAP_VL_PORT_OFFSET,4,2 ## @QUERY_DEV_CAP_VL_PORT_OFFSET
	.comm	_QUERY_DEV_CAP_CQ_TS_SUPPORT_OFFSET,4,2 ## @QUERY_DEV_CAP_CQ_TS_SUPPORT_OFFSET
	.comm	_QUERY_DEV_CAP_VXLAN,4,2        ## @QUERY_DEV_CAP_VXLAN
	.comm	_QUERY_DEV_CAP_PORT_BEACON_OFFSET,4,2 ## @QUERY_DEV_CAP_PORT_BEACON_OFFSET
	.comm	_QUERY_DEV_CAP_BF_OFFSET,4,2    ## @QUERY_DEV_CAP_BF_OFFSET
	.comm	_QUERY_DEV_CAP_BMME_FLAGS_OFFSET,4,2 ## @QUERY_DEV_CAP_BMME_FLAGS_OFFSET
	.comm	_MLX4_BMME_FLAG_TYPE_2_WIN,4,2  ## @MLX4_BMME_FLAG_TYPE_2_WIN
	.comm	_MLX4_FLAG_PORT_REMAP,4,2       ## @MLX4_FLAG_PORT_REMAP
	.comm	_MLX4_STEERING_MODE_DEVICE_MANAGED,8,3 ## @MLX4_STEERING_MODE_DEVICE_MANAGED
	.comm	_QUERY_DEV_CAP_FLOW_STEERING_RANGE_EN_OFFSET,4,2 ## @QUERY_DEV_CAP_FLOW_STEERING_RANGE_EN_OFFSET
	.comm	_QUERY_DEV_CAP_FLOW_STEERING_IPOIB_OFFSET,4,2 ## @QUERY_DEV_CAP_FLOW_STEERING_IPOIB_OFFSET
	.comm	_QUERY_DEV_CAP_EXT_2_FLAGS_OFFSET,4,2 ## @QUERY_DEV_CAP_EXT_2_FLAGS_OFFSET
	.comm	_DEV_CAP_EXT_2_FLAG_VLAN_CONTROL,4,2 ## @DEV_CAP_EXT_2_FLAG_VLAN_CONTROL
	.comm	_DEV_CAP_EXT_2_FLAG_80_VFS,4,2  ## @DEV_CAP_EXT_2_FLAG_80_VFS
	.comm	_DEV_CAP_EXT_2_FLAG_FSM,4,2     ## @DEV_CAP_EXT_2_FLAG_FSM
	.comm	_DEV_CAP_EXT_2_FLAG_PFC_COUNTERS,4,2 ## @DEV_CAP_EXT_2_FLAG_PFC_COUNTERS
	.comm	_QUERY_DEV_CAP_ECN_QCN_VER_OFFSET,4,2 ## @QUERY_DEV_CAP_ECN_QCN_VER_OFFSET
	.comm	_QUERY_DEV_CAP_QP_RATE_LIMIT_NUM_OFFSET,4,2 ## @QUERY_DEV_CAP_QP_RATE_LIMIT_NUM_OFFSET
	.comm	_QUERY_DEV_CAP_CQ_EQ_CACHE_LINE_STRIDE,4,2 ## @QUERY_DEV_CAP_CQ_EQ_CACHE_LINE_STRIDE
	.comm	_QUERY_DEV_CAP_CONFIG_DEV_OFFSET,4,2 ## @QUERY_DEV_CAP_CONFIG_DEV_OFFSET
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.section	__TEXT,__literal16,16byte_literals
	.p2align	4                               ; -- Begin function mlx4_QUERY_DEV_CAP_wrapper
lCPI0_0:
	.long	0                               ; 0x0
	.long	1                               ; 0x1
	.long	2                               ; 0x2
	.long	3                               ; 0x3
	.section	__TEXT,__text,regular,pure_instructions
	.globl	_mlx4_QUERY_DEV_CAP_wrapper
	.p2align	2
_mlx4_QUERY_DEV_CAP_wrapper:            ; @mlx4_QUERY_DEV_CAP_wrapper
	.cfi_startproc
; %bb.0:
	stp	x26, x25, [sp, #-80]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	mov	x19, x4
	mov	x21, x1
	mov	x20, x0
	ldr	w2, [x4, #4]
Lloh0:
	adrp	x8, _MLX4_CMD_QUERY_DEV_CAP@GOTPAGE
Lloh1:
	ldr	x8, [x8, _MLX4_CMD_QUERY_DEV_CAP@GOTPAGEOFF]
Lloh2:
	ldr	w5, [x8]
Lloh3:
	adrp	x8, _MLX4_CMD_TIME_CLASS_A@GOTPAGE
Lloh4:
	ldr	x8, [x8, _MLX4_CMD_TIME_CLASS_A@GOTPAGEOFF]
Lloh5:
	ldr	w6, [x8]
Lloh6:
	adrp	x8, _MLX4_CMD_NATIVE@GOTPAGE
Lloh7:
	ldr	x8, [x8, _MLX4_CMD_NATIVE@GOTPAGEOFF]
Lloh8:
	ldr	w7, [x8]
	mov	w1, #0
	mov	w3, #0
	mov	w4, #0
	bl	_mlx4_cmd_box
	cbnz	w0, LBB0_15
; %bb.1:
	ldr	w0, [x19]
	bl	_disable_unsupported_roce_caps
	ldr	w1, [x19]
Lloh9:
	adrp	x23, _QUERY_DEV_CAP_EXT_FLAGS_OFFSET@GOTPAGE
Lloh10:
	ldr	x23, [x23, _QUERY_DEV_CAP_EXT_FLAGS_OFFSET@GOTPAGEOFF]
	ldr	w2, [x23]
	bl	_MLX4_GET
Lloh11:
	adrp	x8, _MLX4_DEV_CAP_FLAG_MEM_WINDOW@GOTPAGE
Lloh12:
	ldr	x8, [x8, _MLX4_DEV_CAP_FLAG_MEM_WINDOW@GOTPAGEOFF]
Lloh13:
	ldr	w8, [x8]
	mvn	w24, w8
	mov	x0, x20
	mov	x1, x21
	bl	_mlx4_get_active_ports
	mov	x21, x0
	ldr	w1, [x20]
	bl	_find_first_bit
	mov	x22, x0
	ldr	w1, [x20]
	mov	x0, x21
	bl	_bitmap_weight
Lloh14:
	adrp	x26, _MLX4_DEV_CAP_FLAG_WOL_PORT1@GOTPAGE
Lloh15:
	ldr	x26, [x26, _MLX4_DEV_CAP_FLAG_WOL_PORT1@GOTPAGEOFF]
	cmp	w0, #1
	b.lt	LBB0_4
; %bb.2:
	mov	w25, #0
LBB0_3:                                 ; =>This Inner Loop Header: Depth=1
	add	w8, w22, w25
	ldr	w9, [x26]
	lsl	w8, w9, w8
	lsl	w9, w9, w25
	orr	w10, w9, w24
	bic	w9, w24, w9
	tst	w8, w24
	csel	w24, w9, w10, eq
	add	w25, w25, #1
	ldr	w1, [x20]
	mov	x0, x21
	bl	_bitmap_weight
	add	w8, w0, w22
	add	w9, w22, w25
	cmp	w9, w8
	b.lt	LBB0_3
	b	LBB0_5
LBB0_4:
	mov	w25, #0
LBB0_5:
	ldr	w8, [x20]
	subs	w11, w8, w25
	b.le	LBB0_12
; %bb.6:
	ldr	w9, [x26]
	cmp	w11, #16
	b.hs	LBB0_8
; %bb.7:
	mov	x10, x25
	b	LBB0_11
LBB0_8:
	movi.2d	v0, #0xffffffffffffffff
	movi.2d	v1, #0xffffffffffffffff
	mov.s	v1[0], w24
	dup.4s	v2, w25
Lloh16:
	adrp	x10, lCPI0_0@PAGE
Lloh17:
	ldr	q3, [x10, lCPI0_0@PAGEOFF]
	add.4s	v2, v2, v3
	dup.4s	v3, w9
	and	w12, w11, #0xfffffff0
	add	w10, w25, w12
	movi.4s	v4, #4
	movi.4s	v5, #8
	movi.4s	v6, #12
	movi.4s	v7, #16
	mov	x13, x12
	movi.2d	v16, #0xffffffffffffffff
	movi.2d	v17, #0xffffffffffffffff
LBB0_9:                                 ; =>This Inner Loop Header: Depth=1
	add.4s	v18, v2, v4
	add.4s	v19, v2, v5
	add.4s	v20, v2, v6
	ushl.4s	v21, v3, v2
	ushl.4s	v18, v3, v18
	ushl.4s	v19, v3, v19
	ushl.4s	v20, v3, v20
	bic.16b	v1, v1, v21
	bic.16b	v0, v0, v18
	bic.16b	v16, v16, v19
	bic.16b	v17, v17, v20
	add.4s	v2, v2, v7
	subs	w13, w13, #16
	b.ne	LBB0_9
; %bb.10:
	and.16b	v0, v0, v1
	and.16b	v0, v16, v0
	and.16b	v0, v17, v0
	ext.16b	v1, v0, v0, #8
	and.8b	v0, v0, v1
	fmov	w13, s0
	mov.s	w14, v0[1]
	and	w24, w13, w14
	cmp	w11, w12
	b.eq	LBB0_12
LBB0_11:                                ; =>This Inner Loop Header: Depth=1
	lsl	w11, w9, w10
	bic	w24, w24, w11
	add	w10, w10, #1
	cmp	w8, w10
	b.ne	LBB0_11
LBB0_12:
Lloh18:
	adrp	x8, _MLX4_DEV_CAP_FLAG_RSS_IP_FRAG@GOTPAGE
Lloh19:
	ldr	x8, [x8, _MLX4_DEV_CAP_FLAG_RSS_IP_FRAG@GOTPAGEOFF]
Lloh20:
	ldr	w8, [x8]
	bic	w1, w24, w8
	ldr	w0, [x19]
	ldr	w2, [x23]
	bl	_MLX4_PUT
	ldr	w1, [x19]
Lloh21:
	adrp	x23, _QUERY_DEV_CAP_VL_PORT_OFFSET@GOTPAGE
Lloh22:
	ldr	x23, [x23, _QUERY_DEV_CAP_VL_PORT_OFFSET@GOTPAGEOFF]
	ldr	w2, [x23]
	bl	_MLX4_GET
	ldr	w1, [x20]
	mov	x0, x21
	bl	_bitmap_weight
	mov	x21, x0
	and	w22, w0, #0xf
	ldr	w0, [x19]
	ldr	w2, [x23]
	mov	x1, x22
	bl	_MLX4_PUT
	ldr	w1, [x19]
Lloh23:
	adrp	x23, _QUERY_DEV_CAP_CQ_TS_SUPPORT_OFFSET@GOTPAGE
Lloh24:
	ldr	x23, [x23, _QUERY_DEV_CAP_CQ_TS_SUPPORT_OFFSET@GOTPAGEOFF]
	ldr	w2, [x23]
	mov	x0, x22
	bl	_MLX4_GET
	ldr	w0, [x19]
	ldr	w2, [x23]
	mov	x1, x22
	bl	_MLX4_PUT
	ldr	w1, [x19]
Lloh25:
	adrp	x23, _QUERY_DEV_CAP_VXLAN@GOTPAGE
Lloh26:
	ldr	x23, [x23, _QUERY_DEV_CAP_VXLAN@GOTPAGEOFF]
	ldr	w2, [x23]
	mov	x0, x22
	bl	_MLX4_GET
	and	w22, w21, #0x7
	ldr	w0, [x19]
	ldr	w2, [x23]
	mov	x1, x22
	bl	_MLX4_PUT
	ldr	w1, [x19]
Lloh27:
	adrp	x23, _QUERY_DEV_CAP_PORT_BEACON_OFFSET@GOTPAGE
Lloh28:
	ldr	x23, [x23, _QUERY_DEV_CAP_PORT_BEACON_OFFSET@GOTPAGEOFF]
	ldr	w2, [x23]
	mov	x0, x22
	bl	_MLX4_GET
	ldr	w0, [x19]
	ldr	w2, [x23]
	mov	x1, x22
	bl	_MLX4_PUT
	ldr	w1, [x19]
Lloh29:
	adrp	x23, _QUERY_DEV_CAP_BF_OFFSET@GOTPAGE
Lloh30:
	ldr	x23, [x23, _QUERY_DEV_CAP_BF_OFFSET@GOTPAGEOFF]
	ldr	w2, [x23]
	mov	x0, x22
	bl	_MLX4_GET
	ldr	w0, [x19]
	ldr	w2, [x23]
	mov	x1, x22
	bl	_MLX4_PUT
	ldr	w1, [x19]
Lloh31:
	adrp	x23, _QUERY_DEV_CAP_BMME_FLAGS_OFFSET@GOTPAGE
Lloh32:
	ldr	x23, [x23, _QUERY_DEV_CAP_BMME_FLAGS_OFFSET@GOTPAGEOFF]
	ldr	w2, [x23]
	bl	_MLX4_GET
	ldr	w0, [x19]
	ldr	w2, [x23]
	mov	w1, #0
	bl	_MLX4_PUT
	ldr	x8, [x20, #8]
Lloh33:
	adrp	x9, _MLX4_STEERING_MODE_DEVICE_MANAGED@GOTPAGE
Lloh34:
	ldr	x9, [x9, _MLX4_STEERING_MODE_DEVICE_MANAGED@GOTPAGEOFF]
Lloh35:
	ldr	x9, [x9]
	cmp	x8, x9
	b.eq	LBB0_14
; %bb.13:
	ldr	w1, [x19]
Lloh36:
	adrp	x20, _QUERY_DEV_CAP_FLOW_STEERING_RANGE_EN_OFFSET@GOTPAGE
Lloh37:
	ldr	x20, [x20, _QUERY_DEV_CAP_FLOW_STEERING_RANGE_EN_OFFSET@GOTPAGEOFF]
	ldr	w2, [x20]
	mov	x0, x22
	bl	_MLX4_GET
	ldr	w0, [x19]
	ldr	w2, [x20]
	mov	x1, x22
	bl	_MLX4_PUT
LBB0_14:
	ldr	w1, [x19]
Lloh38:
	adrp	x20, _QUERY_DEV_CAP_FLOW_STEERING_IPOIB_OFFSET@GOTPAGE
Lloh39:
	ldr	x20, [x20, _QUERY_DEV_CAP_FLOW_STEERING_IPOIB_OFFSET@GOTPAGEOFF]
	ldr	w2, [x20]
	mov	x0, x22
	bl	_MLX4_GET
	ldr	w0, [x19]
	ldr	w2, [x20]
	mov	x1, x22
	bl	_MLX4_PUT
	ldr	w1, [x19]
Lloh40:
	adrp	x20, _QUERY_DEV_CAP_EXT_2_FLAGS_OFFSET@GOTPAGE
Lloh41:
	ldr	x20, [x20, _QUERY_DEV_CAP_EXT_2_FLAGS_OFFSET@GOTPAGEOFF]
	ldr	w2, [x20]
	bl	_MLX4_GET
	ldr	w0, [x19]
	ldr	w2, [x20]
	mov	w1, #0
	bl	_MLX4_PUT
	ldr	w1, [x19]
Lloh42:
	adrp	x23, _QUERY_DEV_CAP_ECN_QCN_VER_OFFSET@GOTPAGE
Lloh43:
	ldr	x23, [x23, _QUERY_DEV_CAP_ECN_QCN_VER_OFFSET@GOTPAGEOFF]
	ldr	w2, [x23]
	mov	x0, x22
	bl	_MLX4_GET
	and	w20, w21, #0x6
	ldr	w0, [x19]
	ldr	w2, [x23]
	mov	x1, x20
	bl	_MLX4_PUT
	ldr	w0, [x19]
Lloh44:
	adrp	x8, _QUERY_DEV_CAP_QP_RATE_LIMIT_NUM_OFFSET@GOTPAGE
Lloh45:
	ldr	x8, [x8, _QUERY_DEV_CAP_QP_RATE_LIMIT_NUM_OFFSET@GOTPAGEOFF]
Lloh46:
	ldr	w2, [x8]
	mov	w1, #0
	bl	_MLX4_PUT
	ldr	w1, [x19]
Lloh47:
	adrp	x22, _QUERY_DEV_CAP_CQ_EQ_CACHE_LINE_STRIDE@GOTPAGE
Lloh48:
	ldr	x22, [x22, _QUERY_DEV_CAP_CQ_EQ_CACHE_LINE_STRIDE@GOTPAGEOFF]
	ldr	w2, [x22]
	mov	x0, x20
	bl	_MLX4_GET
	ldr	w0, [x19]
	ldr	w2, [x22]
	mov	x1, x20
	bl	_MLX4_PUT
	ldr	w1, [x19]
Lloh49:
	adrp	x22, _QUERY_DEV_CAP_CONFIG_DEV_OFFSET@GOTPAGE
Lloh50:
	ldr	x22, [x22, _QUERY_DEV_CAP_CONFIG_DEV_OFFSET@GOTPAGEOFF]
	ldr	w2, [x22]
	mov	x0, x20
	bl	_MLX4_GET
	and	w1, w21, #0x2
	ldr	w0, [x19]
	ldr	w2, [x22]
	bl	_MLX4_PUT
	mov	w0, #0
LBB0_15:
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp], #80             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGot	Lloh14, Lloh15
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpLdrGot	Lloh9, Lloh10
	.loh AdrpLdr	Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh33, Lloh34, Lloh35
	.loh AdrpLdrGot	Lloh31, Lloh32
	.loh AdrpLdrGot	Lloh29, Lloh30
	.loh AdrpLdrGot	Lloh27, Lloh28
	.loh AdrpLdrGot	Lloh25, Lloh26
	.loh AdrpLdrGot	Lloh23, Lloh24
	.loh AdrpLdrGot	Lloh21, Lloh22
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGot	Lloh36, Lloh37
	.loh AdrpLdrGot	Lloh49, Lloh50
	.loh AdrpLdrGot	Lloh47, Lloh48
	.loh AdrpLdrGotLdr	Lloh44, Lloh45, Lloh46
	.loh AdrpLdrGot	Lloh42, Lloh43
	.loh AdrpLdrGot	Lloh40, Lloh41
	.loh AdrpLdrGot	Lloh38, Lloh39
	.cfi_endproc
                                        ; -- End function
	.comm	_MLX4_CMD_QUERY_DEV_CAP,4,2     ; @MLX4_CMD_QUERY_DEV_CAP
	.comm	_MLX4_CMD_TIME_CLASS_A,4,2      ; @MLX4_CMD_TIME_CLASS_A
	.comm	_MLX4_CMD_NATIVE,4,2            ; @MLX4_CMD_NATIVE
	.comm	_QUERY_DEV_CAP_EXT_FLAGS_OFFSET,4,2 ; @QUERY_DEV_CAP_EXT_FLAGS_OFFSET
	.comm	_MLX4_DEV_CAP_FLAG_PORT_MNG_CHG_EV,4,2 ; @MLX4_DEV_CAP_FLAG_PORT_MNG_CHG_EV
	.comm	_MLX4_DEV_CAP_FLAG_MEM_WINDOW,4,2 ; @MLX4_DEV_CAP_FLAG_MEM_WINDOW
	.comm	_MLX4_DEV_CAP_FLAG_WOL_PORT1,4,2 ; @MLX4_DEV_CAP_FLAG_WOL_PORT1
	.comm	_MLX4_DEV_CAP_FLAG_RSS_IP_FRAG,4,2 ; @MLX4_DEV_CAP_FLAG_RSS_IP_FRAG
	.comm	_QUERY_DEV_CAP_VL_PORT_OFFSET,4,2 ; @QUERY_DEV_CAP_VL_PORT_OFFSET
	.comm	_QUERY_DEV_CAP_CQ_TS_SUPPORT_OFFSET,4,2 ; @QUERY_DEV_CAP_CQ_TS_SUPPORT_OFFSET
	.comm	_QUERY_DEV_CAP_VXLAN,4,2        ; @QUERY_DEV_CAP_VXLAN
	.comm	_QUERY_DEV_CAP_PORT_BEACON_OFFSET,4,2 ; @QUERY_DEV_CAP_PORT_BEACON_OFFSET
	.comm	_QUERY_DEV_CAP_BF_OFFSET,4,2    ; @QUERY_DEV_CAP_BF_OFFSET
	.comm	_QUERY_DEV_CAP_BMME_FLAGS_OFFSET,4,2 ; @QUERY_DEV_CAP_BMME_FLAGS_OFFSET
	.comm	_MLX4_BMME_FLAG_TYPE_2_WIN,4,2  ; @MLX4_BMME_FLAG_TYPE_2_WIN
	.comm	_MLX4_FLAG_PORT_REMAP,4,2       ; @MLX4_FLAG_PORT_REMAP
	.comm	_MLX4_STEERING_MODE_DEVICE_MANAGED,8,3 ; @MLX4_STEERING_MODE_DEVICE_MANAGED
	.comm	_QUERY_DEV_CAP_FLOW_STEERING_RANGE_EN_OFFSET,4,2 ; @QUERY_DEV_CAP_FLOW_STEERING_RANGE_EN_OFFSET
	.comm	_QUERY_DEV_CAP_FLOW_STEERING_IPOIB_OFFSET,4,2 ; @QUERY_DEV_CAP_FLOW_STEERING_IPOIB_OFFSET
	.comm	_QUERY_DEV_CAP_EXT_2_FLAGS_OFFSET,4,2 ; @QUERY_DEV_CAP_EXT_2_FLAGS_OFFSET
	.comm	_DEV_CAP_EXT_2_FLAG_VLAN_CONTROL,4,2 ; @DEV_CAP_EXT_2_FLAG_VLAN_CONTROL
	.comm	_DEV_CAP_EXT_2_FLAG_80_VFS,4,2  ; @DEV_CAP_EXT_2_FLAG_80_VFS
	.comm	_DEV_CAP_EXT_2_FLAG_FSM,4,2     ; @DEV_CAP_EXT_2_FLAG_FSM
	.comm	_DEV_CAP_EXT_2_FLAG_PFC_COUNTERS,4,2 ; @DEV_CAP_EXT_2_FLAG_PFC_COUNTERS
	.comm	_QUERY_DEV_CAP_ECN_QCN_VER_OFFSET,4,2 ; @QUERY_DEV_CAP_ECN_QCN_VER_OFFSET
	.comm	_QUERY_DEV_CAP_QP_RATE_LIMIT_NUM_OFFSET,4,2 ; @QUERY_DEV_CAP_QP_RATE_LIMIT_NUM_OFFSET
	.comm	_QUERY_DEV_CAP_CQ_EQ_CACHE_LINE_STRIDE,4,2 ; @QUERY_DEV_CAP_CQ_EQ_CACHE_LINE_STRIDE
	.comm	_QUERY_DEV_CAP_CONFIG_DEV_OFFSET,4,2 ; @QUERY_DEV_CAP_CONFIG_DEV_OFFSET
.subsections_via_symbols
