	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function e1000_phy_init_script
_e1000_phy_init_script:                 ## @e1000_phy_init_script
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -24
	cmpq	$0, 8(%rdi)
	je	LBB0_14
## %bb.1:
	movq	%rdi, %rbx
	movl	$20, %edi
	callq	_msleep
	leaq	-16(%rbp), %rdx
	movq	%rbx, %rdi
	movl	$12123, %esi                    ## imm = 0x2F5B
	callq	_e1000_read_phy_reg
	movq	%rbx, %rdi
	movl	$12123, %esi                    ## imm = 0x2F5B
	movl	$3, %edx
	callq	_e1000_write_phy_reg
	movl	$20, %edi
	callq	_msleep
	movq	%rbx, %rdi
	xorl	%esi, %esi
	movl	$320, %edx                      ## imm = 0x140
	callq	_e1000_write_phy_reg
	movl	$5, %edi
	callq	_msleep
	movl	(%rbx), %eax
	addl	$-128, %eax
	cmpl	$3, %eax
	ja	LBB0_6
## %bb.2:
	leaq	LJTI0_0(%rip), %rcx
	movslq	(%rcx,%rax,4), %rax
	addq	%rcx, %rax
	jmpq	*%rax
LBB0_4:
	movq	%rbx, %rdi
	movl	$8051, %esi                     ## imm = 0x1F73
	movl	$153, %edx
	jmp	LBB0_5
LBB0_3:
	movq	%rbx, %rdi
	movl	$8085, %esi                     ## imm = 0x1F95
	movl	$1, %edx
	callq	_e1000_write_phy_reg
	movq	%rbx, %rdi
	movl	$8049, %esi                     ## imm = 0x1F71
	movl	$48417, %edx                    ## imm = 0xBD21
	callq	_e1000_write_phy_reg
	movq	%rbx, %rdi
	movl	$8057, %esi                     ## imm = 0x1F79
	movl	$24, %edx
	callq	_e1000_write_phy_reg
	movq	%rbx, %rdi
	movl	$7984, %esi                     ## imm = 0x1F30
	movl	$5632, %edx                     ## imm = 0x1600
	callq	_e1000_write_phy_reg
	movq	%rbx, %rdi
	movl	$7985, %esi                     ## imm = 0x1F31
	movl	$20, %edx
	callq	_e1000_write_phy_reg
	movq	%rbx, %rdi
	movl	$7986, %esi                     ## imm = 0x1F32
	movl	$5660, %edx                     ## imm = 0x161C
	callq	_e1000_write_phy_reg
	movq	%rbx, %rdi
	movl	$8084, %esi                     ## imm = 0x1F94
	movl	$3, %edx
	callq	_e1000_write_phy_reg
	movq	%rbx, %rdi
	movl	$8086, %esi                     ## imm = 0x1F96
	movl	$63, %edx
	callq	_e1000_write_phy_reg
	movq	%rbx, %rdi
	movl	$8208, %esi                     ## imm = 0x2010
	movl	$8, %edx
LBB0_5:
	callq	_e1000_write_phy_reg
LBB0_6:
	movq	%rbx, %rdi
	xorl	%esi, %esi
	movl	$13056, %edx                    ## imm = 0x3300
	callq	_e1000_write_phy_reg
	movl	$20, %edi
	callq	_msleep
	movl	-16(%rbp), %edx
	movq	%rbx, %rdi
	movl	$12123, %esi                    ## imm = 0x2F5B
	callq	_e1000_write_phy_reg
	cmpl	$129, (%rbx)
	jne	LBB0_14
## %bb.7:
	movq	_IGP01E1000_ANALOG_SPARE_FUSE_STATUS@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	leaq	-12(%rbp), %rdx
	movq	%rbx, %rdi
	callq	_e1000_read_phy_reg
	movq	_IGP01E1000_ANALOG_SPARE_FUSE_ENABLED@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	testl	%eax, -12(%rbp)
	jne	LBB0_14
## %bb.8:
	movq	_IGP01E1000_ANALOG_FUSE_STATUS@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	leaq	-12(%rbp), %rdx
	movq	%rbx, %rdi
	callq	_e1000_read_phy_reg
	movl	-12(%rbp), %eax
	movq	_IGP01E1000_ANALOG_FUSE_FINE_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %r8d
	movl	%r8d, %ecx
	andl	%eax, %ecx
	movq	_IGP01E1000_ANALOG_FUSE_COARSE_MASK@GOTPCREL(%rip), %rdx
	movl	(%rdx), %edi
	movl	%edi, %edx
	andl	%eax, %edx
	movq	_IGP01E1000_ANALOG_FUSE_COARSE_THRESH@GOTPCREL(%rip), %rsi
	cmpl	(%rsi), %edx
	jle	LBB0_10
## %bb.9:
	movq	_IGP01E1000_ANALOG_FUSE_COARSE_10@GOTPCREL(%rip), %rsi
	subl	(%rsi), %edx
	movq	_IGP01E1000_ANALOG_FUSE_FINE_1@GOTPCREL(%rip), %rsi
	jmp	LBB0_12
LBB0_10:
	jne	LBB0_13
## %bb.11:
	movq	_IGP01E1000_ANALOG_FUSE_FINE_10@GOTPCREL(%rip), %rsi
LBB0_12:
	subl	(%rsi), %ecx
LBB0_13:
	movq	_IGP01E1000_ANALOG_FUSE_POLY_MASK@GOTPCREL(%rip), %rsi
	andl	(%rsi), %eax
	andl	%r8d, %ecx
	andl	%edi, %edx
	orl	%ecx, %edx
	orl	%eax, %edx
	movl	%edx, -12(%rbp)
	movq	_IGP01E1000_ANALOG_FUSE_CONTROL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_e1000_write_phy_reg
	movq	_IGP01E1000_ANALOG_FUSE_BYPASS@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_IGP01E1000_ANALOG_FUSE_ENABLE_SW_CONTROL@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	callq	_e1000_write_phy_reg
LBB0_14:
	addq	$8, %rsp
	popq	%rbx
	popq	%rbp
	retq
	.cfi_endproc
	.p2align	2, 0x90
	.data_region jt32
.set L0_0_set_4, LBB0_4-LJTI0_0
.set L0_0_set_3, LBB0_3-LJTI0_0
LJTI0_0:
	.long	L0_0_set_4
	.long	L0_0_set_3
	.long	L0_0_set_4
	.long	L0_0_set_3
	.end_data_region
                                        ## -- End function
	.comm	_IGP01E1000_ANALOG_SPARE_FUSE_STATUS,4,2 ## @IGP01E1000_ANALOG_SPARE_FUSE_STATUS
	.comm	_IGP01E1000_ANALOG_SPARE_FUSE_ENABLED,4,2 ## @IGP01E1000_ANALOG_SPARE_FUSE_ENABLED
	.comm	_IGP01E1000_ANALOG_FUSE_STATUS,4,2 ## @IGP01E1000_ANALOG_FUSE_STATUS
	.comm	_IGP01E1000_ANALOG_FUSE_FINE_MASK,4,2 ## @IGP01E1000_ANALOG_FUSE_FINE_MASK
	.comm	_IGP01E1000_ANALOG_FUSE_COARSE_MASK,4,2 ## @IGP01E1000_ANALOG_FUSE_COARSE_MASK
	.comm	_IGP01E1000_ANALOG_FUSE_COARSE_THRESH,4,2 ## @IGP01E1000_ANALOG_FUSE_COARSE_THRESH
	.comm	_IGP01E1000_ANALOG_FUSE_COARSE_10,8,3 ## @IGP01E1000_ANALOG_FUSE_COARSE_10
	.comm	_IGP01E1000_ANALOG_FUSE_FINE_1,8,3 ## @IGP01E1000_ANALOG_FUSE_FINE_1
	.comm	_IGP01E1000_ANALOG_FUSE_FINE_10,8,3 ## @IGP01E1000_ANALOG_FUSE_FINE_10
	.comm	_IGP01E1000_ANALOG_FUSE_POLY_MASK,4,2 ## @IGP01E1000_ANALOG_FUSE_POLY_MASK
	.comm	_IGP01E1000_ANALOG_FUSE_CONTROL,4,2 ## @IGP01E1000_ANALOG_FUSE_CONTROL
	.comm	_IGP01E1000_ANALOG_FUSE_BYPASS,4,2 ## @IGP01E1000_ANALOG_FUSE_BYPASS
	.comm	_IGP01E1000_ANALOG_FUSE_ENABLE_SW_CONTROL,4,2 ## @IGP01E1000_ANALOG_FUSE_ENABLE_SW_CONTROL
	.no_dead_strip	_e1000_phy_init_script
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function e1000_phy_init_script
_e1000_phy_init_script:                 ; @e1000_phy_init_script
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #48
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	ldr	x8, [x0, #8]
	cbz	x8, LBB0_14
; %bb.1:
	mov	x19, x0
	mov	w0, #20
	bl	_msleep
	add	x2, sp, #12
	mov	x0, x19
	mov	w1, #12123
	bl	_e1000_read_phy_reg
	mov	x0, x19
	mov	w1, #12123
	mov	w2, #3
	bl	_e1000_write_phy_reg
	mov	w0, #20
	bl	_msleep
	mov	x0, x19
	mov	w1, #0
	mov	w2, #320
	bl	_e1000_write_phy_reg
	mov	w0, #5
	bl	_msleep
	ldr	w8, [x19]
	sub	w8, w8, #128
	cmp	w8, #3
	b.hi	LBB0_6
; %bb.2:
Lloh0:
	adrp	x9, lJTI0_0@PAGE
Lloh1:
	add	x9, x9, lJTI0_0@PAGEOFF
	adr	x10, LBB0_3
	ldrb	w11, [x9, x8]
	add	x10, x10, x11, lsl #2
	br	x10
LBB0_3:
	mov	x0, x19
	mov	w1, #8051
	mov	w2, #153
	b	LBB0_5
LBB0_4:
	mov	x0, x19
	mov	w1, #8085
	mov	w2, #1
	bl	_e1000_write_phy_reg
	mov	x0, x19
	mov	w1, #8049
	mov	w2, #48417
	bl	_e1000_write_phy_reg
	mov	x0, x19
	mov	w1, #8057
	mov	w2, #24
	bl	_e1000_write_phy_reg
	mov	x0, x19
	mov	w1, #7984
	mov	w2, #5632
	bl	_e1000_write_phy_reg
	mov	x0, x19
	mov	w1, #7985
	mov	w2, #20
	bl	_e1000_write_phy_reg
	mov	x0, x19
	mov	w1, #7986
	mov	w2, #5660
	bl	_e1000_write_phy_reg
	mov	x0, x19
	mov	w1, #8084
	mov	w2, #3
	bl	_e1000_write_phy_reg
	mov	x0, x19
	mov	w1, #8086
	mov	w2, #63
	bl	_e1000_write_phy_reg
	mov	x0, x19
	mov	w1, #8208
	mov	w2, #8
LBB0_5:
	bl	_e1000_write_phy_reg
LBB0_6:
	mov	x0, x19
	mov	w1, #0
	mov	w2, #13056
	bl	_e1000_write_phy_reg
	mov	w0, #20
	bl	_msleep
	ldr	w2, [sp, #12]
	mov	x0, x19
	mov	w1, #12123
	bl	_e1000_write_phy_reg
	ldr	w8, [x19]
	cmp	w8, #129
	b.ne	LBB0_14
; %bb.7:
Lloh2:
	adrp	x8, _IGP01E1000_ANALOG_SPARE_FUSE_STATUS@GOTPAGE
Lloh3:
	ldr	x8, [x8, _IGP01E1000_ANALOG_SPARE_FUSE_STATUS@GOTPAGEOFF]
Lloh4:
	ldr	w1, [x8]
	add	x2, sp, #8
	mov	x0, x19
	bl	_e1000_read_phy_reg
	ldr	w8, [sp, #8]
Lloh5:
	adrp	x9, _IGP01E1000_ANALOG_SPARE_FUSE_ENABLED@GOTPAGE
Lloh6:
	ldr	x9, [x9, _IGP01E1000_ANALOG_SPARE_FUSE_ENABLED@GOTPAGEOFF]
Lloh7:
	ldr	w9, [x9]
	tst	w9, w8
	b.ne	LBB0_14
; %bb.8:
Lloh8:
	adrp	x8, _IGP01E1000_ANALOG_FUSE_STATUS@GOTPAGE
Lloh9:
	ldr	x8, [x8, _IGP01E1000_ANALOG_FUSE_STATUS@GOTPAGEOFF]
Lloh10:
	ldr	w1, [x8]
	add	x2, sp, #8
	mov	x0, x19
	bl	_e1000_read_phy_reg
	ldr	w8, [sp, #8]
Lloh11:
	adrp	x9, _IGP01E1000_ANALOG_FUSE_FINE_MASK@GOTPAGE
Lloh12:
	ldr	x9, [x9, _IGP01E1000_ANALOG_FUSE_FINE_MASK@GOTPAGEOFF]
Lloh13:
	ldr	w9, [x9]
	and	w10, w9, w8
Lloh14:
	adrp	x11, _IGP01E1000_ANALOG_FUSE_COARSE_MASK@GOTPAGE
Lloh15:
	ldr	x11, [x11, _IGP01E1000_ANALOG_FUSE_COARSE_MASK@GOTPAGEOFF]
Lloh16:
	ldr	w11, [x11]
	and	w12, w11, w8
Lloh17:
	adrp	x13, _IGP01E1000_ANALOG_FUSE_COARSE_THRESH@GOTPAGE
Lloh18:
	ldr	x13, [x13, _IGP01E1000_ANALOG_FUSE_COARSE_THRESH@GOTPAGEOFF]
Lloh19:
	ldr	w13, [x13]
	cmp	w12, w13
	b.le	LBB0_10
; %bb.9:
Lloh20:
	adrp	x13, _IGP01E1000_ANALOG_FUSE_COARSE_10@GOTPAGE
Lloh21:
	ldr	x13, [x13, _IGP01E1000_ANALOG_FUSE_COARSE_10@GOTPAGEOFF]
Lloh22:
	ldr	w13, [x13]
	sub	w12, w12, w13
Lloh23:
	adrp	x13, _IGP01E1000_ANALOG_FUSE_FINE_1@GOTPAGE
Lloh24:
	ldr	x13, [x13, _IGP01E1000_ANALOG_FUSE_FINE_1@GOTPAGEOFF]
	b	LBB0_12
LBB0_10:
	b.ne	LBB0_13
; %bb.11:
Lloh25:
	adrp	x13, _IGP01E1000_ANALOG_FUSE_FINE_10@GOTPAGE
Lloh26:
	ldr	x13, [x13, _IGP01E1000_ANALOG_FUSE_FINE_10@GOTPAGEOFF]
LBB0_12:
	ldr	w13, [x13]
	sub	w10, w10, w13
LBB0_13:
Lloh27:
	adrp	x13, _IGP01E1000_ANALOG_FUSE_POLY_MASK@GOTPAGE
Lloh28:
	ldr	x13, [x13, _IGP01E1000_ANALOG_FUSE_POLY_MASK@GOTPAGEOFF]
Lloh29:
	ldr	w13, [x13]
	and	w8, w13, w8
	and	w9, w10, w9
	and	w10, w12, w11
	orr	w9, w10, w9
	orr	w2, w9, w8
	str	w2, [sp, #8]
Lloh30:
	adrp	x8, _IGP01E1000_ANALOG_FUSE_CONTROL@GOTPAGE
Lloh31:
	ldr	x8, [x8, _IGP01E1000_ANALOG_FUSE_CONTROL@GOTPAGEOFF]
Lloh32:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_e1000_write_phy_reg
Lloh33:
	adrp	x8, _IGP01E1000_ANALOG_FUSE_BYPASS@GOTPAGE
Lloh34:
	ldr	x8, [x8, _IGP01E1000_ANALOG_FUSE_BYPASS@GOTPAGEOFF]
Lloh35:
	ldr	w1, [x8]
Lloh36:
	adrp	x8, _IGP01E1000_ANALOG_FUSE_ENABLE_SW_CONTROL@GOTPAGE
Lloh37:
	ldr	x8, [x8, _IGP01E1000_ANALOG_FUSE_ENABLE_SW_CONTROL@GOTPAGEOFF]
Lloh38:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_e1000_write_phy_reg
LBB0_14:
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #48
	ret
	.loh AdrpAdd	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh19
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh16
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGot	Lloh23, Lloh24
	.loh AdrpLdrGotLdr	Lloh20, Lloh21, Lloh22
	.loh AdrpLdrGot	Lloh25, Lloh26
	.loh AdrpLdrGotLdr	Lloh36, Lloh37, Lloh38
	.loh AdrpLdrGotLdr	Lloh33, Lloh34, Lloh35
	.loh AdrpLdrGotLdr	Lloh30, Lloh31, Lloh32
	.loh AdrpLdrGotLdr	Lloh27, Lloh28, Lloh29
	.cfi_endproc
	.section	__TEXT,__const
lJTI0_0:
	.byte	(LBB0_3-LBB0_3)>>2
	.byte	(LBB0_4-LBB0_3)>>2
	.byte	(LBB0_3-LBB0_3)>>2
	.byte	(LBB0_4-LBB0_3)>>2
                                        ; -- End function
	.comm	_IGP01E1000_ANALOG_SPARE_FUSE_STATUS,4,2 ; @IGP01E1000_ANALOG_SPARE_FUSE_STATUS
	.comm	_IGP01E1000_ANALOG_SPARE_FUSE_ENABLED,4,2 ; @IGP01E1000_ANALOG_SPARE_FUSE_ENABLED
	.comm	_IGP01E1000_ANALOG_FUSE_STATUS,4,2 ; @IGP01E1000_ANALOG_FUSE_STATUS
	.comm	_IGP01E1000_ANALOG_FUSE_FINE_MASK,4,2 ; @IGP01E1000_ANALOG_FUSE_FINE_MASK
	.comm	_IGP01E1000_ANALOG_FUSE_COARSE_MASK,4,2 ; @IGP01E1000_ANALOG_FUSE_COARSE_MASK
	.comm	_IGP01E1000_ANALOG_FUSE_COARSE_THRESH,4,2 ; @IGP01E1000_ANALOG_FUSE_COARSE_THRESH
	.comm	_IGP01E1000_ANALOG_FUSE_COARSE_10,8,3 ; @IGP01E1000_ANALOG_FUSE_COARSE_10
	.comm	_IGP01E1000_ANALOG_FUSE_FINE_1,8,3 ; @IGP01E1000_ANALOG_FUSE_FINE_1
	.comm	_IGP01E1000_ANALOG_FUSE_FINE_10,8,3 ; @IGP01E1000_ANALOG_FUSE_FINE_10
	.comm	_IGP01E1000_ANALOG_FUSE_POLY_MASK,4,2 ; @IGP01E1000_ANALOG_FUSE_POLY_MASK
	.comm	_IGP01E1000_ANALOG_FUSE_CONTROL,4,2 ; @IGP01E1000_ANALOG_FUSE_CONTROL
	.comm	_IGP01E1000_ANALOG_FUSE_BYPASS,4,2 ; @IGP01E1000_ANALOG_FUSE_BYPASS
	.comm	_IGP01E1000_ANALOG_FUSE_ENABLE_SW_CONTROL,4,2 ; @IGP01E1000_ANALOG_FUSE_ENABLE_SW_CONTROL
	.no_dead_strip	_e1000_phy_init_script
.subsections_via_symbols
