	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function dfx_bus_init
_dfx_bus_init:                          ## @dfx_bus_init
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$24, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r13
	callq	_netdev_priv
	movq	%rax, %r14
	movq	8(%rax), %r15
	movq	%r15, %rdi
	callq	_dev_is_pci
	movl	%eax, -52(%rbp)                 ## 4-byte Spill
	movq	%r15, %rdi
	callq	_DFX_BUS_EISA
	movl	%eax, %ebx
	movq	%r15, %rdi
	callq	_DFX_BUS_TC
	movq	_DFX_MMIO@GOTPCREL(%rip), %rcx
	cmpq	$0, (%rcx)
	movl	%eax, %r12d
	setne	-42(%rbp)                       ## 1-byte Folded Spill
	testl	%eax, %eax
	setne	-41(%rbp)                       ## 1-byte Folded Spill
	leaq	L_.str(%rip), %rdi
	callq	_DBG_printk
	movq	%r14, -64(%rbp)                 ## 8-byte Spill
	movq	%r13, (%r14)
	testl	%r12d, %r12d
	je	LBB0_2
## %bb.1:
	movq	%r15, %rdi
	callq	_to_tc_dev
	movl	(%rax), %eax
	movl	%eax, (%r13)
LBB0_2:
	testl	%ebx, %ebx
	je	LBB0_9
## %bb.3:
	movb	-42(%rbp), %r14b                ## 1-byte Reload
	orb	-41(%rbp), %r14b                ## 1-byte Folded Reload
	movq	%r15, %rdi
	callq	_to_eisa_device
	movq	(%rax), %rbx
	movq	_PI_ESIC_K_SLOT_CNTRL@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	addq	%rbx, %rsi
	xorl	%edi, %edi
	callq	_outb
	movq	_PI_ESIC_K_IO_CONFIG_STAT_0@GOTPCREL(%rip), %rax
	movq	(%rax), %rdi
	addq	%rbx, %rdi
	callq	_inb
	movq	_PI_CONFIG_STAT_0_M_IRQ@GOTPCREL(%rip), %rcx
	andl	(%rcx), %eax
	movq	_PI_CONFIG_STAT_0_V_IRQ@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	sarl	%cl, %eax
	addl	$-128, %eax
	cmpl	$3, %eax
	ja	LBB0_5
## %bb.4:
	cltq
	leaq	L_switch.table.dfx_bus_init(%rip), %rcx
	movl	(%rcx,%rax,4), %eax
	movl	%eax, (%r13)
LBB0_5:
	movq	_PI_ESIC_K_IO_ADD_CMP_0_1@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	addq	%rbx, %rsi
	xorl	%edi, %edi
	callq	_outb
	movq	_PI_DEFEA_K_CSR_IO@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_PI_ESIC_K_IO_ADD_CMP_0_0@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	addq	%rbx, %rsi
	callq	_outb
	movq	_PI_IO_CMP_M_SLOT@GOTPCREL(%rip), %r12
	movl	(%r12), %edi
	movq	_PI_ESIC_K_IO_ADD_MASK_0_1@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	addq	%rbx, %rsi
	callq	_outb
	movq	_PI_ESIC_K_CSR_IO_LEN@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	decl	%edi
	andl	$-4, %edi
	movq	_PI_ESIC_K_IO_ADD_MASK_0_0@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	addq	%rbx, %rsi
	callq	_outb
	movq	_PI_ESIC_K_IO_ADD_CMP_1_1@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	addq	%rbx, %rsi
	xorl	%edi, %edi
	callq	_outb
	movq	_PI_DEFEA_K_BURST_HOLDOFF@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_PI_ESIC_K_IO_ADD_CMP_1_0@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	addq	%rbx, %rsi
	callq	_outb
	movl	(%r12), %edi
	movq	_PI_ESIC_K_IO_ADD_MASK_1_1@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	addq	%rbx, %rsi
	callq	_outb
	movq	_PI_ESIC_K_BURST_HOLDOFF_LEN@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	decl	%edi
	andl	$-4, %edi
	movq	_PI_ESIC_K_IO_ADD_MASK_1_0@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	addq	%rbx, %rsi
	callq	_outb
	movq	_PI_FUNCTION_CNTRL_M_IOCS1@GOTPCREL(%rip), %rax
	testb	%r14b, %r14b
	je	LBB0_6
## %bb.7:
	movq	_PI_FUNCTION_CNTRL_M_MEMCS1@GOTPCREL(%rip), %rcx
	jmp	LBB0_8
LBB0_6:
	movq	_PI_FUNCTION_CNTRL_M_IOCS0@GOTPCREL(%rip), %rcx
LBB0_8:
	movl	(%rcx), %edi
	orl	(%rax), %edi
	movq	_PI_ESIC_K_FUNCTION_CNTRL@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	addq	%rbx, %rsi
	callq	_outb
	movq	_PI_SLOT_CNTRL_M_ENB@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_PI_ESIC_K_SLOT_CNTRL@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	addq	%rbx, %rsi
	callq	_outb
	movq	_PI_DEFEA_K_BURST_HOLDOFF@GOTPCREL(%rip), %r12
	movq	(%r12), %rdi
	addq	%rbx, %rdi
	callq	_inb
	movq	_PI_BURST_HOLDOFF_M_MEM_MAP@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edi
	movl	%edi, %ecx
	notl	%ecx
	andl	%eax, %ecx
	orl	%eax, %edi
	testb	%r14b, %r14b
	cmovel	%ecx, %edi
	movq	(%r12), %rsi
	addq	%rbx, %rsi
	callq	_outb
	movq	_PI_ESIC_K_IO_CONFIG_STAT_0@GOTPCREL(%rip), %r14
	movq	(%r14), %rdi
	addq	%rbx, %rdi
	callq	_inb
	movq	_PI_CONFIG_STAT_0_M_INT_ENB@GOTPCREL(%rip), %rcx
	orl	(%rcx), %eax
	movl	%eax, -48(%rbp)
	addq	(%r14), %rbx
	movl	%eax, %edi
	movq	%rbx, %rsi
	callq	_outb
LBB0_9:
	cmpl	$0, -52(%rbp)                   ## 4-byte Folded Reload
	je	LBB0_13
## %bb.10:
	movq	%r15, %rdi
	callq	_to_pci_dev
	movq	%rax, %rbx
	movl	(%rax), %eax
	movl	%eax, (%r13)
	movq	_PCI_LATENCY_TIMER@GOTPCREL(%rip), %r14
	movl	(%r14), %esi
	leaq	-48(%rbp), %rdx
	movq	%rbx, %rdi
	callq	_pci_read_config_byte
	movl	-48(%rbp), %eax
	movq	_PFI_K_LAT_TIMER_MIN@GOTPCREL(%rip), %rcx
	cmpl	(%rcx), %eax
	jge	LBB0_12
## %bb.11:
	movq	_PFI_K_LAT_TIMER_DEF@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movl	%edx, -48(%rbp)
	movl	(%r14), %esi
	movq	%rbx, %rdi
	callq	_pci_write_config_byte
LBB0_12:
	movq	_PFI_MODE_M_PDQ_INT_ENB@GOTPCREL(%rip), %rax
	movq	_PFI_MODE_M_DMA_ENB@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	orl	(%rax), %edx
	movl	%edx, -48(%rbp)
	movq	_PFI_K_REG_MODE_CTRL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	-64(%rbp), %rdi                 ## 8-byte Reload
	callq	_dfx_port_write_long
LBB0_13:
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_DFX_MMIO,8,3                   ## @DFX_MMIO
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"In dfx_bus_init...\n"

	.comm	_PI_ESIC_K_SLOT_CNTRL,8,3       ## @PI_ESIC_K_SLOT_CNTRL
	.comm	_PI_ESIC_K_IO_CONFIG_STAT_0,8,3 ## @PI_ESIC_K_IO_CONFIG_STAT_0
	.comm	_PI_CONFIG_STAT_0_M_IRQ,4,2     ## @PI_CONFIG_STAT_0_M_IRQ
	.comm	_PI_CONFIG_STAT_0_V_IRQ,4,2     ## @PI_CONFIG_STAT_0_V_IRQ
	.comm	_PI_ESIC_K_IO_ADD_CMP_0_1,8,3   ## @PI_ESIC_K_IO_ADD_CMP_0_1
	.comm	_PI_DEFEA_K_CSR_IO,4,2          ## @PI_DEFEA_K_CSR_IO
	.comm	_PI_ESIC_K_IO_ADD_CMP_0_0,8,3   ## @PI_ESIC_K_IO_ADD_CMP_0_0
	.comm	_PI_IO_CMP_M_SLOT,4,2           ## @PI_IO_CMP_M_SLOT
	.comm	_PI_ESIC_K_IO_ADD_MASK_0_1,8,3  ## @PI_ESIC_K_IO_ADD_MASK_0_1
	.comm	_PI_ESIC_K_CSR_IO_LEN,4,2       ## @PI_ESIC_K_CSR_IO_LEN
	.comm	_PI_ESIC_K_IO_ADD_MASK_0_0,8,3  ## @PI_ESIC_K_IO_ADD_MASK_0_0
	.comm	_PI_ESIC_K_IO_ADD_CMP_1_1,8,3   ## @PI_ESIC_K_IO_ADD_CMP_1_1
	.comm	_PI_DEFEA_K_BURST_HOLDOFF,8,3   ## @PI_DEFEA_K_BURST_HOLDOFF
	.comm	_PI_ESIC_K_IO_ADD_CMP_1_0,8,3   ## @PI_ESIC_K_IO_ADD_CMP_1_0
	.comm	_PI_ESIC_K_IO_ADD_MASK_1_1,8,3  ## @PI_ESIC_K_IO_ADD_MASK_1_1
	.comm	_PI_ESIC_K_BURST_HOLDOFF_LEN,4,2 ## @PI_ESIC_K_BURST_HOLDOFF_LEN
	.comm	_PI_ESIC_K_IO_ADD_MASK_1_0,8,3  ## @PI_ESIC_K_IO_ADD_MASK_1_0
	.comm	_PI_FUNCTION_CNTRL_M_IOCS1,4,2  ## @PI_FUNCTION_CNTRL_M_IOCS1
	.comm	_PI_FUNCTION_CNTRL_M_MEMCS1,4,2 ## @PI_FUNCTION_CNTRL_M_MEMCS1
	.comm	_PI_FUNCTION_CNTRL_M_IOCS0,4,2  ## @PI_FUNCTION_CNTRL_M_IOCS0
	.comm	_PI_ESIC_K_FUNCTION_CNTRL,8,3   ## @PI_ESIC_K_FUNCTION_CNTRL
	.comm	_PI_SLOT_CNTRL_M_ENB,4,2        ## @PI_SLOT_CNTRL_M_ENB
	.comm	_PI_BURST_HOLDOFF_M_MEM_MAP,4,2 ## @PI_BURST_HOLDOFF_M_MEM_MAP
	.comm	_PI_CONFIG_STAT_0_M_INT_ENB,4,2 ## @PI_CONFIG_STAT_0_M_INT_ENB
	.comm	_PCI_LATENCY_TIMER,4,2          ## @PCI_LATENCY_TIMER
	.comm	_PFI_K_LAT_TIMER_MIN,4,2        ## @PFI_K_LAT_TIMER_MIN
	.comm	_PFI_K_LAT_TIMER_DEF,4,2        ## @PFI_K_LAT_TIMER_DEF
	.comm	_PFI_MODE_M_PDQ_INT_ENB,4,2     ## @PFI_MODE_M_PDQ_INT_ENB
	.comm	_PFI_MODE_M_DMA_ENB,4,2         ## @PFI_MODE_M_DMA_ENB
	.comm	_PFI_K_REG_MODE_CTRL,4,2        ## @PFI_K_REG_MODE_CTRL
	.no_dead_strip	_dfx_bus_init
	.section	__TEXT,__literal16,16byte_literals
	.p2align	2                               ## @switch.table.dfx_bus_init
L_switch.table.dfx_bus_init:
	.long	9                               ## 0x9
	.long	15                              ## 0xf
	.long	11                              ## 0xb
	.long	10                              ## 0xa

.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function dfx_bus_init
_dfx_bus_init:                          ; @dfx_bus_init
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #112
	.cfi_def_cfa_offset 112
	stp	x28, x27, [sp, #16]             ; 16-byte Folded Spill
	stp	x26, x25, [sp, #32]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #48]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #64]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #80]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #96]             ; 16-byte Folded Spill
	add	x29, sp, #96
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	mov	x20, x0
	bl	_netdev_priv
	mov	x19, x0
	ldr	x21, [x0, #8]
	mov	x0, x21
	bl	_dev_is_pci
	mov	x22, x0
	mov	x0, x21
	bl	_DFX_BUS_EISA
	mov	x23, x0
	mov	x0, x21
	bl	_DFX_BUS_TC
	mov	x24, x0
Lloh0:
	adrp	x8, _DFX_MMIO@GOTPAGE
Lloh1:
	ldr	x8, [x8, _DFX_MMIO@GOTPAGEOFF]
Lloh2:
	ldr	x8, [x8]
	cmp	x8, #0
	ccmp	w0, #0, #0, eq
	cset	w25, ne
Lloh3:
	adrp	x0, l_.str@PAGE
Lloh4:
	add	x0, x0, l_.str@PAGEOFF
	bl	_DBG_printk
	str	x20, [x19]
	cbz	w24, LBB0_2
; %bb.1:
	mov	x0, x21
	bl	_to_tc_dev
	ldr	w8, [x0]
	str	w8, [x20]
LBB0_2:
	cbz	w23, LBB0_6
; %bb.3:
	mov	x0, x21
	bl	_to_eisa_device
	ldr	x23, [x0]
Lloh5:
	adrp	x26, _PI_ESIC_K_SLOT_CNTRL@GOTPAGE
Lloh6:
	ldr	x26, [x26, _PI_ESIC_K_SLOT_CNTRL@GOTPAGEOFF]
	ldr	x8, [x26]
	add	x1, x8, x23
	mov	w0, #0
	bl	_outb
Lloh7:
	adrp	x24, _PI_ESIC_K_IO_CONFIG_STAT_0@GOTPAGE
Lloh8:
	ldr	x24, [x24, _PI_ESIC_K_IO_CONFIG_STAT_0@GOTPAGEOFF]
	ldr	x8, [x24]
	add	x0, x8, x23
	bl	_inb
Lloh9:
	adrp	x8, _PI_CONFIG_STAT_0_M_IRQ@GOTPAGE
Lloh10:
	ldr	x8, [x8, _PI_CONFIG_STAT_0_M_IRQ@GOTPAGEOFF]
Lloh11:
	ldr	w8, [x8]
	and	w8, w8, w0
Lloh12:
	adrp	x9, _PI_CONFIG_STAT_0_V_IRQ@GOTPAGE
Lloh13:
	ldr	x9, [x9, _PI_CONFIG_STAT_0_V_IRQ@GOTPAGEOFF]
Lloh14:
	ldr	w9, [x9]
	asr	w8, w8, w9
	sub	w8, w8, #128
	cmp	w8, #3
	b.hi	LBB0_5
; %bb.4:
Lloh15:
	adrp	x9, l_switch.table.dfx_bus_init@PAGE
Lloh16:
	add	x9, x9, l_switch.table.dfx_bus_init@PAGEOFF
	ldr	w8, [x9, w8, sxtw #2]
	str	w8, [x20]
LBB0_5:
Lloh17:
	adrp	x8, _PI_ESIC_K_IO_ADD_CMP_0_1@GOTPAGE
Lloh18:
	ldr	x8, [x8, _PI_ESIC_K_IO_ADD_CMP_0_1@GOTPAGEOFF]
Lloh19:
	ldr	x8, [x8]
	add	x1, x8, x23
	mov	w0, #0
	bl	_outb
Lloh20:
	adrp	x8, _PI_DEFEA_K_CSR_IO@GOTPAGE
Lloh21:
	ldr	x8, [x8, _PI_DEFEA_K_CSR_IO@GOTPAGEOFF]
Lloh22:
	ldr	w0, [x8]
Lloh23:
	adrp	x8, _PI_ESIC_K_IO_ADD_CMP_0_0@GOTPAGE
Lloh24:
	ldr	x8, [x8, _PI_ESIC_K_IO_ADD_CMP_0_0@GOTPAGEOFF]
Lloh25:
	ldr	x8, [x8]
	add	x1, x8, x23
	bl	_outb
Lloh26:
	adrp	x28, _PI_IO_CMP_M_SLOT@GOTPAGE
Lloh27:
	ldr	x28, [x28, _PI_IO_CMP_M_SLOT@GOTPAGEOFF]
	ldr	w0, [x28]
Lloh28:
	adrp	x8, _PI_ESIC_K_IO_ADD_MASK_0_1@GOTPAGE
Lloh29:
	ldr	x8, [x8, _PI_ESIC_K_IO_ADD_MASK_0_1@GOTPAGEOFF]
Lloh30:
	ldr	x8, [x8]
	add	x1, x8, x23
	bl	_outb
Lloh31:
	adrp	x8, _PI_ESIC_K_CSR_IO_LEN@GOTPAGE
Lloh32:
	ldr	x8, [x8, _PI_ESIC_K_CSR_IO_LEN@GOTPAGEOFF]
Lloh33:
	ldr	w8, [x8]
	sub	w8, w8, #1
	and	w0, w8, #0xfffffffc
Lloh34:
	adrp	x8, _PI_ESIC_K_IO_ADD_MASK_0_0@GOTPAGE
Lloh35:
	ldr	x8, [x8, _PI_ESIC_K_IO_ADD_MASK_0_0@GOTPAGEOFF]
Lloh36:
	ldr	x8, [x8]
	add	x1, x8, x23
	bl	_outb
Lloh37:
	adrp	x8, _PI_ESIC_K_IO_ADD_CMP_1_1@GOTPAGE
Lloh38:
	ldr	x8, [x8, _PI_ESIC_K_IO_ADD_CMP_1_1@GOTPAGEOFF]
Lloh39:
	ldr	x8, [x8]
	add	x1, x8, x23
	mov	w0, #0
	bl	_outb
Lloh40:
	adrp	x27, _PI_DEFEA_K_BURST_HOLDOFF@GOTPAGE
Lloh41:
	ldr	x27, [x27, _PI_DEFEA_K_BURST_HOLDOFF@GOTPAGEOFF]
	ldr	w0, [x27]
Lloh42:
	adrp	x8, _PI_ESIC_K_IO_ADD_CMP_1_0@GOTPAGE
Lloh43:
	ldr	x8, [x8, _PI_ESIC_K_IO_ADD_CMP_1_0@GOTPAGEOFF]
Lloh44:
	ldr	x8, [x8]
	add	x1, x8, x23
	bl	_outb
	ldr	w0, [x28]
Lloh45:
	adrp	x8, _PI_ESIC_K_IO_ADD_MASK_1_1@GOTPAGE
Lloh46:
	ldr	x8, [x8, _PI_ESIC_K_IO_ADD_MASK_1_1@GOTPAGEOFF]
Lloh47:
	ldr	x8, [x8]
	add	x1, x8, x23
	bl	_outb
Lloh48:
	adrp	x8, _PI_ESIC_K_BURST_HOLDOFF_LEN@GOTPAGE
Lloh49:
	ldr	x8, [x8, _PI_ESIC_K_BURST_HOLDOFF_LEN@GOTPAGEOFF]
Lloh50:
	ldr	w8, [x8]
	sub	w8, w8, #1
	and	w0, w8, #0xfffffffc
Lloh51:
	adrp	x8, _PI_ESIC_K_IO_ADD_MASK_1_0@GOTPAGE
Lloh52:
	ldr	x8, [x8, _PI_ESIC_K_IO_ADD_MASK_1_0@GOTPAGEOFF]
Lloh53:
	ldr	x8, [x8]
	add	x1, x8, x23
	bl	_outb
Lloh54:
	adrp	x8, _PI_FUNCTION_CNTRL_M_IOCS1@GOTPAGE
Lloh55:
	ldr	x8, [x8, _PI_FUNCTION_CNTRL_M_IOCS1@GOTPAGEOFF]
Lloh56:
	ldr	w8, [x8]
Lloh57:
	adrp	x9, _PI_FUNCTION_CNTRL_M_MEMCS1@GOTPAGE
Lloh58:
	ldr	x9, [x9, _PI_FUNCTION_CNTRL_M_MEMCS1@GOTPAGEOFF]
Lloh59:
	adrp	x10, _PI_FUNCTION_CNTRL_M_IOCS0@GOTPAGE
Lloh60:
	ldr	x10, [x10, _PI_FUNCTION_CNTRL_M_IOCS0@GOTPAGEOFF]
	cmp	w25, #0
	csel	x9, x9, x10, ne
	ldr	w9, [x9]
	orr	w0, w9, w8
Lloh61:
	adrp	x8, _PI_ESIC_K_FUNCTION_CNTRL@GOTPAGE
Lloh62:
	ldr	x8, [x8, _PI_ESIC_K_FUNCTION_CNTRL@GOTPAGEOFF]
Lloh63:
	ldr	x8, [x8]
	add	x1, x8, x23
	bl	_outb
Lloh64:
	adrp	x8, _PI_SLOT_CNTRL_M_ENB@GOTPAGE
Lloh65:
	ldr	x8, [x8, _PI_SLOT_CNTRL_M_ENB@GOTPAGEOFF]
Lloh66:
	ldr	w0, [x8]
	ldr	x8, [x26]
	add	x1, x8, x23
	bl	_outb
	ldr	x8, [x27]
	add	x0, x8, x23
	bl	_inb
Lloh67:
	adrp	x8, _PI_BURST_HOLDOFF_M_MEM_MAP@GOTPAGE
Lloh68:
	ldr	x8, [x8, _PI_BURST_HOLDOFF_M_MEM_MAP@GOTPAGEOFF]
Lloh69:
	ldr	w8, [x8]
	bic	w9, w0, w8
	orr	w8, w8, w0
	cmp	w25, #0
	csel	w0, w8, w9, ne
	ldr	x8, [x27]
	add	x1, x8, x23
	bl	_outb
	ldr	x8, [x24]
	add	x0, x8, x23
	bl	_inb
Lloh70:
	adrp	x8, _PI_CONFIG_STAT_0_M_INT_ENB@GOTPAGE
Lloh71:
	ldr	x8, [x8, _PI_CONFIG_STAT_0_M_INT_ENB@GOTPAGEOFF]
Lloh72:
	ldr	w8, [x8]
	orr	w0, w8, w0
	str	w0, [sp, #12]
	ldr	x8, [x24]
	add	x1, x8, x23
	bl	_outb
LBB0_6:
	cbz	w22, LBB0_10
; %bb.7:
	mov	x0, x21
	bl	_to_pci_dev
	mov	x21, x0
	ldr	w8, [x0]
	str	w8, [x20]
Lloh73:
	adrp	x20, _PCI_LATENCY_TIMER@GOTPAGE
Lloh74:
	ldr	x20, [x20, _PCI_LATENCY_TIMER@GOTPAGEOFF]
	ldr	w1, [x20]
	add	x2, sp, #12
	bl	_pci_read_config_byte
	ldr	w8, [sp, #12]
Lloh75:
	adrp	x9, _PFI_K_LAT_TIMER_MIN@GOTPAGE
Lloh76:
	ldr	x9, [x9, _PFI_K_LAT_TIMER_MIN@GOTPAGEOFF]
Lloh77:
	ldr	w9, [x9]
	cmp	w8, w9
	b.ge	LBB0_9
; %bb.8:
Lloh78:
	adrp	x8, _PFI_K_LAT_TIMER_DEF@GOTPAGE
Lloh79:
	ldr	x8, [x8, _PFI_K_LAT_TIMER_DEF@GOTPAGEOFF]
Lloh80:
	ldr	w2, [x8]
	str	w2, [sp, #12]
	ldr	w1, [x20]
	mov	x0, x21
	bl	_pci_write_config_byte
LBB0_9:
Lloh81:
	adrp	x8, _PFI_MODE_M_PDQ_INT_ENB@GOTPAGE
Lloh82:
	ldr	x8, [x8, _PFI_MODE_M_PDQ_INT_ENB@GOTPAGEOFF]
Lloh83:
	ldr	w8, [x8]
Lloh84:
	adrp	x9, _PFI_MODE_M_DMA_ENB@GOTPAGE
Lloh85:
	ldr	x9, [x9, _PFI_MODE_M_DMA_ENB@GOTPAGEOFF]
Lloh86:
	ldr	w9, [x9]
	orr	w2, w9, w8
	str	w2, [sp, #12]
Lloh87:
	adrp	x8, _PFI_K_REG_MODE_CTRL@GOTPAGE
Lloh88:
	ldr	x8, [x8, _PFI_K_REG_MODE_CTRL@GOTPAGEOFF]
Lloh89:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_dfx_port_write_long
LBB0_10:
	ldp	x29, x30, [sp, #96]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #80]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #64]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #48]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #32]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #112
	ret
	.loh AdrpAdd	Lloh3, Lloh4
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGot	Lloh7, Lloh8
	.loh AdrpLdrGot	Lloh5, Lloh6
	.loh AdrpAdd	Lloh15, Lloh16
	.loh AdrpLdrGotLdr	Lloh70, Lloh71, Lloh72
	.loh AdrpLdrGotLdr	Lloh67, Lloh68, Lloh69
	.loh AdrpLdrGotLdr	Lloh64, Lloh65, Lloh66
	.loh AdrpLdrGotLdr	Lloh61, Lloh62, Lloh63
	.loh AdrpLdrGot	Lloh59, Lloh60
	.loh AdrpLdrGot	Lloh57, Lloh58
	.loh AdrpLdrGotLdr	Lloh54, Lloh55, Lloh56
	.loh AdrpLdrGotLdr	Lloh51, Lloh52, Lloh53
	.loh AdrpLdrGotLdr	Lloh48, Lloh49, Lloh50
	.loh AdrpLdrGotLdr	Lloh45, Lloh46, Lloh47
	.loh AdrpLdrGotLdr	Lloh42, Lloh43, Lloh44
	.loh AdrpLdrGot	Lloh40, Lloh41
	.loh AdrpLdrGotLdr	Lloh37, Lloh38, Lloh39
	.loh AdrpLdrGotLdr	Lloh34, Lloh35, Lloh36
	.loh AdrpLdrGotLdr	Lloh31, Lloh32, Lloh33
	.loh AdrpLdrGotLdr	Lloh28, Lloh29, Lloh30
	.loh AdrpLdrGot	Lloh26, Lloh27
	.loh AdrpLdrGotLdr	Lloh23, Lloh24, Lloh25
	.loh AdrpLdrGotLdr	Lloh20, Lloh21, Lloh22
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh19
	.loh AdrpLdrGotLdr	Lloh75, Lloh76, Lloh77
	.loh AdrpLdrGot	Lloh73, Lloh74
	.loh AdrpLdrGotLdr	Lloh78, Lloh79, Lloh80
	.loh AdrpLdrGotLdr	Lloh87, Lloh88, Lloh89
	.loh AdrpLdrGotLdr	Lloh84, Lloh85, Lloh86
	.loh AdrpLdrGotLdr	Lloh81, Lloh82, Lloh83
	.cfi_endproc
                                        ; -- End function
	.comm	_DFX_MMIO,8,3                   ; @DFX_MMIO
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"In dfx_bus_init...\n"

	.comm	_PI_ESIC_K_SLOT_CNTRL,8,3       ; @PI_ESIC_K_SLOT_CNTRL
	.comm	_PI_ESIC_K_IO_CONFIG_STAT_0,8,3 ; @PI_ESIC_K_IO_CONFIG_STAT_0
	.comm	_PI_CONFIG_STAT_0_M_IRQ,4,2     ; @PI_CONFIG_STAT_0_M_IRQ
	.comm	_PI_CONFIG_STAT_0_V_IRQ,4,2     ; @PI_CONFIG_STAT_0_V_IRQ
	.comm	_PI_ESIC_K_IO_ADD_CMP_0_1,8,3   ; @PI_ESIC_K_IO_ADD_CMP_0_1
	.comm	_PI_DEFEA_K_CSR_IO,4,2          ; @PI_DEFEA_K_CSR_IO
	.comm	_PI_ESIC_K_IO_ADD_CMP_0_0,8,3   ; @PI_ESIC_K_IO_ADD_CMP_0_0
	.comm	_PI_IO_CMP_M_SLOT,4,2           ; @PI_IO_CMP_M_SLOT
	.comm	_PI_ESIC_K_IO_ADD_MASK_0_1,8,3  ; @PI_ESIC_K_IO_ADD_MASK_0_1
	.comm	_PI_ESIC_K_CSR_IO_LEN,4,2       ; @PI_ESIC_K_CSR_IO_LEN
	.comm	_PI_ESIC_K_IO_ADD_MASK_0_0,8,3  ; @PI_ESIC_K_IO_ADD_MASK_0_0
	.comm	_PI_ESIC_K_IO_ADD_CMP_1_1,8,3   ; @PI_ESIC_K_IO_ADD_CMP_1_1
	.comm	_PI_DEFEA_K_BURST_HOLDOFF,8,3   ; @PI_DEFEA_K_BURST_HOLDOFF
	.comm	_PI_ESIC_K_IO_ADD_CMP_1_0,8,3   ; @PI_ESIC_K_IO_ADD_CMP_1_0
	.comm	_PI_ESIC_K_IO_ADD_MASK_1_1,8,3  ; @PI_ESIC_K_IO_ADD_MASK_1_1
	.comm	_PI_ESIC_K_BURST_HOLDOFF_LEN,4,2 ; @PI_ESIC_K_BURST_HOLDOFF_LEN
	.comm	_PI_ESIC_K_IO_ADD_MASK_1_0,8,3  ; @PI_ESIC_K_IO_ADD_MASK_1_0
	.comm	_PI_FUNCTION_CNTRL_M_IOCS1,4,2  ; @PI_FUNCTION_CNTRL_M_IOCS1
	.comm	_PI_FUNCTION_CNTRL_M_MEMCS1,4,2 ; @PI_FUNCTION_CNTRL_M_MEMCS1
	.comm	_PI_FUNCTION_CNTRL_M_IOCS0,4,2  ; @PI_FUNCTION_CNTRL_M_IOCS0
	.comm	_PI_ESIC_K_FUNCTION_CNTRL,8,3   ; @PI_ESIC_K_FUNCTION_CNTRL
	.comm	_PI_SLOT_CNTRL_M_ENB,4,2        ; @PI_SLOT_CNTRL_M_ENB
	.comm	_PI_BURST_HOLDOFF_M_MEM_MAP,4,2 ; @PI_BURST_HOLDOFF_M_MEM_MAP
	.comm	_PI_CONFIG_STAT_0_M_INT_ENB,4,2 ; @PI_CONFIG_STAT_0_M_INT_ENB
	.comm	_PCI_LATENCY_TIMER,4,2          ; @PCI_LATENCY_TIMER
	.comm	_PFI_K_LAT_TIMER_MIN,4,2        ; @PFI_K_LAT_TIMER_MIN
	.comm	_PFI_K_LAT_TIMER_DEF,4,2        ; @PFI_K_LAT_TIMER_DEF
	.comm	_PFI_MODE_M_PDQ_INT_ENB,4,2     ; @PFI_MODE_M_PDQ_INT_ENB
	.comm	_PFI_MODE_M_DMA_ENB,4,2         ; @PFI_MODE_M_DMA_ENB
	.comm	_PFI_K_REG_MODE_CTRL,4,2        ; @PFI_K_REG_MODE_CTRL
	.no_dead_strip	_dfx_bus_init
	.section	__TEXT,__literal16,16byte_literals
	.p2align	2                               ; @switch.table.dfx_bus_init
l_switch.table.dfx_bus_init:
	.long	9                               ; 0x9
	.long	15                              ; 0xf
	.long	11                              ; 0xb
	.long	10                              ; 0xa

.subsections_via_symbols
