	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function intel_gpio_add_pin_ranges
_intel_gpio_add_pin_ranges:             ## @intel_gpio_add_pin_ranges
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	(%rsi), %eax
	testl	%eax, %eax
	jle	LBB0_6
## %bb.1:
	movq	%rsi, %r12
	movq	%rdi, %r14
	leaq	4(%rdi), %rcx
	movq	%rcx, -48(%rbp)                 ## 8-byte Spill
	xorl	%ebx, %ebx
	xorl	%r13d, %r13d
	jmp	LBB0_2
	.p2align	4, 0x90
LBB0_4:                                 ##   in Loop: Header=BB0_2 Depth=1
	movl	(%r12), %eax
LBB0_5:                                 ##   in Loop: Header=BB0_2 Depth=1
	incq	%r13
	movslq	%eax, %rcx
	addq	$16, %rbx
	cmpq	%rcx, %r13
	jge	LBB0_6
LBB0_2:                                 ## =>This Inner Loop Header: Depth=1
	movq	8(%r12), %r15
	cmpq	$0, (%r15,%rbx)
	js	LBB0_5
## %bb.3:                               ##   in Loop: Header=BB0_2 Depth=1
	movl	(%r14), %edi
	callq	_dev_name
	movq	(%r15,%rbx), %rdx
	movl	12(%r15,%rbx), %ecx
	movl	8(%r15,%rbx), %r8d
	movq	-48(%rbp), %rdi                 ## 8-byte Reload
	movl	%eax, %esi
	callq	_gpiochip_add_pin_range
	testl	%eax, %eax
	je	LBB0_4
	jmp	LBB0_7
LBB0_6:
	xorl	%eax, %eax
LBB0_7:
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.no_dead_strip	_intel_gpio_add_pin_ranges
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function intel_gpio_add_pin_ranges
_intel_gpio_add_pin_ranges:             ; @intel_gpio_add_pin_ranges
	.cfi_startproc
; %bb.0:
	stp	x24, x23, [sp, #-64]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	ldr	w8, [x1]
	cmp	w8, #1
	b.lt	LBB0_6
; %bb.1:
	mov	x19, x1
	mov	x20, x0
	mov	x22, #0
	mov	x23, #0
	add	x21, x0, #4
	b	LBB0_4
LBB0_2:                                 ;   in Loop: Header=BB0_4 Depth=1
	ldr	w8, [x19]
LBB0_3:                                 ;   in Loop: Header=BB0_4 Depth=1
	add	x23, x23, #1
	add	x22, x22, #16
	cmp	x23, w8, sxtw
	b.ge	LBB0_6
LBB0_4:                                 ; =>This Inner Loop Header: Depth=1
	ldr	x24, [x19, #8]
	ldr	x9, [x24, x22]
	tbnz	x9, #63, LBB0_3
; %bb.5:                                ;   in Loop: Header=BB0_4 Depth=1
	ldr	w0, [x20]
	bl	_dev_name
	mov	x1, x0
	add	x8, x24, x22
	ldr	x2, [x8]
	ldp	w4, w3, [x8, #8]
	mov	x0, x21
	bl	_gpiochip_add_pin_range
	cbz	w0, LBB0_2
	b	LBB0_7
LBB0_6:
	mov	w0, #0
LBB0_7:
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	ret
	.cfi_endproc
                                        ; -- End function
	.no_dead_strip	_intel_gpio_add_pin_ranges
.subsections_via_symbols
