	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function rt2800_init_rfcsr_3593
_rt2800_init_rfcsr_3593:                ## @rt2800_init_rfcsr_3593
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %rbx
	movq	(%rdi), %r12
	movq	_GPIO_SWITCH@GOTPCREL(%rip), %r15
	movl	(%r15), %esi
	callq	_rt2800_register_read
	movl	%eax, -44(%rbp)
	movq	_GPIO_SWITCH_4@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	leaq	-44(%rbp), %r14
	movq	%r14, %rdi
	xorl	%edx, %edx
	callq	_rt2x00_set_field32
	movq	_GPIO_SWITCH_7@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	xorl	%edx, %edx
	callq	_rt2x00_set_field32
	movl	(%r15), %esi
	movl	-44(%rbp), %edx
	movq	%rbx, %rdi
	callq	_rt2800_register_write
	movq	%rbx, %rdi
	movl	$1, %esi
	movl	$3, %edx
	callq	_rt2800_rfcsr_write
	movq	%rbx, %rdi
	movl	$3, %esi
	movl	$128, %edx
	callq	_rt2800_rfcsr_write
	movq	%rbx, %rdi
	movl	$5, %esi
	xorl	%edx, %edx
	callq	_rt2800_rfcsr_write
	movq	%rbx, %rdi
	movl	$6, %esi
	movl	$64, %edx
	callq	_rt2800_rfcsr_write
	movq	%rbx, %rdi
	movl	$8, %esi
	movl	$241, %edx
	callq	_rt2800_rfcsr_write
	movq	%rbx, %rdi
	movl	$9, %esi
	movl	$2, %edx
	callq	_rt2800_rfcsr_write
	movq	%rbx, %rdi
	movl	$10, %esi
	movl	$211, %edx
	callq	_rt2800_rfcsr_write
	movq	%rbx, %rdi
	movl	$11, %esi
	movl	$64, %edx
	callq	_rt2800_rfcsr_write
	movq	%rbx, %rdi
	movl	$12, %esi
	movl	$78, %edx
	callq	_rt2800_rfcsr_write
	movq	%rbx, %rdi
	movl	$13, %esi
	movl	$18, %edx
	callq	_rt2800_rfcsr_write
	movq	%rbx, %rdi
	movl	$18, %esi
	movl	$64, %edx
	callq	_rt2800_rfcsr_write
	movq	%rbx, %rdi
	movl	$22, %esi
	movl	$32, %edx
	callq	_rt2800_rfcsr_write
	movq	%rbx, %rdi
	movl	$30, %esi
	movl	$16, %edx
	callq	_rt2800_rfcsr_write
	movq	%rbx, %rdi
	movl	$31, %esi
	movl	$128, %edx
	callq	_rt2800_rfcsr_write
	movq	%rbx, %rdi
	movl	$32, %esi
	movl	$120, %edx
	callq	_rt2800_rfcsr_write
	movq	%rbx, %rdi
	movl	$33, %esi
	movl	$59, %edx
	callq	_rt2800_rfcsr_write
	movq	%rbx, %rdi
	movl	$34, %esi
	movl	$60, %edx
	callq	_rt2800_rfcsr_write
	movq	%rbx, %rdi
	movl	$35, %esi
	movl	$224, %edx
	callq	_rt2800_rfcsr_write
	movq	%rbx, %rdi
	movl	$38, %esi
	movl	$134, %edx
	callq	_rt2800_rfcsr_write
	movq	%rbx, %rdi
	movl	$39, %esi
	movl	$35, %edx
	callq	_rt2800_rfcsr_write
	movq	%rbx, %rdi
	movl	$44, %esi
	movl	$211, %edx
	callq	_rt2800_rfcsr_write
	movq	%rbx, %rdi
	movl	$45, %esi
	movl	$187, %edx
	callq	_rt2800_rfcsr_write
	movq	%rbx, %rdi
	movl	$46, %esi
	movl	$96, %edx
	callq	_rt2800_rfcsr_write
	movq	%rbx, %rdi
	movl	$49, %esi
	movl	$142, %edx
	callq	_rt2800_rfcsr_write
	movq	%rbx, %rdi
	movl	$50, %esi
	movl	$134, %edx
	callq	_rt2800_rfcsr_write
	movq	%rbx, %rdi
	movl	$51, %esi
	movl	$117, %edx
	callq	_rt2800_rfcsr_write
	movq	%rbx, %rdi
	movl	$52, %esi
	movl	$69, %edx
	callq	_rt2800_rfcsr_write
	movq	%rbx, %rdi
	movl	$53, %esi
	movl	$24, %edx
	callq	_rt2800_rfcsr_write
	movq	%rbx, %rdi
	movl	$54, %esi
	movl	$24, %edx
	callq	_rt2800_rfcsr_write
	movq	%rbx, %rdi
	movl	$55, %esi
	movl	$24, %edx
	callq	_rt2800_rfcsr_write
	movq	%rbx, %rdi
	movl	$56, %esi
	movl	$219, %edx
	callq	_rt2800_rfcsr_write
	movq	%rbx, %rdi
	movl	$57, %esi
	movl	$110, %edx
	callq	_rt2800_rfcsr_write
	movq	%rbx, %rdi
	movl	$2, %esi
	callq	_rt2800_rfcsr_read
	movl	%eax, -48(%rbp)
	movq	_RFCSR2_RESCAL_EN@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	leaq	-48(%rbp), %r15
	movq	%r15, %rdi
	movl	$1, %edx
	callq	_rt2x00_set_field8
	movl	-48(%rbp), %edx
	movq	%rbx, %rdi
	movl	$2, %esi
	callq	_rt2800_rfcsr_write
	movq	%rbx, %rdi
	callq	_rt2800_freq_cal_mode1
	movq	%rbx, %rdi
	movl	$18, %esi
	callq	_rt2800_rfcsr_read
	movl	%eax, -48(%rbp)
	movq	_RFCSR18_XO_TUNE_BYPASS@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r15, %rdi
	movl	$1, %edx
	callq	_rt2x00_set_field8
	movl	-48(%rbp), %edx
	movq	%rbx, %rdi
	movl	$18, %esi
	callq	_rt2800_rfcsr_write
	movq	_LDO_CFG0@GOTPCREL(%rip), %r15
	movl	(%r15), %esi
	movq	%rbx, %rdi
	callq	_rt2800_register_read
	movl	%eax, -44(%rbp)
	movq	_LDO_CFG0_LDO_CORE_VLEVEL@GOTPCREL(%rip), %r13
	movl	(%r13), %esi
	movq	%r14, %rdi
	movl	$3, %edx
	callq	_rt2x00_set_field32
	movq	_LDO_CFG0_BGSEL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	movl	$1, %edx
	callq	_rt2x00_set_field32
	movl	(%r15), %esi
	movl	-44(%rbp), %edx
	movq	%rbx, %rdi
	callq	_rt2800_register_write
	movl	$1000, %edi                     ## imm = 0x3E8
	movl	$1500, %esi                     ## imm = 0x5DC
	callq	_usleep_range
	movl	(%r15), %esi
	movq	%rbx, %rdi
	callq	_rt2800_register_read
	movl	%eax, -44(%rbp)
	movl	(%r13), %esi
	movq	%r14, %rdi
	xorl	%edx, %edx
	callq	_rt2x00_set_field32
	movl	(%r15), %esi
	movl	-44(%rbp), %edx
	movq	%rbx, %rdi
	callq	_rt2800_register_write
	movabsq	$201863462943, %rax             ## imm = 0x2F0000001F
	movq	%rax, (%r12)
	movq	%rbx, %rdi
	movl	$25, %esi
	callq	_rt2800_bbp_read
	movq	%rax, 16(%r12)
	movq	%rbx, %rdi
	movl	$26, %esi
	callq	_rt2800_bbp_read
	movq	%rax, 8(%r12)
	movq	%rbx, %rdi
	callq	_rt2800_led_open_drain_enable
	movq	%rbx, %rdi
	callq	_rt2800_normal_mode_setup_3593
	movq	%rbx, %rdi
	callq	_rt3593_post_bbp_init
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_GPIO_SWITCH,4,2                ## @GPIO_SWITCH
	.comm	_GPIO_SWITCH_4,4,2              ## @GPIO_SWITCH_4
	.comm	_GPIO_SWITCH_7,4,2              ## @GPIO_SWITCH_7
	.comm	_RFCSR2_RESCAL_EN,4,2           ## @RFCSR2_RESCAL_EN
	.comm	_RFCSR18_XO_TUNE_BYPASS,4,2     ## @RFCSR18_XO_TUNE_BYPASS
	.comm	_LDO_CFG0,4,2                   ## @LDO_CFG0
	.comm	_LDO_CFG0_LDO_CORE_VLEVEL,4,2   ## @LDO_CFG0_LDO_CORE_VLEVEL
	.comm	_LDO_CFG0_BGSEL,4,2             ## @LDO_CFG0_BGSEL
	.no_dead_strip	_rt2800_init_rfcsr_3593
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.section	__TEXT,__literal8,8byte_literals
	.p2align	3                               ; -- Begin function rt2800_init_rfcsr_3593
lCPI0_0:
	.long	31                              ; 0x1f
	.long	47                              ; 0x2f
	.section	__TEXT,__text,regular,pure_instructions
	.p2align	2
_rt2800_init_rfcsr_3593:                ; @rt2800_init_rfcsr_3593
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #64
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x0
	ldr	x20, [x0]
Lloh0:
	adrp	x21, _GPIO_SWITCH@GOTPAGE
Lloh1:
	ldr	x21, [x21, _GPIO_SWITCH@GOTPAGEOFF]
	ldr	w1, [x21]
	bl	_rt2800_register_read
	str	w0, [sp, #12]
Lloh2:
	adrp	x8, _GPIO_SWITCH_4@GOTPAGE
Lloh3:
	ldr	x8, [x8, _GPIO_SWITCH_4@GOTPAGEOFF]
Lloh4:
	ldr	w1, [x8]
	add	x0, sp, #12
	mov	w2, #0
	bl	_rt2x00_set_field32
Lloh5:
	adrp	x8, _GPIO_SWITCH_7@GOTPAGE
Lloh6:
	ldr	x8, [x8, _GPIO_SWITCH_7@GOTPAGEOFF]
Lloh7:
	ldr	w1, [x8]
	add	x0, sp, #12
	mov	w2, #0
	bl	_rt2x00_set_field32
	ldr	w1, [x21]
	ldr	w2, [sp, #12]
	mov	x0, x19
	bl	_rt2800_register_write
	mov	x0, x19
	mov	w1, #1
	mov	w2, #3
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #3
	mov	w2, #128
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #5
	mov	w2, #0
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #6
	mov	w2, #64
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #8
	mov	w2, #241
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #9
	mov	w2, #2
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #10
	mov	w2, #211
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #11
	mov	w2, #64
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #12
	mov	w2, #78
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #13
	mov	w2, #18
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #18
	mov	w2, #64
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #22
	mov	w2, #32
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #30
	mov	w2, #16
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #31
	mov	w2, #128
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #32
	mov	w2, #120
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #33
	mov	w2, #59
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #34
	mov	w2, #60
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #35
	mov	w2, #224
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #38
	mov	w2, #134
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #39
	mov	w2, #35
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #44
	mov	w2, #211
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #45
	mov	w2, #187
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #46
	mov	w2, #96
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #49
	mov	w2, #142
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #50
	mov	w2, #134
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #51
	mov	w2, #117
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #52
	mov	w2, #69
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #53
	mov	w2, #24
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #54
	mov	w2, #24
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #55
	mov	w2, #24
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #56
	mov	w2, #219
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #57
	mov	w2, #110
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #2
	bl	_rt2800_rfcsr_read
	str	w0, [sp, #8]
Lloh8:
	adrp	x8, _RFCSR2_RESCAL_EN@GOTPAGE
Lloh9:
	ldr	x8, [x8, _RFCSR2_RESCAL_EN@GOTPAGEOFF]
Lloh10:
	ldr	w1, [x8]
	add	x0, sp, #8
	mov	w2, #1
	bl	_rt2x00_set_field8
	ldr	w2, [sp, #8]
	mov	x0, x19
	mov	w1, #2
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	bl	_rt2800_freq_cal_mode1
	mov	x0, x19
	mov	w1, #18
	bl	_rt2800_rfcsr_read
	str	w0, [sp, #8]
Lloh11:
	adrp	x8, _RFCSR18_XO_TUNE_BYPASS@GOTPAGE
Lloh12:
	ldr	x8, [x8, _RFCSR18_XO_TUNE_BYPASS@GOTPAGEOFF]
Lloh13:
	ldr	w1, [x8]
	add	x0, sp, #8
	mov	w2, #1
	bl	_rt2x00_set_field8
	ldr	w2, [sp, #8]
	mov	x0, x19
	mov	w1, #18
	bl	_rt2800_rfcsr_write
Lloh14:
	adrp	x21, _LDO_CFG0@GOTPAGE
Lloh15:
	ldr	x21, [x21, _LDO_CFG0@GOTPAGEOFF]
	ldr	w1, [x21]
	mov	x0, x19
	bl	_rt2800_register_read
	str	w0, [sp, #12]
Lloh16:
	adrp	x22, _LDO_CFG0_LDO_CORE_VLEVEL@GOTPAGE
Lloh17:
	ldr	x22, [x22, _LDO_CFG0_LDO_CORE_VLEVEL@GOTPAGEOFF]
	ldr	w1, [x22]
	add	x0, sp, #12
	mov	w2, #3
	bl	_rt2x00_set_field32
Lloh18:
	adrp	x8, _LDO_CFG0_BGSEL@GOTPAGE
Lloh19:
	ldr	x8, [x8, _LDO_CFG0_BGSEL@GOTPAGEOFF]
Lloh20:
	ldr	w1, [x8]
	add	x0, sp, #12
	mov	w2, #1
	bl	_rt2x00_set_field32
	ldr	w1, [x21]
	ldr	w2, [sp, #12]
	mov	x0, x19
	bl	_rt2800_register_write
	mov	w0, #1000
	mov	w1, #1500
	bl	_usleep_range
	ldr	w1, [x21]
	mov	x0, x19
	bl	_rt2800_register_read
	str	w0, [sp, #12]
	ldr	w1, [x22]
	add	x0, sp, #12
	mov	w2, #0
	bl	_rt2x00_set_field32
	ldr	w1, [x21]
	ldr	w2, [sp, #12]
	mov	x0, x19
	bl	_rt2800_register_write
Lloh21:
	adrp	x8, lCPI0_0@PAGE
Lloh22:
	ldr	d0, [x8, lCPI0_0@PAGEOFF]
	str	d0, [x20]
	mov	x0, x19
	mov	w1, #25
	bl	_rt2800_bbp_read
	str	x0, [x20, #16]
	mov	x0, x19
	mov	w1, #26
	bl	_rt2800_bbp_read
	str	x0, [x20, #8]
	mov	x0, x19
	bl	_rt2800_led_open_drain_enable
	mov	x0, x19
	bl	_rt2800_normal_mode_setup_3593
	mov	x0, x19
	bl	_rt3593_post_bbp_init
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #64
	ret
	.loh AdrpLdr	Lloh21, Lloh22
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGot	Lloh16, Lloh17
	.loh AdrpLdrGot	Lloh14, Lloh15
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGot	Lloh0, Lloh1
	.cfi_endproc
                                        ; -- End function
	.comm	_GPIO_SWITCH,4,2                ; @GPIO_SWITCH
	.comm	_GPIO_SWITCH_4,4,2              ; @GPIO_SWITCH_4
	.comm	_GPIO_SWITCH_7,4,2              ; @GPIO_SWITCH_7
	.comm	_RFCSR2_RESCAL_EN,4,2           ; @RFCSR2_RESCAL_EN
	.comm	_RFCSR18_XO_TUNE_BYPASS,4,2     ; @RFCSR18_XO_TUNE_BYPASS
	.comm	_LDO_CFG0,4,2                   ; @LDO_CFG0
	.comm	_LDO_CFG0_LDO_CORE_VLEVEL,4,2   ; @LDO_CFG0_LDO_CORE_VLEVEL
	.comm	_LDO_CFG0_BGSEL,4,2             ; @LDO_CFG0_BGSEL
	.no_dead_strip	_rt2800_init_rfcsr_3593
.subsections_via_symbols
