	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function netxen_pcie_strap_init
_netxen_pcie_strap_init:                ## @netxen_pcie_strap_init
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$24, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r12
	movl	$0, -44(%rbp)
	movq	8(%rdi), %r13
	movq	_PCIE_CHICKEN3@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_NETXEN_PCIE_REG
	movq	%r12, %rdi
	movl	%eax, %esi
	callq	_NXRD32
	movl	%eax, %ebx
	andl	$-50331649, %ebx                ## imm = 0xFCFFFFFF
	movq	_PCI_CAP_ID_GEN@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r13, %rdi
	callq	_pci_find_capability
	movl	%eax, -52(%rbp)                 ## 4-byte Spill
	cmpl	$192, %eax
	jne	LBB0_2
## %bb.1:
	leaq	-44(%rbp), %rdx
	movq	%r13, %rdi
	movl	$208, %esi
	callq	_pci_read_config_dword
	movl	$983040, %eax                   ## imm = 0xF0000
	andl	-44(%rbp), %eax
	movl	%ebx, %r15d
	orl	$16777216, %r15d                ## imm = 0x1000000
	cmpl	$131072, %eax                   ## imm = 0x20000
	cmovel	%ebx, %r15d
	movq	8(%r12), %rdi
	addq	$4, %rdi
	leaq	L_.str(%rip), %rsi
	callq	_dev_info
	movl	$987136, -48(%rbp)              ## 4-byte Folded Spill
                                        ## imm = 0xF1000
	xorl	%r14d, %r14d
	jmp	LBB0_3
LBB0_2:
	orl	$16777216, %ebx                 ## imm = 0x1000000
	movq	8(%r12), %rdi
	addq	$4, %rdi
	leaq	L_.str.1(%rip), %rsi
	callq	_dev_info
	movq	(%r12), %rax
	movq	_NX_P3_B0@GOTPCREL(%rip), %rcx
	xorl	%edx, %edx
	cmpq	(%rcx), %rax
	setne	%r14b
	movl	$987168, %eax                   ## imm = 0xF1020
	cmovnel	%edx, %eax
	movl	%eax, -48(%rbp)                 ## 4-byte Spill
	movl	%ebx, %r15d
LBB0_3:
	movq	_PCIE_CHICKEN3@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_NETXEN_PCIE_REG
	movq	%r12, %rdi
	movl	%eax, %esi
	movl	%r15d, %edx
	callq	_NXWR32
	testb	%r14b, %r14b
	jne	LBB0_6
## %bb.4:
	movl	(%r13), %r14d
	testb	$7, %r14b
	jne	LBB0_6
## %bb.5:
	movl	-52(%rbp), %ebx                 ## 4-byte Reload
	addl	$8, %ebx
	leaq	-44(%rbp), %r12
	movq	%r13, %rdi
	movl	%ebx, %esi
	movq	%r12, %rdx
	callq	_pci_read_config_dword
	movq	%r13, %rdi
	movl	%ebx, %esi
	movq	%r12, %rdx
	callq	_pci_read_config_dword
	movq	%r13, %rdi
	movl	%ebx, %esi
	movl	-48(%rbp), %r15d                ## 4-byte Reload
	movl	%r15d, %edx
	callq	_pci_write_config_dword
	incl	(%r13)
	movq	%r13, %rdi
	movl	%ebx, %esi
	movq	%r12, %rdx
	callq	_pci_read_config_dword
	movq	%r13, %rdi
	movl	%ebx, %esi
	movq	%r12, %rdx
	callq	_pci_read_config_dword
	movq	%r13, %rdi
	movl	%ebx, %esi
	movl	%r15d, %edx
	callq	_pci_write_config_dword
	incl	(%r13)
	movq	%r13, %rdi
	movl	%ebx, %esi
	movq	%r12, %rdx
	callq	_pci_read_config_dword
	movq	%r13, %rdi
	movl	%ebx, %esi
	movq	%r12, %rdx
	callq	_pci_read_config_dword
	movq	%r13, %rdi
	movl	%ebx, %esi
	movl	%r15d, %edx
	callq	_pci_write_config_dword
	incl	(%r13)
	movq	%r13, %rdi
	movl	%ebx, %esi
	movq	%r12, %rdx
	callq	_pci_read_config_dword
	movq	%r13, %rdi
	movl	%ebx, %esi
	movq	%r12, %rdx
	callq	_pci_read_config_dword
	movq	%r13, %rdi
	movl	%ebx, %esi
	movl	%r15d, %edx
	callq	_pci_write_config_dword
	incl	(%r13)
	movq	%r13, %rdi
	movl	%ebx, %esi
	movq	%r12, %rdx
	callq	_pci_read_config_dword
	movq	%r13, %rdi
	movl	%ebx, %esi
	movq	%r12, %rdx
	callq	_pci_read_config_dword
	movq	%r13, %rdi
	movl	%ebx, %esi
	movl	%r15d, %edx
	callq	_pci_write_config_dword
	incl	(%r13)
	movq	%r13, %rdi
	movl	%ebx, %esi
	movq	%r12, %rdx
	callq	_pci_read_config_dword
	movq	%r13, %rdi
	movl	%ebx, %esi
	movq	%r12, %rdx
	callq	_pci_read_config_dword
	movq	%r13, %rdi
	movl	%ebx, %esi
	movl	%r15d, %edx
	callq	_pci_write_config_dword
	incl	(%r13)
	movq	%r13, %rdi
	movl	%ebx, %esi
	movq	%r12, %rdx
	callq	_pci_read_config_dword
	movq	%r13, %rdi
	movl	%ebx, %esi
	movq	%r12, %rdx
	callq	_pci_read_config_dword
	movq	%r13, %rdi
	movl	%ebx, %esi
	movl	%r15d, %edx
	callq	_pci_write_config_dword
	incl	(%r13)
	movq	%r13, %rdi
	movl	%ebx, %esi
	movq	%r12, %rdx
	callq	_pci_read_config_dword
	movq	%r13, %rdi
	movl	%ebx, %esi
	movq	%r12, %rdx
	callq	_pci_read_config_dword
	movq	%r13, %rdi
	movl	%ebx, %esi
	movl	%r15d, %edx
	callq	_pci_write_config_dword
	movl	%r14d, (%r13)
LBB0_6:
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_PCIE_CHICKEN3,4,2              ## @PCIE_CHICKEN3
	.comm	_PCI_CAP_ID_GEN,4,2             ## @PCI_CAP_ID_GEN
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"Gen2 strapping detected\n"

L_.str.1:                               ## @.str.1
	.asciz	"Gen1 strapping detected\n"

	.comm	_NX_P3_B0,8,3                   ## @NX_P3_B0
	.no_dead_strip	_netxen_pcie_strap_init
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function netxen_pcie_strap_init
_netxen_pcie_strap_init:                ; @netxen_pcie_strap_init
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #96
	.cfi_def_cfa_offset 96
	stp	x26, x25, [sp, #16]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #32]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #48]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #64]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #80]             ; 16-byte Folded Spill
	add	x29, sp, #80
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	mov	x21, x0
	mov	w20, #4096
	movk	w20, #15, lsl #16
	str	wzr, [sp, #12]
	ldr	x19, [x0, #8]
Lloh0:
	adrp	x24, _PCIE_CHICKEN3@GOTPAGE
Lloh1:
	ldr	x24, [x24, _PCIE_CHICKEN3@GOTPAGEOFF]
	ldr	w0, [x24]
	bl	_NETXEN_PCIE_REG
	mov	x1, x0
	mov	x0, x21
	bl	_NXRD32
	and	w23, w0, #0xfcffffff
Lloh2:
	adrp	x8, _PCI_CAP_ID_GEN@GOTPAGE
Lloh3:
	ldr	x8, [x8, _PCI_CAP_ID_GEN@GOTPAGEOFF]
Lloh4:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_pci_find_capability
	mov	x22, x0
	cmp	w0, #192
	b.ne	LBB0_2
; %bb.1:
	add	x2, sp, #12
	mov	x0, x19
	mov	w1, #208
	bl	_pci_read_config_dword
	ldr	w8, [sp, #12]
	and	w8, w8, #0xf0000
	orr	w9, w23, #0x1000000
	cmp	w8, #32, lsl #12                ; =131072
	csel	w23, w23, w9, eq
	ldr	x8, [x21, #8]
	add	x0, x8, #4
Lloh5:
	adrp	x1, l_.str@PAGE
Lloh6:
	add	x1, x1, l_.str@PAGEOFF
	bl	_dev_info
	mov	w25, #0
	b	LBB0_3
LBB0_2:
	orr	w23, w23, #0x1000000
	ldr	x8, [x21, #8]
	add	x0, x8, #4
Lloh7:
	adrp	x1, l_.str.1@PAGE
Lloh8:
	add	x1, x1, l_.str.1@PAGEOFF
	bl	_dev_info
Lloh9:
	adrp	x8, _NX_P3_B0@GOTPAGE
Lloh10:
	ldr	x8, [x8, _NX_P3_B0@GOTPAGEOFF]
	ldr	x9, [x21]
Lloh11:
	ldr	x8, [x8]
	cmp	x9, x8
	cset	w25, ne
	add	w8, w20, #32
	csel	w20, w8, wzr, eq
LBB0_3:
	ldr	w0, [x24]
	bl	_NETXEN_PCIE_REG
	mov	x1, x0
	mov	x0, x21
	mov	x2, x23
	bl	_NXWR32
	tbnz	w25, #0, LBB0_6
; %bb.4:
	ldr	w23, [x19]
	tst	w23, #0x7
	b.ne	LBB0_6
; %bb.5:
	add	w21, w22, #8
	add	x2, sp, #12
	mov	x0, x19
	mov	x1, x21
	bl	_pci_read_config_dword
	add	x2, sp, #12
	mov	x0, x19
	mov	x1, x21
	bl	_pci_read_config_dword
	mov	x0, x19
	mov	x1, x21
	mov	x2, x20
	bl	_pci_write_config_dword
	ldr	w8, [x19]
	add	w8, w8, #1
	str	w8, [x19]
	add	x2, sp, #12
	mov	x0, x19
	mov	x1, x21
	bl	_pci_read_config_dword
	add	x2, sp, #12
	mov	x0, x19
	mov	x1, x21
	bl	_pci_read_config_dword
	mov	x0, x19
	mov	x1, x21
	mov	x2, x20
	bl	_pci_write_config_dword
	ldr	w8, [x19]
	add	w8, w8, #1
	str	w8, [x19]
	add	x2, sp, #12
	mov	x0, x19
	mov	x1, x21
	bl	_pci_read_config_dword
	add	x2, sp, #12
	mov	x0, x19
	mov	x1, x21
	bl	_pci_read_config_dword
	mov	x0, x19
	mov	x1, x21
	mov	x2, x20
	bl	_pci_write_config_dword
	ldr	w8, [x19]
	add	w8, w8, #1
	str	w8, [x19]
	add	x2, sp, #12
	mov	x0, x19
	mov	x1, x21
	bl	_pci_read_config_dword
	add	x2, sp, #12
	mov	x0, x19
	mov	x1, x21
	bl	_pci_read_config_dword
	mov	x0, x19
	mov	x1, x21
	mov	x2, x20
	bl	_pci_write_config_dword
	ldr	w8, [x19]
	add	w8, w8, #1
	str	w8, [x19]
	add	x2, sp, #12
	mov	x0, x19
	mov	x1, x21
	bl	_pci_read_config_dword
	add	x2, sp, #12
	mov	x0, x19
	mov	x1, x21
	bl	_pci_read_config_dword
	mov	x0, x19
	mov	x1, x21
	mov	x2, x20
	bl	_pci_write_config_dword
	ldr	w8, [x19]
	add	w8, w8, #1
	str	w8, [x19]
	add	x2, sp, #12
	mov	x0, x19
	mov	x1, x21
	bl	_pci_read_config_dword
	add	x2, sp, #12
	mov	x0, x19
	mov	x1, x21
	bl	_pci_read_config_dword
	mov	x0, x19
	mov	x1, x21
	mov	x2, x20
	bl	_pci_write_config_dword
	ldr	w8, [x19]
	add	w8, w8, #1
	str	w8, [x19]
	add	x2, sp, #12
	mov	x0, x19
	mov	x1, x21
	bl	_pci_read_config_dword
	add	x2, sp, #12
	mov	x0, x19
	mov	x1, x21
	bl	_pci_read_config_dword
	mov	x0, x19
	mov	x1, x21
	mov	x2, x20
	bl	_pci_write_config_dword
	ldr	w8, [x19]
	add	w8, w8, #1
	str	w8, [x19]
	add	x2, sp, #12
	mov	x0, x19
	mov	x1, x21
	bl	_pci_read_config_dword
	add	x2, sp, #12
	mov	x0, x19
	mov	x1, x21
	bl	_pci_read_config_dword
	mov	x0, x19
	mov	x1, x21
	mov	x2, x20
	bl	_pci_write_config_dword
	str	w23, [x19]
LBB0_6:
	ldp	x29, x30, [sp, #80]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #64]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #48]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #32]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #96
	ret
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpAdd	Lloh5, Lloh6
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpAdd	Lloh7, Lloh8
	.cfi_endproc
                                        ; -- End function
	.comm	_PCIE_CHICKEN3,4,2              ; @PCIE_CHICKEN3
	.comm	_PCI_CAP_ID_GEN,4,2             ; @PCI_CAP_ID_GEN
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"Gen2 strapping detected\n"

l_.str.1:                               ; @.str.1
	.asciz	"Gen1 strapping detected\n"

	.comm	_NX_P3_B0,8,3                   ; @NX_P3_B0
	.no_dead_strip	_netxen_pcie_strap_init
.subsections_via_symbols
