	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function ingenic_pinmux_set_pin_fn
_ingenic_pinmux_set_pin_fn:             ## @ingenic_pinmux_set_pin_fn
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%edx, %r14d
	movl	%esi, %r15d
	movq	_PINS_PER_GPIO_CHIP@GOTPCREL(%rip), %rcx
	movl	%esi, %eax
	cltd
	idivl	(%rcx)
	movl	%edx, %ecx
	movq	%rdi, %rbx
	movl	8(%rdi), %edi
	addb	$65, %al
	movsbl	%al, %edx
	leaq	L_.str(%rip), %rsi
	movl	%r14d, %r8d
	callq	_dev_dbg
	movq	(%rbx), %rax
	movq	_ID_X1000@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jge	LBB0_1
## %bb.2:
	movq	_ID_JZ4760@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jge	LBB0_3
## %bb.4:
	movq	_JZ4740_GPIO_FUNC@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	movl	%r15d, %esi
	movl	$1, %ecx
	callq	_ingenic_config_pin
	movq	_JZ4740_GPIO_TRIG@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movl	%r14d, %ecx
	andl	$2, %ecx
	movq	%rbx, %rdi
	movl	%r15d, %esi
	callq	_ingenic_config_pin
	movq	_JZ4740_GPIO_SELECT@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	xorl	%ecx, %ecx
	testl	%r14d, %r14d
	setg	%cl
	movq	%rbx, %rdi
	movl	%r15d, %esi
	jmp	LBB0_5
LBB0_1:
	movq	_JZ4760_GPIO_INT@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	movl	%r15d, %esi
	xorl	%ecx, %ecx
	callq	_ingenic_shadow_config_pin
	movq	_GPIO_MSK@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	movl	%r15d, %esi
	xorl	%ecx, %ecx
	callq	_ingenic_shadow_config_pin
	movq	_JZ4760_GPIO_PAT1@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movl	%r14d, %ecx
	andl	$2, %ecx
	movq	%rbx, %rdi
	movl	%r15d, %esi
	callq	_ingenic_shadow_config_pin
	movq	_JZ4760_GPIO_PAT0@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	andl	$1, %r14d
	movq	%rbx, %rdi
	movl	%r15d, %esi
	movl	%r14d, %ecx
	callq	_ingenic_shadow_config_pin
	movq	%rbx, %rdi
	movl	%r15d, %esi
	callq	_ingenic_shadow_config_pin_load
	jmp	LBB0_6
LBB0_3:
	movq	_JZ4760_GPIO_INT@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	movl	%r15d, %esi
	xorl	%ecx, %ecx
	callq	_ingenic_config_pin
	movq	_GPIO_MSK@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	movl	%r15d, %esi
	xorl	%ecx, %ecx
	callq	_ingenic_config_pin
	movq	_JZ4760_GPIO_PAT1@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movl	%r14d, %ecx
	andl	$2, %ecx
	movq	%rbx, %rdi
	movl	%r15d, %esi
	callq	_ingenic_config_pin
	movq	_JZ4760_GPIO_PAT0@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	andl	$1, %r14d
	movq	%rbx, %rdi
	movl	%r15d, %esi
	movl	%r14d, %ecx
LBB0_5:
	callq	_ingenic_config_pin
LBB0_6:
	xorl	%eax, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_PINS_PER_GPIO_CHIP,4,2         ## @PINS_PER_GPIO_CHIP
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"set pin P%c%u to function %u\n"

	.comm	_ID_X1000,8,3                   ## @ID_X1000
	.comm	_JZ4760_GPIO_INT,4,2            ## @JZ4760_GPIO_INT
	.comm	_GPIO_MSK,4,2                   ## @GPIO_MSK
	.comm	_JZ4760_GPIO_PAT1,4,2           ## @JZ4760_GPIO_PAT1
	.comm	_JZ4760_GPIO_PAT0,4,2           ## @JZ4760_GPIO_PAT0
	.comm	_ID_JZ4760,8,3                  ## @ID_JZ4760
	.comm	_JZ4740_GPIO_FUNC,4,2           ## @JZ4740_GPIO_FUNC
	.comm	_JZ4740_GPIO_TRIG,4,2           ## @JZ4740_GPIO_TRIG
	.comm	_JZ4740_GPIO_SELECT,4,2         ## @JZ4740_GPIO_SELECT
	.no_dead_strip	_ingenic_pinmux_set_pin_fn
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function ingenic_pinmux_set_pin_fn
_ingenic_pinmux_set_pin_fn:             ; @ingenic_pinmux_set_pin_fn
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x21, x2
	mov	x19, x1
	mov	x20, x0
Lloh0:
	adrp	x8, _PINS_PER_GPIO_CHIP@GOTPAGE
Lloh1:
	ldr	x8, [x8, _PINS_PER_GPIO_CHIP@GOTPAGEOFF]
Lloh2:
	ldr	w8, [x8]
	sdiv	w9, w1, w8
	msub	w3, w9, w8, w1
	ldr	w0, [x0, #8]
	add	w8, w9, #65
	sxtb	w2, w8
Lloh3:
	adrp	x1, l_.str@PAGE
Lloh4:
	add	x1, x1, l_.str@PAGEOFF
	mov	x4, x21
	bl	_dev_dbg
	ldr	x8, [x20]
Lloh5:
	adrp	x9, _ID_X1000@GOTPAGE
Lloh6:
	ldr	x9, [x9, _ID_X1000@GOTPAGEOFF]
Lloh7:
	ldr	x9, [x9]
	cmp	x8, x9
	b.ge	LBB0_3
; %bb.1:
Lloh8:
	adrp	x9, _ID_JZ4760@GOTPAGE
Lloh9:
	ldr	x9, [x9, _ID_JZ4760@GOTPAGEOFF]
Lloh10:
	ldr	x9, [x9]
	cmp	x8, x9
	b.ge	LBB0_4
; %bb.2:
Lloh11:
	adrp	x8, _JZ4740_GPIO_FUNC@GOTPAGE
Lloh12:
	ldr	x8, [x8, _JZ4740_GPIO_FUNC@GOTPAGEOFF]
Lloh13:
	ldr	w2, [x8]
	mov	x0, x20
	mov	x1, x19
	mov	w3, #1
	bl	_ingenic_config_pin
Lloh14:
	adrp	x8, _JZ4740_GPIO_TRIG@GOTPAGE
Lloh15:
	ldr	x8, [x8, _JZ4740_GPIO_TRIG@GOTPAGEOFF]
Lloh16:
	ldr	w2, [x8]
	and	w3, w21, #0x2
	mov	x0, x20
	mov	x1, x19
	bl	_ingenic_config_pin
Lloh17:
	adrp	x8, _JZ4740_GPIO_SELECT@GOTPAGE
Lloh18:
	ldr	x8, [x8, _JZ4740_GPIO_SELECT@GOTPAGEOFF]
Lloh19:
	ldr	w2, [x8]
	cmp	w21, #0
	cset	w3, gt
	b	LBB0_5
LBB0_3:
Lloh20:
	adrp	x8, _JZ4760_GPIO_INT@GOTPAGE
Lloh21:
	ldr	x8, [x8, _JZ4760_GPIO_INT@GOTPAGEOFF]
Lloh22:
	ldr	w2, [x8]
	mov	x0, x20
	mov	x1, x19
	mov	w3, #0
	bl	_ingenic_shadow_config_pin
Lloh23:
	adrp	x8, _GPIO_MSK@GOTPAGE
Lloh24:
	ldr	x8, [x8, _GPIO_MSK@GOTPAGEOFF]
Lloh25:
	ldr	w2, [x8]
	mov	x0, x20
	mov	x1, x19
	mov	w3, #0
	bl	_ingenic_shadow_config_pin
Lloh26:
	adrp	x8, _JZ4760_GPIO_PAT1@GOTPAGE
Lloh27:
	ldr	x8, [x8, _JZ4760_GPIO_PAT1@GOTPAGEOFF]
Lloh28:
	ldr	w2, [x8]
	and	w3, w21, #0x2
	mov	x0, x20
	mov	x1, x19
	bl	_ingenic_shadow_config_pin
Lloh29:
	adrp	x8, _JZ4760_GPIO_PAT0@GOTPAGE
Lloh30:
	ldr	x8, [x8, _JZ4760_GPIO_PAT0@GOTPAGEOFF]
Lloh31:
	ldr	w2, [x8]
	and	w3, w21, #0x1
	mov	x0, x20
	mov	x1, x19
	bl	_ingenic_shadow_config_pin
	mov	x0, x20
	mov	x1, x19
	bl	_ingenic_shadow_config_pin_load
	b	LBB0_6
LBB0_4:
Lloh32:
	adrp	x8, _JZ4760_GPIO_INT@GOTPAGE
Lloh33:
	ldr	x8, [x8, _JZ4760_GPIO_INT@GOTPAGEOFF]
Lloh34:
	ldr	w2, [x8]
	mov	x0, x20
	mov	x1, x19
	mov	w3, #0
	bl	_ingenic_config_pin
Lloh35:
	adrp	x8, _GPIO_MSK@GOTPAGE
Lloh36:
	ldr	x8, [x8, _GPIO_MSK@GOTPAGEOFF]
Lloh37:
	ldr	w2, [x8]
	mov	x0, x20
	mov	x1, x19
	mov	w3, #0
	bl	_ingenic_config_pin
Lloh38:
	adrp	x8, _JZ4760_GPIO_PAT1@GOTPAGE
Lloh39:
	ldr	x8, [x8, _JZ4760_GPIO_PAT1@GOTPAGEOFF]
Lloh40:
	ldr	w2, [x8]
	and	w3, w21, #0x2
	mov	x0, x20
	mov	x1, x19
	bl	_ingenic_config_pin
Lloh41:
	adrp	x8, _JZ4760_GPIO_PAT0@GOTPAGE
Lloh42:
	ldr	x8, [x8, _JZ4760_GPIO_PAT0@GOTPAGEOFF]
Lloh43:
	ldr	w2, [x8]
	and	w3, w21, #0x1
LBB0_5:
	mov	x0, x20
	mov	x1, x19
	bl	_ingenic_config_pin
LBB0_6:
	mov	w0, #0
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpAdd	Lloh3, Lloh4
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh19
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh16
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh29, Lloh30, Lloh31
	.loh AdrpLdrGotLdr	Lloh26, Lloh27, Lloh28
	.loh AdrpLdrGotLdr	Lloh23, Lloh24, Lloh25
	.loh AdrpLdrGotLdr	Lloh20, Lloh21, Lloh22
	.loh AdrpLdrGotLdr	Lloh41, Lloh42, Lloh43
	.loh AdrpLdrGotLdr	Lloh38, Lloh39, Lloh40
	.loh AdrpLdrGotLdr	Lloh35, Lloh36, Lloh37
	.loh AdrpLdrGotLdr	Lloh32, Lloh33, Lloh34
	.cfi_endproc
                                        ; -- End function
	.comm	_PINS_PER_GPIO_CHIP,4,2         ; @PINS_PER_GPIO_CHIP
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"set pin P%c%u to function %u\n"

	.comm	_ID_X1000,8,3                   ; @ID_X1000
	.comm	_JZ4760_GPIO_INT,4,2            ; @JZ4760_GPIO_INT
	.comm	_GPIO_MSK,4,2                   ; @GPIO_MSK
	.comm	_JZ4760_GPIO_PAT1,4,2           ; @JZ4760_GPIO_PAT1
	.comm	_JZ4760_GPIO_PAT0,4,2           ; @JZ4760_GPIO_PAT0
	.comm	_ID_JZ4760,8,3                  ; @ID_JZ4760
	.comm	_JZ4740_GPIO_FUNC,4,2           ; @JZ4740_GPIO_FUNC
	.comm	_JZ4740_GPIO_TRIG,4,2           ; @JZ4740_GPIO_TRIG
	.comm	_JZ4740_GPIO_SELECT,4,2         ; @JZ4740_GPIO_SELECT
	.no_dead_strip	_ingenic_pinmux_set_pin_fn
.subsections_via_symbols
