	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function mvpp2_rxq_init
_mvpp2_rxq_init:                        ## @mvpp2_rxq_init
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rsi, %rbx
	movq	%rdi, %r14
	movl	(%rdi), %esi
	movl	%esi, (%rbx)
	movq	16(%rdi), %rax
	movq	_MVPP2_DESC_ALIGNED_SIZE@GOTPCREL(%rip), %rcx
	imull	(%rcx), %esi
	movl	(%rax), %edi
	leaq	4(%rbx), %rdx
	movq	_GFP_KERNEL@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	callq	_dma_alloc_coherent
	movl	%eax, 16(%rbx)
	testl	%eax, %eax
	je	LBB0_1
## %bb.2:
	movl	(%rbx), %eax
	movl	12(%rbx), %edi
	decl	%eax
	movl	%eax, 8(%rbx)
	movq	8(%r14), %r12
	callq	_MVPP2_RXQ_STATUS_REG
	xorl	%r15d, %r15d
	movq	%r12, %rdi
	movl	%eax, %esi
	xorl	%edx, %edx
	callq	_mvpp2_write
	movq	8(%r14), %r12
	xorl	%eax, %eax
	callq	_get_cpu
	movq	%r12, %rdi
	movl	%eax, %esi
	callq	_mvpp2_cpu_to_thread
	movl	%eax, %r12d
	movq	8(%r14), %rdi
	movq	_MVPP2_RXQ_NUM_REG@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movl	12(%rbx), %ecx
	movl	%r12d, %esi
	callq	_mvpp2_thread_write
	movq	8(%r14), %rdi
	movq	(%rdi), %rdx
	movq	_MVPP21@GOTPCREL(%rip), %rsi
	movl	4(%rbx), %eax
	movl	$0, %ecx
	cmpq	(%rsi), %rdx
	je	LBB0_4
## %bb.3:
	movq	_MVPP22_DESC_ADDR_OFFS@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
LBB0_4:
                                        ## kill: def $cl killed $cl killed $ecx
	sarl	%cl, %eax
	movq	_MVPP2_RXQ_DESC_ADDR_REG@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	movl	%r12d, %esi
	movl	%eax, %ecx
	callq	_mvpp2_thread_write
	movq	8(%r14), %rdi
	movq	_MVPP2_RXQ_DESC_SIZE_REG@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movl	(%rbx), %ecx
	movl	%r12d, %esi
	callq	_mvpp2_thread_write
	movq	8(%r14), %rdi
	movq	_MVPP2_RXQ_INDEX_REG@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movl	%r12d, %esi
	xorl	%ecx, %ecx
	callq	_mvpp2_thread_write
	xorl	%eax, %eax
	callq	_put_cpu
	movl	12(%rbx), %esi
	movq	_NET_SKB_PAD@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r14, %rdi
	callq	_mvpp2_rxq_offset_set
	movq	%r14, %rdi
	movq	%rbx, %rsi
	callq	_mvpp2_rx_pkts_coal_set
	movq	%r14, %rdi
	movq	%rbx, %rsi
	callq	_mvpp2_rx_time_coal_set
	movl	(%rbx), %ecx
	movl	12(%rbx), %esi
	movq	%r14, %rdi
	xorl	%edx, %edx
	callq	_mvpp2_rxq_status_update
	jmp	LBB0_5
LBB0_1:
	movq	_ENOMEM@GOTPCREL(%rip), %rax
	xorl	%r15d, %r15d
	subl	(%rax), %r15d
LBB0_5:
	movl	%r15d, %eax
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_MVPP2_DESC_ALIGNED_SIZE,4,2    ## @MVPP2_DESC_ALIGNED_SIZE
	.comm	_GFP_KERNEL,4,2                 ## @GFP_KERNEL
	.comm	_ENOMEM,4,2                     ## @ENOMEM
	.comm	_MVPP2_RXQ_NUM_REG,4,2          ## @MVPP2_RXQ_NUM_REG
	.comm	_MVPP21,8,3                     ## @MVPP21
	.comm	_MVPP22_DESC_ADDR_OFFS,4,2      ## @MVPP22_DESC_ADDR_OFFS
	.comm	_MVPP2_RXQ_DESC_ADDR_REG,4,2    ## @MVPP2_RXQ_DESC_ADDR_REG
	.comm	_MVPP2_RXQ_DESC_SIZE_REG,4,2    ## @MVPP2_RXQ_DESC_SIZE_REG
	.comm	_MVPP2_RXQ_INDEX_REG,4,2        ## @MVPP2_RXQ_INDEX_REG
	.comm	_NET_SKB_PAD,4,2                ## @NET_SKB_PAD
	.no_dead_strip	_mvpp2_rxq_init
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function mvpp2_rxq_init
_mvpp2_rxq_init:                        ; @mvpp2_rxq_init
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x20, x1
	mov	x19, x0
	ldr	w8, [x0]
	str	w8, [x1]
	ldr	x9, [x0, #16]
	ldr	w0, [x9]
Lloh0:
	adrp	x9, _MVPP2_DESC_ALIGNED_SIZE@GOTPAGE
Lloh1:
	ldr	x9, [x9, _MVPP2_DESC_ALIGNED_SIZE@GOTPAGEOFF]
Lloh2:
	ldr	w9, [x9]
	mul	w1, w9, w8
	add	x2, x20, #4
Lloh3:
	adrp	x8, _GFP_KERNEL@GOTPAGE
Lloh4:
	ldr	x8, [x8, _GFP_KERNEL@GOTPAGEOFF]
Lloh5:
	ldr	w3, [x8]
	bl	_dma_alloc_coherent
	str	w0, [x20, #16]
	cbz	w0, LBB0_2
; %bb.1:
	ldr	w8, [x20]
	sub	w8, w8, #1
	str	w8, [x20, #8]
	ldr	x21, [x19, #8]
	ldr	w0, [x20, #12]
	bl	_MVPP2_RXQ_STATUS_REG
	mov	x1, x0
	mov	x0, x21
	mov	w2, #0
	bl	_mvpp2_write
	ldr	x21, [x19, #8]
	bl	_get_cpu
	mov	x1, x0
	mov	x0, x21
	bl	_mvpp2_cpu_to_thread
	mov	x21, x0
	ldr	x0, [x19, #8]
Lloh6:
	adrp	x8, _MVPP2_RXQ_NUM_REG@GOTPAGE
Lloh7:
	ldr	x8, [x8, _MVPP2_RXQ_NUM_REG@GOTPAGEOFF]
Lloh8:
	ldr	w2, [x8]
	ldr	w3, [x20, #12]
	mov	x1, x21
	bl	_mvpp2_thread_write
	ldr	x0, [x19, #8]
Lloh9:
	adrp	x8, _MVPP21@GOTPAGE
Lloh10:
	ldr	x8, [x8, _MVPP21@GOTPAGEOFF]
	ldr	x9, [x0]
Lloh11:
	ldr	x8, [x8]
	ldr	w10, [x20, #4]
Lloh12:
	adrp	x11, _MVPP22_DESC_ADDR_OFFS@GOTPAGE
Lloh13:
	ldr	x11, [x11, _MVPP22_DESC_ADDR_OFFS@GOTPAGEOFF]
Lloh14:
	ldr	w11, [x11]
	cmp	x9, x8
	csel	w8, wzr, w11, eq
	asr	w3, w10, w8
Lloh15:
	adrp	x8, _MVPP2_RXQ_DESC_ADDR_REG@GOTPAGE
Lloh16:
	ldr	x8, [x8, _MVPP2_RXQ_DESC_ADDR_REG@GOTPAGEOFF]
Lloh17:
	ldr	w2, [x8]
	mov	x1, x21
	bl	_mvpp2_thread_write
	ldr	x0, [x19, #8]
Lloh18:
	adrp	x8, _MVPP2_RXQ_DESC_SIZE_REG@GOTPAGE
Lloh19:
	ldr	x8, [x8, _MVPP2_RXQ_DESC_SIZE_REG@GOTPAGEOFF]
Lloh20:
	ldr	w2, [x8]
	ldr	w3, [x20]
	mov	x1, x21
	bl	_mvpp2_thread_write
	ldr	x0, [x19, #8]
Lloh21:
	adrp	x8, _MVPP2_RXQ_INDEX_REG@GOTPAGE
Lloh22:
	ldr	x8, [x8, _MVPP2_RXQ_INDEX_REG@GOTPAGEOFF]
Lloh23:
	ldr	w2, [x8]
	mov	x1, x21
	mov	w3, #0
	bl	_mvpp2_thread_write
	bl	_put_cpu
	ldr	w1, [x20, #12]
Lloh24:
	adrp	x8, _NET_SKB_PAD@GOTPAGE
Lloh25:
	ldr	x8, [x8, _NET_SKB_PAD@GOTPAGEOFF]
Lloh26:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_mvpp2_rxq_offset_set
	mov	x0, x19
	mov	x1, x20
	bl	_mvpp2_rx_pkts_coal_set
	mov	x0, x19
	mov	x1, x20
	bl	_mvpp2_rx_time_coal_set
	ldr	w1, [x20, #12]
	ldr	w3, [x20]
	mov	x0, x19
	mov	w2, #0
	bl	_mvpp2_rxq_status_update
	mov	w0, #0
	b	LBB0_3
LBB0_2:
Lloh27:
	adrp	x8, _ENOMEM@GOTPAGE
Lloh28:
	ldr	x8, [x8, _ENOMEM@GOTPAGEOFF]
Lloh29:
	ldr	w8, [x8]
	neg	w0, w8
LBB0_3:
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh27, Lloh28, Lloh29
	.cfi_endproc
                                        ; -- End function
	.comm	_MVPP2_DESC_ALIGNED_SIZE,4,2    ; @MVPP2_DESC_ALIGNED_SIZE
	.comm	_GFP_KERNEL,4,2                 ; @GFP_KERNEL
	.comm	_ENOMEM,4,2                     ; @ENOMEM
	.comm	_MVPP2_RXQ_NUM_REG,4,2          ; @MVPP2_RXQ_NUM_REG
	.comm	_MVPP21,8,3                     ; @MVPP21
	.comm	_MVPP22_DESC_ADDR_OFFS,4,2      ; @MVPP22_DESC_ADDR_OFFS
	.comm	_MVPP2_RXQ_DESC_ADDR_REG,4,2    ; @MVPP2_RXQ_DESC_ADDR_REG
	.comm	_MVPP2_RXQ_DESC_SIZE_REG,4,2    ; @MVPP2_RXQ_DESC_SIZE_REG
	.comm	_MVPP2_RXQ_INDEX_REG,4,2        ; @MVPP2_RXQ_INDEX_REG
	.comm	_NET_SKB_PAD,4,2                ; @NET_SKB_PAD
	.no_dead_strip	_mvpp2_rxq_init
.subsections_via_symbols
