	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function ath9k_hw_def_set_board_values
_ath9k_hw_def_set_board_values:         ## @ath9k_hw_def_set_board_values
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$88, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rsi, %r15
	movq	%rdi, %r13
	movq	24(%rdi), %r14
	movq	%rsi, %rdi
	callq	_IS_CHAN_2GHZ
	cltq
	imulq	$104, %rax, %rbx
	leaq	(%r14,%rbx), %rax
	movq	%rax, -64(%rbp)                 ## 8-byte Spill
	movq	%r15, -72(%rbp)                 ## 8-byte Spill
	movq	%r15, %rdi
	callq	_IS_CHAN_2GHZ
	testl	%eax, %eax
	movl	$44, %eax
	movl	$23, %ecx
	cmovel	%eax, %ecx
	movl	%ecx, -88(%rbp)                 ## 4-byte Spill
	movq	%r14, -48(%rbp)                 ## 8-byte Spill
	movq	%rbx, -56(%rbp)                 ## 8-byte Spill
	movl	96(%r14,%rbx), %edi
	callq	_le32_to_cpu
	movq	_AR_PHY_SWITCH_COM@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rsi
	movzwl	%ax, %edx
	movq	%r13, %rdi
	callq	_REG_WRITE
	movq	_AR5416_MAX_CHAINS@GOTPCREL(%rip), %rax
	cmpl	$0, (%rax)
	jle	LBB0_10
## %bb.1:
	leaq	8(%r13), %rax
	movq	%rax, -80(%rbp)                 ## 8-byte Spill
	movq	-48(%rbp), %rax                 ## 8-byte Reload
	movq	-56(%rbp), %rcx                 ## 8-byte Reload
	addq	%rcx, %rax
	addq	$88, %rax
	movq	%rax, -120(%rbp)                ## 8-byte Spill
	xorl	%ebx, %ebx
	xorl	%r14d, %r14d
	movq	%r13, -112(%rbp)                ## 8-byte Spill
	movq	-120(%rbp), %r12                ## 8-byte Reload
	jmp	LBB0_2
	.p2align	4, 0x90
LBB0_8:                                 ##   in Loop: Header=BB0_2 Depth=1
	movl	%ebx, %eax
LBB0_9:                                 ##   in Loop: Header=BB0_2 Depth=1
	movslq	%eax, %r15
	movq	_AR_PHY_SWITCH_CHAIN_0@GOTPCREL(%rip), %rax
	movq	(%rax), %rbx
	addq	%r15, %rbx
	movq	(%r12), %rax
	movl	(%rax,%r14,4), %edi
	callq	_le32_to_cpu
	movq	%r13, %rdi
	movq	%rbx, %rsi
	movl	%eax, %edx
	callq	_REG_WRITE
	xorl	%edi, %edi
	callq	_AR_PHY_TIMING_CTRL4
	addq	%r15, %rax
	movq	%rax, -96(%rbp)                 ## 8-byte Spill
	xorl	%edi, %edi
	callq	_AR_PHY_TIMING_CTRL4
	leaq	(%rax,%r15), %rsi
	movq	%r13, %rdi
	callq	_REG_READ
	movq	_AR_PHY_TIMING_CTRL4_IQCORR_Q_I_COFF@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	movq	_AR_PHY_TIMING_CTRL4_IQCORR_Q_Q_COFF@GOTPCREL(%rip), %rcx
	movl	(%rcx), %r13d
	orl	%esi, %r13d
	notl	%r13d
	andl	%eax, %r13d
	movq	-8(%r12), %rax
	movl	(%rax,%r14,4), %edi
	callq	_SM
	movl	%eax, %ebx
	movq	-16(%r12), %rax
	movl	(%rax,%r14,4), %edi
	movq	_AR_PHY_TIMING_CTRL4_IQCORR_Q_Q_COFF@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_SM
	orl	%eax, %ebx
	orl	%r13d, %ebx
	movq	-112(%rbp), %r13                ## 8-byte Reload
	movq	%r13, %rdi
	movq	-96(%rbp), %rsi                 ## 8-byte Reload
	movl	%ebx, %edx
	callq	_REG_WRITE
	movq	%r13, %rdi
	movq	-64(%rbp), %rsi                 ## 8-byte Reload
	movq	-80(%rbp), %rdx                 ## 8-byte Reload
	movl	-88(%rbp), %ecx                 ## 4-byte Reload
	movl	%r15d, %r8d
	movl	%r14d, %r9d
	callq	_ath9k_hw_def_set_gain
	incq	%r14
	movq	_AR5416_MAX_CHAINS@GOTPCREL(%rip), %rax
	movslq	(%rax), %rax
	movq	-104(%rbp), %rbx                ## 8-byte Reload
	addl	$4096, %ebx                     ## imm = 0x1000
	cmpq	%rax, %r14
	jge	LBB0_10
LBB0_2:                                 ## =>This Inner Loop Header: Depth=1
	movq	%r13, %rdi
	callq	_AR_SREV_9280
	testq	%rax, %rax
	je	LBB0_4
## %bb.3:                               ##   in Loop: Header=BB0_2 Depth=1
	cmpq	$1, %r14
	ja	LBB0_10
LBB0_4:                                 ##   in Loop: Header=BB0_2 Depth=1
	cmpl	$5, (%r13)
	movq	%rbx, -104(%rbp)                ## 8-byte Spill
	je	LBB0_6
## %bb.5:                               ##   in Loop: Header=BB0_2 Depth=1
	cmpl	$5, 4(%r13)
	jne	LBB0_8
LBB0_6:                                 ##   in Loop: Header=BB0_2 Depth=1
	testq	%r14, %r14
	je	LBB0_8
## %bb.7:                               ##   in Loop: Header=BB0_2 Depth=1
	xorl	%eax, %eax
	cmpq	$1, %r14
	sete	%al
	shll	$12, %eax
	addl	$4096, %eax                     ## imm = 0x1000
	jmp	LBB0_9
LBB0_10:
	movq	%r13, %rdi
	callq	_AR_SREV_9280_20_OR_LATER
	testq	%rax, %rax
	movq	-48(%rbp), %rbx                 ## 8-byte Reload
	movq	-56(%rbp), %r12                 ## 8-byte Reload
	je	LBB0_12
## %bb.11:
	movq	-72(%rbp), %rdi                 ## 8-byte Reload
	callq	_IS_CHAN_2GHZ
	testl	%eax, %eax
	movq	_AR_AN_RF2G1_CH0@GOTPCREL(%rip), %r14
	cmoveq	_AR_AN_RF5G1_CH0@GOTPCREL(%rip), %r14
	movq	_AR_AN_RF2G1_CH1@GOTPCREL(%rip), %rax
	cmoveq	_AR_AN_RF5G1_CH1@GOTPCREL(%rip), %rax
	movq	%rax, -104(%rbp)                ## 8-byte Spill
	movq	_AR_AN_RF2G1_CH0_OB@GOTPCREL(%rip), %rax
	cmoveq	_AR_AN_RF5G1_CH0_OB5@GOTPCREL(%rip), %rax
	movq	_AR_AN_RF2G1_CH0_OB_S@GOTPCREL(%rip), %rcx
	cmoveq	_AR_AN_RF5G1_CH0_OB5_S@GOTPCREL(%rip), %rcx
	movl	(%r14), %esi
	movl	(%rax), %edx
	movl	(%rcx), %ecx
	movq	-64(%rbp), %rax                 ## 8-byte Reload
	movl	(%rax), %r8d
	movq	_AR_AN_RF2G1_CH0_DB@GOTPCREL(%rip), %r15
	cmoveq	_AR_AN_RF5G1_CH0_DB5@GOTPCREL(%rip), %r15
	movq	_AR_AN_RF2G1_CH0_DB_S@GOTPCREL(%rip), %r12
	cmoveq	_AR_AN_RF5G1_CH0_DB5_S@GOTPCREL(%rip), %r12
	movq	_AR_AN_RF2G1_CH1_OB@GOTPCREL(%rip), %rax
	cmoveq	_AR_AN_RF5G1_CH1_OB5@GOTPCREL(%rip), %rax
	movq	%rax, -88(%rbp)                 ## 8-byte Spill
	movq	_AR_AN_RF2G1_CH1_OB_S@GOTPCREL(%rip), %rax
	cmoveq	_AR_AN_RF5G1_CH1_OB5_S@GOTPCREL(%rip), %rax
	movq	%rax, -80(%rbp)                 ## 8-byte Spill
	movq	_AR_AN_RF2G1_CH1_DB@GOTPCREL(%rip), %rax
	cmoveq	_AR_AN_RF5G1_CH1_DB5@GOTPCREL(%rip), %rax
	movq	%rax, -96(%rbp)                 ## 8-byte Spill
	movq	_AR_AN_RF2G1_CH1_DB_S@GOTPCREL(%rip), %rax
	cmoveq	_AR_AN_RF5G1_CH1_DB5_S@GOTPCREL(%rip), %rax
	movq	%rax, -64(%rbp)                 ## 8-byte Spill
	movq	%r13, %rdi
	callq	_ath9k_hw_analog_shift_rmw
	movl	(%r14), %esi
	movl	(%r15), %edx
	movl	(%r12), %ecx
	movq	-56(%rbp), %r12                 ## 8-byte Reload
	movl	4(%rbx,%r12), %r8d
	movq	%r13, %rdi
	callq	_ath9k_hw_analog_shift_rmw
	movq	-104(%rbp), %r14                ## 8-byte Reload
	movl	(%r14), %esi
	movq	-88(%rbp), %rax                 ## 8-byte Reload
	movl	(%rax), %edx
	movq	-80(%rbp), %rax                 ## 8-byte Reload
	movl	(%rax), %ecx
	movl	8(%rbx,%r12), %r8d
	movq	%r13, %rdi
	callq	_ath9k_hw_analog_shift_rmw
	movl	(%r14), %esi
	movq	-96(%rbp), %rax                 ## 8-byte Reload
	movl	(%rax), %edx
	movq	-64(%rbp), %rax                 ## 8-byte Reload
	movl	(%rax), %ecx
	movl	12(%rbx,%r12), %r8d
	movq	%r13, %rdi
	callq	_ath9k_hw_analog_shift_rmw
	movq	_AR_AN_TOP2@GOTPCREL(%rip), %r14
	movl	(%r14), %esi
	movq	_AR_AN_TOP2_XPABIAS_LVL@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	_AR_AN_TOP2_XPABIAS_LVL_S@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movl	16(%rbx,%r12), %r8d
	movq	%r13, %rdi
	callq	_ath9k_hw_analog_shift_rmw
	movl	(%r14), %esi
	movq	_AR_AN_TOP2_LOCALBIAS@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	_AR_AN_TOP2_LOCALBIAS_S@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movq	_LNA_CTL_LOCAL_BIAS@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	xorl	%r8d, %r8d
	andl	20(%rbx,%r12), %eax
	setne	%r8b
	movq	%r13, %rdi
	callq	_ath9k_hw_analog_shift_rmw
	movq	_AR_PHY_XPA_CFG@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_AR_PHY_FORCE_XPA_CFG@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	_LNA_CTL_FORCE_XPA@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	xorl	%ecx, %ecx
	andl	20(%rbx,%r12), %eax
	setne	%cl
	movq	%r13, %rdi
	callq	_REG_RMW_FIELD
LBB0_12:
	movq	_AR_PHY_SETTLING@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_AR_PHY_SETTLING_SWITCH@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movl	24(%rbx,%r12), %ecx
	movq	%r13, %rdi
	callq	_REG_RMW_FIELD
	movq	_AR_PHY_DESIRED_SZ@GOTPCREL(%rip), %r14
	movl	(%r14), %esi
	movq	_AR_PHY_DESIRED_SZ_ADC@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movl	28(%rbx,%r12), %ecx
	movq	%r13, %rdi
	callq	_REG_RMW_FIELD
	movq	%r13, %rdi
	callq	_AR_SREV_9280_20_OR_LATER
	testq	%rax, %rax
	jne	LBB0_14
## %bb.13:
	movl	(%r14), %esi
	movq	_AR_PHY_DESIRED_SZ_PGA@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movl	32(%rbx,%r12), %ecx
	movq	%r13, %rdi
	callq	_REG_RMW_FIELD
LBB0_14:
	movq	_AR_PHY_RF_CTL4@GOTPCREL(%rip), %rax
	movq	(%rax), %r14
	movq	-48(%rbp), %rax                 ## 8-byte Reload
	movl	64(%rax,%r12), %edi
	movq	_AR_PHY_RF_CTL4_TX_END_XPAA_OFF@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_SM
	movl	%eax, %r15d
	movq	-48(%rbp), %rax                 ## 8-byte Reload
	movl	64(%rax,%r12), %edi
	movq	_AR_PHY_RF_CTL4_TX_END_XPAB_OFF@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_SM
	orl	%eax, %r15d
	movq	-48(%rbp), %rax                 ## 8-byte Reload
	movl	60(%rax,%r12), %edi
	movq	_AR_PHY_RF_CTL4_FRAME_XPAA_ON@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_SM
	movl	%eax, %ebx
	movq	-48(%rbp), %rax                 ## 8-byte Reload
	movl	60(%rax,%r12), %edi
	movq	_AR_PHY_RF_CTL4_FRAME_XPAB_ON@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_SM
	orl	%eax, %ebx
	orl	%r15d, %ebx
	movq	%r13, %rdi
	movq	%r14, %rsi
	movl	%ebx, %edx
	callq	_REG_WRITE
	movq	_AR_PHY_RF_CTL3@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_AR_PHY_TX_END_TO_A2_RX_ON@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	-48(%rbp), %rax                 ## 8-byte Reload
	movl	36(%rax,%r12), %ecx
	movq	%r13, %rdi
	callq	_REG_RMW_FIELD
	movq	%r13, %rdi
	callq	_AR_SREV_9280_20_OR_LATER
	testq	%rax, %rax
	movq	_AR9280_PHY_CCA_THRESH62@GOTPCREL(%rip), %rax
	cmoveq	_AR_PHY_CCA_THRESH62@GOTPCREL(%rip), %rax
	movq	_AR_PHY_CCA@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	movl	(%rax), %edx
	movq	-48(%rbp), %rax                 ## 8-byte Reload
	movl	40(%rax,%r12), %ecx
	movq	_AR_PHY_EXT_CCA0@GOTPCREL(%rip), %r14
	cmoveq	_AR_PHY_EXT_CCA@GOTPCREL(%rip), %r14
	movq	_AR_PHY_EXT_CCA0_THRESH62@GOTPCREL(%rip), %rbx
	cmoveq	_AR_PHY_EXT_CCA_THRESH62@GOTPCREL(%rip), %rbx
	movq	%r13, %rdi
	callq	_REG_RMW_FIELD
	movl	(%r14), %esi
	movq	-48(%rbp), %r14                 ## 8-byte Reload
	movl	(%rbx), %edx
	movl	40(%r14,%r12), %ecx
	movq	%r13, %rdi
	callq	_REG_RMW_FIELD
	movq	%r13, %rdi
	callq	_ath9k_hw_def_get_eeprom_rev
	movq	_AR5416_EEP_MINOR_VER_2@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jl	LBB0_16
## %bb.15:
	movq	_AR_PHY_RF_CTL2@GOTPCREL(%rip), %r15
	movl	(%r15), %esi
	movq	_AR_PHY_TX_END_DATA_START@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	-56(%rbp), %rbx                 ## 8-byte Reload
	movl	44(%r14,%rbx), %ecx
	movq	%r13, %rdi
	callq	_REG_RMW_FIELD
	movl	(%r15), %esi
	movq	_AR_PHY_TX_END_PA_ON@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movl	48(%r14,%rbx), %ecx
	movq	%r13, %rdi
	callq	_REG_RMW_FIELD
LBB0_16:
	movq	%r13, %rdi
	callq	_ath9k_hw_def_get_eeprom_rev
	movq	_AR5416_EEP_MINOR_VER_3@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jl	LBB0_19
## %bb.17:
	movq	-72(%rbp), %rdi                 ## 8-byte Reload
	callq	_IS_CHAN_HT40
	testq	%rax, %rax
	je	LBB0_19
## %bb.18:
	movq	_AR_PHY_SETTLING@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_AR_PHY_SETTLING_SWITCH@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	-56(%rbp), %rax                 ## 8-byte Reload
	movl	52(%r14,%rax), %ecx
	movq	%r13, %rdi
	callq	_REG_RMW_FIELD
LBB0_19:
	movq	%r13, %rdi
	callq	_AR_SREV_9280_20_OR_LATER
	testq	%rax, %rax
	je	LBB0_22
## %bb.20:
	movq	%r13, %rdi
	callq	_ath9k_hw_def_get_eeprom_rev
	movq	_AR5416_EEP_MINOR_VER_19@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jl	LBB0_22
## %bb.21:
	movq	_AR_PHY_CCK_TX_CTRL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_AR_PHY_CCK_TX_CTRL_TX_DAC_SCALE_CCK@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	-56(%rbp), %rax                 ## 8-byte Reload
	movl	56(%r14,%rax), %ecx
	movq	%r13, %rdi
	callq	_REG_RMW_FIELD
LBB0_22:
	movq	%r13, %rdi
	callq	_AR_SREV_9280_20
	testq	%rax, %rax
	je	LBB0_30
## %bb.23:
	movq	%r13, %rdi
	callq	_ath9k_hw_def_get_eeprom_rev
	movq	_AR5416_EEP_MINOR_VER_20@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jge	LBB0_24
LBB0_30:
	addq	$88, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_24:
	movq	-72(%rbp), %rdi                 ## 8-byte Reload
	callq	_IS_CHAN_2GHZ
	testl	%eax, %eax
	je	LBB0_27
## %bb.25:
	movq	_AR_AN_TOP1@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_AR_AN_TOP1_DACIPMODE@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
LBB0_26:
	movl	8(%r13), %ecx
	movq	%r13, %rdi
	jmp	LBB0_29
LBB0_27:
	cmpq	$0, 16(%r13)
	movq	_AR_AN_TOP1@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_AR_AN_TOP1_DACIPMODE@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	je	LBB0_26
## %bb.28:
	movq	%r13, %rdi
	xorl	%ecx, %ecx
LBB0_29:
	callq	_REG_RMW_FIELD
	movl	$100, %edi
	callq	_udelay
	movq	_AR_PHY_FRAME_CTL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_AR_PHY_FRAME_CTL_TX_CLIP@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	-56(%rbp), %rax                 ## 8-byte Reload
	movl	56(%r14,%rax), %ecx
	sarl	$2, %ecx
	movq	%r13, %rdi
	callq	_REG_RMW_FIELD
	movq	_AR_PHY_TX_PWRCTRL9@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_AR_PHY_TX_DESIRED_SCALE_CCK@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movl	12(%r13), %ecx
	movq	%r13, %rdi
	addq	$88, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_REG_RMW_FIELD                  ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_AR_PHY_SWITCH_COM,8,3          ## @AR_PHY_SWITCH_COM
	.comm	_AR5416_MAX_CHAINS,4,2          ## @AR5416_MAX_CHAINS
	.comm	_AR_PHY_SWITCH_CHAIN_0,8,3      ## @AR_PHY_SWITCH_CHAIN_0
	.comm	_AR_PHY_TIMING_CTRL4_IQCORR_Q_Q_COFF,4,2 ## @AR_PHY_TIMING_CTRL4_IQCORR_Q_Q_COFF
	.comm	_AR_PHY_TIMING_CTRL4_IQCORR_Q_I_COFF,4,2 ## @AR_PHY_TIMING_CTRL4_IQCORR_Q_I_COFF
	.comm	_AR_AN_RF2G1_CH0,4,2            ## @AR_AN_RF2G1_CH0
	.comm	_AR_AN_RF2G1_CH0_OB,4,2         ## @AR_AN_RF2G1_CH0_OB
	.comm	_AR_AN_RF2G1_CH0_OB_S,4,2       ## @AR_AN_RF2G1_CH0_OB_S
	.comm	_AR_AN_RF2G1_CH0_DB,4,2         ## @AR_AN_RF2G1_CH0_DB
	.comm	_AR_AN_RF2G1_CH0_DB_S,4,2       ## @AR_AN_RF2G1_CH0_DB_S
	.comm	_AR_AN_RF2G1_CH1,4,2            ## @AR_AN_RF2G1_CH1
	.comm	_AR_AN_RF2G1_CH1_OB,4,2         ## @AR_AN_RF2G1_CH1_OB
	.comm	_AR_AN_RF2G1_CH1_OB_S,4,2       ## @AR_AN_RF2G1_CH1_OB_S
	.comm	_AR_AN_RF2G1_CH1_DB,4,2         ## @AR_AN_RF2G1_CH1_DB
	.comm	_AR_AN_RF2G1_CH1_DB_S,4,2       ## @AR_AN_RF2G1_CH1_DB_S
	.comm	_AR_AN_RF5G1_CH0,4,2            ## @AR_AN_RF5G1_CH0
	.comm	_AR_AN_RF5G1_CH0_OB5,4,2        ## @AR_AN_RF5G1_CH0_OB5
	.comm	_AR_AN_RF5G1_CH0_OB5_S,4,2      ## @AR_AN_RF5G1_CH0_OB5_S
	.comm	_AR_AN_RF5G1_CH0_DB5,4,2        ## @AR_AN_RF5G1_CH0_DB5
	.comm	_AR_AN_RF5G1_CH0_DB5_S,4,2      ## @AR_AN_RF5G1_CH0_DB5_S
	.comm	_AR_AN_RF5G1_CH1,4,2            ## @AR_AN_RF5G1_CH1
	.comm	_AR_AN_RF5G1_CH1_OB5,4,2        ## @AR_AN_RF5G1_CH1_OB5
	.comm	_AR_AN_RF5G1_CH1_OB5_S,4,2      ## @AR_AN_RF5G1_CH1_OB5_S
	.comm	_AR_AN_RF5G1_CH1_DB5,4,2        ## @AR_AN_RF5G1_CH1_DB5
	.comm	_AR_AN_RF5G1_CH1_DB5_S,4,2      ## @AR_AN_RF5G1_CH1_DB5_S
	.comm	_AR_AN_TOP2,4,2                 ## @AR_AN_TOP2
	.comm	_AR_AN_TOP2_XPABIAS_LVL,4,2     ## @AR_AN_TOP2_XPABIAS_LVL
	.comm	_AR_AN_TOP2_XPABIAS_LVL_S,4,2   ## @AR_AN_TOP2_XPABIAS_LVL_S
	.comm	_AR_AN_TOP2_LOCALBIAS,4,2       ## @AR_AN_TOP2_LOCALBIAS
	.comm	_AR_AN_TOP2_LOCALBIAS_S,4,2     ## @AR_AN_TOP2_LOCALBIAS_S
	.comm	_LNA_CTL_LOCAL_BIAS,4,2         ## @LNA_CTL_LOCAL_BIAS
	.comm	_AR_PHY_XPA_CFG,4,2             ## @AR_PHY_XPA_CFG
	.comm	_AR_PHY_FORCE_XPA_CFG,4,2       ## @AR_PHY_FORCE_XPA_CFG
	.comm	_LNA_CTL_FORCE_XPA,4,2          ## @LNA_CTL_FORCE_XPA
	.comm	_AR_PHY_SETTLING,4,2            ## @AR_PHY_SETTLING
	.comm	_AR_PHY_SETTLING_SWITCH,4,2     ## @AR_PHY_SETTLING_SWITCH
	.comm	_AR_PHY_DESIRED_SZ,4,2          ## @AR_PHY_DESIRED_SZ
	.comm	_AR_PHY_DESIRED_SZ_ADC,4,2      ## @AR_PHY_DESIRED_SZ_ADC
	.comm	_AR_PHY_DESIRED_SZ_PGA,4,2      ## @AR_PHY_DESIRED_SZ_PGA
	.comm	_AR_PHY_RF_CTL4,8,3             ## @AR_PHY_RF_CTL4
	.comm	_AR_PHY_RF_CTL4_TX_END_XPAA_OFF,4,2 ## @AR_PHY_RF_CTL4_TX_END_XPAA_OFF
	.comm	_AR_PHY_RF_CTL4_TX_END_XPAB_OFF,4,2 ## @AR_PHY_RF_CTL4_TX_END_XPAB_OFF
	.comm	_AR_PHY_RF_CTL4_FRAME_XPAA_ON,4,2 ## @AR_PHY_RF_CTL4_FRAME_XPAA_ON
	.comm	_AR_PHY_RF_CTL4_FRAME_XPAB_ON,4,2 ## @AR_PHY_RF_CTL4_FRAME_XPAB_ON
	.comm	_AR_PHY_RF_CTL3,4,2             ## @AR_PHY_RF_CTL3
	.comm	_AR_PHY_TX_END_TO_A2_RX_ON,4,2  ## @AR_PHY_TX_END_TO_A2_RX_ON
	.comm	_AR_PHY_CCA,4,2                 ## @AR_PHY_CCA
	.comm	_AR9280_PHY_CCA_THRESH62,4,2    ## @AR9280_PHY_CCA_THRESH62
	.comm	_AR_PHY_EXT_CCA0,4,2            ## @AR_PHY_EXT_CCA0
	.comm	_AR_PHY_EXT_CCA0_THRESH62,4,2   ## @AR_PHY_EXT_CCA0_THRESH62
	.comm	_AR_PHY_CCA_THRESH62,4,2        ## @AR_PHY_CCA_THRESH62
	.comm	_AR_PHY_EXT_CCA,4,2             ## @AR_PHY_EXT_CCA
	.comm	_AR_PHY_EXT_CCA_THRESH62,4,2    ## @AR_PHY_EXT_CCA_THRESH62
	.comm	_AR5416_EEP_MINOR_VER_2,8,3     ## @AR5416_EEP_MINOR_VER_2
	.comm	_AR_PHY_RF_CTL2,4,2             ## @AR_PHY_RF_CTL2
	.comm	_AR_PHY_TX_END_DATA_START,4,2   ## @AR_PHY_TX_END_DATA_START
	.comm	_AR_PHY_TX_END_PA_ON,4,2        ## @AR_PHY_TX_END_PA_ON
	.comm	_AR5416_EEP_MINOR_VER_3,8,3     ## @AR5416_EEP_MINOR_VER_3
	.comm	_AR5416_EEP_MINOR_VER_19,8,3    ## @AR5416_EEP_MINOR_VER_19
	.comm	_AR_PHY_CCK_TX_CTRL,4,2         ## @AR_PHY_CCK_TX_CTRL
	.comm	_AR_PHY_CCK_TX_CTRL_TX_DAC_SCALE_CCK,4,2 ## @AR_PHY_CCK_TX_CTRL_TX_DAC_SCALE_CCK
	.comm	_AR5416_EEP_MINOR_VER_20,8,3    ## @AR5416_EEP_MINOR_VER_20
	.comm	_AR_AN_TOP1,4,2                 ## @AR_AN_TOP1
	.comm	_AR_AN_TOP1_DACIPMODE,4,2       ## @AR_AN_TOP1_DACIPMODE
	.comm	_AR_PHY_FRAME_CTL,4,2           ## @AR_PHY_FRAME_CTL
	.comm	_AR_PHY_FRAME_CTL_TX_CLIP,4,2   ## @AR_PHY_FRAME_CTL_TX_CLIP
	.comm	_AR_PHY_TX_PWRCTRL9,4,2         ## @AR_PHY_TX_PWRCTRL9
	.comm	_AR_PHY_TX_DESIRED_SCALE_CCK,4,2 ## @AR_PHY_TX_DESIRED_SCALE_CCK
	.no_dead_strip	_ath9k_hw_def_set_board_values
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function ath9k_hw_def_set_board_values
_ath9k_hw_def_set_board_values:         ; @ath9k_hw_def_set_board_values
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #160
	.cfi_def_cfa_offset 160
	stp	x28, x27, [sp, #64]             ; 16-byte Folded Spill
	stp	x26, x25, [sp, #80]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #96]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #112]            ; 16-byte Folded Spill
	stp	x20, x19, [sp, #128]            ; 16-byte Folded Spill
	stp	x29, x30, [sp, #144]            ; 16-byte Folded Spill
	add	x29, sp, #144
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	mov	x21, x1
	mov	x19, x0
	ldr	x20, [x0, #24]
	mov	x0, x1
	bl	_IS_CHAN_2GHZ
                                        ; kill: def $w0 killed $w0 def $x0
	sxtw	x8, w0
	stp	x20, x8, [sp, #16]              ; 16-byte Folded Spill
	mov	w8, #104
	smaddl	x20, w0, w8, x20
	str	x21, [sp, #8]                   ; 8-byte Folded Spill
	mov	x0, x21
	bl	_IS_CHAN_2GHZ
	mov	w8, #23
	mov	w9, #44
	cmp	w0, #0
	csel	w8, w9, w8, eq
	str	w8, [sp, #52]                   ; 4-byte Folded Spill
	str	x20, [sp, #56]                  ; 8-byte Folded Spill
	ldr	w0, [x20, #96]
	bl	_le32_to_cpu
Lloh0:
	adrp	x8, _AR_PHY_SWITCH_COM@GOTPAGE
Lloh1:
	ldr	x8, [x8, _AR_PHY_SWITCH_COM@GOTPAGEOFF]
Lloh2:
	ldr	x1, [x8]
	and	w2, w0, #0xffff
	mov	x0, x19
	bl	_REG_WRITE
Lloh3:
	adrp	x8, _AR5416_MAX_CHAINS@GOTPAGE
Lloh4:
	ldr	x8, [x8, _AR5416_MAX_CHAINS@GOTPAGEOFF]
Lloh5:
	ldr	w8, [x8]
	cmp	w8, #1
	b.lt	LBB0_10
; %bb.1:
	mov	w28, #0
	mov	x23, #0
	add	x11, x19, #8
	mov	w8, #104
	ldp	x9, x10, [sp, #16]              ; 16-byte Folded Reload
	madd	x8, x10, x8, x9
	add	x9, x8, #88
	stp	x9, x11, [sp, #32]              ; 16-byte Folded Spill
	add	x20, x8, #80
	add	x21, x8, #72
Lloh6:
	adrp	x22, _AR_PHY_TIMING_CTRL4_IQCORR_Q_Q_COFF@GOTPAGE
Lloh7:
	ldr	x22, [x22, _AR_PHY_TIMING_CTRL4_IQCORR_Q_Q_COFF@GOTPAGEOFF]
	b	LBB0_5
LBB0_2:                                 ;   in Loop: Header=BB0_5 Depth=1
	cbz	x23, LBB0_9
LBB0_3:                                 ;   in Loop: Header=BB0_5 Depth=1
	cmp	x23, #1
	mov	w8, #4096
	mov	w9, #8192
	csel	w25, w9, w8, eq
LBB0_4:                                 ;   in Loop: Header=BB0_5 Depth=1
Lloh8:
	adrp	x8, _AR_PHY_SWITCH_CHAIN_0@GOTPAGE
Lloh9:
	ldr	x8, [x8, _AR_PHY_SWITCH_CHAIN_0@GOTPAGEOFF]
Lloh10:
	ldr	x8, [x8]
	sxtw	x24, w25
	add	x26, x8, x24
	ldr	x8, [sp, #32]                   ; 8-byte Folded Reload
	ldr	x8, [x8]
	lsl	x27, x23, #2
	ldr	w0, [x8, x27]
	bl	_le32_to_cpu
	mov	x2, x0
	mov	x0, x19
	mov	x1, x26
	bl	_REG_WRITE
	mov	w0, #0
	bl	_AR_PHY_TIMING_CTRL4
	add	x26, x0, x24
	mov	w0, #0
	bl	_AR_PHY_TIMING_CTRL4
	add	x1, x0, x24
	mov	x0, x19
	bl	_REG_READ
	ldr	w8, [x22]
Lloh11:
	adrp	x9, _AR_PHY_TIMING_CTRL4_IQCORR_Q_I_COFF@GOTPAGE
Lloh12:
	ldr	x9, [x9, _AR_PHY_TIMING_CTRL4_IQCORR_Q_I_COFF@GOTPAGEOFF]
Lloh13:
	ldr	w1, [x9]
	orr	w8, w1, w8
	bic	w24, w0, w8
	ldr	x8, [x20]
	ldr	w0, [x8, x27]
	bl	_SM
	orr	w24, w0, w24
	ldr	x8, [x21]
	ldr	w0, [x8, x27]
	ldr	w1, [x22]
	bl	_SM
	orr	w2, w24, w0
	mov	x0, x19
	mov	x1, x26
	bl	_REG_WRITE
	mov	x0, x19
	ldr	x1, [sp, #56]                   ; 8-byte Folded Reload
	ldr	x2, [sp, #40]                   ; 8-byte Folded Reload
	ldr	w3, [sp, #52]                   ; 4-byte Folded Reload
	mov	x4, x25
	mov	x5, x23
	bl	_ath9k_hw_def_set_gain
	add	x23, x23, #1
Lloh14:
	adrp	x8, _AR5416_MAX_CHAINS@GOTPAGE
Lloh15:
	ldr	x8, [x8, _AR5416_MAX_CHAINS@GOTPAGEOFF]
Lloh16:
	ldrsw	x8, [x8]
	add	w28, w28, #1, lsl #12           ; =4096
	cmp	x23, x8
	b.ge	LBB0_10
LBB0_5:                                 ; =>This Inner Loop Header: Depth=1
	mov	x0, x19
	bl	_AR_SREV_9280
	cbz	x0, LBB0_7
; %bb.6:                                ;   in Loop: Header=BB0_5 Depth=1
	cmp	x23, #1
	b.hi	LBB0_10
LBB0_7:                                 ;   in Loop: Header=BB0_5 Depth=1
	ldr	w8, [x19]
	cmp	w8, #5
	b.eq	LBB0_2
; %bb.8:                                ;   in Loop: Header=BB0_5 Depth=1
	ldr	w8, [x19, #4]
	cmp	w8, #5
	ccmp	x23, #0, #4, eq
	b.ne	LBB0_3
LBB0_9:                                 ;   in Loop: Header=BB0_5 Depth=1
	mov	x25, x28
	b	LBB0_4
LBB0_10:
	mov	x0, x19
	bl	_AR_SREV_9280_20_OR_LATER
	ldp	x25, x26, [sp, #16]             ; 16-byte Folded Reload
	cbz	x0, LBB0_12
; %bb.11:
	ldr	x0, [sp, #8]                    ; 8-byte Folded Reload
	bl	_IS_CHAN_2GHZ
Lloh17:
	adrp	x8, _AR_AN_RF2G1_CH0@GOTPAGE
Lloh18:
	ldr	x8, [x8, _AR_AN_RF2G1_CH0@GOTPAGEOFF]
Lloh19:
	adrp	x9, _AR_AN_RF5G1_CH0@GOTPAGE
Lloh20:
	ldr	x9, [x9, _AR_AN_RF5G1_CH0@GOTPAGEOFF]
	cmp	w0, #0
Lloh21:
	adrp	x10, _AR_AN_RF2G1_CH1@GOTPAGE
Lloh22:
	ldr	x10, [x10, _AR_AN_RF2G1_CH1@GOTPAGEOFF]
	csel	x20, x9, x8, eq
Lloh23:
	adrp	x8, _AR_AN_RF5G1_CH1@GOTPAGE
Lloh24:
	ldr	x8, [x8, _AR_AN_RF5G1_CH1@GOTPAGEOFF]
	csel	x21, x8, x10, eq
Lloh25:
	adrp	x8, _AR_AN_RF5G1_CH0_OB5@GOTPAGE
Lloh26:
	ldr	x8, [x8, _AR_AN_RF5G1_CH0_OB5@GOTPAGEOFF]
	ldr	w1, [x20]
Lloh27:
	adrp	x9, _AR_AN_RF2G1_CH0_OB@GOTPAGE
Lloh28:
	ldr	x9, [x9, _AR_AN_RF2G1_CH0_OB@GOTPAGEOFF]
	csel	x8, x8, x9, eq
Lloh29:
	adrp	x9, _AR_AN_RF5G1_CH0_OB5_S@GOTPAGE
Lloh30:
	ldr	x9, [x9, _AR_AN_RF5G1_CH0_OB5_S@GOTPAGEOFF]
	ldr	w2, [x8]
Lloh31:
	adrp	x8, _AR_AN_RF2G1_CH0_OB_S@GOTPAGE
Lloh32:
	ldr	x8, [x8, _AR_AN_RF2G1_CH0_OB_S@GOTPAGEOFF]
	csel	x8, x9, x8, eq
	ldr	w3, [x8]
	ldr	x8, [sp, #56]                   ; 8-byte Folded Reload
	ldr	w4, [x8]
Lloh33:
	adrp	x8, _AR_AN_RF5G1_CH0_DB5@GOTPAGE
Lloh34:
	ldr	x8, [x8, _AR_AN_RF5G1_CH0_DB5@GOTPAGEOFF]
Lloh35:
	adrp	x9, _AR_AN_RF2G1_CH0_DB@GOTPAGE
Lloh36:
	ldr	x9, [x9, _AR_AN_RF2G1_CH0_DB@GOTPAGEOFF]
	csel	x22, x8, x9, eq
Lloh37:
	adrp	x8, _AR_AN_RF5G1_CH0_DB5_S@GOTPAGE
Lloh38:
	ldr	x8, [x8, _AR_AN_RF5G1_CH0_DB5_S@GOTPAGEOFF]
Lloh39:
	adrp	x9, _AR_AN_RF2G1_CH0_DB_S@GOTPAGE
Lloh40:
	ldr	x9, [x9, _AR_AN_RF2G1_CH0_DB_S@GOTPAGEOFF]
Lloh41:
	adrp	x10, _AR_AN_RF5G1_CH1_OB5@GOTPAGE
Lloh42:
	ldr	x10, [x10, _AR_AN_RF5G1_CH1_OB5@GOTPAGEOFF]
	csel	x23, x8, x9, eq
Lloh43:
	adrp	x8, _AR_AN_RF2G1_CH1_OB@GOTPAGE
Lloh44:
	ldr	x8, [x8, _AR_AN_RF2G1_CH1_OB@GOTPAGEOFF]
	csel	x24, x10, x8, eq
Lloh45:
	adrp	x8, _AR_AN_RF5G1_CH1_OB5_S@GOTPAGE
Lloh46:
	ldr	x8, [x8, _AR_AN_RF5G1_CH1_OB5_S@GOTPAGEOFF]
Lloh47:
	adrp	x9, _AR_AN_RF2G1_CH1_OB_S@GOTPAGE
Lloh48:
	ldr	x9, [x9, _AR_AN_RF2G1_CH1_OB_S@GOTPAGEOFF]
Lloh49:
	adrp	x10, _AR_AN_RF5G1_CH1_DB5@GOTPAGE
Lloh50:
	ldr	x10, [x10, _AR_AN_RF5G1_CH1_DB5@GOTPAGEOFF]
Lloh51:
	adrp	x11, _AR_AN_RF2G1_CH1_DB@GOTPAGE
Lloh52:
	ldr	x11, [x11, _AR_AN_RF2G1_CH1_DB@GOTPAGEOFF]
	csel	x28, x8, x9, eq
	csel	x8, x10, x11, eq
	str	x8, [sp, #56]                   ; 8-byte Folded Spill
Lloh53:
	adrp	x8, _AR_AN_RF5G1_CH1_DB5_S@GOTPAGE
Lloh54:
	ldr	x8, [x8, _AR_AN_RF5G1_CH1_DB5_S@GOTPAGEOFF]
Lloh55:
	adrp	x9, _AR_AN_RF2G1_CH1_DB_S@GOTPAGE
Lloh56:
	ldr	x9, [x9, _AR_AN_RF2G1_CH1_DB_S@GOTPAGEOFF]
	csel	x27, x8, x9, eq
	mov	x0, x19
	bl	_ath9k_hw_analog_shift_rmw
	ldr	w1, [x20]
	ldr	w2, [x22]
	ldr	w3, [x23]
	mov	w8, #104
	madd	x20, x26, x8, x25
	ldr	w4, [x20, #4]
	mov	x0, x19
	bl	_ath9k_hw_analog_shift_rmw
	ldr	w1, [x21]
	ldr	w2, [x24]
	ldr	w3, [x28]
	ldr	w4, [x20, #8]
	mov	x0, x19
	bl	_ath9k_hw_analog_shift_rmw
	ldr	w1, [x21]
	ldr	x8, [sp, #56]                   ; 8-byte Folded Reload
	ldr	w2, [x8]
	ldr	w3, [x27]
	ldr	w4, [x20, #12]
	mov	x0, x19
	bl	_ath9k_hw_analog_shift_rmw
Lloh57:
	adrp	x21, _AR_AN_TOP2@GOTPAGE
Lloh58:
	ldr	x21, [x21, _AR_AN_TOP2@GOTPAGEOFF]
Lloh59:
	adrp	x8, _AR_AN_TOP2_XPABIAS_LVL@GOTPAGE
Lloh60:
	ldr	x8, [x8, _AR_AN_TOP2_XPABIAS_LVL@GOTPAGEOFF]
	ldr	w1, [x21]
Lloh61:
	ldr	w2, [x8]
Lloh62:
	adrp	x8, _AR_AN_TOP2_XPABIAS_LVL_S@GOTPAGE
Lloh63:
	ldr	x8, [x8, _AR_AN_TOP2_XPABIAS_LVL_S@GOTPAGEOFF]
Lloh64:
	ldr	w3, [x8]
	ldr	w4, [x20, #16]
	mov	x0, x19
	bl	_ath9k_hw_analog_shift_rmw
	ldr	w1, [x21]
Lloh65:
	adrp	x8, _AR_AN_TOP2_LOCALBIAS@GOTPAGE
Lloh66:
	ldr	x8, [x8, _AR_AN_TOP2_LOCALBIAS@GOTPAGEOFF]
Lloh67:
	ldr	w2, [x8]
Lloh68:
	adrp	x8, _AR_AN_TOP2_LOCALBIAS_S@GOTPAGE
Lloh69:
	ldr	x8, [x8, _AR_AN_TOP2_LOCALBIAS_S@GOTPAGEOFF]
Lloh70:
	ldr	w3, [x8]
	ldr	w8, [x20, #20]
Lloh71:
	adrp	x9, _LNA_CTL_LOCAL_BIAS@GOTPAGE
Lloh72:
	ldr	x9, [x9, _LNA_CTL_LOCAL_BIAS@GOTPAGEOFF]
Lloh73:
	ldr	w9, [x9]
	tst	w9, w8
	cset	w4, ne
	mov	x0, x19
	bl	_ath9k_hw_analog_shift_rmw
Lloh74:
	adrp	x8, _AR_PHY_XPA_CFG@GOTPAGE
Lloh75:
	ldr	x8, [x8, _AR_PHY_XPA_CFG@GOTPAGEOFF]
Lloh76:
	ldr	w1, [x8]
Lloh77:
	adrp	x8, _AR_PHY_FORCE_XPA_CFG@GOTPAGE
Lloh78:
	ldr	x8, [x8, _AR_PHY_FORCE_XPA_CFG@GOTPAGEOFF]
Lloh79:
	ldr	w2, [x8]
	ldr	w8, [x20, #20]
Lloh80:
	adrp	x9, _LNA_CTL_FORCE_XPA@GOTPAGE
Lloh81:
	ldr	x9, [x9, _LNA_CTL_FORCE_XPA@GOTPAGEOFF]
Lloh82:
	ldr	w9, [x9]
	tst	w9, w8
	cset	w3, ne
	mov	x0, x19
	bl	_REG_RMW_FIELD
LBB0_12:
Lloh83:
	adrp	x23, _AR_PHY_SETTLING@GOTPAGE
Lloh84:
	ldr	x23, [x23, _AR_PHY_SETTLING@GOTPAGEOFF]
	ldr	w1, [x23]
Lloh85:
	adrp	x24, _AR_PHY_SETTLING_SWITCH@GOTPAGE
Lloh86:
	ldr	x24, [x24, _AR_PHY_SETTLING_SWITCH@GOTPAGEOFF]
	ldr	w2, [x24]
	mov	w8, #104
	madd	x21, x26, x8, x25
	ldr	w3, [x21, #24]
	mov	x0, x19
	bl	_REG_RMW_FIELD
Lloh87:
	adrp	x20, _AR_PHY_DESIRED_SZ@GOTPAGE
Lloh88:
	ldr	x20, [x20, _AR_PHY_DESIRED_SZ@GOTPAGEOFF]
	ldr	w1, [x20]
Lloh89:
	adrp	x8, _AR_PHY_DESIRED_SZ_ADC@GOTPAGE
Lloh90:
	ldr	x8, [x8, _AR_PHY_DESIRED_SZ_ADC@GOTPAGEOFF]
Lloh91:
	ldr	w2, [x8]
	ldr	w3, [x21, #28]
	mov	x0, x19
	bl	_REG_RMW_FIELD
	mov	x0, x19
	bl	_AR_SREV_9280_20_OR_LATER
	cbnz	x0, LBB0_14
; %bb.13:
	ldr	w1, [x20]
Lloh92:
	adrp	x8, _AR_PHY_DESIRED_SZ_PGA@GOTPAGE
Lloh93:
	ldr	x8, [x8, _AR_PHY_DESIRED_SZ_PGA@GOTPAGEOFF]
Lloh94:
	ldr	w2, [x8]
	mov	w8, #104
	madd	x8, x26, x8, x25
	ldr	w3, [x8, #32]
	mov	x0, x19
	bl	_REG_RMW_FIELD
LBB0_14:
Lloh95:
	adrp	x8, _AR_PHY_RF_CTL4@GOTPAGE
Lloh96:
	ldr	x8, [x8, _AR_PHY_RF_CTL4@GOTPAGEOFF]
Lloh97:
	ldr	x21, [x8]
	mov	w8, #104
	madd	x20, x26, x8, x25
	ldr	w0, [x20, #64]
Lloh98:
	adrp	x8, _AR_PHY_RF_CTL4_TX_END_XPAA_OFF@GOTPAGE
Lloh99:
	ldr	x8, [x8, _AR_PHY_RF_CTL4_TX_END_XPAA_OFF@GOTPAGEOFF]
Lloh100:
	ldr	w1, [x8]
	bl	_SM
	mov	x22, x0
	ldr	w0, [x20, #64]
Lloh101:
	adrp	x8, _AR_PHY_RF_CTL4_TX_END_XPAB_OFF@GOTPAGE
Lloh102:
	ldr	x8, [x8, _AR_PHY_RF_CTL4_TX_END_XPAB_OFF@GOTPAGEOFF]
Lloh103:
	ldr	w1, [x8]
	bl	_SM
	orr	w22, w0, w22
	ldr	w0, [x20, #60]
Lloh104:
	adrp	x8, _AR_PHY_RF_CTL4_FRAME_XPAA_ON@GOTPAGE
Lloh105:
	ldr	x8, [x8, _AR_PHY_RF_CTL4_FRAME_XPAA_ON@GOTPAGEOFF]
Lloh106:
	ldr	w1, [x8]
	bl	_SM
	orr	w22, w22, w0
	ldr	w0, [x20, #60]
Lloh107:
	adrp	x8, _AR_PHY_RF_CTL4_FRAME_XPAB_ON@GOTPAGE
Lloh108:
	ldr	x8, [x8, _AR_PHY_RF_CTL4_FRAME_XPAB_ON@GOTPAGEOFF]
Lloh109:
	ldr	w1, [x8]
	bl	_SM
	orr	w2, w22, w0
	mov	x0, x19
	mov	x1, x21
	bl	_REG_WRITE
Lloh110:
	adrp	x8, _AR_PHY_RF_CTL3@GOTPAGE
Lloh111:
	ldr	x8, [x8, _AR_PHY_RF_CTL3@GOTPAGEOFF]
Lloh112:
	ldr	w1, [x8]
Lloh113:
	adrp	x8, _AR_PHY_TX_END_TO_A2_RX_ON@GOTPAGE
Lloh114:
	ldr	x8, [x8, _AR_PHY_TX_END_TO_A2_RX_ON@GOTPAGEOFF]
Lloh115:
	ldr	w2, [x8]
	ldr	w3, [x20, #36]
	mov	x0, x19
	bl	_REG_RMW_FIELD
	mov	x0, x19
	bl	_AR_SREV_9280_20_OR_LATER
Lloh116:
	adrp	x8, _AR_PHY_CCA@GOTPAGE
Lloh117:
	ldr	x8, [x8, _AR_PHY_CCA@GOTPAGEOFF]
Lloh118:
	ldr	w1, [x8]
Lloh119:
	adrp	x8, _AR_PHY_CCA_THRESH62@GOTPAGE
Lloh120:
	ldr	x8, [x8, _AR_PHY_CCA_THRESH62@GOTPAGEOFF]
Lloh121:
	adrp	x9, _AR9280_PHY_CCA_THRESH62@GOTPAGE
Lloh122:
	ldr	x9, [x9, _AR9280_PHY_CCA_THRESH62@GOTPAGEOFF]
	cmp	x0, #0
	csel	x8, x8, x9, eq
	ldr	w2, [x8]
	ldr	w3, [x20, #40]
Lloh123:
	adrp	x8, _AR_PHY_EXT_CCA@GOTPAGE
Lloh124:
	ldr	x8, [x8, _AR_PHY_EXT_CCA@GOTPAGEOFF]
Lloh125:
	adrp	x9, _AR_PHY_EXT_CCA0@GOTPAGE
Lloh126:
	ldr	x9, [x9, _AR_PHY_EXT_CCA0@GOTPAGEOFF]
Lloh127:
	adrp	x10, _AR_PHY_EXT_CCA_THRESH62@GOTPAGE
Lloh128:
	ldr	x10, [x10, _AR_PHY_EXT_CCA_THRESH62@GOTPAGEOFF]
Lloh129:
	adrp	x11, _AR_PHY_EXT_CCA0_THRESH62@GOTPAGE
Lloh130:
	ldr	x11, [x11, _AR_PHY_EXT_CCA0_THRESH62@GOTPAGEOFF]
	csel	x21, x8, x9, eq
	csel	x22, x10, x11, eq
	mov	x0, x19
	bl	_REG_RMW_FIELD
	ldr	w1, [x21]
	ldr	w2, [x22]
	ldr	x22, [sp, #24]                  ; 8-byte Folded Reload
	ldr	w3, [x20, #40]
	mov	x0, x19
	bl	_REG_RMW_FIELD
	mov	x0, x19
	bl	_ath9k_hw_def_get_eeprom_rev
Lloh131:
	adrp	x8, _AR5416_EEP_MINOR_VER_2@GOTPAGE
Lloh132:
	ldr	x8, [x8, _AR5416_EEP_MINOR_VER_2@GOTPAGEOFF]
Lloh133:
	ldr	x8, [x8]
	cmp	x0, x8
	b.lt	LBB0_16
; %bb.15:
Lloh134:
	adrp	x20, _AR_PHY_RF_CTL2@GOTPAGE
Lloh135:
	ldr	x20, [x20, _AR_PHY_RF_CTL2@GOTPAGEOFF]
	ldr	w1, [x20]
Lloh136:
	adrp	x8, _AR_PHY_TX_END_DATA_START@GOTPAGE
Lloh137:
	ldr	x8, [x8, _AR_PHY_TX_END_DATA_START@GOTPAGEOFF]
Lloh138:
	ldr	w2, [x8]
	mov	w8, #104
	madd	x21, x22, x8, x25
	ldr	w3, [x21, #44]
	mov	x0, x19
	bl	_REG_RMW_FIELD
	ldr	w1, [x20]
Lloh139:
	adrp	x8, _AR_PHY_TX_END_PA_ON@GOTPAGE
Lloh140:
	ldr	x8, [x8, _AR_PHY_TX_END_PA_ON@GOTPAGEOFF]
Lloh141:
	ldr	w2, [x8]
	ldr	w3, [x21, #48]
	mov	x0, x19
	bl	_REG_RMW_FIELD
LBB0_16:
	mov	x0, x19
	bl	_ath9k_hw_def_get_eeprom_rev
Lloh142:
	adrp	x8, _AR5416_EEP_MINOR_VER_3@GOTPAGE
Lloh143:
	ldr	x8, [x8, _AR5416_EEP_MINOR_VER_3@GOTPAGEOFF]
Lloh144:
	ldr	x8, [x8]
	cmp	x0, x8
	b.lt	LBB0_19
; %bb.17:
	ldr	x0, [sp, #8]                    ; 8-byte Folded Reload
	bl	_IS_CHAN_HT40
	cbz	x0, LBB0_19
; %bb.18:
	ldr	w1, [x23]
	ldr	w2, [x24]
	mov	w8, #104
	madd	x8, x22, x8, x25
	ldr	w3, [x8, #52]
	mov	x0, x19
	bl	_REG_RMW_FIELD
LBB0_19:
	mov	x0, x19
	bl	_AR_SREV_9280_20_OR_LATER
	cbz	x0, LBB0_22
; %bb.20:
	mov	x0, x19
	bl	_ath9k_hw_def_get_eeprom_rev
Lloh145:
	adrp	x8, _AR5416_EEP_MINOR_VER_19@GOTPAGE
Lloh146:
	ldr	x8, [x8, _AR5416_EEP_MINOR_VER_19@GOTPAGEOFF]
Lloh147:
	ldr	x8, [x8]
	cmp	x0, x8
	b.lt	LBB0_22
; %bb.21:
Lloh148:
	adrp	x8, _AR_PHY_CCK_TX_CTRL@GOTPAGE
Lloh149:
	ldr	x8, [x8, _AR_PHY_CCK_TX_CTRL@GOTPAGEOFF]
Lloh150:
	ldr	w1, [x8]
Lloh151:
	adrp	x8, _AR_PHY_CCK_TX_CTRL_TX_DAC_SCALE_CCK@GOTPAGE
Lloh152:
	ldr	x8, [x8, _AR_PHY_CCK_TX_CTRL_TX_DAC_SCALE_CCK@GOTPAGEOFF]
Lloh153:
	ldr	w2, [x8]
	mov	w8, #104
	madd	x8, x22, x8, x25
	ldr	w3, [x8, #56]
	mov	x0, x19
	bl	_REG_RMW_FIELD
LBB0_22:
	mov	x0, x19
	bl	_AR_SREV_9280_20
	cbz	x0, LBB0_24
; %bb.23:
	mov	x0, x19
	bl	_ath9k_hw_def_get_eeprom_rev
Lloh154:
	adrp	x8, _AR5416_EEP_MINOR_VER_20@GOTPAGE
Lloh155:
	ldr	x8, [x8, _AR5416_EEP_MINOR_VER_20@GOTPAGEOFF]
Lloh156:
	ldr	x8, [x8]
	cmp	x0, x8
	b.ge	LBB0_25
LBB0_24:
	ldp	x29, x30, [sp, #144]            ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #128]            ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #112]            ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #96]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #80]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp, #64]             ; 16-byte Folded Reload
	add	sp, sp, #160
	ret
LBB0_25:
	ldr	x0, [sp, #8]                    ; 8-byte Folded Reload
	bl	_IS_CHAN_2GHZ
	cbz	w0, LBB0_28
; %bb.26:
Lloh157:
	adrp	x8, _AR_AN_TOP1@GOTPAGE
Lloh158:
	ldr	x8, [x8, _AR_AN_TOP1@GOTPAGEOFF]
Lloh159:
	ldr	w1, [x8]
Lloh160:
	adrp	x8, _AR_AN_TOP1_DACIPMODE@GOTPAGE
Lloh161:
	ldr	x8, [x8, _AR_AN_TOP1_DACIPMODE@GOTPAGEOFF]
Lloh162:
	ldr	w2, [x8]
LBB0_27:
	ldr	w3, [x19, #8]
	mov	x0, x19
	b	LBB0_30
LBB0_28:
	ldr	x8, [x19, #16]
Lloh163:
	adrp	x9, _AR_AN_TOP1@GOTPAGE
Lloh164:
	ldr	x9, [x9, _AR_AN_TOP1@GOTPAGEOFF]
Lloh165:
	ldr	w1, [x9]
Lloh166:
	adrp	x9, _AR_AN_TOP1_DACIPMODE@GOTPAGE
Lloh167:
	ldr	x9, [x9, _AR_AN_TOP1_DACIPMODE@GOTPAGEOFF]
Lloh168:
	ldr	w2, [x9]
	cbz	x8, LBB0_27
; %bb.29:
	mov	x0, x19
	mov	w3, #0
LBB0_30:
	bl	_REG_RMW_FIELD
	mov	w0, #100
	bl	_udelay
Lloh169:
	adrp	x8, _AR_PHY_FRAME_CTL@GOTPAGE
Lloh170:
	ldr	x8, [x8, _AR_PHY_FRAME_CTL@GOTPAGEOFF]
Lloh171:
	adrp	x9, _AR_PHY_FRAME_CTL_TX_CLIP@GOTPAGE
Lloh172:
	ldr	x9, [x9, _AR_PHY_FRAME_CTL_TX_CLIP@GOTPAGEOFF]
Lloh173:
	ldr	w1, [x8]
Lloh174:
	ldr	w2, [x9]
	mov	w8, #104
	madd	x8, x22, x8, x25
	ldr	w8, [x8, #56]
	asr	w3, w8, #2
	mov	x0, x19
	bl	_REG_RMW_FIELD
Lloh175:
	adrp	x8, _AR_PHY_TX_PWRCTRL9@GOTPAGE
Lloh176:
	ldr	x8, [x8, _AR_PHY_TX_PWRCTRL9@GOTPAGEOFF]
Lloh177:
	ldr	w1, [x8]
Lloh178:
	adrp	x8, _AR_PHY_TX_DESIRED_SCALE_CCK@GOTPAGE
Lloh179:
	ldr	x8, [x8, _AR_PHY_TX_DESIRED_SCALE_CCK@GOTPAGEOFF]
Lloh180:
	ldr	w2, [x8]
	ldr	w3, [x19, #12]
	mov	x0, x19
	ldp	x29, x30, [sp, #144]            ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #128]            ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #112]            ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #96]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #80]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp, #64]             ; 16-byte Folded Reload
	add	sp, sp, #160
	b	_REG_RMW_FIELD
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGot	Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh16
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh80, Lloh81, Lloh82
	.loh AdrpLdrGotLdr	Lloh77, Lloh78, Lloh79
	.loh AdrpLdrGotLdr	Lloh74, Lloh75, Lloh76
	.loh AdrpLdrGotLdr	Lloh71, Lloh72, Lloh73
	.loh AdrpLdrGotLdr	Lloh68, Lloh69, Lloh70
	.loh AdrpLdrGotLdr	Lloh65, Lloh66, Lloh67
	.loh AdrpLdrGotLdr	Lloh62, Lloh63, Lloh64
	.loh AdrpLdrGotLdr	Lloh59, Lloh60, Lloh61
	.loh AdrpLdrGot	Lloh57, Lloh58
	.loh AdrpLdrGot	Lloh55, Lloh56
	.loh AdrpLdrGot	Lloh53, Lloh54
	.loh AdrpLdrGot	Lloh51, Lloh52
	.loh AdrpLdrGot	Lloh49, Lloh50
	.loh AdrpLdrGot	Lloh47, Lloh48
	.loh AdrpLdrGot	Lloh45, Lloh46
	.loh AdrpLdrGot	Lloh43, Lloh44
	.loh AdrpLdrGot	Lloh41, Lloh42
	.loh AdrpLdrGot	Lloh39, Lloh40
	.loh AdrpLdrGot	Lloh37, Lloh38
	.loh AdrpLdrGot	Lloh35, Lloh36
	.loh AdrpLdrGot	Lloh33, Lloh34
	.loh AdrpLdrGot	Lloh31, Lloh32
	.loh AdrpLdrGot	Lloh29, Lloh30
	.loh AdrpLdrGot	Lloh27, Lloh28
	.loh AdrpLdrGot	Lloh25, Lloh26
	.loh AdrpLdrGot	Lloh23, Lloh24
	.loh AdrpLdrGot	Lloh21, Lloh22
	.loh AdrpLdrGot	Lloh19, Lloh20
	.loh AdrpLdrGot	Lloh17, Lloh18
	.loh AdrpLdrGotLdr	Lloh89, Lloh90, Lloh91
	.loh AdrpLdrGot	Lloh87, Lloh88
	.loh AdrpLdrGot	Lloh85, Lloh86
	.loh AdrpLdrGot	Lloh83, Lloh84
	.loh AdrpLdrGotLdr	Lloh92, Lloh93, Lloh94
	.loh AdrpLdrGotLdr	Lloh131, Lloh132, Lloh133
	.loh AdrpLdrGot	Lloh129, Lloh130
	.loh AdrpLdrGot	Lloh127, Lloh128
	.loh AdrpLdrGot	Lloh125, Lloh126
	.loh AdrpLdrGot	Lloh123, Lloh124
	.loh AdrpLdrGot	Lloh121, Lloh122
	.loh AdrpLdrGot	Lloh119, Lloh120
	.loh AdrpLdrGotLdr	Lloh116, Lloh117, Lloh118
	.loh AdrpLdrGotLdr	Lloh113, Lloh114, Lloh115
	.loh AdrpLdrGotLdr	Lloh110, Lloh111, Lloh112
	.loh AdrpLdrGotLdr	Lloh107, Lloh108, Lloh109
	.loh AdrpLdrGotLdr	Lloh104, Lloh105, Lloh106
	.loh AdrpLdrGotLdr	Lloh101, Lloh102, Lloh103
	.loh AdrpLdrGotLdr	Lloh98, Lloh99, Lloh100
	.loh AdrpLdrGotLdr	Lloh95, Lloh96, Lloh97
	.loh AdrpLdrGotLdr	Lloh139, Lloh140, Lloh141
	.loh AdrpLdrGotLdr	Lloh136, Lloh137, Lloh138
	.loh AdrpLdrGot	Lloh134, Lloh135
	.loh AdrpLdrGotLdr	Lloh142, Lloh143, Lloh144
	.loh AdrpLdrGotLdr	Lloh145, Lloh146, Lloh147
	.loh AdrpLdrGotLdr	Lloh151, Lloh152, Lloh153
	.loh AdrpLdrGotLdr	Lloh148, Lloh149, Lloh150
	.loh AdrpLdrGotLdr	Lloh154, Lloh155, Lloh156
	.loh AdrpLdrGotLdr	Lloh160, Lloh161, Lloh162
	.loh AdrpLdrGotLdr	Lloh157, Lloh158, Lloh159
	.loh AdrpLdrGotLdr	Lloh166, Lloh167, Lloh168
	.loh AdrpLdrGotLdr	Lloh163, Lloh164, Lloh165
	.loh AdrpLdrGotLdr	Lloh178, Lloh179, Lloh180
	.loh AdrpLdrGotLdr	Lloh175, Lloh176, Lloh177
	.loh AdrpLdrGotLdr	Lloh171, Lloh172, Lloh174
	.loh AdrpLdrGotLdr	Lloh169, Lloh170, Lloh173
	.cfi_endproc
                                        ; -- End function
	.comm	_AR_PHY_SWITCH_COM,8,3          ; @AR_PHY_SWITCH_COM
	.comm	_AR5416_MAX_CHAINS,4,2          ; @AR5416_MAX_CHAINS
	.comm	_AR_PHY_SWITCH_CHAIN_0,8,3      ; @AR_PHY_SWITCH_CHAIN_0
	.comm	_AR_PHY_TIMING_CTRL4_IQCORR_Q_Q_COFF,4,2 ; @AR_PHY_TIMING_CTRL4_IQCORR_Q_Q_COFF
	.comm	_AR_PHY_TIMING_CTRL4_IQCORR_Q_I_COFF,4,2 ; @AR_PHY_TIMING_CTRL4_IQCORR_Q_I_COFF
	.comm	_AR_AN_RF2G1_CH0,4,2            ; @AR_AN_RF2G1_CH0
	.comm	_AR_AN_RF2G1_CH0_OB,4,2         ; @AR_AN_RF2G1_CH0_OB
	.comm	_AR_AN_RF2G1_CH0_OB_S,4,2       ; @AR_AN_RF2G1_CH0_OB_S
	.comm	_AR_AN_RF2G1_CH0_DB,4,2         ; @AR_AN_RF2G1_CH0_DB
	.comm	_AR_AN_RF2G1_CH0_DB_S,4,2       ; @AR_AN_RF2G1_CH0_DB_S
	.comm	_AR_AN_RF2G1_CH1,4,2            ; @AR_AN_RF2G1_CH1
	.comm	_AR_AN_RF2G1_CH1_OB,4,2         ; @AR_AN_RF2G1_CH1_OB
	.comm	_AR_AN_RF2G1_CH1_OB_S,4,2       ; @AR_AN_RF2G1_CH1_OB_S
	.comm	_AR_AN_RF2G1_CH1_DB,4,2         ; @AR_AN_RF2G1_CH1_DB
	.comm	_AR_AN_RF2G1_CH1_DB_S,4,2       ; @AR_AN_RF2G1_CH1_DB_S
	.comm	_AR_AN_RF5G1_CH0,4,2            ; @AR_AN_RF5G1_CH0
	.comm	_AR_AN_RF5G1_CH0_OB5,4,2        ; @AR_AN_RF5G1_CH0_OB5
	.comm	_AR_AN_RF5G1_CH0_OB5_S,4,2      ; @AR_AN_RF5G1_CH0_OB5_S
	.comm	_AR_AN_RF5G1_CH0_DB5,4,2        ; @AR_AN_RF5G1_CH0_DB5
	.comm	_AR_AN_RF5G1_CH0_DB5_S,4,2      ; @AR_AN_RF5G1_CH0_DB5_S
	.comm	_AR_AN_RF5G1_CH1,4,2            ; @AR_AN_RF5G1_CH1
	.comm	_AR_AN_RF5G1_CH1_OB5,4,2        ; @AR_AN_RF5G1_CH1_OB5
	.comm	_AR_AN_RF5G1_CH1_OB5_S,4,2      ; @AR_AN_RF5G1_CH1_OB5_S
	.comm	_AR_AN_RF5G1_CH1_DB5,4,2        ; @AR_AN_RF5G1_CH1_DB5
	.comm	_AR_AN_RF5G1_CH1_DB5_S,4,2      ; @AR_AN_RF5G1_CH1_DB5_S
	.comm	_AR_AN_TOP2,4,2                 ; @AR_AN_TOP2
	.comm	_AR_AN_TOP2_XPABIAS_LVL,4,2     ; @AR_AN_TOP2_XPABIAS_LVL
	.comm	_AR_AN_TOP2_XPABIAS_LVL_S,4,2   ; @AR_AN_TOP2_XPABIAS_LVL_S
	.comm	_AR_AN_TOP2_LOCALBIAS,4,2       ; @AR_AN_TOP2_LOCALBIAS
	.comm	_AR_AN_TOP2_LOCALBIAS_S,4,2     ; @AR_AN_TOP2_LOCALBIAS_S
	.comm	_LNA_CTL_LOCAL_BIAS,4,2         ; @LNA_CTL_LOCAL_BIAS
	.comm	_AR_PHY_XPA_CFG,4,2             ; @AR_PHY_XPA_CFG
	.comm	_AR_PHY_FORCE_XPA_CFG,4,2       ; @AR_PHY_FORCE_XPA_CFG
	.comm	_LNA_CTL_FORCE_XPA,4,2          ; @LNA_CTL_FORCE_XPA
	.comm	_AR_PHY_SETTLING,4,2            ; @AR_PHY_SETTLING
	.comm	_AR_PHY_SETTLING_SWITCH,4,2     ; @AR_PHY_SETTLING_SWITCH
	.comm	_AR_PHY_DESIRED_SZ,4,2          ; @AR_PHY_DESIRED_SZ
	.comm	_AR_PHY_DESIRED_SZ_ADC,4,2      ; @AR_PHY_DESIRED_SZ_ADC
	.comm	_AR_PHY_DESIRED_SZ_PGA,4,2      ; @AR_PHY_DESIRED_SZ_PGA
	.comm	_AR_PHY_RF_CTL4,8,3             ; @AR_PHY_RF_CTL4
	.comm	_AR_PHY_RF_CTL4_TX_END_XPAA_OFF,4,2 ; @AR_PHY_RF_CTL4_TX_END_XPAA_OFF
	.comm	_AR_PHY_RF_CTL4_TX_END_XPAB_OFF,4,2 ; @AR_PHY_RF_CTL4_TX_END_XPAB_OFF
	.comm	_AR_PHY_RF_CTL4_FRAME_XPAA_ON,4,2 ; @AR_PHY_RF_CTL4_FRAME_XPAA_ON
	.comm	_AR_PHY_RF_CTL4_FRAME_XPAB_ON,4,2 ; @AR_PHY_RF_CTL4_FRAME_XPAB_ON
	.comm	_AR_PHY_RF_CTL3,4,2             ; @AR_PHY_RF_CTL3
	.comm	_AR_PHY_TX_END_TO_A2_RX_ON,4,2  ; @AR_PHY_TX_END_TO_A2_RX_ON
	.comm	_AR_PHY_CCA,4,2                 ; @AR_PHY_CCA
	.comm	_AR9280_PHY_CCA_THRESH62,4,2    ; @AR9280_PHY_CCA_THRESH62
	.comm	_AR_PHY_EXT_CCA0,4,2            ; @AR_PHY_EXT_CCA0
	.comm	_AR_PHY_EXT_CCA0_THRESH62,4,2   ; @AR_PHY_EXT_CCA0_THRESH62
	.comm	_AR_PHY_CCA_THRESH62,4,2        ; @AR_PHY_CCA_THRESH62
	.comm	_AR_PHY_EXT_CCA,4,2             ; @AR_PHY_EXT_CCA
	.comm	_AR_PHY_EXT_CCA_THRESH62,4,2    ; @AR_PHY_EXT_CCA_THRESH62
	.comm	_AR5416_EEP_MINOR_VER_2,8,3     ; @AR5416_EEP_MINOR_VER_2
	.comm	_AR_PHY_RF_CTL2,4,2             ; @AR_PHY_RF_CTL2
	.comm	_AR_PHY_TX_END_DATA_START,4,2   ; @AR_PHY_TX_END_DATA_START
	.comm	_AR_PHY_TX_END_PA_ON,4,2        ; @AR_PHY_TX_END_PA_ON
	.comm	_AR5416_EEP_MINOR_VER_3,8,3     ; @AR5416_EEP_MINOR_VER_3
	.comm	_AR5416_EEP_MINOR_VER_19,8,3    ; @AR5416_EEP_MINOR_VER_19
	.comm	_AR_PHY_CCK_TX_CTRL,4,2         ; @AR_PHY_CCK_TX_CTRL
	.comm	_AR_PHY_CCK_TX_CTRL_TX_DAC_SCALE_CCK,4,2 ; @AR_PHY_CCK_TX_CTRL_TX_DAC_SCALE_CCK
	.comm	_AR5416_EEP_MINOR_VER_20,8,3    ; @AR5416_EEP_MINOR_VER_20
	.comm	_AR_AN_TOP1,4,2                 ; @AR_AN_TOP1
	.comm	_AR_AN_TOP1_DACIPMODE,4,2       ; @AR_AN_TOP1_DACIPMODE
	.comm	_AR_PHY_FRAME_CTL,4,2           ; @AR_PHY_FRAME_CTL
	.comm	_AR_PHY_FRAME_CTL_TX_CLIP,4,2   ; @AR_PHY_FRAME_CTL_TX_CLIP
	.comm	_AR_PHY_TX_PWRCTRL9,4,2         ; @AR_PHY_TX_PWRCTRL9
	.comm	_AR_PHY_TX_DESIRED_SCALE_CCK,4,2 ; @AR_PHY_TX_DESIRED_SCALE_CCK
	.no_dead_strip	_ath9k_hw_def_set_board_values
.subsections_via_symbols
