	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function rt2800_init_rfcsr_3572
_rt2800_init_rfcsr_3572:                ## @rt2800_init_rfcsr_3572
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %rbx
	movl	$30, %esi
	callq	_rt2800_rf_init_calibration
	movq	%rbx, %rdi
	xorl	%esi, %esi
	movl	$112, %edx
	callq	_rt2800_rfcsr_write
	movq	%rbx, %rdi
	movl	$1, %esi
	movl	$129, %edx
	callq	_rt2800_rfcsr_write
	movq	%rbx, %rdi
	movl	$2, %esi
	movl	$241, %edx
	callq	_rt2800_rfcsr_write
	movq	%rbx, %rdi
	movl	$3, %esi
	movl	$2, %edx
	callq	_rt2800_rfcsr_write
	movq	%rbx, %rdi
	movl	$4, %esi
	movl	$76, %edx
	callq	_rt2800_rfcsr_write
	movq	%rbx, %rdi
	movl	$5, %esi
	movl	$5, %edx
	callq	_rt2800_rfcsr_write
	movq	%rbx, %rdi
	movl	$6, %esi
	movl	$74, %edx
	callq	_rt2800_rfcsr_write
	movq	%rbx, %rdi
	movl	$7, %esi
	movl	$216, %edx
	callq	_rt2800_rfcsr_write
	movq	%rbx, %rdi
	movl	$9, %esi
	movl	$195, %edx
	callq	_rt2800_rfcsr_write
	movq	%rbx, %rdi
	movl	$10, %esi
	movl	$241, %edx
	callq	_rt2800_rfcsr_write
	movq	%rbx, %rdi
	movl	$11, %esi
	movl	$185, %edx
	callq	_rt2800_rfcsr_write
	movq	%rbx, %rdi
	movl	$12, %esi
	movl	$112, %edx
	callq	_rt2800_rfcsr_write
	movq	%rbx, %rdi
	movl	$13, %esi
	movl	$101, %edx
	callq	_rt2800_rfcsr_write
	movq	%rbx, %rdi
	movl	$14, %esi
	movl	$160, %edx
	callq	_rt2800_rfcsr_write
	movq	%rbx, %rdi
	movl	$15, %esi
	movl	$83, %edx
	callq	_rt2800_rfcsr_write
	movq	%rbx, %rdi
	movl	$16, %esi
	movl	$76, %edx
	callq	_rt2800_rfcsr_write
	movq	%rbx, %rdi
	movl	$17, %esi
	movl	$35, %edx
	callq	_rt2800_rfcsr_write
	movq	%rbx, %rdi
	movl	$18, %esi
	movl	$172, %edx
	callq	_rt2800_rfcsr_write
	movq	%rbx, %rdi
	movl	$19, %esi
	movl	$147, %edx
	callq	_rt2800_rfcsr_write
	movq	%rbx, %rdi
	movl	$20, %esi
	movl	$179, %edx
	callq	_rt2800_rfcsr_write
	movq	%rbx, %rdi
	movl	$21, %esi
	movl	$208, %edx
	callq	_rt2800_rfcsr_write
	movq	%rbx, %rdi
	movl	$22, %esi
	xorl	%edx, %edx
	callq	_rt2800_rfcsr_write
	movq	%rbx, %rdi
	movl	$23, %esi
	movl	$60, %edx
	callq	_rt2800_rfcsr_write
	movq	%rbx, %rdi
	movl	$24, %esi
	movl	$22, %edx
	callq	_rt2800_rfcsr_write
	movq	%rbx, %rdi
	movl	$25, %esi
	movl	$21, %edx
	callq	_rt2800_rfcsr_write
	movq	%rbx, %rdi
	movl	$26, %esi
	movl	$133, %edx
	callq	_rt2800_rfcsr_write
	movq	%rbx, %rdi
	movl	$27, %esi
	xorl	%edx, %edx
	callq	_rt2800_rfcsr_write
	movq	%rbx, %rdi
	movl	$28, %esi
	xorl	%edx, %edx
	callq	_rt2800_rfcsr_write
	movq	%rbx, %rdi
	movl	$29, %esi
	movl	$155, %edx
	callq	_rt2800_rfcsr_write
	movq	%rbx, %rdi
	movl	$30, %esi
	movl	$9, %edx
	callq	_rt2800_rfcsr_write
	movq	%rbx, %rdi
	movl	$31, %esi
	movl	$16, %edx
	callq	_rt2800_rfcsr_write
	movq	%rbx, %rdi
	movl	$6, %esi
	callq	_rt2800_rfcsr_read
	movl	%eax, -48(%rbp)
	movq	_RFCSR6_R2@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	leaq	-48(%rbp), %rdi
	movl	$1, %edx
	callq	_rt2x00_set_field8
	movl	-48(%rbp), %edx
	movq	%rbx, %rdi
	movl	$6, %esi
	callq	_rt2800_rfcsr_write
	movq	_LDO_CFG0@GOTPCREL(%rip), %r15
	movl	(%r15), %esi
	movq	%rbx, %rdi
	callq	_rt2800_register_read
	movl	%eax, -44(%rbp)
	movq	_LDO_CFG0_LDO_CORE_VLEVEL@GOTPCREL(%rip), %r12
	movl	(%r12), %esi
	leaq	-44(%rbp), %r14
	movq	%r14, %rdi
	movl	$3, %edx
	callq	_rt2x00_set_field32
	movq	_LDO_CFG0_BGSEL@GOTPCREL(%rip), %r13
	movl	(%r13), %esi
	movq	%r14, %rdi
	movl	$1, %edx
	callq	_rt2x00_set_field32
	movl	(%r15), %esi
	movl	-44(%rbp), %edx
	movq	%rbx, %rdi
	callq	_rt2800_register_write
	movl	$1, %edi
	callq	_msleep
	movl	(%r15), %esi
	movq	%rbx, %rdi
	callq	_rt2800_register_read
	movl	%eax, -44(%rbp)
	movl	(%r12), %esi
	movq	%r14, %rdi
	xorl	%edx, %edx
	callq	_rt2x00_set_field32
	movl	(%r13), %esi
	movq	%r14, %rdi
	movl	$1, %edx
	callq	_rt2x00_set_field32
	movl	(%r15), %esi
	movl	-44(%rbp), %edx
	movq	%rbx, %rdi
	callq	_rt2800_register_write
	movq	%rbx, %rdi
	callq	_rt2800_rx_filter_calibration
	movq	%rbx, %rdi
	callq	_rt2800_led_open_drain_enable
	movq	%rbx, %rdi
	callq	_rt2800_normal_mode_setup_3xxx
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_RFCSR6_R2,4,2                  ## @RFCSR6_R2
	.comm	_LDO_CFG0,4,2                   ## @LDO_CFG0
	.comm	_LDO_CFG0_LDO_CORE_VLEVEL,4,2   ## @LDO_CFG0_LDO_CORE_VLEVEL
	.comm	_LDO_CFG0_BGSEL,4,2             ## @LDO_CFG0_BGSEL
	.no_dead_strip	_rt2800_init_rfcsr_3572
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function rt2800_init_rfcsr_3572
_rt2800_init_rfcsr_3572:                ; @rt2800_init_rfcsr_3572
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #64
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x0
	mov	w1, #30
	bl	_rt2800_rf_init_calibration
	mov	x0, x19
	mov	w1, #0
	mov	w2, #112
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #1
	mov	w2, #129
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #2
	mov	w2, #241
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #3
	mov	w2, #2
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #4
	mov	w2, #76
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #5
	mov	w2, #5
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #6
	mov	w2, #74
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #7
	mov	w2, #216
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #9
	mov	w2, #195
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #10
	mov	w2, #241
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #11
	mov	w2, #185
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #12
	mov	w2, #112
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #13
	mov	w2, #101
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #14
	mov	w2, #160
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #15
	mov	w2, #83
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #16
	mov	w2, #76
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #17
	mov	w2, #35
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #18
	mov	w2, #172
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #19
	mov	w2, #147
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #20
	mov	w2, #179
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #21
	mov	w2, #208
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #22
	mov	w2, #0
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #23
	mov	w2, #60
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #24
	mov	w2, #22
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #25
	mov	w2, #21
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #26
	mov	w2, #133
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #27
	mov	w2, #0
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #28
	mov	w2, #0
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #29
	mov	w2, #155
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #30
	mov	w2, #9
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #31
	mov	w2, #16
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #6
	bl	_rt2800_rfcsr_read
	str	w0, [sp, #12]
Lloh0:
	adrp	x8, _RFCSR6_R2@GOTPAGE
Lloh1:
	ldr	x8, [x8, _RFCSR6_R2@GOTPAGEOFF]
Lloh2:
	ldr	w1, [x8]
	add	x0, sp, #12
	mov	w2, #1
	bl	_rt2x00_set_field8
	ldr	w2, [sp, #12]
	mov	x0, x19
	mov	w1, #6
	bl	_rt2800_rfcsr_write
Lloh3:
	adrp	x20, _LDO_CFG0@GOTPAGE
Lloh4:
	ldr	x20, [x20, _LDO_CFG0@GOTPAGEOFF]
	ldr	w1, [x20]
	mov	x0, x19
	bl	_rt2800_register_read
	str	w0, [sp, #8]
Lloh5:
	adrp	x21, _LDO_CFG0_LDO_CORE_VLEVEL@GOTPAGE
Lloh6:
	ldr	x21, [x21, _LDO_CFG0_LDO_CORE_VLEVEL@GOTPAGEOFF]
	ldr	w1, [x21]
	add	x0, sp, #8
	mov	w2, #3
	bl	_rt2x00_set_field32
Lloh7:
	adrp	x22, _LDO_CFG0_BGSEL@GOTPAGE
Lloh8:
	ldr	x22, [x22, _LDO_CFG0_BGSEL@GOTPAGEOFF]
	ldr	w1, [x22]
	add	x0, sp, #8
	mov	w2, #1
	bl	_rt2x00_set_field32
	ldr	w1, [x20]
	ldr	w2, [sp, #8]
	mov	x0, x19
	bl	_rt2800_register_write
	mov	w0, #1
	bl	_msleep
	ldr	w1, [x20]
	mov	x0, x19
	bl	_rt2800_register_read
	str	w0, [sp, #8]
	ldr	w1, [x21]
	add	x0, sp, #8
	mov	w2, #0
	bl	_rt2x00_set_field32
	ldr	w1, [x22]
	add	x0, sp, #8
	mov	w2, #1
	bl	_rt2x00_set_field32
	ldr	w1, [x20]
	ldr	w2, [sp, #8]
	mov	x0, x19
	bl	_rt2800_register_write
	mov	x0, x19
	bl	_rt2800_rx_filter_calibration
	mov	x0, x19
	bl	_rt2800_led_open_drain_enable
	mov	x0, x19
	bl	_rt2800_normal_mode_setup_3xxx
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #64
	ret
	.loh AdrpLdrGot	Lloh7, Lloh8
	.loh AdrpLdrGot	Lloh5, Lloh6
	.loh AdrpLdrGot	Lloh3, Lloh4
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_RFCSR6_R2,4,2                  ; @RFCSR6_R2
	.comm	_LDO_CFG0,4,2                   ; @LDO_CFG0
	.comm	_LDO_CFG0_LDO_CORE_VLEVEL,4,2   ; @LDO_CFG0_LDO_CORE_VLEVEL
	.comm	_LDO_CFG0_BGSEL,4,2             ; @LDO_CFG0_BGSEL
	.no_dead_strip	_rt2800_init_rfcsr_3572
.subsections_via_symbols
