	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function ath5k_hw_rf5110_calibrate
_ath5k_hw_rf5110_calibrate:             ## @ath5k_hw_rf5110_calibrate
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$24, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	_AR5K_CALIBRATION_FULL@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	testl	%eax, (%rdi)
	je	LBB0_1
## %bb.2:
	movq	%rsi, %rbx
	movq	%rdi, %r15
	movq	_AR5K_DIAG_SW_5210@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_AR5K_DIAG_SW_DIS_TX_5210@GOTPCREL(%rip), %rax
	movq	_AR5K_DIAG_SW_DIS_RX_5210@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	orl	(%rax), %edx
	callq	_AR5K_REG_ENABLE_BITS
	movq	_AR5K_BEACON_5210@GOTPCREL(%rip), %r14
	movl	(%r14), %esi
	movq	%r15, %rdi
	callq	_ath5k_hw_reg_read
	movq	_AR5K_BEACON_ENABLE@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	notl	%esi
	movl	%eax, -52(%rbp)                 ## 4-byte Spill
	andl	%eax, %esi
	movl	(%r14), %edx
	movq	%r15, %rdi
	callq	_ath5k_hw_reg_write
	movl	$2000, %edi                     ## imm = 0x7D0
	movl	$2500, %esi                     ## imm = 0x9C4
	callq	_usleep_range
	movq	_AR5K_PHY_AGC@GOTPCREL(%rip), %r12
	movl	(%r12), %esi
	movq	_AR5K_PHY_AGC_DISABLE@GOTPCREL(%rip), %r14
	movl	(%r14), %edx
	movq	%r15, %rdi
	callq	_AR5K_REG_ENABLE_BITS
	movl	$10, %edi
	callq	_udelay
	movq	%r15, %rdi
	movq	%rbx, %rsi
	callq	_ath5k_hw_channel
	movl	%eax, %r13d
	movq	_AR5K_PHY_ACT_ENABLE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_AR5K_PHY_ACT@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r15, %rdi
	callq	_ath5k_hw_reg_write
	movl	$1000, %edi                     ## imm = 0x3E8
	movl	$1500, %esi                     ## imm = 0x5DC
	callq	_usleep_range
	movl	(%r12), %esi
	movl	(%r14), %edx
	movq	%r15, %rdi
	callq	_AR5K_REG_DISABLE_BITS
	testl	%r13d, %r13d
	jne	LBB0_6
## %bb.3:
	movq	%rbx, -64(%rbp)                 ## 8-byte Spill
	movq	_AR5K_PHY_SIG@GOTPCREL(%rip), %r14
	movl	(%r14), %esi
	movq	%r14, %r12
	movq	%r15, %rdi
	callq	_ath5k_hw_reg_read
	movl	%eax, %r13d
	movl	%eax, -48(%rbp)                 ## 4-byte Spill
	movq	_AR5K_PHY_AGCCOARSE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r15, %rdi
	callq	_ath5k_hw_reg_read
	movl	%eax, -44(%rbp)                 ## 4-byte Spill
	movq	_AR5K_PHY_ADCSAT@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r15, %rdi
	callq	_ath5k_hw_reg_read
	movl	%eax, %r14d
	movq	_AR5K_PHY_SIG_FIRPWR@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	%esi, %ebx
	notl	%ebx
	andl	%r13d, %ebx
	movl	$-1, %edi
	callq	_AR5K_REG_SM
	orl	%eax, %ebx
	movl	(%r12), %edx
	movq	%r15, %rdi
	movl	%ebx, %esi
	callq	_ath5k_hw_reg_write
	movq	_AR5K_PHY_AGCCOARSE_HI@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_AR5K_PHY_AGCCOARSE_LO@GOTPCREL(%rip), %r13
	movl	(%r13), %r12d
	orl	%esi, %r12d
	notl	%r12d
	andl	-44(%rbp), %r12d                ## 4-byte Folded Reload
	movl	$-1, %edi
	callq	_AR5K_REG_SM
	movl	%eax, %ebx
	movl	(%r13), %esi
	movl	$-127, %edi
	callq	_AR5K_REG_SM
	orl	%eax, %ebx
	orl	%r12d, %ebx
	movq	_AR5K_PHY_AGCCOARSE@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r15, %rdi
	movl	%ebx, %esi
	callq	_ath5k_hw_reg_write
	movq	_AR5K_PHY_ADCSAT_ICNT@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_AR5K_PHY_ADCSAT_THR@GOTPCREL(%rip), %r12
	movl	(%r12), %ebx
	orl	%esi, %ebx
	notl	%ebx
	andl	%r14d, %ebx
	movl	$2, %edi
	callq	_AR5K_REG_SM
	movl	%eax, %r13d
	movl	(%r12), %esi
	movl	$12, %edi
	callq	_AR5K_REG_SM
	orl	%eax, %r13d
	orl	%ebx, %r13d
	movq	_AR5K_PHY_ADCSAT@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r15, %rdi
	movl	%r13d, %esi
	callq	_ath5k_hw_reg_write
	movl	$20, %edi
	callq	_udelay
	movq	_AR5K_PHY_AGC@GOTPCREL(%rip), %r12
	movl	(%r12), %esi
	movq	_AR5K_PHY_AGC_DISABLE@GOTPCREL(%rip), %rbx
	movl	(%rbx), %edx
	movq	%r15, %rdi
	callq	_AR5K_REG_ENABLE_BITS
	movl	$10, %edi
	callq	_udelay
	movq	_AR5K_PHY_RFSTG_DISABLE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_AR5K_PHY_RFSTG@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r15, %rdi
	callq	_ath5k_hw_reg_write
	movl	(%r12), %esi
	movl	(%rbx), %edx
	movq	%r15, %rdi
	callq	_AR5K_REG_DISABLE_BITS
	movl	$1000, %edi                     ## imm = 0x3E8
	movl	$1500, %esi                     ## imm = 0x5DC
	callq	_usleep_range
	movq	_AR5K_PHY_AGCCTL@GOTPCREL(%rip), %r12
	movl	(%r12), %esi
	movq	_AR5K_PHY_AGCCTL_CAL@GOTPCREL(%rip), %rbx
	movl	(%rbx), %edx
	movq	%r15, %rdi
	callq	_AR5K_REG_ENABLE_BITS
	movl	(%r12), %esi
	movl	(%rbx), %edx
	xorl	%r13d, %r13d
	movq	%r15, %rdi
	xorl	%ecx, %ecx
	xorl	%r8d, %r8d
	callq	_ath5k_hw_register_timeout
	movl	%eax, %r12d
	movq	_AR5K_PHY_SIG@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r15, %rdi
	movl	-48(%rbp), %esi                 ## 4-byte Reload
	callq	_ath5k_hw_reg_write
	movq	_AR5K_PHY_AGCCOARSE@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r15, %rdi
	movl	-44(%rbp), %esi                 ## 4-byte Reload
	callq	_ath5k_hw_reg_write
	movq	_AR5K_PHY_ADCSAT@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r15, %rdi
	movl	%r14d, %esi
	callq	_ath5k_hw_reg_write
	testl	%r12d, %r12d
	je	LBB0_5
## %bb.4:
	movq	-64(%rbp), %rax                 ## 8-byte Reload
	movl	(%rax), %edx
	leaq	L_.str(%rip), %rsi
	movq	%r15, %rdi
	callq	_ATH5K_ERR
	movl	%r12d, %r13d
	jmp	LBB0_6
LBB0_1:
	xorl	%r13d, %r13d
	jmp	LBB0_6
LBB0_5:
	movq	_AR5K_DIAG_SW_5210@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_AR5K_DIAG_SW_DIS_RX_5210@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	_AR5K_DIAG_SW_DIS_TX_5210@GOTPCREL(%rip), %rax
	orl	(%rax), %edx
	movq	%r15, %rdi
	callq	_AR5K_REG_DISABLE_BITS
	movq	_AR5K_BEACON_5210@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r15, %rdi
	movl	-52(%rbp), %esi                 ## 4-byte Reload
	callq	_ath5k_hw_reg_write
LBB0_6:
	movl	%r13d, %eax
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_AR5K_CALIBRATION_FULL,4,2      ## @AR5K_CALIBRATION_FULL
	.comm	_AR5K_DIAG_SW_5210,4,2          ## @AR5K_DIAG_SW_5210
	.comm	_AR5K_DIAG_SW_DIS_TX_5210,4,2   ## @AR5K_DIAG_SW_DIS_TX_5210
	.comm	_AR5K_DIAG_SW_DIS_RX_5210,4,2   ## @AR5K_DIAG_SW_DIS_RX_5210
	.comm	_AR5K_BEACON_5210,4,2           ## @AR5K_BEACON_5210
	.comm	_AR5K_BEACON_ENABLE,4,2         ## @AR5K_BEACON_ENABLE
	.comm	_AR5K_PHY_AGC,4,2               ## @AR5K_PHY_AGC
	.comm	_AR5K_PHY_AGC_DISABLE,4,2       ## @AR5K_PHY_AGC_DISABLE
	.comm	_AR5K_PHY_ACT_ENABLE,4,2        ## @AR5K_PHY_ACT_ENABLE
	.comm	_AR5K_PHY_ACT,4,2               ## @AR5K_PHY_ACT
	.comm	_AR5K_PHY_SIG,4,2               ## @AR5K_PHY_SIG
	.comm	_AR5K_PHY_AGCCOARSE,4,2         ## @AR5K_PHY_AGCCOARSE
	.comm	_AR5K_PHY_ADCSAT,4,2            ## @AR5K_PHY_ADCSAT
	.comm	_AR5K_PHY_SIG_FIRPWR,4,2        ## @AR5K_PHY_SIG_FIRPWR
	.comm	_AR5K_PHY_AGCCOARSE_HI,4,2      ## @AR5K_PHY_AGCCOARSE_HI
	.comm	_AR5K_PHY_AGCCOARSE_LO,4,2      ## @AR5K_PHY_AGCCOARSE_LO
	.comm	_AR5K_PHY_ADCSAT_ICNT,4,2       ## @AR5K_PHY_ADCSAT_ICNT
	.comm	_AR5K_PHY_ADCSAT_THR,4,2        ## @AR5K_PHY_ADCSAT_THR
	.comm	_AR5K_PHY_RFSTG_DISABLE,4,2     ## @AR5K_PHY_RFSTG_DISABLE
	.comm	_AR5K_PHY_RFSTG,4,2             ## @AR5K_PHY_RFSTG
	.comm	_AR5K_PHY_AGCCTL,4,2            ## @AR5K_PHY_AGCCTL
	.comm	_AR5K_PHY_AGCCTL_CAL,4,2        ## @AR5K_PHY_AGCCTL_CAL
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"calibration timeout (%uMHz)\n"

	.no_dead_strip	_ath5k_hw_rf5110_calibrate
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function ath5k_hw_rf5110_calibrate
_ath5k_hw_rf5110_calibrate:             ; @ath5k_hw_rf5110_calibrate
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #112
	.cfi_def_cfa_offset 112
	stp	x28, x27, [sp, #16]             ; 16-byte Folded Spill
	stp	x26, x25, [sp, #32]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #48]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #64]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #80]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #96]             ; 16-byte Folded Spill
	add	x29, sp, #96
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	ldr	w8, [x0]
Lloh0:
	adrp	x9, _AR5K_CALIBRATION_FULL@GOTPAGE
Lloh1:
	ldr	x9, [x9, _AR5K_CALIBRATION_FULL@GOTPAGEOFF]
Lloh2:
	ldr	w9, [x9]
	tst	w9, w8
	b.eq	LBB0_4
; %bb.1:
	mov	x20, x1
	mov	x19, x0
Lloh3:
	adrp	x8, _AR5K_DIAG_SW_5210@GOTPAGE
Lloh4:
	ldr	x8, [x8, _AR5K_DIAG_SW_5210@GOTPAGEOFF]
Lloh5:
	adrp	x9, _AR5K_DIAG_SW_DIS_TX_5210@GOTPAGE
Lloh6:
	ldr	x9, [x9, _AR5K_DIAG_SW_DIS_TX_5210@GOTPAGEOFF]
Lloh7:
	ldr	w1, [x8]
Lloh8:
	ldr	w8, [x9]
Lloh9:
	adrp	x9, _AR5K_DIAG_SW_DIS_RX_5210@GOTPAGE
Lloh10:
	ldr	x9, [x9, _AR5K_DIAG_SW_DIS_RX_5210@GOTPAGEOFF]
Lloh11:
	ldr	w9, [x9]
	orr	w2, w9, w8
	bl	_AR5K_REG_ENABLE_BITS
Lloh12:
	adrp	x22, _AR5K_BEACON_5210@GOTPAGE
Lloh13:
	ldr	x22, [x22, _AR5K_BEACON_5210@GOTPAGEOFF]
	ldr	w1, [x22]
	mov	x0, x19
	bl	_ath5k_hw_reg_read
	mov	x21, x0
Lloh14:
	adrp	x8, _AR5K_BEACON_ENABLE@GOTPAGE
Lloh15:
	ldr	x8, [x8, _AR5K_BEACON_ENABLE@GOTPAGEOFF]
Lloh16:
	ldr	w8, [x8]
	bic	w1, w0, w8
	ldr	w2, [x22]
	mov	x0, x19
	bl	_ath5k_hw_reg_write
	mov	w0, #2000
	mov	w1, #2500
	bl	_usleep_range
Lloh17:
	adrp	x27, _AR5K_PHY_AGC@GOTPAGE
Lloh18:
	ldr	x27, [x27, _AR5K_PHY_AGC@GOTPAGEOFF]
	ldr	w1, [x27]
Lloh19:
	adrp	x28, _AR5K_PHY_AGC_DISABLE@GOTPAGE
Lloh20:
	ldr	x28, [x28, _AR5K_PHY_AGC_DISABLE@GOTPAGEOFF]
	ldr	w2, [x28]
	mov	x0, x19
	bl	_AR5K_REG_ENABLE_BITS
	mov	w0, #10
	bl	_udelay
	mov	x0, x19
	mov	x1, x20
	bl	_ath5k_hw_channel
	mov	x25, x0
Lloh21:
	adrp	x8, _AR5K_PHY_ACT_ENABLE@GOTPAGE
Lloh22:
	ldr	x8, [x8, _AR5K_PHY_ACT_ENABLE@GOTPAGEOFF]
Lloh23:
	ldr	w1, [x8]
Lloh24:
	adrp	x8, _AR5K_PHY_ACT@GOTPAGE
Lloh25:
	ldr	x8, [x8, _AR5K_PHY_ACT@GOTPAGEOFF]
Lloh26:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_ath5k_hw_reg_write
	mov	w0, #1000
	mov	w1, #1500
	bl	_usleep_range
	ldr	w1, [x27]
	ldr	w2, [x28]
	mov	x0, x19
	bl	_AR5K_REG_DISABLE_BITS
	cbnz	w25, LBB0_6
; %bb.2:
	str	w21, [sp, #8]                   ; 4-byte Folded Spill
Lloh27:
	adrp	x8, _AR5K_PHY_SIG@GOTPAGE
Lloh28:
	ldr	x8, [x8, _AR5K_PHY_SIG@GOTPAGEOFF]
	ldr	w1, [x8]
	mov	x26, x8
	mov	x0, x19
	bl	_ath5k_hw_reg_read
	mov	x23, x0
	str	w0, [sp, #12]                   ; 4-byte Folded Spill
Lloh29:
	adrp	x22, _AR5K_PHY_AGCCOARSE@GOTPAGE
Lloh30:
	ldr	x22, [x22, _AR5K_PHY_AGCCOARSE@GOTPAGEOFF]
	ldr	w1, [x22]
	mov	x0, x19
	bl	_ath5k_hw_reg_read
	mov	x24, x0
Lloh31:
	adrp	x8, _AR5K_PHY_ADCSAT@GOTPAGE
Lloh32:
	ldr	x8, [x8, _AR5K_PHY_ADCSAT@GOTPAGEOFF]
Lloh33:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_ath5k_hw_reg_read
	mov	x21, x0
Lloh34:
	adrp	x8, _AR5K_PHY_SIG_FIRPWR@GOTPAGE
Lloh35:
	ldr	x8, [x8, _AR5K_PHY_SIG_FIRPWR@GOTPAGEOFF]
Lloh36:
	ldr	w1, [x8]
	bic	w25, w23, w1
	mov	w0, #-1
	bl	_AR5K_REG_SM
	orr	w1, w25, w0
	ldr	w2, [x26]
	mov	x0, x19
	bl	_ath5k_hw_reg_write
Lloh37:
	adrp	x8, _AR5K_PHY_AGCCOARSE_HI@GOTPAGE
Lloh38:
	ldr	x8, [x8, _AR5K_PHY_AGCCOARSE_HI@GOTPAGEOFF]
Lloh39:
	ldr	w1, [x8]
Lloh40:
	adrp	x25, _AR5K_PHY_AGCCOARSE_LO@GOTPAGE
Lloh41:
	ldr	x25, [x25, _AR5K_PHY_AGCCOARSE_LO@GOTPAGEOFF]
	ldr	w8, [x25]
	orr	w8, w8, w1
	bic	w26, w24, w8
	mov	x23, x24
	mov	w0, #-1
	bl	_AR5K_REG_SM
	orr	w26, w26, w0
	ldr	w1, [x25]
	mov	w0, #-127
	bl	_AR5K_REG_SM
	orr	w1, w26, w0
	ldr	w2, [x22]
	mov	x0, x19
	bl	_ath5k_hw_reg_write
Lloh42:
	adrp	x8, _AR5K_PHY_ADCSAT_ICNT@GOTPAGE
Lloh43:
	ldr	x8, [x8, _AR5K_PHY_ADCSAT_ICNT@GOTPAGEOFF]
Lloh44:
	ldr	w1, [x8]
Lloh45:
	adrp	x25, _AR5K_PHY_ADCSAT_THR@GOTPAGE
Lloh46:
	ldr	x25, [x25, _AR5K_PHY_ADCSAT_THR@GOTPAGEOFF]
	ldr	w8, [x25]
	orr	w8, w8, w1
	bic	w26, w21, w8
	mov	w0, #2
	bl	_AR5K_REG_SM
	orr	w26, w26, w0
	ldr	w1, [x25]
	mov	w0, #12
	bl	_AR5K_REG_SM
	orr	w1, w26, w0
Lloh47:
	adrp	x8, _AR5K_PHY_ADCSAT@GOTPAGE
Lloh48:
	ldr	x8, [x8, _AR5K_PHY_ADCSAT@GOTPAGEOFF]
Lloh49:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_ath5k_hw_reg_write
	mov	w0, #20
	bl	_udelay
	ldr	w1, [x27]
	ldr	w2, [x28]
	mov	x0, x19
	bl	_AR5K_REG_ENABLE_BITS
	mov	w0, #10
	bl	_udelay
Lloh50:
	adrp	x8, _AR5K_PHY_RFSTG_DISABLE@GOTPAGE
Lloh51:
	ldr	x8, [x8, _AR5K_PHY_RFSTG_DISABLE@GOTPAGEOFF]
Lloh52:
	ldr	w1, [x8]
Lloh53:
	adrp	x8, _AR5K_PHY_RFSTG@GOTPAGE
Lloh54:
	ldr	x8, [x8, _AR5K_PHY_RFSTG@GOTPAGEOFF]
Lloh55:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_ath5k_hw_reg_write
	ldr	w1, [x27]
	ldr	w2, [x28]
	mov	x0, x19
	bl	_AR5K_REG_DISABLE_BITS
	mov	w0, #1000
	mov	w1, #1500
	bl	_usleep_range
Lloh56:
	adrp	x25, _AR5K_PHY_AGCCTL@GOTPAGE
Lloh57:
	ldr	x25, [x25, _AR5K_PHY_AGCCTL@GOTPAGEOFF]
	ldr	w1, [x25]
Lloh58:
	adrp	x26, _AR5K_PHY_AGCCTL_CAL@GOTPAGE
Lloh59:
	ldr	x26, [x26, _AR5K_PHY_AGCCTL_CAL@GOTPAGEOFF]
	ldr	w2, [x26]
	mov	x0, x19
	bl	_AR5K_REG_ENABLE_BITS
	ldr	w1, [x25]
	ldr	w2, [x26]
	mov	x0, x19
	mov	w3, #0
	mov	w4, #0
	bl	_ath5k_hw_register_timeout
	mov	x25, x0
Lloh60:
	adrp	x8, _AR5K_PHY_SIG@GOTPAGE
Lloh61:
	ldr	x8, [x8, _AR5K_PHY_SIG@GOTPAGEOFF]
Lloh62:
	ldr	w2, [x8]
	mov	x0, x19
	ldr	w1, [sp, #12]                   ; 4-byte Folded Reload
	bl	_ath5k_hw_reg_write
	ldr	w2, [x22]
	mov	x0, x19
	mov	x1, x24
	bl	_ath5k_hw_reg_write
Lloh63:
	adrp	x8, _AR5K_PHY_ADCSAT@GOTPAGE
Lloh64:
	ldr	x8, [x8, _AR5K_PHY_ADCSAT@GOTPAGEOFF]
Lloh65:
	ldr	w2, [x8]
	mov	x0, x19
	mov	x1, x21
	bl	_ath5k_hw_reg_write
	cbz	w25, LBB0_5
; %bb.3:
	ldr	w2, [x20]
Lloh66:
	adrp	x1, l_.str@PAGE
Lloh67:
	add	x1, x1, l_.str@PAGEOFF
	mov	x0, x19
	bl	_ATH5K_ERR
	b	LBB0_6
LBB0_4:
	mov	w25, #0
	b	LBB0_6
LBB0_5:
Lloh68:
	adrp	x8, _AR5K_DIAG_SW_5210@GOTPAGE
Lloh69:
	ldr	x8, [x8, _AR5K_DIAG_SW_5210@GOTPAGEOFF]
Lloh70:
	ldr	w1, [x8]
Lloh71:
	adrp	x8, _AR5K_DIAG_SW_DIS_TX_5210@GOTPAGE
Lloh72:
	ldr	x8, [x8, _AR5K_DIAG_SW_DIS_TX_5210@GOTPAGEOFF]
Lloh73:
	ldr	w8, [x8]
Lloh74:
	adrp	x9, _AR5K_DIAG_SW_DIS_RX_5210@GOTPAGE
Lloh75:
	ldr	x9, [x9, _AR5K_DIAG_SW_DIS_RX_5210@GOTPAGEOFF]
Lloh76:
	ldr	w9, [x9]
	orr	w2, w9, w8
	mov	x0, x19
	bl	_AR5K_REG_DISABLE_BITS
Lloh77:
	adrp	x8, _AR5K_BEACON_5210@GOTPAGE
Lloh78:
	ldr	x8, [x8, _AR5K_BEACON_5210@GOTPAGEOFF]
Lloh79:
	ldr	w2, [x8]
	mov	x0, x19
	ldr	w1, [sp, #8]                    ; 4-byte Folded Reload
	bl	_ath5k_hw_reg_write
LBB0_6:
	mov	x0, x25
	ldp	x29, x30, [sp, #96]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #80]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #64]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #48]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #32]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #112
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGot	Lloh19, Lloh20
	.loh AdrpLdrGot	Lloh17, Lloh18
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh16
	.loh AdrpLdrGot	Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh7
	.loh AdrpLdrGotLdr	Lloh63, Lloh64, Lloh65
	.loh AdrpLdrGotLdr	Lloh60, Lloh61, Lloh62
	.loh AdrpLdrGot	Lloh58, Lloh59
	.loh AdrpLdrGot	Lloh56, Lloh57
	.loh AdrpLdrGotLdr	Lloh53, Lloh54, Lloh55
	.loh AdrpLdrGotLdr	Lloh50, Lloh51, Lloh52
	.loh AdrpLdrGotLdr	Lloh47, Lloh48, Lloh49
	.loh AdrpLdrGot	Lloh45, Lloh46
	.loh AdrpLdrGotLdr	Lloh42, Lloh43, Lloh44
	.loh AdrpLdrGot	Lloh40, Lloh41
	.loh AdrpLdrGotLdr	Lloh37, Lloh38, Lloh39
	.loh AdrpLdrGotLdr	Lloh34, Lloh35, Lloh36
	.loh AdrpLdrGotLdr	Lloh31, Lloh32, Lloh33
	.loh AdrpLdrGot	Lloh29, Lloh30
	.loh AdrpLdrGot	Lloh27, Lloh28
	.loh AdrpAdd	Lloh66, Lloh67
	.loh AdrpLdrGotLdr	Lloh77, Lloh78, Lloh79
	.loh AdrpLdrGotLdr	Lloh74, Lloh75, Lloh76
	.loh AdrpLdrGotLdr	Lloh71, Lloh72, Lloh73
	.loh AdrpLdrGotLdr	Lloh68, Lloh69, Lloh70
	.cfi_endproc
                                        ; -- End function
	.comm	_AR5K_CALIBRATION_FULL,4,2      ; @AR5K_CALIBRATION_FULL
	.comm	_AR5K_DIAG_SW_5210,4,2          ; @AR5K_DIAG_SW_5210
	.comm	_AR5K_DIAG_SW_DIS_TX_5210,4,2   ; @AR5K_DIAG_SW_DIS_TX_5210
	.comm	_AR5K_DIAG_SW_DIS_RX_5210,4,2   ; @AR5K_DIAG_SW_DIS_RX_5210
	.comm	_AR5K_BEACON_5210,4,2           ; @AR5K_BEACON_5210
	.comm	_AR5K_BEACON_ENABLE,4,2         ; @AR5K_BEACON_ENABLE
	.comm	_AR5K_PHY_AGC,4,2               ; @AR5K_PHY_AGC
	.comm	_AR5K_PHY_AGC_DISABLE,4,2       ; @AR5K_PHY_AGC_DISABLE
	.comm	_AR5K_PHY_ACT_ENABLE,4,2        ; @AR5K_PHY_ACT_ENABLE
	.comm	_AR5K_PHY_ACT,4,2               ; @AR5K_PHY_ACT
	.comm	_AR5K_PHY_SIG,4,2               ; @AR5K_PHY_SIG
	.comm	_AR5K_PHY_AGCCOARSE,4,2         ; @AR5K_PHY_AGCCOARSE
	.comm	_AR5K_PHY_ADCSAT,4,2            ; @AR5K_PHY_ADCSAT
	.comm	_AR5K_PHY_SIG_FIRPWR,4,2        ; @AR5K_PHY_SIG_FIRPWR
	.comm	_AR5K_PHY_AGCCOARSE_HI,4,2      ; @AR5K_PHY_AGCCOARSE_HI
	.comm	_AR5K_PHY_AGCCOARSE_LO,4,2      ; @AR5K_PHY_AGCCOARSE_LO
	.comm	_AR5K_PHY_ADCSAT_ICNT,4,2       ; @AR5K_PHY_ADCSAT_ICNT
	.comm	_AR5K_PHY_ADCSAT_THR,4,2        ; @AR5K_PHY_ADCSAT_THR
	.comm	_AR5K_PHY_RFSTG_DISABLE,4,2     ; @AR5K_PHY_RFSTG_DISABLE
	.comm	_AR5K_PHY_RFSTG,4,2             ; @AR5K_PHY_RFSTG
	.comm	_AR5K_PHY_AGCCTL,4,2            ; @AR5K_PHY_AGCCTL
	.comm	_AR5K_PHY_AGCCTL_CAL,4,2        ; @AR5K_PHY_AGCCTL_CAL
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"calibration timeout (%uMHz)\n"

	.no_dead_strip	_ath5k_hw_rf5110_calibrate
.subsections_via_symbols
