	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function ice_cfg_itr
_ice_cfg_itr:                           ## @ice_cfg_itr
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rsi, %rbx
	movq	%rdi, %r14
	callq	_ice_cfg_itr_gran
	cmpq	$0, 96(%rbx)
	je	LBB0_4
## %bb.1:
	movq	88(%rbx), %rdi
	testq	%rdi, %rdi
	jne	LBB0_3
## %bb.2:
	movq	_ICE_DFLT_RX_ITR@GOTPCREL(%rip), %rax
	movq	(%rax), %rdi
	movq	%rdi, 88(%rbx)
LBB0_3:
	callq	_ITR_TO_REG
	movq	%rax, 72(%rbx)
	movq	_jiffies@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rcx
	incq	%rcx
	movq	%rcx, 80(%rbx)
	movq	%rax, 56(%rbx)
	movl	(%rbx), %esi
	movl	64(%rbx), %edi
	callq	_GLINT_ITR
	movl	%eax, %r15d
	movq	56(%rbx), %rdi
	callq	_ITR_REG_ALIGN
	movq	_ICE_ITR_GRAN_S@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	sarl	%cl, %eax
	movq	%r14, %rdi
	movl	%r15d, %esi
	movl	%eax, %edx
	callq	_wr32
LBB0_4:
	cmpq	$0, 48(%rbx)
	je	LBB0_8
## %bb.5:
	movq	40(%rbx), %rdi
	testq	%rdi, %rdi
	jne	LBB0_7
## %bb.6:
	movq	_ICE_DFLT_TX_ITR@GOTPCREL(%rip), %rax
	movq	(%rax), %rdi
	movq	%rdi, 40(%rbx)
LBB0_7:
	callq	_ITR_TO_REG
	movq	%rax, 24(%rbx)
	movq	_jiffies@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rcx
	incq	%rcx
	movq	%rcx, 32(%rbx)
	movq	%rax, 8(%rbx)
	movl	(%rbx), %esi
	movl	16(%rbx), %edi
	callq	_GLINT_ITR
	movl	%eax, %r15d
	movq	8(%rbx), %rdi
	callq	_ITR_REG_ALIGN
	movq	_ICE_ITR_GRAN_S@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	sarl	%cl, %eax
	movq	%r14, %rdi
	movl	%r15d, %esi
	movl	%eax, %edx
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_wr32                           ## TAILCALL
LBB0_8:
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_ICE_DFLT_RX_ITR,8,3            ## @ICE_DFLT_RX_ITR
	.comm	_jiffies,8,3                    ## @jiffies
	.comm	_ICE_ITR_GRAN_S,4,2             ## @ICE_ITR_GRAN_S
	.comm	_ICE_DFLT_TX_ITR,8,3            ## @ICE_DFLT_TX_ITR
	.no_dead_strip	_ice_cfg_itr
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function ice_cfg_itr
_ice_cfg_itr:                           ; @ice_cfg_itr
	.cfi_startproc
; %bb.0:
	stp	x24, x23, [sp, #-64]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x20, x1
	mov	x19, x0
	bl	_ice_cfg_itr_gran
	ldr	x8, [x20, #96]
Lloh0:
	adrp	x23, _jiffies@GOTPAGE
Lloh1:
	ldr	x23, [x23, _jiffies@GOTPAGEOFF]
Lloh2:
	adrp	x22, _ICE_ITR_GRAN_S@GOTPAGE
Lloh3:
	ldr	x22, [x22, _ICE_ITR_GRAN_S@GOTPAGEOFF]
	cbz	x8, LBB0_4
; %bb.1:
	ldr	x0, [x20, #88]
	cbnz	x0, LBB0_3
; %bb.2:
Lloh4:
	adrp	x8, _ICE_DFLT_RX_ITR@GOTPAGE
Lloh5:
	ldr	x8, [x8, _ICE_DFLT_RX_ITR@GOTPAGEOFF]
Lloh6:
	ldr	x0, [x8]
	str	x0, [x20, #88]
LBB0_3:
	bl	_ITR_TO_REG
	ldr	x8, [x23]
	add	x8, x8, #1
	stp	x0, x8, [x20, #72]
	str	x0, [x20, #56]
	ldr	w0, [x20, #64]
	ldr	w1, [x20]
	bl	_GLINT_ITR
	mov	x21, x0
	ldr	x0, [x20, #56]
	bl	_ITR_REG_ALIGN
	ldr	w8, [x22]
	asr	w2, w0, w8
	mov	x0, x19
	mov	x1, x21
	bl	_wr32
LBB0_4:
	ldr	x8, [x20, #48]
	cbz	x8, LBB0_8
; %bb.5:
	ldr	x0, [x20, #40]
	cbnz	x0, LBB0_7
; %bb.6:
Lloh7:
	adrp	x8, _ICE_DFLT_TX_ITR@GOTPAGE
Lloh8:
	ldr	x8, [x8, _ICE_DFLT_TX_ITR@GOTPAGEOFF]
Lloh9:
	ldr	x0, [x8]
	str	x0, [x20, #40]
LBB0_7:
	bl	_ITR_TO_REG
	ldr	x8, [x23]
	add	x8, x8, #1
	stp	x0, x8, [x20, #24]
	str	x0, [x20, #8]
	ldr	w0, [x20, #16]
	ldr	w1, [x20]
	bl	_GLINT_ITR
	mov	x21, x0
	ldr	x0, [x20, #8]
	bl	_ITR_REG_ALIGN
	ldr	w8, [x22]
	asr	w2, w0, w8
	mov	x0, x19
	mov	x1, x21
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	b	_wr32
LBB0_8:
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh4, Lloh5, Lloh6
	.loh AdrpLdrGotLdr	Lloh7, Lloh8, Lloh9
	.cfi_endproc
                                        ; -- End function
	.comm	_ICE_DFLT_RX_ITR,8,3            ; @ICE_DFLT_RX_ITR
	.comm	_jiffies,8,3                    ; @jiffies
	.comm	_ICE_ITR_GRAN_S,4,2             ; @ICE_ITR_GRAN_S
	.comm	_ICE_DFLT_TX_ITR,8,3            ; @ICE_DFLT_TX_ITR
	.no_dead_strip	_ice_cfg_itr
.subsections_via_symbols
