	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function nwl_pcie_enable_msi
_nwl_pcie_enable_msi:                   ## @nwl_pcie_enable_msi
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r15
	movq	40(%rdi), %r14
	movq	%r14, %rdi
	callq	_to_platform_device
	movq	%rax, %r12
	movq	_INT_PCI_MSI_NR@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_BITS_TO_LONGS
                                        ## kill: def $eax killed $eax def $rax
	leal	(,%rax,8), %ebx
	leaq	32(%r15), %rdi
	callq	_mutex_init
	movq	_GFP_KERNEL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	%ebx, %edi
	callq	_kzalloc
	movq	%rax, 24(%r15)
	testq	%rax, %rax
	je	LBB0_1
## %bb.2:
	leaq	L_.str(%rip), %rsi
	movq	%r12, %rdi
	callq	_platform_get_irq_byname
	movq	%rax, 8(%r15)
	testq	%rax, %rax
	js	LBB0_3
## %bb.4:
	movq	_nwl_pcie_msi_handler_high@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	movq	%rax, %rdi
	movq	%r15, %rdx
	callq	_irq_set_chained_handler_and_data
	leaq	L_.str.2(%rip), %rsi
	movq	%r12, %rdi
	callq	_platform_get_irq_byname
	movq	%rax, 16(%r15)
	testq	%rax, %rax
	jns	LBB0_5
LBB0_3:
	leaq	L_.str.1(%rip), %rsi
	movq	%r14, %rdi
	movq	%rax, %rdx
	xorl	%eax, %eax
	callq	_dev_err
	movq	_EINVAL@GOTPCREL(%rip), %rax
LBB0_7:
	xorl	%ebx, %ebx
	subl	(%rax), %ebx
	movq	24(%r15), %rdi
	callq	_kfree
	movq	$0, 24(%r15)
	jmp	LBB0_8
LBB0_1:
	movq	_ENOMEM@GOTPCREL(%rip), %rax
	xorl	%ebx, %ebx
	subl	(%rax), %ebx
	jmp	LBB0_8
LBB0_5:
	movq	_nwl_pcie_msi_handler_low@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	movq	%rax, %rdi
	movq	%r15, %rdx
	callq	_irq_set_chained_handler_and_data
	movq	_I_MSII_CAPABILITIES@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r15, %rdi
	callq	_nwl_bridge_readl
	movq	_MSII_PRESENT@GOTPCREL(%rip), %rcx
	testl	%eax, (%rcx)
	je	LBB0_6
## %bb.9:
	movq	_I_MSII_CONTROL@GOTPCREL(%rip), %rbx
	movl	(%rbx), %esi
	movq	%r15, %rdi
	callq	_nwl_bridge_readl
	movq	_MSII_ENABLE@GOTPCREL(%rip), %rcx
	orl	(%rcx), %eax
	movl	(%rbx), %edx
	movq	%r15, %rdi
	movl	%eax, %esi
	callq	_nwl_bridge_writel
	movl	(%rbx), %esi
	movq	%r15, %rdi
	callq	_nwl_bridge_readl
	movq	_MSII_STATUS_ENABLE@GOTPCREL(%rip), %rcx
	orl	(%rcx), %eax
	movl	(%rbx), %edx
	movq	%r15, %rdi
	movl	%eax, %esi
	callq	_nwl_bridge_writel
	movq	(%r15), %rbx
	movq	%rbx, %rdi
	callq	_lower_32_bits
	movq	_I_MSII_BASE_LO@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	movq	%r15, %rdi
	movl	%eax, %esi
	callq	_nwl_bridge_writel
	movq	%rbx, %rdi
	callq	_upper_32_bits
	movq	_I_MSII_BASE_HI@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	movq	%r15, %rdi
	movl	%eax, %esi
	callq	_nwl_bridge_writel
	movq	_MSGF_MSI_MASK_HI@GOTPCREL(%rip), %r14
	movl	(%r14), %edx
	xorl	%ebx, %ebx
	movq	%r15, %rdi
	xorl	%esi, %esi
	callq	_nwl_bridge_writel
	movq	_MSGF_MSI_STATUS_HI@GOTPCREL(%rip), %r12
	movl	(%r12), %esi
	movq	%r15, %rdi
	callq	_nwl_bridge_readl
	movq	_MSGF_MSI_SR_HI_MASK@GOTPCREL(%rip), %r13
	andl	(%r13), %eax
	movl	(%r12), %edx
	movq	%r15, %rdi
	movl	%eax, %esi
	callq	_nwl_bridge_writel
	movl	(%r13), %esi
	movl	(%r14), %edx
	movq	%r15, %rdi
	callq	_nwl_bridge_writel
	movq	_MSGF_MSI_MASK_LO@GOTPCREL(%rip), %r14
	movl	(%r14), %edx
	movq	%r15, %rdi
	xorl	%esi, %esi
	callq	_nwl_bridge_writel
	movq	_MSGF_MSI_STATUS_LO@GOTPCREL(%rip), %r12
	movl	(%r12), %esi
	movq	%r15, %rdi
	callq	_nwl_bridge_readl
	movq	_MSGF_MSI_SR_LO_MASK@GOTPCREL(%rip), %r13
	andl	(%r13), %eax
	movl	(%r12), %edx
	movq	%r15, %rdi
	movl	%eax, %esi
	callq	_nwl_bridge_writel
	movl	(%r13), %esi
	movl	(%r14), %edx
	movq	%r15, %rdi
	callq	_nwl_bridge_writel
LBB0_8:
	movl	%ebx, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_6:
	leaq	L_.str.3(%rip), %rsi
	movq	%r14, %rdi
	xorl	%eax, %eax
	callq	_dev_err
	movq	_EIO@GOTPCREL(%rip), %rax
	jmp	LBB0_7
	.cfi_endproc
                                        ## -- End function
	.comm	_INT_PCI_MSI_NR,4,2             ## @INT_PCI_MSI_NR
	.comm	_GFP_KERNEL,4,2                 ## @GFP_KERNEL
	.comm	_ENOMEM,4,2                     ## @ENOMEM
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"msi1"

L_.str.1:                               ## @.str.1
	.asciz	"failed to get IRQ#%d\n"

	.comm	_EINVAL,4,2                     ## @EINVAL
	.comm	_nwl_pcie_msi_handler_high,4,2  ## @nwl_pcie_msi_handler_high
L_.str.2:                               ## @.str.2
	.asciz	"msi0"

	.comm	_nwl_pcie_msi_handler_low,4,2   ## @nwl_pcie_msi_handler_low
	.comm	_I_MSII_CAPABILITIES,4,2        ## @I_MSII_CAPABILITIES
	.comm	_MSII_PRESENT,4,2               ## @MSII_PRESENT
L_.str.3:                               ## @.str.3
	.asciz	"MSI not present\n"

	.comm	_EIO,4,2                        ## @EIO
	.comm	_I_MSII_CONTROL,4,2             ## @I_MSII_CONTROL
	.comm	_MSII_ENABLE,4,2                ## @MSII_ENABLE
	.comm	_MSII_STATUS_ENABLE,4,2         ## @MSII_STATUS_ENABLE
	.comm	_I_MSII_BASE_LO,4,2             ## @I_MSII_BASE_LO
	.comm	_I_MSII_BASE_HI,4,2             ## @I_MSII_BASE_HI
	.comm	_MSGF_MSI_MASK_HI,4,2           ## @MSGF_MSI_MASK_HI
	.comm	_MSGF_MSI_STATUS_HI,4,2         ## @MSGF_MSI_STATUS_HI
	.comm	_MSGF_MSI_SR_HI_MASK,4,2        ## @MSGF_MSI_SR_HI_MASK
	.comm	_MSGF_MSI_MASK_LO,4,2           ## @MSGF_MSI_MASK_LO
	.comm	_MSGF_MSI_STATUS_LO,4,2         ## @MSGF_MSI_STATUS_LO
	.comm	_MSGF_MSI_SR_LO_MASK,4,2        ## @MSGF_MSI_SR_LO_MASK
	.no_dead_strip	_nwl_pcie_enable_msi
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function nwl_pcie_enable_msi
_nwl_pcie_enable_msi:                   ; @nwl_pcie_enable_msi
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #64
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x0
	ldr	x20, [x0, #40]
	mov	x0, x20
	bl	_to_platform_device
	mov	x21, x0
Lloh0:
	adrp	x8, _INT_PCI_MSI_NR@GOTPAGE
Lloh1:
	ldr	x8, [x8, _INT_PCI_MSI_NR@GOTPAGEOFF]
Lloh2:
	ldr	w0, [x8]
	bl	_BITS_TO_LONGS
	lsl	w22, w0, #3
	add	x0, x19, #32
	bl	_mutex_init
Lloh3:
	adrp	x8, _GFP_KERNEL@GOTPAGE
Lloh4:
	ldr	x8, [x8, _GFP_KERNEL@GOTPAGEOFF]
Lloh5:
	ldr	w1, [x8]
	mov	x0, x22
	bl	_kzalloc
	str	x0, [x19, #24]
	cbz	x0, LBB0_5
; %bb.1:
Lloh6:
	adrp	x1, l_.str@PAGE
Lloh7:
	add	x1, x1, l_.str@PAGEOFF
	mov	x0, x21
	bl	_platform_get_irq_byname
	str	x0, [x19, #8]
	tbnz	x0, #63, LBB0_3
; %bb.2:
Lloh8:
	adrp	x8, _nwl_pcie_msi_handler_high@GOTPAGE
Lloh9:
	ldr	x8, [x8, _nwl_pcie_msi_handler_high@GOTPAGEOFF]
Lloh10:
	ldr	w1, [x8]
	mov	x2, x19
	bl	_irq_set_chained_handler_and_data
Lloh11:
	adrp	x1, l_.str.2@PAGE
Lloh12:
	add	x1, x1, l_.str.2@PAGEOFF
	mov	x0, x21
	bl	_platform_get_irq_byname
	str	x0, [x19, #16]
	tbz	x0, #63, LBB0_6
LBB0_3:
	str	x0, [sp]
Lloh13:
	adrp	x1, l_.str.1@PAGE
Lloh14:
	add	x1, x1, l_.str.1@PAGEOFF
	mov	x0, x20
	bl	_dev_err
Lloh15:
	adrp	x8, _EINVAL@GOTPAGE
Lloh16:
	ldr	x8, [x8, _EINVAL@GOTPAGEOFF]
LBB0_4:
	ldr	w8, [x8]
	neg	w20, w8
	ldr	x0, [x19, #24]
	bl	_kfree
	str	xzr, [x19, #24]
	b	LBB0_8
LBB0_5:
Lloh17:
	adrp	x8, _ENOMEM@GOTPAGE
Lloh18:
	ldr	x8, [x8, _ENOMEM@GOTPAGEOFF]
Lloh19:
	ldr	w8, [x8]
	neg	w20, w8
	b	LBB0_8
LBB0_6:
Lloh20:
	adrp	x8, _nwl_pcie_msi_handler_low@GOTPAGE
Lloh21:
	ldr	x8, [x8, _nwl_pcie_msi_handler_low@GOTPAGEOFF]
Lloh22:
	ldr	w1, [x8]
	mov	x2, x19
	bl	_irq_set_chained_handler_and_data
Lloh23:
	adrp	x8, _I_MSII_CAPABILITIES@GOTPAGE
Lloh24:
	ldr	x8, [x8, _I_MSII_CAPABILITIES@GOTPAGEOFF]
Lloh25:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_nwl_bridge_readl
Lloh26:
	adrp	x8, _MSII_PRESENT@GOTPAGE
Lloh27:
	ldr	x8, [x8, _MSII_PRESENT@GOTPAGEOFF]
Lloh28:
	ldr	w8, [x8]
	tst	w8, w0
	b.eq	LBB0_9
; %bb.7:
Lloh29:
	adrp	x20, _I_MSII_CONTROL@GOTPAGE
Lloh30:
	ldr	x20, [x20, _I_MSII_CONTROL@GOTPAGEOFF]
	ldr	w1, [x20]
	mov	x0, x19
	bl	_nwl_bridge_readl
Lloh31:
	adrp	x8, _MSII_ENABLE@GOTPAGE
Lloh32:
	ldr	x8, [x8, _MSII_ENABLE@GOTPAGEOFF]
Lloh33:
	ldr	w8, [x8]
	orr	w1, w8, w0
	ldr	w2, [x20]
	mov	x0, x19
	bl	_nwl_bridge_writel
	ldr	w1, [x20]
	mov	x0, x19
	bl	_nwl_bridge_readl
Lloh34:
	adrp	x8, _MSII_STATUS_ENABLE@GOTPAGE
Lloh35:
	ldr	x8, [x8, _MSII_STATUS_ENABLE@GOTPAGEOFF]
Lloh36:
	ldr	w8, [x8]
	orr	w1, w8, w0
	ldr	w2, [x20]
	mov	x0, x19
	bl	_nwl_bridge_writel
	ldr	x20, [x19]
	mov	x0, x20
	bl	_lower_32_bits
	mov	x1, x0
Lloh37:
	adrp	x8, _I_MSII_BASE_LO@GOTPAGE
Lloh38:
	ldr	x8, [x8, _I_MSII_BASE_LO@GOTPAGEOFF]
Lloh39:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_nwl_bridge_writel
	mov	x0, x20
	bl	_upper_32_bits
	mov	x1, x0
Lloh40:
	adrp	x8, _I_MSII_BASE_HI@GOTPAGE
Lloh41:
	ldr	x8, [x8, _I_MSII_BASE_HI@GOTPAGEOFF]
Lloh42:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_nwl_bridge_writel
Lloh43:
	adrp	x20, _MSGF_MSI_MASK_HI@GOTPAGE
Lloh44:
	ldr	x20, [x20, _MSGF_MSI_MASK_HI@GOTPAGEOFF]
	ldr	w2, [x20]
	mov	x0, x19
	mov	w1, #0
	bl	_nwl_bridge_writel
Lloh45:
	adrp	x21, _MSGF_MSI_STATUS_HI@GOTPAGE
Lloh46:
	ldr	x21, [x21, _MSGF_MSI_STATUS_HI@GOTPAGEOFF]
	ldr	w1, [x21]
	mov	x0, x19
	bl	_nwl_bridge_readl
Lloh47:
	adrp	x22, _MSGF_MSI_SR_HI_MASK@GOTPAGE
Lloh48:
	ldr	x22, [x22, _MSGF_MSI_SR_HI_MASK@GOTPAGEOFF]
	ldr	w8, [x22]
	and	w1, w8, w0
	ldr	w2, [x21]
	mov	x0, x19
	bl	_nwl_bridge_writel
	ldr	w1, [x22]
	ldr	w2, [x20]
	mov	x0, x19
	bl	_nwl_bridge_writel
Lloh49:
	adrp	x20, _MSGF_MSI_MASK_LO@GOTPAGE
Lloh50:
	ldr	x20, [x20, _MSGF_MSI_MASK_LO@GOTPAGEOFF]
	ldr	w2, [x20]
	mov	x0, x19
	mov	w1, #0
	bl	_nwl_bridge_writel
Lloh51:
	adrp	x21, _MSGF_MSI_STATUS_LO@GOTPAGE
Lloh52:
	ldr	x21, [x21, _MSGF_MSI_STATUS_LO@GOTPAGEOFF]
	ldr	w1, [x21]
	mov	x0, x19
	bl	_nwl_bridge_readl
Lloh53:
	adrp	x22, _MSGF_MSI_SR_LO_MASK@GOTPAGE
Lloh54:
	ldr	x22, [x22, _MSGF_MSI_SR_LO_MASK@GOTPAGEOFF]
	ldr	w8, [x22]
	and	w1, w8, w0
	ldr	w2, [x21]
	mov	x0, x19
	bl	_nwl_bridge_writel
	ldr	w1, [x22]
	ldr	w2, [x20]
	mov	x0, x19
	bl	_nwl_bridge_writel
	mov	w20, #0
LBB0_8:
	mov	x0, x20
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #64
	ret
LBB0_9:
Lloh55:
	adrp	x1, l_.str.3@PAGE
Lloh56:
	add	x1, x1, l_.str.3@PAGEOFF
	mov	x0, x20
	bl	_dev_err
Lloh57:
	adrp	x8, _EIO@GOTPAGE
Lloh58:
	ldr	x8, [x8, _EIO@GOTPAGEOFF]
	b	LBB0_4
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpAdd	Lloh6, Lloh7
	.loh AdrpAdd	Lloh11, Lloh12
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGot	Lloh15, Lloh16
	.loh AdrpAdd	Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh19
	.loh AdrpLdrGotLdr	Lloh26, Lloh27, Lloh28
	.loh AdrpLdrGotLdr	Lloh23, Lloh24, Lloh25
	.loh AdrpLdrGotLdr	Lloh20, Lloh21, Lloh22
	.loh AdrpLdrGot	Lloh53, Lloh54
	.loh AdrpLdrGot	Lloh51, Lloh52
	.loh AdrpLdrGot	Lloh49, Lloh50
	.loh AdrpLdrGot	Lloh47, Lloh48
	.loh AdrpLdrGot	Lloh45, Lloh46
	.loh AdrpLdrGot	Lloh43, Lloh44
	.loh AdrpLdrGotLdr	Lloh40, Lloh41, Lloh42
	.loh AdrpLdrGotLdr	Lloh37, Lloh38, Lloh39
	.loh AdrpLdrGotLdr	Lloh34, Lloh35, Lloh36
	.loh AdrpLdrGotLdr	Lloh31, Lloh32, Lloh33
	.loh AdrpLdrGot	Lloh29, Lloh30
	.loh AdrpLdrGot	Lloh57, Lloh58
	.loh AdrpAdd	Lloh55, Lloh56
	.cfi_endproc
                                        ; -- End function
	.comm	_INT_PCI_MSI_NR,4,2             ; @INT_PCI_MSI_NR
	.comm	_GFP_KERNEL,4,2                 ; @GFP_KERNEL
	.comm	_ENOMEM,4,2                     ; @ENOMEM
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"msi1"

l_.str.1:                               ; @.str.1
	.asciz	"failed to get IRQ#%d\n"

	.comm	_EINVAL,4,2                     ; @EINVAL
	.comm	_nwl_pcie_msi_handler_high,4,2  ; @nwl_pcie_msi_handler_high
l_.str.2:                               ; @.str.2
	.asciz	"msi0"

	.comm	_nwl_pcie_msi_handler_low,4,2   ; @nwl_pcie_msi_handler_low
	.comm	_I_MSII_CAPABILITIES,4,2        ; @I_MSII_CAPABILITIES
	.comm	_MSII_PRESENT,4,2               ; @MSII_PRESENT
l_.str.3:                               ; @.str.3
	.asciz	"MSI not present\n"

	.comm	_EIO,4,2                        ; @EIO
	.comm	_I_MSII_CONTROL,4,2             ; @I_MSII_CONTROL
	.comm	_MSII_ENABLE,4,2                ; @MSII_ENABLE
	.comm	_MSII_STATUS_ENABLE,4,2         ; @MSII_STATUS_ENABLE
	.comm	_I_MSII_BASE_LO,4,2             ; @I_MSII_BASE_LO
	.comm	_I_MSII_BASE_HI,4,2             ; @I_MSII_BASE_HI
	.comm	_MSGF_MSI_MASK_HI,4,2           ; @MSGF_MSI_MASK_HI
	.comm	_MSGF_MSI_STATUS_HI,4,2         ; @MSGF_MSI_STATUS_HI
	.comm	_MSGF_MSI_SR_HI_MASK,4,2        ; @MSGF_MSI_SR_HI_MASK
	.comm	_MSGF_MSI_MASK_LO,4,2           ; @MSGF_MSI_MASK_LO
	.comm	_MSGF_MSI_STATUS_LO,4,2         ; @MSGF_MSI_STATUS_LO
	.comm	_MSGF_MSI_SR_LO_MASK,4,2        ; @MSGF_MSI_SR_LO_MASK
	.no_dead_strip	_nwl_pcie_enable_msi
.subsections_via_symbols
