	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function wil_tx_desc_offload_setup_tso
_wil_tx_desc_offload_setup_tso:         ## @wil_tx_desc_offload_setup_tso
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%ecx, %r14d
	movq	%rdi, %r12
	movq	_ETH_HLEN@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, (%rdi)
	movq	_DMA_CFG_DESC_TX_OFFLOAD_CFG_L3T_IPV4_POS@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	movl	%r14d, %esi
	shll	%cl, %esi
	orl	%eax, %esi
	movl	%esi, (%rdi)
	movq	_DMA_CFG_DESC_TX_0_L4_TYPE_POS@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	movl	$2, %eax
	shll	%cl, %eax
	orl	4(%rdi), %eax
	movl	%r9d, %r15d
	movl	%edx, %ebx
	movq	_DMA_CFG_DESC_TX_0_L4_LENGTH_MSK@GOTPCREL(%rip), %rcx
	andl	(%rcx), %r8d
	orl	%eax, %r8d
	movl	%r8d, 4(%rdi)
	movq	_DMA_CFG_DESC_TX_0_TCP_SEG_EN_POS@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_BIT
	movq	_DMA_CFG_DESC_TX_0_SEGMENT_BUF_DETAILS_POS@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shll	%cl, %ebx
	orl	%eax, %ebx
	orl	4(%r12), %ebx
	movq	_DMA_CFG_DESC_TX_0_IPV4_CHECKSUM_EN_POS@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	shll	%cl, %r14d
	orl	%ebx, %r14d
	movl	%r14d, 4(%r12)
	movl	%r15d, 8(%r12)
	movq	_DMA_CFG_DESC_TX_0_TCP_UDP_CHECKSUM_EN_POS@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_BIT
	orl	%eax, 4(%r12)
	movq	_DMA_CFG_DESC_TX_0_PSEUDO_HEADER_CALC_EN_POS@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_BIT
	orl	%eax, 4(%r12)
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_ETH_HLEN,4,2                   ## @ETH_HLEN
	.comm	_DMA_CFG_DESC_TX_OFFLOAD_CFG_L3T_IPV4_POS,4,2 ## @DMA_CFG_DESC_TX_OFFLOAD_CFG_L3T_IPV4_POS
	.comm	_DMA_CFG_DESC_TX_0_L4_TYPE_POS,4,2 ## @DMA_CFG_DESC_TX_0_L4_TYPE_POS
	.comm	_DMA_CFG_DESC_TX_0_L4_LENGTH_MSK,4,2 ## @DMA_CFG_DESC_TX_0_L4_LENGTH_MSK
	.comm	_DMA_CFG_DESC_TX_0_TCP_SEG_EN_POS,4,2 ## @DMA_CFG_DESC_TX_0_TCP_SEG_EN_POS
	.comm	_DMA_CFG_DESC_TX_0_SEGMENT_BUF_DETAILS_POS,4,2 ## @DMA_CFG_DESC_TX_0_SEGMENT_BUF_DETAILS_POS
	.comm	_DMA_CFG_DESC_TX_0_IPV4_CHECKSUM_EN_POS,4,2 ## @DMA_CFG_DESC_TX_0_IPV4_CHECKSUM_EN_POS
	.comm	_DMA_CFG_DESC_TX_0_TCP_UDP_CHECKSUM_EN_POS,4,2 ## @DMA_CFG_DESC_TX_0_TCP_UDP_CHECKSUM_EN_POS
	.comm	_DMA_CFG_DESC_TX_0_PSEUDO_HEADER_CALC_EN_POS,4,2 ## @DMA_CFG_DESC_TX_0_PSEUDO_HEADER_CALC_EN_POS
	.no_dead_strip	_wil_tx_desc_offload_setup_tso
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function wil_tx_desc_offload_setup_tso
_wil_tx_desc_offload_setup_tso:         ; @wil_tx_desc_offload_setup_tso
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x20, x5
	mov	x21, x3
	mov	x22, x2
	mov	x19, x0
	mov	w8, #2
Lloh0:
	adrp	x9, _ETH_HLEN@GOTPAGE
Lloh1:
	ldr	x9, [x9, _ETH_HLEN@GOTPAGEOFF]
Lloh2:
	ldr	w9, [x9]
	str	w9, [x0]
Lloh3:
	adrp	x10, _DMA_CFG_DESC_TX_OFFLOAD_CFG_L3T_IPV4_POS@GOTPAGE
Lloh4:
	ldr	x10, [x10, _DMA_CFG_DESC_TX_OFFLOAD_CFG_L3T_IPV4_POS@GOTPAGEOFF]
Lloh5:
	ldr	w10, [x10]
	lsl	w10, w3, w10
	orr	w9, w10, w9
	str	w9, [x0]
Lloh6:
	adrp	x9, _DMA_CFG_DESC_TX_0_L4_TYPE_POS@GOTPAGE
Lloh7:
	ldr	x9, [x9, _DMA_CFG_DESC_TX_0_L4_TYPE_POS@GOTPAGEOFF]
Lloh8:
	ldr	w9, [x9]
	lsl	w8, w8, w9
	ldr	w9, [x0, #4]
	orr	w8, w9, w8
Lloh9:
	adrp	x9, _DMA_CFG_DESC_TX_0_L4_LENGTH_MSK@GOTPAGE
Lloh10:
	ldr	x9, [x9, _DMA_CFG_DESC_TX_0_L4_LENGTH_MSK@GOTPAGEOFF]
Lloh11:
	ldr	w9, [x9]
	and	w9, w9, w4
	orr	w8, w9, w8
	str	w8, [x0, #4]
Lloh12:
	adrp	x8, _DMA_CFG_DESC_TX_0_TCP_SEG_EN_POS@GOTPAGE
Lloh13:
	ldr	x8, [x8, _DMA_CFG_DESC_TX_0_TCP_SEG_EN_POS@GOTPAGEOFF]
Lloh14:
	ldr	w0, [x8]
	bl	_BIT
Lloh15:
	adrp	x8, _DMA_CFG_DESC_TX_0_SEGMENT_BUF_DETAILS_POS@GOTPAGE
Lloh16:
	ldr	x8, [x8, _DMA_CFG_DESC_TX_0_SEGMENT_BUF_DETAILS_POS@GOTPAGEOFF]
Lloh17:
	ldr	w8, [x8]
	lsl	w8, w22, w8
	orr	w8, w8, w0
	ldr	w9, [x19, #4]
	orr	w8, w8, w9
Lloh18:
	adrp	x9, _DMA_CFG_DESC_TX_0_IPV4_CHECKSUM_EN_POS@GOTPAGE
Lloh19:
	ldr	x9, [x9, _DMA_CFG_DESC_TX_0_IPV4_CHECKSUM_EN_POS@GOTPAGEOFF]
Lloh20:
	ldr	w9, [x9]
	lsl	w9, w21, w9
	orr	w8, w9, w8
	stp	w8, w20, [x19, #4]
Lloh21:
	adrp	x8, _DMA_CFG_DESC_TX_0_TCP_UDP_CHECKSUM_EN_POS@GOTPAGE
Lloh22:
	ldr	x8, [x8, _DMA_CFG_DESC_TX_0_TCP_UDP_CHECKSUM_EN_POS@GOTPAGEOFF]
Lloh23:
	ldr	w0, [x8]
	bl	_BIT
	ldr	w8, [x19, #4]
	orr	w8, w8, w0
	str	w8, [x19, #4]
Lloh24:
	adrp	x8, _DMA_CFG_DESC_TX_0_PSEUDO_HEADER_CALC_EN_POS@GOTPAGE
Lloh25:
	ldr	x8, [x8, _DMA_CFG_DESC_TX_0_PSEUDO_HEADER_CALC_EN_POS@GOTPAGEOFF]
Lloh26:
	ldr	w0, [x8]
	bl	_BIT
	ldr	w8, [x19, #4]
	orr	w8, w8, w0
	str	w8, [x19, #4]
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_ETH_HLEN,4,2                   ; @ETH_HLEN
	.comm	_DMA_CFG_DESC_TX_OFFLOAD_CFG_L3T_IPV4_POS,4,2 ; @DMA_CFG_DESC_TX_OFFLOAD_CFG_L3T_IPV4_POS
	.comm	_DMA_CFG_DESC_TX_0_L4_TYPE_POS,4,2 ; @DMA_CFG_DESC_TX_0_L4_TYPE_POS
	.comm	_DMA_CFG_DESC_TX_0_L4_LENGTH_MSK,4,2 ; @DMA_CFG_DESC_TX_0_L4_LENGTH_MSK
	.comm	_DMA_CFG_DESC_TX_0_TCP_SEG_EN_POS,4,2 ; @DMA_CFG_DESC_TX_0_TCP_SEG_EN_POS
	.comm	_DMA_CFG_DESC_TX_0_SEGMENT_BUF_DETAILS_POS,4,2 ; @DMA_CFG_DESC_TX_0_SEGMENT_BUF_DETAILS_POS
	.comm	_DMA_CFG_DESC_TX_0_IPV4_CHECKSUM_EN_POS,4,2 ; @DMA_CFG_DESC_TX_0_IPV4_CHECKSUM_EN_POS
	.comm	_DMA_CFG_DESC_TX_0_TCP_UDP_CHECKSUM_EN_POS,4,2 ; @DMA_CFG_DESC_TX_0_TCP_UDP_CHECKSUM_EN_POS
	.comm	_DMA_CFG_DESC_TX_0_PSEUDO_HEADER_CALC_EN_POS,4,2 ; @DMA_CFG_DESC_TX_0_PSEUDO_HEADER_CALC_EN_POS
	.no_dead_strip	_wil_tx_desc_offload_setup_tso
.subsections_via_symbols
