	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function __pci_enable_msi_range
___pci_enable_msi_range:                ## @__pci_enable_msi_range
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rcx, %r14
	movl	%edx, %r12d
	movl	%esi, %r15d
	movq	%rdi, %r13
	callq	_pci_msi_supported
	testl	%eax, %eax
	je	LBB0_6
## %bb.1:
	cmpq	$0, 8(%r13)
	je	LBB0_3
## %bb.2:
	leaq	L_.str(%rip), %rsi
	movq	%r13, %rdi
	callq	_pci_info
LBB0_6:
	movq	_EINVAL@GOTPCREL(%rip), %rax
LBB0_7:
	xorl	%ebx, %ebx
	subl	(%rax), %ebx
LBB0_8:
	movl	%ebx, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_3:
	cmpl	%r15d, %r12d
	jge	LBB0_5
## %bb.4:
	movq	_ERANGE@GOTPCREL(%rip), %rax
	jmp	LBB0_7
LBB0_5:
	movl	(%r13), %edi
	callq	_WARN_ON_ONCE
	testq	%rax, %rax
	jne	LBB0_6
## %bb.9:
	movq	%r13, %rdi
	callq	_pci_msi_vec_count
	movl	%eax, %ebx
	testl	%eax, %eax
	js	LBB0_8
## %bb.10:
	cmpl	%r15d, %ebx
	jl	LBB0_17
## %bb.11:
	cmpl	%r12d, %ebx
	cmovll	%ebx, %r12d
LBB0_12:                                ## =>This Inner Loop Header: Depth=1
	testq	%r14, %r14
	je	LBB0_14
## %bb.13:                              ##   in Loop: Header=BB0_12 Depth=1
	movl	%r15d, %edi
	movl	%r12d, %esi
	movq	%r14, %rdx
	callq	_irq_calc_affinity_vectors
	movl	%eax, %r12d
	cmpl	%r15d, %eax
	jl	LBB0_17
LBB0_14:                                ##   in Loop: Header=BB0_12 Depth=1
	movl	%r12d, %ebx
	movq	%r13, %rdi
	movl	%r12d, %esi
	movq	%r14, %rdx
	callq	_msi_capability_init
	testl	%eax, %eax
	je	LBB0_8
## %bb.15:                              ##   in Loop: Header=BB0_12 Depth=1
	movl	%eax, %r12d
	js	LBB0_18
## %bb.16:                              ##   in Loop: Header=BB0_12 Depth=1
	cmpl	%r15d, %r12d
	jge	LBB0_12
LBB0_17:
	movq	_ENOSPC@GOTPCREL(%rip), %rax
	jmp	LBB0_7
LBB0_18:
	movl	%r12d, %ebx
	jmp	LBB0_8
	.cfi_endproc
                                        ## -- End function
	.comm	_EINVAL,4,2                     ## @EINVAL
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"can't enable MSI (MSI-X already enabled)\n"

	.comm	_ERANGE,4,2                     ## @ERANGE
	.comm	_ENOSPC,4,2                     ## @ENOSPC
	.no_dead_strip	___pci_enable_msi_range
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function __pci_enable_msi_range
___pci_enable_msi_range:                ; @__pci_enable_msi_range
	.cfi_startproc
; %bb.0:
	stp	x24, x23, [sp, #-64]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x20, x3
	mov	x23, x2
	mov	x21, x1
	mov	x19, x0
	bl	_pci_msi_supported
	cbz	w0, LBB0_3
; %bb.1:
	ldr	x8, [x19, #8]
	cbz	x8, LBB0_6
; %bb.2:
Lloh0:
	adrp	x1, l_.str@PAGE
Lloh1:
	add	x1, x1, l_.str@PAGEOFF
	mov	x0, x19
	bl	_pci_info
LBB0_3:
Lloh2:
	adrp	x8, _EINVAL@GOTPAGE
Lloh3:
	ldr	x8, [x8, _EINVAL@GOTPAGEOFF]
LBB0_4:
	ldr	w8, [x8]
	neg	w22, w8
LBB0_5:
	mov	x0, x22
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	ret
LBB0_6:
	cmp	w23, w21
	b.ge	LBB0_8
; %bb.7:
Lloh4:
	adrp	x8, _ERANGE@GOTPAGE
Lloh5:
	ldr	x8, [x8, _ERANGE@GOTPAGEOFF]
	b	LBB0_4
LBB0_8:
	ldr	w0, [x19]
	bl	_WARN_ON_ONCE
	cbnz	x0, LBB0_3
; %bb.9:
	mov	x0, x19
	bl	_pci_msi_vec_count
	mov	x22, x0
	tbnz	w0, #31, LBB0_5
; %bb.10:
	cmp	w22, w21
	b.lt	LBB0_17
; %bb.11:
	cmp	w22, w23
	csel	w1, w22, w23, lt
LBB0_12:                                ; =>This Inner Loop Header: Depth=1
	cbz	x20, LBB0_14
; %bb.13:                               ;   in Loop: Header=BB0_12 Depth=1
	mov	x0, x21
	mov	x2, x20
	bl	_irq_calc_affinity_vectors
	mov	x1, x0
	cmp	w0, w21
	b.lt	LBB0_17
LBB0_14:                                ;   in Loop: Header=BB0_12 Depth=1
	mov	x22, x1
	mov	x0, x19
	mov	x2, x20
	bl	_msi_capability_init
	cbz	w0, LBB0_5
; %bb.15:                               ;   in Loop: Header=BB0_12 Depth=1
	mov	x1, x0
	tbnz	w0, #31, LBB0_18
; %bb.16:                               ;   in Loop: Header=BB0_12 Depth=1
	cmp	w1, w21
	b.ge	LBB0_12
LBB0_17:
Lloh6:
	adrp	x8, _ENOSPC@GOTPAGE
Lloh7:
	ldr	x8, [x8, _ENOSPC@GOTPAGEOFF]
	b	LBB0_4
LBB0_18:
	mov	x22, x1
	b	LBB0_5
	.loh AdrpAdd	Lloh0, Lloh1
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpLdrGot	Lloh4, Lloh5
	.loh AdrpLdrGot	Lloh6, Lloh7
	.cfi_endproc
                                        ; -- End function
	.comm	_EINVAL,4,2                     ; @EINVAL
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"can't enable MSI (MSI-X already enabled)\n"

	.comm	_ERANGE,4,2                     ; @ERANGE
	.comm	_ENOSPC,4,2                     ; @ENOSPC
	.no_dead_strip	___pci_enable_msi_range
.subsections_via_symbols
