	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function smmu_pmu_write_msi_msg
_smmu_pmu_write_msi_msg:                ## @smmu_pmu_write_msi_msg
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r14
	pushq	%rbx
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	movq	%rsi, %r14
	callq	_msi_desc_to_dev
	movq	%rax, %rdi
	callq	_dev_get_drvdata
	movq	%rax, %rbx
	movq	_SMMU_PMCG_IRQ_CFG0@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	addq	(%rbx), %rsi
	callq	_writeq_relaxed
	movl	4(%r14), %edi
	movq	_SMMU_PMCG_IRQ_CFG1@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	addq	(%rbx), %rsi
	callq	_writel_relaxed
	movq	_MSI_CFG2_MEMATTR_DEVICE_nGnRE@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_SMMU_PMCG_IRQ_CFG2@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	addq	(%rbx), %rsi
	popq	%rbx
	popq	%r14
	popq	%rbp
	jmp	_writel_relaxed                 ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_MSI_CFG0_ADDR_MASK,4,2         ## @MSI_CFG0_ADDR_MASK
	.comm	_SMMU_PMCG_IRQ_CFG0,8,3         ## @SMMU_PMCG_IRQ_CFG0
	.comm	_SMMU_PMCG_IRQ_CFG1,8,3         ## @SMMU_PMCG_IRQ_CFG1
	.comm	_MSI_CFG2_MEMATTR_DEVICE_nGnRE,4,2 ## @MSI_CFG2_MEMATTR_DEVICE_nGnRE
	.comm	_SMMU_PMCG_IRQ_CFG2,8,3         ## @SMMU_PMCG_IRQ_CFG2
	.no_dead_strip	_smmu_pmu_write_msi_msg
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function smmu_pmu_write_msi_msg
_smmu_pmu_write_msi_msg:                ; @smmu_pmu_write_msi_msg
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x19, x1
	bl	_msi_desc_to_dev
	bl	_dev_get_drvdata
	mov	x20, x0
	ldr	x8, [x0]
Lloh0:
	adrp	x9, _SMMU_PMCG_IRQ_CFG0@GOTPAGE
Lloh1:
	ldr	x9, [x9, _SMMU_PMCG_IRQ_CFG0@GOTPAGEOFF]
Lloh2:
	ldr	x9, [x9]
	add	x1, x9, x8
	bl	_writeq_relaxed
	ldr	w0, [x19, #4]
	ldr	x8, [x20]
Lloh3:
	adrp	x9, _SMMU_PMCG_IRQ_CFG1@GOTPAGE
Lloh4:
	ldr	x9, [x9, _SMMU_PMCG_IRQ_CFG1@GOTPAGEOFF]
Lloh5:
	ldr	x9, [x9]
	add	x1, x9, x8
	bl	_writel_relaxed
Lloh6:
	adrp	x8, _MSI_CFG2_MEMATTR_DEVICE_nGnRE@GOTPAGE
Lloh7:
	ldr	x8, [x8, _MSI_CFG2_MEMATTR_DEVICE_nGnRE@GOTPAGEOFF]
Lloh8:
	ldr	w0, [x8]
	ldr	x8, [x20]
Lloh9:
	adrp	x9, _SMMU_PMCG_IRQ_CFG2@GOTPAGE
Lloh10:
	ldr	x9, [x9, _SMMU_PMCG_IRQ_CFG2@GOTPAGEOFF]
Lloh11:
	ldr	x9, [x9]
	add	x1, x9, x8
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	b	_writel_relaxed
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_MSI_CFG0_ADDR_MASK,4,2         ; @MSI_CFG0_ADDR_MASK
	.comm	_SMMU_PMCG_IRQ_CFG0,8,3         ; @SMMU_PMCG_IRQ_CFG0
	.comm	_SMMU_PMCG_IRQ_CFG1,8,3         ; @SMMU_PMCG_IRQ_CFG1
	.comm	_MSI_CFG2_MEMATTR_DEVICE_nGnRE,4,2 ; @MSI_CFG2_MEMATTR_DEVICE_nGnRE
	.comm	_SMMU_PMCG_IRQ_CFG2,8,3         ; @SMMU_PMCG_IRQ_CFG2
	.no_dead_strip	_smmu_pmu_write_msi_msg
.subsections_via_symbols
