	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function wil_if_pcie_enable
_wil_if_pcie_enable:                    ## @wil_if_pcie_enable
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r15
	movq	8(%rdi), %r14
	movl	(%r14), %r12d
	leaq	L_.str(%rip), %rsi
	xorl	%eax, %eax
	callq	_wil_dbg_misc
	movq	%r14, %rdi
	callq	_pci_set_master
	movq	_n_msi@GOTPCREL(%rip), %r13
	movl	(%r13), %edx
	testl	%edx, %edx
	je	LBB0_4
## %bb.1:
	cmpl	$3, %edx
	je	LBB0_3
## %bb.2:
	cmpl	$1, %edx
	jne	LBB0_9
LBB0_3:
	leaq	L_.str.1(%rip), %rsi
	movq	%r15, %rdi
	xorl	%eax, %eax
	callq	_wil_dbg_misc
	jmp	LBB0_5
LBB0_4:
	leaq	L_.str.2(%rip), %rsi
	movq	%r15, %rdi
	xorl	%eax, %eax
	callq	_wil_dbg_misc
LBB0_5:
	movl	(%r13), %ebx
	cmpl	$3, %ebx
	jne	LBB0_8
## %bb.6:
	movq	_PCI_IRQ_MSI@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movq	%r14, %rdi
	movl	$3, %esi
	movl	$3, %edx
	callq	_pci_alloc_irq_vectors
	movl	(%r13), %ebx
	cmpl	%ebx, %eax
	jge	LBB0_8
## %bb.7:
	leaq	L_.str.4(%rip), %rsi
	movq	%r15, %rdi
	xorl	%eax, %eax
	callq	_wil_err
	jmp	LBB0_10
LBB0_8:
	cmpl	$1, %ebx
	je	LBB0_11
	jmp	LBB0_14
LBB0_9:
	leaq	L_.str.3(%rip), %rsi
	movq	%r15, %rdi
	xorl	%eax, %eax
	callq	_wil_err
LBB0_10:
	movl	$1, (%r13)
LBB0_11:
	movq	%r14, %rdi
	callq	_pci_enable_msi
	testq	%rax, %rax
	je	LBB0_12
## %bb.13:
	leaq	L_.str.5(%rip), %rsi
	xorl	%ebx, %ebx
	movq	%r15, %rdi
	xorl	%eax, %eax
	callq	_wil_err
	movl	$0, (%r13)
	jmp	LBB0_14
LBB0_12:
	movl	(%r13), %ebx
LBB0_14:
	movl	%ebx, (%r15)
	testl	%ebx, %ebx
	jne	LBB0_17
## %bb.15:
	testl	%r12d, %r12d
	je	LBB0_17
## %bb.16:
	leaq	L_.str.6(%rip), %rsi
	xorl	%ebx, %ebx
	movq	%r15, %rdi
	xorl	%eax, %eax
	callq	_wil_err
	movq	_ENODEV@GOTPCREL(%rip), %rax
	subl	(%rax), %ebx
	jmp	LBB0_21
LBB0_17:
	movl	4(%r14), %esi
	movq	%r15, %rdi
	callq	_wil6210_init_irq
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	LBB0_20
## %bb.18:
	leaq	4(%r15), %r13
	movq	%r13, %rdi
	callq	_mutex_lock
	xorl	%ebx, %ebx
	movq	%r15, %rdi
	xorl	%esi, %esi
	callq	_wil_reset
	movl	%eax, %r12d
	movq	%r13, %rdi
	callq	_mutex_unlock
	testl	%r12d, %r12d
	je	LBB0_22
## %bb.19:
	movl	4(%r14), %esi
	movq	%r15, %rdi
	callq	_wil6210_fini_irq
	movl	%r12d, %ebx
LBB0_20:
	movq	%r14, %rdi
	callq	_pci_free_irq_vectors
LBB0_21:
	movq	%r14, %rdi
	callq	_pci_clear_master
LBB0_22:
	movl	%ebx, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"if_pcie_enable\n"

	.comm	_n_msi,4,2                      ## @n_msi
L_.str.1:                               ## @.str.1
	.asciz	"Setup %d MSI interrupts\n"

L_.str.2:                               ## @.str.2
	.asciz	"MSI interrupts disabled, use INTx\n"

L_.str.3:                               ## @.str.3
	.asciz	"Invalid n_msi=%d, default to 1\n"

	.comm	_PCI_IRQ_MSI,4,2                ## @PCI_IRQ_MSI
L_.str.4:                               ## @.str.4
	.asciz	"3 MSI mode failed, try 1 MSI\n"

L_.str.5:                               ## @.str.5
	.asciz	"pci_enable_msi failed, use INTx\n"

L_.str.6:                               ## @.str.6
	.asciz	"Interrupt pin not routed, unable to use INTx\n"

	.comm	_ENODEV,4,2                     ## @ENODEV
	.no_dead_strip	_wil_if_pcie_enable
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function wil_if_pcie_enable
_wil_if_pcie_enable:                    ; @wil_if_pcie_enable
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #64
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x20, x0
	ldr	x19, [x0, #8]
	ldr	w21, [x19]
Lloh0:
	adrp	x1, l_.str@PAGE
Lloh1:
	add	x1, x1, l_.str@PAGEOFF
	bl	_wil_dbg_misc
	mov	x0, x19
	bl	_pci_set_master
Lloh2:
	adrp	x22, _n_msi@GOTPAGE
Lloh3:
	ldr	x22, [x22, _n_msi@GOTPAGEOFF]
	ldr	w8, [x22]
	cbz	w8, LBB0_3
; %bb.1:
	cmp	w8, #3
	ccmp	w8, #1, #4, ne
	b.ne	LBB0_8
; %bb.2:
	str	x8, [sp]
Lloh4:
	adrp	x1, l_.str.1@PAGE
Lloh5:
	add	x1, x1, l_.str.1@PAGEOFF
	b	LBB0_4
LBB0_3:
Lloh6:
	adrp	x1, l_.str.2@PAGE
Lloh7:
	add	x1, x1, l_.str.2@PAGEOFF
LBB0_4:
	mov	x0, x20
	bl	_wil_dbg_misc
	ldr	w8, [x22]
	cmp	w8, #3
	b.ne	LBB0_7
; %bb.5:
Lloh8:
	adrp	x8, _PCI_IRQ_MSI@GOTPAGE
Lloh9:
	ldr	x8, [x8, _PCI_IRQ_MSI@GOTPAGEOFF]
Lloh10:
	ldr	w3, [x8]
	mov	x0, x19
	mov	w1, #3
	mov	w2, #3
	bl	_pci_alloc_irq_vectors
	ldr	w8, [x22]
	cmp	w0, w8
	b.ge	LBB0_7
; %bb.6:
Lloh11:
	adrp	x1, l_.str.4@PAGE
Lloh12:
	add	x1, x1, l_.str.4@PAGEOFF
	b	LBB0_9
LBB0_7:
	cmp	w8, #1
	b.eq	LBB0_10
	b	LBB0_13
LBB0_8:
                                        ; kill: def $w8 killed $w8 killed $x8 def $x8
	str	x8, [sp]
Lloh13:
	adrp	x1, l_.str.3@PAGE
Lloh14:
	add	x1, x1, l_.str.3@PAGEOFF
LBB0_9:
	mov	x0, x20
	bl	_wil_err
	mov	w8, #1
	str	w8, [x22]
LBB0_10:
	mov	x0, x19
	bl	_pci_enable_msi
	cbz	x0, LBB0_12
; %bb.11:
Lloh15:
	adrp	x1, l_.str.5@PAGE
Lloh16:
	add	x1, x1, l_.str.5@PAGEOFF
	mov	x0, x20
	bl	_wil_err
	mov	w8, #0
	str	wzr, [x22]
	b	LBB0_13
LBB0_12:
	ldr	w8, [x22]
LBB0_13:
	str	w8, [x20]
	cmp	w8, #0
	ccmp	w21, #0, #4, eq
	b.ne	LBB0_18
; %bb.14:
	ldr	w1, [x19, #4]
	mov	x0, x20
	bl	_wil6210_init_irq
	mov	x21, x0
	cbnz	w0, LBB0_17
; %bb.15:
	add	x22, x20, #4
	mov	x0, x22
	bl	_mutex_lock
	mov	x0, x20
	mov	w1, #0
	bl	_wil_reset
	mov	x21, x0
	mov	x0, x22
	bl	_mutex_unlock
	cbz	w21, LBB0_20
; %bb.16:
	ldr	w1, [x19, #4]
	mov	x0, x20
	bl	_wil6210_fini_irq
LBB0_17:
	mov	x0, x19
	bl	_pci_free_irq_vectors
	b	LBB0_19
LBB0_18:
Lloh17:
	adrp	x1, l_.str.6@PAGE
Lloh18:
	add	x1, x1, l_.str.6@PAGEOFF
	mov	x0, x20
	bl	_wil_err
Lloh19:
	adrp	x8, _ENODEV@GOTPAGE
Lloh20:
	ldr	x8, [x8, _ENODEV@GOTPAGEOFF]
Lloh21:
	ldr	w8, [x8]
	neg	w21, w8
LBB0_19:
	mov	x0, x19
	bl	_pci_clear_master
LBB0_20:
	mov	x0, x21
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #64
	ret
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpAdd	Lloh0, Lloh1
	.loh AdrpAdd	Lloh4, Lloh5
	.loh AdrpAdd	Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpAdd	Lloh11, Lloh12
	.loh AdrpAdd	Lloh13, Lloh14
	.loh AdrpAdd	Lloh15, Lloh16
	.loh AdrpLdrGotLdr	Lloh19, Lloh20, Lloh21
	.loh AdrpAdd	Lloh17, Lloh18
	.cfi_endproc
                                        ; -- End function
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"if_pcie_enable\n"

	.comm	_n_msi,4,2                      ; @n_msi
l_.str.1:                               ; @.str.1
	.asciz	"Setup %d MSI interrupts\n"

l_.str.2:                               ; @.str.2
	.asciz	"MSI interrupts disabled, use INTx\n"

l_.str.3:                               ; @.str.3
	.asciz	"Invalid n_msi=%d, default to 1\n"

	.comm	_PCI_IRQ_MSI,4,2                ; @PCI_IRQ_MSI
l_.str.4:                               ; @.str.4
	.asciz	"3 MSI mode failed, try 1 MSI\n"

l_.str.5:                               ; @.str.5
	.asciz	"pci_enable_msi failed, use INTx\n"

l_.str.6:                               ; @.str.6
	.asciz	"Interrupt pin not routed, unable to use INTx\n"

	.comm	_ENODEV,4,2                     ; @ENODEV
	.no_dead_strip	_wil_if_pcie_enable
.subsections_via_symbols
