	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function pistachio_usb_phy_power_on
_pistachio_usb_phy_power_on:            ## @pistachio_usb_phy_power_on
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	callq	_phy_get_drvdata
	movq	%rax, %r14
	movl	4(%rax), %edi
	callq	_clk_prepare_enable
	testl	%eax, %eax
	js	LBB0_1
## %bb.2:
	movl	(%r14), %eax
	movl	12(%r14), %edi
	movq	_USB_PHY_STRAP_CONTROL@GOTPCREL(%rip), %rsi
	movq	_USB_PHY_STRAP_CONTROL_REFCLK_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	movq	_USB_PHY_STRAP_CONTROL_REFCLK_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shll	%cl, %edx
	movl	(%rsi), %esi
	shll	%cl, %eax
	movl	%eax, %ecx
	callq	_regmap_update_bits
	movl	4(%r14), %edi
	callq	_clk_get_rate
	movq	%rax, %r15
	movl	(%r14), %eax
	movq	_REFCLK_XO_CRYSTAL@GOTPCREL(%rip), %rcx
	cmpl	(%rcx), %eax
	jne	LBB0_4
## %bb.3:
	cmpq	$12000000, %r15                 ## imm = 0xB71B00
	je	LBB0_4
## %bb.9:
	movl	8(%r14), %edi
	leaq	L_.str.1(%rip), %rsi
	jmp	LBB0_10
LBB0_1:
	movl	%eax, %ebx
	movl	8(%r14), %edi
	leaq	L_.str(%rip), %rsi
	movl	%eax, %edx
	xorl	%eax, %eax
	callq	_dev_err
	jmp	LBB0_21
LBB0_4:
	movq	_fsel_rate_map@GOTPCREL(%rip), %r12
	movq	(%r12), %rdi
	callq	_ARRAY_SIZE
	xorl	%ebx, %ebx
	testl	%eax, %eax
	je	LBB0_7
	.p2align	4, 0x90
LBB0_5:                                 ## =>This Inner Loop Header: Depth=1
	movq	(%r12), %rdi
	cmpq	(%rdi,%rbx,8), %r15
	je	LBB0_7
## %bb.6:                               ##   in Loop: Header=BB0_5 Depth=1
	incq	%rbx
	callq	_ARRAY_SIZE
	movl	%eax, %eax
	cmpq	%rax, %rbx
	jb	LBB0_5
LBB0_7:
	movq	(%r12), %rdi
	callq	_ARRAY_SIZE
	cmpl	%eax, %ebx
	jne	LBB0_11
## %bb.8:
	movl	8(%r14), %edi
	leaq	L_.str.2(%rip), %rsi
LBB0_10:
	movq	%r15, %rdx
	xorl	%eax, %eax
	callq	_dev_err
	movq	_EINVAL@GOTPCREL(%rip), %rax
LBB0_20:
	movl	(%rax), %ebx
	negl	%ebx
	movl	4(%r14), %edi
	callq	_clk_disable_unprepare
LBB0_21:
	movl	%ebx, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_11:
	movl	12(%r14), %edi
	movq	_USB_PHY_CONTROL1@GOTPCREL(%rip), %rax
	movq	_USB_PHY_CONTROL1_FSEL_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	movq	_USB_PHY_CONTROL1_FSEL_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shll	%cl, %edx
	movl	(%rax), %esi
	shll	%cl, %ebx
	movl	%ebx, %ecx
	callq	_regmap_update_bits
	movq	_jiffies@GOTPCREL(%rip), %r12
	movq	(%r12), %r15
	movl	$200, %edi
	callq	_msecs_to_jiffies
	movq	%rax, %rbx
	addq	%r15, %rbx
	movq	(%r12), %rdi
	movq	%rbx, %rsi
	callq	_time_before
	testq	%rax, %rax
	je	LBB0_19
## %bb.12:
	leaq	-44(%rbp), %r15
	movq	_USB_PHY_STATUS_VBUS_FAULT@GOTPCREL(%rip), %r12
	movq	_USB_PHY_STATUS_RX_PHY_CLK@GOTPCREL(%rip), %r13
	jmp	LBB0_13
	.p2align	4, 0x90
LBB0_18:                                ##   in Loop: Header=BB0_13 Depth=1
	movl	$1000, %edi                     ## imm = 0x3E8
	movl	$1500, %esi                     ## imm = 0x5DC
	callq	_usleep_range
	movq	_jiffies@GOTPCREL(%rip), %rax
	movq	(%rax), %rdi
	movq	%rbx, %rsi
	callq	_time_before
	testq	%rax, %rax
	je	LBB0_19
LBB0_13:                                ## =>This Inner Loop Header: Depth=1
	movl	12(%r14), %edi
	movq	_USB_PHY_STATUS@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r15, %rdx
	callq	_regmap_read
	movl	-44(%rbp), %eax
	testl	%eax, (%r12)
	jne	LBB0_14
## %bb.15:                              ##   in Loop: Header=BB0_13 Depth=1
	testl	%eax, (%r13)
	je	LBB0_18
## %bb.16:                              ##   in Loop: Header=BB0_13 Depth=1
	movq	_USB_PHY_STATUS_RX_UTMI_CLK@GOTPCREL(%rip), %rcx
	testl	%eax, (%rcx)
	je	LBB0_18
## %bb.17:
	xorl	%ebx, %ebx
	jmp	LBB0_21
LBB0_19:
	movl	8(%r14), %edi
	leaq	L_.str.4(%rip), %rsi
	xorl	%eax, %eax
	callq	_dev_err
	movq	_ETIMEDOUT@GOTPCREL(%rip), %rax
	jmp	LBB0_20
LBB0_14:
	movl	8(%r14), %edi
	leaq	L_.str.3(%rip), %rsi
	xorl	%eax, %eax
	callq	_dev_err
	movq	_EIO@GOTPCREL(%rip), %rax
	jmp	LBB0_20
	.cfi_endproc
                                        ## -- End function
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"Failed to enable PHY clock: %d\n"

	.comm	_USB_PHY_STRAP_CONTROL,4,2      ## @USB_PHY_STRAP_CONTROL
	.comm	_USB_PHY_STRAP_CONTROL_REFCLK_MASK,4,2 ## @USB_PHY_STRAP_CONTROL_REFCLK_MASK
	.comm	_USB_PHY_STRAP_CONTROL_REFCLK_SHIFT,4,2 ## @USB_PHY_STRAP_CONTROL_REFCLK_SHIFT
	.comm	_REFCLK_XO_CRYSTAL,4,2          ## @REFCLK_XO_CRYSTAL
L_.str.1:                               ## @.str.1
	.asciz	"Unsupported rate for XO crystal: %ld\n"

	.comm	_EINVAL,4,2                     ## @EINVAL
	.comm	_fsel_rate_map,8,3              ## @fsel_rate_map
L_.str.2:                               ## @.str.2
	.asciz	"Unsupported clock rate: %lu\n"

	.comm	_USB_PHY_CONTROL1,4,2           ## @USB_PHY_CONTROL1
	.comm	_USB_PHY_CONTROL1_FSEL_MASK,4,2 ## @USB_PHY_CONTROL1_FSEL_MASK
	.comm	_USB_PHY_CONTROL1_FSEL_SHIFT,4,2 ## @USB_PHY_CONTROL1_FSEL_SHIFT
	.comm	_jiffies,8,3                    ## @jiffies
	.comm	_USB_PHY_STATUS,4,2             ## @USB_PHY_STATUS
	.comm	_USB_PHY_STATUS_VBUS_FAULT,4,2  ## @USB_PHY_STATUS_VBUS_FAULT
L_.str.3:                               ## @.str.3
	.asciz	"VBUS fault detected\n"

	.comm	_EIO,4,2                        ## @EIO
	.comm	_USB_PHY_STATUS_RX_PHY_CLK,4,2  ## @USB_PHY_STATUS_RX_PHY_CLK
	.comm	_USB_PHY_STATUS_RX_UTMI_CLK,4,2 ## @USB_PHY_STATUS_RX_UTMI_CLK
L_.str.4:                               ## @.str.4
	.asciz	"Timed out waiting for PHY to power on\n"

	.comm	_ETIMEDOUT,4,2                  ## @ETIMEDOUT
	.no_dead_strip	_pistachio_usb_phy_power_on
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function pistachio_usb_phy_power_on
_pistachio_usb_phy_power_on:            ; @pistachio_usb_phy_power_on
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #96
	.cfi_def_cfa_offset 96
	stp	x26, x25, [sp, #16]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #32]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #48]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #64]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #80]             ; 16-byte Folded Spill
	add	x29, sp, #80
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	bl	_phy_get_drvdata
	mov	x19, x0
	ldr	w0, [x0, #4]
	bl	_clk_prepare_enable
	tbnz	w0, #31, LBB0_6
; %bb.1:
	ldr	w0, [x19, #12]
Lloh0:
	adrp	x8, _USB_PHY_STRAP_CONTROL@GOTPAGE
Lloh1:
	ldr	x8, [x8, _USB_PHY_STRAP_CONTROL@GOTPAGEOFF]
Lloh2:
	ldr	w1, [x8]
Lloh3:
	adrp	x8, _USB_PHY_STRAP_CONTROL_REFCLK_MASK@GOTPAGE
Lloh4:
	ldr	x8, [x8, _USB_PHY_STRAP_CONTROL_REFCLK_MASK@GOTPAGEOFF]
Lloh5:
	ldr	w8, [x8]
Lloh6:
	adrp	x9, _USB_PHY_STRAP_CONTROL_REFCLK_SHIFT@GOTPAGE
Lloh7:
	ldr	x9, [x9, _USB_PHY_STRAP_CONTROL_REFCLK_SHIFT@GOTPAGEOFF]
Lloh8:
	ldr	w9, [x9]
	lsl	w2, w8, w9
	ldr	w8, [x19]
	lsl	w3, w8, w9
	bl	_regmap_update_bits
	ldr	w0, [x19, #4]
	bl	_clk_get_rate
	mov	x20, x0
	ldr	w8, [x19]
Lloh9:
	adrp	x9, _REFCLK_XO_CRYSTAL@GOTPAGE
Lloh10:
	ldr	x9, [x9, _REFCLK_XO_CRYSTAL@GOTPAGEOFF]
Lloh11:
	ldr	w9, [x9]
	cmp	w8, w9
	mov	w8, #6912
	movk	w8, #183, lsl #16
	ccmp	x0, x8, #4, eq
	b.ne	LBB0_7
; %bb.2:
Lloh12:
	adrp	x22, _fsel_rate_map@GOTPAGE
Lloh13:
	ldr	x22, [x22, _fsel_rate_map@GOTPAGEOFF]
	ldr	x0, [x22]
	bl	_ARRAY_SIZE
	cbz	w0, LBB0_8
; %bb.3:
	mov	x21, #0
LBB0_4:                                 ; =>This Inner Loop Header: Depth=1
	ldr	x0, [x22]
	ldr	x8, [x0, x21, lsl #3]
	cmp	x20, x8
	b.eq	LBB0_9
; %bb.5:                                ;   in Loop: Header=BB0_4 Depth=1
	add	x21, x21, #1
	bl	_ARRAY_SIZE
	cmp	x21, w0, uxtw
	b.lo	LBB0_4
	b	LBB0_9
LBB0_6:
	mov	x20, x0
	ldr	w0, [x19, #8]
	str	x20, [sp]
Lloh14:
	adrp	x1, l_.str@PAGE
Lloh15:
	add	x1, x1, l_.str@PAGEOFF
	bl	_dev_err
	b	LBB0_13
LBB0_7:
	ldr	w0, [x19, #8]
	str	x20, [sp]
Lloh16:
	adrp	x1, l_.str.1@PAGE
Lloh17:
	add	x1, x1, l_.str.1@PAGEOFF
	b	LBB0_11
LBB0_8:
	mov	w21, #0
LBB0_9:
	ldr	x0, [x22]
	bl	_ARRAY_SIZE
	cmp	w21, w0
	b.ne	LBB0_14
; %bb.10:
	ldr	w0, [x19, #8]
	str	x20, [sp]
Lloh18:
	adrp	x1, l_.str.2@PAGE
Lloh19:
	add	x1, x1, l_.str.2@PAGEOFF
LBB0_11:
	bl	_dev_err
Lloh20:
	adrp	x8, _EINVAL@GOTPAGE
Lloh21:
	ldr	x8, [x8, _EINVAL@GOTPAGEOFF]
LBB0_12:
	ldr	w8, [x8]
	neg	w20, w8
	ldr	w0, [x19, #4]
	bl	_clk_disable_unprepare
LBB0_13:
	mov	x0, x20
	ldp	x29, x30, [sp, #80]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #64]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #48]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #32]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #96
	ret
LBB0_14:
	ldr	w0, [x19, #12]
Lloh22:
	adrp	x8, _USB_PHY_CONTROL1@GOTPAGE
Lloh23:
	ldr	x8, [x8, _USB_PHY_CONTROL1@GOTPAGEOFF]
Lloh24:
	ldr	w1, [x8]
Lloh25:
	adrp	x8, _USB_PHY_CONTROL1_FSEL_MASK@GOTPAGE
Lloh26:
	ldr	x8, [x8, _USB_PHY_CONTROL1_FSEL_MASK@GOTPAGEOFF]
Lloh27:
	ldr	w8, [x8]
Lloh28:
	adrp	x9, _USB_PHY_CONTROL1_FSEL_SHIFT@GOTPAGE
Lloh29:
	ldr	x9, [x9, _USB_PHY_CONTROL1_FSEL_SHIFT@GOTPAGEOFF]
Lloh30:
	ldr	w9, [x9]
	lsl	w2, w8, w9
	lsl	w3, w21, w9
	bl	_regmap_update_bits
Lloh31:
	adrp	x21, _jiffies@GOTPAGE
Lloh32:
	ldr	x21, [x21, _jiffies@GOTPAGEOFF]
	ldr	x20, [x21]
	mov	w0, #200
	bl	_msecs_to_jiffies
	add	x20, x0, x20
	ldr	x0, [x21]
	mov	x1, x20
	bl	_time_before
	cbz	x0, LBB0_21
; %bb.15:
Lloh33:
	adrp	x22, _USB_PHY_STATUS@GOTPAGE
Lloh34:
	ldr	x22, [x22, _USB_PHY_STATUS@GOTPAGEOFF]
Lloh35:
	adrp	x23, _USB_PHY_STATUS_VBUS_FAULT@GOTPAGE
Lloh36:
	ldr	x23, [x23, _USB_PHY_STATUS_VBUS_FAULT@GOTPAGEOFF]
Lloh37:
	adrp	x24, _USB_PHY_STATUS_RX_PHY_CLK@GOTPAGE
Lloh38:
	ldr	x24, [x24, _USB_PHY_STATUS_RX_PHY_CLK@GOTPAGEOFF]
Lloh39:
	adrp	x25, _USB_PHY_STATUS_RX_UTMI_CLK@GOTPAGE
Lloh40:
	ldr	x25, [x25, _USB_PHY_STATUS_RX_UTMI_CLK@GOTPAGEOFF]
	b	LBB0_17
LBB0_16:                                ;   in Loop: Header=BB0_17 Depth=1
	mov	w0, #1000
	mov	w1, #1500
	bl	_usleep_range
	ldr	x0, [x21]
	mov	x1, x20
	bl	_time_before
	cbz	x0, LBB0_21
LBB0_17:                                ; =>This Inner Loop Header: Depth=1
	ldr	w0, [x19, #12]
	ldr	w1, [x22]
	add	x2, sp, #12
	bl	_regmap_read
	ldr	w8, [sp, #12]
	ldr	w9, [x23]
	tst	w9, w8
	b.ne	LBB0_22
; %bb.18:                               ;   in Loop: Header=BB0_17 Depth=1
	ldr	w9, [x24]
	tst	w9, w8
	b.eq	LBB0_16
; %bb.19:                               ;   in Loop: Header=BB0_17 Depth=1
	ldr	w9, [x25]
	tst	w9, w8
	b.eq	LBB0_16
; %bb.20:
	mov	w20, #0
	b	LBB0_13
LBB0_21:
	ldr	w0, [x19, #8]
Lloh41:
	adrp	x1, l_.str.4@PAGE
Lloh42:
	add	x1, x1, l_.str.4@PAGEOFF
	bl	_dev_err
Lloh43:
	adrp	x8, _ETIMEDOUT@GOTPAGE
Lloh44:
	ldr	x8, [x8, _ETIMEDOUT@GOTPAGEOFF]
	b	LBB0_12
LBB0_22:
	ldr	w0, [x19, #8]
Lloh45:
	adrp	x1, l_.str.3@PAGE
Lloh46:
	add	x1, x1, l_.str.3@PAGEOFF
	bl	_dev_err
Lloh47:
	adrp	x8, _EIO@GOTPAGE
Lloh48:
	ldr	x8, [x8, _EIO@GOTPAGEOFF]
	b	LBB0_12
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGot	Lloh12, Lloh13
	.loh AdrpAdd	Lloh14, Lloh15
	.loh AdrpAdd	Lloh16, Lloh17
	.loh AdrpAdd	Lloh18, Lloh19
	.loh AdrpLdrGot	Lloh20, Lloh21
	.loh AdrpLdrGot	Lloh31, Lloh32
	.loh AdrpLdrGotLdr	Lloh28, Lloh29, Lloh30
	.loh AdrpLdrGotLdr	Lloh25, Lloh26, Lloh27
	.loh AdrpLdrGotLdr	Lloh22, Lloh23, Lloh24
	.loh AdrpLdrGot	Lloh39, Lloh40
	.loh AdrpLdrGot	Lloh37, Lloh38
	.loh AdrpLdrGot	Lloh35, Lloh36
	.loh AdrpLdrGot	Lloh33, Lloh34
	.loh AdrpLdrGot	Lloh43, Lloh44
	.loh AdrpAdd	Lloh41, Lloh42
	.loh AdrpLdrGot	Lloh47, Lloh48
	.loh AdrpAdd	Lloh45, Lloh46
	.cfi_endproc
                                        ; -- End function
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"Failed to enable PHY clock: %d\n"

	.comm	_USB_PHY_STRAP_CONTROL,4,2      ; @USB_PHY_STRAP_CONTROL
	.comm	_USB_PHY_STRAP_CONTROL_REFCLK_MASK,4,2 ; @USB_PHY_STRAP_CONTROL_REFCLK_MASK
	.comm	_USB_PHY_STRAP_CONTROL_REFCLK_SHIFT,4,2 ; @USB_PHY_STRAP_CONTROL_REFCLK_SHIFT
	.comm	_REFCLK_XO_CRYSTAL,4,2          ; @REFCLK_XO_CRYSTAL
l_.str.1:                               ; @.str.1
	.asciz	"Unsupported rate for XO crystal: %ld\n"

	.comm	_EINVAL,4,2                     ; @EINVAL
	.comm	_fsel_rate_map,8,3              ; @fsel_rate_map
l_.str.2:                               ; @.str.2
	.asciz	"Unsupported clock rate: %lu\n"

	.comm	_USB_PHY_CONTROL1,4,2           ; @USB_PHY_CONTROL1
	.comm	_USB_PHY_CONTROL1_FSEL_MASK,4,2 ; @USB_PHY_CONTROL1_FSEL_MASK
	.comm	_USB_PHY_CONTROL1_FSEL_SHIFT,4,2 ; @USB_PHY_CONTROL1_FSEL_SHIFT
	.comm	_jiffies,8,3                    ; @jiffies
	.comm	_USB_PHY_STATUS,4,2             ; @USB_PHY_STATUS
	.comm	_USB_PHY_STATUS_VBUS_FAULT,4,2  ; @USB_PHY_STATUS_VBUS_FAULT
l_.str.3:                               ; @.str.3
	.asciz	"VBUS fault detected\n"

	.comm	_EIO,4,2                        ; @EIO
	.comm	_USB_PHY_STATUS_RX_PHY_CLK,4,2  ; @USB_PHY_STATUS_RX_PHY_CLK
	.comm	_USB_PHY_STATUS_RX_UTMI_CLK,4,2 ; @USB_PHY_STATUS_RX_UTMI_CLK
l_.str.4:                               ; @.str.4
	.asciz	"Timed out waiting for PHY to power on\n"

	.comm	_ETIMEDOUT,4,2                  ; @ETIMEDOUT
	.no_dead_strip	_pistachio_usb_phy_power_on
.subsections_via_symbols
