	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function tegra_pcie_enable_msi
_tegra_pcie_enable_msi:                 ## @tegra_pcie_enable_msi
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r14
	pushq	%rbx
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	movq	%rdi, %rbx
	movq	8(%rdi), %rax
	movl	(%rdi), %esi
	movb	(%rax), %cl
	sarl	%cl, %esi
	movq	_AFI_MSI_FPCI_BAR_ST@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	callq	_afi_writel
	movl	(%rbx), %esi
	movq	_AFI_MSI_AXI_BAR_ST@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	callq	_afi_writel
	movq	_AFI_MSI_BAR_SZ@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	movl	$1, %esi
	callq	_afi_writel
	movq	_AFI_MSI_EN_VEC0@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	movl	$-1, %esi
	callq	_afi_writel
	movq	_AFI_MSI_EN_VEC1@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	movl	$-1, %esi
	callq	_afi_writel
	movq	_AFI_MSI_EN_VEC2@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	movl	$-1, %esi
	callq	_afi_writel
	movq	_AFI_MSI_EN_VEC3@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	movl	$-1, %esi
	callq	_afi_writel
	movq	_AFI_MSI_EN_VEC4@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	movl	$-1, %esi
	callq	_afi_writel
	movq	_AFI_MSI_EN_VEC5@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	movl	$-1, %esi
	callq	_afi_writel
	movq	_AFI_MSI_EN_VEC6@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	movl	$-1, %esi
	callq	_afi_writel
	movq	_AFI_MSI_EN_VEC7@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	movl	$-1, %esi
	callq	_afi_writel
	movq	_AFI_INTR_MASK@GOTPCREL(%rip), %r14
	movl	(%r14), %esi
	movq	%rbx, %rdi
	callq	_afi_readl
	movq	_AFI_INTR_MASK_MSI_MASK@GOTPCREL(%rip), %rcx
	orl	(%rcx), %eax
	movl	(%r14), %edx
	movq	%rbx, %rdi
	movl	%eax, %esi
	popq	%rbx
	popq	%r14
	popq	%rbp
	jmp	_afi_writel                     ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_AFI_MSI_FPCI_BAR_ST,4,2        ## @AFI_MSI_FPCI_BAR_ST
	.comm	_AFI_MSI_AXI_BAR_ST,4,2         ## @AFI_MSI_AXI_BAR_ST
	.comm	_AFI_MSI_BAR_SZ,4,2             ## @AFI_MSI_BAR_SZ
	.comm	_AFI_MSI_EN_VEC0,4,2            ## @AFI_MSI_EN_VEC0
	.comm	_AFI_MSI_EN_VEC1,4,2            ## @AFI_MSI_EN_VEC1
	.comm	_AFI_MSI_EN_VEC2,4,2            ## @AFI_MSI_EN_VEC2
	.comm	_AFI_MSI_EN_VEC3,4,2            ## @AFI_MSI_EN_VEC3
	.comm	_AFI_MSI_EN_VEC4,4,2            ## @AFI_MSI_EN_VEC4
	.comm	_AFI_MSI_EN_VEC5,4,2            ## @AFI_MSI_EN_VEC5
	.comm	_AFI_MSI_EN_VEC6,4,2            ## @AFI_MSI_EN_VEC6
	.comm	_AFI_MSI_EN_VEC7,4,2            ## @AFI_MSI_EN_VEC7
	.comm	_AFI_INTR_MASK,4,2              ## @AFI_INTR_MASK
	.comm	_AFI_INTR_MASK_MSI_MASK,4,2     ## @AFI_INTR_MASK_MSI_MASK
	.no_dead_strip	_tegra_pcie_enable_msi
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function tegra_pcie_enable_msi
_tegra_pcie_enable_msi:                 ; @tegra_pcie_enable_msi
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x19, x0
	ldr	x8, [x0, #8]
	ldr	w9, [x0]
	ldr	w8, [x8]
	asr	w1, w9, w8
Lloh0:
	adrp	x8, _AFI_MSI_FPCI_BAR_ST@GOTPAGE
Lloh1:
	ldr	x8, [x8, _AFI_MSI_FPCI_BAR_ST@GOTPAGEOFF]
Lloh2:
	ldr	w2, [x8]
	bl	_afi_writel
	ldr	w1, [x19]
Lloh3:
	adrp	x8, _AFI_MSI_AXI_BAR_ST@GOTPAGE
Lloh4:
	ldr	x8, [x8, _AFI_MSI_AXI_BAR_ST@GOTPAGEOFF]
Lloh5:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_afi_writel
Lloh6:
	adrp	x8, _AFI_MSI_BAR_SZ@GOTPAGE
Lloh7:
	ldr	x8, [x8, _AFI_MSI_BAR_SZ@GOTPAGEOFF]
Lloh8:
	ldr	w2, [x8]
	mov	x0, x19
	mov	w1, #1
	bl	_afi_writel
Lloh9:
	adrp	x8, _AFI_MSI_EN_VEC0@GOTPAGE
Lloh10:
	ldr	x8, [x8, _AFI_MSI_EN_VEC0@GOTPAGEOFF]
Lloh11:
	ldr	w2, [x8]
	mov	x0, x19
	mov	w1, #-1
	bl	_afi_writel
Lloh12:
	adrp	x8, _AFI_MSI_EN_VEC1@GOTPAGE
Lloh13:
	ldr	x8, [x8, _AFI_MSI_EN_VEC1@GOTPAGEOFF]
Lloh14:
	ldr	w2, [x8]
	mov	x0, x19
	mov	w1, #-1
	bl	_afi_writel
Lloh15:
	adrp	x8, _AFI_MSI_EN_VEC2@GOTPAGE
Lloh16:
	ldr	x8, [x8, _AFI_MSI_EN_VEC2@GOTPAGEOFF]
Lloh17:
	ldr	w2, [x8]
	mov	x0, x19
	mov	w1, #-1
	bl	_afi_writel
Lloh18:
	adrp	x8, _AFI_MSI_EN_VEC3@GOTPAGE
Lloh19:
	ldr	x8, [x8, _AFI_MSI_EN_VEC3@GOTPAGEOFF]
Lloh20:
	ldr	w2, [x8]
	mov	x0, x19
	mov	w1, #-1
	bl	_afi_writel
Lloh21:
	adrp	x8, _AFI_MSI_EN_VEC4@GOTPAGE
Lloh22:
	ldr	x8, [x8, _AFI_MSI_EN_VEC4@GOTPAGEOFF]
Lloh23:
	ldr	w2, [x8]
	mov	x0, x19
	mov	w1, #-1
	bl	_afi_writel
Lloh24:
	adrp	x8, _AFI_MSI_EN_VEC5@GOTPAGE
Lloh25:
	ldr	x8, [x8, _AFI_MSI_EN_VEC5@GOTPAGEOFF]
Lloh26:
	ldr	w2, [x8]
	mov	x0, x19
	mov	w1, #-1
	bl	_afi_writel
Lloh27:
	adrp	x8, _AFI_MSI_EN_VEC6@GOTPAGE
Lloh28:
	ldr	x8, [x8, _AFI_MSI_EN_VEC6@GOTPAGEOFF]
Lloh29:
	ldr	w2, [x8]
	mov	x0, x19
	mov	w1, #-1
	bl	_afi_writel
Lloh30:
	adrp	x8, _AFI_MSI_EN_VEC7@GOTPAGE
Lloh31:
	ldr	x8, [x8, _AFI_MSI_EN_VEC7@GOTPAGEOFF]
Lloh32:
	ldr	w2, [x8]
	mov	x0, x19
	mov	w1, #-1
	bl	_afi_writel
Lloh33:
	adrp	x20, _AFI_INTR_MASK@GOTPAGE
Lloh34:
	ldr	x20, [x20, _AFI_INTR_MASK@GOTPAGEOFF]
	ldr	w1, [x20]
	mov	x0, x19
	bl	_afi_readl
Lloh35:
	adrp	x8, _AFI_INTR_MASK_MSI_MASK@GOTPAGE
Lloh36:
	ldr	x8, [x8, _AFI_INTR_MASK_MSI_MASK@GOTPAGEOFF]
Lloh37:
	ldr	w8, [x8]
	orr	w1, w8, w0
	ldr	w2, [x20]
	mov	x0, x19
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	b	_afi_writel
	.loh AdrpLdrGotLdr	Lloh35, Lloh36, Lloh37
	.loh AdrpLdrGot	Lloh33, Lloh34
	.loh AdrpLdrGotLdr	Lloh30, Lloh31, Lloh32
	.loh AdrpLdrGotLdr	Lloh27, Lloh28, Lloh29
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_AFI_MSI_FPCI_BAR_ST,4,2        ; @AFI_MSI_FPCI_BAR_ST
	.comm	_AFI_MSI_AXI_BAR_ST,4,2         ; @AFI_MSI_AXI_BAR_ST
	.comm	_AFI_MSI_BAR_SZ,4,2             ; @AFI_MSI_BAR_SZ
	.comm	_AFI_MSI_EN_VEC0,4,2            ; @AFI_MSI_EN_VEC0
	.comm	_AFI_MSI_EN_VEC1,4,2            ; @AFI_MSI_EN_VEC1
	.comm	_AFI_MSI_EN_VEC2,4,2            ; @AFI_MSI_EN_VEC2
	.comm	_AFI_MSI_EN_VEC3,4,2            ; @AFI_MSI_EN_VEC3
	.comm	_AFI_MSI_EN_VEC4,4,2            ; @AFI_MSI_EN_VEC4
	.comm	_AFI_MSI_EN_VEC5,4,2            ; @AFI_MSI_EN_VEC5
	.comm	_AFI_MSI_EN_VEC6,4,2            ; @AFI_MSI_EN_VEC6
	.comm	_AFI_MSI_EN_VEC7,4,2            ; @AFI_MSI_EN_VEC7
	.comm	_AFI_INTR_MASK,4,2              ; @AFI_INTR_MASK
	.comm	_AFI_INTR_MASK_MSI_MASK,4,2     ; @AFI_INTR_MASK_MSI_MASK
	.no_dead_strip	_tegra_pcie_enable_msi
.subsections_via_symbols
