	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function xgene_msi_probe
_xgene_msi_probe:                       ## @xgene_msi_probe
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r14
	movq	_xgene_msi_ctrl@GOTPCREL(%rip), %r15
	movq	%r15, %rsi
	callq	_platform_set_drvdata
	movq	_IORESOURCE_MEM@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	xorl	%edx, %edx
	callq	_platform_get_resource
	movq	%rax, %rbx
	movq	%r14, %rdi
	movq	%rax, %rsi
	callq	_devm_ioremap_resource
	movl	%eax, 20(%r15)
	movl	%eax, %edi
	callq	_IS_ERR
	testq	%rax, %rax
	je	LBB0_2
## %bb.1:
	leaq	L_.str(%rip), %rsi
	movq	%r14, %rdi
	xorl	%eax, %eax
	callq	_dev_err
	movl	20(%r15), %edi
	callq	_PTR_ERR
	movl	%eax, %r12d
	jmp	LBB0_24
LBB0_2:
	movl	(%rbx), %eax
	movl	%eax, 16(%r15)
	movl	(%r14), %eax
	movl	%eax, 12(%r15)
	xorl	%eax, %eax
	callq	_num_possible_cpus
	movl	%eax, 8(%r15)
	movq	%r15, %rdi
	callq	_xgene_msi_init_allocator
	testl	%eax, %eax
	je	LBB0_5
## %bb.3:
	movl	%eax, %r12d
	leaq	L_.str.1(%rip), %rsi
	jmp	LBB0_4
LBB0_5:
	movq	_xgene_msi_ctrl@GOTPCREL(%rip), %r15
	movq	%r15, %rdi
	callq	_xgene_allocate_domains
	testl	%eax, %eax
	je	LBB0_6
## %bb.10:
	movl	%eax, %r12d
	leaq	L_.str.2(%rip), %rsi
LBB0_4:
	movq	%r14, %rdi
	xorl	%eax, %eax
	callq	_dev_err
LBB0_24:
	movq	%r14, %rdi
	callq	_xgene_msi_remove
LBB0_25:
	movl	%r12d, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_6:
	movq	_NR_HW_IRQS@GOTPCREL(%rip), %rax
	cmpl	$0, (%rax)
	jle	LBB0_20
## %bb.7:
	movl	$8, %ebx
	xorl	%r13d, %r13d
	.p2align	4, 0x90
LBB0_8:                                 ## =>This Inner Loop Header: Depth=1
	movq	%r14, %rdi
	movl	%r13d, %esi
	callq	_platform_get_irq
	movl	%eax, %r12d
	testl	%eax, %eax
	js	LBB0_9
## %bb.11:                              ##   in Loop: Header=BB0_8 Depth=1
	movq	(%r15), %rax
	movl	%r12d, -8(%rax,%rbx)
	movl	%r13d, -4(%rax,%rbx)
	movq	%r15, (%rax,%rbx)
	incq	%r13
	movq	_NR_HW_IRQS@GOTPCREL(%rip), %rax
	movslq	(%rax), %rax
	addq	$16, %rbx
	cmpq	%rax, %r13
	jl	LBB0_8
## %bb.12:
	testl	%eax, %eax
	jle	LBB0_20
## %bb.13:
	xorl	%r12d, %r12d
	movq	_IDX_PER_GROUP@GOTPCREL(%rip), %r13
	movq	_xgene_msi_ctrl@GOTPCREL(%rip), %r15
LBB0_15:                                ## =>This Loop Header: Depth=1
                                        ##     Child Loop BB0_17 Depth 2
	cmpq	$0, (%r13)
	jle	LBB0_18
## %bb.16:                              ##   in Loop: Header=BB0_15 Depth=1
	xorl	%ebx, %ebx
	.p2align	4, 0x90
LBB0_17:                                ##   Parent Loop BB0_15 Depth=1
                                        ## =>  This Inner Loop Header: Depth=2
	movq	%r15, %rdi
	movl	%r12d, %esi
	movq	%rbx, %rdx
	callq	_xgene_msi_ir_read
	incq	%rbx
	cmpq	(%r13), %rbx
	jl	LBB0_17
LBB0_18:                                ##   in Loop: Header=BB0_15 Depth=1
	movq	%r15, %rdi
	movl	%r12d, %esi
	callq	_xgene_msi_int_read
	testq	%rax, %rax
	jne	LBB0_19
## %bb.14:                              ##   in Loop: Header=BB0_15 Depth=1
	incl	%r12d
	movq	_NR_HW_IRQS@GOTPCREL(%rip), %rax
	cmpl	(%rax), %r12d
	jl	LBB0_15
LBB0_20:
	movq	_CPUHP_AP_ONLINE_DYN@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_xgene_msi_hwirq_alloc@GOTPCREL(%rip), %rax
	movq	(%rax), %rdx
	leaq	L_.str.5(%rip), %rsi
	xorl	%ecx, %ecx
	callq	_cpuhp_setup_state
	movl	%eax, %ebx
	testl	%eax, %eax
	js	LBB0_23
## %bb.21:
	movq	_pci_xgene_online@GOTPCREL(%rip), %rax
	movl	%ebx, (%rax)
	movq	_CPUHP_PCI_XGENE_DEAD@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_xgene_msi_hwirq_free@GOTPCREL(%rip), %rax
	movq	(%rax), %rcx
	leaq	L_.str.6(%rip), %rsi
	xorl	%r12d, %r12d
	xorl	%edx, %edx
	callq	_cpuhp_setup_state
	movl	%eax, %ebx
	testl	%eax, %eax
	je	LBB0_22
LBB0_23:
	leaq	L_.str.8(%rip), %rsi
	movq	%r14, %rdi
	xorl	%eax, %eax
	callq	_dev_err
	movl	%ebx, %r12d
	jmp	LBB0_24
LBB0_9:
	leaq	L_.str.3(%rip), %rsi
	movq	%r14, %rdi
	movl	%r13d, %edx
	xorl	%eax, %eax
	callq	_dev_err
	jmp	LBB0_24
LBB0_22:
	leaq	L_.str.7(%rip), %rsi
	movq	%r14, %rdi
	callq	_dev_info
	jmp	LBB0_25
LBB0_19:
	leaq	L_.str.4(%rip), %rsi
	xorl	%r12d, %r12d
	movq	%r14, %rdi
	xorl	%eax, %eax
	callq	_dev_err
	movq	_EINVAL@GOTPCREL(%rip), %rax
	subl	(%rax), %r12d
	jmp	LBB0_24
	.cfi_endproc
                                        ## -- End function
	.comm	_xgene_msi_ctrl,24,3            ## @xgene_msi_ctrl
	.comm	_IORESOURCE_MEM,4,2             ## @IORESOURCE_MEM
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"no reg space\n"

L_.str.1:                               ## @.str.1
	.asciz	"Error allocating MSI bitmap\n"

L_.str.2:                               ## @.str.2
	.asciz	"Failed to allocate MSI domain\n"

	.comm	_NR_HW_IRQS,4,2                 ## @NR_HW_IRQS
L_.str.3:                               ## @.str.3
	.asciz	"Cannot translate IRQ index %d\n"

	.comm	_IDX_PER_GROUP,8,3              ## @IDX_PER_GROUP
L_.str.4:                               ## @.str.4
	.asciz	"Failed to clear spurious IRQ\n"

	.comm	_EINVAL,4,2                     ## @EINVAL
	.comm	_CPUHP_AP_ONLINE_DYN,4,2        ## @CPUHP_AP_ONLINE_DYN
L_.str.5:                               ## @.str.5
	.asciz	"pci/xgene:online"

	.comm	_xgene_msi_hwirq_alloc,8,3      ## @xgene_msi_hwirq_alloc
	.comm	_pci_xgene_online,4,2           ## @pci_xgene_online
	.comm	_CPUHP_PCI_XGENE_DEAD,4,2       ## @CPUHP_PCI_XGENE_DEAD
L_.str.6:                               ## @.str.6
	.asciz	"pci/xgene:dead"

	.comm	_xgene_msi_hwirq_free,8,3       ## @xgene_msi_hwirq_free
L_.str.7:                               ## @.str.7
	.asciz	"APM X-Gene PCIe MSI driver loaded\n"

L_.str.8:                               ## @.str.8
	.asciz	"failed to add CPU MSI notifier\n"

	.no_dead_strip	_xgene_msi_probe
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function xgene_msi_probe
_xgene_msi_probe:                       ; @xgene_msi_probe
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #80
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x19, x0
Lloh0:
	adrp	x20, _xgene_msi_ctrl@GOTPAGE
Lloh1:
	ldr	x20, [x20, _xgene_msi_ctrl@GOTPAGEOFF]
	mov	x1, x20
	bl	_platform_set_drvdata
Lloh2:
	adrp	x8, _IORESOURCE_MEM@GOTPAGE
Lloh3:
	ldr	x8, [x8, _IORESOURCE_MEM@GOTPAGEOFF]
Lloh4:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #0
	bl	_platform_get_resource
	mov	x21, x0
	mov	x0, x19
	mov	x1, x21
	bl	_devm_ioremap_resource
	str	w0, [x20, #20]
	bl	_IS_ERR
	cbz	x0, LBB0_2
; %bb.1:
Lloh5:
	adrp	x1, l_.str@PAGE
Lloh6:
	add	x1, x1, l_.str@PAGEOFF
	mov	x0, x19
	bl	_dev_err
	ldr	w0, [x20, #20]
	bl	_PTR_ERR
	mov	x20, x0
	b	LBB0_22
LBB0_2:
	ldr	w8, [x21]
	ldr	w9, [x19]
	stp	w9, w8, [x20, #12]
	bl	_num_possible_cpus
	str	w0, [x20, #8]
	mov	x0, x20
	bl	_xgene_msi_init_allocator
	cbz	w0, LBB0_4
; %bb.3:
	mov	x20, x0
Lloh7:
	adrp	x1, l_.str.1@PAGE
Lloh8:
	add	x1, x1, l_.str.1@PAGEOFF
	b	LBB0_21
LBB0_4:
Lloh9:
	adrp	x21, _xgene_msi_ctrl@GOTPAGE
Lloh10:
	ldr	x21, [x21, _xgene_msi_ctrl@GOTPAGEOFF]
	mov	x0, x21
	bl	_xgene_allocate_domains
	cbz	w0, LBB0_6
; %bb.5:
	mov	x20, x0
Lloh11:
	adrp	x1, l_.str.2@PAGE
Lloh12:
	add	x1, x1, l_.str.2@PAGEOFF
	b	LBB0_21
LBB0_6:
Lloh13:
	adrp	x23, _NR_HW_IRQS@GOTPAGE
Lloh14:
	ldr	x23, [x23, _NR_HW_IRQS@GOTPAGEOFF]
	ldr	w8, [x23]
	cmp	w8, #1
	b.lt	LBB0_17
; %bb.7:
	mov	x24, #0
	mov	x22, #0
LBB0_8:                                 ; =>This Inner Loop Header: Depth=1
	mov	x0, x19
	mov	x1, x22
	bl	_platform_get_irq
	mov	x20, x0
	tbnz	w0, #31, LBB0_20
; %bb.9:                                ;   in Loop: Header=BB0_8 Depth=1
	ldr	x8, [x21]
	add	x8, x8, x24
	stp	w20, w22, [x8]
	str	x21, [x8, #8]
	add	x22, x22, #1
	ldrsw	x8, [x23]
	add	x24, x24, #16
	cmp	x22, x8
	b.lt	LBB0_8
; %bb.10:
	cmp	w8, #1
	b.lt	LBB0_17
; %bb.11:
	mov	w20, #0
Lloh15:
	adrp	x24, _IDX_PER_GROUP@GOTPAGE
Lloh16:
	ldr	x24, [x24, _IDX_PER_GROUP@GOTPAGEOFF]
Lloh17:
	adrp	x21, _xgene_msi_ctrl@GOTPAGE
Lloh18:
	ldr	x21, [x21, _xgene_msi_ctrl@GOTPAGEOFF]
LBB0_12:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_14 Depth 2
	ldr	x8, [x24]
	cmp	x8, #1
	b.lt	LBB0_15
; %bb.13:                               ;   in Loop: Header=BB0_12 Depth=1
	mov	x22, #0
LBB0_14:                                ;   Parent Loop BB0_12 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	mov	x0, x21
	mov	x1, x20
	mov	x2, x22
	bl	_xgene_msi_ir_read
	add	x22, x22, #1
	ldr	x8, [x24]
	cmp	x22, x8
	b.lt	LBB0_14
LBB0_15:                                ;   in Loop: Header=BB0_12 Depth=1
	mov	x0, x21
	mov	x1, x20
	bl	_xgene_msi_int_read
	cbnz	x0, LBB0_25
; %bb.16:                               ;   in Loop: Header=BB0_12 Depth=1
	add	w20, w20, #1
	ldr	w8, [x23]
	cmp	w20, w8
	b.lt	LBB0_12
LBB0_17:
Lloh19:
	adrp	x8, _CPUHP_AP_ONLINE_DYN@GOTPAGE
Lloh20:
	ldr	x8, [x8, _CPUHP_AP_ONLINE_DYN@GOTPAGEOFF]
Lloh21:
	ldr	w0, [x8]
Lloh22:
	adrp	x8, _xgene_msi_hwirq_alloc@GOTPAGE
Lloh23:
	ldr	x8, [x8, _xgene_msi_hwirq_alloc@GOTPAGEOFF]
Lloh24:
	ldr	x2, [x8]
Lloh25:
	adrp	x1, l_.str.5@PAGE
Lloh26:
	add	x1, x1, l_.str.5@PAGEOFF
	mov	x3, #0
	bl	_cpuhp_setup_state
	mov	x20, x0
	tbnz	w0, #31, LBB0_19
; %bb.18:
Lloh27:
	adrp	x8, _pci_xgene_online@GOTPAGE
Lloh28:
	ldr	x8, [x8, _pci_xgene_online@GOTPAGEOFF]
Lloh29:
	str	w20, [x8]
Lloh30:
	adrp	x8, _CPUHP_PCI_XGENE_DEAD@GOTPAGE
Lloh31:
	ldr	x8, [x8, _CPUHP_PCI_XGENE_DEAD@GOTPAGEOFF]
Lloh32:
	ldr	w0, [x8]
Lloh33:
	adrp	x8, _xgene_msi_hwirq_free@GOTPAGE
Lloh34:
	ldr	x8, [x8, _xgene_msi_hwirq_free@GOTPAGEOFF]
Lloh35:
	ldr	x3, [x8]
Lloh36:
	adrp	x1, l_.str.6@PAGE
Lloh37:
	add	x1, x1, l_.str.6@PAGEOFF
	mov	x2, #0
	bl	_cpuhp_setup_state
	mov	x20, x0
	cbz	w0, LBB0_24
LBB0_19:
Lloh38:
	adrp	x1, l_.str.8@PAGE
Lloh39:
	add	x1, x1, l_.str.8@PAGEOFF
	b	LBB0_21
LBB0_20:
	str	x22, [sp]
Lloh40:
	adrp	x1, l_.str.3@PAGE
Lloh41:
	add	x1, x1, l_.str.3@PAGEOFF
LBB0_21:
	mov	x0, x19
	bl	_dev_err
LBB0_22:
	mov	x0, x19
	bl	_xgene_msi_remove
LBB0_23:
	mov	x0, x20
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #80
	ret
LBB0_24:
Lloh42:
	adrp	x1, l_.str.7@PAGE
Lloh43:
	add	x1, x1, l_.str.7@PAGEOFF
	mov	x0, x19
	bl	_dev_info
	b	LBB0_23
LBB0_25:
Lloh44:
	adrp	x1, l_.str.4@PAGE
Lloh45:
	add	x1, x1, l_.str.4@PAGEOFF
	mov	x0, x19
	bl	_dev_err
Lloh46:
	adrp	x8, _EINVAL@GOTPAGE
Lloh47:
	ldr	x8, [x8, _EINVAL@GOTPAGEOFF]
Lloh48:
	ldr	w8, [x8]
	neg	w20, w8
	b	LBB0_22
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpAdd	Lloh5, Lloh6
	.loh AdrpAdd	Lloh7, Lloh8
	.loh AdrpLdrGot	Lloh9, Lloh10
	.loh AdrpAdd	Lloh11, Lloh12
	.loh AdrpLdrGot	Lloh13, Lloh14
	.loh AdrpLdrGot	Lloh17, Lloh18
	.loh AdrpLdrGot	Lloh15, Lloh16
	.loh AdrpAdd	Lloh25, Lloh26
	.loh AdrpLdrGotLdr	Lloh22, Lloh23, Lloh24
	.loh AdrpLdrGotLdr	Lloh19, Lloh20, Lloh21
	.loh AdrpAdd	Lloh36, Lloh37
	.loh AdrpLdrGotLdr	Lloh33, Lloh34, Lloh35
	.loh AdrpLdrGotLdr	Lloh30, Lloh31, Lloh32
	.loh AdrpLdrGotStr	Lloh27, Lloh28, Lloh29
	.loh AdrpAdd	Lloh38, Lloh39
	.loh AdrpAdd	Lloh40, Lloh41
	.loh AdrpAdd	Lloh42, Lloh43
	.loh AdrpLdrGotLdr	Lloh46, Lloh47, Lloh48
	.loh AdrpAdd	Lloh44, Lloh45
	.cfi_endproc
                                        ; -- End function
	.comm	_xgene_msi_ctrl,24,3            ; @xgene_msi_ctrl
	.comm	_IORESOURCE_MEM,4,2             ; @IORESOURCE_MEM
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"no reg space\n"

l_.str.1:                               ; @.str.1
	.asciz	"Error allocating MSI bitmap\n"

l_.str.2:                               ; @.str.2
	.asciz	"Failed to allocate MSI domain\n"

	.comm	_NR_HW_IRQS,4,2                 ; @NR_HW_IRQS
l_.str.3:                               ; @.str.3
	.asciz	"Cannot translate IRQ index %d\n"

	.comm	_IDX_PER_GROUP,8,3              ; @IDX_PER_GROUP
l_.str.4:                               ; @.str.4
	.asciz	"Failed to clear spurious IRQ\n"

	.comm	_EINVAL,4,2                     ; @EINVAL
	.comm	_CPUHP_AP_ONLINE_DYN,4,2        ; @CPUHP_AP_ONLINE_DYN
l_.str.5:                               ; @.str.5
	.asciz	"pci/xgene:online"

	.comm	_xgene_msi_hwirq_alloc,8,3      ; @xgene_msi_hwirq_alloc
	.comm	_pci_xgene_online,4,2           ; @pci_xgene_online
	.comm	_CPUHP_PCI_XGENE_DEAD,4,2       ; @CPUHP_PCI_XGENE_DEAD
l_.str.6:                               ; @.str.6
	.asciz	"pci/xgene:dead"

	.comm	_xgene_msi_hwirq_free,8,3       ; @xgene_msi_hwirq_free
l_.str.7:                               ; @.str.7
	.asciz	"APM X-Gene PCIe MSI driver loaded\n"

l_.str.8:                               ; @.str.8
	.asciz	"failed to add CPU MSI notifier\n"

	.no_dead_strip	_xgene_msi_probe
.subsections_via_symbols
