	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function tegra_pcie_enable_interrupts
_tegra_pcie_enable_interrupts:          ## @tegra_pcie_enable_interrupts
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r14
	pushq	%rbx
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	movq	%rdi, %r14
	callq	_to_dw_pcie_from_pp
	movq	%rax, %rdi
	callq	_to_tegra_pcie
	movq	%rax, %rbx
	movq	_APPL_INTR_STATUS_L0@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	movl	$-1, %esi
	callq	_appl_writel
	movq	_APPL_INTR_STATUS_L1_0_0@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	movl	$-1, %esi
	callq	_appl_writel
	movq	_APPL_INTR_STATUS_L1_1@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	movl	$-1, %esi
	callq	_appl_writel
	movq	_APPL_INTR_STATUS_L1_2@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	movl	$-1, %esi
	callq	_appl_writel
	movq	_APPL_INTR_STATUS_L1_3@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	movl	$-1, %esi
	callq	_appl_writel
	movq	_APPL_INTR_STATUS_L1_6@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	movl	$-1, %esi
	callq	_appl_writel
	movq	_APPL_INTR_STATUS_L1_7@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	movl	$-1, %esi
	callq	_appl_writel
	movq	_APPL_INTR_STATUS_L1_8_0@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	movl	$-1, %esi
	callq	_appl_writel
	movq	_APPL_INTR_STATUS_L1_9@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	movl	$-1, %esi
	callq	_appl_writel
	movq	_APPL_INTR_STATUS_L1_10@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	movl	$-1, %esi
	callq	_appl_writel
	movq	_APPL_INTR_STATUS_L1_11@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	movl	$-1, %esi
	callq	_appl_writel
	movq	_APPL_INTR_STATUS_L1_13@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	movl	$-1, %esi
	callq	_appl_writel
	movq	_APPL_INTR_STATUS_L1_14@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	movl	$-1, %esi
	callq	_appl_writel
	movq	_APPL_INTR_STATUS_L1_15@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	movl	$-1, %esi
	callq	_appl_writel
	movq	_APPL_INTR_STATUS_L1_17@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	movl	$-1, %esi
	callq	_appl_writel
	movq	%r14, %rdi
	callq	_tegra_pcie_enable_system_interrupts
	movq	%r14, %rdi
	callq	_tegra_pcie_enable_legacy_interrupts
	movq	_CONFIG_PCI_MSI@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_IS_ENABLED
	testq	%rax, %rax
	je	LBB0_1
## %bb.2:
	movq	%r14, %rdi
	popq	%rbx
	popq	%r14
	popq	%rbp
	jmp	_tegra_pcie_enable_msi_interrupts ## TAILCALL
LBB0_1:
	popq	%rbx
	popq	%r14
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_APPL_INTR_STATUS_L0,4,2        ## @APPL_INTR_STATUS_L0
	.comm	_APPL_INTR_STATUS_L1_0_0,4,2    ## @APPL_INTR_STATUS_L1_0_0
	.comm	_APPL_INTR_STATUS_L1_1,4,2      ## @APPL_INTR_STATUS_L1_1
	.comm	_APPL_INTR_STATUS_L1_2,4,2      ## @APPL_INTR_STATUS_L1_2
	.comm	_APPL_INTR_STATUS_L1_3,4,2      ## @APPL_INTR_STATUS_L1_3
	.comm	_APPL_INTR_STATUS_L1_6,4,2      ## @APPL_INTR_STATUS_L1_6
	.comm	_APPL_INTR_STATUS_L1_7,4,2      ## @APPL_INTR_STATUS_L1_7
	.comm	_APPL_INTR_STATUS_L1_8_0,4,2    ## @APPL_INTR_STATUS_L1_8_0
	.comm	_APPL_INTR_STATUS_L1_9,4,2      ## @APPL_INTR_STATUS_L1_9
	.comm	_APPL_INTR_STATUS_L1_10,4,2     ## @APPL_INTR_STATUS_L1_10
	.comm	_APPL_INTR_STATUS_L1_11,4,2     ## @APPL_INTR_STATUS_L1_11
	.comm	_APPL_INTR_STATUS_L1_13,4,2     ## @APPL_INTR_STATUS_L1_13
	.comm	_APPL_INTR_STATUS_L1_14,4,2     ## @APPL_INTR_STATUS_L1_14
	.comm	_APPL_INTR_STATUS_L1_15,4,2     ## @APPL_INTR_STATUS_L1_15
	.comm	_APPL_INTR_STATUS_L1_17,4,2     ## @APPL_INTR_STATUS_L1_17
	.comm	_CONFIG_PCI_MSI,4,2             ## @CONFIG_PCI_MSI
	.no_dead_strip	_tegra_pcie_enable_interrupts
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function tegra_pcie_enable_interrupts
_tegra_pcie_enable_interrupts:          ; @tegra_pcie_enable_interrupts
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x19, x0
	bl	_to_dw_pcie_from_pp
	bl	_to_tegra_pcie
	mov	x20, x0
Lloh0:
	adrp	x8, _APPL_INTR_STATUS_L0@GOTPAGE
Lloh1:
	ldr	x8, [x8, _APPL_INTR_STATUS_L0@GOTPAGEOFF]
Lloh2:
	ldr	w2, [x8]
	mov	w1, #-1
	bl	_appl_writel
Lloh3:
	adrp	x8, _APPL_INTR_STATUS_L1_0_0@GOTPAGE
Lloh4:
	ldr	x8, [x8, _APPL_INTR_STATUS_L1_0_0@GOTPAGEOFF]
Lloh5:
	ldr	w2, [x8]
	mov	x0, x20
	mov	w1, #-1
	bl	_appl_writel
Lloh6:
	adrp	x8, _APPL_INTR_STATUS_L1_1@GOTPAGE
Lloh7:
	ldr	x8, [x8, _APPL_INTR_STATUS_L1_1@GOTPAGEOFF]
Lloh8:
	ldr	w2, [x8]
	mov	x0, x20
	mov	w1, #-1
	bl	_appl_writel
Lloh9:
	adrp	x8, _APPL_INTR_STATUS_L1_2@GOTPAGE
Lloh10:
	ldr	x8, [x8, _APPL_INTR_STATUS_L1_2@GOTPAGEOFF]
Lloh11:
	ldr	w2, [x8]
	mov	x0, x20
	mov	w1, #-1
	bl	_appl_writel
Lloh12:
	adrp	x8, _APPL_INTR_STATUS_L1_3@GOTPAGE
Lloh13:
	ldr	x8, [x8, _APPL_INTR_STATUS_L1_3@GOTPAGEOFF]
Lloh14:
	ldr	w2, [x8]
	mov	x0, x20
	mov	w1, #-1
	bl	_appl_writel
Lloh15:
	adrp	x8, _APPL_INTR_STATUS_L1_6@GOTPAGE
Lloh16:
	ldr	x8, [x8, _APPL_INTR_STATUS_L1_6@GOTPAGEOFF]
Lloh17:
	ldr	w2, [x8]
	mov	x0, x20
	mov	w1, #-1
	bl	_appl_writel
Lloh18:
	adrp	x8, _APPL_INTR_STATUS_L1_7@GOTPAGE
Lloh19:
	ldr	x8, [x8, _APPL_INTR_STATUS_L1_7@GOTPAGEOFF]
Lloh20:
	ldr	w2, [x8]
	mov	x0, x20
	mov	w1, #-1
	bl	_appl_writel
Lloh21:
	adrp	x8, _APPL_INTR_STATUS_L1_8_0@GOTPAGE
Lloh22:
	ldr	x8, [x8, _APPL_INTR_STATUS_L1_8_0@GOTPAGEOFF]
Lloh23:
	ldr	w2, [x8]
	mov	x0, x20
	mov	w1, #-1
	bl	_appl_writel
Lloh24:
	adrp	x8, _APPL_INTR_STATUS_L1_9@GOTPAGE
Lloh25:
	ldr	x8, [x8, _APPL_INTR_STATUS_L1_9@GOTPAGEOFF]
Lloh26:
	ldr	w2, [x8]
	mov	x0, x20
	mov	w1, #-1
	bl	_appl_writel
Lloh27:
	adrp	x8, _APPL_INTR_STATUS_L1_10@GOTPAGE
Lloh28:
	ldr	x8, [x8, _APPL_INTR_STATUS_L1_10@GOTPAGEOFF]
Lloh29:
	ldr	w2, [x8]
	mov	x0, x20
	mov	w1, #-1
	bl	_appl_writel
Lloh30:
	adrp	x8, _APPL_INTR_STATUS_L1_11@GOTPAGE
Lloh31:
	ldr	x8, [x8, _APPL_INTR_STATUS_L1_11@GOTPAGEOFF]
Lloh32:
	ldr	w2, [x8]
	mov	x0, x20
	mov	w1, #-1
	bl	_appl_writel
Lloh33:
	adrp	x8, _APPL_INTR_STATUS_L1_13@GOTPAGE
Lloh34:
	ldr	x8, [x8, _APPL_INTR_STATUS_L1_13@GOTPAGEOFF]
Lloh35:
	ldr	w2, [x8]
	mov	x0, x20
	mov	w1, #-1
	bl	_appl_writel
Lloh36:
	adrp	x8, _APPL_INTR_STATUS_L1_14@GOTPAGE
Lloh37:
	ldr	x8, [x8, _APPL_INTR_STATUS_L1_14@GOTPAGEOFF]
Lloh38:
	ldr	w2, [x8]
	mov	x0, x20
	mov	w1, #-1
	bl	_appl_writel
Lloh39:
	adrp	x8, _APPL_INTR_STATUS_L1_15@GOTPAGE
Lloh40:
	ldr	x8, [x8, _APPL_INTR_STATUS_L1_15@GOTPAGEOFF]
Lloh41:
	ldr	w2, [x8]
	mov	x0, x20
	mov	w1, #-1
	bl	_appl_writel
Lloh42:
	adrp	x8, _APPL_INTR_STATUS_L1_17@GOTPAGE
Lloh43:
	ldr	x8, [x8, _APPL_INTR_STATUS_L1_17@GOTPAGEOFF]
Lloh44:
	ldr	w2, [x8]
	mov	x0, x20
	mov	w1, #-1
	bl	_appl_writel
	mov	x0, x19
	bl	_tegra_pcie_enable_system_interrupts
	mov	x0, x19
	bl	_tegra_pcie_enable_legacy_interrupts
Lloh45:
	adrp	x8, _CONFIG_PCI_MSI@GOTPAGE
Lloh46:
	ldr	x8, [x8, _CONFIG_PCI_MSI@GOTPAGEOFF]
Lloh47:
	ldr	w0, [x8]
	bl	_IS_ENABLED
	cbz	x0, LBB0_2
; %bb.1:
	mov	x0, x19
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	b	_tegra_pcie_enable_msi_interrupts
LBB0_2:
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh45, Lloh46, Lloh47
	.loh AdrpLdrGotLdr	Lloh42, Lloh43, Lloh44
	.loh AdrpLdrGotLdr	Lloh39, Lloh40, Lloh41
	.loh AdrpLdrGotLdr	Lloh36, Lloh37, Lloh38
	.loh AdrpLdrGotLdr	Lloh33, Lloh34, Lloh35
	.loh AdrpLdrGotLdr	Lloh30, Lloh31, Lloh32
	.loh AdrpLdrGotLdr	Lloh27, Lloh28, Lloh29
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_APPL_INTR_STATUS_L0,4,2        ; @APPL_INTR_STATUS_L0
	.comm	_APPL_INTR_STATUS_L1_0_0,4,2    ; @APPL_INTR_STATUS_L1_0_0
	.comm	_APPL_INTR_STATUS_L1_1,4,2      ; @APPL_INTR_STATUS_L1_1
	.comm	_APPL_INTR_STATUS_L1_2,4,2      ; @APPL_INTR_STATUS_L1_2
	.comm	_APPL_INTR_STATUS_L1_3,4,2      ; @APPL_INTR_STATUS_L1_3
	.comm	_APPL_INTR_STATUS_L1_6,4,2      ; @APPL_INTR_STATUS_L1_6
	.comm	_APPL_INTR_STATUS_L1_7,4,2      ; @APPL_INTR_STATUS_L1_7
	.comm	_APPL_INTR_STATUS_L1_8_0,4,2    ; @APPL_INTR_STATUS_L1_8_0
	.comm	_APPL_INTR_STATUS_L1_9,4,2      ; @APPL_INTR_STATUS_L1_9
	.comm	_APPL_INTR_STATUS_L1_10,4,2     ; @APPL_INTR_STATUS_L1_10
	.comm	_APPL_INTR_STATUS_L1_11,4,2     ; @APPL_INTR_STATUS_L1_11
	.comm	_APPL_INTR_STATUS_L1_13,4,2     ; @APPL_INTR_STATUS_L1_13
	.comm	_APPL_INTR_STATUS_L1_14,4,2     ; @APPL_INTR_STATUS_L1_14
	.comm	_APPL_INTR_STATUS_L1_15,4,2     ; @APPL_INTR_STATUS_L1_15
	.comm	_APPL_INTR_STATUS_L1_17,4,2     ; @APPL_INTR_STATUS_L1_17
	.comm	_CONFIG_PCI_MSI,4,2             ; @CONFIG_PCI_MSI
	.no_dead_strip	_tegra_pcie_enable_interrupts
.subsections_via_symbols
