	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function il3945_nic_config
_il3945_nic_config:                     ## @il3945_nic_config
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r14
	movq	8(%rdi), %rax
	movq	16(%rdi), %r15
	movl	(%rax), %ebx
	callq	_spin_lock_irqsave
	leaq	L_.str(%rip), %rdi
	movl	%ebx, %esi
	xorl	%eax, %eax
	callq	_D_INFO
	movq	_PCI_CFG_REV_ID_BIT_RTP@GOTPCREL(%rip), %rax
	testl	%ebx, (%rax)
	je	LBB0_2
## %bb.1:
	leaq	L_.str.1(%rip), %rdi
	xorl	%eax, %eax
	callq	_D_INFO
	jmp	LBB0_6
LBB0_2:
	movq	_PCI_CFG_REV_ID_BIT_BASIC_SKU@GOTPCREL(%rip), %rax
	testl	%ebx, (%rax)
	je	LBB0_4
## %bb.3:
	leaq	L_.str.2(%rip), %rdi
	xorl	%eax, %eax
	callq	_D_INFO
	movq	_CSR_HW_IF_CONFIG_REG@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_CSR39_HW_IF_CONFIG_REG_BIT_3945_MB@GOTPCREL(%rip), %rax
	jmp	LBB0_5
LBB0_4:
	leaq	L_.str.3(%rip), %rdi
	xorl	%eax, %eax
	callq	_D_INFO
	movq	_CSR_HW_IF_CONFIG_REG@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_CSR39_HW_IF_CONFIG_REG_BIT_3945_MM@GOTPCREL(%rip), %rax
LBB0_5:
	movl	(%rax), %edx
	movq	%r14, %rdi
	callq	_il_set_bit
LBB0_6:
	movq	_EEPROM_SKU_CAP_OP_MODE_MRC@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	cmpl	(%r15), %eax
	jne	LBB0_8
## %bb.7:
	leaq	L_.str.4(%rip), %rdi
	xorl	%eax, %eax
	callq	_D_INFO
	movq	_CSR_HW_IF_CONFIG_REG@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_CSR39_HW_IF_CONFIG_REG_BIT_SKU_MRC@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r14, %rdi
	callq	_il_set_bit
	jmp	LBB0_9
LBB0_8:
	leaq	L_.str.5(%rip), %rdi
	xorl	%eax, %eax
	callq	_D_INFO
LBB0_9:
	movl	4(%r15), %esi
	movl	%esi, %ebx
	andl	$240, %ebx
	leaq	L_.str.6(%rip), %rdi
	xorl	%eax, %eax
	callq	_D_INFO
	movq	_CSR_HW_IF_CONFIG_REG@GOTPCREL(%rip), %r12
	movl	(%r12), %esi
	movq	_CSR39_HW_IF_CONFIG_REG_BIT_BOARD_TYPE@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r14, %rdi
	cmpl	$208, %ebx
	jne	LBB0_11
## %bb.10:
	callq	_il_set_bit
	jmp	LBB0_12
LBB0_11:
	callq	_il_clear_bit
LBB0_12:
	movl	8(%r15), %esi
	cmpl	$1, %esi
	jg	LBB0_14
## %bb.13:
	movl	(%r12), %esi
	movq	_CSR39_HW_IF_CONFIG_REG_BITS_SILICON_TYPE_A@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r14, %rdi
	callq	_il_set_bit
	movl	8(%r15), %esi
	leaq	L_.str.7(%rip), %rdi
	xorl	%eax, %eax
	callq	_D_INFO
	jmp	LBB0_15
LBB0_14:
	leaq	L_.str.8(%rip), %rdi
	xorl	%eax, %eax
	callq	_D_INFO
	movl	(%r12), %esi
	movq	_CSR39_HW_IF_CONFIG_REG_BITS_SILICON_TYPE_B@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r14, %rdi
	callq	_il_set_bit
LBB0_15:
	movq	%r14, %rdi
	callq	_spin_unlock_irqrestore
	movl	(%r15), %eax
	movq	_EEPROM_SKU_CAP_SW_RF_KILL_ENABLE@GOTPCREL(%rip), %rcx
	testl	%eax, (%rcx)
	je	LBB0_17
## %bb.16:
	leaq	L_.str.9(%rip), %rdi
	callq	_D_RF_KILL
	movl	(%r15), %eax
LBB0_17:
	movq	_EEPROM_SKU_CAP_HW_RF_KILL_ENABLE@GOTPCREL(%rip), %rcx
	testl	%eax, (%rcx)
	je	LBB0_18
## %bb.19:
	leaq	L_.str.10(%rip), %rdi
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_D_RF_KILL                      ## TAILCALL
LBB0_18:
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"HW Revision ID = 0x%X\n"

	.comm	_PCI_CFG_REV_ID_BIT_RTP,4,2     ## @PCI_CFG_REV_ID_BIT_RTP
L_.str.1:                               ## @.str.1
	.asciz	"RTP type\n"

	.comm	_PCI_CFG_REV_ID_BIT_BASIC_SKU,4,2 ## @PCI_CFG_REV_ID_BIT_BASIC_SKU
L_.str.2:                               ## @.str.2
	.asciz	"3945 RADIO-MB type\n"

	.comm	_CSR_HW_IF_CONFIG_REG,4,2       ## @CSR_HW_IF_CONFIG_REG
	.comm	_CSR39_HW_IF_CONFIG_REG_BIT_3945_MB,4,2 ## @CSR39_HW_IF_CONFIG_REG_BIT_3945_MB
L_.str.3:                               ## @.str.3
	.asciz	"3945 RADIO-MM type\n"

	.comm	_CSR39_HW_IF_CONFIG_REG_BIT_3945_MM,4,2 ## @CSR39_HW_IF_CONFIG_REG_BIT_3945_MM
	.comm	_EEPROM_SKU_CAP_OP_MODE_MRC,4,2 ## @EEPROM_SKU_CAP_OP_MODE_MRC
L_.str.4:                               ## @.str.4
	.asciz	"SKU OP mode is mrc\n"

	.comm	_CSR39_HW_IF_CONFIG_REG_BIT_SKU_MRC,4,2 ## @CSR39_HW_IF_CONFIG_REG_BIT_SKU_MRC
L_.str.5:                               ## @.str.5
	.asciz	"SKU OP mode is basic\n"

L_.str.6:                               ## @.str.6
	.asciz	"3945ABG revision is 0x%X\n"

	.comm	_CSR39_HW_IF_CONFIG_REG_BIT_BOARD_TYPE,4,2 ## @CSR39_HW_IF_CONFIG_REG_BIT_BOARD_TYPE
	.comm	_CSR39_HW_IF_CONFIG_REG_BITS_SILICON_TYPE_A,4,2 ## @CSR39_HW_IF_CONFIG_REG_BITS_SILICON_TYPE_A
L_.str.7:                               ## @.str.7
	.asciz	"Card M type A version is 0x%X\n"

L_.str.8:                               ## @.str.8
	.asciz	"Card M type B version is 0x%X\n"

	.comm	_CSR39_HW_IF_CONFIG_REG_BITS_SILICON_TYPE_B,4,2 ## @CSR39_HW_IF_CONFIG_REG_BITS_SILICON_TYPE_B
	.comm	_EEPROM_SKU_CAP_SW_RF_KILL_ENABLE,4,2 ## @EEPROM_SKU_CAP_SW_RF_KILL_ENABLE
L_.str.9:                               ## @.str.9
	.asciz	"SW RF KILL supported in EEPROM.\n"

	.comm	_EEPROM_SKU_CAP_HW_RF_KILL_ENABLE,4,2 ## @EEPROM_SKU_CAP_HW_RF_KILL_ENABLE
L_.str.10:                              ## @.str.10
	.asciz	"HW RF KILL supported in EEPROM.\n"

	.no_dead_strip	_il3945_nic_config
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function il3945_nic_config
_il3945_nic_config:                     ; @il3945_nic_config
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #64
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x0
	ldp	x8, x20, [x0, #8]
	ldr	w22, [x8]
	bl	_spin_lock_irqsave
	str	x22, [sp]
Lloh0:
	adrp	x0, l_.str@PAGE
Lloh1:
	add	x0, x0, l_.str@PAGEOFF
	bl	_D_INFO
Lloh2:
	adrp	x8, _PCI_CFG_REV_ID_BIT_RTP@GOTPAGE
Lloh3:
	ldr	x8, [x8, _PCI_CFG_REV_ID_BIT_RTP@GOTPAGEOFF]
Lloh4:
	ldr	w8, [x8]
Lloh5:
	adrp	x21, _CSR_HW_IF_CONFIG_REG@GOTPAGE
Lloh6:
	ldr	x21, [x21, _CSR_HW_IF_CONFIG_REG@GOTPAGEOFF]
	tst	w8, w22
	b.eq	LBB0_2
; %bb.1:
Lloh7:
	adrp	x0, l_.str.1@PAGE
Lloh8:
	add	x0, x0, l_.str.1@PAGEOFF
	bl	_D_INFO
	b	LBB0_6
LBB0_2:
Lloh9:
	adrp	x8, _PCI_CFG_REV_ID_BIT_BASIC_SKU@GOTPAGE
Lloh10:
	ldr	x8, [x8, _PCI_CFG_REV_ID_BIT_BASIC_SKU@GOTPAGEOFF]
Lloh11:
	ldr	w8, [x8]
	tst	w8, w22
	b.eq	LBB0_4
; %bb.3:
Lloh12:
	adrp	x0, l_.str.2@PAGE
Lloh13:
	add	x0, x0, l_.str.2@PAGEOFF
	bl	_D_INFO
	ldr	w1, [x21]
Lloh14:
	adrp	x8, _CSR39_HW_IF_CONFIG_REG_BIT_3945_MB@GOTPAGE
Lloh15:
	ldr	x8, [x8, _CSR39_HW_IF_CONFIG_REG_BIT_3945_MB@GOTPAGEOFF]
	b	LBB0_5
LBB0_4:
Lloh16:
	adrp	x0, l_.str.3@PAGE
Lloh17:
	add	x0, x0, l_.str.3@PAGEOFF
	bl	_D_INFO
	ldr	w1, [x21]
Lloh18:
	adrp	x8, _CSR39_HW_IF_CONFIG_REG_BIT_3945_MM@GOTPAGE
Lloh19:
	ldr	x8, [x8, _CSR39_HW_IF_CONFIG_REG_BIT_3945_MM@GOTPAGEOFF]
LBB0_5:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_il_set_bit
LBB0_6:
Lloh20:
	adrp	x8, _EEPROM_SKU_CAP_OP_MODE_MRC@GOTPAGE
Lloh21:
	ldr	x8, [x8, _EEPROM_SKU_CAP_OP_MODE_MRC@GOTPAGEOFF]
Lloh22:
	ldr	w8, [x8]
	ldr	w9, [x20]
	cmp	w8, w9
	b.ne	LBB0_8
; %bb.7:
Lloh23:
	adrp	x0, l_.str.4@PAGE
Lloh24:
	add	x0, x0, l_.str.4@PAGEOFF
	bl	_D_INFO
	ldr	w1, [x21]
Lloh25:
	adrp	x8, _CSR39_HW_IF_CONFIG_REG_BIT_SKU_MRC@GOTPAGE
Lloh26:
	ldr	x8, [x8, _CSR39_HW_IF_CONFIG_REG_BIT_SKU_MRC@GOTPAGEOFF]
Lloh27:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_il_set_bit
	b	LBB0_9
LBB0_8:
Lloh28:
	adrp	x0, l_.str.5@PAGE
Lloh29:
	add	x0, x0, l_.str.5@PAGEOFF
	bl	_D_INFO
LBB0_9:
	ldr	w8, [x20, #4]
	and	w22, w8, #0xf0
	str	x8, [sp]
Lloh30:
	adrp	x0, l_.str.6@PAGE
Lloh31:
	add	x0, x0, l_.str.6@PAGEOFF
	bl	_D_INFO
	ldr	w1, [x21]
Lloh32:
	adrp	x8, _CSR39_HW_IF_CONFIG_REG_BIT_BOARD_TYPE@GOTPAGE
Lloh33:
	ldr	x8, [x8, _CSR39_HW_IF_CONFIG_REG_BIT_BOARD_TYPE@GOTPAGEOFF]
Lloh34:
	ldr	w2, [x8]
	mov	x0, x19
	cmp	w22, #208
	b.ne	LBB0_11
; %bb.10:
	bl	_il_set_bit
	b	LBB0_12
LBB0_11:
	bl	_il_clear_bit
LBB0_12:
	ldr	w8, [x20, #8]
	cmp	w8, #1
	b.gt	LBB0_14
; %bb.13:
	ldr	w1, [x21]
Lloh35:
	adrp	x8, _CSR39_HW_IF_CONFIG_REG_BITS_SILICON_TYPE_A@GOTPAGE
Lloh36:
	ldr	x8, [x8, _CSR39_HW_IF_CONFIG_REG_BITS_SILICON_TYPE_A@GOTPAGEOFF]
Lloh37:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_il_set_bit
	ldr	w8, [x20, #8]
	str	x8, [sp]
Lloh38:
	adrp	x0, l_.str.7@PAGE
Lloh39:
	add	x0, x0, l_.str.7@PAGEOFF
	bl	_D_INFO
	b	LBB0_15
LBB0_14:
	str	x8, [sp]
Lloh40:
	adrp	x0, l_.str.8@PAGE
Lloh41:
	add	x0, x0, l_.str.8@PAGEOFF
	bl	_D_INFO
	ldr	w1, [x21]
Lloh42:
	adrp	x8, _CSR39_HW_IF_CONFIG_REG_BITS_SILICON_TYPE_B@GOTPAGE
Lloh43:
	ldr	x8, [x8, _CSR39_HW_IF_CONFIG_REG_BITS_SILICON_TYPE_B@GOTPAGEOFF]
Lloh44:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_il_set_bit
LBB0_15:
	mov	x0, x19
	bl	_spin_unlock_irqrestore
	ldr	w8, [x20]
Lloh45:
	adrp	x9, _EEPROM_SKU_CAP_SW_RF_KILL_ENABLE@GOTPAGE
Lloh46:
	ldr	x9, [x9, _EEPROM_SKU_CAP_SW_RF_KILL_ENABLE@GOTPAGEOFF]
Lloh47:
	ldr	w9, [x9]
	tst	w9, w8
	b.eq	LBB0_17
; %bb.16:
Lloh48:
	adrp	x0, l_.str.9@PAGE
Lloh49:
	add	x0, x0, l_.str.9@PAGEOFF
	bl	_D_RF_KILL
	ldr	w8, [x20]
LBB0_17:
Lloh50:
	adrp	x9, _EEPROM_SKU_CAP_HW_RF_KILL_ENABLE@GOTPAGE
Lloh51:
	ldr	x9, [x9, _EEPROM_SKU_CAP_HW_RF_KILL_ENABLE@GOTPAGEOFF]
Lloh52:
	ldr	w9, [x9]
	tst	w9, w8
	b.eq	LBB0_19
; %bb.18:
Lloh53:
	adrp	x0, l_.str.10@PAGE
Lloh54:
	add	x0, x0, l_.str.10@PAGEOFF
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #64
	b	_D_RF_KILL
LBB0_19:
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #64
	ret
	.loh AdrpLdrGot	Lloh5, Lloh6
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpAdd	Lloh0, Lloh1
	.loh AdrpAdd	Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGot	Lloh14, Lloh15
	.loh AdrpAdd	Lloh12, Lloh13
	.loh AdrpLdrGot	Lloh18, Lloh19
	.loh AdrpAdd	Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh20, Lloh21, Lloh22
	.loh AdrpLdrGotLdr	Lloh25, Lloh26, Lloh27
	.loh AdrpAdd	Lloh23, Lloh24
	.loh AdrpAdd	Lloh28, Lloh29
	.loh AdrpLdrGotLdr	Lloh32, Lloh33, Lloh34
	.loh AdrpAdd	Lloh30, Lloh31
	.loh AdrpAdd	Lloh38, Lloh39
	.loh AdrpLdrGotLdr	Lloh35, Lloh36, Lloh37
	.loh AdrpLdrGotLdr	Lloh42, Lloh43, Lloh44
	.loh AdrpAdd	Lloh40, Lloh41
	.loh AdrpLdrGotLdr	Lloh45, Lloh46, Lloh47
	.loh AdrpAdd	Lloh48, Lloh49
	.loh AdrpLdrGotLdr	Lloh50, Lloh51, Lloh52
	.loh AdrpAdd	Lloh53, Lloh54
	.cfi_endproc
                                        ; -- End function
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"HW Revision ID = 0x%X\n"

	.comm	_PCI_CFG_REV_ID_BIT_RTP,4,2     ; @PCI_CFG_REV_ID_BIT_RTP
l_.str.1:                               ; @.str.1
	.asciz	"RTP type\n"

	.comm	_PCI_CFG_REV_ID_BIT_BASIC_SKU,4,2 ; @PCI_CFG_REV_ID_BIT_BASIC_SKU
l_.str.2:                               ; @.str.2
	.asciz	"3945 RADIO-MB type\n"

	.comm	_CSR_HW_IF_CONFIG_REG,4,2       ; @CSR_HW_IF_CONFIG_REG
	.comm	_CSR39_HW_IF_CONFIG_REG_BIT_3945_MB,4,2 ; @CSR39_HW_IF_CONFIG_REG_BIT_3945_MB
l_.str.3:                               ; @.str.3
	.asciz	"3945 RADIO-MM type\n"

	.comm	_CSR39_HW_IF_CONFIG_REG_BIT_3945_MM,4,2 ; @CSR39_HW_IF_CONFIG_REG_BIT_3945_MM
	.comm	_EEPROM_SKU_CAP_OP_MODE_MRC,4,2 ; @EEPROM_SKU_CAP_OP_MODE_MRC
l_.str.4:                               ; @.str.4
	.asciz	"SKU OP mode is mrc\n"

	.comm	_CSR39_HW_IF_CONFIG_REG_BIT_SKU_MRC,4,2 ; @CSR39_HW_IF_CONFIG_REG_BIT_SKU_MRC
l_.str.5:                               ; @.str.5
	.asciz	"SKU OP mode is basic\n"

l_.str.6:                               ; @.str.6
	.asciz	"3945ABG revision is 0x%X\n"

	.comm	_CSR39_HW_IF_CONFIG_REG_BIT_BOARD_TYPE,4,2 ; @CSR39_HW_IF_CONFIG_REG_BIT_BOARD_TYPE
	.comm	_CSR39_HW_IF_CONFIG_REG_BITS_SILICON_TYPE_A,4,2 ; @CSR39_HW_IF_CONFIG_REG_BITS_SILICON_TYPE_A
l_.str.7:                               ; @.str.7
	.asciz	"Card M type A version is 0x%X\n"

l_.str.8:                               ; @.str.8
	.asciz	"Card M type B version is 0x%X\n"

	.comm	_CSR39_HW_IF_CONFIG_REG_BITS_SILICON_TYPE_B,4,2 ; @CSR39_HW_IF_CONFIG_REG_BITS_SILICON_TYPE_B
	.comm	_EEPROM_SKU_CAP_SW_RF_KILL_ENABLE,4,2 ; @EEPROM_SKU_CAP_SW_RF_KILL_ENABLE
l_.str.9:                               ; @.str.9
	.asciz	"SW RF KILL supported in EEPROM.\n"

	.comm	_EEPROM_SKU_CAP_HW_RF_KILL_ENABLE,4,2 ; @EEPROM_SKU_CAP_HW_RF_KILL_ENABLE
l_.str.10:                              ; @.str.10
	.asciz	"HW RF KILL supported in EEPROM.\n"

	.no_dead_strip	_il3945_nic_config
.subsections_via_symbols
