	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function b43_nphy_workarounds_rev1_2
_b43_nphy_workarounds_rev1_2:           ## @b43_nphy_workarounds_rev1_2
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r14
	pushq	%rbx
	subq	$144, %rsp
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	movq	%rdi, %rbx
	movq	___stack_chk_guard@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	movq	%rax, -24(%rbp)
	movq	8(%rdi), %r14
	movq	24(%rdi), %rax
	movq	8(%rax), %rcx
	movups	l___const.b43_nphy_workarounds_rev1_2.events1+12(%rip), %xmm0
	movups	%xmm0, -52(%rbp)
	movaps	l___const.b43_nphy_workarounds_rev1_2.events1(%rip), %xmm0
	movaps	%xmm0, -64(%rbp)
	movups	l___const.b43_nphy_workarounds_rev1_2.delays1+12(%rip), %xmm0
	movups	%xmm0, -84(%rbp)
	movaps	l___const.b43_nphy_workarounds_rev1_2.delays1(%rip), %xmm0
	movaps	%xmm0, -96(%rbp)
	movups	l___const.b43_nphy_workarounds_rev1_2.events2+12(%rip), %xmm0
	movups	%xmm0, -116(%rbp)
	movaps	l___const.b43_nphy_workarounds_rev1_2.events2(%rip), %xmm0
	movaps	%xmm0, -128(%rbp)
	movups	l___const.b43_nphy_workarounds_rev1_2.delays2+12(%rip), %xmm0
	movups	%xmm0, -148(%rbp)
	movaps	l___const.b43_nphy_workarounds_rev1_2.delays2(%rip), %xmm0
	movaps	%xmm0, -160(%rbp)
	movq	_B43_BFL2_SKWRKFEM_BRD@GOTPCREL(%rip), %rdx
	movl	(%rdx), %edx
	testl	%edx, (%rcx)
	jne	LBB0_2
## %bb.1:
	movq	(%rax), %rax
	movq	_BCMA_BOARD_TYPE_BCM943224M93@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jne	LBB0_3
LBB0_2:
	movl	$1, -96(%rbp)
	movl	$20, -76(%rbp)
LBB0_3:
	movl	16(%rbx), %edi
	callq	_b43_current_band
	movq	_NL80211_BAND_5GHZ@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jne	LBB0_6
## %bb.4:
	cmpq	$0, (%r14)
	je	LBB0_6
## %bb.5:
	movq	_B2055_C1_TX_RF_SPARE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	movl	$-9, %edx
	callq	_b43_radio_mask
	movq	_B2055_C2_TX_RF_SPARE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	movl	$-9, %edx
	callq	_b43_radio_mask
	jmp	LBB0_7
LBB0_6:
	movq	_B2055_C1_TX_RF_SPARE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	movl	$8, %edx
	callq	_b43_radio_set
	movq	_B2055_C2_TX_RF_SPARE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	movl	$8, %edx
	callq	_b43_radio_set
LBB0_7:
	movl	$8, %edi
	xorl	%esi, %esi
	callq	_B43_NTAB16
	movq	%rbx, %rdi
	movl	%eax, %esi
	movl	$10, %edx
	callq	_b43_ntab_write
	movl	$8, %edi
	movl	$16, %esi
	callq	_B43_NTAB16
	movq	%rbx, %rdi
	movl	%eax, %esi
	movl	$10, %edx
	callq	_b43_ntab_write
	cmpl	$2, (%rbx)
	jg	LBB0_10
## %bb.8:
	movl	$8, %edi
	movl	$2, %esi
	callq	_B43_NTAB16
	movq	%rbx, %rdi
	movl	%eax, %esi
	movl	$52650, %edx                    ## imm = 0xCDAA
	callq	_b43_ntab_write
	movl	$8, %edi
	movl	$18, %esi
	callq	_B43_NTAB16
	movq	%rbx, %rdi
	movl	%eax, %esi
	movl	$52650, %edx                    ## imm = 0xCDAA
	callq	_b43_ntab_write
	cmpl	$1, (%rbx)
	jg	LBB0_10
## %bb.9:
	movl	$8, %edi
	movl	$8, %esi
	callq	_B43_NTAB16
	movq	%rbx, %rdi
	movl	%eax, %esi
	xorl	%edx, %edx
	callq	_b43_ntab_write
	movl	$8, %edi
	movl	$24, %esi
	callq	_B43_NTAB16
	movq	%rbx, %rdi
	movl	%eax, %esi
	xorl	%edx, %edx
	callq	_b43_ntab_write
	movl	$8, %edi
	movl	$7, %esi
	callq	_B43_NTAB16
	movq	%rbx, %rdi
	movl	%eax, %esi
	movl	$31403, %edx                    ## imm = 0x7AAB
	callq	_b43_ntab_write
	movl	$8, %edi
	movl	$23, %esi
	callq	_B43_NTAB16
	movq	%rbx, %rdi
	movl	%eax, %esi
	movl	$31403, %edx                    ## imm = 0x7AAB
	callq	_b43_ntab_write
	movl	$8, %edi
	movl	$6, %esi
	callq	_B43_NTAB16
	movq	%rbx, %rdi
	movl	%eax, %esi
	movl	$2048, %edx                     ## imm = 0x800
	callq	_b43_ntab_write
	movl	$8, %edi
	movl	$22, %esi
	callq	_B43_NTAB16
	movq	%rbx, %rdi
	movl	%eax, %esi
	movl	$2048, %edx                     ## imm = 0x800
	callq	_b43_ntab_write
LBB0_10:
	movq	_B43_NPHY_RFCTL_LUT_TRSW_LO1@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	movl	$728, %edx                      ## imm = 0x2D8
	callq	_b43_phy_write
	movq	_B43_NPHY_RFCTL_LUT_TRSW_UP1@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	movl	$769, %edx                      ## imm = 0x301
	callq	_b43_phy_write
	movq	_B43_NPHY_RFCTL_LUT_TRSW_LO2@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	movl	$728, %edx                      ## imm = 0x2D8
	callq	_b43_phy_write
	movq	_B43_NPHY_RFCTL_LUT_TRSW_UP2@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	movl	$769, %edx                      ## imm = 0x301
	callq	_b43_phy_write
	leaq	-64(%rbp), %rdx
	leaq	-96(%rbp), %rcx
	movq	%rbx, %rdi
	xorl	%esi, %esi
	movl	$7, %r8d
	callq	_b43_nphy_set_rf_sequence
	leaq	-128(%rbp), %rdx
	leaq	-160(%rbp), %rcx
	movq	%rbx, %rdi
	movl	$1, %esi
	movl	$7, %r8d
	callq	_b43_nphy_set_rf_sequence
	movq	%rbx, %rdi
	callq	_b43_nphy_gain_ctl_workarounds
	movl	(%rbx), %eax
	cmpl	$1, %eax
	jg	LBB0_13
## %bb.11:
	movq	_B43_NPHY_RXCTL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_b43_phy_read
	testb	$2, %al
	je	LBB0_15
## %bb.12:
	movq	%rbx, %rdi
	callq	_b43_hf_read
	movq	_B43_HF_MLADVW@GOTPCREL(%rip), %rcx
	orl	(%rcx), %eax
	movq	%rbx, %rdi
	movl	%eax, %esi
	callq	_b43_hf_write
LBB0_15:
	cmpl	$1, (%rbx)
	jle	LBB0_16
	jmp	LBB0_17
LBB0_13:
	cmpl	$2, %eax
	jne	LBB0_17
## %bb.14:
	movq	_B43_NPHY_CRSCHECK2@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	xorl	%edx, %edx
	callq	_b43_phy_write
	movq	_B43_NPHY_CRSCHECK3@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	xorl	%edx, %edx
	callq	_b43_phy_write
	cmpl	$1, (%rbx)
	jg	LBB0_17
LBB0_16:
	movq	_B43_NPHY_SCRAM_SIGCTL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_B43_NPHY_SCRAM_SIGCTL_SCM@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	notl	%edx
	movq	%rbx, %rdi
	callq	_b43_phy_mask
LBB0_17:
	movq	_B43_NPHY_PHASETR_A0@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	movl	$293, %edx                      ## imm = 0x125
	callq	_b43_phy_write
	movq	_B43_NPHY_PHASETR_A1@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	movl	$435, %edx                      ## imm = 0x1B3
	callq	_b43_phy_write
	movq	_B43_NPHY_PHASETR_A2@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	movl	$261, %edx                      ## imm = 0x105
	callq	_b43_phy_write
	movq	_B43_NPHY_PHASETR_B0@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	movl	$366, %edx                      ## imm = 0x16E
	callq	_b43_phy_write
	movq	_B43_NPHY_PHASETR_B1@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	movl	$205, %edx
	callq	_b43_phy_write
	movq	_B43_NPHY_PHASETR_B2@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	movl	$32, %edx
	callq	_b43_phy_write
	cmpl	$2, (%rbx)
	jg	LBB0_20
## %bb.18:
	movq	_B43_NPHY_PIL_DW1@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_B43_NPHY_PIL_DW_64QAM@GOTPCREL(%rip), %rax
	movzwl	(%rax), %edx
	xorl	$65535, %edx                    ## imm = 0xFFFF
	movq	%rbx, %rdi
	callq	_b43_phy_mask
	movq	_B43_NPHY_TXF_20CO_S2B1@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	movl	$181, %edx
	callq	_b43_phy_write
	movq	_B43_NPHY_TXF_20CO_S2B2@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	movl	$164, %edx
	callq	_b43_phy_write
	movq	_B43_NPHY_TXF_20CO_S2B3@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	xorl	%edx, %edx
	callq	_b43_phy_write
	cmpl	$2, (%rbx)
	jne	LBB0_20
## %bb.19:
	movq	_B43_NPHY_FINERX2_CGC@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_B43_NPHY_FINERX2_CGC_DECGC@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	callq	_b43_phy_set
LBB0_20:
	movq	___stack_chk_guard@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	cmpq	-24(%rbp), %rax
	jne	LBB0_22
## %bb.21:
	addq	$144, %rsp
	popq	%rbx
	popq	%r14
	popq	%rbp
	retq
LBB0_22:
	callq	___stack_chk_fail
	.cfi_endproc
                                        ## -- End function
	.section	__TEXT,__const
	.p2align	4                               ## @__const.b43_nphy_workarounds_rev1_2.events1
l___const.b43_nphy_workarounds_rev1_2.events1:
	.long	0                               ## 0x0
	.long	1                               ## 0x1
	.long	2                               ## 0x2
	.long	8                               ## 0x8
	.long	4                               ## 0x4
	.long	5                               ## 0x5
	.long	3                               ## 0x3

	.p2align	4                               ## @__const.b43_nphy_workarounds_rev1_2.delays1
l___const.b43_nphy_workarounds_rev1_2.delays1:
	.long	8                               ## 0x8
	.long	6                               ## 0x6
	.long	6                               ## 0x6
	.long	2                               ## 0x2
	.long	4                               ## 0x4
	.long	60                              ## 0x3c
	.long	1                               ## 0x1

	.p2align	4                               ## @__const.b43_nphy_workarounds_rev1_2.events2
l___const.b43_nphy_workarounds_rev1_2.events2:
	.long	0                               ## 0x0
	.long	3                               ## 0x3
	.long	5                               ## 0x5
	.long	4                               ## 0x4
	.long	2                               ## 0x2
	.long	1                               ## 0x1
	.long	8                               ## 0x8

	.p2align	4                               ## @__const.b43_nphy_workarounds_rev1_2.delays2
l___const.b43_nphy_workarounds_rev1_2.delays2:
	.long	8                               ## 0x8
	.long	6                               ## 0x6
	.long	2                               ## 0x2
	.long	4                               ## 0x4
	.long	4                               ## 0x4
	.long	6                               ## 0x6
	.long	1                               ## 0x1

	.comm	_B43_BFL2_SKWRKFEM_BRD,4,2      ## @B43_BFL2_SKWRKFEM_BRD
	.comm	_BCMA_BOARD_TYPE_BCM943224M93,8,3 ## @BCMA_BOARD_TYPE_BCM943224M93
	.comm	_NL80211_BAND_5GHZ,8,3          ## @NL80211_BAND_5GHZ
	.comm	_B2055_C1_TX_RF_SPARE,4,2       ## @B2055_C1_TX_RF_SPARE
	.comm	_B2055_C2_TX_RF_SPARE,4,2       ## @B2055_C2_TX_RF_SPARE
	.comm	_B43_NPHY_RFCTL_LUT_TRSW_LO1,4,2 ## @B43_NPHY_RFCTL_LUT_TRSW_LO1
	.comm	_B43_NPHY_RFCTL_LUT_TRSW_UP1,4,2 ## @B43_NPHY_RFCTL_LUT_TRSW_UP1
	.comm	_B43_NPHY_RFCTL_LUT_TRSW_LO2,4,2 ## @B43_NPHY_RFCTL_LUT_TRSW_LO2
	.comm	_B43_NPHY_RFCTL_LUT_TRSW_UP2,4,2 ## @B43_NPHY_RFCTL_LUT_TRSW_UP2
	.comm	_B43_NPHY_RXCTL,4,2             ## @B43_NPHY_RXCTL
	.comm	_B43_HF_MLADVW,4,2              ## @B43_HF_MLADVW
	.comm	_B43_NPHY_CRSCHECK2,4,2         ## @B43_NPHY_CRSCHECK2
	.comm	_B43_NPHY_CRSCHECK3,4,2         ## @B43_NPHY_CRSCHECK3
	.comm	_B43_NPHY_SCRAM_SIGCTL,4,2      ## @B43_NPHY_SCRAM_SIGCTL
	.comm	_B43_NPHY_SCRAM_SIGCTL_SCM,4,2  ## @B43_NPHY_SCRAM_SIGCTL_SCM
	.comm	_B43_NPHY_PHASETR_A0,4,2        ## @B43_NPHY_PHASETR_A0
	.comm	_B43_NPHY_PHASETR_A1,4,2        ## @B43_NPHY_PHASETR_A1
	.comm	_B43_NPHY_PHASETR_A2,4,2        ## @B43_NPHY_PHASETR_A2
	.comm	_B43_NPHY_PHASETR_B0,4,2        ## @B43_NPHY_PHASETR_B0
	.comm	_B43_NPHY_PHASETR_B1,4,2        ## @B43_NPHY_PHASETR_B1
	.comm	_B43_NPHY_PHASETR_B2,4,2        ## @B43_NPHY_PHASETR_B2
	.comm	_B43_NPHY_PIL_DW1,4,2           ## @B43_NPHY_PIL_DW1
	.comm	_B43_NPHY_PIL_DW_64QAM,4,2      ## @B43_NPHY_PIL_DW_64QAM
	.comm	_B43_NPHY_TXF_20CO_S2B1,4,2     ## @B43_NPHY_TXF_20CO_S2B1
	.comm	_B43_NPHY_TXF_20CO_S2B2,4,2     ## @B43_NPHY_TXF_20CO_S2B2
	.comm	_B43_NPHY_TXF_20CO_S2B3,4,2     ## @B43_NPHY_TXF_20CO_S2B3
	.comm	_B43_NPHY_FINERX2_CGC,4,2       ## @B43_NPHY_FINERX2_CGC
	.comm	_B43_NPHY_FINERX2_CGC_DECGC,4,2 ## @B43_NPHY_FINERX2_CGC_DECGC
	.no_dead_strip	_b43_nphy_workarounds_rev1_2
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function b43_nphy_workarounds_rev1_2
_b43_nphy_workarounds_rev1_2:           ; @b43_nphy_workarounds_rev1_2
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #176
	.cfi_def_cfa_offset 176
	stp	x20, x19, [sp, #144]            ; 16-byte Folded Spill
	stp	x29, x30, [sp, #160]            ; 16-byte Folded Spill
	add	x29, sp, #160
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x19, x0
Lloh0:
	adrp	x8, ___stack_chk_guard@GOTPAGE
Lloh1:
	ldr	x8, [x8, ___stack_chk_guard@GOTPAGEOFF]
Lloh2:
	ldr	x8, [x8]
	stur	x8, [x29, #-24]
	ldr	x8, [x0, #24]
	ldr	x9, [x8, #8]
	ldr	x20, [x0, #8]
Lloh3:
	adrp	x10, l___const.b43_nphy_workarounds_rev1_2.events1@PAGE
Lloh4:
	add	x10, x10, l___const.b43_nphy_workarounds_rev1_2.events1@PAGEOFF
	ldr	q0, [x10]
	stur	q0, [x29, #-64]
	ldur	q0, [x10, #12]
	stur	q0, [x29, #-52]
Lloh5:
	adrp	x10, l___const.b43_nphy_workarounds_rev1_2.delays1@PAGE
Lloh6:
	add	x10, x10, l___const.b43_nphy_workarounds_rev1_2.delays1@PAGEOFF
	ldr	q0, [x10]
	str	q0, [sp, #64]
	ldur	q0, [x10, #12]
	stur	q0, [sp, #76]
Lloh7:
	adrp	x10, l___const.b43_nphy_workarounds_rev1_2.events2@PAGE
Lloh8:
	add	x10, x10, l___const.b43_nphy_workarounds_rev1_2.events2@PAGEOFF
	ldr	q0, [x10]
	str	q0, [sp, #32]
	ldur	q0, [x10, #12]
	stur	q0, [sp, #44]
Lloh9:
	adrp	x10, l___const.b43_nphy_workarounds_rev1_2.delays2@PAGE
Lloh10:
	add	x10, x10, l___const.b43_nphy_workarounds_rev1_2.delays2@PAGEOFF
	ldr	q0, [x10]
	str	q0, [sp]
	ldur	q0, [x10, #12]
	stur	q0, [sp, #12]
	ldr	w9, [x9]
Lloh11:
	adrp	x10, _B43_BFL2_SKWRKFEM_BRD@GOTPAGE
Lloh12:
	ldr	x10, [x10, _B43_BFL2_SKWRKFEM_BRD@GOTPAGEOFF]
Lloh13:
	ldr	w10, [x10]
	tst	w10, w9
	b.ne	LBB0_2
; %bb.1:
	ldr	x8, [x8]
Lloh14:
	adrp	x9, _BCMA_BOARD_TYPE_BCM943224M93@GOTPAGE
Lloh15:
	ldr	x9, [x9, _BCMA_BOARD_TYPE_BCM943224M93@GOTPAGEOFF]
Lloh16:
	ldr	x9, [x9]
	cmp	x8, x9
	b.ne	LBB0_3
LBB0_2:
	mov	w8, #1
	mov	w9, #20
	str	w8, [sp, #64]
	str	w9, [sp, #84]
LBB0_3:
	ldr	w0, [x19, #16]
	bl	_b43_current_band
Lloh17:
	adrp	x8, _NL80211_BAND_5GHZ@GOTPAGE
Lloh18:
	ldr	x8, [x8, _NL80211_BAND_5GHZ@GOTPAGEOFF]
Lloh19:
	ldr	x8, [x8]
	cmp	x0, x8
	b.ne	LBB0_6
; %bb.4:
	ldr	x8, [x20]
	cbz	x8, LBB0_6
; %bb.5:
Lloh20:
	adrp	x8, _B2055_C1_TX_RF_SPARE@GOTPAGE
Lloh21:
	ldr	x8, [x8, _B2055_C1_TX_RF_SPARE@GOTPAGEOFF]
Lloh22:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #-9
	bl	_b43_radio_mask
Lloh23:
	adrp	x8, _B2055_C2_TX_RF_SPARE@GOTPAGE
Lloh24:
	ldr	x8, [x8, _B2055_C2_TX_RF_SPARE@GOTPAGEOFF]
Lloh25:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #-9
	bl	_b43_radio_mask
	b	LBB0_7
LBB0_6:
Lloh26:
	adrp	x8, _B2055_C1_TX_RF_SPARE@GOTPAGE
Lloh27:
	ldr	x8, [x8, _B2055_C1_TX_RF_SPARE@GOTPAGEOFF]
Lloh28:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #8
	bl	_b43_radio_set
Lloh29:
	adrp	x8, _B2055_C2_TX_RF_SPARE@GOTPAGE
Lloh30:
	ldr	x8, [x8, _B2055_C2_TX_RF_SPARE@GOTPAGEOFF]
Lloh31:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #8
	bl	_b43_radio_set
LBB0_7:
	mov	w0, #8
	mov	w1, #0
	bl	_B43_NTAB16
	mov	x1, x0
	mov	x0, x19
	mov	w2, #10
	bl	_b43_ntab_write
	mov	w0, #8
	mov	w1, #16
	bl	_B43_NTAB16
	mov	x1, x0
	mov	x0, x19
	mov	w2, #10
	bl	_b43_ntab_write
	ldr	w8, [x19]
	cmp	w8, #2
	b.gt	LBB0_10
; %bb.8:
	mov	w0, #8
	mov	w1, #2
	bl	_B43_NTAB16
	mov	x1, x0
	mov	x0, x19
	mov	w2, #52650
	bl	_b43_ntab_write
	mov	w0, #8
	mov	w1, #18
	bl	_B43_NTAB16
	mov	x1, x0
	mov	x0, x19
	mov	w2, #52650
	bl	_b43_ntab_write
	ldr	w8, [x19]
	cmp	w8, #1
	b.gt	LBB0_10
; %bb.9:
	mov	w0, #8
	mov	w1, #8
	bl	_B43_NTAB16
	mov	x1, x0
	mov	x0, x19
	mov	w2, #0
	bl	_b43_ntab_write
	mov	w0, #8
	mov	w1, #24
	bl	_B43_NTAB16
	mov	x1, x0
	mov	x0, x19
	mov	w2, #0
	bl	_b43_ntab_write
	mov	w0, #8
	mov	w1, #7
	bl	_B43_NTAB16
	mov	x1, x0
	mov	x0, x19
	mov	w2, #31403
	bl	_b43_ntab_write
	mov	w0, #8
	mov	w1, #23
	bl	_B43_NTAB16
	mov	x1, x0
	mov	x0, x19
	mov	w2, #31403
	bl	_b43_ntab_write
	mov	w0, #8
	mov	w1, #6
	bl	_B43_NTAB16
	mov	x1, x0
	mov	x0, x19
	mov	w2, #2048
	bl	_b43_ntab_write
	mov	w0, #8
	mov	w1, #22
	bl	_B43_NTAB16
	mov	x1, x0
	mov	x0, x19
	mov	w2, #2048
	bl	_b43_ntab_write
LBB0_10:
Lloh32:
	adrp	x8, _B43_NPHY_RFCTL_LUT_TRSW_LO1@GOTPAGE
Lloh33:
	ldr	x8, [x8, _B43_NPHY_RFCTL_LUT_TRSW_LO1@GOTPAGEOFF]
Lloh34:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #728
	bl	_b43_phy_write
Lloh35:
	adrp	x8, _B43_NPHY_RFCTL_LUT_TRSW_UP1@GOTPAGE
Lloh36:
	ldr	x8, [x8, _B43_NPHY_RFCTL_LUT_TRSW_UP1@GOTPAGEOFF]
Lloh37:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #769
	bl	_b43_phy_write
Lloh38:
	adrp	x8, _B43_NPHY_RFCTL_LUT_TRSW_LO2@GOTPAGE
Lloh39:
	ldr	x8, [x8, _B43_NPHY_RFCTL_LUT_TRSW_LO2@GOTPAGEOFF]
Lloh40:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #728
	bl	_b43_phy_write
Lloh41:
	adrp	x8, _B43_NPHY_RFCTL_LUT_TRSW_UP2@GOTPAGE
Lloh42:
	ldr	x8, [x8, _B43_NPHY_RFCTL_LUT_TRSW_UP2@GOTPAGEOFF]
Lloh43:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #769
	bl	_b43_phy_write
	sub	x2, x29, #64
	add	x3, sp, #64
	mov	x0, x19
	mov	w1, #0
	mov	w4, #7
	bl	_b43_nphy_set_rf_sequence
	add	x2, sp, #32
	mov	x3, sp
	mov	x0, x19
	mov	w1, #1
	mov	w4, #7
	bl	_b43_nphy_set_rf_sequence
	mov	x0, x19
	bl	_b43_nphy_gain_ctl_workarounds
	ldr	w8, [x19]
	cmp	w8, #2
	b.ge	LBB0_13
; %bb.11:
Lloh44:
	adrp	x8, _B43_NPHY_RXCTL@GOTPAGE
Lloh45:
	ldr	x8, [x8, _B43_NPHY_RXCTL@GOTPAGEOFF]
Lloh46:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_b43_phy_read
	tbz	w0, #1, LBB0_15
; %bb.12:
	mov	x0, x19
	bl	_b43_hf_read
Lloh47:
	adrp	x8, _B43_HF_MLADVW@GOTPAGE
Lloh48:
	ldr	x8, [x8, _B43_HF_MLADVW@GOTPAGEOFF]
Lloh49:
	ldr	w8, [x8]
	orr	w1, w8, w0
	mov	x0, x19
	bl	_b43_hf_write
	b	LBB0_15
LBB0_13:
	b.ne	LBB0_17
; %bb.14:
Lloh50:
	adrp	x8, _B43_NPHY_CRSCHECK2@GOTPAGE
Lloh51:
	ldr	x8, [x8, _B43_NPHY_CRSCHECK2@GOTPAGEOFF]
Lloh52:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #0
	bl	_b43_phy_write
Lloh53:
	adrp	x8, _B43_NPHY_CRSCHECK3@GOTPAGE
Lloh54:
	ldr	x8, [x8, _B43_NPHY_CRSCHECK3@GOTPAGEOFF]
Lloh55:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #0
	bl	_b43_phy_write
LBB0_15:
	ldr	w8, [x19]
	cmp	w8, #2
	b.ge	LBB0_17
; %bb.16:
Lloh56:
	adrp	x8, _B43_NPHY_SCRAM_SIGCTL@GOTPAGE
Lloh57:
	ldr	x8, [x8, _B43_NPHY_SCRAM_SIGCTL@GOTPAGEOFF]
Lloh58:
	ldr	w1, [x8]
Lloh59:
	adrp	x8, _B43_NPHY_SCRAM_SIGCTL_SCM@GOTPAGE
Lloh60:
	ldr	x8, [x8, _B43_NPHY_SCRAM_SIGCTL_SCM@GOTPAGEOFF]
Lloh61:
	ldr	w8, [x8]
	mvn	w2, w8
	mov	x0, x19
	bl	_b43_phy_mask
LBB0_17:
Lloh62:
	adrp	x8, _B43_NPHY_PHASETR_A0@GOTPAGE
Lloh63:
	ldr	x8, [x8, _B43_NPHY_PHASETR_A0@GOTPAGEOFF]
Lloh64:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #293
	bl	_b43_phy_write
Lloh65:
	adrp	x8, _B43_NPHY_PHASETR_A1@GOTPAGE
Lloh66:
	ldr	x8, [x8, _B43_NPHY_PHASETR_A1@GOTPAGEOFF]
Lloh67:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #435
	bl	_b43_phy_write
Lloh68:
	adrp	x8, _B43_NPHY_PHASETR_A2@GOTPAGE
Lloh69:
	ldr	x8, [x8, _B43_NPHY_PHASETR_A2@GOTPAGEOFF]
Lloh70:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #261
	bl	_b43_phy_write
Lloh71:
	adrp	x8, _B43_NPHY_PHASETR_B0@GOTPAGE
Lloh72:
	ldr	x8, [x8, _B43_NPHY_PHASETR_B0@GOTPAGEOFF]
Lloh73:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #366
	bl	_b43_phy_write
Lloh74:
	adrp	x8, _B43_NPHY_PHASETR_B1@GOTPAGE
Lloh75:
	ldr	x8, [x8, _B43_NPHY_PHASETR_B1@GOTPAGEOFF]
Lloh76:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #205
	bl	_b43_phy_write
Lloh77:
	adrp	x8, _B43_NPHY_PHASETR_B2@GOTPAGE
Lloh78:
	ldr	x8, [x8, _B43_NPHY_PHASETR_B2@GOTPAGEOFF]
Lloh79:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #32
	bl	_b43_phy_write
	ldr	w8, [x19]
	cmp	w8, #2
	b.gt	LBB0_20
; %bb.18:
Lloh80:
	adrp	x8, _B43_NPHY_PIL_DW1@GOTPAGE
Lloh81:
	ldr	x8, [x8, _B43_NPHY_PIL_DW1@GOTPAGEOFF]
Lloh82:
	ldr	w1, [x8]
Lloh83:
	adrp	x8, _B43_NPHY_PIL_DW_64QAM@GOTPAGE
Lloh84:
	ldr	x8, [x8, _B43_NPHY_PIL_DW_64QAM@GOTPAGEOFF]
	ldrh	w8, [x8]
	eor	w2, w8, #0xffff
	mov	x0, x19
	bl	_b43_phy_mask
Lloh85:
	adrp	x8, _B43_NPHY_TXF_20CO_S2B1@GOTPAGE
Lloh86:
	ldr	x8, [x8, _B43_NPHY_TXF_20CO_S2B1@GOTPAGEOFF]
Lloh87:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #181
	bl	_b43_phy_write
Lloh88:
	adrp	x8, _B43_NPHY_TXF_20CO_S2B2@GOTPAGE
Lloh89:
	ldr	x8, [x8, _B43_NPHY_TXF_20CO_S2B2@GOTPAGEOFF]
Lloh90:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #164
	bl	_b43_phy_write
Lloh91:
	adrp	x8, _B43_NPHY_TXF_20CO_S2B3@GOTPAGE
Lloh92:
	ldr	x8, [x8, _B43_NPHY_TXF_20CO_S2B3@GOTPAGEOFF]
Lloh93:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #0
	bl	_b43_phy_write
	ldr	w8, [x19]
	cmp	w8, #2
	b.ne	LBB0_20
; %bb.19:
Lloh94:
	adrp	x8, _B43_NPHY_FINERX2_CGC@GOTPAGE
Lloh95:
	ldr	x8, [x8, _B43_NPHY_FINERX2_CGC@GOTPAGEOFF]
Lloh96:
	ldr	w1, [x8]
Lloh97:
	adrp	x8, _B43_NPHY_FINERX2_CGC_DECGC@GOTPAGE
Lloh98:
	ldr	x8, [x8, _B43_NPHY_FINERX2_CGC_DECGC@GOTPAGEOFF]
Lloh99:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_b43_phy_set
LBB0_20:
	ldur	x8, [x29, #-24]
Lloh100:
	adrp	x9, ___stack_chk_guard@GOTPAGE
Lloh101:
	ldr	x9, [x9, ___stack_chk_guard@GOTPAGEOFF]
Lloh102:
	ldr	x9, [x9]
	cmp	x9, x8
	b.ne	LBB0_22
; %bb.21:
	ldp	x29, x30, [sp, #160]            ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #144]            ; 16-byte Folded Reload
	add	sp, sp, #176
	ret
LBB0_22:
	bl	___stack_chk_fail
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpAdd	Lloh9, Lloh10
	.loh AdrpAdd	Lloh7, Lloh8
	.loh AdrpAdd	Lloh5, Lloh6
	.loh AdrpAdd	Lloh3, Lloh4
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh16
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh19
	.loh AdrpLdrGotLdr	Lloh23, Lloh24, Lloh25
	.loh AdrpLdrGotLdr	Lloh20, Lloh21, Lloh22
	.loh AdrpLdrGotLdr	Lloh29, Lloh30, Lloh31
	.loh AdrpLdrGotLdr	Lloh26, Lloh27, Lloh28
	.loh AdrpLdrGotLdr	Lloh41, Lloh42, Lloh43
	.loh AdrpLdrGotLdr	Lloh38, Lloh39, Lloh40
	.loh AdrpLdrGotLdr	Lloh35, Lloh36, Lloh37
	.loh AdrpLdrGotLdr	Lloh32, Lloh33, Lloh34
	.loh AdrpLdrGotLdr	Lloh44, Lloh45, Lloh46
	.loh AdrpLdrGotLdr	Lloh47, Lloh48, Lloh49
	.loh AdrpLdrGotLdr	Lloh53, Lloh54, Lloh55
	.loh AdrpLdrGotLdr	Lloh50, Lloh51, Lloh52
	.loh AdrpLdrGotLdr	Lloh59, Lloh60, Lloh61
	.loh AdrpLdrGotLdr	Lloh56, Lloh57, Lloh58
	.loh AdrpLdrGotLdr	Lloh77, Lloh78, Lloh79
	.loh AdrpLdrGotLdr	Lloh74, Lloh75, Lloh76
	.loh AdrpLdrGotLdr	Lloh71, Lloh72, Lloh73
	.loh AdrpLdrGotLdr	Lloh68, Lloh69, Lloh70
	.loh AdrpLdrGotLdr	Lloh65, Lloh66, Lloh67
	.loh AdrpLdrGotLdr	Lloh62, Lloh63, Lloh64
	.loh AdrpLdrGotLdr	Lloh91, Lloh92, Lloh93
	.loh AdrpLdrGotLdr	Lloh88, Lloh89, Lloh90
	.loh AdrpLdrGotLdr	Lloh85, Lloh86, Lloh87
	.loh AdrpLdrGot	Lloh83, Lloh84
	.loh AdrpLdrGotLdr	Lloh80, Lloh81, Lloh82
	.loh AdrpLdrGotLdr	Lloh97, Lloh98, Lloh99
	.loh AdrpLdrGotLdr	Lloh94, Lloh95, Lloh96
	.loh AdrpLdrGotLdr	Lloh100, Lloh101, Lloh102
	.cfi_endproc
                                        ; -- End function
	.section	__TEXT,__const
	.p2align	2                               ; @__const.b43_nphy_workarounds_rev1_2.events1
l___const.b43_nphy_workarounds_rev1_2.events1:
	.long	0                               ; 0x0
	.long	1                               ; 0x1
	.long	2                               ; 0x2
	.long	8                               ; 0x8
	.long	4                               ; 0x4
	.long	5                               ; 0x5
	.long	3                               ; 0x3

	.p2align	2                               ; @__const.b43_nphy_workarounds_rev1_2.delays1
l___const.b43_nphy_workarounds_rev1_2.delays1:
	.long	8                               ; 0x8
	.long	6                               ; 0x6
	.long	6                               ; 0x6
	.long	2                               ; 0x2
	.long	4                               ; 0x4
	.long	60                              ; 0x3c
	.long	1                               ; 0x1

	.p2align	2                               ; @__const.b43_nphy_workarounds_rev1_2.events2
l___const.b43_nphy_workarounds_rev1_2.events2:
	.long	0                               ; 0x0
	.long	3                               ; 0x3
	.long	5                               ; 0x5
	.long	4                               ; 0x4
	.long	2                               ; 0x2
	.long	1                               ; 0x1
	.long	8                               ; 0x8

	.p2align	2                               ; @__const.b43_nphy_workarounds_rev1_2.delays2
l___const.b43_nphy_workarounds_rev1_2.delays2:
	.long	8                               ; 0x8
	.long	6                               ; 0x6
	.long	2                               ; 0x2
	.long	4                               ; 0x4
	.long	4                               ; 0x4
	.long	6                               ; 0x6
	.long	1                               ; 0x1

	.comm	_B43_BFL2_SKWRKFEM_BRD,4,2      ; @B43_BFL2_SKWRKFEM_BRD
	.comm	_BCMA_BOARD_TYPE_BCM943224M93,8,3 ; @BCMA_BOARD_TYPE_BCM943224M93
	.comm	_NL80211_BAND_5GHZ,8,3          ; @NL80211_BAND_5GHZ
	.comm	_B2055_C1_TX_RF_SPARE,4,2       ; @B2055_C1_TX_RF_SPARE
	.comm	_B2055_C2_TX_RF_SPARE,4,2       ; @B2055_C2_TX_RF_SPARE
	.comm	_B43_NPHY_RFCTL_LUT_TRSW_LO1,4,2 ; @B43_NPHY_RFCTL_LUT_TRSW_LO1
	.comm	_B43_NPHY_RFCTL_LUT_TRSW_UP1,4,2 ; @B43_NPHY_RFCTL_LUT_TRSW_UP1
	.comm	_B43_NPHY_RFCTL_LUT_TRSW_LO2,4,2 ; @B43_NPHY_RFCTL_LUT_TRSW_LO2
	.comm	_B43_NPHY_RFCTL_LUT_TRSW_UP2,4,2 ; @B43_NPHY_RFCTL_LUT_TRSW_UP2
	.comm	_B43_NPHY_RXCTL,4,2             ; @B43_NPHY_RXCTL
	.comm	_B43_HF_MLADVW,4,2              ; @B43_HF_MLADVW
	.comm	_B43_NPHY_CRSCHECK2,4,2         ; @B43_NPHY_CRSCHECK2
	.comm	_B43_NPHY_CRSCHECK3,4,2         ; @B43_NPHY_CRSCHECK3
	.comm	_B43_NPHY_SCRAM_SIGCTL,4,2      ; @B43_NPHY_SCRAM_SIGCTL
	.comm	_B43_NPHY_SCRAM_SIGCTL_SCM,4,2  ; @B43_NPHY_SCRAM_SIGCTL_SCM
	.comm	_B43_NPHY_PHASETR_A0,4,2        ; @B43_NPHY_PHASETR_A0
	.comm	_B43_NPHY_PHASETR_A1,4,2        ; @B43_NPHY_PHASETR_A1
	.comm	_B43_NPHY_PHASETR_A2,4,2        ; @B43_NPHY_PHASETR_A2
	.comm	_B43_NPHY_PHASETR_B0,4,2        ; @B43_NPHY_PHASETR_B0
	.comm	_B43_NPHY_PHASETR_B1,4,2        ; @B43_NPHY_PHASETR_B1
	.comm	_B43_NPHY_PHASETR_B2,4,2        ; @B43_NPHY_PHASETR_B2
	.comm	_B43_NPHY_PIL_DW1,4,2           ; @B43_NPHY_PIL_DW1
	.comm	_B43_NPHY_PIL_DW_64QAM,4,2      ; @B43_NPHY_PIL_DW_64QAM
	.comm	_B43_NPHY_TXF_20CO_S2B1,4,2     ; @B43_NPHY_TXF_20CO_S2B1
	.comm	_B43_NPHY_TXF_20CO_S2B2,4,2     ; @B43_NPHY_TXF_20CO_S2B2
	.comm	_B43_NPHY_TXF_20CO_S2B3,4,2     ; @B43_NPHY_TXF_20CO_S2B3
	.comm	_B43_NPHY_FINERX2_CGC,4,2       ; @B43_NPHY_FINERX2_CGC
	.comm	_B43_NPHY_FINERX2_CGC_DECGC,4,2 ; @B43_NPHY_FINERX2_CGC_DECGC
	.no_dead_strip	_b43_nphy_workarounds_rev1_2
.subsections_via_symbols
