	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_carl9170_set_channel           ## -- Begin function carl9170_set_channel
	.p2align	4, 0x90
_carl9170_set_channel:                  ## @carl9170_set_channel
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$88, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rsi, -48(%rbp)                 ## 8-byte Spill
	movq	%rdi, %r13
	movl	%edx, -68(%rbp)                 ## 4-byte Spill
	movl	%edx, %edi
	callq	_nl80211_to_carl
	movl	%eax, -56(%rbp)                 ## 4-byte Spill
	movq	24(%r13), %rdi
	addq	$4, %rdi
	callq	_conf_is_ht
	xorl	%ebx, %ebx
	movl	$0, %ecx
	testq	%rax, %rax
	je	LBB0_2
## %bb.1:
	movq	_CARL9170FW_PHY_HT_ENABLE@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
LBB0_2:
	movl	%ecx, -72(%rbp)                 ## 4-byte Spill
	movq	24(%r13), %rdi
	addq	$4, %rdi
	callq	_conf_is_ht40
	testq	%rax, %rax
	je	LBB0_4
## %bb.3:
	movq	_CARL9170FW_PHY_HT_DYN2040@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
LBB0_4:
	movl	%ebx, -52(%rbp)                 ## 4-byte Spill
	movq	16(%r13), %r15
	testq	%r15, %r15
	je	LBB0_6
## %bb.5:
	movq	$0, 16(%r13)
LBB0_6:
	movq	_AR9170_PWR_REG_RESET@GOTPCREL(%rip), %r12
	movl	(%r12), %esi
	movq	_AR9170_PWR_RESET_BB_COLD_RESET@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r13, %rdi
	callq	_carl9170_write_reg
	movl	%eax, %r14d
	testl	%eax, %eax
	jne	LBB0_41
## %bb.7:
	movl	(%r12), %esi
	movq	%r13, %rdi
	xorl	%edx, %edx
	callq	_carl9170_write_reg
	movl	%eax, %r14d
	testl	%eax, %eax
	jne	LBB0_41
## %bb.8:
	movq	-48(%rbp), %rax                 ## 8-byte Reload
	movq	(%rax), %rsi
	movq	%r13, %rdi
	callq	_carl9170_init_phy
	movl	%eax, %r14d
	testl	%eax, %eax
	jne	LBB0_41
## %bb.9:
	movq	-48(%rbp), %rax                 ## 8-byte Reload
	movq	(%rax), %rax
	movq	_NL80211_BAND_5GHZ@GOTPCREL(%rip), %rbx
	xorl	%esi, %esi
	cmpq	(%rbx), %rax
	sete	%sil
	movq	%r13, %rdi
	callq	_carl9170_init_rf_banks_0_7
	movl	%eax, %r14d
	testl	%eax, %eax
	jne	LBB0_41
## %bb.10:
	movq	_CARL9170_CMD_FREQ_START@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r13, %rdi
	xorl	%edx, %edx
	xorl	%ecx, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	_carl9170_exec_cmd
	movl	%eax, %r14d
	testl	%eax, %eax
	jne	LBB0_41
## %bb.11:
	movq	_AR9170_PHY_REG_HEAVY_CLIP_ENABLE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r13, %rdi
	movl	$512, %edx                      ## imm = 0x200
	callq	_carl9170_write_reg
	movl	%eax, %r14d
	testl	%eax, %eax
	jne	LBB0_41
## %bb.12:
	movq	-48(%rbp), %rcx                 ## 8-byte Reload
	movq	(%rcx), %rax
	xorl	%esi, %esi
	cmpq	(%rbx), %rax
	sete	%sil
	movl	8(%rcx), %edx
	movq	%r13, %rdi
	movl	-56(%rbp), %ecx                 ## 4-byte Reload
	callq	_carl9170_init_rf_bank4_pwr
	movl	%eax, %r14d
	testl	%eax, %eax
	jne	LBB0_41
## %bb.13:
	movq	_AR9170_PHY_TURBO_FC_SINGLE_HT_LTF1@GOTPCREL(%rip), %rcx
	movq	_AR9170_PHY_TURBO_FC_HT_EN@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	orl	(%rcx), %eax
	xorl	%edx, %edx
	movl	-56(%rbp), %ecx                 ## 4-byte Reload
	cmpl	$130, %ecx
	je	LBB0_14
## %bb.15:
	cmpl	$129, %ecx
	je	LBB0_19
## %bb.16:
	cmpl	$128, %ecx
	jne	LBB0_18
## %bb.17:
	movq	_AR9170_PHY_TURBO_FC_DYN2040_EN@GOTPCREL(%rip), %rcx
	orl	(%rcx), %eax
	movq	_AR9170_PHY_TURBO_FC_SHORT_GI_40@GOTPCREL(%rip), %rcx
	orl	(%rcx), %eax
	movl	$3, %r12d
	jmp	LBB0_20
LBB0_14:
	xorl	%r12d, %r12d
	jmp	LBB0_20
LBB0_19:
	movq	_AR9170_PHY_TURBO_FC_DYN2040_EN@GOTPCREL(%rip), %rcx
	movq	_AR9170_PHY_TURBO_FC_SHORT_GI_40@GOTPCREL(%rip), %rsi
	orl	(%rcx), %eax
	orl	(%rsi), %eax
	movq	_AR9170_PHY_TURBO_FC_DYN2040_PRI_CH@GOTPCREL(%rip), %rcx
	orl	(%rcx), %eax
	movl	$1, %r12d
LBB0_20:
	cmpl	$1, 36(%r13)
	je	LBB0_22
## %bb.21:
	movq	_AR9170_PHY_TURBO_FC_WALSH@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
LBB0_22:
	orl	%eax, %edx
	movq	_AR9170_PHY_REG_TURBO@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r13, %rdi
	callq	_carl9170_write_reg
	movl	%eax, %r14d
	testl	%eax, %eax
	jne	LBB0_41
## %bb.23:
	movq	%r13, %rdi
	movq	-48(%rbp), %rsi                 ## 8-byte Reload
	callq	_carl9170_set_freq_cal_data
	movl	%eax, %r14d
	testl	%eax, %eax
	jne	LBB0_41
## %bb.24:
	movq	-48(%rbp), %r14                 ## 8-byte Reload
	movl	8(%r14), %esi
	movq	%r13, %rdi
	movl	-56(%rbp), %edx                 ## 4-byte Reload
	callq	_carl9170_set_power_cal
	movq	%r13, %rdi
	movq	%r14, %rsi
	callq	_carl9170_set_mac_tpc
	movl	%eax, %r14d
	testl	%eax, %eax
	jne	LBB0_41
## %bb.25:
	movl	-52(%rbp), %ebx                 ## 4-byte Reload
	orl	-72(%rbp), %ebx                 ## 4-byte Folded Reload
	movq	-48(%rbp), %rdi                 ## 8-byte Reload
	movl	-56(%rbp), %esi                 ## 4-byte Reload
	callq	_carl9170_get_hw_dyn_params
	movq	%rax, %r14
	movl	%ebx, -52(%rbp)                 ## 4-byte Spill
	movl	%ebx, -128(%rbp)
	movq	24(%r13), %rdi
	addq	$4, %rdi
	callq	_conf_is_ht40
	testq	%rax, %rax
	je	LBB0_27
## %bb.26:
	movq	_CARL9170FW_PHY_HT_EXT_CHAN_OFF@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	-52(%rbp), %esi                 ## 4-byte Reload
	movl	%r12d, %edx
	callq	_SET_VAL
LBB0_27:
	movq	-48(%rbp), %rax                 ## 8-byte Reload
	imull	$1000, 8(%rax), %edi            ## imm = 0x3E8
	callq	_cpu_to_le32
	movq	%rax, -80(%rbp)
	movl	(%r14), %edi
	callq	_cpu_to_le32
	movq	%rax, -88(%rbp)
	movl	4(%r14), %edi
	callq	_cpu_to_le32
	movq	%rax, -96(%rbp)
	movl	8(%r14), %edi
	callq	_cpu_to_le32
	movq	%rax, -104(%rbp)
	movl	12(%r14), %edi
	callq	_cpu_to_le32
	movq	%rax, -112(%rbp)
	movl	$2000, %edi                     ## imm = 0x7D0
	callq	_cpu_to_le32
	movq	%rax, -120(%rbp)
	movq	_CARL9170_CMD_RF_INIT@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	leaq	-128(%rbp), %rcx
	leaq	-64(%rbp), %r9
	movq	%r13, %rdi
	movl	$56, %edx
	movl	$4, %r8d
	callq	_carl9170_exec_cmd
	movl	%eax, %r14d
	testl	%eax, %eax
	jne	LBB0_41
## %bb.28:
	movl	-64(%rbp), %edi
	callq	_le32_to_cpu
	testl	%eax, %eax
	je	LBB0_35
## %bb.29:
	incl	(%r13)
	incl	32(%r13)
	movq	24(%r13), %rcx
	movl	(%rcx), %edi
	testq	%r15, %r15
	je	LBB0_30
## %bb.31:
	movl	8(%r15), %edx
	jmp	LBB0_32
LBB0_18:
	xorl	%r14d, %r14d
	xorl	%eax, %eax
	callq	_BUG
	movq	_ENOSYS@GOTPCREL(%rip), %rax
	subl	(%rax), %r14d
LBB0_41:
	movl	%r14d, %eax
	addq	$88, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_35:
	movl	$0, (%r13)
	jmp	LBB0_36
LBB0_30:
	movl	$-1, %edx
LBB0_32:
	movq	-48(%rbp), %rcx                 ## 8-byte Reload
	movl	8(%rcx), %ecx
	leaq	L_.str(%rip), %rsi
	xorl	%r14d, %r14d
	movl	%eax, %r8d
	xorl	%eax, %eax
	callq	_wiphy_err
	cmpl	$4, (%r13)
	jl	LBB0_34
## %bb.33:
	movq	_CARL9170_RR_TOO_MANY_PHY_ERRORS@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r13, %rdi
	callq	_carl9170_restart
	jmp	LBB0_41
LBB0_34:
	movq	%r13, %rdi
	movq	-48(%rbp), %rsi                 ## 8-byte Reload
	movl	-68(%rbp), %edx                 ## 4-byte Reload
	callq	_carl9170_set_channel
	movl	%eax, %r14d
	testl	%eax, %eax
	jne	LBB0_41
LBB0_36:
	movl	4(%r13), %edx
	testl	%edx, %edx
	je	LBB0_40
## %bb.37:
	movq	_AR9170_PHY_REG_HEAVY_CLIP_ENABLE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	orl	$512, %edx                      ## imm = 0x200
	movq	%r13, %rdi
	callq	_carl9170_write_reg
	testl	%eax, %eax
	je	LBB0_40
## %bb.38:
	movl	%eax, %r14d
	xorl	%eax, %eax
	callq	_net_ratelimit
	testq	%rax, %rax
	je	LBB0_41
## %bb.39:
	movq	24(%r13), %rax
	movl	(%rax), %edi
	leaq	L_.str.1(%rip), %rsi
	xorl	%eax, %eax
	callq	_wiphy_err
	jmp	LBB0_41
LBB0_40:
	movq	-48(%rbp), %rax                 ## 8-byte Reload
	movq	%rax, 16(%r13)
	movl	-52(%rbp), %eax                 ## 4-byte Reload
	movl	%eax, 8(%r13)
	xorl	%r14d, %r14d
	jmp	LBB0_41
	.cfi_endproc
                                        ## -- End function
	.comm	_CARL9170FW_PHY_HT_ENABLE,4,2   ## @CARL9170FW_PHY_HT_ENABLE
	.comm	_CARL9170FW_PHY_HT_DYN2040,4,2  ## @CARL9170FW_PHY_HT_DYN2040
	.comm	_AR9170_PWR_REG_RESET,4,2       ## @AR9170_PWR_REG_RESET
	.comm	_AR9170_PWR_RESET_BB_COLD_RESET,4,2 ## @AR9170_PWR_RESET_BB_COLD_RESET
	.comm	_NL80211_BAND_5GHZ,8,3          ## @NL80211_BAND_5GHZ
	.comm	_CARL9170_CMD_FREQ_START,4,2    ## @CARL9170_CMD_FREQ_START
	.comm	_AR9170_PHY_REG_HEAVY_CLIP_ENABLE,4,2 ## @AR9170_PHY_REG_HEAVY_CLIP_ENABLE
	.comm	_AR9170_PHY_TURBO_FC_SINGLE_HT_LTF1,4,2 ## @AR9170_PHY_TURBO_FC_SINGLE_HT_LTF1
	.comm	_AR9170_PHY_TURBO_FC_HT_EN,4,2  ## @AR9170_PHY_TURBO_FC_HT_EN
	.comm	_AR9170_PHY_TURBO_FC_DYN2040_EN,4,2 ## @AR9170_PHY_TURBO_FC_DYN2040_EN
	.comm	_AR9170_PHY_TURBO_FC_SHORT_GI_40,4,2 ## @AR9170_PHY_TURBO_FC_SHORT_GI_40
	.comm	_AR9170_PHY_TURBO_FC_DYN2040_PRI_CH,4,2 ## @AR9170_PHY_TURBO_FC_DYN2040_PRI_CH
	.comm	_ENOSYS,4,2                     ## @ENOSYS
	.comm	_AR9170_PHY_TURBO_FC_WALSH,4,2  ## @AR9170_PHY_TURBO_FC_WALSH
	.comm	_AR9170_PHY_REG_TURBO,4,2       ## @AR9170_PHY_REG_TURBO
	.comm	_CARL9170FW_PHY_HT_EXT_CHAN_OFF,4,2 ## @CARL9170FW_PHY_HT_EXT_CHAN_OFF
	.comm	_CARL9170_CMD_RF_INIT,4,2       ## @CARL9170_CMD_RF_INIT
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"channel change: %d -> %d failed (%d).\n"

	.comm	_CARL9170_RR_TOO_MANY_PHY_ERRORS,4,2 ## @CARL9170_RR_TOO_MANY_PHY_ERRORS
L_.str.1:                               ## @.str.1
	.asciz	"failed to set heavy clip\n"

.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_carl9170_set_channel           ; -- Begin function carl9170_set_channel
	.p2align	2
_carl9170_set_channel:                  ; @carl9170_set_channel
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #176
	.cfi_def_cfa_offset 176
	stp	x26, x25, [sp, #96]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #112]            ; 16-byte Folded Spill
	stp	x22, x21, [sp, #128]            ; 16-byte Folded Spill
	stp	x20, x19, [sp, #144]            ; 16-byte Folded Spill
	stp	x29, x30, [sp, #160]            ; 16-byte Folded Spill
	add	x29, sp, #160
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	mov	x21, x2
	mov	x20, x1
	mov	x19, x0
	mov	x0, x2
	bl	_nl80211_to_carl
	mov	x22, x0
	ldr	x8, [x19, #24]
	add	x0, x8, #4
	bl	_conf_is_ht
Lloh0:
	adrp	x8, _CARL9170FW_PHY_HT_ENABLE@GOTPAGE
Lloh1:
	ldr	x8, [x8, _CARL9170FW_PHY_HT_ENABLE@GOTPAGEOFF]
Lloh2:
	ldr	w8, [x8]
	cmp	x0, #0
	csel	w24, wzr, w8, eq
	ldr	x8, [x19, #24]
	add	x0, x8, #4
	bl	_conf_is_ht40
Lloh3:
	adrp	x8, _CARL9170FW_PHY_HT_DYN2040@GOTPAGE
Lloh4:
	ldr	x8, [x8, _CARL9170FW_PHY_HT_DYN2040@GOTPAGEOFF]
Lloh5:
	ldr	w8, [x8]
	cmp	x0, #0
	csel	w23, wzr, w8, eq
	ldr	x25, [x19, #16]
	cbz	x25, LBB0_2
; %bb.1:
	str	xzr, [x19, #16]
LBB0_2:
Lloh6:
	adrp	x26, _AR9170_PWR_REG_RESET@GOTPAGE
Lloh7:
	ldr	x26, [x26, _AR9170_PWR_REG_RESET@GOTPAGEOFF]
	ldr	w1, [x26]
Lloh8:
	adrp	x8, _AR9170_PWR_RESET_BB_COLD_RESET@GOTPAGE
Lloh9:
	ldr	x8, [x8, _AR9170_PWR_RESET_BB_COLD_RESET@GOTPAGEOFF]
Lloh10:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_carl9170_write_reg
	cbnz	w0, LBB0_25
; %bb.3:
	ldr	w1, [x26]
	mov	x0, x19
	mov	w2, #0
	bl	_carl9170_write_reg
	cbnz	w0, LBB0_25
; %bb.4:
	ldr	x1, [x20]
	mov	x0, x19
	bl	_carl9170_init_phy
	cbnz	w0, LBB0_25
; %bb.5:
	ldr	x8, [x20]
Lloh11:
	adrp	x26, _NL80211_BAND_5GHZ@GOTPAGE
Lloh12:
	ldr	x26, [x26, _NL80211_BAND_5GHZ@GOTPAGEOFF]
	ldr	x9, [x26]
	cmp	x8, x9
	cset	w1, eq
	mov	x0, x19
	bl	_carl9170_init_rf_banks_0_7
	cbnz	w0, LBB0_25
; %bb.6:
Lloh13:
	adrp	x8, _CARL9170_CMD_FREQ_START@GOTPAGE
Lloh14:
	ldr	x8, [x8, _CARL9170_CMD_FREQ_START@GOTPAGEOFF]
Lloh15:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #0
	mov	x3, #0
	mov	w4, #0
	mov	x5, #0
	bl	_carl9170_exec_cmd
	cbnz	w0, LBB0_25
; %bb.7:
Lloh16:
	adrp	x8, _AR9170_PHY_REG_HEAVY_CLIP_ENABLE@GOTPAGE
Lloh17:
	ldr	x8, [x8, _AR9170_PHY_REG_HEAVY_CLIP_ENABLE@GOTPAGEOFF]
Lloh18:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #512
	bl	_carl9170_write_reg
	cbnz	w0, LBB0_25
; %bb.8:
	ldr	x8, [x20]
	ldr	x9, [x26]
	cmp	x8, x9
	cset	w1, eq
	ldr	w2, [x20, #8]
	mov	x0, x19
	mov	x3, x22
	bl	_carl9170_init_rf_bank4_pwr
	cbnz	w0, LBB0_25
; %bb.9:
Lloh19:
	adrp	x8, _AR9170_PHY_TURBO_FC_SINGLE_HT_LTF1@GOTPAGE
Lloh20:
	ldr	x8, [x8, _AR9170_PHY_TURBO_FC_SINGLE_HT_LTF1@GOTPAGEOFF]
Lloh21:
	ldr	w8, [x8]
Lloh22:
	adrp	x9, _AR9170_PHY_TURBO_FC_HT_EN@GOTPAGE
Lloh23:
	ldr	x9, [x9, _AR9170_PHY_TURBO_FC_HT_EN@GOTPAGEOFF]
Lloh24:
	ldr	w9, [x9]
	orr	w8, w9, w8
	cmp	w22, #130
	b.eq	LBB0_13
; %bb.10:
	cmp	w22, #129
	b.eq	LBB0_14
; %bb.11:
	cmp	w22, #128
	b.ne	LBB0_24
; %bb.12:
Lloh25:
	adrp	x9, _AR9170_PHY_TURBO_FC_DYN2040_EN@GOTPAGE
Lloh26:
	ldr	x9, [x9, _AR9170_PHY_TURBO_FC_DYN2040_EN@GOTPAGEOFF]
Lloh27:
	ldr	w9, [x9]
Lloh28:
	adrp	x10, _AR9170_PHY_TURBO_FC_SHORT_GI_40@GOTPAGE
Lloh29:
	ldr	x10, [x10, _AR9170_PHY_TURBO_FC_SHORT_GI_40@GOTPAGEOFF]
Lloh30:
	ldr	w10, [x10]
	orr	w8, w9, w8
	orr	w8, w8, w10
	mov	w26, #3
	b	LBB0_15
LBB0_13:
	mov	w26, #0
	b	LBB0_15
LBB0_14:
Lloh31:
	adrp	x9, _AR9170_PHY_TURBO_FC_DYN2040_EN@GOTPAGE
Lloh32:
	ldr	x9, [x9, _AR9170_PHY_TURBO_FC_DYN2040_EN@GOTPAGEOFF]
Lloh33:
	ldr	w9, [x9]
Lloh34:
	adrp	x10, _AR9170_PHY_TURBO_FC_SHORT_GI_40@GOTPAGE
Lloh35:
	ldr	x10, [x10, _AR9170_PHY_TURBO_FC_SHORT_GI_40@GOTPAGEOFF]
Lloh36:
	adrp	x11, _AR9170_PHY_TURBO_FC_DYN2040_PRI_CH@GOTPAGE
Lloh37:
	ldr	x11, [x11, _AR9170_PHY_TURBO_FC_DYN2040_PRI_CH@GOTPAGEOFF]
Lloh38:
	ldr	w10, [x10]
Lloh39:
	ldr	w11, [x11]
	orr	w8, w9, w8
	orr	w8, w8, w10
	orr	w8, w8, w11
	mov	w26, #1
LBB0_15:
	ldr	w9, [x19, #36]
Lloh40:
	adrp	x10, _AR9170_PHY_TURBO_FC_WALSH@GOTPAGE
Lloh41:
	ldr	x10, [x10, _AR9170_PHY_TURBO_FC_WALSH@GOTPAGEOFF]
Lloh42:
	ldr	w10, [x10]
	cmp	w9, #1
	csel	w9, wzr, w10, eq
	orr	w2, w9, w8
Lloh43:
	adrp	x8, _AR9170_PHY_REG_TURBO@GOTPAGE
Lloh44:
	ldr	x8, [x8, _AR9170_PHY_REG_TURBO@GOTPAGEOFF]
Lloh45:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_carl9170_write_reg
	cbnz	w0, LBB0_25
; %bb.16:
	mov	x0, x19
	mov	x1, x20
	bl	_carl9170_set_freq_cal_data
	cbnz	w0, LBB0_25
; %bb.17:
	ldr	w1, [x20, #8]
	mov	x0, x19
	mov	x2, x22
	bl	_carl9170_set_power_cal
	mov	x0, x19
	mov	x1, x20
	bl	_carl9170_set_mac_tpc
	cbnz	w0, LBB0_25
; %bb.18:
	mov	x8, x23
	mov	x23, x26
	orr	w24, w8, w24
	mov	x0, x20
	mov	x1, x22
	bl	_carl9170_get_hw_dyn_params
	mov	x22, x0
	str	w24, [sp, #32]
	ldr	x8, [x19, #24]
	add	x0, x8, #4
	bl	_conf_is_ht40
	cbz	x0, LBB0_20
; %bb.19:
Lloh46:
	adrp	x8, _CARL9170FW_PHY_HT_EXT_CHAN_OFF@GOTPAGE
Lloh47:
	ldr	x8, [x8, _CARL9170FW_PHY_HT_EXT_CHAN_OFF@GOTPAGEOFF]
Lloh48:
	ldr	w0, [x8]
	mov	x1, x24
	mov	x2, x23
	bl	_SET_VAL
LBB0_20:
	ldr	w8, [x20, #8]
	mov	w9, #1000
	mul	w0, w8, w9
	bl	_cpu_to_le32
	str	x0, [sp, #80]
	ldr	w0, [x22]
	bl	_cpu_to_le32
	str	x0, [sp, #72]
	ldr	w0, [x22, #4]
	bl	_cpu_to_le32
	str	x0, [sp, #64]
	ldr	w0, [x22, #8]
	bl	_cpu_to_le32
	str	x0, [sp, #56]
	ldr	w0, [x22, #12]
	bl	_cpu_to_le32
	str	x0, [sp, #48]
	mov	w0, #2000
	bl	_cpu_to_le32
	str	x0, [sp, #40]
Lloh49:
	adrp	x8, _CARL9170_CMD_RF_INIT@GOTPAGE
Lloh50:
	ldr	x8, [x8, _CARL9170_CMD_RF_INIT@GOTPAGEOFF]
Lloh51:
	ldr	w1, [x8]
	add	x3, sp, #32
	sub	x5, x29, #72
	mov	x0, x19
	mov	w2, #56
	mov	w4, #4
	bl	_carl9170_exec_cmd
	cbnz	w0, LBB0_25
; %bb.21:
	ldur	w0, [x29, #-72]
	bl	_le32_to_cpu
                                        ; kill: def $w0 killed $w0 def $x0
	cbz	w0, LBB0_26
; %bb.22:
	ldr	w8, [x19]
	add	w8, w8, #1
	str	w8, [x19]
	ldr	w8, [x19, #32]
	add	w8, w8, #1
	str	w8, [x19, #32]
	ldr	x8, [x19, #24]
	ldr	w8, [x8]
	cbz	x25, LBB0_27
; %bb.23:
	ldr	w9, [x25, #8]
	b	LBB0_28
LBB0_24:
	bl	_BUG
Lloh52:
	adrp	x8, _ENOSYS@GOTPAGE
Lloh53:
	ldr	x8, [x8, _ENOSYS@GOTPAGEOFF]
Lloh54:
	ldr	w8, [x8]
	neg	w0, w8
LBB0_25:
	ldp	x29, x30, [sp, #160]            ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #144]            ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #128]            ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #112]            ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #96]             ; 16-byte Folded Reload
	add	sp, sp, #176
	ret
LBB0_26:
	str	wzr, [x19]
	b	LBB0_31
LBB0_27:
	mov	w9, #-1
LBB0_28:
	ldr	w10, [x20, #8]
	stp	x10, x0, [sp, #8]
	str	x9, [sp]
Lloh55:
	adrp	x1, l_.str@PAGE
Lloh56:
	add	x1, x1, l_.str@PAGEOFF
	mov	x0, x8
	bl	_wiphy_err
	ldr	w8, [x19]
	cmp	w8, #4
	b.lt	LBB0_30
; %bb.29:
Lloh57:
	adrp	x8, _CARL9170_RR_TOO_MANY_PHY_ERRORS@GOTPAGE
Lloh58:
	ldr	x8, [x8, _CARL9170_RR_TOO_MANY_PHY_ERRORS@GOTPAGEOFF]
Lloh59:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_carl9170_restart
	mov	w0, #0
	b	LBB0_25
LBB0_30:
	mov	x0, x19
	mov	x1, x20
	mov	x2, x21
	bl	_carl9170_set_channel
	cbnz	w0, LBB0_25
LBB0_31:
	ldr	w8, [x19, #4]
	cbz	w8, LBB0_35
; %bb.32:
Lloh60:
	adrp	x9, _AR9170_PHY_REG_HEAVY_CLIP_ENABLE@GOTPAGE
Lloh61:
	ldr	x9, [x9, _AR9170_PHY_REG_HEAVY_CLIP_ENABLE@GOTPAGEOFF]
Lloh62:
	ldr	w1, [x9]
	orr	w2, w8, #0x200
	mov	x0, x19
	bl	_carl9170_write_reg
	cbz	w0, LBB0_35
; %bb.33:
	mov	x21, x0
	bl	_net_ratelimit
	cbz	x0, LBB0_36
; %bb.34:
	ldr	x8, [x19, #24]
	ldr	w0, [x8]
Lloh63:
	adrp	x1, l_.str.1@PAGE
Lloh64:
	add	x1, x1, l_.str.1@PAGEOFF
	bl	_wiphy_err
	mov	x0, x21
	b	LBB0_25
LBB0_35:
	mov	w0, #0
	str	x20, [x19, #16]
	str	w24, [x19, #8]
	b	LBB0_25
LBB0_36:
	mov	x0, x21
	b	LBB0_25
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGot	Lloh6, Lloh7
	.loh AdrpLdrGot	Lloh11, Lloh12
	.loh AdrpLdrGotLdr	Lloh13, Lloh14, Lloh15
	.loh AdrpLdrGotLdr	Lloh16, Lloh17, Lloh18
	.loh AdrpLdrGotLdr	Lloh22, Lloh23, Lloh24
	.loh AdrpLdrGotLdr	Lloh19, Lloh20, Lloh21
	.loh AdrpLdrGotLdr	Lloh28, Lloh29, Lloh30
	.loh AdrpLdrGotLdr	Lloh25, Lloh26, Lloh27
	.loh AdrpLdrGotLdr	Lloh36, Lloh37, Lloh39
	.loh AdrpLdrGotLdr	Lloh34, Lloh35, Lloh38
	.loh AdrpLdrGotLdr	Lloh31, Lloh32, Lloh33
	.loh AdrpLdrGotLdr	Lloh43, Lloh44, Lloh45
	.loh AdrpLdrGotLdr	Lloh40, Lloh41, Lloh42
	.loh AdrpLdrGotLdr	Lloh46, Lloh47, Lloh48
	.loh AdrpLdrGotLdr	Lloh49, Lloh50, Lloh51
	.loh AdrpLdrGotLdr	Lloh52, Lloh53, Lloh54
	.loh AdrpAdd	Lloh55, Lloh56
	.loh AdrpLdrGotLdr	Lloh57, Lloh58, Lloh59
	.loh AdrpLdrGotLdr	Lloh60, Lloh61, Lloh62
	.loh AdrpAdd	Lloh63, Lloh64
	.cfi_endproc
                                        ; -- End function
	.comm	_CARL9170FW_PHY_HT_ENABLE,4,2   ; @CARL9170FW_PHY_HT_ENABLE
	.comm	_CARL9170FW_PHY_HT_DYN2040,4,2  ; @CARL9170FW_PHY_HT_DYN2040
	.comm	_AR9170_PWR_REG_RESET,4,2       ; @AR9170_PWR_REG_RESET
	.comm	_AR9170_PWR_RESET_BB_COLD_RESET,4,2 ; @AR9170_PWR_RESET_BB_COLD_RESET
	.comm	_NL80211_BAND_5GHZ,8,3          ; @NL80211_BAND_5GHZ
	.comm	_CARL9170_CMD_FREQ_START,4,2    ; @CARL9170_CMD_FREQ_START
	.comm	_AR9170_PHY_REG_HEAVY_CLIP_ENABLE,4,2 ; @AR9170_PHY_REG_HEAVY_CLIP_ENABLE
	.comm	_AR9170_PHY_TURBO_FC_SINGLE_HT_LTF1,4,2 ; @AR9170_PHY_TURBO_FC_SINGLE_HT_LTF1
	.comm	_AR9170_PHY_TURBO_FC_HT_EN,4,2  ; @AR9170_PHY_TURBO_FC_HT_EN
	.comm	_AR9170_PHY_TURBO_FC_DYN2040_EN,4,2 ; @AR9170_PHY_TURBO_FC_DYN2040_EN
	.comm	_AR9170_PHY_TURBO_FC_SHORT_GI_40,4,2 ; @AR9170_PHY_TURBO_FC_SHORT_GI_40
	.comm	_AR9170_PHY_TURBO_FC_DYN2040_PRI_CH,4,2 ; @AR9170_PHY_TURBO_FC_DYN2040_PRI_CH
	.comm	_ENOSYS,4,2                     ; @ENOSYS
	.comm	_AR9170_PHY_TURBO_FC_WALSH,4,2  ; @AR9170_PHY_TURBO_FC_WALSH
	.comm	_AR9170_PHY_REG_TURBO,4,2       ; @AR9170_PHY_REG_TURBO
	.comm	_CARL9170FW_PHY_HT_EXT_CHAN_OFF,4,2 ; @CARL9170FW_PHY_HT_EXT_CHAN_OFF
	.comm	_CARL9170_CMD_RF_INIT,4,2       ; @CARL9170_CMD_RF_INIT
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"channel change: %d -> %d failed (%d).\n"

	.comm	_CARL9170_RR_TOO_MANY_PHY_ERRORS,4,2 ; @CARL9170_RR_TOO_MANY_PHY_ERRORS
l_.str.1:                               ; @.str.1
	.asciz	"failed to set heavy clip\n"

.subsections_via_symbols
