	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_iwl_pcie_rx_stop               ## -- Begin function iwl_pcie_rx_stop
	.p2align	4, 0x90
_iwl_pcie_rx_stop:                      ## @iwl_pcie_rx_stop
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -24
	movq	%rdi, %rbx
	movq	(%rdi), %rax
	movq	(%rax), %rcx
	movq	_IWL_DEVICE_FAMILY_22560@GOTPCREL(%rip), %rdx
	cmpq	(%rdx), %rcx
	jge	LBB0_3
## %bb.1:
	cmpq	$0, 8(%rax)
	je	LBB0_2
## %bb.4:
	movq	_RFH_RXF_DMA_CFG@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	xorl	%edx, %edx
	callq	_iwl_write_prph
	movq	_RFH_GEN_STATUS@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_RXF_DMA_IDLE@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movq	%rbx, %rdi
	movl	%ecx, %edx
	movl	$1000, %r8d                     ## imm = 0x3E8
	addq	$8, %rsp
	popq	%rbx
	popq	%rbp
	jmp	_iwl_poll_prph_bit              ## TAILCALL
LBB0_3:
	movq	_RFH_RXF_DMA_CFG_GEN3@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	xorl	%edx, %edx
	callq	_iwl_write_umac_prph
	movq	_RFH_GEN_STATUS_GEN3@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_RXF_DMA_IDLE@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movq	%rbx, %rdi
	movl	%ecx, %edx
	movl	$1000, %r8d                     ## imm = 0x3E8
	addq	$8, %rsp
	popq	%rbx
	popq	%rbp
	jmp	_iwl_poll_umac_prph_bit         ## TAILCALL
LBB0_2:
	movq	_FH_MEM_RCSR_CHNL0_CONFIG_REG@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	xorl	%edx, %edx
	callq	_iwl_write_direct32
	movq	_FH_MEM_RSSR_RX_STATUS_REG@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_FH_RSSR_CHNL0_RX_STATUS_CHNL_IDLE@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	movl	$1000, %ecx                     ## imm = 0x3E8
	addq	$8, %rsp
	popq	%rbx
	popq	%rbp
	jmp	_iwl_poll_direct_bit            ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_IWL_DEVICE_FAMILY_22560,8,3    ## @IWL_DEVICE_FAMILY_22560
	.comm	_RFH_RXF_DMA_CFG_GEN3,4,2       ## @RFH_RXF_DMA_CFG_GEN3
	.comm	_RFH_GEN_STATUS_GEN3,4,2        ## @RFH_GEN_STATUS_GEN3
	.comm	_RXF_DMA_IDLE,4,2               ## @RXF_DMA_IDLE
	.comm	_RFH_RXF_DMA_CFG,4,2            ## @RFH_RXF_DMA_CFG
	.comm	_RFH_GEN_STATUS,4,2             ## @RFH_GEN_STATUS
	.comm	_FH_MEM_RCSR_CHNL0_CONFIG_REG,4,2 ## @FH_MEM_RCSR_CHNL0_CONFIG_REG
	.comm	_FH_MEM_RSSR_RX_STATUS_REG,4,2  ## @FH_MEM_RSSR_RX_STATUS_REG
	.comm	_FH_RSSR_CHNL0_RX_STATUS_CHNL_IDLE,4,2 ## @FH_RSSR_CHNL0_RX_STATUS_CHNL_IDLE
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_iwl_pcie_rx_stop               ; -- Begin function iwl_pcie_rx_stop
	.p2align	2
_iwl_pcie_rx_stop:                      ; @iwl_pcie_rx_stop
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x19, x0
	ldr	x8, [x0]
	ldr	x9, [x8]
Lloh0:
	adrp	x10, _IWL_DEVICE_FAMILY_22560@GOTPAGE
Lloh1:
	ldr	x10, [x10, _IWL_DEVICE_FAMILY_22560@GOTPAGEOFF]
Lloh2:
	ldr	x10, [x10]
	cmp	x9, x10
	b.ge	LBB0_3
; %bb.1:
	ldr	x8, [x8, #8]
	cbz	x8, LBB0_4
; %bb.2:
Lloh3:
	adrp	x8, _RFH_RXF_DMA_CFG@GOTPAGE
Lloh4:
	ldr	x8, [x8, _RFH_RXF_DMA_CFG@GOTPAGEOFF]
Lloh5:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #0
	bl	_iwl_write_prph
Lloh6:
	adrp	x8, _RFH_GEN_STATUS@GOTPAGE
Lloh7:
	ldr	x8, [x8, _RFH_GEN_STATUS@GOTPAGEOFF]
Lloh8:
	ldr	w1, [x8]
Lloh9:
	adrp	x8, _RXF_DMA_IDLE@GOTPAGE
Lloh10:
	ldr	x8, [x8, _RXF_DMA_IDLE@GOTPAGEOFF]
Lloh11:
	ldr	w2, [x8]
	mov	x0, x19
	mov	x3, x2
	mov	w4, #1000
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	b	_iwl_poll_prph_bit
LBB0_3:
Lloh12:
	adrp	x8, _RFH_RXF_DMA_CFG_GEN3@GOTPAGE
Lloh13:
	ldr	x8, [x8, _RFH_RXF_DMA_CFG_GEN3@GOTPAGEOFF]
Lloh14:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #0
	bl	_iwl_write_umac_prph
Lloh15:
	adrp	x8, _RFH_GEN_STATUS_GEN3@GOTPAGE
Lloh16:
	ldr	x8, [x8, _RFH_GEN_STATUS_GEN3@GOTPAGEOFF]
Lloh17:
	ldr	w1, [x8]
Lloh18:
	adrp	x8, _RXF_DMA_IDLE@GOTPAGE
Lloh19:
	ldr	x8, [x8, _RXF_DMA_IDLE@GOTPAGEOFF]
Lloh20:
	ldr	w2, [x8]
	mov	x0, x19
	mov	x3, x2
	mov	w4, #1000
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	b	_iwl_poll_umac_prph_bit
LBB0_4:
Lloh21:
	adrp	x8, _FH_MEM_RCSR_CHNL0_CONFIG_REG@GOTPAGE
Lloh22:
	ldr	x8, [x8, _FH_MEM_RCSR_CHNL0_CONFIG_REG@GOTPAGEOFF]
Lloh23:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #0
	bl	_iwl_write_direct32
Lloh24:
	adrp	x8, _FH_MEM_RSSR_RX_STATUS_REG@GOTPAGE
Lloh25:
	ldr	x8, [x8, _FH_MEM_RSSR_RX_STATUS_REG@GOTPAGEOFF]
Lloh26:
	adrp	x9, _FH_RSSR_CHNL0_RX_STATUS_CHNL_IDLE@GOTPAGE
Lloh27:
	ldr	x9, [x9, _FH_RSSR_CHNL0_RX_STATUS_CHNL_IDLE@GOTPAGEOFF]
Lloh28:
	ldr	w1, [x8]
Lloh29:
	ldr	w2, [x9]
	mov	x0, x19
	mov	w3, #1000
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	b	_iwl_poll_direct_bit
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh26, Lloh27, Lloh29
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh28
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.cfi_endproc
                                        ; -- End function
	.comm	_IWL_DEVICE_FAMILY_22560,8,3    ; @IWL_DEVICE_FAMILY_22560
	.comm	_RFH_RXF_DMA_CFG_GEN3,4,2       ; @RFH_RXF_DMA_CFG_GEN3
	.comm	_RFH_GEN_STATUS_GEN3,4,2        ; @RFH_GEN_STATUS_GEN3
	.comm	_RXF_DMA_IDLE,4,2               ; @RXF_DMA_IDLE
	.comm	_RFH_RXF_DMA_CFG,4,2            ; @RFH_RXF_DMA_CFG
	.comm	_RFH_GEN_STATUS,4,2             ; @RFH_GEN_STATUS
	.comm	_FH_MEM_RCSR_CHNL0_CONFIG_REG,4,2 ; @FH_MEM_RCSR_CHNL0_CONFIG_REG
	.comm	_FH_MEM_RSSR_RX_STATUS_REG,4,2  ; @FH_MEM_RSSR_RX_STATUS_REG
	.comm	_FH_RSSR_CHNL0_RX_STATUS_CHNL_IDLE,4,2 ; @FH_RSSR_CHNL0_RX_STATUS_CHNL_IDLE
.subsections_via_symbols
