	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function link_status_mii
_link_status_mii:                       ## @link_status_mii
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$24, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rsi, %r14
	movq	%rdi, %rbx
	movl	(%rdi), %esi
	movq	_MII_BMCR@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	callq	_mii_read
	movl	%eax, %r13d
	movl	%eax, %edi
	shrl	$31, %edi
	callq	_unlikely
	testq	%rax, %rax
	je	LBB0_2
## %bb.1:
	movl	%r13d, %r12d
	jmp	LBB0_46
LBB0_2:
	movl	(%rbx), %esi
	movq	_MII_BMSR@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	callq	_mii_read
	movl	%eax, %r15d
	movl	%eax, %edi
	shrl	$31, %edi
	callq	_unlikely
	testq	%rax, %rax
	je	LBB0_4
## %bb.3:
	movl	%r15d, %r12d
	jmp	LBB0_46
LBB0_4:
	movl	(%rbx), %esi
	movq	_MII_ADVERTISE@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	callq	_mii_read
	movl	%eax, %r12d
	movl	%eax, %edi
	shrl	$31, %edi
	callq	_unlikely
	testq	%rax, %rax
	jne	LBB0_46
## %bb.5:
	movl	%r12d, -52(%rbp)                ## 4-byte Spill
	movl	(%rbx), %esi
	movq	_MII_LPA@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	callq	_mii_read
	movl	%eax, %r12d
	movl	%eax, %edi
	shrl	$31, %edi
	callq	_unlikely
	movl	%r12d, -56(%rbp)                ## 4-byte Spill
	testq	%rax, %rax
	je	LBB0_6
LBB0_46:
	movl	%r12d, %eax
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_6:
	movq	_BMSR_ESTATEN@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	andl	%r15d, %edi
	callq	_likely
	testq	%rax, %rax
	je	LBB0_7
## %bb.8:
	movl	(%rbx), %esi
	movq	_MII_ESTATUS@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	callq	_mii_read
	movl	%eax, %r12d
	movl	%eax, %edi
	shrl	$31, %edi
	callq	_unlikely
	testq	%rax, %rax
	jne	LBB0_46
## %bb.9:
	movl	%r12d, -44(%rbp)                ## 4-byte Spill
	movl	(%rbx), %esi
	movq	_MII_CTRL1000@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	callq	_mii_read
	movl	%eax, %r12d
	movl	%eax, %edi
	shrl	$31, %edi
	callq	_unlikely
	testq	%rax, %rax
	jne	LBB0_46
## %bb.10:
	movl	%r12d, -48(%rbp)                ## 4-byte Spill
	movl	(%rbx), %esi
	movq	_MII_STAT1000@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	callq	_mii_read
	movl	%eax, %r12d
	movl	%eax, %edi
	shrl	$31, %edi
	callq	_unlikely
	testq	%rax, %rax
	movl	-44(%rbp), %r8d                 ## 4-byte Reload
	jne	LBB0_46
	jmp	LBB0_11
LBB0_7:
	xorl	%r12d, %r12d
	movl	$0, -48(%rbp)                   ## 4-byte Folded Spill
	xorl	%r8d, %r8d
LBB0_11:
	movq	_BMSR_ANEGCAPABLE@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	andl	%r15d, %ecx
	je	LBB0_13
## %bb.12:
	movq	_SUPPORTED_Autoneg@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
LBB0_13:
	movq	_BMSR_10HALF@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	andl	%r15d, %eax
	je	LBB0_15
## %bb.14:
	movq	_SUPPORTED_10baseT_Half@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
LBB0_15:
	movq	_BMSR_10FULL@GOTPCREL(%rip), %rdx
	movl	(%rdx), %edx
	andl	%r15d, %edx
	je	LBB0_17
## %bb.16:
	movq	_SUPPORTED_10baseT_Full@GOTPCREL(%rip), %rdx
	movl	(%rdx), %edx
LBB0_17:
	movq	_BMSR_100HALF@GOTPCREL(%rip), %rsi
	movl	(%rsi), %edi
	andl	%r15d, %edi
	je	LBB0_19
## %bb.18:
	movq	_SUPPORTED_100baseT_Half@GOTPCREL(%rip), %rsi
	movl	(%rsi), %edi
LBB0_19:
	movq	_BMSR_100FULL@GOTPCREL(%rip), %rsi
	movl	(%rsi), %esi
	andl	%r15d, %esi
	je	LBB0_21
## %bb.20:
	movq	_SUPPORTED_100baseT_Full@GOTPCREL(%rip), %rsi
	movl	(%rsi), %esi
LBB0_21:
	orl	%ecx, %eax
	orl	%edi, %edx
	movq	_ESTATUS_1000_THALF@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	andl	%r8d, %ecx
	je	LBB0_23
## %bb.22:
	movq	_SUPPORTED_1000baseT_Half@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
LBB0_23:
	orl	%ecx, %esi
	orl	%edx, %eax
	movq	_ESTATUS_1000_TFULL@GOTPCREL(%rip), %rcx
	andl	(%rcx), %r8d
	je	LBB0_25
## %bb.24:
	movq	_SUPPORTED_1000baseT_Full@GOTPCREL(%rip), %rcx
	movl	(%rcx), %r8d
LBB0_25:
	orl	%r8d, %esi
	orl	%esi, %eax
	movl	%eax, 4(%rbx)
	movl	-52(%rbp), %edi                 ## 4-byte Reload
	callq	_mii_adv_to_ethtool_adv_t
	movl	%eax, -44(%rbp)                 ## 4-byte Spill
	movl	-48(%rbp), %edi                 ## 4-byte Reload
	callq	_mii_ctrl1000_to_ethtool_adv_t
	orl	-44(%rbp), %eax                 ## 4-byte Folded Reload
	movq	_BMCR_ANENABLE@GOTPCREL(%rip), %rcx
	testl	%r13d, (%rcx)
	je	LBB0_38
## %bb.26:
	movl	$1, 8(%rbx)
	movq	_ADVERTISED_Autoneg@GOTPCREL(%rip), %r8
	movl	-56(%rbp), %ecx                 ## 4-byte Reload
	andl	-52(%rbp), %ecx                 ## 4-byte Folded Reload
	movl	-48(%rbp), %r9d                 ## 4-byte Reload
	shll	$2, %r9d
	andl	%r12d, %r9d
	movq	_LPA_1000FULL@GOTPCREL(%rip), %rdx
	movl	(%rdx), %edx
	movq	_LPA_1000HALF@GOTPCREL(%rip), %rsi
	movl	(%rsi), %esi
	orl	%edx, %esi
	testl	%r9d, %esi
	je	LBB0_28
## %bb.27:
	movq	_SPEED_1000@GOTPCREL(%rip), %rsi
	jmp	LBB0_33
LBB0_38:
	movl	$0, 8(%rbx)
	movq	_BMCR_SPEED1000@GOTPCREL(%rip), %rdx
	movq	_BMCR_SPEED100@GOTPCREL(%rip), %rcx
	testl	%r13d, (%rcx)
	jne	LBB0_39
## %bb.40:
	movq	_SPEED_10@GOTPCREL(%rip), %rcx
	movq	_SPEED_1000@GOTPCREL(%rip), %rsi
	jmp	LBB0_41
LBB0_28:
	movq	_LPA_100@GOTPCREL(%rip), %rsi
	testl	%ecx, (%rsi)
	je	LBB0_30
## %bb.29:
	movq	_SPEED_100@GOTPCREL(%rip), %rsi
	jmp	LBB0_33
LBB0_39:
	movq	_SPEED_100@GOTPCREL(%rip), %rcx
	movq	%rcx, %rsi
LBB0_41:
	testl	%r13d, (%rdx)
	cmovneq	%rsi, %rcx
	movq	_BMCR_FULLDPLX@GOTPCREL(%rip), %rdx
	testl	%r13d, (%rdx)
	jne	LBB0_42
## %bb.43:
	movq	_DUPLEX_HALF@GOTPCREL(%rip), %rsi
	jmp	LBB0_44
LBB0_42:
	movq	_DUPLEX_FULL@GOTPCREL(%rip), %rsi
LBB0_44:
	movl	(%rcx), %edi
	jmp	LBB0_45
LBB0_30:
	movq	_LPA_10HALF@GOTPCREL(%rip), %rsi
	movq	_LPA_10FULL@GOTPCREL(%rip), %rdi
	movl	(%rdi), %edi
	orl	(%rsi), %edi
	testl	%ecx, %edi
	jne	LBB0_31
## %bb.32:
	movq	_SPEED_INVALID@GOTPCREL(%rip), %rsi
	jmp	LBB0_33
LBB0_31:
	movq	_SPEED_10@GOTPCREL(%rip), %rsi
LBB0_33:
	orl	(%r8), %eax
	movl	(%rsi), %edi
	movq	_DUPLEX_FULL@GOTPCREL(%rip), %rsi
	testl	%r9d, %edx
	jne	LBB0_45
## %bb.34:
	movq	_LPA_DUPLEX@GOTPCREL(%rip), %rdx
	testl	%ecx, (%rdx)
	jne	LBB0_45
## %bb.35:
	movq	_SPEED_INVALID@GOTPCREL(%rip), %rdx
	cmpl	(%rdx), %edi
	jne	LBB0_36
## %bb.37:
	movq	_DUPLEX_INVALID@GOTPCREL(%rip), %rsi
	jmp	LBB0_45
LBB0_36:
	movq	_DUPLEX_HALF@GOTPCREL(%rip), %rsi
LBB0_45:
	movl	(%rsi), %edx
	movl	%eax, 12(%rbx)
	movl	%edi, 16(%rbx)
	movl	%edx, 20(%rbx)
	movq	_BMSR_LSTATUS@GOTPCREL(%rip), %rax
	xorl	%ecx, %ecx
	movl	(%rax), %eax
	andl	%r15d, %eax
	setne	%cl
	movl	%ecx, (%r14)
	xorl	%r12d, %r12d
	jmp	LBB0_46
	.cfi_endproc
                                        ## -- End function
	.comm	_MII_BMCR,4,2                   ## @MII_BMCR
	.comm	_MII_BMSR,4,2                   ## @MII_BMSR
	.comm	_MII_ADVERTISE,4,2              ## @MII_ADVERTISE
	.comm	_MII_LPA,4,2                    ## @MII_LPA
	.comm	_BMSR_ESTATEN,4,2               ## @BMSR_ESTATEN
	.comm	_MII_ESTATUS,4,2                ## @MII_ESTATUS
	.comm	_MII_CTRL1000,4,2               ## @MII_CTRL1000
	.comm	_MII_STAT1000,4,2               ## @MII_STAT1000
	.comm	_BMSR_ANEGCAPABLE,4,2           ## @BMSR_ANEGCAPABLE
	.comm	_SUPPORTED_Autoneg,4,2          ## @SUPPORTED_Autoneg
	.comm	_BMSR_10HALF,4,2                ## @BMSR_10HALF
	.comm	_SUPPORTED_10baseT_Half,4,2     ## @SUPPORTED_10baseT_Half
	.comm	_BMSR_10FULL,4,2                ## @BMSR_10FULL
	.comm	_SUPPORTED_10baseT_Full,4,2     ## @SUPPORTED_10baseT_Full
	.comm	_BMSR_100HALF,4,2               ## @BMSR_100HALF
	.comm	_SUPPORTED_100baseT_Half,4,2    ## @SUPPORTED_100baseT_Half
	.comm	_BMSR_100FULL,4,2               ## @BMSR_100FULL
	.comm	_SUPPORTED_100baseT_Full,4,2    ## @SUPPORTED_100baseT_Full
	.comm	_ESTATUS_1000_THALF,4,2         ## @ESTATUS_1000_THALF
	.comm	_SUPPORTED_1000baseT_Half,4,2   ## @SUPPORTED_1000baseT_Half
	.comm	_ESTATUS_1000_TFULL,4,2         ## @ESTATUS_1000_TFULL
	.comm	_SUPPORTED_1000baseT_Full,4,2   ## @SUPPORTED_1000baseT_Full
	.comm	_BMCR_ANENABLE,4,2              ## @BMCR_ANENABLE
	.comm	_ADVERTISED_Autoneg,4,2         ## @ADVERTISED_Autoneg
	.comm	_LPA_1000FULL,4,2               ## @LPA_1000FULL
	.comm	_LPA_1000HALF,4,2               ## @LPA_1000HALF
	.comm	_SPEED_1000,4,2                 ## @SPEED_1000
	.comm	_LPA_100,4,2                    ## @LPA_100
	.comm	_SPEED_100,4,2                  ## @SPEED_100
	.comm	_LPA_10HALF,4,2                 ## @LPA_10HALF
	.comm	_LPA_10FULL,4,2                 ## @LPA_10FULL
	.comm	_SPEED_10,4,2                   ## @SPEED_10
	.comm	_SPEED_INVALID,4,2              ## @SPEED_INVALID
	.comm	_LPA_DUPLEX,4,2                 ## @LPA_DUPLEX
	.comm	_DUPLEX_FULL,4,2                ## @DUPLEX_FULL
	.comm	_DUPLEX_HALF,4,2                ## @DUPLEX_HALF
	.comm	_DUPLEX_INVALID,4,2             ## @DUPLEX_INVALID
	.comm	_BMCR_SPEED1000,4,2             ## @BMCR_SPEED1000
	.comm	_BMCR_SPEED100,4,2              ## @BMCR_SPEED100
	.comm	_BMCR_FULLDPLX,4,2              ## @BMCR_FULLDPLX
	.comm	_BMSR_LSTATUS,4,2               ## @BMSR_LSTATUS
	.no_dead_strip	_link_status_mii
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function link_status_mii
_link_status_mii:                       ; @link_status_mii
	.cfi_startproc
; %bb.0:
	stp	x28, x27, [sp, #-96]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 96
	stp	x26, x25, [sp, #16]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #32]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #48]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #64]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #80]             ; 16-byte Folded Spill
	add	x29, sp, #80
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	mov	x19, x1
	mov	x20, x0
	ldr	w1, [x0]
Lloh0:
	adrp	x8, _MII_BMCR@GOTPAGE
Lloh1:
	ldr	x8, [x8, _MII_BMCR@GOTPAGEOFF]
Lloh2:
	ldr	w2, [x8]
	bl	_mii_read
	mov	x22, x0
	lsr	w0, w0, #31
	bl	_unlikely
	mov	x25, x22
	cbnz	x0, LBB0_5
; %bb.1:
	ldr	w1, [x20]
Lloh3:
	adrp	x8, _MII_BMSR@GOTPAGE
Lloh4:
	ldr	x8, [x8, _MII_BMSR@GOTPAGEOFF]
Lloh5:
	ldr	w2, [x8]
	mov	x0, x20
	bl	_mii_read
	mov	x21, x0
	lsr	w0, w0, #31
	bl	_unlikely
	mov	x25, x21
	cbnz	x0, LBB0_5
; %bb.2:
	ldr	w1, [x20]
Lloh6:
	adrp	x8, _MII_ADVERTISE@GOTPAGE
Lloh7:
	ldr	x8, [x8, _MII_ADVERTISE@GOTPAGEOFF]
Lloh8:
	ldr	w2, [x8]
	mov	x0, x20
	bl	_mii_read
	mov	x23, x0
	lsr	w0, w0, #31
	bl	_unlikely
	cbz	x0, LBB0_4
; %bb.3:
	mov	x25, x23
	b	LBB0_5
LBB0_4:
	ldr	w1, [x20]
Lloh9:
	adrp	x8, _MII_LPA@GOTPAGE
Lloh10:
	ldr	x8, [x8, _MII_LPA@GOTPAGEOFF]
Lloh11:
	ldr	w2, [x8]
	mov	x0, x20
	bl	_mii_read
	mov	x24, x0
	lsr	w0, w0, #31
	bl	_unlikely
	mov	x25, x24
	cbz	x0, LBB0_6
LBB0_5:
	mov	x0, x25
	ldp	x29, x30, [sp, #80]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #64]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #48]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #32]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #16]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp], #96             ; 16-byte Folded Reload
	ret
LBB0_6:
Lloh12:
	adrp	x8, _BMSR_ESTATEN@GOTPAGE
Lloh13:
	ldr	x8, [x8, _BMSR_ESTATEN@GOTPAGEOFF]
Lloh14:
	ldr	w8, [x8]
	and	w0, w8, w21
	bl	_likely
	cbz	x0, LBB0_9
; %bb.7:
	ldr	w1, [x20]
Lloh15:
	adrp	x8, _MII_ESTATUS@GOTPAGE
Lloh16:
	ldr	x8, [x8, _MII_ESTATUS@GOTPAGEOFF]
Lloh17:
	ldr	w2, [x8]
	mov	x0, x20
	bl	_mii_read
	mov	x27, x0
	lsr	w0, w0, #31
	bl	_unlikely
	cbz	x0, LBB0_13
; %bb.8:
	mov	x25, x27
	b	LBB0_5
LBB0_9:
	mov	w25, #0
	mov	w26, #0
	mov	w27, #0
LBB0_10:
Lloh18:
	adrp	x8, _BMSR_ANEGCAPABLE@GOTPAGE
Lloh19:
	ldr	x8, [x8, _BMSR_ANEGCAPABLE@GOTPAGEOFF]
Lloh20:
	ldr	w8, [x8]
Lloh21:
	adrp	x9, _SUPPORTED_Autoneg@GOTPAGE
Lloh22:
	ldr	x9, [x9, _SUPPORTED_Autoneg@GOTPAGEOFF]
Lloh23:
	ldr	w9, [x9]
	tst	w8, w21
Lloh24:
	adrp	x8, _BMSR_10HALF@GOTPAGE
Lloh25:
	ldr	x8, [x8, _BMSR_10HALF@GOTPAGEOFF]
	csel	w9, wzr, w9, eq
Lloh26:
	ldr	w8, [x8]
Lloh27:
	adrp	x10, _SUPPORTED_10baseT_Half@GOTPAGE
Lloh28:
	ldr	x10, [x10, _SUPPORTED_10baseT_Half@GOTPAGEOFF]
Lloh29:
	ldr	w10, [x10]
	tst	w8, w21
	csel	w8, wzr, w10, eq
	orr	w8, w8, w9
Lloh30:
	adrp	x9, _BMSR_10FULL@GOTPAGE
Lloh31:
	ldr	x9, [x9, _BMSR_10FULL@GOTPAGEOFF]
Lloh32:
	adrp	x10, _SUPPORTED_10baseT_Full@GOTPAGE
Lloh33:
	ldr	x10, [x10, _SUPPORTED_10baseT_Full@GOTPAGEOFF]
Lloh34:
	ldr	w9, [x9]
Lloh35:
	ldr	w10, [x10]
	tst	w9, w21
	csel	w9, wzr, w10, eq
Lloh36:
	adrp	x10, _BMSR_100HALF@GOTPAGE
Lloh37:
	ldr	x10, [x10, _BMSR_100HALF@GOTPAGEOFF]
	orr	w8, w8, w9
Lloh38:
	ldr	w9, [x10]
Lloh39:
	adrp	x10, _SUPPORTED_100baseT_Half@GOTPAGE
Lloh40:
	ldr	x10, [x10, _SUPPORTED_100baseT_Half@GOTPAGEOFF]
Lloh41:
	ldr	w10, [x10]
	tst	w9, w21
	csel	w9, wzr, w10, eq
	orr	w8, w8, w9
Lloh42:
	adrp	x9, _BMSR_100FULL@GOTPAGE
Lloh43:
	ldr	x9, [x9, _BMSR_100FULL@GOTPAGEOFF]
Lloh44:
	adrp	x10, _SUPPORTED_100baseT_Full@GOTPAGE
Lloh45:
	ldr	x10, [x10, _SUPPORTED_100baseT_Full@GOTPAGEOFF]
Lloh46:
	ldr	w9, [x9]
Lloh47:
	ldr	w10, [x10]
	tst	w9, w21
	csel	w9, wzr, w10, eq
Lloh48:
	adrp	x10, _ESTATUS_1000_THALF@GOTPAGE
Lloh49:
	ldr	x10, [x10, _ESTATUS_1000_THALF@GOTPAGEOFF]
	orr	w8, w8, w9
Lloh50:
	ldr	w9, [x10]
Lloh51:
	adrp	x10, _SUPPORTED_1000baseT_Half@GOTPAGE
Lloh52:
	ldr	x10, [x10, _SUPPORTED_1000baseT_Half@GOTPAGEOFF]
Lloh53:
	ldr	w10, [x10]
	tst	w9, w27
	csel	w9, wzr, w10, eq
	orr	w8, w8, w9
Lloh54:
	adrp	x9, _ESTATUS_1000_TFULL@GOTPAGE
Lloh55:
	ldr	x9, [x9, _ESTATUS_1000_TFULL@GOTPAGEOFF]
Lloh56:
	adrp	x10, _SUPPORTED_1000baseT_Full@GOTPAGE
Lloh57:
	ldr	x10, [x10, _SUPPORTED_1000baseT_Full@GOTPAGEOFF]
Lloh58:
	ldr	w9, [x9]
Lloh59:
	ldr	w10, [x10]
	tst	w9, w27
	csel	w9, wzr, w10, eq
	orr	w8, w8, w9
	str	w8, [x20, #4]
	mov	x0, x23
	bl	_mii_adv_to_ethtool_adv_t
	mov	x27, x0
	mov	x0, x26
	bl	_mii_ctrl1000_to_ethtool_adv_t
	orr	w8, w0, w27
Lloh60:
	adrp	x9, _BMCR_ANENABLE@GOTPAGE
Lloh61:
	ldr	x9, [x9, _BMCR_ANENABLE@GOTPAGEOFF]
Lloh62:
	ldr	w9, [x9]
	tst	w9, w22
	b.eq	LBB0_15
; %bb.11:
	mov	w9, #1
	str	w9, [x20, #8]
Lloh63:
	adrp	x9, _ADVERTISED_Autoneg@GOTPAGE
Lloh64:
	ldr	x9, [x9, _ADVERTISED_Autoneg@GOTPAGEOFF]
Lloh65:
	ldr	w9, [x9]
	orr	w8, w9, w8
	and	w10, w24, w23
	and	w11, w25, w26, lsl #2
Lloh66:
	adrp	x9, _LPA_1000FULL@GOTPAGE
Lloh67:
	ldr	x9, [x9, _LPA_1000FULL@GOTPAGEOFF]
Lloh68:
	ldr	w12, [x9]
Lloh69:
	adrp	x9, _LPA_1000HALF@GOTPAGE
Lloh70:
	ldr	x9, [x9, _LPA_1000HALF@GOTPAGEOFF]
Lloh71:
	ldr	w9, [x9]
	orr	w9, w9, w12
	tst	w9, w11
	b.eq	LBB0_16
; %bb.12:
Lloh72:
	adrp	x9, _SPEED_1000@GOTPAGE
Lloh73:
	ldr	x9, [x9, _SPEED_1000@GOTPAGEOFF]
	b	LBB0_20
LBB0_13:
	ldr	w1, [x20]
Lloh74:
	adrp	x8, _MII_CTRL1000@GOTPAGE
Lloh75:
	ldr	x8, [x8, _MII_CTRL1000@GOTPAGEOFF]
Lloh76:
	ldr	w2, [x8]
	mov	x0, x20
	bl	_mii_read
	mov	x26, x0
	lsr	w0, w0, #31
	bl	_unlikely
	cbz	x0, LBB0_18
; %bb.14:
	mov	x25, x26
	b	LBB0_5
LBB0_15:
Lloh77:
	adrp	x9, _BMCR_SPEED100@GOTPAGE
Lloh78:
	ldr	x9, [x9, _BMCR_SPEED100@GOTPAGEOFF]
Lloh79:
	ldr	w9, [x9]
	tst	w9, w22
Lloh80:
	adrp	x9, _SPEED_10@GOTPAGE
Lloh81:
	ldr	x9, [x9, _SPEED_10@GOTPAGEOFF]
Lloh82:
	adrp	x10, _SPEED_100@GOTPAGE
Lloh83:
	ldr	x10, [x10, _SPEED_100@GOTPAGEOFF]
	csel	x9, x9, x10, eq
	str	wzr, [x20, #8]
Lloh84:
	adrp	x10, _BMCR_SPEED1000@GOTPAGE
Lloh85:
	ldr	x10, [x10, _BMCR_SPEED1000@GOTPAGEOFF]
Lloh86:
	ldr	w10, [x10]
	and	w10, w10, w22
Lloh87:
	adrp	x11, _SPEED_1000@GOTPAGE
Lloh88:
	ldr	x11, [x11, _SPEED_1000@GOTPAGEOFF]
	ccmp	w10, #0, #4, eq
	csel	x9, x11, x9, ne
	ldr	w9, [x9]
Lloh89:
	adrp	x10, _BMCR_FULLDPLX@GOTPAGE
Lloh90:
	ldr	x10, [x10, _BMCR_FULLDPLX@GOTPAGEOFF]
Lloh91:
	ldr	w10, [x10]
Lloh92:
	adrp	x11, _DUPLEX_FULL@GOTPAGE
Lloh93:
	ldr	x11, [x11, _DUPLEX_FULL@GOTPAGEOFF]
Lloh94:
	adrp	x12, _DUPLEX_HALF@GOTPAGE
Lloh95:
	ldr	x12, [x12, _DUPLEX_HALF@GOTPAGEOFF]
	tst	w10, w22
	b	LBB0_24
LBB0_16:
Lloh96:
	adrp	x9, _LPA_100@GOTPAGE
Lloh97:
	ldr	x9, [x9, _LPA_100@GOTPAGEOFF]
Lloh98:
	ldr	w9, [x9]
	tst	w9, w10
	b.eq	LBB0_19
; %bb.17:
Lloh99:
	adrp	x9, _SPEED_100@GOTPAGE
Lloh100:
	ldr	x9, [x9, _SPEED_100@GOTPAGEOFF]
	b	LBB0_20
LBB0_18:
	ldr	w1, [x20]
Lloh101:
	adrp	x8, _MII_STAT1000@GOTPAGE
Lloh102:
	ldr	x8, [x8, _MII_STAT1000@GOTPAGEOFF]
Lloh103:
	ldr	w2, [x8]
	mov	x0, x20
	bl	_mii_read
	mov	x25, x0
	lsr	w0, w0, #31
	bl	_unlikely
	cbnz	x0, LBB0_5
	b	LBB0_10
LBB0_19:
Lloh104:
	adrp	x9, _LPA_10HALF@GOTPAGE
Lloh105:
	ldr	x9, [x9, _LPA_10HALF@GOTPAGEOFF]
Lloh106:
	ldr	w9, [x9]
Lloh107:
	adrp	x13, _LPA_10FULL@GOTPAGE
Lloh108:
	ldr	x13, [x13, _LPA_10FULL@GOTPAGEOFF]
Lloh109:
	ldr	w13, [x13]
	orr	w9, w13, w9
Lloh110:
	adrp	x13, _SPEED_10@GOTPAGE
Lloh111:
	ldr	x13, [x13, _SPEED_10@GOTPAGEOFF]
Lloh112:
	adrp	x14, _SPEED_INVALID@GOTPAGE
Lloh113:
	ldr	x14, [x14, _SPEED_INVALID@GOTPAGEOFF]
	tst	w9, w10
	csel	x9, x14, x13, eq
LBB0_20:
	ldr	w9, [x9]
	tst	w12, w11
	b.ne	LBB0_22
; %bb.21:
Lloh114:
	adrp	x11, _LPA_DUPLEX@GOTPAGE
Lloh115:
	ldr	x11, [x11, _LPA_DUPLEX@GOTPAGEOFF]
Lloh116:
	ldr	w11, [x11]
	tst	w11, w10
	b.eq	LBB0_23
LBB0_22:
Lloh117:
	adrp	x10, _DUPLEX_FULL@GOTPAGE
Lloh118:
	ldr	x10, [x10, _DUPLEX_FULL@GOTPAGEOFF]
	b	LBB0_25
LBB0_23:
Lloh119:
	adrp	x10, _SPEED_INVALID@GOTPAGE
Lloh120:
	ldr	x10, [x10, _SPEED_INVALID@GOTPAGEOFF]
Lloh121:
	ldr	w10, [x10]
Lloh122:
	adrp	x11, _DUPLEX_HALF@GOTPAGE
Lloh123:
	ldr	x11, [x11, _DUPLEX_HALF@GOTPAGEOFF]
Lloh124:
	adrp	x12, _DUPLEX_INVALID@GOTPAGE
Lloh125:
	ldr	x12, [x12, _DUPLEX_INVALID@GOTPAGEOFF]
	cmp	w9, w10
LBB0_24:
	csel	x10, x12, x11, eq
LBB0_25:
	mov	w25, #0
	ldr	w10, [x10]
	stp	w8, w9, [x20, #12]
	str	w10, [x20, #20]
Lloh126:
	adrp	x8, _BMSR_LSTATUS@GOTPAGE
Lloh127:
	ldr	x8, [x8, _BMSR_LSTATUS@GOTPAGEOFF]
Lloh128:
	ldr	w8, [x8]
	tst	w8, w21
	cset	w8, ne
	str	w8, [x19]
	b	LBB0_5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh60, Lloh61, Lloh62
	.loh AdrpLdrGotLdr	Lloh56, Lloh57, Lloh59
	.loh AdrpLdrGotLdr	Lloh54, Lloh55, Lloh58
	.loh AdrpLdrGotLdr	Lloh51, Lloh52, Lloh53
	.loh AdrpLdrGotLdr	Lloh48, Lloh49, Lloh50
	.loh AdrpLdrGotLdr	Lloh44, Lloh45, Lloh47
	.loh AdrpLdrGotLdr	Lloh42, Lloh43, Lloh46
	.loh AdrpLdrGotLdr	Lloh39, Lloh40, Lloh41
	.loh AdrpLdrGotLdr	Lloh36, Lloh37, Lloh38
	.loh AdrpLdrGotLdr	Lloh32, Lloh33, Lloh35
	.loh AdrpLdrGotLdr	Lloh30, Lloh31, Lloh34
	.loh AdrpLdrGotLdr	Lloh27, Lloh28, Lloh29
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh69, Lloh70, Lloh71
	.loh AdrpLdrGotLdr	Lloh66, Lloh67, Lloh68
	.loh AdrpLdrGotLdr	Lloh63, Lloh64, Lloh65
	.loh AdrpLdrGot	Lloh72, Lloh73
	.loh AdrpLdrGotLdr	Lloh74, Lloh75, Lloh76
	.loh AdrpLdrGot	Lloh94, Lloh95
	.loh AdrpLdrGot	Lloh92, Lloh93
	.loh AdrpLdrGotLdr	Lloh89, Lloh90, Lloh91
	.loh AdrpLdrGot	Lloh87, Lloh88
	.loh AdrpLdrGotLdr	Lloh84, Lloh85, Lloh86
	.loh AdrpLdrGot	Lloh82, Lloh83
	.loh AdrpLdrGot	Lloh80, Lloh81
	.loh AdrpLdrGotLdr	Lloh77, Lloh78, Lloh79
	.loh AdrpLdrGotLdr	Lloh96, Lloh97, Lloh98
	.loh AdrpLdrGot	Lloh99, Lloh100
	.loh AdrpLdrGotLdr	Lloh101, Lloh102, Lloh103
	.loh AdrpLdrGot	Lloh112, Lloh113
	.loh AdrpLdrGot	Lloh110, Lloh111
	.loh AdrpLdrGotLdr	Lloh107, Lloh108, Lloh109
	.loh AdrpLdrGotLdr	Lloh104, Lloh105, Lloh106
	.loh AdrpLdrGotLdr	Lloh114, Lloh115, Lloh116
	.loh AdrpLdrGot	Lloh117, Lloh118
	.loh AdrpLdrGot	Lloh124, Lloh125
	.loh AdrpLdrGot	Lloh122, Lloh123
	.loh AdrpLdrGotLdr	Lloh119, Lloh120, Lloh121
	.loh AdrpLdrGotLdr	Lloh126, Lloh127, Lloh128
	.cfi_endproc
                                        ; -- End function
	.comm	_MII_BMCR,4,2                   ; @MII_BMCR
	.comm	_MII_BMSR,4,2                   ; @MII_BMSR
	.comm	_MII_ADVERTISE,4,2              ; @MII_ADVERTISE
	.comm	_MII_LPA,4,2                    ; @MII_LPA
	.comm	_BMSR_ESTATEN,4,2               ; @BMSR_ESTATEN
	.comm	_MII_ESTATUS,4,2                ; @MII_ESTATUS
	.comm	_MII_CTRL1000,4,2               ; @MII_CTRL1000
	.comm	_MII_STAT1000,4,2               ; @MII_STAT1000
	.comm	_BMSR_ANEGCAPABLE,4,2           ; @BMSR_ANEGCAPABLE
	.comm	_SUPPORTED_Autoneg,4,2          ; @SUPPORTED_Autoneg
	.comm	_BMSR_10HALF,4,2                ; @BMSR_10HALF
	.comm	_SUPPORTED_10baseT_Half,4,2     ; @SUPPORTED_10baseT_Half
	.comm	_BMSR_10FULL,4,2                ; @BMSR_10FULL
	.comm	_SUPPORTED_10baseT_Full,4,2     ; @SUPPORTED_10baseT_Full
	.comm	_BMSR_100HALF,4,2               ; @BMSR_100HALF
	.comm	_SUPPORTED_100baseT_Half,4,2    ; @SUPPORTED_100baseT_Half
	.comm	_BMSR_100FULL,4,2               ; @BMSR_100FULL
	.comm	_SUPPORTED_100baseT_Full,4,2    ; @SUPPORTED_100baseT_Full
	.comm	_ESTATUS_1000_THALF,4,2         ; @ESTATUS_1000_THALF
	.comm	_SUPPORTED_1000baseT_Half,4,2   ; @SUPPORTED_1000baseT_Half
	.comm	_ESTATUS_1000_TFULL,4,2         ; @ESTATUS_1000_TFULL
	.comm	_SUPPORTED_1000baseT_Full,4,2   ; @SUPPORTED_1000baseT_Full
	.comm	_BMCR_ANENABLE,4,2              ; @BMCR_ANENABLE
	.comm	_ADVERTISED_Autoneg,4,2         ; @ADVERTISED_Autoneg
	.comm	_LPA_1000FULL,4,2               ; @LPA_1000FULL
	.comm	_LPA_1000HALF,4,2               ; @LPA_1000HALF
	.comm	_SPEED_1000,4,2                 ; @SPEED_1000
	.comm	_LPA_100,4,2                    ; @LPA_100
	.comm	_SPEED_100,4,2                  ; @SPEED_100
	.comm	_LPA_10HALF,4,2                 ; @LPA_10HALF
	.comm	_LPA_10FULL,4,2                 ; @LPA_10FULL
	.comm	_SPEED_10,4,2                   ; @SPEED_10
	.comm	_SPEED_INVALID,4,2              ; @SPEED_INVALID
	.comm	_LPA_DUPLEX,4,2                 ; @LPA_DUPLEX
	.comm	_DUPLEX_FULL,4,2                ; @DUPLEX_FULL
	.comm	_DUPLEX_HALF,4,2                ; @DUPLEX_HALF
	.comm	_DUPLEX_INVALID,4,2             ; @DUPLEX_INVALID
	.comm	_BMCR_SPEED1000,4,2             ; @BMCR_SPEED1000
	.comm	_BMCR_SPEED100,4,2              ; @BMCR_SPEED100
	.comm	_BMCR_FULLDPLX,4,2              ; @BMCR_FULLDPLX
	.comm	_BMSR_LSTATUS,4,2               ; @BMSR_LSTATUS
	.no_dead_strip	_link_status_mii
.subsections_via_symbols
