	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function mrf24j40_hw_init
_mrf24j40_hw_init:                      ## @mrf24j40_hw_init
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r14
	movl	16(%rdi), %edi
	movq	_REG_SOFTRST@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	$7, %edx
	callq	_regmap_write
	testl	%eax, %eax
	jne	LBB0_23
## %bb.1:
	movl	16(%r14), %edi
	movq	_REG_PACON2@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	$152, %edx
	callq	_regmap_write
	testl	%eax, %eax
	jne	LBB0_23
## %bb.2:
	movl	16(%r14), %edi
	movq	_REG_TXSTBL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	$149, %edx
	callq	_regmap_write
	testl	%eax, %eax
	jne	LBB0_23
## %bb.3:
	movl	(%r14), %edi
	movq	_REG_RFCON0@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	$3, %edx
	callq	_regmap_write
	testl	%eax, %eax
	jne	LBB0_23
## %bb.4:
	movl	(%r14), %edi
	movq	_REG_RFCON1@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	$1, %edx
	callq	_regmap_write
	testl	%eax, %eax
	jne	LBB0_23
## %bb.5:
	movl	(%r14), %edi
	movq	_REG_RFCON2@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	$128, %edx
	callq	_regmap_write
	testl	%eax, %eax
	jne	LBB0_23
## %bb.6:
	movl	(%r14), %edi
	movq	_REG_RFCON6@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	$144, %edx
	callq	_regmap_write
	testl	%eax, %eax
	jne	LBB0_23
## %bb.7:
	movl	(%r14), %edi
	movq	_REG_RFCON7@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	$128, %edx
	callq	_regmap_write
	testl	%eax, %eax
	jne	LBB0_23
## %bb.8:
	movl	(%r14), %edi
	movq	_REG_RFCON8@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	$16, %edx
	callq	_regmap_write
	testl	%eax, %eax
	jne	LBB0_23
## %bb.9:
	movl	(%r14), %edi
	movq	_REG_SLPCON1@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	$33, %edx
	callq	_regmap_write
	testl	%eax, %eax
	jne	LBB0_23
## %bb.10:
	movl	16(%r14), %edi
	movq	_REG_BBREG2@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	$128, %edx
	callq	_regmap_write
	testl	%eax, %eax
	jne	LBB0_23
## %bb.11:
	movl	16(%r14), %edi
	movq	_REG_CCAEDTH@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	$96, %edx
	callq	_regmap_write
	testl	%eax, %eax
	jne	LBB0_23
## %bb.12:
	movl	16(%r14), %edi
	movq	_REG_BBREG6@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	$64, %edx
	callq	_regmap_write
	testl	%eax, %eax
	jne	LBB0_23
## %bb.13:
	movl	16(%r14), %edi
	movq	_REG_RFCTL@GOTPCREL(%rip), %rbx
	movl	(%rbx), %esi
	movl	$4, %edx
	callq	_regmap_write
	testl	%eax, %eax
	jne	LBB0_23
## %bb.14:
	movl	16(%r14), %edi
	movl	(%rbx), %esi
	xorl	%edx, %edx
	callq	_regmap_write
	testl	%eax, %eax
	jne	LBB0_23
## %bb.15:
	movl	$192, %edi
	callq	_udelay
	movl	16(%r14), %edi
	movq	_REG_RXMCR@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	$3, %edx
	xorl	%ecx, %ecx
	callq	_regmap_update_bits
	testl	%eax, %eax
	je	LBB0_16
LBB0_23:
	movl	%eax, %ebx
LBB0_24:
	movl	%ebx, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_16:
	movq	8(%r14), %rdi
	callq	_spi_get_device_id
	movq	(%rax), %rax
	movq	_MRF24J40MC@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jne	LBB0_18
## %bb.17:
	movl	(%r14), %edi
	movq	_REG_TESTMODE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	$7, %edx
	movl	$7, %ecx
	callq	_regmap_update_bits
	movl	16(%r14), %edi
	movq	_REG_TRISGPIO@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	$8, %edx
	movl	$8, %ecx
	callq	_regmap_update_bits
	movl	16(%r14), %edi
	movq	_REG_GPIO@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	$8, %edx
	movl	$8, %ecx
	callq	_regmap_update_bits
	movl	(%r14), %edi
	movq	_REG_RFCON3@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	$40, %edx
	callq	_regmap_write
LBB0_18:
	movq	8(%r14), %rax
	movl	4(%rax), %edi
	callq	_irq_get_trigger_type
	movl	%eax, %r15d
	cmpl	$129, %eax
	je	LBB0_20
## %bb.19:
	movq	_IRQ_TYPE_EDGE_FALLING@GOTPCREL(%rip), %rax
	cmpl	(%rax), %r15d
	jne	LBB0_21
LBB0_20:
	movq	8(%r14), %rdi
	leaq	L_.str(%rip), %rsi
	callq	_dev_warn
LBB0_21:
	andl	$-2, %r15d
	xorl	%ebx, %ebx
	cmpl	$128, %r15d
	jne	LBB0_24
## %bb.22:
	movl	(%r14), %edi
	movq	_REG_SLPCON0@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_BIT_INTEDGE@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movl	%ecx, %edx
	callq	_regmap_update_bits
	testl	%eax, %eax
	jne	LBB0_23
	jmp	LBB0_24
	.cfi_endproc
                                        ## -- End function
	.comm	_REG_SOFTRST,4,2                ## @REG_SOFTRST
	.comm	_REG_PACON2,4,2                 ## @REG_PACON2
	.comm	_REG_TXSTBL,4,2                 ## @REG_TXSTBL
	.comm	_REG_RFCON0,4,2                 ## @REG_RFCON0
	.comm	_REG_RFCON1,4,2                 ## @REG_RFCON1
	.comm	_REG_RFCON2,4,2                 ## @REG_RFCON2
	.comm	_REG_RFCON6,4,2                 ## @REG_RFCON6
	.comm	_REG_RFCON7,4,2                 ## @REG_RFCON7
	.comm	_REG_RFCON8,4,2                 ## @REG_RFCON8
	.comm	_REG_SLPCON1,4,2                ## @REG_SLPCON1
	.comm	_REG_BBREG2,4,2                 ## @REG_BBREG2
	.comm	_REG_CCAEDTH,4,2                ## @REG_CCAEDTH
	.comm	_REG_BBREG6,4,2                 ## @REG_BBREG6
	.comm	_REG_RFCTL,4,2                  ## @REG_RFCTL
	.comm	_REG_RXMCR,4,2                  ## @REG_RXMCR
	.comm	_MRF24J40MC,8,3                 ## @MRF24J40MC
	.comm	_REG_TESTMODE,4,2               ## @REG_TESTMODE
	.comm	_REG_TRISGPIO,4,2               ## @REG_TRISGPIO
	.comm	_REG_GPIO,4,2                   ## @REG_GPIO
	.comm	_REG_RFCON3,4,2                 ## @REG_RFCON3
	.comm	_IRQ_TYPE_EDGE_FALLING,4,2      ## @IRQ_TYPE_EDGE_FALLING
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"Using edge triggered irq's are not recommended, because it can cause races and result in a non-functional driver!\n"

	.comm	_REG_SLPCON0,4,2                ## @REG_SLPCON0
	.comm	_BIT_INTEDGE,4,2                ## @BIT_INTEDGE
	.no_dead_strip	_mrf24j40_hw_init
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function mrf24j40_hw_init
_mrf24j40_hw_init:                      ; @mrf24j40_hw_init
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x19, x0
	ldr	w0, [x0, #16]
Lloh0:
	adrp	x8, _REG_SOFTRST@GOTPAGE
Lloh1:
	ldr	x8, [x8, _REG_SOFTRST@GOTPAGEOFF]
Lloh2:
	ldr	w1, [x8]
	mov	w2, #7
	bl	_regmap_write
	cbnz	w0, LBB0_24
; %bb.1:
	ldr	w0, [x19, #16]
Lloh3:
	adrp	x8, _REG_PACON2@GOTPAGE
Lloh4:
	ldr	x8, [x8, _REG_PACON2@GOTPAGEOFF]
Lloh5:
	ldr	w1, [x8]
	mov	w2, #152
	bl	_regmap_write
	cbnz	w0, LBB0_24
; %bb.2:
	ldr	w0, [x19, #16]
Lloh6:
	adrp	x8, _REG_TXSTBL@GOTPAGE
Lloh7:
	ldr	x8, [x8, _REG_TXSTBL@GOTPAGEOFF]
Lloh8:
	ldr	w1, [x8]
	mov	w2, #149
	bl	_regmap_write
	cbnz	w0, LBB0_24
; %bb.3:
	ldr	w0, [x19]
Lloh9:
	adrp	x8, _REG_RFCON0@GOTPAGE
Lloh10:
	ldr	x8, [x8, _REG_RFCON0@GOTPAGEOFF]
Lloh11:
	ldr	w1, [x8]
	mov	w2, #3
	bl	_regmap_write
	cbnz	w0, LBB0_24
; %bb.4:
	ldr	w0, [x19]
Lloh12:
	adrp	x8, _REG_RFCON1@GOTPAGE
Lloh13:
	ldr	x8, [x8, _REG_RFCON1@GOTPAGEOFF]
Lloh14:
	ldr	w1, [x8]
	mov	w2, #1
	bl	_regmap_write
	cbnz	w0, LBB0_24
; %bb.5:
	ldr	w0, [x19]
Lloh15:
	adrp	x8, _REG_RFCON2@GOTPAGE
Lloh16:
	ldr	x8, [x8, _REG_RFCON2@GOTPAGEOFF]
Lloh17:
	ldr	w1, [x8]
	mov	w2, #128
	bl	_regmap_write
	cbnz	w0, LBB0_24
; %bb.6:
	ldr	w0, [x19]
Lloh18:
	adrp	x8, _REG_RFCON6@GOTPAGE
Lloh19:
	ldr	x8, [x8, _REG_RFCON6@GOTPAGEOFF]
Lloh20:
	ldr	w1, [x8]
	mov	w2, #144
	bl	_regmap_write
	cbnz	w0, LBB0_24
; %bb.7:
	ldr	w0, [x19]
Lloh21:
	adrp	x8, _REG_RFCON7@GOTPAGE
Lloh22:
	ldr	x8, [x8, _REG_RFCON7@GOTPAGEOFF]
Lloh23:
	ldr	w1, [x8]
	mov	w2, #128
	bl	_regmap_write
	cbnz	w0, LBB0_24
; %bb.8:
	ldr	w0, [x19]
Lloh24:
	adrp	x8, _REG_RFCON8@GOTPAGE
Lloh25:
	ldr	x8, [x8, _REG_RFCON8@GOTPAGEOFF]
Lloh26:
	ldr	w1, [x8]
	mov	w2, #16
	bl	_regmap_write
	cbnz	w0, LBB0_24
; %bb.9:
	ldr	w0, [x19]
Lloh27:
	adrp	x8, _REG_SLPCON1@GOTPAGE
Lloh28:
	ldr	x8, [x8, _REG_SLPCON1@GOTPAGEOFF]
Lloh29:
	ldr	w1, [x8]
	mov	w2, #33
	bl	_regmap_write
	cbnz	w0, LBB0_24
; %bb.10:
	ldr	w0, [x19, #16]
Lloh30:
	adrp	x8, _REG_BBREG2@GOTPAGE
Lloh31:
	ldr	x8, [x8, _REG_BBREG2@GOTPAGEOFF]
Lloh32:
	ldr	w1, [x8]
	mov	w2, #128
	bl	_regmap_write
	cbnz	w0, LBB0_24
; %bb.11:
	ldr	w0, [x19, #16]
Lloh33:
	adrp	x8, _REG_CCAEDTH@GOTPAGE
Lloh34:
	ldr	x8, [x8, _REG_CCAEDTH@GOTPAGEOFF]
Lloh35:
	ldr	w1, [x8]
	mov	w2, #96
	bl	_regmap_write
	cbnz	w0, LBB0_24
; %bb.12:
	ldr	w0, [x19, #16]
Lloh36:
	adrp	x8, _REG_BBREG6@GOTPAGE
Lloh37:
	ldr	x8, [x8, _REG_BBREG6@GOTPAGEOFF]
Lloh38:
	ldr	w1, [x8]
	mov	w2, #64
	bl	_regmap_write
	cbnz	w0, LBB0_24
; %bb.13:
	ldr	w0, [x19, #16]
Lloh39:
	adrp	x20, _REG_RFCTL@GOTPAGE
Lloh40:
	ldr	x20, [x20, _REG_RFCTL@GOTPAGEOFF]
	ldr	w1, [x20]
	mov	w2, #4
	bl	_regmap_write
	cbnz	w0, LBB0_24
; %bb.14:
	ldr	w0, [x19, #16]
	ldr	w1, [x20]
	mov	w2, #0
	bl	_regmap_write
	cbnz	w0, LBB0_24
; %bb.15:
	mov	w0, #192
	bl	_udelay
	ldr	w0, [x19, #16]
Lloh41:
	adrp	x8, _REG_RXMCR@GOTPAGE
Lloh42:
	ldr	x8, [x8, _REG_RXMCR@GOTPAGEOFF]
Lloh43:
	ldr	w1, [x8]
	mov	w2, #3
	mov	w3, #0
	bl	_regmap_update_bits
	cbnz	w0, LBB0_24
; %bb.16:
	ldr	x0, [x19, #8]
	bl	_spi_get_device_id
	ldr	x8, [x0]
Lloh44:
	adrp	x9, _MRF24J40MC@GOTPAGE
Lloh45:
	ldr	x9, [x9, _MRF24J40MC@GOTPAGEOFF]
Lloh46:
	ldr	x9, [x9]
	cmp	x8, x9
	b.ne	LBB0_18
; %bb.17:
	ldr	w0, [x19]
Lloh47:
	adrp	x8, _REG_TESTMODE@GOTPAGE
Lloh48:
	ldr	x8, [x8, _REG_TESTMODE@GOTPAGEOFF]
Lloh49:
	ldr	w1, [x8]
	mov	w2, #7
	mov	w3, #7
	bl	_regmap_update_bits
	ldr	w0, [x19, #16]
Lloh50:
	adrp	x8, _REG_TRISGPIO@GOTPAGE
Lloh51:
	ldr	x8, [x8, _REG_TRISGPIO@GOTPAGEOFF]
Lloh52:
	ldr	w1, [x8]
	mov	w2, #8
	mov	w3, #8
	bl	_regmap_update_bits
	ldr	w0, [x19, #16]
Lloh53:
	adrp	x8, _REG_GPIO@GOTPAGE
Lloh54:
	ldr	x8, [x8, _REG_GPIO@GOTPAGEOFF]
Lloh55:
	ldr	w1, [x8]
	mov	w2, #8
	mov	w3, #8
	bl	_regmap_update_bits
	ldr	w0, [x19]
Lloh56:
	adrp	x8, _REG_RFCON3@GOTPAGE
Lloh57:
	ldr	x8, [x8, _REG_RFCON3@GOTPAGEOFF]
Lloh58:
	ldr	w1, [x8]
	mov	w2, #40
	bl	_regmap_write
LBB0_18:
	ldr	x8, [x19, #8]
	ldr	w0, [x8, #4]
	bl	_irq_get_trigger_type
	mov	x20, x0
	cmp	w0, #129
	b.eq	LBB0_20
; %bb.19:
Lloh59:
	adrp	x8, _IRQ_TYPE_EDGE_FALLING@GOTPAGE
Lloh60:
	ldr	x8, [x8, _IRQ_TYPE_EDGE_FALLING@GOTPAGEOFF]
Lloh61:
	ldr	w8, [x8]
	cmp	w20, w8
	b.ne	LBB0_21
LBB0_20:
	ldr	x0, [x19, #8]
Lloh62:
	adrp	x1, l_.str@PAGE
Lloh63:
	add	x1, x1, l_.str@PAGEOFF
	bl	_dev_warn
LBB0_21:
	and	w8, w20, #0xfffffffe
	cmp	w8, #128
	b.ne	LBB0_23
; %bb.22:
	ldr	w0, [x19]
Lloh64:
	adrp	x8, _REG_SLPCON0@GOTPAGE
Lloh65:
	ldr	x8, [x8, _REG_SLPCON0@GOTPAGEOFF]
Lloh66:
	ldr	w1, [x8]
Lloh67:
	adrp	x8, _BIT_INTEDGE@GOTPAGE
Lloh68:
	ldr	x8, [x8, _BIT_INTEDGE@GOTPAGEOFF]
Lloh69:
	ldr	w2, [x8]
	mov	x3, x2
	bl	_regmap_update_bits
	b	LBB0_24
LBB0_23:
	mov	w0, #0
LBB0_24:
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.loh AdrpLdrGotLdr	Lloh27, Lloh28, Lloh29
	.loh AdrpLdrGotLdr	Lloh30, Lloh31, Lloh32
	.loh AdrpLdrGotLdr	Lloh33, Lloh34, Lloh35
	.loh AdrpLdrGotLdr	Lloh36, Lloh37, Lloh38
	.loh AdrpLdrGot	Lloh39, Lloh40
	.loh AdrpLdrGotLdr	Lloh41, Lloh42, Lloh43
	.loh AdrpLdrGotLdr	Lloh44, Lloh45, Lloh46
	.loh AdrpLdrGotLdr	Lloh56, Lloh57, Lloh58
	.loh AdrpLdrGotLdr	Lloh53, Lloh54, Lloh55
	.loh AdrpLdrGotLdr	Lloh50, Lloh51, Lloh52
	.loh AdrpLdrGotLdr	Lloh47, Lloh48, Lloh49
	.loh AdrpLdrGotLdr	Lloh59, Lloh60, Lloh61
	.loh AdrpAdd	Lloh62, Lloh63
	.loh AdrpLdrGotLdr	Lloh67, Lloh68, Lloh69
	.loh AdrpLdrGotLdr	Lloh64, Lloh65, Lloh66
	.cfi_endproc
                                        ; -- End function
	.comm	_REG_SOFTRST,4,2                ; @REG_SOFTRST
	.comm	_REG_PACON2,4,2                 ; @REG_PACON2
	.comm	_REG_TXSTBL,4,2                 ; @REG_TXSTBL
	.comm	_REG_RFCON0,4,2                 ; @REG_RFCON0
	.comm	_REG_RFCON1,4,2                 ; @REG_RFCON1
	.comm	_REG_RFCON2,4,2                 ; @REG_RFCON2
	.comm	_REG_RFCON6,4,2                 ; @REG_RFCON6
	.comm	_REG_RFCON7,4,2                 ; @REG_RFCON7
	.comm	_REG_RFCON8,4,2                 ; @REG_RFCON8
	.comm	_REG_SLPCON1,4,2                ; @REG_SLPCON1
	.comm	_REG_BBREG2,4,2                 ; @REG_BBREG2
	.comm	_REG_CCAEDTH,4,2                ; @REG_CCAEDTH
	.comm	_REG_BBREG6,4,2                 ; @REG_BBREG6
	.comm	_REG_RFCTL,4,2                  ; @REG_RFCTL
	.comm	_REG_RXMCR,4,2                  ; @REG_RXMCR
	.comm	_MRF24J40MC,8,3                 ; @MRF24J40MC
	.comm	_REG_TESTMODE,4,2               ; @REG_TESTMODE
	.comm	_REG_TRISGPIO,4,2               ; @REG_TRISGPIO
	.comm	_REG_GPIO,4,2                   ; @REG_GPIO
	.comm	_REG_RFCON3,4,2                 ; @REG_RFCON3
	.comm	_IRQ_TYPE_EDGE_FALLING,4,2      ; @IRQ_TYPE_EDGE_FALLING
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"Using edge triggered irq's are not recommended, because it can cause races and result in a non-functional driver!\n"

	.comm	_REG_SLPCON0,4,2                ; @REG_SLPCON0
	.comm	_BIT_INTEDGE,4,2                ; @BIT_INTEDGE
	.no_dead_strip	_mrf24j40_hw_init
.subsections_via_symbols
