	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function hv_pcie_init_irq_domain
_hv_pcie_init_irq_domain:               ## @hv_pcie_init_irq_domain
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -24
	movq	%rdi, %rbx
	leaq	16(%rdi), %rsi
	movq	_hv_msi_irq_chip@GOTPCREL(%rip), %rax
	movq	%rax, 56(%rdi)
	movq	_hv_msi_ops@GOTPCREL(%rip), %rax
	movq	%rax, 48(%rdi)
	movq	_MSI_FLAG_USE_DEF_DOM_OPS@GOTPCREL(%rip), %rax
	movq	_MSI_FLAG_USE_DEF_CHIP_OPS@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	orl	(%rax), %ecx
	movq	_MSI_FLAG_MULTI_PCI_MSI@GOTPCREL(%rip), %rax
	orl	(%rax), %ecx
	movq	_MSI_FLAG_PCI_MSIX@GOTPCREL(%rip), %rax
	orl	(%rax), %ecx
	movl	%ecx, 16(%rdi)
	movq	_handle_edge_irq@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 40(%rdi)
	leaq	L_.str(%rip), %rax
	movq	%rax, 24(%rdi)
	movq	%rdi, 32(%rdi)
	movl	64(%rdi), %edi
	movq	_x86_vector_domain@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	callq	_pci_msi_create_irq_domain
	movl	%eax, %ecx
	movl	%eax, 8(%rbx)
	xorl	%eax, %eax
	testl	%ecx, %ecx
	jne	LBB0_2
## %bb.1:
	movq	(%rbx), %rdi
	leaq	L_.str.1(%rip), %rsi
	callq	_dev_err
	movq	_ENODEV@GOTPCREL(%rip), %rcx
	xorl	%eax, %eax
	subl	(%rcx), %eax
LBB0_2:
	addq	$8, %rsp
	popq	%rbx
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_hv_msi_irq_chip,4,2            ## @hv_msi_irq_chip
	.comm	_hv_msi_ops,4,2                 ## @hv_msi_ops
	.comm	_MSI_FLAG_USE_DEF_DOM_OPS,4,2   ## @MSI_FLAG_USE_DEF_DOM_OPS
	.comm	_MSI_FLAG_USE_DEF_CHIP_OPS,4,2  ## @MSI_FLAG_USE_DEF_CHIP_OPS
	.comm	_MSI_FLAG_MULTI_PCI_MSI,4,2     ## @MSI_FLAG_MULTI_PCI_MSI
	.comm	_MSI_FLAG_PCI_MSIX,4,2          ## @MSI_FLAG_PCI_MSIX
	.comm	_handle_edge_irq,4,2            ## @handle_edge_irq
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"edge"

	.comm	_x86_vector_domain,4,2          ## @x86_vector_domain
L_.str.1:                               ## @.str.1
	.asciz	"Failed to build an MSI IRQ domain\n"

	.comm	_ENODEV,4,2                     ## @ENODEV
	.no_dead_strip	_hv_pcie_init_irq_domain
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function hv_pcie_init_irq_domain
_hv_pcie_init_irq_domain:               ; @hv_pcie_init_irq_domain
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x19, x0
Lloh0:
	adrp	x8, _hv_msi_irq_chip@GOTPAGE
Lloh1:
	ldr	x8, [x8, _hv_msi_irq_chip@GOTPAGEOFF]
Lloh2:
	adrp	x9, _hv_msi_ops@GOTPAGE
Lloh3:
	ldr	x9, [x9, _hv_msi_ops@GOTPAGEOFF]
	stp	x9, x8, [x0, #48]
Lloh4:
	adrp	x8, _MSI_FLAG_USE_DEF_DOM_OPS@GOTPAGE
Lloh5:
	ldr	x8, [x8, _MSI_FLAG_USE_DEF_DOM_OPS@GOTPAGEOFF]
Lloh6:
	ldr	w8, [x8]
Lloh7:
	adrp	x9, _MSI_FLAG_USE_DEF_CHIP_OPS@GOTPAGE
Lloh8:
	ldr	x9, [x9, _MSI_FLAG_USE_DEF_CHIP_OPS@GOTPAGEOFF]
Lloh9:
	ldr	w9, [x9]
	orr	w8, w9, w8
Lloh10:
	adrp	x9, _MSI_FLAG_MULTI_PCI_MSI@GOTPAGE
Lloh11:
	ldr	x9, [x9, _MSI_FLAG_MULTI_PCI_MSI@GOTPAGEOFF]
Lloh12:
	ldr	w9, [x9]
Lloh13:
	adrp	x10, _MSI_FLAG_PCI_MSIX@GOTPAGE
Lloh14:
	ldr	x10, [x10, _MSI_FLAG_PCI_MSIX@GOTPAGEOFF]
	orr	w8, w8, w9
Lloh15:
	ldr	w9, [x10]
	orr	w8, w8, w9
	mov	x1, x0
	str	w8, [x1, #16]!
Lloh16:
	adrp	x8, _handle_edge_irq@GOTPAGE
Lloh17:
	ldr	x8, [x8, _handle_edge_irq@GOTPAGEOFF]
Lloh18:
	ldr	w8, [x8]
	str	w8, [x0, #40]
Lloh19:
	adrp	x8, l_.str@PAGE
Lloh20:
	add	x8, x8, l_.str@PAGEOFF
	stp	x8, x0, [x0, #24]
	ldr	w0, [x0, #64]
Lloh21:
	adrp	x8, _x86_vector_domain@GOTPAGE
Lloh22:
	ldr	x8, [x8, _x86_vector_domain@GOTPAGEOFF]
Lloh23:
	ldr	w2, [x8]
	bl	_pci_msi_create_irq_domain
	str	w0, [x19, #8]
	cbz	w0, LBB0_2
; %bb.1:
	mov	w0, #0
	b	LBB0_3
LBB0_2:
	ldr	x0, [x19]
Lloh24:
	adrp	x1, l_.str.1@PAGE
Lloh25:
	add	x1, x1, l_.str.1@PAGEOFF
	bl	_dev_err
Lloh26:
	adrp	x8, _ENODEV@GOTPAGE
Lloh27:
	ldr	x8, [x8, _ENODEV@GOTPAGEOFF]
Lloh28:
	ldr	w8, [x8]
	neg	w0, w8
LBB0_3:
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpAdd	Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh16, Lloh17, Lloh18
	.loh AdrpLdrGotLdr	Lloh13, Lloh14, Lloh15
	.loh AdrpLdrGotLdr	Lloh10, Lloh11, Lloh12
	.loh AdrpLdrGotLdr	Lloh7, Lloh8, Lloh9
	.loh AdrpLdrGotLdr	Lloh4, Lloh5, Lloh6
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh26, Lloh27, Lloh28
	.loh AdrpAdd	Lloh24, Lloh25
	.cfi_endproc
                                        ; -- End function
	.comm	_hv_msi_irq_chip,4,2            ; @hv_msi_irq_chip
	.comm	_hv_msi_ops,4,2                 ; @hv_msi_ops
	.comm	_MSI_FLAG_USE_DEF_DOM_OPS,4,2   ; @MSI_FLAG_USE_DEF_DOM_OPS
	.comm	_MSI_FLAG_USE_DEF_CHIP_OPS,4,2  ; @MSI_FLAG_USE_DEF_CHIP_OPS
	.comm	_MSI_FLAG_MULTI_PCI_MSI,4,2     ; @MSI_FLAG_MULTI_PCI_MSI
	.comm	_MSI_FLAG_PCI_MSIX,4,2          ; @MSI_FLAG_PCI_MSIX
	.comm	_handle_edge_irq,4,2            ; @handle_edge_irq
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"edge"

	.comm	_x86_vector_domain,4,2          ; @x86_vector_domain
l_.str.1:                               ; @.str.1
	.asciz	"Failed to build an MSI IRQ domain\n"

	.comm	_ENODEV,4,2                     ; @ENODEV
	.no_dead_strip	_hv_pcie_init_irq_domain
.subsections_via_symbols
