	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function advk_pcie_handle_int
_advk_pcie_handle_int:                  ## @advk_pcie_handle_int
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r14
	movq	_PCIE_ISR0_REG@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_advk_readl
	movl	%eax, %r15d
	movq	_PCIE_ISR0_MASK_REG@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	callq	_advk_readl
	movl	%eax, %ebx
	notl	%ebx
	movq	_PCIE_ISR0_ALL_MASK@GOTPCREL(%rip), %rax
	movl	%r15d, -44(%rbp)                ## 4-byte Spill
	andl	%r15d, %ebx
	andl	(%rax), %ebx
	movq	_PCIE_ISR1_REG@GOTPCREL(%rip), %r15
	movl	(%r15), %esi
	movq	%r14, %rdi
	callq	_advk_readl
	movl	%eax, %r13d
	movq	_PCIE_ISR1_MASK_REG@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	callq	_advk_readl
	movl	%eax, %r12d
	notl	%r12d
	movq	_PCIE_ISR1_ALL_MASK@GOTPCREL(%rip), %rax
	andl	%r13d, %r12d
	andl	(%rax), %r12d
	movl	%ebx, %eax
	orl	%r12d, %eax
	je	LBB0_9
## %bb.1:
	movq	_PCIE_ISR0_MSI_INT_PENDING@GOTPCREL(%rip), %rax
	testl	%ebx, (%rax)
	je	LBB0_3
## %bb.2:
	movq	%r14, %rdi
	callq	_advk_pcie_handle_msi
LBB0_3:
	movq	_PCI_NUM_INTX@GOTPCREL(%rip), %r13
	cmpl	$0, (%r13)
	jle	LBB0_8
## %bb.4:
	xorl	%ebx, %ebx
	jmp	LBB0_5
	.p2align	4, 0x90
LBB0_7:                                 ##   in Loop: Header=BB0_5 Depth=1
	incl	%ebx
	cmpl	(%r13), %ebx
	jge	LBB0_8
LBB0_5:                                 ## =>This Inner Loop Header: Depth=1
	movl	%ebx, %edi
	callq	_PCIE_ISR1_INTX_ASSERT
	testl	%r12d, %eax
	je	LBB0_7
## %bb.6:                               ##   in Loop: Header=BB0_5 Depth=1
	movl	%ebx, %edi
	callq	_PCIE_ISR1_INTX_ASSERT
	movl	(%r15), %edx
	movq	%r14, %rdi
	movl	%eax, %esi
	callq	_advk_writel
	movl	(%r14), %edi
	movl	%ebx, %esi
	callq	_irq_find_mapping
	movl	%eax, %edi
	callq	_generic_handle_irq
	jmp	LBB0_7
LBB0_9:
	movq	_PCIE_ISR0_REG@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r14, %rdi
	movl	-44(%rbp), %esi                 ## 4-byte Reload
	callq	_advk_writel
	movl	(%r15), %edx
	movq	%r14, %rdi
	movl	%r13d, %esi
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_advk_writel                    ## TAILCALL
LBB0_8:
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_PCIE_ISR0_REG,4,2              ## @PCIE_ISR0_REG
	.comm	_PCIE_ISR0_MASK_REG,4,2         ## @PCIE_ISR0_MASK_REG
	.comm	_PCIE_ISR0_ALL_MASK,4,2         ## @PCIE_ISR0_ALL_MASK
	.comm	_PCIE_ISR1_REG,4,2              ## @PCIE_ISR1_REG
	.comm	_PCIE_ISR1_MASK_REG,4,2         ## @PCIE_ISR1_MASK_REG
	.comm	_PCIE_ISR1_ALL_MASK,4,2         ## @PCIE_ISR1_ALL_MASK
	.comm	_PCIE_ISR0_MSI_INT_PENDING,4,2  ## @PCIE_ISR0_MSI_INT_PENDING
	.comm	_PCI_NUM_INTX,4,2               ## @PCI_NUM_INTX
	.no_dead_strip	_advk_pcie_handle_int
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function advk_pcie_handle_int
_advk_pcie_handle_int:                  ; @advk_pcie_handle_int
	.cfi_startproc
; %bb.0:
	stp	x26, x25, [sp, #-80]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	mov	x19, x0
Lloh0:
	adrp	x24, _PCIE_ISR0_REG@GOTPAGE
Lloh1:
	ldr	x24, [x24, _PCIE_ISR0_REG@GOTPAGEOFF]
	ldr	w1, [x24]
	bl	_advk_readl
	mov	x20, x0
Lloh2:
	adrp	x8, _PCIE_ISR0_MASK_REG@GOTPAGE
Lloh3:
	ldr	x8, [x8, _PCIE_ISR0_MASK_REG@GOTPAGEOFF]
Lloh4:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_advk_readl
Lloh5:
	adrp	x8, _PCIE_ISR0_ALL_MASK@GOTPAGE
Lloh6:
	ldr	x8, [x8, _PCIE_ISR0_ALL_MASK@GOTPAGEOFF]
Lloh7:
	ldr	w8, [x8]
	bic	w9, w20, w0
	and	w25, w9, w8
Lloh8:
	adrp	x22, _PCIE_ISR1_REG@GOTPAGE
Lloh9:
	ldr	x22, [x22, _PCIE_ISR1_REG@GOTPAGEOFF]
	ldr	w1, [x22]
	mov	x0, x19
	bl	_advk_readl
	mov	x21, x0
Lloh10:
	adrp	x8, _PCIE_ISR1_MASK_REG@GOTPAGE
Lloh11:
	ldr	x8, [x8, _PCIE_ISR1_MASK_REG@GOTPAGEOFF]
Lloh12:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_advk_readl
Lloh13:
	adrp	x8, _PCIE_ISR1_ALL_MASK@GOTPAGE
Lloh14:
	ldr	x8, [x8, _PCIE_ISR1_ALL_MASK@GOTPAGEOFF]
Lloh15:
	ldr	w8, [x8]
	bic	w9, w21, w0
	and	w23, w9, w8
	orr	w8, w25, w23
	cbz	w8, LBB0_8
; %bb.1:
Lloh16:
	adrp	x8, _PCIE_ISR0_MSI_INT_PENDING@GOTPAGE
Lloh17:
	ldr	x8, [x8, _PCIE_ISR0_MSI_INT_PENDING@GOTPAGEOFF]
Lloh18:
	ldr	w8, [x8]
	tst	w8, w25
	b.eq	LBB0_3
; %bb.2:
	mov	x0, x19
	bl	_advk_pcie_handle_msi
LBB0_3:
Lloh19:
	adrp	x21, _PCI_NUM_INTX@GOTPAGE
Lloh20:
	ldr	x21, [x21, _PCI_NUM_INTX@GOTPAGEOFF]
	ldr	w8, [x21]
	cmp	w8, #1
	b.lt	LBB0_9
; %bb.4:
	mov	w20, #0
	b	LBB0_6
LBB0_5:                                 ;   in Loop: Header=BB0_6 Depth=1
	add	w20, w20, #1
	ldr	w8, [x21]
	cmp	w20, w8
	b.ge	LBB0_9
LBB0_6:                                 ; =>This Inner Loop Header: Depth=1
	mov	x0, x20
	bl	_PCIE_ISR1_INTX_ASSERT
	tst	w0, w23
	b.eq	LBB0_5
; %bb.7:                                ;   in Loop: Header=BB0_6 Depth=1
	mov	x0, x20
	bl	_PCIE_ISR1_INTX_ASSERT
	mov	x1, x0
	ldr	w2, [x22]
	mov	x0, x19
	bl	_advk_writel
	ldr	w0, [x19]
	mov	x1, x20
	bl	_irq_find_mapping
	bl	_generic_handle_irq
	b	LBB0_5
LBB0_8:
	ldr	w2, [x24]
	mov	x0, x19
	mov	x1, x20
	bl	_advk_writel
	ldr	w2, [x22]
	mov	x0, x19
	mov	x1, x21
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp], #80             ; 16-byte Folded Reload
	b	_advk_writel
LBB0_9:
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp], #80             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh13, Lloh14, Lloh15
	.loh AdrpLdrGotLdr	Lloh10, Lloh11, Lloh12
	.loh AdrpLdrGot	Lloh8, Lloh9
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh16, Lloh17, Lloh18
	.loh AdrpLdrGot	Lloh19, Lloh20
	.cfi_endproc
                                        ; -- End function
	.comm	_PCIE_ISR0_REG,4,2              ; @PCIE_ISR0_REG
	.comm	_PCIE_ISR0_MASK_REG,4,2         ; @PCIE_ISR0_MASK_REG
	.comm	_PCIE_ISR0_ALL_MASK,4,2         ; @PCIE_ISR0_ALL_MASK
	.comm	_PCIE_ISR1_REG,4,2              ; @PCIE_ISR1_REG
	.comm	_PCIE_ISR1_MASK_REG,4,2         ; @PCIE_ISR1_MASK_REG
	.comm	_PCIE_ISR1_ALL_MASK,4,2         ; @PCIE_ISR1_ALL_MASK
	.comm	_PCIE_ISR0_MSI_INT_PENDING,4,2  ; @PCIE_ISR0_MSI_INT_PENDING
	.comm	_PCI_NUM_INTX,4,2               ; @PCI_NUM_INTX
	.no_dead_strip	_advk_pcie_handle_int
.subsections_via_symbols
