	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_ath9k_hw_fill_cap_info         ## -- Begin function ath9k_hw_fill_cap_info
	.p2align	4, 0x90
_ath9k_hw_fill_cap_info:                ## @ath9k_hw_fill_cap_info
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r13
	callq	_ath9k_hw_regulatory
	movq	%rax, %r15
	movq	%r13, %rdi
	callq	_ath9k_hw_common
	movq	%rax, %rbx
	movq	32(%r13), %rax
	movq	_EEP_REG_0@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	movq	%r13, %rdi
	callq	*(%rax)
                                        ## kill: def $eax killed $eax def $rax
	movl	%eax, (%r15)
	movq	(%r13), %rcx
	movq	_NL80211_IFTYPE_AP@GOTPCREL(%rip), %rdx
	cmpq	(%rdx), %rcx
	je	LBB0_7
## %bb.1:
	movq	56(%r13), %rcx
	movq	_AR_SUBVENDOR_ID_NEW_A@GOTPCREL(%rip), %rdx
	cmpq	(%rdx), %rcx
	jne	LBB0_7
## %bb.2:
	leal	-100(%rax), %ecx
	cmpl	$2, %ecx
	jae	LBB0_3
## %bb.4:
	addl	$5, %eax
	movl	%eax, %ecx
	jmp	LBB0_5
LBB0_3:
	movl	$67, %ecx
	cmpl	$65, %eax
	jne	LBB0_6
LBB0_5:
	movl	%ecx, (%r15)
	movl	%ecx, %eax
LBB0_6:
	movq	_REGULATORY@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	leaq	L_.str(%rip), %rdx
	movq	%rbx, %rdi
	movl	%eax, %ecx
	callq	_ath_dbg
LBB0_7:
	leaq	96(%r13), %r12
	movq	32(%r13), %rax
	movq	_EEP_OP_MODE@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	movq	%r13, %rdi
	callq	*(%rax)
	movl	%eax, %r15d
	movq	_AR5416_OPFLAGS_11A@GOTPCREL(%rip), %rax
	testl	%r15d, (%rax)
	je	LBB0_11
## %bb.8:
	cmpq	$0, 88(%r13)
	je	LBB0_10
## %bb.9:
	leaq	L_.str.1(%rip), %rsi
	movq	%rbx, %rdi
	callq	_ath_warn
	jmp	LBB0_11
LBB0_10:
	movq	_ATH9K_HW_CAP_5GHZ@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	orl	%eax, (%r12)
LBB0_11:
	movq	_AR5416_OPFLAGS_11G@GOTPCREL(%rip), %rax
	testl	%r15d, (%rax)
	je	LBB0_15
## %bb.12:
	cmpq	$0, 80(%r13)
	je	LBB0_14
## %bb.13:
	leaq	L_.str.2(%rip), %rsi
	movq	%rbx, %rdi
	callq	_ath_warn
	jmp	LBB0_15
LBB0_14:
	movq	_ATH9K_HW_CAP_2GHZ@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	orl	%eax, (%r12)
LBB0_15:
	movq	_ATH9K_HW_CAP_2GHZ@GOTPCREL(%rip), %rax
	movq	_ATH9K_HW_CAP_5GHZ@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	orl	(%rax), %ecx
	testl	%ecx, (%r12)
	je	LBB0_16
## %bb.17:
	movq	%r13, %rdi
	callq	_ath9k_gpio_cap_init
	movq	%r13, %rdi
	callq	_AR_SREV_9485
	movl	$1, %r14d
	testq	%rax, %rax
	jne	LBB0_27
## %bb.18:
	movq	%r13, %rdi
	callq	_AR_SREV_9285
	testq	%rax, %rax
	jne	LBB0_27
## %bb.19:
	movq	%r13, %rdi
	callq	_AR_SREV_9330
	testq	%rax, %rax
	jne	LBB0_27
## %bb.20:
	movq	%r13, %rdi
	callq	_AR_SREV_9565
	testq	%rax, %rax
	je	LBB0_21
LBB0_27:
	movl	%r14d, 100(%r13)
	movq	32(%r13), %rax
	movq	_EEP_TX_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	movq	%r13, %rdi
	callq	*(%rax)
	movl	%eax, 104(%r13)
	movq	64(%r13), %rax
	movq	_AR5416_DEVID_PCI@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jne	LBB0_31
## %bb.28:
	movq	_AR5416_OPFLAGS_11A@GOTPCREL(%rip), %rax
	testl	%r15d, (%rax)
	jne	LBB0_31
## %bb.29:
	movq	%r13, %rdi
	callq	_AR_SREV_9271
	testq	%rax, %rax
	je	LBB0_30
LBB0_31:
	movq	%r13, %rdi
	callq	_AR_SREV_9100
	movq	%rax, %rcx
	movl	$7, %eax
	testq	%rcx, %rcx
	jne	LBB0_33
## %bb.32:
	movq	32(%r13), %rax
	movq	_EEP_RX_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	movq	%r13, %rdi
	callq	*(%rax)
LBB0_33:
	movl	%eax, 108(%r13)
	movl	100(%r13), %edi
	movl	104(%r13), %esi
	callq	_fixup_chainmask
	movl	%eax, 104(%r13)
	movl	100(%r13), %edi
	movl	108(%r13), %esi
	callq	_fixup_chainmask
	movl	%eax, 108(%r13)
	movl	104(%r13), %ecx
	movl	%ecx, 8(%r13)
	movl	%eax, 12(%r13)
	movq	_AR_PCU_MIC_NEW_LOC_ENA@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	orl	%eax, 72(%r13)
	movq	%r13, %rdi
	callq	_AR_SREV_9300_20_OR_LATER
	testq	%rax, %rax
	je	LBB0_35
## %bb.34:
	movq	_AR_PCU_ALWAYS_PERFORM_KEYSEARCH@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	orl	%eax, 72(%r13)
LBB0_35:
	movq	_ATH_CRYPT_CAP_CIPHER_AESCCM@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	orl	%eax, (%rbx)
	movq	64(%r13), %rcx
	movq	_AR2427_DEVID_PCIE@GOTPCREL(%rip), %rdx
	movq	_ATH9K_HW_CAP_HT@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	cmpq	(%rdx), %rcx
	jne	LBB0_36
## %bb.37:
	notl	%eax
	andl	(%r12), %eax
	jmp	LBB0_38
LBB0_16:
	leaq	L_.str.3(%rip), %rsi
	movq	%rbx, %rdi
	callq	_ath_err
	movq	_EINVAL@GOTPCREL(%rip), %rax
	xorl	%r14d, %r14d
	subl	(%rax), %r14d
	jmp	LBB0_98
LBB0_36:
	orl	(%r12), %eax
LBB0_38:
	movl	%eax, 96(%r13)
	movq	%r13, %rdi
	callq	_AR_SREV_9160_10_OR_LATER
	testq	%rax, %rax
	jne	LBB0_41
## %bb.39:
	movq	%r13, %rdi
	callq	_AR_SREV_9100
	testq	%rax, %rax
	je	LBB0_40
LBB0_41:
	movq	_ATH_AMPDU_LIMIT_MAX@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
LBB0_42:
	movl	%eax, 112(%r13)
	movq	%r13, %rdi
	callq	_AR_SREV_9271
	testq	%rax, %rax
	jne	LBB0_44
## %bb.43:
	movq	%r13, %rdi
	callq	_AR_SREV_9300_20_OR_LATER
	testq	%rax, %rax
	je	LBB0_45
LBB0_44:
	movq	_ATH9K_HW_CAP_AUTOSLEEP@GOTPCREL(%rip), %rcx
	movl	(%r12), %eax
	orl	(%rcx), %eax
LBB0_46:
	movl	%eax, 96(%r13)
	movq	%r13, %rdi
	callq	_AR_SREV_9280
	testq	%rax, %rax
	jne	LBB0_48
## %bb.47:
	movq	%r13, %rdi
	callq	_AR_SREV_9285
	testq	%rax, %rax
	je	LBB0_49
LBB0_48:
	movq	_ATH9K_HW_CAP_4KB_SPLITTRANS@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	notl	%eax
	andl	(%r12), %eax
LBB0_50:
	movl	%eax, 96(%r13)
	movq	%r13, %rdi
	callq	_AR_SREV_9300_20_OR_LATER
	testq	%rax, %rax
	je	LBB0_57
## %bb.51:
	movq	_ATH9K_HW_CAP_EDMA@GOTPCREL(%rip), %rax
	movq	_ATH9K_HW_CAP_FASTCLOCK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	orl	(%rax), %ecx
	orl	%ecx, 96(%r13)
	movq	%r13, %rdi
	callq	_AR_SREV_9330
	testq	%rax, %rax
	jne	LBB0_56
## %bb.52:
	movq	%r13, %rdi
	callq	_AR_SREV_9485
	testq	%rax, %rax
	jne	LBB0_56
## %bb.53:
	movq	%r13, %rdi
	callq	_AR_SREV_9561
	testq	%rax, %rax
	jne	LBB0_56
## %bb.54:
	movq	%r13, %rdi
	callq	_AR_SREV_9565
	testq	%rax, %rax
	jne	LBB0_56
## %bb.55:
	movq	_ATH9K_HW_CAP_LDPC@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	orl	%eax, (%r12)
LBB0_56:
	movq	_ATH9K_HW_RX_HP_QDEPTH@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 140(%r13)
	movq	_ATH9K_HW_RX_LP_QDEPTH@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 136(%r13)
	movabsq	$17179869188, %rax              ## imm = 0x400000004
	movq	%rax, 116(%r13)
	movl	$4, 124(%r13)
	jmp	LBB0_59
LBB0_57:
	movl	$4, 120(%r13)
	movq	%r13, %rdi
	callq	_AR_SREV_9280_20
	testq	%rax, %rax
	je	LBB0_59
## %bb.58:
	movq	_ATH9K_HW_CAP_FASTCLOCK@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	orl	%eax, (%r12)
LBB0_59:
	movq	%r13, %rdi
	callq	_AR_SREV_9300_20_OR_LATER
	testq	%rax, %rax
	je	LBB0_61
## %bb.60:
	movq	_ATH9K_HW_CAP_RAC_SUPPORTED@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	orl	%eax, (%r12)
LBB0_61:
	movq	%r13, %rdi
	callq	_AR_SREV_9561
	movq	%rax, %rcx
	movl	$62758912, %eax                 ## imm = 0x3BDA000
	testq	%rcx, %rcx
	jne	LBB0_64
## %bb.62:
	movq	%r13, %rdi
	callq	_AR_SREV_9300_20_OR_LATER
	testq	%rax, %rax
	je	LBB0_65
## %bb.63:
	movq	_AR_ENT_OTP@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r13, %rdi
	callq	_REG_READ
LBB0_64:
	movl	%eax, 20(%r13)
LBB0_65:
	movq	%r13, %rdi
	callq	_AR_SREV_9287_11_OR_LATER
	testq	%rax, %rax
	jne	LBB0_67
## %bb.66:
	movq	%r13, %rdi
	callq	_AR_SREV_9271
	testq	%rax, %rax
	je	LBB0_68
LBB0_67:
	movq	_ATH9K_HW_CAP_SGI_20@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	orl	%eax, (%r12)
LBB0_68:
	movq	%r13, %rdi
	callq	_AR_SREV_9285
	testq	%rax, %rax
	je	LBB0_72
## %bb.69:
	movq	32(%r13), %rax
	movq	_EEP_MODAL_VER@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	movq	%r13, %rdi
	callq	*(%rax)
	cmpl	$3, %eax
	jl	LBB0_72
## %bb.70:
	movq	32(%r13), %rax
	movq	_EEP_ANT_DIV_CTL1@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	movq	%r13, %rdi
	callq	*(%rax)
	notl	%eax
	testb	$9, %al
	jne	LBB0_72
## %bb.71:
	movq	_ATH9K_HW_CAP_ANT_DIV_COMB@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	orl	%eax, (%r12)
	leaq	L_.str.4(%rip), %rsi
	movq	%rbx, %rdi
	callq	_ath_info
LBB0_72:
	movq	%r13, %rdi
	callq	_AR_SREV_9300_20_OR_LATER
	testq	%rax, %rax
	je	LBB0_75
## %bb.73:
	movq	32(%r13), %rax
	movq	_EEP_CHAIN_MASK_REDUCE@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	movq	%r13, %rdi
	callq	*(%rax)
	testl	%eax, %eax
	je	LBB0_75
## %bb.74:
	movq	_ATH9K_HW_CAP_APM@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	orl	%eax, (%r12)
LBB0_75:
	movq	%r13, %rdi
	callq	_AR_SREV_9330
	testq	%rax, %rax
	jne	LBB0_78
## %bb.76:
	movq	%r13, %rdi
	callq	_AR_SREV_9485
	testq	%rax, %rax
	jne	LBB0_78
## %bb.77:
	movq	%r13, %rdi
	callq	_AR_SREV_9565
	testq	%rax, %rax
	je	LBB0_80
LBB0_78:
	movq	32(%r13), %rax
	movq	_EEP_ANT_DIV_CTL1@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	movq	%r13, %rdi
	callq	*(%rax)
	andl	$-64, %eax
	cmpl	$192, %eax
	jne	LBB0_80
## %bb.79:
	movq	_ATH9K_HW_CAP_ANT_DIV_COMB@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	orl	%eax, (%r12)
	leaq	L_.str.4(%rip), %rsi
	movq	%rbx, %rdi
	callq	_ath_info
LBB0_80:
	movq	%r13, %rdi
	callq	_ath9k_hw_dfs_tested
	testq	%rax, %rax
	je	LBB0_82
## %bb.81:
	movq	_ATH9K_HW_CAP_DFS@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	orl	%eax, (%r12)
LBB0_82:
	movl	104(%r13), %ebx
	movl	108(%r13), %eax
	movl	%ebx, %ecx
	orl	%eax, %ecx
	je	LBB0_89
	.p2align	4, 0x90
LBB0_83:                                ## =>This Inner Loop Header: Depth=1
	movl	%eax, %r14d
	xorl	%edi, %edi
	callq	_BIT
	testl	%ebx, %eax
	je	LBB0_85
## %bb.84:                              ##   in Loop: Header=BB0_83 Depth=1
	incl	132(%r13)
LBB0_85:                                ##   in Loop: Header=BB0_83 Depth=1
	xorl	%edi, %edi
	callq	_BIT
	testl	%r14d, %eax
	je	LBB0_87
## %bb.86:                              ##   in Loop: Header=BB0_83 Depth=1
	incl	128(%r13)
LBB0_87:                                ##   in Loop: Header=BB0_83 Depth=1
	movl	%ebx, %ecx
	sarl	%ecx
	movl	%r14d, %eax
	sarl	%eax
	cmpl	$1, %ebx
	movl	%ecx, %ebx
	ja	LBB0_83
## %bb.88:                              ##   in Loop: Header=BB0_83 Depth=1
	movl	%ecx, %ebx
	cmpl	$1, %r14d
	ja	LBB0_83
LBB0_89:
	movq	%r13, %rdi
	callq	_AR_SREV_9462
	testq	%rax, %rax
	jne	LBB0_91
## %bb.90:
	movq	%r13, %rdi
	callq	_AR_SREV_9565
	testq	%rax, %rax
	je	LBB0_95
LBB0_91:
	movq	_AR_ENT_OTP_49GHZ_DISABLE@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	testl	%eax, 20(%r13)
	jne	LBB0_93
## %bb.92:
	movq	_ATH9K_HW_CAP_MCI@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	orl	%eax, (%r12)
LBB0_93:
	movq	%r13, %rdi
	callq	_AR_SREV_9462_20_OR_LATER
	testq	%rax, %rax
	je	LBB0_95
## %bb.94:
	movq	_ATH9K_HW_CAP_RTT@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	orl	%eax, (%r12)
LBB0_95:
	movq	%r13, %rdi
	callq	_AR_SREV_9300_20_OR_LATER
	xorl	%r14d, %r14d
	testq	%rax, %rax
	je	LBB0_98
## %bb.96:
	movq	32(%r13), %rax
	movq	_EEP_PAPRD@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	movq	%r13, %rdi
	callq	*(%rax)
	testl	%eax, %eax
	je	LBB0_98
## %bb.97:
	movq	_ATH9K_HW_CAP_PAPRD@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	orl	%eax, (%r12)
LBB0_98:
	movl	%r14d, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_40:
	movl	$8192, %eax                     ## imm = 0x2000
	jmp	LBB0_42
LBB0_45:
	movq	_ATH9K_HW_CAP_AUTOSLEEP@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	notl	%eax
	andl	(%r12), %eax
	jmp	LBB0_46
LBB0_49:
	movq	_ATH9K_HW_CAP_4KB_SPLITTRANS@GOTPCREL(%rip), %rcx
	movl	(%r12), %eax
	orl	(%rcx), %eax
	jmp	LBB0_50
LBB0_30:
	movq	%r13, %rdi
	xorl	%esi, %esi
	callq	_ath9k_hw_gpio_get
	xorl	%ecx, %ecx
	testq	%rax, %rax
	sete	%cl
	leal	(%rcx,%rcx), %eax
	addl	$5, %eax
	jmp	LBB0_33
LBB0_21:
	movq	%r13, %rdi
	callq	_AR_SREV_9280_20_OR_LATER
	testl	%eax, %eax
	je	LBB0_22
## %bb.23:
	movq	%r13, %rdi
	callq	_AR_SREV_9300_20_OR_LATER
	movl	$3, %r14d
	testq	%rax, %rax
	je	LBB0_27
## %bb.24:
	movq	%r13, %rdi
	callq	_AR_SREV_9340
	testq	%rax, %rax
	jne	LBB0_27
## %bb.25:
	movq	%r13, %rdi
	callq	_AR_SREV_9462
	testq	%rax, %rax
	jne	LBB0_27
## %bb.26:
	movq	%r13, %rdi
	callq	_AR_SREV_9531
	xorl	%ecx, %ecx
	testq	%rax, %rax
	sete	%cl
	leal	3(,%rcx,4), %r14d
	jmp	LBB0_27
LBB0_22:
	movl	$7, %r14d
	jmp	LBB0_27
	.cfi_endproc
                                        ## -- End function
	.comm	_EEP_REG_0,4,2                  ## @EEP_REG_0
	.comm	_NL80211_IFTYPE_AP,8,3          ## @NL80211_IFTYPE_AP
	.comm	_AR_SUBVENDOR_ID_NEW_A,8,3      ## @AR_SUBVENDOR_ID_NEW_A
	.comm	_REGULATORY,4,2                 ## @REGULATORY
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"regdomain mapped to 0x%x\n"

	.comm	_EEP_OP_MODE,4,2                ## @EEP_OP_MODE
	.comm	_AR5416_OPFLAGS_11A,4,2         ## @AR5416_OPFLAGS_11A
L_.str.1:                               ## @.str.1
	.asciz	"disabling 5GHz band\n"

	.comm	_ATH9K_HW_CAP_5GHZ,4,2          ## @ATH9K_HW_CAP_5GHZ
	.comm	_AR5416_OPFLAGS_11G,4,2         ## @AR5416_OPFLAGS_11G
L_.str.2:                               ## @.str.2
	.asciz	"disabling 2GHz band\n"

	.comm	_ATH9K_HW_CAP_2GHZ,4,2          ## @ATH9K_HW_CAP_2GHZ
L_.str.3:                               ## @.str.3
	.asciz	"both bands are disabled\n"

	.comm	_EINVAL,4,2                     ## @EINVAL
	.comm	_EEP_TX_MASK,4,2                ## @EEP_TX_MASK
	.comm	_AR5416_DEVID_PCI,8,3           ## @AR5416_DEVID_PCI
	.comm	_EEP_RX_MASK,4,2                ## @EEP_RX_MASK
	.comm	_AR_PCU_MIC_NEW_LOC_ENA,4,2     ## @AR_PCU_MIC_NEW_LOC_ENA
	.comm	_AR_PCU_ALWAYS_PERFORM_KEYSEARCH,4,2 ## @AR_PCU_ALWAYS_PERFORM_KEYSEARCH
	.comm	_ATH_CRYPT_CAP_CIPHER_AESCCM,4,2 ## @ATH_CRYPT_CAP_CIPHER_AESCCM
	.comm	_AR2427_DEVID_PCIE,8,3          ## @AR2427_DEVID_PCIE
	.comm	_ATH9K_HW_CAP_HT,4,2            ## @ATH9K_HW_CAP_HT
	.comm	_ATH_AMPDU_LIMIT_MAX,4,2        ## @ATH_AMPDU_LIMIT_MAX
	.comm	_ATH9K_HW_CAP_AUTOSLEEP,4,2     ## @ATH9K_HW_CAP_AUTOSLEEP
	.comm	_ATH9K_HW_CAP_4KB_SPLITTRANS,4,2 ## @ATH9K_HW_CAP_4KB_SPLITTRANS
	.comm	_ATH9K_HW_CAP_EDMA,4,2          ## @ATH9K_HW_CAP_EDMA
	.comm	_ATH9K_HW_CAP_FASTCLOCK,4,2     ## @ATH9K_HW_CAP_FASTCLOCK
	.comm	_ATH9K_HW_CAP_LDPC,4,2          ## @ATH9K_HW_CAP_LDPC
	.comm	_ATH9K_HW_RX_HP_QDEPTH,4,2      ## @ATH9K_HW_RX_HP_QDEPTH
	.comm	_ATH9K_HW_RX_LP_QDEPTH,4,2      ## @ATH9K_HW_RX_LP_QDEPTH
	.comm	_ATH9K_HW_CAP_RAC_SUPPORTED,4,2 ## @ATH9K_HW_CAP_RAC_SUPPORTED
	.comm	_AR_ENT_OTP,4,2                 ## @AR_ENT_OTP
	.comm	_ATH9K_HW_CAP_SGI_20,4,2        ## @ATH9K_HW_CAP_SGI_20
	.comm	_EEP_MODAL_VER,4,2              ## @EEP_MODAL_VER
	.comm	_EEP_ANT_DIV_CTL1,4,2           ## @EEP_ANT_DIV_CTL1
	.comm	_ATH9K_HW_CAP_ANT_DIV_COMB,4,2  ## @ATH9K_HW_CAP_ANT_DIV_COMB
L_.str.4:                               ## @.str.4
	.asciz	"Enable LNA combining\n"

	.comm	_EEP_CHAIN_MASK_REDUCE,4,2      ## @EEP_CHAIN_MASK_REDUCE
	.comm	_ATH9K_HW_CAP_APM,4,2           ## @ATH9K_HW_CAP_APM
	.comm	_ATH9K_HW_CAP_DFS,4,2           ## @ATH9K_HW_CAP_DFS
	.comm	_AR_ENT_OTP_49GHZ_DISABLE,4,2   ## @AR_ENT_OTP_49GHZ_DISABLE
	.comm	_ATH9K_HW_CAP_MCI,4,2           ## @ATH9K_HW_CAP_MCI
	.comm	_ATH9K_HW_CAP_RTT,4,2           ## @ATH9K_HW_CAP_RTT
	.comm	_EEP_PAPRD,4,2                  ## @EEP_PAPRD
	.comm	_ATH9K_HW_CAP_PAPRD,4,2         ## @ATH9K_HW_CAP_PAPRD
	.comm	_ATH9K_HW_CAP_RFSILENT,4,2      ## @ATH9K_HW_CAP_RFSILENT
	.comm	_EEP_RFSILENT_ENABLED,4,2       ## @EEP_RFSILENT_ENABLED
	.comm	_EEP_RFSILENT_GPIO_SEL,4,2      ## @EEP_RFSILENT_GPIO_SEL
	.comm	_EEP_RFSILENT_POLARITY,4,2      ## @EEP_RFSILENT_POLARITY
	.comm	_EEP_RF_SILENT,4,2              ## @EEP_RF_SILENT
	.comm	_MAX_NUM_PATTERN,4,2            ## @MAX_NUM_PATTERN
	.comm	_MAX_NUM_PATTERN_LEGACY,4,2     ## @MAX_NUM_PATTERN_LEGACY
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_ath9k_hw_fill_cap_info         ; -- Begin function ath9k_hw_fill_cap_info
	.p2align	2
_ath9k_hw_fill_cap_info:                ; @ath9k_hw_fill_cap_info
	.cfi_startproc
; %bb.0:
	stp	x26, x25, [sp, #-80]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	mov	x19, x0
	bl	_ath9k_hw_regulatory
	mov	x21, x0
	mov	x0, x19
	bl	_ath9k_hw_common
	mov	x20, x0
	ldr	x8, [x19, #32]
	ldr	x8, [x8]
Lloh0:
	adrp	x9, _EEP_REG_0@GOTPAGE
Lloh1:
	ldr	x9, [x9, _EEP_REG_0@GOTPAGEOFF]
Lloh2:
	ldr	w1, [x9]
	mov	x0, x19
	blr	x8
	str	w0, [x21]
	ldr	x8, [x19]
Lloh3:
	adrp	x9, _NL80211_IFTYPE_AP@GOTPAGE
Lloh4:
	ldr	x9, [x9, _NL80211_IFTYPE_AP@GOTPAGEOFF]
Lloh5:
	ldr	x9, [x9]
	cmp	x8, x9
	b.eq	LBB0_8
; %bb.1:
	ldr	x8, [x19, #56]
Lloh6:
	adrp	x9, _AR_SUBVENDOR_ID_NEW_A@GOTPAGE
Lloh7:
	ldr	x9, [x9, _AR_SUBVENDOR_ID_NEW_A@GOTPAGEOFF]
Lloh8:
	ldr	x9, [x9]
	cmp	x8, x9
	b.ne	LBB0_8
; %bb.2:
	mov	x3, x0
	sub	w8, w0, #100
	cmp	w8, #2
	b.hs	LBB0_4
; %bb.3:
	add	w3, w3, #5
	b	LBB0_6
LBB0_4:
	cmp	w3, #65
	b.ne	LBB0_7
; %bb.5:
	mov	w3, #67
LBB0_6:
	str	w3, [x21]
LBB0_7:
Lloh9:
	adrp	x8, _REGULATORY@GOTPAGE
Lloh10:
	ldr	x8, [x8, _REGULATORY@GOTPAGEOFF]
Lloh11:
	ldr	w1, [x8]
Lloh12:
	adrp	x2, l_.str@PAGE
Lloh13:
	add	x2, x2, l_.str@PAGEOFF
	mov	x0, x20
	bl	_ath_dbg
LBB0_8:
	add	x22, x19, #96
	ldr	x8, [x19, #32]
	ldr	x8, [x8]
Lloh14:
	adrp	x9, _EEP_OP_MODE@GOTPAGE
Lloh15:
	ldr	x9, [x9, _EEP_OP_MODE@GOTPAGEOFF]
Lloh16:
	ldr	w1, [x9]
	mov	x0, x19
	blr	x8
	mov	x21, x0
Lloh17:
	adrp	x23, _AR5416_OPFLAGS_11A@GOTPAGE
Lloh18:
	ldr	x23, [x23, _AR5416_OPFLAGS_11A@GOTPAGEOFF]
	ldr	w8, [x23]
Lloh19:
	adrp	x24, _ATH9K_HW_CAP_5GHZ@GOTPAGE
Lloh20:
	ldr	x24, [x24, _ATH9K_HW_CAP_5GHZ@GOTPAGEOFF]
	tst	w8, w0
	b.eq	LBB0_12
; %bb.9:
	ldr	x8, [x19, #88]
	cbz	x8, LBB0_11
; %bb.10:
Lloh21:
	adrp	x1, l_.str.1@PAGE
Lloh22:
	add	x1, x1, l_.str.1@PAGEOFF
	mov	x0, x20
	bl	_ath_warn
	b	LBB0_12
LBB0_11:
	ldr	w8, [x24]
	ldr	w9, [x22]
	orr	w8, w9, w8
	str	w8, [x22]
LBB0_12:
Lloh23:
	adrp	x8, _AR5416_OPFLAGS_11G@GOTPAGE
Lloh24:
	ldr	x8, [x8, _AR5416_OPFLAGS_11G@GOTPAGEOFF]
Lloh25:
	ldr	w8, [x8]
Lloh26:
	adrp	x25, _ATH9K_HW_CAP_2GHZ@GOTPAGE
Lloh27:
	ldr	x25, [x25, _ATH9K_HW_CAP_2GHZ@GOTPAGEOFF]
	tst	w8, w21
	b.eq	LBB0_16
; %bb.13:
	ldr	x8, [x19, #80]
	cbz	x8, LBB0_15
; %bb.14:
Lloh28:
	adrp	x1, l_.str.2@PAGE
Lloh29:
	add	x1, x1, l_.str.2@PAGEOFF
	mov	x0, x20
	bl	_ath_warn
	b	LBB0_16
LBB0_15:
	ldr	w8, [x25]
	ldr	w9, [x22]
	orr	w8, w9, w8
	str	w8, [x22]
LBB0_16:
	ldr	w8, [x22]
	ldr	w9, [x25]
	ldr	w10, [x24]
	orr	w9, w10, w9
	tst	w9, w8
	b.eq	LBB0_27
; %bb.17:
	mov	x0, x19
	bl	_ath9k_gpio_cap_init
	mov	x0, x19
	bl	_AR_SREV_9485
	cbnz	x0, LBB0_21
; %bb.18:
	mov	x0, x19
	bl	_AR_SREV_9285
	cbnz	x0, LBB0_21
; %bb.19:
	mov	x0, x19
	bl	_AR_SREV_9330
	cbnz	x0, LBB0_21
; %bb.20:
	mov	x0, x19
	bl	_AR_SREV_9565
	cbz	x0, LBB0_97
LBB0_21:
	mov	w24, #1
LBB0_22:
	str	w24, [x19, #100]
	ldr	x8, [x19, #32]
	ldr	x8, [x8]
Lloh30:
	adrp	x9, _EEP_TX_MASK@GOTPAGE
Lloh31:
	ldr	x9, [x9, _EEP_TX_MASK@GOTPAGEOFF]
Lloh32:
	ldr	w1, [x9]
	mov	x0, x19
	blr	x8
	str	w0, [x19, #104]
	ldr	x8, [x19, #64]
Lloh33:
	adrp	x9, _AR5416_DEVID_PCI@GOTPAGE
Lloh34:
	ldr	x9, [x9, _AR5416_DEVID_PCI@GOTPAGEOFF]
Lloh35:
	ldr	x9, [x9]
	cmp	x8, x9
	b.ne	LBB0_25
; %bb.23:
	ldr	w8, [x23]
	tst	w8, w21
	b.ne	LBB0_25
; %bb.24:
	mov	x0, x19
	bl	_AR_SREV_9271
	cbz	x0, LBB0_96
LBB0_25:
	mov	x0, x19
	bl	_AR_SREV_9100
	cbz	x0, LBB0_28
; %bb.26:
	mov	w0, #7
	b	LBB0_29
LBB0_27:
Lloh36:
	adrp	x1, l_.str.3@PAGE
Lloh37:
	add	x1, x1, l_.str.3@PAGEOFF
	mov	x0, x20
	bl	_ath_err
Lloh38:
	adrp	x8, _EINVAL@GOTPAGE
Lloh39:
	ldr	x8, [x8, _EINVAL@GOTPAGEOFF]
Lloh40:
	ldr	w8, [x8]
	neg	w0, w8
	b	LBB0_92
LBB0_28:
	ldr	x8, [x19, #32]
	ldr	x8, [x8]
Lloh41:
	adrp	x9, _EEP_RX_MASK@GOTPAGE
Lloh42:
	ldr	x9, [x9, _EEP_RX_MASK@GOTPAGEOFF]
Lloh43:
	ldr	w1, [x9]
	mov	x0, x19
	blr	x8
LBB0_29:
	str	w0, [x19, #108]
	ldp	w0, w1, [x19, #100]
	bl	_fixup_chainmask
	str	w0, [x19, #104]
	ldr	w0, [x19, #100]
	ldr	w1, [x19, #108]
	bl	_fixup_chainmask
	str	w0, [x19, #108]
	ldr	w8, [x19, #104]
	stp	w8, w0, [x19, #8]
Lloh44:
	adrp	x8, _AR_PCU_MIC_NEW_LOC_ENA@GOTPAGE
Lloh45:
	ldr	x8, [x8, _AR_PCU_MIC_NEW_LOC_ENA@GOTPAGEOFF]
Lloh46:
	ldr	w8, [x8]
	ldr	w9, [x19, #72]
	orr	w8, w9, w8
	str	w8, [x19, #72]
	mov	x0, x19
	bl	_AR_SREV_9300_20_OR_LATER
	cbz	x0, LBB0_31
; %bb.30:
Lloh47:
	adrp	x8, _AR_PCU_ALWAYS_PERFORM_KEYSEARCH@GOTPAGE
Lloh48:
	ldr	x8, [x8, _AR_PCU_ALWAYS_PERFORM_KEYSEARCH@GOTPAGEOFF]
Lloh49:
	ldr	w8, [x8]
	ldr	w9, [x19, #72]
	orr	w8, w9, w8
	str	w8, [x19, #72]
LBB0_31:
Lloh50:
	adrp	x8, _ATH_CRYPT_CAP_CIPHER_AESCCM@GOTPAGE
Lloh51:
	ldr	x8, [x8, _ATH_CRYPT_CAP_CIPHER_AESCCM@GOTPAGEOFF]
Lloh52:
	ldr	w8, [x8]
	ldr	w9, [x20]
	orr	w8, w9, w8
	str	w8, [x20]
Lloh53:
	adrp	x8, _AR2427_DEVID_PCIE@GOTPAGE
Lloh54:
	ldr	x8, [x8, _AR2427_DEVID_PCIE@GOTPAGEOFF]
	ldr	x9, [x19, #64]
Lloh55:
	ldr	x10, [x8]
Lloh56:
	adrp	x8, _ATH9K_HW_CAP_HT@GOTPAGE
Lloh57:
	ldr	x8, [x8, _ATH9K_HW_CAP_HT@GOTPAGEOFF]
Lloh58:
	ldr	w8, [x8]
	cmp	x9, x10
	b.ne	LBB0_33
; %bb.32:
	ldr	w9, [x22]
	bic	w8, w9, w8
	b	LBB0_34
LBB0_33:
	ldr	w9, [x22]
	orr	w8, w9, w8
LBB0_34:
	str	w8, [x19, #96]
	mov	x0, x19
	bl	_AR_SREV_9160_10_OR_LATER
	cbnz	x0, LBB0_36
; %bb.35:
	mov	x0, x19
	bl	_AR_SREV_9100
	cbz	x0, LBB0_93
LBB0_36:
Lloh59:
	adrp	x8, _ATH_AMPDU_LIMIT_MAX@GOTPAGE
Lloh60:
	ldr	x8, [x8, _ATH_AMPDU_LIMIT_MAX@GOTPAGEOFF]
Lloh61:
	ldr	w8, [x8]
LBB0_37:
	str	w8, [x19, #112]
	mov	x0, x19
	bl	_AR_SREV_9271
	cbnz	x0, LBB0_39
; %bb.38:
	mov	x0, x19
	bl	_AR_SREV_9300_20_OR_LATER
	cbz	x0, LBB0_94
LBB0_39:
Lloh62:
	adrp	x8, _ATH9K_HW_CAP_AUTOSLEEP@GOTPAGE
Lloh63:
	ldr	x8, [x8, _ATH9K_HW_CAP_AUTOSLEEP@GOTPAGEOFF]
Lloh64:
	ldr	w8, [x8]
	ldr	w9, [x22]
	orr	w8, w9, w8
LBB0_40:
	str	w8, [x19, #96]
	mov	x0, x19
	bl	_AR_SREV_9280
	cbnz	x0, LBB0_42
; %bb.41:
	mov	x0, x19
	bl	_AR_SREV_9285
	cbz	x0, LBB0_95
LBB0_42:
Lloh65:
	adrp	x8, _ATH9K_HW_CAP_4KB_SPLITTRANS@GOTPAGE
Lloh66:
	ldr	x8, [x8, _ATH9K_HW_CAP_4KB_SPLITTRANS@GOTPAGEOFF]
Lloh67:
	ldr	w8, [x8]
	ldr	w9, [x22]
	bic	w8, w9, w8
LBB0_43:
	str	w8, [x19, #96]
	mov	x0, x19
	bl	_AR_SREV_9300_20_OR_LATER
	cbz	x0, LBB0_50
; %bb.44:
Lloh68:
	adrp	x8, _ATH9K_HW_CAP_EDMA@GOTPAGE
Lloh69:
	ldr	x8, [x8, _ATH9K_HW_CAP_EDMA@GOTPAGEOFF]
Lloh70:
	adrp	x9, _ATH9K_HW_CAP_FASTCLOCK@GOTPAGE
Lloh71:
	ldr	x9, [x9, _ATH9K_HW_CAP_FASTCLOCK@GOTPAGEOFF]
Lloh72:
	ldr	w8, [x8]
Lloh73:
	ldr	w9, [x9]
	orr	w8, w9, w8
	ldr	w9, [x19, #96]
	orr	w8, w8, w9
	str	w8, [x19, #96]
	mov	x0, x19
	bl	_AR_SREV_9330
	cbnz	x0, LBB0_49
; %bb.45:
	mov	x0, x19
	bl	_AR_SREV_9485
	cbnz	x0, LBB0_49
; %bb.46:
	mov	x0, x19
	bl	_AR_SREV_9561
	cbnz	x0, LBB0_49
; %bb.47:
	mov	x0, x19
	bl	_AR_SREV_9565
	cbnz	x0, LBB0_49
; %bb.48:
Lloh74:
	adrp	x8, _ATH9K_HW_CAP_LDPC@GOTPAGE
Lloh75:
	ldr	x8, [x8, _ATH9K_HW_CAP_LDPC@GOTPAGEOFF]
Lloh76:
	ldr	w8, [x8]
	ldr	w9, [x22]
	orr	w8, w9, w8
	str	w8, [x22]
LBB0_49:
Lloh77:
	adrp	x8, _ATH9K_HW_RX_HP_QDEPTH@GOTPAGE
Lloh78:
	ldr	x8, [x8, _ATH9K_HW_RX_HP_QDEPTH@GOTPAGEOFF]
Lloh79:
	ldr	w8, [x8]
Lloh80:
	adrp	x9, _ATH9K_HW_RX_LP_QDEPTH@GOTPAGE
Lloh81:
	ldr	x9, [x9, _ATH9K_HW_RX_LP_QDEPTH@GOTPAGEOFF]
Lloh82:
	ldr	w9, [x9]
	stp	w9, w8, [x19, #136]
	movi.2s	v0, #4
	stur	d0, [x19, #116]
	mov	w8, #4
	str	w8, [x19, #124]
	b	LBB0_52
LBB0_50:
	mov	w8, #4
	str	w8, [x19, #120]
	mov	x0, x19
	bl	_AR_SREV_9280_20
	cbz	x0, LBB0_52
; %bb.51:
Lloh83:
	adrp	x8, _ATH9K_HW_CAP_FASTCLOCK@GOTPAGE
Lloh84:
	ldr	x8, [x8, _ATH9K_HW_CAP_FASTCLOCK@GOTPAGEOFF]
Lloh85:
	ldr	w8, [x8]
	ldr	w9, [x22]
	orr	w8, w9, w8
	str	w8, [x22]
LBB0_52:
	mov	x0, x19
	bl	_AR_SREV_9300_20_OR_LATER
	cbz	x0, LBB0_54
; %bb.53:
Lloh86:
	adrp	x8, _ATH9K_HW_CAP_RAC_SUPPORTED@GOTPAGE
Lloh87:
	ldr	x8, [x8, _ATH9K_HW_CAP_RAC_SUPPORTED@GOTPAGEOFF]
Lloh88:
	ldr	w8, [x8]
	ldr	w9, [x22]
	orr	w8, w9, w8
	str	w8, [x22]
LBB0_54:
	mov	x0, x19
	bl	_AR_SREV_9561
	cbz	x0, LBB0_56
; %bb.55:
	mov	w0, #40960
	movk	w0, #957, lsl #16
	b	LBB0_58
LBB0_56:
	mov	x0, x19
	bl	_AR_SREV_9300_20_OR_LATER
	cbz	x0, LBB0_59
; %bb.57:
Lloh89:
	adrp	x8, _AR_ENT_OTP@GOTPAGE
Lloh90:
	ldr	x8, [x8, _AR_ENT_OTP@GOTPAGEOFF]
Lloh91:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_REG_READ
LBB0_58:
	str	w0, [x19, #20]
LBB0_59:
	mov	x0, x19
	bl	_AR_SREV_9287_11_OR_LATER
	cbnz	x0, LBB0_61
; %bb.60:
	mov	x0, x19
	bl	_AR_SREV_9271
	cbz	x0, LBB0_62
LBB0_61:
Lloh92:
	adrp	x8, _ATH9K_HW_CAP_SGI_20@GOTPAGE
Lloh93:
	ldr	x8, [x8, _ATH9K_HW_CAP_SGI_20@GOTPAGEOFF]
Lloh94:
	ldr	w8, [x8]
	ldr	w9, [x22]
	orr	w8, w9, w8
	str	w8, [x22]
LBB0_62:
	mov	x0, x19
	bl	_AR_SREV_9285
Lloh95:
	adrp	x21, _EEP_ANT_DIV_CTL1@GOTPAGE
Lloh96:
	ldr	x21, [x21, _EEP_ANT_DIV_CTL1@GOTPAGEOFF]
	cbz	x0, LBB0_66
; %bb.63:
	ldr	x8, [x19, #32]
	ldr	x8, [x8]
Lloh97:
	adrp	x9, _EEP_MODAL_VER@GOTPAGE
Lloh98:
	ldr	x9, [x9, _EEP_MODAL_VER@GOTPAGEOFF]
Lloh99:
	ldr	w1, [x9]
	mov	x0, x19
	blr	x8
	cmp	w0, #3
	b.lt	LBB0_66
; %bb.64:
	ldr	x8, [x19, #32]
	ldr	x8, [x8]
	ldr	w1, [x21]
	mov	x0, x19
	blr	x8
	mov	w8, #9
	bics	wzr, w8, w0
	b.ne	LBB0_66
; %bb.65:
Lloh100:
	adrp	x8, _ATH9K_HW_CAP_ANT_DIV_COMB@GOTPAGE
Lloh101:
	ldr	x8, [x8, _ATH9K_HW_CAP_ANT_DIV_COMB@GOTPAGEOFF]
Lloh102:
	ldr	w8, [x8]
	ldr	w9, [x22]
	orr	w8, w9, w8
	str	w8, [x22]
Lloh103:
	adrp	x1, l_.str.4@PAGE
Lloh104:
	add	x1, x1, l_.str.4@PAGEOFF
	mov	x0, x20
	bl	_ath_info
LBB0_66:
	mov	x0, x19
	bl	_AR_SREV_9300_20_OR_LATER
	cbz	x0, LBB0_69
; %bb.67:
	ldr	x8, [x19, #32]
	ldr	x8, [x8]
Lloh105:
	adrp	x9, _EEP_CHAIN_MASK_REDUCE@GOTPAGE
Lloh106:
	ldr	x9, [x9, _EEP_CHAIN_MASK_REDUCE@GOTPAGEOFF]
Lloh107:
	ldr	w1, [x9]
	mov	x0, x19
	blr	x8
	cbz	w0, LBB0_69
; %bb.68:
Lloh108:
	adrp	x8, _ATH9K_HW_CAP_APM@GOTPAGE
Lloh109:
	ldr	x8, [x8, _ATH9K_HW_CAP_APM@GOTPAGEOFF]
Lloh110:
	ldr	w8, [x8]
	ldr	w9, [x22]
	orr	w8, w9, w8
	str	w8, [x22]
LBB0_69:
	mov	x0, x19
	bl	_AR_SREV_9330
	cbnz	x0, LBB0_72
; %bb.70:
	mov	x0, x19
	bl	_AR_SREV_9485
	cbnz	x0, LBB0_72
; %bb.71:
	mov	x0, x19
	bl	_AR_SREV_9565
	cbz	x0, LBB0_74
LBB0_72:
	ldr	x8, [x19, #32]
	ldr	x8, [x8]
	ldr	w1, [x21]
	mov	x0, x19
	blr	x8
	and	w8, w0, #0xffffffc0
	cmp	w8, #192
	b.ne	LBB0_74
; %bb.73:
Lloh111:
	adrp	x8, _ATH9K_HW_CAP_ANT_DIV_COMB@GOTPAGE
Lloh112:
	ldr	x8, [x8, _ATH9K_HW_CAP_ANT_DIV_COMB@GOTPAGEOFF]
Lloh113:
	ldr	w8, [x8]
	ldr	w9, [x22]
	orr	w8, w9, w8
	str	w8, [x22]
Lloh114:
	adrp	x1, l_.str.4@PAGE
Lloh115:
	add	x1, x1, l_.str.4@PAGEOFF
	mov	x0, x20
	bl	_ath_info
LBB0_74:
	mov	x0, x19
	bl	_ath9k_hw_dfs_tested
	cbz	x0, LBB0_76
; %bb.75:
Lloh116:
	adrp	x8, _ATH9K_HW_CAP_DFS@GOTPAGE
Lloh117:
	ldr	x8, [x8, _ATH9K_HW_CAP_DFS@GOTPAGEOFF]
Lloh118:
	ldr	w8, [x8]
	ldr	w9, [x22]
	orr	w8, w9, w8
	str	w8, [x22]
LBB0_76:
	ldp	w20, w8, [x19, #104]
	orr	w9, w20, w8
	cbz	w9, LBB0_83
LBB0_77:                                ; =>This Inner Loop Header: Depth=1
	mov	x21, x8
	mov	w0, #0
	bl	_BIT
	tst	w0, w20
	b.eq	LBB0_79
; %bb.78:                               ;   in Loop: Header=BB0_77 Depth=1
	ldr	w8, [x19, #132]
	add	w8, w8, #1
	str	w8, [x19, #132]
LBB0_79:                                ;   in Loop: Header=BB0_77 Depth=1
	mov	w0, #0
	bl	_BIT
	tst	w0, w21
	b.eq	LBB0_81
; %bb.80:                               ;   in Loop: Header=BB0_77 Depth=1
	ldr	w8, [x19, #128]
	add	w8, w8, #1
	str	w8, [x19, #128]
LBB0_81:                                ;   in Loop: Header=BB0_77 Depth=1
	asr	w9, w20, #1
	asr	w8, w21, #1
	cmp	w20, #1
	mov	x20, x9
	b.hi	LBB0_77
; %bb.82:                               ;   in Loop: Header=BB0_77 Depth=1
	mov	x20, x9
	cmp	w21, #1
	b.hi	LBB0_77
LBB0_83:
	mov	x0, x19
	bl	_AR_SREV_9462
	cbnz	x0, LBB0_85
; %bb.84:
	mov	x0, x19
	bl	_AR_SREV_9565
	cbz	x0, LBB0_89
LBB0_85:
	ldr	w8, [x19, #20]
Lloh119:
	adrp	x9, _AR_ENT_OTP_49GHZ_DISABLE@GOTPAGE
Lloh120:
	ldr	x9, [x9, _AR_ENT_OTP_49GHZ_DISABLE@GOTPAGEOFF]
Lloh121:
	ldr	w9, [x9]
	tst	w9, w8
	b.ne	LBB0_87
; %bb.86:
Lloh122:
	adrp	x8, _ATH9K_HW_CAP_MCI@GOTPAGE
Lloh123:
	ldr	x8, [x8, _ATH9K_HW_CAP_MCI@GOTPAGEOFF]
Lloh124:
	ldr	w8, [x8]
	ldr	w9, [x22]
	orr	w8, w9, w8
	str	w8, [x22]
LBB0_87:
	mov	x0, x19
	bl	_AR_SREV_9462_20_OR_LATER
	cbz	x0, LBB0_89
; %bb.88:
Lloh125:
	adrp	x8, _ATH9K_HW_CAP_RTT@GOTPAGE
Lloh126:
	ldr	x8, [x8, _ATH9K_HW_CAP_RTT@GOTPAGEOFF]
Lloh127:
	ldr	w8, [x8]
	ldr	w9, [x22]
	orr	w8, w9, w8
	str	w8, [x22]
LBB0_89:
	mov	x0, x19
	bl	_AR_SREV_9300_20_OR_LATER
	cbz	x0, LBB0_92
; %bb.90:
	ldr	x8, [x19, #32]
	ldr	x8, [x8]
Lloh128:
	adrp	x9, _EEP_PAPRD@GOTPAGE
Lloh129:
	ldr	x9, [x9, _EEP_PAPRD@GOTPAGEOFF]
Lloh130:
	ldr	w1, [x9]
	mov	x0, x19
	blr	x8
	cbz	w0, LBB0_92
; %bb.91:
	mov	w0, #0
Lloh131:
	adrp	x8, _ATH9K_HW_CAP_PAPRD@GOTPAGE
Lloh132:
	ldr	x8, [x8, _ATH9K_HW_CAP_PAPRD@GOTPAGEOFF]
Lloh133:
	ldr	w8, [x8]
	ldr	w9, [x22]
	orr	w8, w9, w8
	str	w8, [x22]
LBB0_92:
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp], #80             ; 16-byte Folded Reload
	ret
LBB0_93:
	mov	w8, #8192
	b	LBB0_37
LBB0_94:
Lloh134:
	adrp	x8, _ATH9K_HW_CAP_AUTOSLEEP@GOTPAGE
Lloh135:
	ldr	x8, [x8, _ATH9K_HW_CAP_AUTOSLEEP@GOTPAGEOFF]
Lloh136:
	ldr	w8, [x8]
	ldr	w9, [x22]
	bic	w8, w9, w8
	b	LBB0_40
LBB0_95:
Lloh137:
	adrp	x8, _ATH9K_HW_CAP_4KB_SPLITTRANS@GOTPAGE
Lloh138:
	ldr	x8, [x8, _ATH9K_HW_CAP_4KB_SPLITTRANS@GOTPAGEOFF]
Lloh139:
	ldr	w8, [x8]
	ldr	w9, [x22]
	orr	w8, w9, w8
	b	LBB0_43
LBB0_96:
	mov	x0, x19
	mov	w1, #0
	bl	_ath9k_hw_gpio_get
	cmp	x0, #0
	mov	w8, #5
	mov	w9, #7
	csel	w0, w9, w8, eq
	b	LBB0_29
LBB0_97:
	mov	x0, x19
	bl	_AR_SREV_9280_20_OR_LATER
	cbz	w0, LBB0_101
; %bb.98:
	mov	x0, x19
	bl	_AR_SREV_9300_20_OR_LATER
	cbz	x0, LBB0_100
; %bb.99:
	mov	x0, x19
	bl	_AR_SREV_9340
	cbz	x0, LBB0_102
LBB0_100:
	mov	w24, #3
	b	LBB0_22
LBB0_101:
	mov	w24, #7
	b	LBB0_22
LBB0_102:
	mov	x0, x19
	bl	_AR_SREV_9462
	mov	w24, #3
	cbnz	x0, LBB0_22
; %bb.103:
	mov	x0, x19
	bl	_AR_SREV_9531
	cmp	x0, #0
	mov	w8, #7
	csel	w24, w8, w24, eq
	b	LBB0_22
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpAdd	Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGot	Lloh19, Lloh20
	.loh AdrpLdrGot	Lloh17, Lloh18
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh16
	.loh AdrpAdd	Lloh21, Lloh22
	.loh AdrpLdrGot	Lloh26, Lloh27
	.loh AdrpLdrGotLdr	Lloh23, Lloh24, Lloh25
	.loh AdrpAdd	Lloh28, Lloh29
	.loh AdrpLdrGotLdr	Lloh33, Lloh34, Lloh35
	.loh AdrpLdrGotLdr	Lloh30, Lloh31, Lloh32
	.loh AdrpLdrGotLdr	Lloh38, Lloh39, Lloh40
	.loh AdrpAdd	Lloh36, Lloh37
	.loh AdrpLdrGotLdr	Lloh41, Lloh42, Lloh43
	.loh AdrpLdrGotLdr	Lloh44, Lloh45, Lloh46
	.loh AdrpLdrGotLdr	Lloh47, Lloh48, Lloh49
	.loh AdrpLdrGotLdr	Lloh56, Lloh57, Lloh58
	.loh AdrpLdrGotLdr	Lloh53, Lloh54, Lloh55
	.loh AdrpLdrGotLdr	Lloh50, Lloh51, Lloh52
	.loh AdrpLdrGotLdr	Lloh59, Lloh60, Lloh61
	.loh AdrpLdrGotLdr	Lloh62, Lloh63, Lloh64
	.loh AdrpLdrGotLdr	Lloh65, Lloh66, Lloh67
	.loh AdrpLdrGotLdr	Lloh70, Lloh71, Lloh73
	.loh AdrpLdrGotLdr	Lloh68, Lloh69, Lloh72
	.loh AdrpLdrGotLdr	Lloh74, Lloh75, Lloh76
	.loh AdrpLdrGotLdr	Lloh80, Lloh81, Lloh82
	.loh AdrpLdrGotLdr	Lloh77, Lloh78, Lloh79
	.loh AdrpLdrGotLdr	Lloh83, Lloh84, Lloh85
	.loh AdrpLdrGotLdr	Lloh86, Lloh87, Lloh88
	.loh AdrpLdrGotLdr	Lloh89, Lloh90, Lloh91
	.loh AdrpLdrGotLdr	Lloh92, Lloh93, Lloh94
	.loh AdrpLdrGot	Lloh95, Lloh96
	.loh AdrpLdrGotLdr	Lloh97, Lloh98, Lloh99
	.loh AdrpAdd	Lloh103, Lloh104
	.loh AdrpLdrGotLdr	Lloh100, Lloh101, Lloh102
	.loh AdrpLdrGotLdr	Lloh105, Lloh106, Lloh107
	.loh AdrpLdrGotLdr	Lloh108, Lloh109, Lloh110
	.loh AdrpAdd	Lloh114, Lloh115
	.loh AdrpLdrGotLdr	Lloh111, Lloh112, Lloh113
	.loh AdrpLdrGotLdr	Lloh116, Lloh117, Lloh118
	.loh AdrpLdrGotLdr	Lloh119, Lloh120, Lloh121
	.loh AdrpLdrGotLdr	Lloh122, Lloh123, Lloh124
	.loh AdrpLdrGotLdr	Lloh125, Lloh126, Lloh127
	.loh AdrpLdrGotLdr	Lloh128, Lloh129, Lloh130
	.loh AdrpLdrGotLdr	Lloh131, Lloh132, Lloh133
	.loh AdrpLdrGotLdr	Lloh134, Lloh135, Lloh136
	.loh AdrpLdrGotLdr	Lloh137, Lloh138, Lloh139
	.cfi_endproc
                                        ; -- End function
	.comm	_EEP_REG_0,4,2                  ; @EEP_REG_0
	.comm	_NL80211_IFTYPE_AP,8,3          ; @NL80211_IFTYPE_AP
	.comm	_AR_SUBVENDOR_ID_NEW_A,8,3      ; @AR_SUBVENDOR_ID_NEW_A
	.comm	_REGULATORY,4,2                 ; @REGULATORY
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"regdomain mapped to 0x%x\n"

	.comm	_EEP_OP_MODE,4,2                ; @EEP_OP_MODE
	.comm	_AR5416_OPFLAGS_11A,4,2         ; @AR5416_OPFLAGS_11A
l_.str.1:                               ; @.str.1
	.asciz	"disabling 5GHz band\n"

	.comm	_ATH9K_HW_CAP_5GHZ,4,2          ; @ATH9K_HW_CAP_5GHZ
	.comm	_AR5416_OPFLAGS_11G,4,2         ; @AR5416_OPFLAGS_11G
l_.str.2:                               ; @.str.2
	.asciz	"disabling 2GHz band\n"

	.comm	_ATH9K_HW_CAP_2GHZ,4,2          ; @ATH9K_HW_CAP_2GHZ
l_.str.3:                               ; @.str.3
	.asciz	"both bands are disabled\n"

	.comm	_EINVAL,4,2                     ; @EINVAL
	.comm	_EEP_TX_MASK,4,2                ; @EEP_TX_MASK
	.comm	_AR5416_DEVID_PCI,8,3           ; @AR5416_DEVID_PCI
	.comm	_EEP_RX_MASK,4,2                ; @EEP_RX_MASK
	.comm	_AR_PCU_MIC_NEW_LOC_ENA,4,2     ; @AR_PCU_MIC_NEW_LOC_ENA
	.comm	_AR_PCU_ALWAYS_PERFORM_KEYSEARCH,4,2 ; @AR_PCU_ALWAYS_PERFORM_KEYSEARCH
	.comm	_ATH_CRYPT_CAP_CIPHER_AESCCM,4,2 ; @ATH_CRYPT_CAP_CIPHER_AESCCM
	.comm	_AR2427_DEVID_PCIE,8,3          ; @AR2427_DEVID_PCIE
	.comm	_ATH9K_HW_CAP_HT,4,2            ; @ATH9K_HW_CAP_HT
	.comm	_ATH_AMPDU_LIMIT_MAX,4,2        ; @ATH_AMPDU_LIMIT_MAX
	.comm	_ATH9K_HW_CAP_AUTOSLEEP,4,2     ; @ATH9K_HW_CAP_AUTOSLEEP
	.comm	_ATH9K_HW_CAP_4KB_SPLITTRANS,4,2 ; @ATH9K_HW_CAP_4KB_SPLITTRANS
	.comm	_ATH9K_HW_CAP_EDMA,4,2          ; @ATH9K_HW_CAP_EDMA
	.comm	_ATH9K_HW_CAP_FASTCLOCK,4,2     ; @ATH9K_HW_CAP_FASTCLOCK
	.comm	_ATH9K_HW_CAP_LDPC,4,2          ; @ATH9K_HW_CAP_LDPC
	.comm	_ATH9K_HW_RX_HP_QDEPTH,4,2      ; @ATH9K_HW_RX_HP_QDEPTH
	.comm	_ATH9K_HW_RX_LP_QDEPTH,4,2      ; @ATH9K_HW_RX_LP_QDEPTH
	.comm	_ATH9K_HW_CAP_RAC_SUPPORTED,4,2 ; @ATH9K_HW_CAP_RAC_SUPPORTED
	.comm	_AR_ENT_OTP,4,2                 ; @AR_ENT_OTP
	.comm	_ATH9K_HW_CAP_SGI_20,4,2        ; @ATH9K_HW_CAP_SGI_20
	.comm	_EEP_MODAL_VER,4,2              ; @EEP_MODAL_VER
	.comm	_EEP_ANT_DIV_CTL1,4,2           ; @EEP_ANT_DIV_CTL1
	.comm	_ATH9K_HW_CAP_ANT_DIV_COMB,4,2  ; @ATH9K_HW_CAP_ANT_DIV_COMB
l_.str.4:                               ; @.str.4
	.asciz	"Enable LNA combining\n"

	.comm	_EEP_CHAIN_MASK_REDUCE,4,2      ; @EEP_CHAIN_MASK_REDUCE
	.comm	_ATH9K_HW_CAP_APM,4,2           ; @ATH9K_HW_CAP_APM
	.comm	_ATH9K_HW_CAP_DFS,4,2           ; @ATH9K_HW_CAP_DFS
	.comm	_AR_ENT_OTP_49GHZ_DISABLE,4,2   ; @AR_ENT_OTP_49GHZ_DISABLE
	.comm	_ATH9K_HW_CAP_MCI,4,2           ; @ATH9K_HW_CAP_MCI
	.comm	_ATH9K_HW_CAP_RTT,4,2           ; @ATH9K_HW_CAP_RTT
	.comm	_EEP_PAPRD,4,2                  ; @EEP_PAPRD
	.comm	_ATH9K_HW_CAP_PAPRD,4,2         ; @ATH9K_HW_CAP_PAPRD
	.comm	_ATH9K_HW_CAP_RFSILENT,4,2      ; @ATH9K_HW_CAP_RFSILENT
	.comm	_EEP_RFSILENT_ENABLED,4,2       ; @EEP_RFSILENT_ENABLED
	.comm	_EEP_RFSILENT_GPIO_SEL,4,2      ; @EEP_RFSILENT_GPIO_SEL
	.comm	_EEP_RFSILENT_POLARITY,4,2      ; @EEP_RFSILENT_POLARITY
	.comm	_EEP_RF_SILENT,4,2              ; @EEP_RF_SILENT
	.comm	_MAX_NUM_PATTERN,4,2            ; @MAX_NUM_PATTERN
	.comm	_MAX_NUM_PATTERN_LEGACY,4,2     ; @MAX_NUM_PATTERN_LEGACY
.subsections_via_symbols
