	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function wcn36xx_irq_tx_complete
_wcn36xx_irq_tx_complete:               ## @wcn36xx_irq_tx_complete
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	subq	$16, %rsp
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rsi, %rbx
	movq	_WCN36XX_DXE_INT_SRC_RAW_REG@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	leaq	-40(%rbp), %rdx
	movq	%rbx, %rdi
	callq	_wcn36xx_dxe_read_register
	movq	_WCN36XX_INT_MASK_CHAN_TX_H@GOTPCREL(%rip), %r14
	movl	(%r14), %eax
	testl	%eax, -40(%rbp)
	je	LBB0_9
## %bb.1:
	movq	_WCN36XX_DXE_CH_STATUS_REG_ADDR_TX_H@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	leaq	-36(%rbp), %rdx
	movq	%rbx, %rdi
	callq	_wcn36xx_dxe_read_register
	movq	_WCN36XX_DXE_0_INT_CLR@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	(%r14), %edx
	movq	%rbx, %rdi
	callq	_wcn36xx_dxe_write_register
	movl	-36(%rbp), %edx
	movq	_WCN36XX_CH_STAT_INT_ERR_MASK@GOTPCREL(%rip), %rax
	testl	%edx, (%rax)
	je	LBB0_3
## %bb.2:
	movq	_WCN36XX_DXE_0_INT_ERR_CLR@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	(%r14), %edx
	movq	%rbx, %rdi
	callq	_wcn36xx_dxe_write_register
	movl	-40(%rbp), %esi
	leaq	L_.str(%rip), %rdi
	callq	_wcn36xx_err
	movl	-36(%rbp), %edx
LBB0_3:
	movq	_WCN36XX_CH_STAT_INT_DONE_MASK@GOTPCREL(%rip), %r15
	testl	%edx, (%r15)
	je	LBB0_5
## %bb.4:
	movq	_WCN36XX_DXE_0_INT_DONE_CLR@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	(%r14), %edx
	movq	%rbx, %rdi
	callq	_wcn36xx_dxe_write_register
	movl	-36(%rbp), %edx
LBB0_5:
	movq	_WCN36XX_CH_STAT_INT_ED_MASK@GOTPCREL(%rip), %r12
	testl	%edx, (%r12)
	je	LBB0_7
## %bb.6:
	movq	_WCN36XX_DXE_0_INT_ED_CLR@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	(%r14), %edx
	movq	%rbx, %rdi
	callq	_wcn36xx_dxe_write_register
	movl	-36(%rbp), %edx
LBB0_7:
	movq	_WCN36XX_DBG_DXE@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	leaq	L_.str.1(%rip), %rsi
	callq	_wcn36xx_dbg
	movl	(%r12), %eax
	orl	(%r15), %eax
	testl	%eax, -36(%rbp)
	je	LBB0_9
## %bb.8:
	leaq	4(%rbx), %rsi
	movq	%rbx, %rdi
	callq	_reap_tx_dxes
LBB0_9:
	movq	_WCN36XX_INT_MASK_CHAN_TX_L@GOTPCREL(%rip), %r14
	movl	(%r14), %eax
	testl	%eax, -40(%rbp)
	je	LBB0_18
## %bb.10:
	movq	_WCN36XX_DXE_CH_STATUS_REG_ADDR_TX_L@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	leaq	-36(%rbp), %rdx
	movq	%rbx, %rdi
	callq	_wcn36xx_dxe_read_register
	movq	_WCN36XX_DXE_0_INT_CLR@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	(%r14), %edx
	movq	%rbx, %rdi
	callq	_wcn36xx_dxe_write_register
	movl	-36(%rbp), %edx
	movq	_WCN36XX_CH_STAT_INT_ERR_MASK@GOTPCREL(%rip), %rax
	testl	%edx, (%rax)
	je	LBB0_12
## %bb.11:
	movq	_WCN36XX_DXE_0_INT_ERR_CLR@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	(%r14), %edx
	movq	%rbx, %rdi
	callq	_wcn36xx_dxe_write_register
	movl	-40(%rbp), %esi
	leaq	L_.str.2(%rip), %rdi
	callq	_wcn36xx_err
	movl	-36(%rbp), %edx
LBB0_12:
	movq	_WCN36XX_CH_STAT_INT_DONE_MASK@GOTPCREL(%rip), %r15
	testl	%edx, (%r15)
	je	LBB0_14
## %bb.13:
	movq	_WCN36XX_DXE_0_INT_DONE_CLR@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	(%r14), %edx
	movq	%rbx, %rdi
	callq	_wcn36xx_dxe_write_register
	movl	-36(%rbp), %edx
LBB0_14:
	movq	_WCN36XX_CH_STAT_INT_ED_MASK@GOTPCREL(%rip), %r12
	testl	%edx, (%r12)
	je	LBB0_16
## %bb.15:
	movq	_WCN36XX_DXE_0_INT_ED_CLR@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	(%r14), %edx
	movq	%rbx, %rdi
	callq	_wcn36xx_dxe_write_register
	movl	-36(%rbp), %edx
LBB0_16:
	movq	_WCN36XX_DBG_DXE@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	leaq	L_.str.3(%rip), %rsi
	callq	_wcn36xx_dbg
	movl	(%r12), %eax
	orl	(%r15), %eax
	testl	%eax, -36(%rbp)
	je	LBB0_18
## %bb.17:
	movq	%rbx, %rdi
	movq	%rbx, %rsi
	callq	_reap_tx_dxes
LBB0_18:
	movq	_IRQ_HANDLED@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	addq	$16, %rsp
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_WCN36XX_DXE_INT_SRC_RAW_REG,4,2 ## @WCN36XX_DXE_INT_SRC_RAW_REG
	.comm	_WCN36XX_INT_MASK_CHAN_TX_H,4,2 ## @WCN36XX_INT_MASK_CHAN_TX_H
	.comm	_WCN36XX_DXE_CH_STATUS_REG_ADDR_TX_H,4,2 ## @WCN36XX_DXE_CH_STATUS_REG_ADDR_TX_H
	.comm	_WCN36XX_DXE_0_INT_CLR,4,2      ## @WCN36XX_DXE_0_INT_CLR
	.comm	_WCN36XX_CH_STAT_INT_ERR_MASK,4,2 ## @WCN36XX_CH_STAT_INT_ERR_MASK
	.comm	_WCN36XX_DXE_0_INT_ERR_CLR,4,2  ## @WCN36XX_DXE_0_INT_ERR_CLR
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"DXE IRQ reported error: 0x%x in high TX channel\n"

	.comm	_WCN36XX_CH_STAT_INT_DONE_MASK,4,2 ## @WCN36XX_CH_STAT_INT_DONE_MASK
	.comm	_WCN36XX_DXE_0_INT_DONE_CLR,4,2 ## @WCN36XX_DXE_0_INT_DONE_CLR
	.comm	_WCN36XX_CH_STAT_INT_ED_MASK,4,2 ## @WCN36XX_CH_STAT_INT_ED_MASK
	.comm	_WCN36XX_DXE_0_INT_ED_CLR,4,2   ## @WCN36XX_DXE_0_INT_ED_CLR
	.comm	_WCN36XX_DBG_DXE,4,2            ## @WCN36XX_DBG_DXE
L_.str.1:                               ## @.str.1
	.asciz	"dxe tx ready high, reason %08x\n"

	.comm	_WCN36XX_INT_MASK_CHAN_TX_L,4,2 ## @WCN36XX_INT_MASK_CHAN_TX_L
	.comm	_WCN36XX_DXE_CH_STATUS_REG_ADDR_TX_L,4,2 ## @WCN36XX_DXE_CH_STATUS_REG_ADDR_TX_L
L_.str.2:                               ## @.str.2
	.asciz	"DXE IRQ reported error: 0x%x in low TX channel\n"

L_.str.3:                               ## @.str.3
	.asciz	"dxe tx ready low, reason %08x\n"

	.comm	_IRQ_HANDLED,4,2                ## @IRQ_HANDLED
	.no_dead_strip	_wcn36xx_irq_tx_complete
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function wcn36xx_irq_tx_complete
_wcn36xx_irq_tx_complete:               ; @wcn36xx_irq_tx_complete
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #96
	.cfi_def_cfa_offset 96
	stp	x26, x25, [sp, #16]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #32]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #48]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #64]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #80]             ; 16-byte Folded Spill
	add	x29, sp, #80
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	mov	x19, x1
Lloh0:
	adrp	x8, _WCN36XX_DXE_INT_SRC_RAW_REG@GOTPAGE
Lloh1:
	ldr	x8, [x8, _WCN36XX_DXE_INT_SRC_RAW_REG@GOTPAGEOFF]
Lloh2:
	ldr	w1, [x8]
	add	x2, sp, #12
	mov	x0, x19
	bl	_wcn36xx_dxe_read_register
	ldr	w8, [sp, #12]
Lloh3:
	adrp	x25, _WCN36XX_INT_MASK_CHAN_TX_H@GOTPAGE
Lloh4:
	ldr	x25, [x25, _WCN36XX_INT_MASK_CHAN_TX_H@GOTPAGEOFF]
Lloh5:
	adrp	x24, _WCN36XX_DXE_0_INT_CLR@GOTPAGE
Lloh6:
	ldr	x24, [x24, _WCN36XX_DXE_0_INT_CLR@GOTPAGEOFF]
Lloh7:
	adrp	x23, _WCN36XX_CH_STAT_INT_ERR_MASK@GOTPAGE
Lloh8:
	ldr	x23, [x23, _WCN36XX_CH_STAT_INT_ERR_MASK@GOTPAGEOFF]
Lloh9:
	adrp	x20, _WCN36XX_CH_STAT_INT_DONE_MASK@GOTPAGE
Lloh10:
	ldr	x20, [x20, _WCN36XX_CH_STAT_INT_DONE_MASK@GOTPAGEOFF]
	ldr	w9, [x25]
Lloh11:
	adrp	x21, _WCN36XX_CH_STAT_INT_ED_MASK@GOTPAGE
Lloh12:
	ldr	x21, [x21, _WCN36XX_CH_STAT_INT_ED_MASK@GOTPAGEOFF]
Lloh13:
	adrp	x22, _WCN36XX_DBG_DXE@GOTPAGE
Lloh14:
	ldr	x22, [x22, _WCN36XX_DBG_DXE@GOTPAGEOFF]
	tst	w9, w8
	b.eq	LBB0_9
; %bb.1:
Lloh15:
	adrp	x8, _WCN36XX_DXE_CH_STATUS_REG_ADDR_TX_H@GOTPAGE
Lloh16:
	ldr	x8, [x8, _WCN36XX_DXE_CH_STATUS_REG_ADDR_TX_H@GOTPAGEOFF]
Lloh17:
	ldr	w1, [x8]
	add	x2, sp, #8
	mov	x0, x19
	bl	_wcn36xx_dxe_read_register
	ldr	w1, [x24]
	ldr	w2, [x25]
	mov	x0, x19
	bl	_wcn36xx_dxe_write_register
	ldr	w2, [sp, #8]
	ldr	w8, [x23]
	tst	w8, w2
	b.eq	LBB0_3
; %bb.2:
Lloh18:
	adrp	x8, _WCN36XX_DXE_0_INT_ERR_CLR@GOTPAGE
Lloh19:
	ldr	x8, [x8, _WCN36XX_DXE_0_INT_ERR_CLR@GOTPAGEOFF]
Lloh20:
	ldr	w1, [x8]
	ldr	w2, [x25]
	mov	x0, x19
	bl	_wcn36xx_dxe_write_register
	ldr	w1, [sp, #12]
Lloh21:
	adrp	x0, l_.str@PAGE
Lloh22:
	add	x0, x0, l_.str@PAGEOFF
	bl	_wcn36xx_err
	ldr	w2, [sp, #8]
LBB0_3:
	ldr	w8, [x20]
	tst	w8, w2
	b.eq	LBB0_5
; %bb.4:
Lloh23:
	adrp	x8, _WCN36XX_DXE_0_INT_DONE_CLR@GOTPAGE
Lloh24:
	ldr	x8, [x8, _WCN36XX_DXE_0_INT_DONE_CLR@GOTPAGEOFF]
Lloh25:
	ldr	w1, [x8]
	ldr	w2, [x25]
	mov	x0, x19
	bl	_wcn36xx_dxe_write_register
	ldr	w2, [sp, #8]
LBB0_5:
	ldr	w8, [x21]
	tst	w8, w2
	b.eq	LBB0_7
; %bb.6:
Lloh26:
	adrp	x8, _WCN36XX_DXE_0_INT_ED_CLR@GOTPAGE
Lloh27:
	ldr	x8, [x8, _WCN36XX_DXE_0_INT_ED_CLR@GOTPAGEOFF]
Lloh28:
	ldr	w1, [x8]
	ldr	w2, [x25]
	mov	x0, x19
	bl	_wcn36xx_dxe_write_register
	ldr	w2, [sp, #8]
LBB0_7:
	ldr	w0, [x22]
Lloh29:
	adrp	x1, l_.str.1@PAGE
Lloh30:
	add	x1, x1, l_.str.1@PAGEOFF
	bl	_wcn36xx_dbg
	ldr	w8, [sp, #8]
	ldr	w9, [x20]
	ldr	w10, [x21]
	orr	w9, w10, w9
	tst	w9, w8
	b.eq	LBB0_9
; %bb.8:
	add	x1, x19, #4
	mov	x0, x19
	bl	_reap_tx_dxes
LBB0_9:
	ldr	w8, [sp, #12]
Lloh31:
	adrp	x25, _WCN36XX_INT_MASK_CHAN_TX_L@GOTPAGE
Lloh32:
	ldr	x25, [x25, _WCN36XX_INT_MASK_CHAN_TX_L@GOTPAGEOFF]
	ldr	w9, [x25]
	tst	w9, w8
	b.eq	LBB0_18
; %bb.10:
Lloh33:
	adrp	x8, _WCN36XX_DXE_CH_STATUS_REG_ADDR_TX_L@GOTPAGE
Lloh34:
	ldr	x8, [x8, _WCN36XX_DXE_CH_STATUS_REG_ADDR_TX_L@GOTPAGEOFF]
Lloh35:
	ldr	w1, [x8]
	add	x2, sp, #8
	mov	x0, x19
	bl	_wcn36xx_dxe_read_register
	ldr	w1, [x24]
	ldr	w2, [x25]
	mov	x0, x19
	bl	_wcn36xx_dxe_write_register
	ldr	w2, [sp, #8]
	ldr	w8, [x23]
	tst	w8, w2
	b.eq	LBB0_12
; %bb.11:
Lloh36:
	adrp	x8, _WCN36XX_DXE_0_INT_ERR_CLR@GOTPAGE
Lloh37:
	ldr	x8, [x8, _WCN36XX_DXE_0_INT_ERR_CLR@GOTPAGEOFF]
Lloh38:
	ldr	w1, [x8]
	ldr	w2, [x25]
	mov	x0, x19
	bl	_wcn36xx_dxe_write_register
	ldr	w1, [sp, #12]
Lloh39:
	adrp	x0, l_.str.2@PAGE
Lloh40:
	add	x0, x0, l_.str.2@PAGEOFF
	bl	_wcn36xx_err
	ldr	w2, [sp, #8]
LBB0_12:
	ldr	w8, [x20]
	tst	w8, w2
	b.eq	LBB0_14
; %bb.13:
Lloh41:
	adrp	x8, _WCN36XX_DXE_0_INT_DONE_CLR@GOTPAGE
Lloh42:
	ldr	x8, [x8, _WCN36XX_DXE_0_INT_DONE_CLR@GOTPAGEOFF]
Lloh43:
	ldr	w1, [x8]
	ldr	w2, [x25]
	mov	x0, x19
	bl	_wcn36xx_dxe_write_register
	ldr	w2, [sp, #8]
LBB0_14:
	ldr	w8, [x21]
	tst	w8, w2
	b.eq	LBB0_16
; %bb.15:
Lloh44:
	adrp	x8, _WCN36XX_DXE_0_INT_ED_CLR@GOTPAGE
Lloh45:
	ldr	x8, [x8, _WCN36XX_DXE_0_INT_ED_CLR@GOTPAGEOFF]
Lloh46:
	ldr	w1, [x8]
	ldr	w2, [x25]
	mov	x0, x19
	bl	_wcn36xx_dxe_write_register
	ldr	w2, [sp, #8]
LBB0_16:
	ldr	w0, [x22]
Lloh47:
	adrp	x1, l_.str.3@PAGE
Lloh48:
	add	x1, x1, l_.str.3@PAGEOFF
	bl	_wcn36xx_dbg
	ldr	w8, [sp, #8]
	ldr	w9, [x20]
	ldr	w10, [x21]
	orr	w9, w10, w9
	tst	w9, w8
	b.eq	LBB0_18
; %bb.17:
	mov	x0, x19
	mov	x1, x19
	bl	_reap_tx_dxes
LBB0_18:
Lloh49:
	adrp	x8, _IRQ_HANDLED@GOTPAGE
Lloh50:
	ldr	x8, [x8, _IRQ_HANDLED@GOTPAGEOFF]
Lloh51:
	ldr	w0, [x8]
	ldp	x29, x30, [sp, #80]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #64]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #48]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #32]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #96
	ret
	.loh AdrpLdrGot	Lloh13, Lloh14
	.loh AdrpLdrGot	Lloh11, Lloh12
	.loh AdrpLdrGot	Lloh9, Lloh10
	.loh AdrpLdrGot	Lloh7, Lloh8
	.loh AdrpLdrGot	Lloh5, Lloh6
	.loh AdrpLdrGot	Lloh3, Lloh4
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpAdd	Lloh21, Lloh22
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh23, Lloh24, Lloh25
	.loh AdrpLdrGotLdr	Lloh26, Lloh27, Lloh28
	.loh AdrpAdd	Lloh29, Lloh30
	.loh AdrpLdrGot	Lloh31, Lloh32
	.loh AdrpLdrGotLdr	Lloh33, Lloh34, Lloh35
	.loh AdrpAdd	Lloh39, Lloh40
	.loh AdrpLdrGotLdr	Lloh36, Lloh37, Lloh38
	.loh AdrpLdrGotLdr	Lloh41, Lloh42, Lloh43
	.loh AdrpLdrGotLdr	Lloh44, Lloh45, Lloh46
	.loh AdrpAdd	Lloh47, Lloh48
	.loh AdrpLdrGotLdr	Lloh49, Lloh50, Lloh51
	.cfi_endproc
                                        ; -- End function
	.comm	_WCN36XX_DXE_INT_SRC_RAW_REG,4,2 ; @WCN36XX_DXE_INT_SRC_RAW_REG
	.comm	_WCN36XX_INT_MASK_CHAN_TX_H,4,2 ; @WCN36XX_INT_MASK_CHAN_TX_H
	.comm	_WCN36XX_DXE_CH_STATUS_REG_ADDR_TX_H,4,2 ; @WCN36XX_DXE_CH_STATUS_REG_ADDR_TX_H
	.comm	_WCN36XX_DXE_0_INT_CLR,4,2      ; @WCN36XX_DXE_0_INT_CLR
	.comm	_WCN36XX_CH_STAT_INT_ERR_MASK,4,2 ; @WCN36XX_CH_STAT_INT_ERR_MASK
	.comm	_WCN36XX_DXE_0_INT_ERR_CLR,4,2  ; @WCN36XX_DXE_0_INT_ERR_CLR
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"DXE IRQ reported error: 0x%x in high TX channel\n"

	.comm	_WCN36XX_CH_STAT_INT_DONE_MASK,4,2 ; @WCN36XX_CH_STAT_INT_DONE_MASK
	.comm	_WCN36XX_DXE_0_INT_DONE_CLR,4,2 ; @WCN36XX_DXE_0_INT_DONE_CLR
	.comm	_WCN36XX_CH_STAT_INT_ED_MASK,4,2 ; @WCN36XX_CH_STAT_INT_ED_MASK
	.comm	_WCN36XX_DXE_0_INT_ED_CLR,4,2   ; @WCN36XX_DXE_0_INT_ED_CLR
	.comm	_WCN36XX_DBG_DXE,4,2            ; @WCN36XX_DBG_DXE
l_.str.1:                               ; @.str.1
	.asciz	"dxe tx ready high, reason %08x\n"

	.comm	_WCN36XX_INT_MASK_CHAN_TX_L,4,2 ; @WCN36XX_INT_MASK_CHAN_TX_L
	.comm	_WCN36XX_DXE_CH_STATUS_REG_ADDR_TX_L,4,2 ; @WCN36XX_DXE_CH_STATUS_REG_ADDR_TX_L
l_.str.2:                               ; @.str.2
	.asciz	"DXE IRQ reported error: 0x%x in low TX channel\n"

l_.str.3:                               ; @.str.3
	.asciz	"dxe tx ready low, reason %08x\n"

	.comm	_IRQ_HANDLED,4,2                ; @IRQ_HANDLED
	.no_dead_strip	_wcn36xx_irq_tx_complete
.subsections_via_symbols
