	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function ath9k_hw_4k_set_gain
_ath9k_hw_4k_set_gain:                  ## @ath9k_hw_4k_set_gain
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%ecx, -44(%rbp)                 ## 4-byte Spill
	movq	%rsi, %r14
	movq	%rdi, %r13
	callq	_ENABLE_REG_RMW_BUFFER
	movq	_AR_PHY_SWITCH_CHAIN_0@GOTPCREL(%rip), %rax
	movl	(%rax), %r12d
	movq	64(%r14), %rax
	movl	(%rax), %edi
	callq	_le32_to_cpu
	movq	%r13, %rdi
	movl	%r12d, %esi
	movl	%eax, %edx
	xorl	%ecx, %ecx
	callq	_REG_RMW
	xorl	%edi, %edi
	callq	_AR_PHY_TIMING_CTRL4
	movl	%eax, %r12d
	movq	56(%r14), %rax
	movl	(%rax), %edi
	movq	_AR_PHY_TIMING_CTRL4_IQCORR_Q_I_COFF@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_SM
	movl	%eax, %ebx
	movq	48(%r14), %rax
	movl	(%rax), %edi
	movq	_AR_PHY_TIMING_CTRL4_IQCORR_Q_Q_COFF@GOTPCREL(%rip), %r15
	movl	(%r15), %esi
	callq	_SM
	orl	%eax, %ebx
	movq	_AR_PHY_TIMING_CTRL4_IQCORR_Q_I_COFF@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	orl	(%r15), %ecx
	movq	%r13, %rdi
	movl	%r12d, %esi
	movl	%ebx, %edx
	callq	_REG_RMW
	movq	%r13, %rdi
	callq	_ath9k_hw_4k_get_eeprom_rev
	movq	_AR5416_EEP_MINOR_VER_3@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jl	LBB0_2
## %bb.1:
	movq	32(%r14), %rax
	movq	40(%r14), %rcx
	movl	(%rcx), %ecx
	movl	%ecx, -44(%rbp)                 ## 4-byte Spill
	movq	_AR_PHY_GAIN_2GHZ@GOTPCREL(%rip), %rbx
	movq	(%rbx), %rsi
	movq	_AR_PHY_GAIN_2GHZ_XATTEN1_MARGIN@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	movl	(%rax), %ecx
	movq	%r13, %rdi
	callq	_REG_RMW_FIELD
	movq	(%rbx), %rsi
	movq	_AR_PHY_GAIN_2GHZ_XATTEN1_DB@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	24(%r14), %rax
	movl	(%rax), %ecx
	movq	%r13, %rdi
	callq	_REG_RMW_FIELD
	movq	(%rbx), %rsi
	movq	_AR_PHY_GAIN_2GHZ_XATTEN2_MARGIN@GOTPCREL(%rip), %r15
	movl	(%r15), %edx
	movq	16(%r14), %rax
	movl	(%rax), %ecx
	movq	%r13, %rdi
	callq	_REG_RMW_FIELD
	movq	(%rbx), %rsi
	movq	_AR_PHY_GAIN_2GHZ_XATTEN2_DB@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	8(%r14), %rax
	movl	(%rax), %ecx
	movq	%r13, %rdi
	callq	_REG_RMW_FIELD
	movl	$4096, %r12d                    ## imm = 0x1000
	movq	(%rbx), %rsi
	addq	%r12, %rsi
	movq	_AR_PHY_GAIN_2GHZ_XATTEN1_MARGIN@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	32(%r14), %rax
	movl	(%rax), %ecx
	movq	%r13, %rdi
	callq	_REG_RMW_FIELD
	movq	(%rbx), %rsi
	addq	%r12, %rsi
	movq	_AR_PHY_GAIN_2GHZ_XATTEN1_DB@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	24(%r14), %rax
	movl	(%rax), %ecx
	movq	%r13, %rdi
	callq	_REG_RMW_FIELD
	movq	(%rbx), %rsi
	addq	%r12, %rsi
	movl	(%r15), %edx
	movq	16(%r14), %rax
	movl	(%rax), %ecx
	movq	%r13, %rdi
	callq	_REG_RMW_FIELD
	addq	(%rbx), %r12
	movq	_AR_PHY_GAIN_2GHZ_XATTEN2_DB@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	8(%r14), %rax
	movl	(%rax), %ecx
	movq	%r13, %rdi
	movq	%r12, %rsi
	callq	_REG_RMW_FIELD
LBB0_2:
	movq	_AR_PHY_RXGAIN@GOTPCREL(%rip), %r12
	movq	(%r12), %rsi
	movq	_AR9280_PHY_RXGAIN_TXRX_ATTEN@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r13, %rdi
	movl	-44(%rbp), %r15d                ## 4-byte Reload
	movl	%r15d, %ecx
	callq	_REG_RMW_FIELD
	movq	(%r12), %rsi
	movq	_AR9280_PHY_RXGAIN_TXRX_MARGIN@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	(%r14), %rax
	movl	(%rax), %ecx
	movq	%r13, %rdi
	callq	_REG_RMW_FIELD
	movl	$4096, %ebx                     ## imm = 0x1000
	movq	(%r12), %rsi
	addq	%rbx, %rsi
	movq	_AR9280_PHY_RXGAIN_TXRX_ATTEN@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r13, %rdi
	movl	%r15d, %ecx
	callq	_REG_RMW_FIELD
	addq	(%r12), %rbx
	movq	_AR9280_PHY_RXGAIN_TXRX_MARGIN@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	(%r14), %rax
	movl	(%rax), %ecx
	movq	%r13, %rdi
	movq	%rbx, %rsi
	callq	_REG_RMW_FIELD
	movq	%r13, %rdi
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_REG_RMW_BUFFER_FLUSH           ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_AR_PHY_SWITCH_CHAIN_0,4,2      ## @AR_PHY_SWITCH_CHAIN_0
	.comm	_AR_PHY_TIMING_CTRL4_IQCORR_Q_I_COFF,4,2 ## @AR_PHY_TIMING_CTRL4_IQCORR_Q_I_COFF
	.comm	_AR_PHY_TIMING_CTRL4_IQCORR_Q_Q_COFF,4,2 ## @AR_PHY_TIMING_CTRL4_IQCORR_Q_Q_COFF
	.comm	_AR5416_EEP_MINOR_VER_3,8,3     ## @AR5416_EEP_MINOR_VER_3
	.comm	_AR_PHY_GAIN_2GHZ,8,3           ## @AR_PHY_GAIN_2GHZ
	.comm	_AR_PHY_GAIN_2GHZ_XATTEN1_MARGIN,4,2 ## @AR_PHY_GAIN_2GHZ_XATTEN1_MARGIN
	.comm	_AR_PHY_GAIN_2GHZ_XATTEN1_DB,4,2 ## @AR_PHY_GAIN_2GHZ_XATTEN1_DB
	.comm	_AR_PHY_GAIN_2GHZ_XATTEN2_MARGIN,4,2 ## @AR_PHY_GAIN_2GHZ_XATTEN2_MARGIN
	.comm	_AR_PHY_GAIN_2GHZ_XATTEN2_DB,4,2 ## @AR_PHY_GAIN_2GHZ_XATTEN2_DB
	.comm	_AR_PHY_RXGAIN,8,3              ## @AR_PHY_RXGAIN
	.comm	_AR9280_PHY_RXGAIN_TXRX_ATTEN,4,2 ## @AR9280_PHY_RXGAIN_TXRX_ATTEN
	.comm	_AR9280_PHY_RXGAIN_TXRX_MARGIN,4,2 ## @AR9280_PHY_RXGAIN_TXRX_MARGIN
	.no_dead_strip	_ath9k_hw_4k_set_gain
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function ath9k_hw_4k_set_gain
_ath9k_hw_4k_set_gain:                  ; @ath9k_hw_4k_set_gain
	.cfi_startproc
; %bb.0:
	stp	x26, x25, [sp, #-80]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	mov	x21, x3
	mov	x20, x1
	mov	x19, x0
	bl	_ENABLE_REG_RMW_BUFFER
Lloh0:
	adrp	x8, _AR_PHY_SWITCH_CHAIN_0@GOTPAGE
Lloh1:
	ldr	x8, [x8, _AR_PHY_SWITCH_CHAIN_0@GOTPAGEOFF]
Lloh2:
	ldr	w22, [x8]
	ldr	x8, [x20, #64]
	ldr	w0, [x8]
	bl	_le32_to_cpu
	mov	x2, x0
	mov	x0, x19
	mov	x1, x22
	mov	w3, #0
	bl	_REG_RMW
	mov	w0, #0
	bl	_AR_PHY_TIMING_CTRL4
	mov	x22, x0
	ldr	x8, [x20, #56]
	ldr	w0, [x8]
Lloh3:
	adrp	x24, _AR_PHY_TIMING_CTRL4_IQCORR_Q_I_COFF@GOTPAGE
Lloh4:
	ldr	x24, [x24, _AR_PHY_TIMING_CTRL4_IQCORR_Q_I_COFF@GOTPAGEOFF]
	ldr	w1, [x24]
	bl	_SM
	mov	x23, x0
	ldr	x8, [x20, #48]
	ldr	w0, [x8]
Lloh5:
	adrp	x25, _AR_PHY_TIMING_CTRL4_IQCORR_Q_Q_COFF@GOTPAGE
Lloh6:
	ldr	x25, [x25, _AR_PHY_TIMING_CTRL4_IQCORR_Q_Q_COFF@GOTPAGEOFF]
	ldr	w1, [x25]
	bl	_SM
	orr	w2, w0, w23
	ldr	w8, [x25]
	ldr	w9, [x24]
	orr	w3, w9, w8
	mov	x0, x19
	mov	x1, x22
	bl	_REG_RMW
	mov	x0, x19
	bl	_ath9k_hw_4k_get_eeprom_rev
Lloh7:
	adrp	x8, _AR5416_EEP_MINOR_VER_3@GOTPAGE
Lloh8:
	ldr	x8, [x8, _AR5416_EEP_MINOR_VER_3@GOTPAGEOFF]
Lloh9:
	ldr	x8, [x8]
	cmp	x0, x8
	b.lt	LBB0_2
; %bb.1:
Lloh10:
	adrp	x22, _AR_PHY_GAIN_2GHZ@GOTPAGE
Lloh11:
	ldr	x22, [x22, _AR_PHY_GAIN_2GHZ@GOTPAGEOFF]
	ldp	x9, x8, [x20, #32]
	ldr	w21, [x8]
	ldr	x1, [x22]
Lloh12:
	adrp	x23, _AR_PHY_GAIN_2GHZ_XATTEN1_MARGIN@GOTPAGE
Lloh13:
	ldr	x23, [x23, _AR_PHY_GAIN_2GHZ_XATTEN1_MARGIN@GOTPAGEOFF]
	ldr	w2, [x23]
	ldr	w3, [x9]
	mov	x0, x19
	bl	_REG_RMW_FIELD
	ldr	x1, [x22]
Lloh14:
	adrp	x24, _AR_PHY_GAIN_2GHZ_XATTEN1_DB@GOTPAGE
Lloh15:
	ldr	x24, [x24, _AR_PHY_GAIN_2GHZ_XATTEN1_DB@GOTPAGEOFF]
	ldr	w2, [x24]
	ldr	x8, [x20, #24]
	ldr	w3, [x8]
	mov	x0, x19
	bl	_REG_RMW_FIELD
	ldr	x1, [x22]
Lloh16:
	adrp	x25, _AR_PHY_GAIN_2GHZ_XATTEN2_MARGIN@GOTPAGE
Lloh17:
	ldr	x25, [x25, _AR_PHY_GAIN_2GHZ_XATTEN2_MARGIN@GOTPAGEOFF]
	ldr	w2, [x25]
	ldr	x8, [x20, #16]
	ldr	w3, [x8]
	mov	x0, x19
	bl	_REG_RMW_FIELD
	ldr	x1, [x22]
Lloh18:
	adrp	x26, _AR_PHY_GAIN_2GHZ_XATTEN2_DB@GOTPAGE
Lloh19:
	ldr	x26, [x26, _AR_PHY_GAIN_2GHZ_XATTEN2_DB@GOTPAGEOFF]
	ldr	w2, [x26]
	ldr	x8, [x20, #8]
	ldr	w3, [x8]
	mov	x0, x19
	bl	_REG_RMW_FIELD
	ldr	x8, [x22]
	add	x1, x8, #1, lsl #12             ; =4096
	ldr	w2, [x23]
	ldr	x8, [x20, #32]
	ldr	w3, [x8]
	mov	x0, x19
	bl	_REG_RMW_FIELD
	ldr	x8, [x22]
	add	x1, x8, #1, lsl #12             ; =4096
	ldr	w2, [x24]
	ldr	x8, [x20, #24]
	ldr	w3, [x8]
	mov	x0, x19
	bl	_REG_RMW_FIELD
	ldr	x8, [x22]
	add	x1, x8, #1, lsl #12             ; =4096
	ldr	w2, [x25]
	ldr	x8, [x20, #16]
	ldr	w3, [x8]
	mov	x0, x19
	bl	_REG_RMW_FIELD
	ldr	x8, [x22]
	add	x1, x8, #1, lsl #12             ; =4096
	ldr	w2, [x26]
	ldr	x8, [x20, #8]
	ldr	w3, [x8]
	mov	x0, x19
	bl	_REG_RMW_FIELD
LBB0_2:
Lloh20:
	adrp	x22, _AR_PHY_RXGAIN@GOTPAGE
Lloh21:
	ldr	x22, [x22, _AR_PHY_RXGAIN@GOTPAGEOFF]
	ldr	x1, [x22]
Lloh22:
	adrp	x23, _AR9280_PHY_RXGAIN_TXRX_ATTEN@GOTPAGE
Lloh23:
	ldr	x23, [x23, _AR9280_PHY_RXGAIN_TXRX_ATTEN@GOTPAGEOFF]
	ldr	w2, [x23]
	mov	x0, x19
	mov	x3, x21
	bl	_REG_RMW_FIELD
	ldr	x1, [x22]
Lloh24:
	adrp	x24, _AR9280_PHY_RXGAIN_TXRX_MARGIN@GOTPAGE
Lloh25:
	ldr	x24, [x24, _AR9280_PHY_RXGAIN_TXRX_MARGIN@GOTPAGEOFF]
	ldr	w2, [x24]
	ldr	x8, [x20]
	ldr	w3, [x8]
	mov	x0, x19
	bl	_REG_RMW_FIELD
	ldr	x8, [x22]
	add	x1, x8, #1, lsl #12             ; =4096
	ldr	w2, [x23]
	mov	x0, x19
	mov	x3, x21
	bl	_REG_RMW_FIELD
	ldr	x8, [x22]
	add	x1, x8, #1, lsl #12             ; =4096
	ldr	w2, [x24]
	ldr	x8, [x20]
	ldr	w3, [x8]
	mov	x0, x19
	bl	_REG_RMW_FIELD
	mov	x0, x19
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp], #80             ; 16-byte Folded Reload
	b	_REG_RMW_BUFFER_FLUSH
	.loh AdrpLdrGotLdr	Lloh7, Lloh8, Lloh9
	.loh AdrpLdrGot	Lloh5, Lloh6
	.loh AdrpLdrGot	Lloh3, Lloh4
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGot	Lloh18, Lloh19
	.loh AdrpLdrGot	Lloh16, Lloh17
	.loh AdrpLdrGot	Lloh14, Lloh15
	.loh AdrpLdrGot	Lloh12, Lloh13
	.loh AdrpLdrGot	Lloh10, Lloh11
	.loh AdrpLdrGot	Lloh24, Lloh25
	.loh AdrpLdrGot	Lloh22, Lloh23
	.loh AdrpLdrGot	Lloh20, Lloh21
	.cfi_endproc
                                        ; -- End function
	.comm	_AR_PHY_SWITCH_CHAIN_0,4,2      ; @AR_PHY_SWITCH_CHAIN_0
	.comm	_AR_PHY_TIMING_CTRL4_IQCORR_Q_I_COFF,4,2 ; @AR_PHY_TIMING_CTRL4_IQCORR_Q_I_COFF
	.comm	_AR_PHY_TIMING_CTRL4_IQCORR_Q_Q_COFF,4,2 ; @AR_PHY_TIMING_CTRL4_IQCORR_Q_Q_COFF
	.comm	_AR5416_EEP_MINOR_VER_3,8,3     ; @AR5416_EEP_MINOR_VER_3
	.comm	_AR_PHY_GAIN_2GHZ,8,3           ; @AR_PHY_GAIN_2GHZ
	.comm	_AR_PHY_GAIN_2GHZ_XATTEN1_MARGIN,4,2 ; @AR_PHY_GAIN_2GHZ_XATTEN1_MARGIN
	.comm	_AR_PHY_GAIN_2GHZ_XATTEN1_DB,4,2 ; @AR_PHY_GAIN_2GHZ_XATTEN1_DB
	.comm	_AR_PHY_GAIN_2GHZ_XATTEN2_MARGIN,4,2 ; @AR_PHY_GAIN_2GHZ_XATTEN2_MARGIN
	.comm	_AR_PHY_GAIN_2GHZ_XATTEN2_DB,4,2 ; @AR_PHY_GAIN_2GHZ_XATTEN2_DB
	.comm	_AR_PHY_RXGAIN,8,3              ; @AR_PHY_RXGAIN
	.comm	_AR9280_PHY_RXGAIN_TXRX_ATTEN,4,2 ; @AR9280_PHY_RXGAIN_TXRX_ATTEN
	.comm	_AR9280_PHY_RXGAIN_TXRX_MARGIN,4,2 ; @AR9280_PHY_RXGAIN_TXRX_MARGIN
	.no_dead_strip	_ath9k_hw_4k_set_gain
.subsections_via_symbols
