	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function charger_init_hw_regs
_charger_init_hw_regs:                  ## @charger_init_hw_regs
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	subq	$16, %rsp
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r14
	movl	24(%rdi), %edi
	movq	_AXP20X_V_LTF_CHRG@GOTPCREL(%rip), %r15
	movl	(%r15), %esi
	movq	_CHRG_VLTFC_0C@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	callq	_regmap_write
	testl	%eax, %eax
	js	LBB0_1
## %bb.4:
	movl	24(%r14), %edi
	movq	_AXP20X_V_HTF_CHRG@GOTPCREL(%rip), %r15
	movl	(%r15), %esi
	movq	_CHRG_VHTFC_45C@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	callq	_regmap_write
	testl	%eax, %eax
	js	LBB0_1
## %bb.5:
	movl	24(%r14), %edi
	movq	_AXP20X_CHRG_CTRL2@GOTPCREL(%rip), %r15
	movl	(%r15), %esi
	movq	_CNTL2_CHG_OUT_TURNON@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movl	%ecx, %edx
	callq	_regmap_update_bits
	testl	%eax, %eax
	js	LBB0_1
## %bb.6:
	movl	24(%r14), %edi
	movq	_AXP20X_CHRG_CTRL1@GOTPCREL(%rip), %r15
	movl	(%r15), %esi
	movq	_CHRG_CCCV_ITERM_20P@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	xorl	%ecx, %ecx
	callq	_regmap_update_bits
	testl	%eax, %eax
	js	LBB0_1
## %bb.7:
	movl	24(%r14), %edi
	movq	_AXP20X_CC_CTRL@GOTPCREL(%rip), %r12
	movl	(%r12), %esi
	movq	_FG_CNTL_OCV_ADJ_EN@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	xorl	%ecx, %ecx
	callq	_regmap_update_bits
	testl	%eax, %eax
	js	LBB0_8
## %bb.9:
	movl	24(%r14), %edi
	movl	(%r15), %esi
	leaq	-36(%rbp), %rdx
	callq	_regmap_read
	testl	%eax, %eax
	js	LBB0_10
## %bb.11:
	movl	-36(%rbp), %eax
	movq	_CHRG_CCCV_CV_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	andl	%eax, %edx
	movq	_CHRG_CCCV_CV_BIT_POS@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shrl	%cl, %edx
	addl	$-128, %edx
	cmpl	$3, %edx
	ja	LBB0_13
## %bb.12:
	leaq	LJTI0_0(%rip), %rcx
	movslq	(%rcx,%rdx,4), %rdx
	addq	%rcx, %rdx
	jmpq	*%rdx
LBB0_17:
	movq	_CV_4350MV@GOTPCREL(%rip), %rcx
	jmp	LBB0_18
LBB0_1:
	movl	%eax, %ebx
	movq	16(%r14), %rdi
	movl	(%r15), %edx
LBB0_2:
	leaq	L_.str(%rip), %rsi
LBB0_3:
	movl	%ebx, %ecx
	callq	_dev_err
LBB0_20:
	movl	%ebx, %eax
	addq	$16, %rsp
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_8:
	movl	%eax, %ebx
	movq	16(%r14), %rdi
	movl	(%r12), %edx
	jmp	LBB0_2
LBB0_10:
	movl	%eax, %ebx
	movq	16(%r14), %rdi
	movl	(%r15), %edx
	leaq	L_.str.1(%rip), %rsi
	jmp	LBB0_3
LBB0_13:
	movl	8(%r14), %edx
	jmp	LBB0_19
LBB0_16:
	movq	_CV_4200MV@GOTPCREL(%rip), %rcx
	jmp	LBB0_18
LBB0_15:
	movq	_CV_4150MV@GOTPCREL(%rip), %rcx
	jmp	LBB0_18
LBB0_14:
	movq	_CV_4100MV@GOTPCREL(%rip), %rcx
LBB0_18:
	movl	(%rcx), %edx
	movl	%edx, 8(%r14)
LBB0_19:
	movq	_CHRG_CCCV_CC_MASK@GOTPCREL(%rip), %rcx
	andl	(%rcx), %eax
	movq	_CHRG_CCCV_CC_BIT_POS@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shrl	%cl, %eax
	movq	_CHRG_CCCV_CC_LSB_RES@GOTPCREL(%rip), %rcx
	imull	(%rcx), %eax
	movq	_CHRG_CCCV_CC_OFFSET@GOTPCREL(%rip), %rcx
	addl	(%rcx), %eax
	movl	%eax, (%r14)
	movl	%edx, 12(%r14)
	movl	%eax, 4(%r14)
	xorl	%ebx, %ebx
	jmp	LBB0_20
	.cfi_endproc
	.p2align	2, 0x90
	.data_region jt32
.set L0_0_set_17, LBB0_17-LJTI0_0
.set L0_0_set_16, LBB0_16-LJTI0_0
.set L0_0_set_15, LBB0_15-LJTI0_0
.set L0_0_set_14, LBB0_14-LJTI0_0
LJTI0_0:
	.long	L0_0_set_17
	.long	L0_0_set_16
	.long	L0_0_set_15
	.long	L0_0_set_14
	.end_data_region
                                        ## -- End function
	.comm	_AXP20X_V_LTF_CHRG,4,2          ## @AXP20X_V_LTF_CHRG
	.comm	_CHRG_VLTFC_0C,4,2              ## @CHRG_VLTFC_0C
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"register(%x) write error(%d)\n"

	.comm	_AXP20X_V_HTF_CHRG,4,2          ## @AXP20X_V_HTF_CHRG
	.comm	_CHRG_VHTFC_45C,4,2             ## @CHRG_VHTFC_45C
	.comm	_AXP20X_CHRG_CTRL2,4,2          ## @AXP20X_CHRG_CTRL2
	.comm	_CNTL2_CHG_OUT_TURNON,4,2       ## @CNTL2_CHG_OUT_TURNON
	.comm	_AXP20X_CHRG_CTRL1,4,2          ## @AXP20X_CHRG_CTRL1
	.comm	_CHRG_CCCV_ITERM_20P,4,2        ## @CHRG_CCCV_ITERM_20P
	.comm	_AXP20X_CC_CTRL,4,2             ## @AXP20X_CC_CTRL
	.comm	_FG_CNTL_OCV_ADJ_EN,4,2         ## @FG_CNTL_OCV_ADJ_EN
L_.str.1:                               ## @.str.1
	.asciz	"register(%x) read error(%d)\n"

	.comm	_CHRG_CCCV_CV_MASK,4,2          ## @CHRG_CCCV_CV_MASK
	.comm	_CHRG_CCCV_CV_BIT_POS,4,2       ## @CHRG_CCCV_CV_BIT_POS
	.comm	_CV_4100MV,4,2                  ## @CV_4100MV
	.comm	_CV_4150MV,4,2                  ## @CV_4150MV
	.comm	_CV_4200MV,4,2                  ## @CV_4200MV
	.comm	_CV_4350MV,4,2                  ## @CV_4350MV
	.comm	_CHRG_CCCV_CC_MASK,4,2          ## @CHRG_CCCV_CC_MASK
	.comm	_CHRG_CCCV_CC_BIT_POS,4,2       ## @CHRG_CCCV_CC_BIT_POS
	.comm	_CHRG_CCCV_CC_LSB_RES,4,2       ## @CHRG_CCCV_CC_LSB_RES
	.comm	_CHRG_CCCV_CC_OFFSET,4,2        ## @CHRG_CCCV_CC_OFFSET
	.no_dead_strip	_charger_init_hw_regs
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function charger_init_hw_regs
_charger_init_hw_regs:                  ; @charger_init_hw_regs
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #64
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x0
	ldr	w0, [x0, #24]
Lloh0:
	adrp	x21, _AXP20X_V_LTF_CHRG@GOTPAGE
Lloh1:
	ldr	x21, [x21, _AXP20X_V_LTF_CHRG@GOTPAGEOFF]
	ldr	w1, [x21]
Lloh2:
	adrp	x8, _CHRG_VLTFC_0C@GOTPAGE
Lloh3:
	ldr	x8, [x8, _CHRG_VLTFC_0C@GOTPAGEOFF]
Lloh4:
	ldr	w2, [x8]
	bl	_regmap_write
	tbnz	w0, #31, LBB0_9
; %bb.1:
	ldr	w0, [x19, #24]
Lloh5:
	adrp	x21, _AXP20X_V_HTF_CHRG@GOTPAGE
Lloh6:
	ldr	x21, [x21, _AXP20X_V_HTF_CHRG@GOTPAGEOFF]
	ldr	w1, [x21]
Lloh7:
	adrp	x8, _CHRG_VHTFC_45C@GOTPAGE
Lloh8:
	ldr	x8, [x8, _CHRG_VHTFC_45C@GOTPAGEOFF]
Lloh9:
	ldr	w2, [x8]
	bl	_regmap_write
	tbnz	w0, #31, LBB0_9
; %bb.2:
	ldr	w0, [x19, #24]
Lloh10:
	adrp	x21, _AXP20X_CHRG_CTRL2@GOTPAGE
Lloh11:
	ldr	x21, [x21, _AXP20X_CHRG_CTRL2@GOTPAGEOFF]
	ldr	w1, [x21]
Lloh12:
	adrp	x8, _CNTL2_CHG_OUT_TURNON@GOTPAGE
Lloh13:
	ldr	x8, [x8, _CNTL2_CHG_OUT_TURNON@GOTPAGEOFF]
Lloh14:
	ldr	w2, [x8]
	mov	x3, x2
	bl	_regmap_update_bits
	tbnz	w0, #31, LBB0_9
; %bb.3:
	ldr	w0, [x19, #24]
Lloh15:
	adrp	x21, _AXP20X_CHRG_CTRL1@GOTPAGE
Lloh16:
	ldr	x21, [x21, _AXP20X_CHRG_CTRL1@GOTPAGEOFF]
	ldr	w1, [x21]
Lloh17:
	adrp	x8, _CHRG_CCCV_ITERM_20P@GOTPAGE
Lloh18:
	ldr	x8, [x8, _CHRG_CCCV_ITERM_20P@GOTPAGEOFF]
Lloh19:
	ldr	w2, [x8]
	mov	w3, #0
	bl	_regmap_update_bits
	tbnz	w0, #31, LBB0_9
; %bb.4:
	ldr	w0, [x19, #24]
Lloh20:
	adrp	x22, _AXP20X_CC_CTRL@GOTPAGE
Lloh21:
	ldr	x22, [x22, _AXP20X_CC_CTRL@GOTPAGEOFF]
	ldr	w1, [x22]
Lloh22:
	adrp	x8, _FG_CNTL_OCV_ADJ_EN@GOTPAGE
Lloh23:
	ldr	x8, [x8, _FG_CNTL_OCV_ADJ_EN@GOTPAGEOFF]
Lloh24:
	ldr	w2, [x8]
	mov	w3, #0
	bl	_regmap_update_bits
	tbnz	w0, #31, LBB0_13
; %bb.5:
	ldr	w0, [x19, #24]
	ldr	w1, [x21]
	add	x2, sp, #12
	bl	_regmap_read
	tbnz	w0, #31, LBB0_14
; %bb.6:
	ldr	w8, [sp, #12]
Lloh25:
	adrp	x9, _CHRG_CCCV_CV_MASK@GOTPAGE
Lloh26:
	ldr	x9, [x9, _CHRG_CCCV_CV_MASK@GOTPAGEOFF]
Lloh27:
	ldr	w9, [x9]
	and	w9, w9, w8
Lloh28:
	adrp	x10, _CHRG_CCCV_CV_BIT_POS@GOTPAGE
Lloh29:
	ldr	x10, [x10, _CHRG_CCCV_CV_BIT_POS@GOTPAGEOFF]
Lloh30:
	ldr	w10, [x10]
	lsr	w9, w9, w10
	sub	w9, w9, #128
	cmp	w9, #3
	b.hi	LBB0_15
; %bb.7:
Lloh31:
	adrp	x10, lJTI0_0@PAGE
Lloh32:
	add	x10, x10, lJTI0_0@PAGEOFF
	adr	x11, LBB0_8
	ldrb	w12, [x10, x9]
	add	x11, x11, x12, lsl #2
	br	x11
LBB0_8:
Lloh33:
	adrp	x9, _CV_4350MV@GOTPAGE
Lloh34:
	ldr	x9, [x9, _CV_4350MV@GOTPAGEOFF]
	b	LBB0_19
LBB0_9:
	mov	x20, x0
	ldr	x0, [x19, #16]
	ldr	w2, [x21]
LBB0_10:
Lloh35:
	adrp	x1, l_.str@PAGE
Lloh36:
	add	x1, x1, l_.str@PAGEOFF
LBB0_11:
	mov	x3, x20
	bl	_dev_err
LBB0_12:
	mov	x0, x20
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #64
	ret
LBB0_13:
	mov	x20, x0
	ldr	x0, [x19, #16]
	ldr	w2, [x22]
	b	LBB0_10
LBB0_14:
	mov	x20, x0
	ldr	x0, [x19, #16]
	ldr	w2, [x21]
Lloh37:
	adrp	x1, l_.str.1@PAGE
Lloh38:
	add	x1, x1, l_.str.1@PAGEOFF
	b	LBB0_11
LBB0_15:
	ldr	w9, [x19, #8]
	b	LBB0_20
LBB0_16:
Lloh39:
	adrp	x9, _CV_4200MV@GOTPAGE
Lloh40:
	ldr	x9, [x9, _CV_4200MV@GOTPAGEOFF]
	b	LBB0_19
LBB0_17:
Lloh41:
	adrp	x9, _CV_4150MV@GOTPAGE
Lloh42:
	ldr	x9, [x9, _CV_4150MV@GOTPAGEOFF]
	b	LBB0_19
LBB0_18:
Lloh43:
	adrp	x9, _CV_4100MV@GOTPAGE
Lloh44:
	ldr	x9, [x9, _CV_4100MV@GOTPAGEOFF]
LBB0_19:
	ldr	w9, [x9]
	str	w9, [x19, #8]
LBB0_20:
	mov	w20, #0
Lloh45:
	adrp	x10, _CHRG_CCCV_CC_MASK@GOTPAGE
Lloh46:
	ldr	x10, [x10, _CHRG_CCCV_CC_MASK@GOTPAGEOFF]
Lloh47:
	ldr	w10, [x10]
	and	w8, w10, w8
Lloh48:
	adrp	x10, _CHRG_CCCV_CC_BIT_POS@GOTPAGE
Lloh49:
	ldr	x10, [x10, _CHRG_CCCV_CC_BIT_POS@GOTPAGEOFF]
Lloh50:
	ldr	w10, [x10]
	lsr	w8, w8, w10
Lloh51:
	adrp	x10, _CHRG_CCCV_CC_LSB_RES@GOTPAGE
Lloh52:
	ldr	x10, [x10, _CHRG_CCCV_CC_LSB_RES@GOTPAGEOFF]
Lloh53:
	adrp	x11, _CHRG_CCCV_CC_OFFSET@GOTPAGE
Lloh54:
	ldr	x11, [x11, _CHRG_CCCV_CC_OFFSET@GOTPAGEOFF]
Lloh55:
	ldr	w10, [x10]
Lloh56:
	ldr	w11, [x11]
	madd	w8, w8, w10, w11
	str	w9, [x19, #12]
	stp	w8, w8, [x19]
	b	LBB0_12
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh7, Lloh8, Lloh9
	.loh AdrpLdrGot	Lloh5, Lloh6
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGot	Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh19
	.loh AdrpLdrGot	Lloh15, Lloh16
	.loh AdrpLdrGotLdr	Lloh22, Lloh23, Lloh24
	.loh AdrpLdrGot	Lloh20, Lloh21
	.loh AdrpLdrGotLdr	Lloh28, Lloh29, Lloh30
	.loh AdrpLdrGotLdr	Lloh25, Lloh26, Lloh27
	.loh AdrpAdd	Lloh31, Lloh32
	.loh AdrpLdrGot	Lloh33, Lloh34
	.loh AdrpAdd	Lloh35, Lloh36
	.loh AdrpAdd	Lloh37, Lloh38
	.loh AdrpLdrGot	Lloh39, Lloh40
	.loh AdrpLdrGot	Lloh41, Lloh42
	.loh AdrpLdrGot	Lloh43, Lloh44
	.loh AdrpLdrGotLdr	Lloh53, Lloh54, Lloh56
	.loh AdrpLdrGotLdr	Lloh51, Lloh52, Lloh55
	.loh AdrpLdrGotLdr	Lloh48, Lloh49, Lloh50
	.loh AdrpLdrGotLdr	Lloh45, Lloh46, Lloh47
	.cfi_endproc
	.section	__TEXT,__const
lJTI0_0:
	.byte	(LBB0_8-LBB0_8)>>2
	.byte	(LBB0_16-LBB0_8)>>2
	.byte	(LBB0_17-LBB0_8)>>2
	.byte	(LBB0_18-LBB0_8)>>2
                                        ; -- End function
	.comm	_AXP20X_V_LTF_CHRG,4,2          ; @AXP20X_V_LTF_CHRG
	.comm	_CHRG_VLTFC_0C,4,2              ; @CHRG_VLTFC_0C
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"register(%x) write error(%d)\n"

	.comm	_AXP20X_V_HTF_CHRG,4,2          ; @AXP20X_V_HTF_CHRG
	.comm	_CHRG_VHTFC_45C,4,2             ; @CHRG_VHTFC_45C
	.comm	_AXP20X_CHRG_CTRL2,4,2          ; @AXP20X_CHRG_CTRL2
	.comm	_CNTL2_CHG_OUT_TURNON,4,2       ; @CNTL2_CHG_OUT_TURNON
	.comm	_AXP20X_CHRG_CTRL1,4,2          ; @AXP20X_CHRG_CTRL1
	.comm	_CHRG_CCCV_ITERM_20P,4,2        ; @CHRG_CCCV_ITERM_20P
	.comm	_AXP20X_CC_CTRL,4,2             ; @AXP20X_CC_CTRL
	.comm	_FG_CNTL_OCV_ADJ_EN,4,2         ; @FG_CNTL_OCV_ADJ_EN
l_.str.1:                               ; @.str.1
	.asciz	"register(%x) read error(%d)\n"

	.comm	_CHRG_CCCV_CV_MASK,4,2          ; @CHRG_CCCV_CV_MASK
	.comm	_CHRG_CCCV_CV_BIT_POS,4,2       ; @CHRG_CCCV_CV_BIT_POS
	.comm	_CV_4100MV,4,2                  ; @CV_4100MV
	.comm	_CV_4150MV,4,2                  ; @CV_4150MV
	.comm	_CV_4200MV,4,2                  ; @CV_4200MV
	.comm	_CV_4350MV,4,2                  ; @CV_4350MV
	.comm	_CHRG_CCCV_CC_MASK,4,2          ; @CHRG_CCCV_CC_MASK
	.comm	_CHRG_CCCV_CC_BIT_POS,4,2       ; @CHRG_CCCV_CC_BIT_POS
	.comm	_CHRG_CCCV_CC_LSB_RES,4,2       ; @CHRG_CCCV_CC_LSB_RES
	.comm	_CHRG_CCCV_CC_OFFSET,4,2        ; @CHRG_CCCV_CC_OFFSET
	.no_dead_strip	_charger_init_hw_regs
.subsections_via_symbols
