	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function pci_bridge_child_ext_cfg_accessible
_pci_bridge_child_ext_cfg_accessible:   ## @pci_bridge_child_ext_cfg_accessible
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r14
	pushq	%rbx
	subq	$16, %rsp
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	movq	(%rdi), %rax
	movq	_PCI_BUS_FLAGS_NO_EXTCFG@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	xorl	%ebx, %ebx
	testl	%ecx, (%rax)
	je	LBB0_1
LBB0_7:
	movl	%ebx, %eax
	addq	$16, %rsp
	popq	%rbx
	popq	%r14
	popq	%rbp
	retq
LBB0_1:
	movq	%rdi, %r14
	callq	_pci_is_pcie
	testq	%rax, %rax
	je	LBB0_5
## %bb.2:
	movq	%r14, %rdi
	callq	_pci_pcie_type
	movq	_PCI_EXP_TYPE_ROOT_PORT@GOTPCREL(%rip), %rcx
	movl	$1, %ebx
	cmpq	(%rcx), %rax
	je	LBB0_7
## %bb.3:
	movq	%r14, %rdi
	callq	_pci_pcie_type
	movq	_PCI_EXP_TYPE_UPSTREAM@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	je	LBB0_7
## %bb.4:
	movq	%r14, %rdi
	callq	_pci_pcie_type
	movq	_PCI_EXP_TYPE_DOWNSTREAM@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	je	LBB0_7
LBB0_5:
	movq	_PCI_CAP_ID_PCIX@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	callq	_pci_find_capability
	movl	$0, %ebx
	testl	%eax, %eax
	je	LBB0_7
## %bb.6:
	movslq	%eax, %rsi
	movq	_PCI_X_STATUS@GOTPCREL(%rip), %rax
	addq	(%rax), %rsi
	leaq	-20(%rbp), %rdx
	movq	%r14, %rdi
	callq	_pci_read_config_dword
	movq	_PCI_X_STATUS_266MHZ@GOTPCREL(%rip), %rax
	movq	_PCI_X_STATUS_533MHZ@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ebx
	orl	(%rax), %ebx
	andl	-20(%rbp), %ebx
	jmp	LBB0_7
	.cfi_endproc
                                        ## -- End function
	.comm	_PCI_BUS_FLAGS_NO_EXTCFG,4,2    ## @PCI_BUS_FLAGS_NO_EXTCFG
	.comm	_PCI_EXP_TYPE_ROOT_PORT,8,3     ## @PCI_EXP_TYPE_ROOT_PORT
	.comm	_PCI_EXP_TYPE_UPSTREAM,8,3      ## @PCI_EXP_TYPE_UPSTREAM
	.comm	_PCI_EXP_TYPE_DOWNSTREAM,8,3    ## @PCI_EXP_TYPE_DOWNSTREAM
	.comm	_PCI_CAP_ID_PCIX,4,2            ## @PCI_CAP_ID_PCIX
	.comm	_PCI_X_STATUS,8,3               ## @PCI_X_STATUS
	.comm	_PCI_X_STATUS_266MHZ,4,2        ## @PCI_X_STATUS_266MHZ
	.comm	_PCI_X_STATUS_533MHZ,4,2        ## @PCI_X_STATUS_533MHZ
	.no_dead_strip	_pci_bridge_child_ext_cfg_accessible
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function pci_bridge_child_ext_cfg_accessible
_pci_bridge_child_ext_cfg_accessible:   ; @pci_bridge_child_ext_cfg_accessible
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #48
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	ldr	x8, [x0]
	ldr	w8, [x8]
Lloh0:
	adrp	x9, _PCI_BUS_FLAGS_NO_EXTCFG@GOTPAGE
Lloh1:
	ldr	x9, [x9, _PCI_BUS_FLAGS_NO_EXTCFG@GOTPAGEOFF]
Lloh2:
	ldr	w9, [x9]
	tst	w9, w8
	b.eq	LBB0_2
; %bb.1:
	mov	w0, #0
	b	LBB0_9
LBB0_2:
	mov	x19, x0
	bl	_pci_is_pcie
	cbz	x0, LBB0_7
; %bb.3:
	mov	x0, x19
	bl	_pci_pcie_type
Lloh3:
	adrp	x8, _PCI_EXP_TYPE_ROOT_PORT@GOTPAGE
Lloh4:
	ldr	x8, [x8, _PCI_EXP_TYPE_ROOT_PORT@GOTPAGEOFF]
Lloh5:
	ldr	x8, [x8]
	cmp	x0, x8
	b.eq	LBB0_6
; %bb.4:
	mov	x0, x19
	bl	_pci_pcie_type
Lloh6:
	adrp	x8, _PCI_EXP_TYPE_UPSTREAM@GOTPAGE
Lloh7:
	ldr	x8, [x8, _PCI_EXP_TYPE_UPSTREAM@GOTPAGEOFF]
Lloh8:
	ldr	x8, [x8]
	cmp	x0, x8
	b.eq	LBB0_6
; %bb.5:
	mov	x0, x19
	bl	_pci_pcie_type
Lloh9:
	adrp	x8, _PCI_EXP_TYPE_DOWNSTREAM@GOTPAGE
Lloh10:
	ldr	x8, [x8, _PCI_EXP_TYPE_DOWNSTREAM@GOTPAGEOFF]
Lloh11:
	ldr	x8, [x8]
	cmp	x0, x8
	b.ne	LBB0_7
LBB0_6:
	mov	w0, #1
	b	LBB0_9
LBB0_7:
Lloh12:
	adrp	x8, _PCI_CAP_ID_PCIX@GOTPAGE
Lloh13:
	ldr	x8, [x8, _PCI_CAP_ID_PCIX@GOTPAGEOFF]
Lloh14:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_pci_find_capability
	cbz	w0, LBB0_9
; %bb.8:
Lloh15:
	adrp	x8, _PCI_X_STATUS@GOTPAGE
Lloh16:
	ldr	x8, [x8, _PCI_X_STATUS@GOTPAGEOFF]
Lloh17:
	ldr	x8, [x8]
	add	x1, x8, w0, sxtw
	add	x2, sp, #12
	mov	x0, x19
	bl	_pci_read_config_dword
	ldr	w8, [sp, #12]
Lloh18:
	adrp	x9, _PCI_X_STATUS_266MHZ@GOTPAGE
Lloh19:
	ldr	x9, [x9, _PCI_X_STATUS_266MHZ@GOTPAGEOFF]
Lloh20:
	ldr	w9, [x9]
Lloh21:
	adrp	x10, _PCI_X_STATUS_533MHZ@GOTPAGE
Lloh22:
	ldr	x10, [x10, _PCI_X_STATUS_533MHZ@GOTPAGEOFF]
Lloh23:
	ldr	w10, [x10]
	orr	w9, w10, w9
	and	w0, w9, w8
LBB0_9:
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #48
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.cfi_endproc
                                        ; -- End function
	.comm	_PCI_BUS_FLAGS_NO_EXTCFG,4,2    ; @PCI_BUS_FLAGS_NO_EXTCFG
	.comm	_PCI_EXP_TYPE_ROOT_PORT,8,3     ; @PCI_EXP_TYPE_ROOT_PORT
	.comm	_PCI_EXP_TYPE_UPSTREAM,8,3      ; @PCI_EXP_TYPE_UPSTREAM
	.comm	_PCI_EXP_TYPE_DOWNSTREAM,8,3    ; @PCI_EXP_TYPE_DOWNSTREAM
	.comm	_PCI_CAP_ID_PCIX,4,2            ; @PCI_CAP_ID_PCIX
	.comm	_PCI_X_STATUS,8,3               ; @PCI_X_STATUS
	.comm	_PCI_X_STATUS_266MHZ,4,2        ; @PCI_X_STATUS_266MHZ
	.comm	_PCI_X_STATUS_533MHZ,4,2        ; @PCI_X_STATUS_533MHZ
	.no_dead_strip	_pci_bridge_child_ext_cfg_accessible
.subsections_via_symbols
