	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function xilinx_pcie_init_irq_domain
_xilinx_pcie_init_irq_domain:           ## @xilinx_pcie_init_irq_domain
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r12
	movq	16(%rdi), %r14
	movq	(%r14), %r15
	xorl	%r13d, %r13d
	movq	%r15, %rdi
	xorl	%esi, %esi
	callq	_of_get_next_child
	testq	%rax, %rax
	je	LBB0_6
## %bb.1:
	movq	%rax, %rbx
	movq	_PCI_NUM_INTX@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_intx_domain_ops@GOTPCREL(%rip), %rdx
	movq	%rbx, %rdi
	movq	%r12, %rcx
	callq	_irq_domain_add_linear
	movq	%rax, 8(%r12)
	movq	%rbx, %rdi
	callq	_of_node_put
	cmpq	$0, 8(%r12)
	je	LBB0_7
## %bb.2:
	movq	_CONFIG_PCI_MSI@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_IS_ENABLED
	testq	%rax, %rax
	je	LBB0_5
## %bb.3:
	movq	_XILINX_NUM_MSI_IRQS@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_msi_domain_ops@GOTPCREL(%rip), %rdx
	movq	_xilinx_pcie_msi_chip@GOTPCREL(%rip), %rcx
	movq	%r15, %rdi
	callq	_irq_domain_add_linear
	movq	%rax, (%r12)
	testq	%rax, %rax
	je	LBB0_8
## %bb.4:
	movq	%r12, %rdi
	callq	_xilinx_pcie_enable_msi
	movl	%eax, %r13d
	testl	%eax, %eax
	jne	LBB0_11
LBB0_5:
	xorl	%r13d, %r13d
	jmp	LBB0_11
LBB0_6:
	leaq	L_.str(%rip), %rsi
	movq	%r14, %rdi
	callq	_dev_err
	movq	_ENODEV@GOTPCREL(%rip), %rax
	jmp	LBB0_10
LBB0_7:
	leaq	L_.str.1(%rip), %rsi
	jmp	LBB0_9
LBB0_8:
	leaq	L_.str.2(%rip), %rsi
LBB0_9:
	movq	%r14, %rdi
	callq	_dev_err
	movq	_ENODEV@GOTPCREL(%rip), %rax
	xorl	%r13d, %r13d
LBB0_10:
	subl	(%rax), %r13d
LBB0_11:
	movl	%r13d, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"No PCIe Intc node found\n"

	.comm	_ENODEV,4,2                     ## @ENODEV
	.comm	_PCI_NUM_INTX,4,2               ## @PCI_NUM_INTX
	.comm	_intx_domain_ops,4,2            ## @intx_domain_ops
L_.str.1:                               ## @.str.1
	.asciz	"Failed to get a INTx IRQ domain\n"

	.comm	_CONFIG_PCI_MSI,4,2             ## @CONFIG_PCI_MSI
	.comm	_XILINX_NUM_MSI_IRQS,4,2        ## @XILINX_NUM_MSI_IRQS
	.comm	_msi_domain_ops,4,2             ## @msi_domain_ops
	.comm	_xilinx_pcie_msi_chip,24,3      ## @xilinx_pcie_msi_chip
L_.str.2:                               ## @.str.2
	.asciz	"Failed to get a MSI IRQ domain\n"

	.no_dead_strip	_xilinx_pcie_init_irq_domain
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function xilinx_pcie_init_irq_domain
_xilinx_pcie_init_irq_domain:           ; @xilinx_pcie_init_irq_domain
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x20, x0
	ldr	x19, [x0, #16]
	ldr	x21, [x19]
	mov	x0, x21
	mov	x1, #0
	bl	_of_get_next_child
	cbz	x0, LBB0_6
; %bb.1:
	mov	x22, x0
Lloh0:
	adrp	x8, _PCI_NUM_INTX@GOTPAGE
Lloh1:
	ldr	x8, [x8, _PCI_NUM_INTX@GOTPAGEOFF]
Lloh2:
	ldr	w1, [x8]
Lloh3:
	adrp	x2, _intx_domain_ops@GOTPAGE
Lloh4:
	ldr	x2, [x2, _intx_domain_ops@GOTPAGEOFF]
	mov	x3, x20
	bl	_irq_domain_add_linear
	str	x0, [x20, #8]
	mov	x0, x22
	bl	_of_node_put
	ldr	x8, [x20, #8]
	cbz	x8, LBB0_7
; %bb.2:
Lloh5:
	adrp	x8, _CONFIG_PCI_MSI@GOTPAGE
Lloh6:
	ldr	x8, [x8, _CONFIG_PCI_MSI@GOTPAGEOFF]
Lloh7:
	ldr	w0, [x8]
	bl	_IS_ENABLED
	cbz	x0, LBB0_5
; %bb.3:
Lloh8:
	adrp	x8, _XILINX_NUM_MSI_IRQS@GOTPAGE
Lloh9:
	ldr	x8, [x8, _XILINX_NUM_MSI_IRQS@GOTPAGEOFF]
Lloh10:
	ldr	w1, [x8]
Lloh11:
	adrp	x2, _msi_domain_ops@GOTPAGE
Lloh12:
	ldr	x2, [x2, _msi_domain_ops@GOTPAGEOFF]
Lloh13:
	adrp	x3, _xilinx_pcie_msi_chip@GOTPAGE
Lloh14:
	ldr	x3, [x3, _xilinx_pcie_msi_chip@GOTPAGEOFF]
	mov	x0, x21
	bl	_irq_domain_add_linear
	str	x0, [x20]
	cbz	x0, LBB0_8
; %bb.4:
	mov	x0, x20
	bl	_xilinx_pcie_enable_msi
	cbnz	w0, LBB0_10
LBB0_5:
	mov	w0, #0
	b	LBB0_10
LBB0_6:
Lloh15:
	adrp	x1, l_.str@PAGE
Lloh16:
	add	x1, x1, l_.str@PAGEOFF
	b	LBB0_9
LBB0_7:
Lloh17:
	adrp	x1, l_.str.1@PAGE
Lloh18:
	add	x1, x1, l_.str.1@PAGEOFF
	b	LBB0_9
LBB0_8:
Lloh19:
	adrp	x1, l_.str.2@PAGE
Lloh20:
	add	x1, x1, l_.str.2@PAGEOFF
LBB0_9:
	mov	x0, x19
	bl	_dev_err
Lloh21:
	adrp	x8, _ENODEV@GOTPAGE
Lloh22:
	ldr	x8, [x8, _ENODEV@GOTPAGEOFF]
Lloh23:
	ldr	w8, [x8]
	neg	w0, w8
LBB0_10:
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGot	Lloh3, Lloh4
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGot	Lloh13, Lloh14
	.loh AdrpLdrGot	Lloh11, Lloh12
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpAdd	Lloh15, Lloh16
	.loh AdrpAdd	Lloh17, Lloh18
	.loh AdrpAdd	Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.cfi_endproc
                                        ; -- End function
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"No PCIe Intc node found\n"

	.comm	_ENODEV,4,2                     ; @ENODEV
	.comm	_PCI_NUM_INTX,4,2               ; @PCI_NUM_INTX
	.comm	_intx_domain_ops,4,2            ; @intx_domain_ops
l_.str.1:                               ; @.str.1
	.asciz	"Failed to get a INTx IRQ domain\n"

	.comm	_CONFIG_PCI_MSI,4,2             ; @CONFIG_PCI_MSI
	.comm	_XILINX_NUM_MSI_IRQS,4,2        ; @XILINX_NUM_MSI_IRQS
	.comm	_msi_domain_ops,4,2             ; @msi_domain_ops
	.comm	_xilinx_pcie_msi_chip,24,3      ; @xilinx_pcie_msi_chip
l_.str.2:                               ; @.str.2
	.asciz	"Failed to get a MSI IRQ domain\n"

	.no_dead_strip	_xilinx_pcie_init_irq_domain
.subsections_via_symbols
