	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function ks_pcie_v3_65_scan_bus
_ks_pcie_v3_65_scan_bus:                ## @ks_pcie_v3_65_scan_bus
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	callq	_to_dw_pcie_from_pp
	movq	%rax, %rbx
	movq	%rax, %rdi
	callq	_to_keystone_pcie
	movq	%rax, %r14
	movq	%rax, %rdi
	callq	_ks_pcie_set_dbi_mode
	movq	_PCI_BASE_ADDRESS_0@GOTPCREL(%rip), %r15
	movl	(%r15), %esi
	movq	%rbx, %rdi
	movl	$1, %edx
	callq	_dw_pcie_writel_dbi
	movl	(%r15), %esi
	movq	_SZ_4K@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	decl	%edx
	movq	%rbx, %rdi
	callq	_dw_pcie_writel_dbi
	movq	%r14, %rdi
	callq	_ks_pcie_clear_dbi_mode
	movl	(%r15), %esi
	movl	(%r14), %edx
	movq	%rbx, %rdi
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_dw_pcie_writel_dbi             ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_PCI_BASE_ADDRESS_0,4,2         ## @PCI_BASE_ADDRESS_0
	.comm	_SZ_4K,4,2                      ## @SZ_4K
	.no_dead_strip	_ks_pcie_v3_65_scan_bus
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function ks_pcie_v3_65_scan_bus
_ks_pcie_v3_65_scan_bus:                ; @ks_pcie_v3_65_scan_bus
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	bl	_to_dw_pcie_from_pp
	mov	x19, x0
	bl	_to_keystone_pcie
	mov	x20, x0
	bl	_ks_pcie_set_dbi_mode
Lloh0:
	adrp	x21, _PCI_BASE_ADDRESS_0@GOTPAGE
Lloh1:
	ldr	x21, [x21, _PCI_BASE_ADDRESS_0@GOTPAGEOFF]
	ldr	w1, [x21]
	mov	x0, x19
	mov	w2, #1
	bl	_dw_pcie_writel_dbi
	ldr	w1, [x21]
Lloh2:
	adrp	x8, _SZ_4K@GOTPAGE
Lloh3:
	ldr	x8, [x8, _SZ_4K@GOTPAGEOFF]
Lloh4:
	ldr	w8, [x8]
	sub	w2, w8, #1
	mov	x0, x19
	bl	_dw_pcie_writel_dbi
	mov	x0, x20
	bl	_ks_pcie_clear_dbi_mode
	ldr	w1, [x21]
	ldr	w2, [x20]
	mov	x0, x19
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	_dw_pcie_writel_dbi
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGot	Lloh0, Lloh1
	.cfi_endproc
                                        ; -- End function
	.comm	_PCI_BASE_ADDRESS_0,4,2         ; @PCI_BASE_ADDRESS_0
	.comm	_SZ_4K,4,2                      ; @SZ_4K
	.no_dead_strip	_ks_pcie_v3_65_scan_bus
.subsections_via_symbols
