	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function iwl_pcie_map_non_rx_causes
_iwl_pcie_map_non_rx_causes:            ## @iwl_pcie_map_non_rx_causes
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r13
	callq	_IWL_TRANS_GET_PCIE_TRANS
	movq	_MSIX_NON_AUTO_CLEAR_CAUSE@GOTPCREL(%rip), %rcx
	movl	(%rcx), %r14d
	movq	(%r13), %rcx
	movq	(%rcx), %rcx
	movq	_IWL_DEVICE_FAMILY_22560@GOTPCREL(%rip), %rdx
	cmpq	(%rdx), %rcx
	jne	LBB0_1
## %bb.2:
	movq	_causes_list_v2@GOTPCREL(%rip), %rcx
	jmp	LBB0_3
LBB0_1:
	movq	_causes_list@GOTPCREL(%rip), %rcx
LBB0_3:
	orl	(%rax), %r14d
	movq	(%rcx), %rdi
	callq	_ARRAY_SIZE
	testl	%eax, %eax
	jle	LBB0_8
## %bb.4:
	movl	%eax, %eax
	shlq	$2, %rax
	leaq	(%rax,%rax,2), %r12
	xorl	%ebx, %ebx
	jmp	LBB0_5
	.p2align	4, 0x90
LBB0_7:                                 ##   in Loop: Header=BB0_5 Depth=1
	movq	(%rax), %r15
	movl	8(%r15,%rbx), %edi
	callq	_CSR_MSIX_IVAR
	movq	%r13, %rdi
	movl	%eax, %esi
	movl	%r14d, %edx
	callq	_iwl_write8
	movl	(%r15,%rbx), %edx
	movl	4(%r15,%rbx), %esi
	movq	%r13, %rdi
	callq	_iwl_clear_bit
	addq	$12, %rbx
	cmpq	%rbx, %r12
	je	LBB0_8
LBB0_5:                                 ## =>This Inner Loop Header: Depth=1
	movq	(%r13), %rax
	movq	(%rax), %rcx
	movq	_causes_list@GOTPCREL(%rip), %rax
	movq	_IWL_DEVICE_FAMILY_22560@GOTPCREL(%rip), %rdx
	cmpq	(%rdx), %rcx
	jne	LBB0_7
## %bb.6:                               ##   in Loop: Header=BB0_5 Depth=1
	movq	_causes_list_v2@GOTPCREL(%rip), %rax
	jmp	LBB0_7
LBB0_8:
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_MSIX_NON_AUTO_CLEAR_CAUSE,4,2  ## @MSIX_NON_AUTO_CLEAR_CAUSE
	.comm	_IWL_DEVICE_FAMILY_22560,8,3    ## @IWL_DEVICE_FAMILY_22560
	.comm	_causes_list,8,3                ## @causes_list
	.comm	_causes_list_v2,8,3             ## @causes_list_v2
	.no_dead_strip	_iwl_pcie_map_non_rx_causes
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function iwl_pcie_map_non_rx_causes
_iwl_pcie_map_non_rx_causes:            ; @iwl_pcie_map_non_rx_causes
	.cfi_startproc
; %bb.0:
	stp	x26, x25, [sp, #-80]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	mov	x19, x0
	bl	_IWL_TRANS_GET_PCIE_TRANS
	ldr	w20, [x0]
Lloh0:
	adrp	x8, _MSIX_NON_AUTO_CLEAR_CAUSE@GOTPAGE
Lloh1:
	ldr	x8, [x8, _MSIX_NON_AUTO_CLEAR_CAUSE@GOTPAGEOFF]
Lloh2:
	ldr	w25, [x8]
	ldr	x8, [x19]
	ldr	x8, [x8]
Lloh3:
	adrp	x21, _IWL_DEVICE_FAMILY_22560@GOTPAGE
Lloh4:
	ldr	x21, [x21, _IWL_DEVICE_FAMILY_22560@GOTPAGEOFF]
Lloh5:
	adrp	x22, _causes_list_v2@GOTPAGE
Lloh6:
	ldr	x22, [x22, _causes_list_v2@GOTPAGEOFF]
	ldr	x9, [x21]
Lloh7:
	adrp	x23, _causes_list@GOTPAGE
Lloh8:
	ldr	x23, [x23, _causes_list@GOTPAGEOFF]
	cmp	x8, x9
	csel	x8, x22, x23, eq
	ldr	x0, [x8]
	bl	_ARRAY_SIZE
	cmp	w0, #1
	b.lt	LBB0_3
; %bb.1:
	mov	x24, #0
	orr	w20, w25, w20
	mov	w8, #12
	umull	x25, w0, w8
LBB0_2:                                 ; =>This Inner Loop Header: Depth=1
	ldr	x8, [x19]
	ldr	x8, [x8]
	ldr	x9, [x21]
	cmp	x8, x9
	csel	x8, x22, x23, eq
	ldr	x8, [x8]
	add	x26, x8, x24
	ldr	w0, [x26, #8]
	bl	_CSR_MSIX_IVAR
	mov	x1, x0
	mov	x0, x19
	mov	x2, x20
	bl	_iwl_write8
	ldp	w2, w1, [x26]
	mov	x0, x19
	bl	_iwl_clear_bit
	add	x24, x24, #12
	cmp	x25, x24
	b.ne	LBB0_2
LBB0_3:
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp], #80             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGot	Lloh7, Lloh8
	.loh AdrpLdrGot	Lloh5, Lloh6
	.loh AdrpLdrGot	Lloh3, Lloh4
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_MSIX_NON_AUTO_CLEAR_CAUSE,4,2  ; @MSIX_NON_AUTO_CLEAR_CAUSE
	.comm	_IWL_DEVICE_FAMILY_22560,8,3    ; @IWL_DEVICE_FAMILY_22560
	.comm	_causes_list,8,3                ; @causes_list
	.comm	_causes_list_v2,8,3             ; @causes_list_v2
	.no_dead_strip	_iwl_pcie_map_non_rx_causes
.subsections_via_symbols
