	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function mlxsw_reg_ritr_pack
_mlxsw_reg_ritr_pack:                   ## @mlxsw_reg_ritr_pack
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%r9d, -48(%rbp)                 ## 4-byte Spill
	movl	%r8d, -44(%rbp)                 ## 4-byte Spill
	movl	%ecx, %r12d
	movl	%edx, %r13d
	movl	%esi, %r15d
	movq	%rdi, %rbx
	testl	%esi, %esi
	jne	LBB0_1
## %bb.2:
	movq	_MLXSW_REG_RITR_RIF_DEL@GOTPCREL(%rip), %rax
	jmp	LBB0_3
LBB0_1:
	movq	_MLXSW_REG_RITR_RIF_CREATE@GOTPCREL(%rip), %rax
LBB0_3:
	movl	(%rax), %r14d
	movq	_ritr@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	%rbx, %rsi
	callq	_MLXSW_REG_ZERO
	movq	%rbx, %rdi
	movl	%r15d, %esi
	callq	_mlxsw_reg_ritr_enable_set
	movq	%rbx, %rdi
	movl	$1, %esi
	callq	_mlxsw_reg_ritr_ipv4_set
	movq	%rbx, %rdi
	movl	$1, %esi
	callq	_mlxsw_reg_ritr_ipv6_set
	movq	%rbx, %rdi
	movl	$1, %esi
	callq	_mlxsw_reg_ritr_ipv4_mc_set
	movq	%rbx, %rdi
	movl	$1, %esi
	callq	_mlxsw_reg_ritr_ipv6_mc_set
	movq	%rbx, %rdi
	movl	%r13d, %esi
	callq	_mlxsw_reg_ritr_type_set
	movq	%rbx, %rdi
	movl	%r14d, %esi
	callq	_mlxsw_reg_ritr_op_set
	movq	%rbx, %rdi
	movl	%r12d, %esi
	callq	_mlxsw_reg_ritr_rif_set
	movq	%rbx, %rdi
	movl	$1, %esi
	callq	_mlxsw_reg_ritr_ipv4_fe_set
	movq	%rbx, %rdi
	movl	$1, %esi
	callq	_mlxsw_reg_ritr_ipv6_fe_set
	movq	%rbx, %rdi
	movl	$1, %esi
	callq	_mlxsw_reg_ritr_ipv4_mc_fe_set
	movq	%rbx, %rdi
	movl	$1, %esi
	callq	_mlxsw_reg_ritr_ipv6_mc_fe_set
	movq	%rbx, %rdi
	movl	$1, %esi
	callq	_mlxsw_reg_ritr_lb_en_set
	movq	%rbx, %rdi
	movl	-44(%rbp), %esi                 ## 4-byte Reload
	callq	_mlxsw_reg_ritr_virtual_router_set
	movq	%rbx, %rdi
	movl	-48(%rbp), %esi                 ## 4-byte Reload
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_mlxsw_reg_ritr_mtu_set         ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_MLXSW_REG_RITR_RIF_CREATE,4,2  ## @MLXSW_REG_RITR_RIF_CREATE
	.comm	_MLXSW_REG_RITR_RIF_DEL,4,2     ## @MLXSW_REG_RITR_RIF_DEL
	.comm	_ritr,4,2                       ## @ritr
	.no_dead_strip	_mlxsw_reg_ritr_pack
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function mlxsw_reg_ritr_pack
_mlxsw_reg_ritr_pack:                   ; @mlxsw_reg_ritr_pack
	.cfi_startproc
; %bb.0:
	stp	x26, x25, [sp, #-80]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	mov	x19, x5
	mov	x20, x4
	mov	x22, x3
	mov	x23, x2
	mov	x24, x1
	mov	x21, x0
Lloh0:
	adrp	x8, _MLXSW_REG_RITR_RIF_CREATE@GOTPAGE
Lloh1:
	ldr	x8, [x8, _MLXSW_REG_RITR_RIF_CREATE@GOTPAGEOFF]
Lloh2:
	adrp	x9, _MLXSW_REG_RITR_RIF_DEL@GOTPAGE
Lloh3:
	ldr	x9, [x9, _MLXSW_REG_RITR_RIF_DEL@GOTPAGEOFF]
	cmp	w1, #0
	csel	x8, x9, x8, eq
	ldr	w25, [x8]
Lloh4:
	adrp	x8, _ritr@GOTPAGE
Lloh5:
	ldr	x8, [x8, _ritr@GOTPAGEOFF]
Lloh6:
	ldr	w0, [x8]
	mov	x1, x21
	bl	_MLXSW_REG_ZERO
	mov	x0, x21
	mov	x1, x24
	bl	_mlxsw_reg_ritr_enable_set
	mov	x0, x21
	mov	w1, #1
	bl	_mlxsw_reg_ritr_ipv4_set
	mov	x0, x21
	mov	w1, #1
	bl	_mlxsw_reg_ritr_ipv6_set
	mov	x0, x21
	mov	w1, #1
	bl	_mlxsw_reg_ritr_ipv4_mc_set
	mov	x0, x21
	mov	w1, #1
	bl	_mlxsw_reg_ritr_ipv6_mc_set
	mov	x0, x21
	mov	x1, x23
	bl	_mlxsw_reg_ritr_type_set
	mov	x0, x21
	mov	x1, x25
	bl	_mlxsw_reg_ritr_op_set
	mov	x0, x21
	mov	x1, x22
	bl	_mlxsw_reg_ritr_rif_set
	mov	x0, x21
	mov	w1, #1
	bl	_mlxsw_reg_ritr_ipv4_fe_set
	mov	x0, x21
	mov	w1, #1
	bl	_mlxsw_reg_ritr_ipv6_fe_set
	mov	x0, x21
	mov	w1, #1
	bl	_mlxsw_reg_ritr_ipv4_mc_fe_set
	mov	x0, x21
	mov	w1, #1
	bl	_mlxsw_reg_ritr_ipv6_mc_fe_set
	mov	x0, x21
	mov	w1, #1
	bl	_mlxsw_reg_ritr_lb_en_set
	mov	x0, x21
	mov	x1, x20
	bl	_mlxsw_reg_ritr_virtual_router_set
	mov	x0, x21
	mov	x1, x19
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp], #80             ; 16-byte Folded Reload
	b	_mlxsw_reg_ritr_mtu_set
	.loh AdrpLdrGotLdr	Lloh4, Lloh5, Lloh6
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpLdrGot	Lloh0, Lloh1
	.cfi_endproc
                                        ; -- End function
	.comm	_MLXSW_REG_RITR_RIF_CREATE,4,2  ; @MLXSW_REG_RITR_RIF_CREATE
	.comm	_MLXSW_REG_RITR_RIF_DEL,4,2     ; @MLXSW_REG_RITR_RIF_DEL
	.comm	_ritr,4,2                       ; @ritr
	.no_dead_strip	_mlxsw_reg_ritr_pack
.subsections_via_symbols
