	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function rockchip_pcie_cfg_atu
_rockchip_pcie_cfg_atu:                 ## @rockchip_pcie_cfg_atu
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$24, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r15
	movq	32(%rdi), %rax
	movq	%rax, -48(%rbp)                 ## 8-byte Spill
	movq	_AXI_WRAPPER_TYPE0_CFG@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_rockchip_pcie_cfg_configuration_accesses
	xorl	%r14d, %r14d
	movq	_AXI_WRAPPER_MEM_WRITE@GOTPCREL(%rip), %r13
	xorl	%ebx, %ebx
	.p2align	4, 0x90
LBB0_1:                                 ## =>This Inner Loop Header: Depth=1
	movl	(%r15), %eax
	sarl	$20, %eax
	cltq
	cmpq	%rax, %rbx
	jge	LBB0_5
## %bb.2:                               ##   in Loop: Header=BB0_1 Depth=1
	incq	%rbx
	movl	(%r13), %edx
	movq	8(%r15), %r8
	addq	%r14, %r8
	movq	%r15, %rdi
	movl	%ebx, %esi
	movl	$19, %ecx
	xorl	%r9d, %r9d
	callq	_rockchip_pcie_prog_ob_atu
	addq	$1048576, %r14                  ## imm = 0x100000
	testl	%eax, %eax
	je	LBB0_1
## %bb.3:
	movl	%eax, %r12d
	leaq	L_.str(%rip), %rsi
	jmp	LBB0_4
LBB0_5:
	movq	%r15, %rdi
	movl	$2, %esi
	movl	$31, %edx
	xorl	%ecx, %ecx
	xorl	%r8d, %r8d
	callq	_rockchip_pcie_prog_ib_atu
	testl	%eax, %eax
	je	LBB0_7
## %bb.6:
	movl	%eax, %r12d
	leaq	L_.str.1(%rip), %rsi
	jmp	LBB0_4
LBB0_7:
	movl	(%r15), %eax
	sarl	$20, %eax
	movq	%rax, -56(%rbp)                 ## 8-byte Spill
	movslq	%eax, %r13
	incq	%r13
	xorl	%ebx, %ebx
	xorl	%esi, %esi
	.p2align	4, 0x90
LBB0_8:                                 ## =>This Inner Loop Header: Depth=1
	movl	4(%r15), %eax
	sarl	$20, %eax
	cltq
	cmpq	%rax, %rsi
	jge	LBB0_11
## %bb.9:                               ##   in Loop: Header=BB0_8 Depth=1
	leaq	1(%rsi), %r14
	movq	_AXI_WRAPPER_IO_WRITE@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	24(%r15), %r8
	addq	%rbx, %r8
	addl	%r13d, %esi
	movq	%r15, %rdi
                                        ## kill: def $esi killed $esi killed $rsi
	movl	$19, %ecx
	xorl	%r9d, %r9d
	callq	_rockchip_pcie_prog_ob_atu
	addq	$1048576, %rbx                  ## imm = 0x100000
	movq	%r14, %rsi
	testl	%eax, %eax
	je	LBB0_8
## %bb.10:
	movl	%eax, %r12d
	leaq	L_.str.2(%rip), %rsi
LBB0_4:
	movq	-48(%rbp), %rdi                 ## 8-byte Reload
	callq	_dev_err
LBB0_12:
	movl	%r12d, %eax
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_11:
	movq	-56(%rbp), %r14                 ## 8-byte Reload
	addl	%r14d, %esi
	incl	%esi
	movq	_AXI_WRAPPER_NOR_MSG@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	xorl	%r12d, %r12d
	movq	%r15, %rdi
	movl	$19, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	_rockchip_pcie_prog_ob_atu
	shll	$20, %r14d
	addl	%r14d, %ebx
	movslq	%ebx, %rax
	addq	8(%r15), %rax
	movq	%rax, 16(%r15)
	jmp	LBB0_12
	.cfi_endproc
                                        ## -- End function
	.comm	_AXI_WRAPPER_TYPE0_CFG,4,2      ## @AXI_WRAPPER_TYPE0_CFG
	.comm	_AXI_WRAPPER_MEM_WRITE,4,2      ## @AXI_WRAPPER_MEM_WRITE
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"program RC mem outbound ATU failed\n"

L_.str.1:                               ## @.str.1
	.asciz	"program RC mem inbound ATU failed\n"

	.comm	_AXI_WRAPPER_IO_WRITE,4,2       ## @AXI_WRAPPER_IO_WRITE
L_.str.2:                               ## @.str.2
	.asciz	"program RC io outbound ATU failed\n"

	.comm	_AXI_WRAPPER_NOR_MSG,4,2        ## @AXI_WRAPPER_NOR_MSG
	.no_dead_strip	_rockchip_pcie_cfg_atu
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function rockchip_pcie_cfg_atu
_rockchip_pcie_cfg_atu:                 ; @rockchip_pcie_cfg_atu
	.cfi_startproc
; %bb.0:
	stp	x26, x25, [sp, #-80]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	mov	x19, x0
	ldr	x20, [x0, #32]
Lloh0:
	adrp	x8, _AXI_WRAPPER_TYPE0_CFG@GOTPAGE
Lloh1:
	ldr	x8, [x8, _AXI_WRAPPER_TYPE0_CFG@GOTPAGEOFF]
Lloh2:
	ldr	w1, [x8]
	bl	_rockchip_pcie_cfg_configuration_accesses
	mov	x23, #0
	mov	x22, #0
Lloh3:
	adrp	x24, _AXI_WRAPPER_MEM_WRITE@GOTPAGE
Lloh4:
	ldr	x24, [x24, _AXI_WRAPPER_MEM_WRITE@GOTPAGEOFF]
LBB0_1:                                 ; =>This Inner Loop Header: Depth=1
	ldr	w8, [x19]
	asr	w8, w8, #20
	cmp	x22, w8, sxtw
	b.ge	LBB0_4
; %bb.2:                                ;   in Loop: Header=BB0_1 Depth=1
	add	x22, x22, #1
	ldr	w2, [x24]
	ldr	x8, [x19, #8]
	add	x4, x23, x8
	mov	x0, x19
	mov	x1, x22
	mov	w3, #19
	mov	w5, #0
	bl	_rockchip_pcie_prog_ob_atu
	add	x23, x23, #256, lsl #12         ; =1048576
	cbz	w0, LBB0_1
; %bb.3:
	mov	x21, x0
Lloh5:
	adrp	x1, l_.str@PAGE
Lloh6:
	add	x1, x1, l_.str@PAGEOFF
	b	LBB0_10
LBB0_4:
	mov	x0, x19
	mov	w1, #2
	mov	w2, #31
	mov	w3, #0
	mov	w4, #0
	bl	_rockchip_pcie_prog_ib_atu
	cbz	w0, LBB0_6
; %bb.5:
	mov	x21, x0
Lloh7:
	adrp	x1, l_.str.1@PAGE
Lloh8:
	add	x1, x1, l_.str.1@PAGEOFF
	b	LBB0_10
LBB0_6:
	mov	x22, #0
	mov	x8, #0
	ldr	w9, [x19]
	asr	w23, w9, #20
	sbfx	x9, x9, #20, #12
	add	x24, x9, #1
Lloh9:
	adrp	x25, _AXI_WRAPPER_IO_WRITE@GOTPAGE
Lloh10:
	ldr	x25, [x25, _AXI_WRAPPER_IO_WRITE@GOTPAGEOFF]
LBB0_7:                                 ; =>This Inner Loop Header: Depth=1
	ldr	w9, [x19, #4]
	asr	w9, w9, #20
	cmp	x8, w9, sxtw
	b.ge	LBB0_12
; %bb.8:                                ;   in Loop: Header=BB0_7 Depth=1
	add	x26, x8, #1
	ldr	w2, [x25]
	ldr	x9, [x19, #24]
	add	x4, x22, x9
	add	w1, w24, w8
	mov	x0, x19
	mov	w3, #19
	mov	w5, #0
	bl	_rockchip_pcie_prog_ob_atu
	add	x22, x22, #256, lsl #12         ; =1048576
	mov	x8, x26
	cbz	w0, LBB0_7
; %bb.9:
	mov	x21, x0
Lloh11:
	adrp	x1, l_.str.2@PAGE
Lloh12:
	add	x1, x1, l_.str.2@PAGEOFF
LBB0_10:
	mov	x0, x20
	bl	_dev_err
LBB0_11:
	mov	x0, x21
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp], #80             ; 16-byte Folded Reload
	ret
LBB0_12:
	add	w8, w23, w8
	add	w1, w8, #1
Lloh13:
	adrp	x8, _AXI_WRAPPER_NOR_MSG@GOTPAGE
Lloh14:
	ldr	x8, [x8, _AXI_WRAPPER_NOR_MSG@GOTPAGEOFF]
Lloh15:
	ldr	w2, [x8]
	mov	x0, x19
	mov	w3, #19
	mov	x4, #0
	mov	w5, #0
	bl	_rockchip_pcie_prog_ob_atu
	mov	w21, #0
	ldr	x8, [x19, #8]
	add	w9, w22, w23, lsl #20
	add	x8, x8, w9, sxtw
	str	x8, [x19, #16]
	b	LBB0_11
	.loh AdrpLdrGot	Lloh3, Lloh4
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpAdd	Lloh5, Lloh6
	.loh AdrpAdd	Lloh7, Lloh8
	.loh AdrpLdrGot	Lloh9, Lloh10
	.loh AdrpAdd	Lloh11, Lloh12
	.loh AdrpLdrGotLdr	Lloh13, Lloh14, Lloh15
	.cfi_endproc
                                        ; -- End function
	.comm	_AXI_WRAPPER_TYPE0_CFG,4,2      ; @AXI_WRAPPER_TYPE0_CFG
	.comm	_AXI_WRAPPER_MEM_WRITE,4,2      ; @AXI_WRAPPER_MEM_WRITE
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"program RC mem outbound ATU failed\n"

l_.str.1:                               ; @.str.1
	.asciz	"program RC mem inbound ATU failed\n"

	.comm	_AXI_WRAPPER_IO_WRITE,4,2       ; @AXI_WRAPPER_IO_WRITE
l_.str.2:                               ; @.str.2
	.asciz	"program RC io outbound ATU failed\n"

	.comm	_AXI_WRAPPER_NOR_MSG,4,2        ; @AXI_WRAPPER_NOR_MSG
	.no_dead_strip	_rockchip_pcie_cfg_atu
.subsections_via_symbols
