	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function pistachio_gpio_register
_pistachio_gpio_register:               ## @pistachio_gpio_register
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$40, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	cmpl	$0, (%rdi)
	je	LBB0_9
## %bb.1:
	movq	%rdi, %r14
	movq	16(%rdi), %rax
	movq	(%rax), %rax
	movq	%rax, -72(%rbp)                 ## 8-byte Spill
	xorl	%r15d, %r15d
	xorl	%ebx, %ebx
	movq	%rdi, -56(%rbp)                 ## 8-byte Spill
	.p2align	4, 0x90
LBB0_2:                                 ## =>This Inner Loop Header: Depth=1
	leaq	-79(%rbp), %r12
	movq	%r12, %rdi
	movl	$7, %esi
	leaq	L_.str(%rip), %rdx
	movl	%ebx, %ecx
	callq	_snprintf
	movq	-72(%rbp), %rdi                 ## 8-byte Reload
	movq	%r12, %rsi
	callq	_of_get_child_by_name
	testq	%rax, %rax
	je	LBB0_10
## %bb.3:                               ##   in Loop: Header=BB0_2 Depth=1
	movq	%rax, %r12
	movq	%rax, %rdi
	leaq	L_.str.2(%rip), %rsi
	xorl	%edx, %edx
	callq	_of_find_property
	testl	%eax, %eax
	je	LBB0_11
## %bb.4:                               ##   in Loop: Header=BB0_2 Depth=1
	movq	%r12, %rdi
	xorl	%esi, %esi
	callq	_irq_of_parse_and_map
	movl	%eax, %r13d
	testl	%eax, %eax
	js	LBB0_13
## %bb.5:                               ##   in Loop: Header=BB0_2 Depth=1
	movl	%r13d, -60(%rbp)                ## 4-byte Spill
	movq	8(%r14), %r13
	movq	%r14, %rax
	leaq	(%r15,%r13), %r14
	movq	%rax, 40(%r13,%r15)
	movq	-56(%rbp), %rax                 ## 8-byte Reload
	movq	24(%rax), %rax
	movq	%rax, -48(%rbp)                 ## 8-byte Spill
	movl	%ebx, %edi
	callq	_GPIO_BANK_BASE
	addq	-48(%rbp), %rax                 ## 8-byte Folded Reload
	movq	%rax, 32(%r13,%r15)
	movq	-56(%rbp), %rax                 ## 8-byte Reload
	movq	16(%rax), %rax
	movq	%rax, 8(%r13,%r15)
	movq	%r12, (%r13,%r15)
	movq	%r14, %rdi
	movq	%r14, -48(%rbp)                 ## 8-byte Spill
	movq	%r14, %rsi
	callq	_gpiochip_add_data
	testl	%eax, %eax
	js	LBB0_14
## %bb.6:                               ##   in Loop: Header=BB0_2 Depth=1
	leaq	(%r15,%r13), %r14
	addq	$24, %r14
	movq	_handle_level_irq@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movq	_IRQ_TYPE_NONE@GOTPCREL(%rip), %rax
	movl	(%rax), %r8d
	movq	-48(%rbp), %rdi                 ## 8-byte Reload
	movq	%r14, %rsi
	xorl	%edx, %edx
	callq	_gpiochip_irqchip_add
	testl	%eax, %eax
	js	LBB0_16
## %bb.7:                               ##   in Loop: Header=BB0_2 Depth=1
	movq	_pistachio_gpio_irq_handler@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movq	-48(%rbp), %r12                 ## 8-byte Reload
	movq	%r12, %rdi
	movq	%r14, %rsi
	movl	-60(%rbp), %edx                 ## 4-byte Reload
	callq	_gpiochip_set_chained_irqchip
	movq	-56(%rbp), %r14                 ## 8-byte Reload
	movq	16(%r14), %rdi
	callq	_dev_name
	movl	16(%r13,%r15), %r8d
	movl	20(%r13,%r15), %ecx
	movq	%r12, %rdi
	movl	%eax, %esi
	xorl	%edx, %edx
	callq	_gpiochip_add_pin_range
	testl	%eax, %eax
	js	LBB0_17
## %bb.8:                               ##   in Loop: Header=BB0_2 Depth=1
	incq	%rbx
	movl	(%r14), %eax
	addq	$48, %r15
	cmpq	%rax, %rbx
	jb	LBB0_2
LBB0_9:
	xorl	%r13d, %r13d
	jmp	LBB0_20
LBB0_10:
	movq	16(%r14), %rdi
	leaq	L_.str.1(%rip), %rsi
	xorl	%r13d, %r13d
	movl	%ebx, %edx
	xorl	%eax, %eax
	callq	_dev_err
	jmp	LBB0_12
LBB0_11:
	movq	16(%r14), %rdi
	leaq	L_.str.3(%rip), %rsi
	xorl	%r13d, %r13d
	movl	%ebx, %edx
	xorl	%eax, %eax
	callq	_dev_err
	movq	%r12, %rdi
	callq	_of_node_put
LBB0_12:
	movq	_ENODEV@GOTPCREL(%rip), %rax
	subl	(%rax), %r13d
	testl	%ebx, %ebx
	jne	LBB0_18
	jmp	LBB0_20
LBB0_13:
	movq	16(%r14), %rdi
	leaq	L_.str.4(%rip), %rsi
	movl	%ebx, %edx
	movl	%r13d, %ecx
	xorl	%eax, %eax
	callq	_dev_err
	movq	%r12, %rdi
	callq	_of_node_put
	testl	%ebx, %ebx
	jne	LBB0_18
	jmp	LBB0_20
LBB0_14:
	movl	%eax, %r12d
	movq	-56(%rbp), %r14                 ## 8-byte Reload
	movq	16(%r14), %rdi
	leaq	L_.str.5(%rip), %rsi
	movl	%ebx, %edx
	movl	%eax, %ecx
	xorl	%eax, %eax
	callq	_dev_err
	jmp	LBB0_15
LBB0_16:
	movl	%eax, %r12d
	movq	-56(%rbp), %r14                 ## 8-byte Reload
	movq	16(%r14), %rdi
	leaq	L_.str.6(%rip), %rsi
	movl	%ebx, %edx
	movl	%eax, %ecx
	xorl	%eax, %eax
	callq	_dev_err
	movq	-48(%rbp), %rdi                 ## 8-byte Reload
	callq	_gpiochip_remove
LBB0_15:
	movl	%r12d, %r13d
	testl	%ebx, %ebx
	jne	LBB0_18
	jmp	LBB0_20
LBB0_17:
	movl	%eax, %r13d
	movq	16(%r14), %rdi
	leaq	L_.str.7(%rip), %rsi
	movl	%ebx, %edx
	movl	%eax, %ecx
	xorl	%eax, %eax
	callq	_dev_err
	movq	-48(%rbp), %rdi                 ## 8-byte Reload
	callq	_gpiochip_remove
	testl	%ebx, %ebx
	je	LBB0_20
LBB0_18:
	addq	$-48, %r15
	negq	%rbx
	.p2align	4, 0x90
LBB0_19:                                ## =>This Inner Loop Header: Depth=1
	movq	8(%r14), %rdi
	addq	%r15, %rdi
	callq	_gpiochip_remove
	addq	$-48, %r15
	incq	%rbx
	jne	LBB0_19
LBB0_20:
	movl	%r13d, %eax
	addq	$40, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"gpio%d"

L_.str.1:                               ## @.str.1
	.asciz	"No node for bank %u\n"

	.comm	_ENODEV,4,2                     ## @ENODEV
L_.str.2:                               ## @.str.2
	.asciz	"gpio-controller"

L_.str.3:                               ## @.str.3
	.asciz	"No gpio-controller property for bank %u\n"

L_.str.4:                               ## @.str.4
	.asciz	"No IRQ for bank %u: %d\n"

L_.str.5:                               ## @.str.5
	.asciz	"Failed to add GPIO chip %u: %d\n"

	.comm	_handle_level_irq,4,2           ## @handle_level_irq
	.comm	_IRQ_TYPE_NONE,4,2              ## @IRQ_TYPE_NONE
L_.str.6:                               ## @.str.6
	.asciz	"Failed to add IRQ chip %u: %d\n"

	.comm	_pistachio_gpio_irq_handler,4,2 ## @pistachio_gpio_irq_handler
L_.str.7:                               ## @.str.7
	.asciz	"Failed to add GPIO range %u: %d\n"

	.no_dead_strip	_pistachio_gpio_register
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function pistachio_gpio_register
_pistachio_gpio_register:               ; @pistachio_gpio_register
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #112
	.cfi_def_cfa_offset 112
	stp	x28, x27, [sp, #16]             ; 16-byte Folded Spill
	stp	x26, x25, [sp, #32]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #48]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #64]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #80]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #96]             ; 16-byte Folded Spill
	add	x29, sp, #96
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	ldr	w8, [x0]
	cbz	w8, LBB0_9
; %bb.1:
	mov	x19, x0
	mov	x20, #0
	ldr	x8, [x0, #16]
	ldr	x21, [x8]
	mov	x28, #-48
Lloh0:
	adrp	x22, l_.str@PAGE
Lloh1:
	add	x22, x22, l_.str@PAGEOFF
LBB0_2:                                 ; =>This Inner Loop Header: Depth=1
	add	x0, sp, #9
	mov	w1, #7
	mov	x2, x22
	mov	x3, x20
	bl	_snprintf
	add	x1, sp, #9
	mov	x0, x21
	bl	_of_get_child_by_name
	cbz	x0, LBB0_10
; %bb.3:                                ;   in Loop: Header=BB0_2 Depth=1
	mov	x25, x0
Lloh2:
	adrp	x1, l_.str.2@PAGE
Lloh3:
	add	x1, x1, l_.str.2@PAGEOFF
	mov	x2, #0
	bl	_of_find_property
	cbz	w0, LBB0_11
; %bb.4:                                ;   in Loop: Header=BB0_2 Depth=1
	mov	x0, x25
	mov	w1, #0
	bl	_irq_of_parse_and_map
	mov	x24, x0
	tbnz	w0, #31, LBB0_13
; %bb.5:                                ;   in Loop: Header=BB0_2 Depth=1
	ldr	x23, [x19, #8]
	add	x27, x23, x28
	str	x19, [x27, #88]
	ldr	x26, [x19, #24]
	mov	x0, x20
	bl	_GPIO_BANK_BASE
	add	x8, x0, x26
	mov	x26, x27
	str	x25, [x26, #48]!
	str	x8, [x26, #32]
	ldr	x8, [x19, #16]
	str	x8, [x26, #8]
	mov	x0, x26
	mov	x1, x26
	bl	_gpiochip_add_data
	tbnz	w0, #31, LBB0_14
; %bb.6:                                ;   in Loop: Header=BB0_2 Depth=1
	add	x27, x27, #72
Lloh4:
	adrp	x8, _handle_level_irq@GOTPAGE
Lloh5:
	ldr	x8, [x8, _handle_level_irq@GOTPAGEOFF]
Lloh6:
	ldr	w3, [x8]
Lloh7:
	adrp	x8, _IRQ_TYPE_NONE@GOTPAGE
Lloh8:
	ldr	x8, [x8, _IRQ_TYPE_NONE@GOTPAGEOFF]
Lloh9:
	ldr	w4, [x8]
	mov	x0, x26
	mov	x1, x27
	mov	w2, #0
	bl	_gpiochip_irqchip_add
	tbnz	w0, #31, LBB0_15
; %bb.7:                                ;   in Loop: Header=BB0_2 Depth=1
Lloh10:
	adrp	x8, _pistachio_gpio_irq_handler@GOTPAGE
Lloh11:
	ldr	x8, [x8, _pistachio_gpio_irq_handler@GOTPAGEOFF]
Lloh12:
	ldr	w3, [x8]
	mov	x0, x26
	mov	x1, x27
	mov	x2, x24
	bl	_gpiochip_set_chained_irqchip
	ldr	x0, [x19, #16]
	bl	_dev_name
	mov	x1, x0
	add	x23, x23, x28
	ldp	w4, w3, [x23, #64]
	mov	x0, x26
	mov	w2, #0
	bl	_gpiochip_add_pin_range
	tbnz	w0, #31, LBB0_16
; %bb.8:                                ;   in Loop: Header=BB0_2 Depth=1
	add	x20, x20, #1
	ldr	w8, [x19]
	add	x28, x28, #48
	cmp	x20, x8
	b.lo	LBB0_2
LBB0_9:
	mov	w24, #0
	b	LBB0_19
LBB0_10:
	ldr	x0, [x19, #16]
Lloh13:
	adrp	x1, l_.str.1@PAGE
Lloh14:
	add	x1, x1, l_.str.1@PAGEOFF
	mov	x2, x20
	bl	_dev_err
	b	LBB0_12
LBB0_11:
	ldr	x0, [x19, #16]
Lloh15:
	adrp	x1, l_.str.3@PAGE
Lloh16:
	add	x1, x1, l_.str.3@PAGEOFF
	mov	x2, x20
	bl	_dev_err
	mov	x0, x25
	bl	_of_node_put
LBB0_12:
Lloh17:
	adrp	x8, _ENODEV@GOTPAGE
Lloh18:
	ldr	x8, [x8, _ENODEV@GOTPAGEOFF]
Lloh19:
	ldr	w8, [x8]
	neg	w24, w8
	cbnz	w20, LBB0_17
	b	LBB0_19
LBB0_13:
	ldr	x0, [x19, #16]
	str	x24, [sp]
Lloh20:
	adrp	x1, l_.str.4@PAGE
Lloh21:
	add	x1, x1, l_.str.4@PAGEOFF
	mov	x2, x20
	bl	_dev_err
	mov	x0, x25
	bl	_of_node_put
	cbnz	w20, LBB0_17
	b	LBB0_19
LBB0_14:
	mov	x25, x0
	ldr	x0, [x19, #16]
	str	x25, [sp]
Lloh22:
	adrp	x1, l_.str.5@PAGE
Lloh23:
	add	x1, x1, l_.str.5@PAGEOFF
	mov	x2, x20
	bl	_dev_err
	mov	x24, x25
	cbnz	w20, LBB0_17
	b	LBB0_19
LBB0_15:
	mov	x25, x0
	ldr	x0, [x19, #16]
	str	x25, [sp]
Lloh24:
	adrp	x1, l_.str.6@PAGE
Lloh25:
	add	x1, x1, l_.str.6@PAGEOFF
	mov	x2, x20
	bl	_dev_err
	add	x8, x23, x28
	add	x0, x8, #48
	bl	_gpiochip_remove
	mov	x24, x25
	cbnz	w20, LBB0_17
	b	LBB0_19
LBB0_16:
	mov	x24, x0
	ldr	x0, [x19, #16]
	str	x24, [sp]
Lloh26:
	adrp	x1, l_.str.7@PAGE
Lloh27:
	add	x1, x1, l_.str.7@PAGEOFF
	mov	x2, x20
	bl	_dev_err
	add	x0, x23, #48
	bl	_gpiochip_remove
                                        ; kill: def $w24 killed $w24 killed $x24 def $x24
	cbz	w20, LBB0_19
LBB0_17:
	neg	x20, x20
LBB0_18:                                ; =>This Inner Loop Header: Depth=1
	ldr	x8, [x19, #8]
	add	x0, x8, x28
	bl	_gpiochip_remove
	sub	x28, x28, #48
	adds	x20, x20, #1
	b.lo	LBB0_18
LBB0_19:
	mov	x0, x24
	ldp	x29, x30, [sp, #96]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #80]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #64]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #48]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #32]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #112
	ret
	.loh AdrpAdd	Lloh0, Lloh1
	.loh AdrpAdd	Lloh2, Lloh3
	.loh AdrpLdrGotLdr	Lloh7, Lloh8, Lloh9
	.loh AdrpLdrGotLdr	Lloh4, Lloh5, Lloh6
	.loh AdrpLdrGotLdr	Lloh10, Lloh11, Lloh12
	.loh AdrpAdd	Lloh13, Lloh14
	.loh AdrpAdd	Lloh15, Lloh16
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh19
	.loh AdrpAdd	Lloh20, Lloh21
	.loh AdrpAdd	Lloh22, Lloh23
	.loh AdrpAdd	Lloh24, Lloh25
	.loh AdrpAdd	Lloh26, Lloh27
	.cfi_endproc
                                        ; -- End function
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"gpio%d"

l_.str.1:                               ; @.str.1
	.asciz	"No node for bank %u\n"

	.comm	_ENODEV,4,2                     ; @ENODEV
l_.str.2:                               ; @.str.2
	.asciz	"gpio-controller"

l_.str.3:                               ; @.str.3
	.asciz	"No gpio-controller property for bank %u\n"

l_.str.4:                               ; @.str.4
	.asciz	"No IRQ for bank %u: %d\n"

l_.str.5:                               ; @.str.5
	.asciz	"Failed to add GPIO chip %u: %d\n"

	.comm	_handle_level_irq,4,2           ; @handle_level_irq
	.comm	_IRQ_TYPE_NONE,4,2              ; @IRQ_TYPE_NONE
l_.str.6:                               ; @.str.6
	.asciz	"Failed to add IRQ chip %u: %d\n"

	.comm	_pistachio_gpio_irq_handler,4,2 ; @pistachio_gpio_irq_handler
l_.str.7:                               ; @.str.7
	.asciz	"Failed to add GPIO range %u: %d\n"

	.no_dead_strip	_pistachio_gpio_register
.subsections_via_symbols
