	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function adjust_qp_sched_queue
_adjust_qp_sched_queue:                 ## @adjust_qp_sched_queue
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$24, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdx, %r12
	movl	%esi, %r14d
	movq	%rdi, %rbx
	movq	(%rcx), %rax
	movl	(%rax), %edi
	callq	_be32_to_cpu
	xorl	%r15d, %r15d
	btl	$6, 4(%r12)
	movl	%eax, %r13d
	movl	$0, %edx
	adcl	$1, %edx
	movq	%rbx, -56(%rbp)                 ## 8-byte Spill
	movq	%rbx, %rdi
	movl	%r14d, -44(%rbp)                ## 4-byte Spill
	movl	%r14d, %esi
	callq	_mlx4_slave_convert_port
	testl	%eax, %eax
	jle	LBB0_7
## %bb.1:
	movl	%eax, %r14d
	movl	4(%r12), %ebx
	movq	_MLX4_QP_OPTPAR_PRIMARY_ADDR_PATH@GOTPCREL(%rip), %rax
	movq	_MLX4_QP_OPTPAR_SCHED_QUEUE@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	orl	(%rax), %ecx
	andl	%r13d, %ecx
	orl	%ebx, %ecx
	jne	LBB0_3
## %bb.2:
	movq	-56(%rbp), %rdi                 ## 8-byte Reload
	movl	%r14d, %esi
	callq	_mlx4_is_eth
	testq	%rax, %rax
	je	LBB0_4
LBB0_3:
	andl	$-65, %ebx
	shll	$6, %r14d
	andl	$64, %r14d
	orl	%ebx, %r14d
	xorl	$64, %r14d
	movl	%r14d, 4(%r12)
LBB0_4:
	movq	_MLX4_QP_OPTPAR_ALT_ADDR_PATH@GOTPCREL(%rip), %rax
	testl	%r13d, (%rax)
	je	LBB0_8
## %bb.5:
	xorl	%r15d, %r15d
	btl	$6, (%r12)
	movl	$0, %edx
	adcl	$1, %edx
	movq	-56(%rbp), %rdi                 ## 8-byte Reload
	movl	-44(%rbp), %esi                 ## 4-byte Reload
	callq	_mlx4_slave_convert_port
	testl	%eax, %eax
	jle	LBB0_9
## %bb.6:
	movl	(%r12), %ecx
	andl	$-65, %ecx
	shll	$6, %eax
	andl	$64, %eax
	orl	%ecx, %eax
	xorl	$64, %eax
	movl	%eax, (%r12)
	jmp	LBB0_11
LBB0_7:
	movq	_EINVAL@GOTPCREL(%rip), %rax
	jmp	LBB0_10
LBB0_8:
	xorl	%r15d, %r15d
	jmp	LBB0_11
LBB0_9:
	movq	_EINVAL@GOTPCREL(%rip), %rax
	xorl	%r15d, %r15d
LBB0_10:
	subl	(%rax), %r15d
LBB0_11:
	movl	%r15d, %eax
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_EINVAL,4,2                     ## @EINVAL
	.comm	_MLX4_QP_OPTPAR_PRIMARY_ADDR_PATH,4,2 ## @MLX4_QP_OPTPAR_PRIMARY_ADDR_PATH
	.comm	_MLX4_QP_OPTPAR_SCHED_QUEUE,4,2 ## @MLX4_QP_OPTPAR_SCHED_QUEUE
	.comm	_MLX4_QP_OPTPAR_ALT_ADDR_PATH,4,2 ## @MLX4_QP_OPTPAR_ALT_ADDR_PATH
	.no_dead_strip	_adjust_qp_sched_queue
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function adjust_qp_sched_queue
_adjust_qp_sched_queue:                 ; @adjust_qp_sched_queue
	.cfi_startproc
; %bb.0:
	stp	x24, x23, [sp, #-64]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x19, x2
	mov	x20, x1
	mov	x21, x0
	ldr	x8, [x3]
	ldr	w0, [x8]
	bl	_be32_to_cpu
	mov	x22, x0
	ldr	w8, [x19, #4]
	ubfx	w8, w8, #6, #1
	add	w2, w8, #1
	mov	x0, x21
	mov	x1, x20
	bl	_mlx4_slave_convert_port
	cmp	w0, #0
	b.le	LBB0_7
; %bb.1:
	mov	x23, x0
	ldr	w24, [x19, #4]
Lloh0:
	adrp	x8, _MLX4_QP_OPTPAR_PRIMARY_ADDR_PATH@GOTPAGE
Lloh1:
	ldr	x8, [x8, _MLX4_QP_OPTPAR_PRIMARY_ADDR_PATH@GOTPAGEOFF]
Lloh2:
	ldr	w8, [x8]
Lloh3:
	adrp	x9, _MLX4_QP_OPTPAR_SCHED_QUEUE@GOTPAGE
Lloh4:
	ldr	x9, [x9, _MLX4_QP_OPTPAR_SCHED_QUEUE@GOTPAGEOFF]
Lloh5:
	ldr	w9, [x9]
	orr	w8, w9, w8
	and	w8, w8, w22
	orr	w8, w8, w24
	cbnz	w8, LBB0_3
; %bb.2:
	mov	x0, x21
	mov	x1, x23
	bl	_mlx4_is_eth
	cbz	x0, LBB0_4
LBB0_3:
	bfi	w24, w23, #6, #1
	eor	w8, w24, #0x40
	str	w8, [x19, #4]
LBB0_4:
Lloh6:
	adrp	x8, _MLX4_QP_OPTPAR_ALT_ADDR_PATH@GOTPAGE
Lloh7:
	ldr	x8, [x8, _MLX4_QP_OPTPAR_ALT_ADDR_PATH@GOTPAGEOFF]
Lloh8:
	ldr	w8, [x8]
	tst	w8, w22
	b.eq	LBB0_8
; %bb.5:
	ldr	w8, [x19]
	ubfx	w8, w8, #6, #1
	add	w2, w8, #1
	mov	x0, x21
	mov	x1, x20
	bl	_mlx4_slave_convert_port
	cmp	w0, #0
	b.le	LBB0_7
; %bb.6:
	mov	x8, x0
	mov	w0, #0
	ldr	w9, [x19]
	bfi	w9, w8, #6, #1
	eor	w8, w9, #0x40
	str	w8, [x19]
	b	LBB0_9
LBB0_7:
Lloh9:
	adrp	x8, _EINVAL@GOTPAGE
Lloh10:
	ldr	x8, [x8, _EINVAL@GOTPAGEOFF]
Lloh11:
	ldr	w8, [x8]
	neg	w0, w8
	b	LBB0_9
LBB0_8:
	mov	w0, #0
LBB0_9:
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.cfi_endproc
                                        ; -- End function
	.comm	_EINVAL,4,2                     ; @EINVAL
	.comm	_MLX4_QP_OPTPAR_PRIMARY_ADDR_PATH,4,2 ; @MLX4_QP_OPTPAR_PRIMARY_ADDR_PATH
	.comm	_MLX4_QP_OPTPAR_SCHED_QUEUE,4,2 ; @MLX4_QP_OPTPAR_SCHED_QUEUE
	.comm	_MLX4_QP_OPTPAR_ALT_ADDR_PATH,4,2 ; @MLX4_QP_OPTPAR_ALT_ADDR_PATH
	.no_dead_strip	_adjust_qp_sched_queue
.subsections_via_symbols
