	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function rt61pci_toggle_irq
_rt61pci_toggle_irq:                    ## @rt61pci_toggle_irq
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$24, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%esi, %r14d
	movq	%rdi, %r15
	movq	_STATE_RADIO_IRQ_OFF@GOTPCREL(%rip), %rax
	xorl	%ebx, %ebx
	cmpl	%esi, (%rax)
	sete	%bl
	movq	_STATE_RADIO_IRQ_ON@GOTPCREL(%rip), %rax
	cmpl	%esi, (%rax)
	jne	LBB0_2
## %bb.1:
	movq	_INT_SOURCE_CSR@GOTPCREL(%rip), %r12
	movl	(%r12), %esi
	movq	%r15, %rdi
	callq	_rt2x00mmio_register_read
	movl	(%r12), %esi
	movq	%r15, %rdi
	movl	%eax, %edx
	callq	_rt2x00mmio_register_write
	movq	_MCU_INT_SOURCE_CSR@GOTPCREL(%rip), %r12
	movl	(%r12), %esi
	movq	%r15, %rdi
	callq	_rt2x00mmio_register_read
	movl	(%r12), %esi
	movq	%r15, %rdi
	movl	%eax, %edx
	callq	_rt2x00mmio_register_write
LBB0_2:
	leaq	16(%r15), %rdi
	movq	%rdi, -56(%rbp)                 ## 8-byte Spill
	callq	_spin_lock_irqsave
	movq	_INT_MASK_CSR@GOTPCREL(%rip), %r12
	movl	(%r12), %esi
	movq	%r15, %rdi
	callq	_rt2x00mmio_register_read
	movl	%eax, -44(%rbp)
	movq	_INT_MASK_CSR_TXDONE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	leaq	-44(%rbp), %r13
	movq	%r13, %rdi
	movl	%ebx, %edx
	callq	_rt2x00_set_field32
	movq	_INT_MASK_CSR_RXDONE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r13, %rdi
	movl	%ebx, %edx
	callq	_rt2x00_set_field32
	movq	_INT_MASK_CSR_BEACON_DONE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r13, %rdi
	movl	%ebx, %edx
	callq	_rt2x00_set_field32
	movq	_INT_MASK_CSR_ENABLE_MITIGATION@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r13, %rdi
	movl	%ebx, %edx
	callq	_rt2x00_set_field32
	movq	_INT_MASK_CSR_MITIGATION_PERIOD@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r13, %rdi
	movl	$255, %edx
	callq	_rt2x00_set_field32
	movl	(%r12), %esi
	movl	-44(%rbp), %edx
	movq	%r15, %rdi
	callq	_rt2x00mmio_register_write
	movq	_MCU_INT_MASK_CSR@GOTPCREL(%rip), %r12
	movl	(%r12), %esi
	movq	%r15, %rdi
	callq	_rt2x00mmio_register_read
	movl	%eax, -44(%rbp)
	movq	_MCU_INT_MASK_CSR_0@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r13, %rdi
	movl	%ebx, %edx
	callq	_rt2x00_set_field32
	movq	_MCU_INT_MASK_CSR_1@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r13, %rdi
	movl	%ebx, %edx
	callq	_rt2x00_set_field32
	movq	_MCU_INT_MASK_CSR_2@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r13, %rdi
	movl	%ebx, %edx
	callq	_rt2x00_set_field32
	movq	_MCU_INT_MASK_CSR_3@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r13, %rdi
	movl	%ebx, %edx
	callq	_rt2x00_set_field32
	movq	_MCU_INT_MASK_CSR_4@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r13, %rdi
	movl	%ebx, %edx
	callq	_rt2x00_set_field32
	movq	_MCU_INT_MASK_CSR_5@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r13, %rdi
	movl	%ebx, %edx
	callq	_rt2x00_set_field32
	movq	_MCU_INT_MASK_CSR_6@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r13, %rdi
	movl	%ebx, %edx
	callq	_rt2x00_set_field32
	movq	_MCU_INT_MASK_CSR_7@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r13, %rdi
	movl	%ebx, %edx
	callq	_rt2x00_set_field32
	movq	_MCU_INT_MASK_CSR_TWAKEUP@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r13, %rdi
	movl	%ebx, %edx
	callq	_rt2x00_set_field32
	movl	(%r12), %esi
	movl	-44(%rbp), %edx
	movq	%r15, %rdi
	callq	_rt2x00mmio_register_write
	movq	-56(%rbp), %rdi                 ## 8-byte Reload
	callq	_spin_unlock_irqrestore
	movq	_STATE_RADIO_IRQ_OFF@GOTPCREL(%rip), %rax
	cmpl	%r14d, (%rax)
	jne	LBB0_4
## %bb.3:
	leaq	12(%r15), %rdi
	callq	_tasklet_kill
	leaq	8(%r15), %rdi
	callq	_tasklet_kill
	leaq	4(%r15), %rdi
	callq	_tasklet_kill
	movq	%r15, %rdi
	callq	_tasklet_kill
LBB0_4:
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_STATE_RADIO_IRQ_OFF,4,2        ## @STATE_RADIO_IRQ_OFF
	.comm	_STATE_RADIO_IRQ_ON,4,2         ## @STATE_RADIO_IRQ_ON
	.comm	_INT_SOURCE_CSR,4,2             ## @INT_SOURCE_CSR
	.comm	_MCU_INT_SOURCE_CSR,4,2         ## @MCU_INT_SOURCE_CSR
	.comm	_INT_MASK_CSR,4,2               ## @INT_MASK_CSR
	.comm	_INT_MASK_CSR_TXDONE,4,2        ## @INT_MASK_CSR_TXDONE
	.comm	_INT_MASK_CSR_RXDONE,4,2        ## @INT_MASK_CSR_RXDONE
	.comm	_INT_MASK_CSR_BEACON_DONE,4,2   ## @INT_MASK_CSR_BEACON_DONE
	.comm	_INT_MASK_CSR_ENABLE_MITIGATION,4,2 ## @INT_MASK_CSR_ENABLE_MITIGATION
	.comm	_INT_MASK_CSR_MITIGATION_PERIOD,4,2 ## @INT_MASK_CSR_MITIGATION_PERIOD
	.comm	_MCU_INT_MASK_CSR,4,2           ## @MCU_INT_MASK_CSR
	.comm	_MCU_INT_MASK_CSR_0,4,2         ## @MCU_INT_MASK_CSR_0
	.comm	_MCU_INT_MASK_CSR_1,4,2         ## @MCU_INT_MASK_CSR_1
	.comm	_MCU_INT_MASK_CSR_2,4,2         ## @MCU_INT_MASK_CSR_2
	.comm	_MCU_INT_MASK_CSR_3,4,2         ## @MCU_INT_MASK_CSR_3
	.comm	_MCU_INT_MASK_CSR_4,4,2         ## @MCU_INT_MASK_CSR_4
	.comm	_MCU_INT_MASK_CSR_5,4,2         ## @MCU_INT_MASK_CSR_5
	.comm	_MCU_INT_MASK_CSR_6,4,2         ## @MCU_INT_MASK_CSR_6
	.comm	_MCU_INT_MASK_CSR_7,4,2         ## @MCU_INT_MASK_CSR_7
	.comm	_MCU_INT_MASK_CSR_TWAKEUP,4,2   ## @MCU_INT_MASK_CSR_TWAKEUP
	.no_dead_strip	_rt61pci_toggle_irq
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function rt61pci_toggle_irq
_rt61pci_toggle_irq:                    ; @rt61pci_toggle_irq
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #80
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x20, x1
	mov	x19, x0
Lloh0:
	adrp	x23, _STATE_RADIO_IRQ_OFF@GOTPAGE
Lloh1:
	ldr	x23, [x23, _STATE_RADIO_IRQ_OFF@GOTPAGEOFF]
	ldr	w8, [x23]
	cmp	w8, w1
	cset	w21, eq
Lloh2:
	adrp	x8, _STATE_RADIO_IRQ_ON@GOTPAGE
Lloh3:
	ldr	x8, [x8, _STATE_RADIO_IRQ_ON@GOTPAGEOFF]
Lloh4:
	ldr	w8, [x8]
	cmp	w8, w1
	b.ne	LBB0_2
; %bb.1:
Lloh5:
	adrp	x22, _INT_SOURCE_CSR@GOTPAGE
Lloh6:
	ldr	x22, [x22, _INT_SOURCE_CSR@GOTPAGEOFF]
	ldr	w1, [x22]
	mov	x0, x19
	bl	_rt2x00mmio_register_read
	mov	x2, x0
	ldr	w1, [x22]
	mov	x0, x19
	bl	_rt2x00mmio_register_write
Lloh7:
	adrp	x22, _MCU_INT_SOURCE_CSR@GOTPAGE
Lloh8:
	ldr	x22, [x22, _MCU_INT_SOURCE_CSR@GOTPAGEOFF]
	ldr	w1, [x22]
	mov	x0, x19
	bl	_rt2x00mmio_register_read
	mov	x2, x0
	ldr	w1, [x22]
	mov	x0, x19
	bl	_rt2x00mmio_register_write
LBB0_2:
	add	x22, x19, #16
	mov	x0, x22
	bl	_spin_lock_irqsave
Lloh9:
	adrp	x24, _INT_MASK_CSR@GOTPAGE
Lloh10:
	ldr	x24, [x24, _INT_MASK_CSR@GOTPAGEOFF]
	ldr	w1, [x24]
	mov	x0, x19
	bl	_rt2x00mmio_register_read
	str	w0, [sp, #12]
Lloh11:
	adrp	x8, _INT_MASK_CSR_TXDONE@GOTPAGE
Lloh12:
	ldr	x8, [x8, _INT_MASK_CSR_TXDONE@GOTPAGEOFF]
Lloh13:
	ldr	w1, [x8]
	add	x0, sp, #12
	mov	x2, x21
	bl	_rt2x00_set_field32
Lloh14:
	adrp	x8, _INT_MASK_CSR_RXDONE@GOTPAGE
Lloh15:
	ldr	x8, [x8, _INT_MASK_CSR_RXDONE@GOTPAGEOFF]
Lloh16:
	ldr	w1, [x8]
	add	x0, sp, #12
	mov	x2, x21
	bl	_rt2x00_set_field32
Lloh17:
	adrp	x8, _INT_MASK_CSR_BEACON_DONE@GOTPAGE
Lloh18:
	ldr	x8, [x8, _INT_MASK_CSR_BEACON_DONE@GOTPAGEOFF]
Lloh19:
	ldr	w1, [x8]
	add	x0, sp, #12
	mov	x2, x21
	bl	_rt2x00_set_field32
Lloh20:
	adrp	x8, _INT_MASK_CSR_ENABLE_MITIGATION@GOTPAGE
Lloh21:
	ldr	x8, [x8, _INT_MASK_CSR_ENABLE_MITIGATION@GOTPAGEOFF]
Lloh22:
	ldr	w1, [x8]
	add	x0, sp, #12
	mov	x2, x21
	bl	_rt2x00_set_field32
Lloh23:
	adrp	x8, _INT_MASK_CSR_MITIGATION_PERIOD@GOTPAGE
Lloh24:
	ldr	x8, [x8, _INT_MASK_CSR_MITIGATION_PERIOD@GOTPAGEOFF]
Lloh25:
	ldr	w1, [x8]
	add	x0, sp, #12
	mov	w2, #255
	bl	_rt2x00_set_field32
	ldr	w1, [x24]
	ldr	w2, [sp, #12]
	mov	x0, x19
	bl	_rt2x00mmio_register_write
Lloh26:
	adrp	x24, _MCU_INT_MASK_CSR@GOTPAGE
Lloh27:
	ldr	x24, [x24, _MCU_INT_MASK_CSR@GOTPAGEOFF]
	ldr	w1, [x24]
	mov	x0, x19
	bl	_rt2x00mmio_register_read
	str	w0, [sp, #12]
Lloh28:
	adrp	x8, _MCU_INT_MASK_CSR_0@GOTPAGE
Lloh29:
	ldr	x8, [x8, _MCU_INT_MASK_CSR_0@GOTPAGEOFF]
Lloh30:
	ldr	w1, [x8]
	add	x0, sp, #12
	mov	x2, x21
	bl	_rt2x00_set_field32
Lloh31:
	adrp	x8, _MCU_INT_MASK_CSR_1@GOTPAGE
Lloh32:
	ldr	x8, [x8, _MCU_INT_MASK_CSR_1@GOTPAGEOFF]
Lloh33:
	ldr	w1, [x8]
	add	x0, sp, #12
	mov	x2, x21
	bl	_rt2x00_set_field32
Lloh34:
	adrp	x8, _MCU_INT_MASK_CSR_2@GOTPAGE
Lloh35:
	ldr	x8, [x8, _MCU_INT_MASK_CSR_2@GOTPAGEOFF]
Lloh36:
	ldr	w1, [x8]
	add	x0, sp, #12
	mov	x2, x21
	bl	_rt2x00_set_field32
Lloh37:
	adrp	x8, _MCU_INT_MASK_CSR_3@GOTPAGE
Lloh38:
	ldr	x8, [x8, _MCU_INT_MASK_CSR_3@GOTPAGEOFF]
Lloh39:
	ldr	w1, [x8]
	add	x0, sp, #12
	mov	x2, x21
	bl	_rt2x00_set_field32
Lloh40:
	adrp	x8, _MCU_INT_MASK_CSR_4@GOTPAGE
Lloh41:
	ldr	x8, [x8, _MCU_INT_MASK_CSR_4@GOTPAGEOFF]
Lloh42:
	ldr	w1, [x8]
	add	x0, sp, #12
	mov	x2, x21
	bl	_rt2x00_set_field32
Lloh43:
	adrp	x8, _MCU_INT_MASK_CSR_5@GOTPAGE
Lloh44:
	ldr	x8, [x8, _MCU_INT_MASK_CSR_5@GOTPAGEOFF]
Lloh45:
	ldr	w1, [x8]
	add	x0, sp, #12
	mov	x2, x21
	bl	_rt2x00_set_field32
Lloh46:
	adrp	x8, _MCU_INT_MASK_CSR_6@GOTPAGE
Lloh47:
	ldr	x8, [x8, _MCU_INT_MASK_CSR_6@GOTPAGEOFF]
Lloh48:
	ldr	w1, [x8]
	add	x0, sp, #12
	mov	x2, x21
	bl	_rt2x00_set_field32
Lloh49:
	adrp	x8, _MCU_INT_MASK_CSR_7@GOTPAGE
Lloh50:
	ldr	x8, [x8, _MCU_INT_MASK_CSR_7@GOTPAGEOFF]
Lloh51:
	ldr	w1, [x8]
	add	x0, sp, #12
	mov	x2, x21
	bl	_rt2x00_set_field32
Lloh52:
	adrp	x8, _MCU_INT_MASK_CSR_TWAKEUP@GOTPAGE
Lloh53:
	ldr	x8, [x8, _MCU_INT_MASK_CSR_TWAKEUP@GOTPAGEOFF]
Lloh54:
	ldr	w1, [x8]
	add	x0, sp, #12
	mov	x2, x21
	bl	_rt2x00_set_field32
	ldr	w1, [x24]
	ldr	w2, [sp, #12]
	mov	x0, x19
	bl	_rt2x00mmio_register_write
	mov	x0, x22
	bl	_spin_unlock_irqrestore
	ldr	w8, [x23]
	cmp	w8, w20
	b.ne	LBB0_4
; %bb.3:
	add	x0, x19, #12
	bl	_tasklet_kill
	add	x0, x19, #8
	bl	_tasklet_kill
	add	x0, x19, #4
	bl	_tasklet_kill
	mov	x0, x19
	bl	_tasklet_kill
LBB0_4:
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #80
	ret
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGot	Lloh7, Lloh8
	.loh AdrpLdrGot	Lloh5, Lloh6
	.loh AdrpLdrGotLdr	Lloh52, Lloh53, Lloh54
	.loh AdrpLdrGotLdr	Lloh49, Lloh50, Lloh51
	.loh AdrpLdrGotLdr	Lloh46, Lloh47, Lloh48
	.loh AdrpLdrGotLdr	Lloh43, Lloh44, Lloh45
	.loh AdrpLdrGotLdr	Lloh40, Lloh41, Lloh42
	.loh AdrpLdrGotLdr	Lloh37, Lloh38, Lloh39
	.loh AdrpLdrGotLdr	Lloh34, Lloh35, Lloh36
	.loh AdrpLdrGotLdr	Lloh31, Lloh32, Lloh33
	.loh AdrpLdrGotLdr	Lloh28, Lloh29, Lloh30
	.loh AdrpLdrGot	Lloh26, Lloh27
	.loh AdrpLdrGotLdr	Lloh23, Lloh24, Lloh25
	.loh AdrpLdrGotLdr	Lloh20, Lloh21, Lloh22
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh19
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh16
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpLdrGot	Lloh9, Lloh10
	.cfi_endproc
                                        ; -- End function
	.comm	_STATE_RADIO_IRQ_OFF,4,2        ; @STATE_RADIO_IRQ_OFF
	.comm	_STATE_RADIO_IRQ_ON,4,2         ; @STATE_RADIO_IRQ_ON
	.comm	_INT_SOURCE_CSR,4,2             ; @INT_SOURCE_CSR
	.comm	_MCU_INT_SOURCE_CSR,4,2         ; @MCU_INT_SOURCE_CSR
	.comm	_INT_MASK_CSR,4,2               ; @INT_MASK_CSR
	.comm	_INT_MASK_CSR_TXDONE,4,2        ; @INT_MASK_CSR_TXDONE
	.comm	_INT_MASK_CSR_RXDONE,4,2        ; @INT_MASK_CSR_RXDONE
	.comm	_INT_MASK_CSR_BEACON_DONE,4,2   ; @INT_MASK_CSR_BEACON_DONE
	.comm	_INT_MASK_CSR_ENABLE_MITIGATION,4,2 ; @INT_MASK_CSR_ENABLE_MITIGATION
	.comm	_INT_MASK_CSR_MITIGATION_PERIOD,4,2 ; @INT_MASK_CSR_MITIGATION_PERIOD
	.comm	_MCU_INT_MASK_CSR,4,2           ; @MCU_INT_MASK_CSR
	.comm	_MCU_INT_MASK_CSR_0,4,2         ; @MCU_INT_MASK_CSR_0
	.comm	_MCU_INT_MASK_CSR_1,4,2         ; @MCU_INT_MASK_CSR_1
	.comm	_MCU_INT_MASK_CSR_2,4,2         ; @MCU_INT_MASK_CSR_2
	.comm	_MCU_INT_MASK_CSR_3,4,2         ; @MCU_INT_MASK_CSR_3
	.comm	_MCU_INT_MASK_CSR_4,4,2         ; @MCU_INT_MASK_CSR_4
	.comm	_MCU_INT_MASK_CSR_5,4,2         ; @MCU_INT_MASK_CSR_5
	.comm	_MCU_INT_MASK_CSR_6,4,2         ; @MCU_INT_MASK_CSR_6
	.comm	_MCU_INT_MASK_CSR_7,4,2         ; @MCU_INT_MASK_CSR_7
	.comm	_MCU_INT_MASK_CSR_TWAKEUP,4,2   ; @MCU_INT_MASK_CSR_TWAKEUP
	.no_dead_strip	_rt61pci_toggle_irq
.subsections_via_symbols
