	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function mvpp2_prs_dsa_init
_mvpp2_prs_dsa_init:                    ## @mvpp2_prs_dsa_init
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %rbx
	movq	_MVPP2_PRS_UNTAGGED@GOTPCREL(%rip), %r14
	movl	(%r14), %ecx
	movq	_MVPP2_PRS_EDSA@GOTPCREL(%rip), %r12
	movl	(%r12), %r8d
	xorl	%esi, %esi
	xorl	%edx, %edx
	callq	_mvpp2_prs_dsa_tag_set
	movq	_MVPP2_PRS_TAGGED@GOTPCREL(%rip), %r15
	movl	(%r15), %ecx
	movl	(%r12), %r8d
	movq	%rbx, %rdi
	xorl	%esi, %esi
	xorl	%edx, %edx
	callq	_mvpp2_prs_dsa_tag_set
	movl	(%r14), %ecx
	movq	_MVPP2_PRS_DSA@GOTPCREL(%rip), %r13
	movl	(%r13), %r8d
	movq	%rbx, %rdi
	xorl	%esi, %esi
	xorl	%edx, %edx
	callq	_mvpp2_prs_dsa_tag_set
	movl	(%r15), %ecx
	movl	(%r13), %r8d
	movq	%rbx, %rdi
	xorl	%esi, %esi
	xorl	%edx, %edx
	callq	_mvpp2_prs_dsa_tag_set
	movl	(%r14), %ecx
	movl	(%r12), %r8d
	movq	%rbx, %rdi
	xorl	%esi, %esi
	xorl	%edx, %edx
	callq	_mvpp2_prs_dsa_tag_ethertype_set
	movl	(%r15), %ecx
	movl	(%r12), %r8d
	movq	%rbx, %rdi
	xorl	%esi, %esi
	xorl	%edx, %edx
	callq	_mvpp2_prs_dsa_tag_ethertype_set
	movl	(%r14), %ecx
	movl	(%r13), %r8d
	movq	%rbx, %rdi
	xorl	%esi, %esi
	movl	$1, %edx
	callq	_mvpp2_prs_dsa_tag_ethertype_set
	movl	(%r15), %ecx
	movl	(%r13), %r8d
	movq	%rbx, %rdi
	xorl	%esi, %esi
	movl	$1, %edx
	callq	_mvpp2_prs_dsa_tag_ethertype_set
	leaq	-48(%rbp), %r14
	movq	%r14, %rdi
	xorl	%esi, %esi
	movl	$4, %edx
	callq	_memset
	movq	_MVPP2_PRS_LU_DSA@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	callq	_mvpp2_prs_tcam_lu_set
	movq	_MVPP2_PE_DSA_DEFAULT@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, -48(%rbp)
	movq	_MVPP2_PRS_LU_VLAN@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	callq	_mvpp2_prs_sram_next_lu_set
	movq	_MVPP2_PRS_SRAM_OP_SEL_SHIFT_ADD@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r14, %rdi
	xorl	%esi, %esi
	callq	_mvpp2_prs_sram_shift_set
	movl	-48(%rbp), %esi
	movq	_MVPP2_PRS_LU_MAC@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	callq	_mvpp2_prs_shadow_set
	movq	_MVPP2_PRS_SRAM_AI_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r14, %rdi
	xorl	%esi, %esi
	callq	_mvpp2_prs_sram_ai_update
	movq	_MVPP2_PRS_PORT_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	callq	_mvpp2_prs_tcam_port_map_set
	movq	%rbx, %rdi
	movq	%r14, %rsi
	callq	_mvpp2_prs_hw_write
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_MVPP2_PRS_UNTAGGED,4,2         ## @MVPP2_PRS_UNTAGGED
	.comm	_MVPP2_PRS_EDSA,4,2             ## @MVPP2_PRS_EDSA
	.comm	_MVPP2_PRS_TAGGED,4,2           ## @MVPP2_PRS_TAGGED
	.comm	_MVPP2_PRS_DSA,4,2              ## @MVPP2_PRS_DSA
	.comm	_MVPP2_PRS_LU_DSA,4,2           ## @MVPP2_PRS_LU_DSA
	.comm	_MVPP2_PE_DSA_DEFAULT,4,2       ## @MVPP2_PE_DSA_DEFAULT
	.comm	_MVPP2_PRS_LU_VLAN,4,2          ## @MVPP2_PRS_LU_VLAN
	.comm	_MVPP2_PRS_SRAM_OP_SEL_SHIFT_ADD,4,2 ## @MVPP2_PRS_SRAM_OP_SEL_SHIFT_ADD
	.comm	_MVPP2_PRS_LU_MAC,4,2           ## @MVPP2_PRS_LU_MAC
	.comm	_MVPP2_PRS_SRAM_AI_MASK,4,2     ## @MVPP2_PRS_SRAM_AI_MASK
	.comm	_MVPP2_PRS_PORT_MASK,4,2        ## @MVPP2_PRS_PORT_MASK
	.no_dead_strip	_mvpp2_prs_dsa_init
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function mvpp2_prs_dsa_init
_mvpp2_prs_dsa_init:                    ; @mvpp2_prs_dsa_init
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #80
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x19, x0
Lloh0:
	adrp	x20, _MVPP2_PRS_UNTAGGED@GOTPAGE
Lloh1:
	ldr	x20, [x20, _MVPP2_PRS_UNTAGGED@GOTPAGEOFF]
	ldr	w3, [x20]
Lloh2:
	adrp	x22, _MVPP2_PRS_EDSA@GOTPAGE
Lloh3:
	ldr	x22, [x22, _MVPP2_PRS_EDSA@GOTPAGEOFF]
	ldr	w4, [x22]
	mov	w1, #0
	mov	w2, #0
	bl	_mvpp2_prs_dsa_tag_set
Lloh4:
	adrp	x21, _MVPP2_PRS_TAGGED@GOTPAGE
Lloh5:
	ldr	x21, [x21, _MVPP2_PRS_TAGGED@GOTPAGEOFF]
	ldr	w3, [x21]
	ldr	w4, [x22]
	mov	x0, x19
	mov	w1, #0
	mov	w2, #0
	bl	_mvpp2_prs_dsa_tag_set
	ldr	w3, [x20]
Lloh6:
	adrp	x23, _MVPP2_PRS_DSA@GOTPAGE
Lloh7:
	ldr	x23, [x23, _MVPP2_PRS_DSA@GOTPAGEOFF]
	ldr	w4, [x23]
	mov	x0, x19
	mov	w1, #0
	mov	w2, #0
	bl	_mvpp2_prs_dsa_tag_set
	ldr	w3, [x21]
	ldr	w4, [x23]
	mov	x0, x19
	mov	w1, #0
	mov	w2, #0
	bl	_mvpp2_prs_dsa_tag_set
	ldr	w3, [x20]
	ldr	w4, [x22]
	mov	x0, x19
	mov	w1, #0
	mov	w2, #0
	bl	_mvpp2_prs_dsa_tag_ethertype_set
	ldr	w3, [x21]
	ldr	w4, [x22]
	mov	x0, x19
	mov	w1, #0
	mov	w2, #0
	bl	_mvpp2_prs_dsa_tag_ethertype_set
	ldr	w3, [x20]
	ldr	w4, [x23]
	mov	x0, x19
	mov	w1, #0
	mov	w2, #1
	bl	_mvpp2_prs_dsa_tag_ethertype_set
	ldr	w3, [x21]
	ldr	w4, [x23]
	mov	x0, x19
	mov	w1, #0
	mov	w2, #1
	bl	_mvpp2_prs_dsa_tag_ethertype_set
	add	x0, sp, #8
	mov	w1, #0
	mov	w2, #4
	bl	_memset
Lloh8:
	adrp	x8, _MVPP2_PRS_LU_DSA@GOTPAGE
Lloh9:
	ldr	x8, [x8, _MVPP2_PRS_LU_DSA@GOTPAGEOFF]
Lloh10:
	ldr	w1, [x8]
	add	x0, sp, #8
	bl	_mvpp2_prs_tcam_lu_set
Lloh11:
	adrp	x8, _MVPP2_PE_DSA_DEFAULT@GOTPAGE
Lloh12:
	ldr	x8, [x8, _MVPP2_PE_DSA_DEFAULT@GOTPAGEOFF]
Lloh13:
	ldr	w8, [x8]
	str	w8, [sp, #8]
Lloh14:
	adrp	x8, _MVPP2_PRS_LU_VLAN@GOTPAGE
Lloh15:
	ldr	x8, [x8, _MVPP2_PRS_LU_VLAN@GOTPAGEOFF]
Lloh16:
	ldr	w1, [x8]
	add	x0, sp, #8
	bl	_mvpp2_prs_sram_next_lu_set
Lloh17:
	adrp	x8, _MVPP2_PRS_SRAM_OP_SEL_SHIFT_ADD@GOTPAGE
Lloh18:
	ldr	x8, [x8, _MVPP2_PRS_SRAM_OP_SEL_SHIFT_ADD@GOTPAGEOFF]
Lloh19:
	ldr	w2, [x8]
	add	x0, sp, #8
	mov	w1, #0
	bl	_mvpp2_prs_sram_shift_set
	ldr	w1, [sp, #8]
Lloh20:
	adrp	x8, _MVPP2_PRS_LU_MAC@GOTPAGE
Lloh21:
	ldr	x8, [x8, _MVPP2_PRS_LU_MAC@GOTPAGEOFF]
Lloh22:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_mvpp2_prs_shadow_set
Lloh23:
	adrp	x8, _MVPP2_PRS_SRAM_AI_MASK@GOTPAGE
Lloh24:
	ldr	x8, [x8, _MVPP2_PRS_SRAM_AI_MASK@GOTPAGEOFF]
Lloh25:
	ldr	w2, [x8]
	add	x0, sp, #8
	mov	w1, #0
	bl	_mvpp2_prs_sram_ai_update
Lloh26:
	adrp	x8, _MVPP2_PRS_PORT_MASK@GOTPAGE
Lloh27:
	ldr	x8, [x8, _MVPP2_PRS_PORT_MASK@GOTPAGEOFF]
Lloh28:
	ldr	w1, [x8]
	add	x0, sp, #8
	bl	_mvpp2_prs_tcam_port_map_set
	add	x1, sp, #8
	mov	x0, x19
	bl	_mvpp2_prs_hw_write
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #80
	ret
	.loh AdrpLdrGotLdr	Lloh26, Lloh27, Lloh28
	.loh AdrpLdrGotLdr	Lloh23, Lloh24, Lloh25
	.loh AdrpLdrGotLdr	Lloh20, Lloh21, Lloh22
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh19
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh16
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGot	Lloh6, Lloh7
	.loh AdrpLdrGot	Lloh4, Lloh5
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpLdrGot	Lloh0, Lloh1
	.cfi_endproc
                                        ; -- End function
	.comm	_MVPP2_PRS_UNTAGGED,4,2         ; @MVPP2_PRS_UNTAGGED
	.comm	_MVPP2_PRS_EDSA,4,2             ; @MVPP2_PRS_EDSA
	.comm	_MVPP2_PRS_TAGGED,4,2           ; @MVPP2_PRS_TAGGED
	.comm	_MVPP2_PRS_DSA,4,2              ; @MVPP2_PRS_DSA
	.comm	_MVPP2_PRS_LU_DSA,4,2           ; @MVPP2_PRS_LU_DSA
	.comm	_MVPP2_PE_DSA_DEFAULT,4,2       ; @MVPP2_PE_DSA_DEFAULT
	.comm	_MVPP2_PRS_LU_VLAN,4,2          ; @MVPP2_PRS_LU_VLAN
	.comm	_MVPP2_PRS_SRAM_OP_SEL_SHIFT_ADD,4,2 ; @MVPP2_PRS_SRAM_OP_SEL_SHIFT_ADD
	.comm	_MVPP2_PRS_LU_MAC,4,2           ; @MVPP2_PRS_LU_MAC
	.comm	_MVPP2_PRS_SRAM_AI_MASK,4,2     ; @MVPP2_PRS_SRAM_AI_MASK
	.comm	_MVPP2_PRS_PORT_MASK,4,2        ; @MVPP2_PRS_PORT_MASK
	.no_dead_strip	_mvpp2_prs_dsa_init
.subsections_via_symbols
