	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function mvpp2_prs_dsa_tag_set
_mvpp2_prs_dsa_tag_set:                 ## @mvpp2_prs_dsa_tag_set
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$24, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%ecx, %ebx
	movl	%edx, -60(%rbp)                 ## 4-byte Spill
	movl	%esi, -56(%rbp)                 ## 4-byte Spill
	movq	%rdi, %r12
	xorl	%r15d, %r15d
	testl	%r8d, %r8d
	movq	_MVPP2_PE_EDSA_TAGGED@GOTPCREL(%rip), %rax
	cmoveq	_MVPP2_PE_DSA_TAGGED@GOTPCREL(%rip), %rax
	movq	_MVPP2_PE_EDSA_UNTAGGED@GOTPCREL(%rip), %rcx
	cmoveq	_MVPP2_PE_DSA_UNTAGGED@GOTPCREL(%rip), %rcx
	setne	%dl
	testl	%ebx, %ebx
	cmovneq	%rax, %rcx
	movslq	(%rcx), %r14
	movq	(%rdi), %rax
	cmpq	$0, (%rax,%r14,8)
	je	LBB0_2
## %bb.1:
	leaq	-48(%rbp), %rsi
	movq	%r12, %rdi
	movl	%r14d, %edx
	callq	_mvpp2_prs_init_from_hw
	jmp	LBB0_6
LBB0_2:
	movl	%r8d, %r13d
	movb	%dl, -49(%rbp)                  ## 1-byte Spill
	leaq	-48(%rbp), %rdi
	xorl	%esi, %esi
	movl	$4, %edx
	callq	_memset
	movq	_MVPP2_PRS_LU_DSA@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	leaq	-48(%rbp), %rdi
	callq	_mvpp2_prs_tcam_lu_set
	movl	%r14d, -48(%rbp)
	movq	_MVPP2_PRS_LU_DSA@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r12, %rdi
	movl	%r14d, %esi
	callq	_mvpp2_prs_shadow_set
	testl	%ebx, %ebx
	je	LBB0_4
## %bb.3:
	xorl	%ebx, %ebx
	testl	%r13d, %r13d
	setne	%bl
	movq	_MVPP2_PRS_TCAM_DSA_TAGGED_BIT@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	leaq	-48(%rbp), %r14
	movq	%r14, %rdi
	xorl	%esi, %esi
	movl	%ecx, %edx
	callq	_mvpp2_prs_tcam_data_byte_set
	movq	_MVPP2_PRS_SRAM_AI_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r14, %rdi
	movl	%ebx, %esi
	callq	_mvpp2_prs_sram_ai_update
	movq	_MVPP2_PRS_LU_VID@GOTPCREL(%rip), %r14
	movq	_MVPP2_PRS_RI_VLAN_SINGLE@GOTPCREL(%rip), %rax
	jmp	LBB0_5
LBB0_4:
	movb	-49(%rbp), %al                  ## 1-byte Reload
	movb	%al, %r15b
	leal	4(,%r15,4), %esi
	movq	_MVPP2_PRS_SRAM_OP_SEL_SHIFT_ADD@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	leaq	-48(%rbp), %rdi
	callq	_mvpp2_prs_sram_shift_set
	movq	_MVPP2_PRS_LU_L2@GOTPCREL(%rip), %r14
	movq	_MVPP2_PRS_RI_VLAN_NONE@GOTPCREL(%rip), %rax
LBB0_5:
	movl	(%rax), %esi
	movq	_MVPP2_PRS_RI_VLAN_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	leaq	-48(%rbp), %rbx
	movq	%rbx, %rdi
	callq	_mvpp2_prs_sram_ri_update
	movl	(%r14), %esi
	movq	%rbx, %rdi
	callq	_mvpp2_prs_sram_next_lu_set
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	_mvpp2_prs_tcam_port_map_set
LBB0_6:
	leaq	-48(%rbp), %rbx
	movq	%rbx, %rdi
	movl	-56(%rbp), %esi                 ## 4-byte Reload
	movl	-60(%rbp), %edx                 ## 4-byte Reload
	callq	_mvpp2_prs_tcam_port_set
	movq	%r12, %rdi
	movq	%rbx, %rsi
	callq	_mvpp2_prs_hw_write
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_MVPP2_PE_EDSA_TAGGED,4,2       ## @MVPP2_PE_EDSA_TAGGED
	.comm	_MVPP2_PE_EDSA_UNTAGGED,4,2     ## @MVPP2_PE_EDSA_UNTAGGED
	.comm	_MVPP2_PE_DSA_TAGGED,4,2        ## @MVPP2_PE_DSA_TAGGED
	.comm	_MVPP2_PE_DSA_UNTAGGED,4,2      ## @MVPP2_PE_DSA_UNTAGGED
	.comm	_MVPP2_PRS_LU_DSA,4,2           ## @MVPP2_PRS_LU_DSA
	.comm	_MVPP2_PRS_TCAM_DSA_TAGGED_BIT,4,2 ## @MVPP2_PRS_TCAM_DSA_TAGGED_BIT
	.comm	_MVPP2_PRS_SRAM_AI_MASK,4,2     ## @MVPP2_PRS_SRAM_AI_MASK
	.comm	_MVPP2_PRS_RI_VLAN_SINGLE,4,2   ## @MVPP2_PRS_RI_VLAN_SINGLE
	.comm	_MVPP2_PRS_RI_VLAN_MASK,4,2     ## @MVPP2_PRS_RI_VLAN_MASK
	.comm	_MVPP2_PRS_LU_VID,4,2           ## @MVPP2_PRS_LU_VID
	.comm	_MVPP2_PRS_SRAM_OP_SEL_SHIFT_ADD,4,2 ## @MVPP2_PRS_SRAM_OP_SEL_SHIFT_ADD
	.comm	_MVPP2_PRS_RI_VLAN_NONE,4,2     ## @MVPP2_PRS_RI_VLAN_NONE
	.comm	_MVPP2_PRS_LU_L2,4,2            ## @MVPP2_PRS_LU_L2
	.no_dead_strip	_mvpp2_prs_dsa_tag_set
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function mvpp2_prs_dsa_tag_set
_mvpp2_prs_dsa_tag_set:                 ; @mvpp2_prs_dsa_tag_set
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #96
	.cfi_def_cfa_offset 96
	stp	x26, x25, [sp, #16]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #32]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #48]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #64]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #80]             ; 16-byte Folded Spill
	add	x29, sp, #80
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	mov	x20, x2
	mov	x21, x1
	mov	x19, x0
	mov	w8, #8
	mov	w9, #4
	cmp	w4, #0
	csel	w23, w9, w8, eq
Lloh0:
	adrp	x8, _MVPP2_PE_DSA_TAGGED@GOTPAGE
Lloh1:
	ldr	x8, [x8, _MVPP2_PE_DSA_TAGGED@GOTPAGEOFF]
Lloh2:
	adrp	x9, _MVPP2_PE_EDSA_TAGGED@GOTPAGE
Lloh3:
	ldr	x9, [x9, _MVPP2_PE_EDSA_TAGGED@GOTPAGEOFF]
	csel	x8, x8, x9, eq
Lloh4:
	adrp	x9, _MVPP2_PE_DSA_UNTAGGED@GOTPAGE
Lloh5:
	ldr	x9, [x9, _MVPP2_PE_DSA_UNTAGGED@GOTPAGEOFF]
Lloh6:
	adrp	x10, _MVPP2_PE_EDSA_UNTAGGED@GOTPAGE
Lloh7:
	ldr	x10, [x10, _MVPP2_PE_EDSA_UNTAGGED@GOTPAGEOFF]
	csel	x9, x9, x10, eq
	cmp	w3, #0
	csel	x8, x9, x8, eq
	ldrsw	x25, [x8]
	ldr	x8, [x0]
	ldr	x8, [x8, x25, lsl #3]
	cbz	x8, LBB0_2
; %bb.1:
	add	x1, sp, #8
	mov	x0, x19
	mov	x2, x25
	bl	_mvpp2_prs_init_from_hw
	b	LBB0_6
LBB0_2:
	mov	x22, x4
	mov	x24, x3
	add	x0, sp, #8
	mov	w1, #0
	mov	w2, #4
	bl	_memset
Lloh8:
	adrp	x26, _MVPP2_PRS_LU_DSA@GOTPAGE
Lloh9:
	ldr	x26, [x26, _MVPP2_PRS_LU_DSA@GOTPAGEOFF]
	ldr	w1, [x26]
	add	x0, sp, #8
	bl	_mvpp2_prs_tcam_lu_set
	str	w25, [sp, #8]
	ldr	w2, [x26]
	mov	x0, x19
	mov	x1, x25
	bl	_mvpp2_prs_shadow_set
	cbz	w24, LBB0_4
; %bb.3:
	cmp	w22, #0
	cset	w22, ne
Lloh10:
	adrp	x8, _MVPP2_PRS_TCAM_DSA_TAGGED_BIT@GOTPAGE
Lloh11:
	ldr	x8, [x8, _MVPP2_PRS_TCAM_DSA_TAGGED_BIT@GOTPAGEOFF]
Lloh12:
	ldr	w2, [x8]
	add	x0, sp, #8
	mov	w1, #0
	mov	x3, x2
	bl	_mvpp2_prs_tcam_data_byte_set
Lloh13:
	adrp	x8, _MVPP2_PRS_SRAM_AI_MASK@GOTPAGE
Lloh14:
	ldr	x8, [x8, _MVPP2_PRS_SRAM_AI_MASK@GOTPAGEOFF]
Lloh15:
	ldr	w2, [x8]
	add	x0, sp, #8
	mov	x1, x22
	bl	_mvpp2_prs_sram_ai_update
Lloh16:
	adrp	x22, _MVPP2_PRS_LU_VID@GOTPAGE
Lloh17:
	ldr	x22, [x22, _MVPP2_PRS_LU_VID@GOTPAGEOFF]
Lloh18:
	adrp	x8, _MVPP2_PRS_RI_VLAN_SINGLE@GOTPAGE
Lloh19:
	ldr	x8, [x8, _MVPP2_PRS_RI_VLAN_SINGLE@GOTPAGEOFF]
	b	LBB0_5
LBB0_4:
Lloh20:
	adrp	x8, _MVPP2_PRS_SRAM_OP_SEL_SHIFT_ADD@GOTPAGE
Lloh21:
	ldr	x8, [x8, _MVPP2_PRS_SRAM_OP_SEL_SHIFT_ADD@GOTPAGEOFF]
Lloh22:
	ldr	w2, [x8]
	add	x0, sp, #8
	mov	x1, x23
	bl	_mvpp2_prs_sram_shift_set
Lloh23:
	adrp	x22, _MVPP2_PRS_LU_L2@GOTPAGE
Lloh24:
	ldr	x22, [x22, _MVPP2_PRS_LU_L2@GOTPAGEOFF]
Lloh25:
	adrp	x8, _MVPP2_PRS_RI_VLAN_NONE@GOTPAGE
Lloh26:
	ldr	x8, [x8, _MVPP2_PRS_RI_VLAN_NONE@GOTPAGEOFF]
LBB0_5:
	ldr	w1, [x8]
Lloh27:
	adrp	x8, _MVPP2_PRS_RI_VLAN_MASK@GOTPAGE
Lloh28:
	ldr	x8, [x8, _MVPP2_PRS_RI_VLAN_MASK@GOTPAGEOFF]
Lloh29:
	ldr	w2, [x8]
	add	x0, sp, #8
	bl	_mvpp2_prs_sram_ri_update
	ldr	w1, [x22]
	add	x0, sp, #8
	bl	_mvpp2_prs_sram_next_lu_set
	add	x0, sp, #8
	mov	w1, #0
	bl	_mvpp2_prs_tcam_port_map_set
LBB0_6:
	add	x0, sp, #8
	mov	x1, x21
	mov	x2, x20
	bl	_mvpp2_prs_tcam_port_set
	add	x1, sp, #8
	mov	x0, x19
	bl	_mvpp2_prs_hw_write
	ldp	x29, x30, [sp, #80]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #64]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #48]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #32]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #96
	ret
	.loh AdrpLdrGot	Lloh6, Lloh7
	.loh AdrpLdrGot	Lloh4, Lloh5
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGot	Lloh8, Lloh9
	.loh AdrpLdrGot	Lloh18, Lloh19
	.loh AdrpLdrGot	Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh13, Lloh14, Lloh15
	.loh AdrpLdrGotLdr	Lloh10, Lloh11, Lloh12
	.loh AdrpLdrGot	Lloh25, Lloh26
	.loh AdrpLdrGot	Lloh23, Lloh24
	.loh AdrpLdrGotLdr	Lloh20, Lloh21, Lloh22
	.loh AdrpLdrGotLdr	Lloh27, Lloh28, Lloh29
	.cfi_endproc
                                        ; -- End function
	.comm	_MVPP2_PE_EDSA_TAGGED,4,2       ; @MVPP2_PE_EDSA_TAGGED
	.comm	_MVPP2_PE_EDSA_UNTAGGED,4,2     ; @MVPP2_PE_EDSA_UNTAGGED
	.comm	_MVPP2_PE_DSA_TAGGED,4,2        ; @MVPP2_PE_DSA_TAGGED
	.comm	_MVPP2_PE_DSA_UNTAGGED,4,2      ; @MVPP2_PE_DSA_UNTAGGED
	.comm	_MVPP2_PRS_LU_DSA,4,2           ; @MVPP2_PRS_LU_DSA
	.comm	_MVPP2_PRS_TCAM_DSA_TAGGED_BIT,4,2 ; @MVPP2_PRS_TCAM_DSA_TAGGED_BIT
	.comm	_MVPP2_PRS_SRAM_AI_MASK,4,2     ; @MVPP2_PRS_SRAM_AI_MASK
	.comm	_MVPP2_PRS_RI_VLAN_SINGLE,4,2   ; @MVPP2_PRS_RI_VLAN_SINGLE
	.comm	_MVPP2_PRS_RI_VLAN_MASK,4,2     ; @MVPP2_PRS_RI_VLAN_MASK
	.comm	_MVPP2_PRS_LU_VID,4,2           ; @MVPP2_PRS_LU_VID
	.comm	_MVPP2_PRS_SRAM_OP_SEL_SHIFT_ADD,4,2 ; @MVPP2_PRS_SRAM_OP_SEL_SHIFT_ADD
	.comm	_MVPP2_PRS_RI_VLAN_NONE,4,2     ; @MVPP2_PRS_RI_VLAN_NONE
	.comm	_MVPP2_PRS_LU_L2,4,2            ; @MVPP2_PRS_LU_L2
	.no_dead_strip	_mvpp2_prs_dsa_tag_set
.subsections_via_symbols
