	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function rockchip_set_phy_state
_rockchip_set_phy_state:                ## @rockchip_set_phy_state
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%esi, %ebx
	callq	_phy_get_drvdata
	movq	%rax, %r15
	testl	%ebx, %ebx
	je	LBB0_3
## %bb.1:
	movl	(%r15), %edi
	movq	_GRF_SOC_CON12@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_GRF_EDP_PHY_SIDDQ_HIWORD_MASK@GOTPCREL(%rip), %rax
	movq	_GRF_EDP_PHY_SIDDQ_ON@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	orl	(%rax), %edx
	callq	_regmap_write
	testl	%eax, %eax
	js	LBB0_4
## %bb.2:
	movl	4(%r15), %edi
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_clk_prepare_enable             ## TAILCALL
LBB0_3:
	movl	4(%r15), %edi
	callq	_clk_disable_unprepare
	movl	(%r15), %edi
	movq	_GRF_SOC_CON12@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_GRF_EDP_PHY_SIDDQ_HIWORD_MASK@GOTPCREL(%rip), %rax
	movq	_GRF_EDP_PHY_SIDDQ_OFF@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	orl	(%rax), %edx
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_regmap_write                   ## TAILCALL
LBB0_4:
	movl	%eax, %r14d
	movl	8(%r15), %edi
	leaq	L_.str(%rip), %rsi
	movl	%eax, %edx
	callq	_dev_err
	movl	%r14d, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_GRF_SOC_CON12,4,2              ## @GRF_SOC_CON12
	.comm	_GRF_EDP_PHY_SIDDQ_HIWORD_MASK,4,2 ## @GRF_EDP_PHY_SIDDQ_HIWORD_MASK
	.comm	_GRF_EDP_PHY_SIDDQ_ON,4,2       ## @GRF_EDP_PHY_SIDDQ_ON
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"Can't enable PHY power %d\n"

	.comm	_GRF_EDP_PHY_SIDDQ_OFF,4,2      ## @GRF_EDP_PHY_SIDDQ_OFF
	.no_dead_strip	_rockchip_set_phy_state
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function rockchip_set_phy_state
_rockchip_set_phy_state:                ; @rockchip_set_phy_state
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x20, x1
	bl	_phy_get_drvdata
	mov	x19, x0
	cbz	w20, LBB0_3
; %bb.1:
	ldr	w0, [x19]
Lloh0:
	adrp	x8, _GRF_SOC_CON12@GOTPAGE
Lloh1:
	ldr	x8, [x8, _GRF_SOC_CON12@GOTPAGEOFF]
Lloh2:
	adrp	x9, _GRF_EDP_PHY_SIDDQ_HIWORD_MASK@GOTPAGE
Lloh3:
	ldr	x9, [x9, _GRF_EDP_PHY_SIDDQ_HIWORD_MASK@GOTPAGEOFF]
Lloh4:
	ldr	w1, [x8]
Lloh5:
	ldr	w8, [x9]
Lloh6:
	adrp	x9, _GRF_EDP_PHY_SIDDQ_ON@GOTPAGE
Lloh7:
	ldr	x9, [x9, _GRF_EDP_PHY_SIDDQ_ON@GOTPAGEOFF]
Lloh8:
	ldr	w9, [x9]
	orr	w2, w9, w8
	bl	_regmap_write
	tbnz	w0, #31, LBB0_4
; %bb.2:
	ldr	w0, [x19, #4]
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	b	_clk_prepare_enable
LBB0_3:
	ldr	w0, [x19, #4]
	bl	_clk_disable_unprepare
Lloh9:
	adrp	x8, _GRF_SOC_CON12@GOTPAGE
Lloh10:
	ldr	x8, [x8, _GRF_SOC_CON12@GOTPAGEOFF]
	ldr	w0, [x19]
Lloh11:
	ldr	w1, [x8]
Lloh12:
	adrp	x8, _GRF_EDP_PHY_SIDDQ_HIWORD_MASK@GOTPAGE
Lloh13:
	ldr	x8, [x8, _GRF_EDP_PHY_SIDDQ_HIWORD_MASK@GOTPAGEOFF]
Lloh14:
	adrp	x9, _GRF_EDP_PHY_SIDDQ_OFF@GOTPAGE
Lloh15:
	ldr	x9, [x9, _GRF_EDP_PHY_SIDDQ_OFF@GOTPAGEOFF]
Lloh16:
	ldr	w8, [x8]
Lloh17:
	ldr	w9, [x9]
	orr	w2, w9, w8
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	b	_regmap_write
LBB0_4:
	mov	x20, x0
	ldr	w0, [x19, #8]
Lloh18:
	adrp	x1, l_.str@PAGE
Lloh19:
	add	x1, x1, l_.str@PAGEOFF
	mov	x2, x20
	bl	_dev_err
	mov	x0, x20
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh4
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh17
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh16
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpAdd	Lloh18, Lloh19
	.cfi_endproc
                                        ; -- End function
	.comm	_GRF_SOC_CON12,4,2              ; @GRF_SOC_CON12
	.comm	_GRF_EDP_PHY_SIDDQ_HIWORD_MASK,4,2 ; @GRF_EDP_PHY_SIDDQ_HIWORD_MASK
	.comm	_GRF_EDP_PHY_SIDDQ_ON,4,2       ; @GRF_EDP_PHY_SIDDQ_ON
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"Can't enable PHY power %d\n"

	.comm	_GRF_EDP_PHY_SIDDQ_OFF,4,2      ; @GRF_EDP_PHY_SIDDQ_OFF
	.no_dead_strip	_rockchip_set_phy_state
.subsections_via_symbols
