	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function serdes_init_niu_10g_fiber
_serdes_init_niu_10g_fiber:             ## @serdes_init_niu_10g_fiber
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	_PLL_TX_CFG_ENTX@GOTPCREL(%rip), %rax
	movq	_PLL_TX_CFG_SWING_1375MV@GOTPCREL(%rip), %rcx
	movl	(%rcx), %r15d
	orl	(%rax), %r15d
	movq	_PLL_RX_CFG_ENRX@GOTPCREL(%rip), %rax
	movq	_PLL_RX_CFG_TERM_0P8VDDT@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ebx
	orl	(%rax), %ebx
	movq	_PLL_RX_CFG_ALIGN_ENA@GOTPCREL(%rip), %rax
	orl	(%rax), %ebx
	movq	_PLL_RX_CFG_LOS_LTHRESH@GOTPCREL(%rip), %rax
	orl	(%rax), %ebx
	movq	%rdi, %r14
	movq	_PLL_RX_CFG_EQ_LP_ADAPTIVE@GOTPCREL(%rip), %rax
	orl	(%rax), %ebx
	movq	8(%rdi), %rax
	movq	_LOOPBACK_PHY@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jne	LBB0_2
## %bb.1:
	movq	_PLL_TEST_CFG_LOOPBACK_CML_DIS@GOTPCREL(%rip), %rax
	movl	(%rax), %r8d
	movl	(%r14), %esi
	movq	_NIU_ESR2_DEV_ADDR@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	_ESR2_TI_PLL_TEST_CFG_L@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movq	%r14, %rdi
	callq	_mdio_write
	movq	_PLL_TX_CFG_ENTEST@GOTPCREL(%rip), %rax
	orl	(%rax), %r15d
	movq	_PLL_RX_CFG_ENTEST@GOTPCREL(%rip), %rax
	orl	(%rax), %ebx
LBB0_2:
	movq	%r14, %rdi
	xorl	%esi, %esi
	movl	%r15d, %edx
	callq	_esr2_set_tx_cfg
	testl	%eax, %eax
	jne	LBB0_9
## %bb.3:
	movl	$1, %esi
	movq	%r14, %rdi
	movl	%r15d, %edx
	callq	_esr2_set_tx_cfg
	testl	%eax, %eax
	jne	LBB0_9
## %bb.4:
	movl	$2, %esi
	movq	%r14, %rdi
	movl	%r15d, %edx
	callq	_esr2_set_tx_cfg
	testl	%eax, %eax
	jne	LBB0_9
## %bb.5:
	movl	$3, %esi
	movq	%r14, %rdi
	movl	%r15d, %edx
	callq	_esr2_set_tx_cfg
	testl	%eax, %eax
	jne	LBB0_9
## %bb.6:
	movq	%r14, %rdi
	xorl	%esi, %esi
	movl	%ebx, %edx
	callq	_esr2_set_rx_cfg
	testl	%eax, %eax
	jne	LBB0_9
## %bb.7:
	movl	$1, %esi
	movq	%r14, %rdi
	movl	%ebx, %edx
	callq	_esr2_set_rx_cfg
	testl	%eax, %eax
	jne	LBB0_9
## %bb.8:
	movl	$2, %esi
	movq	%r14, %rdi
	movl	%ebx, %edx
	callq	_esr2_set_rx_cfg
	testl	%eax, %eax
	je	LBB0_10
LBB0_9:
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_10:
	movl	$3, %esi
	movq	%r14, %rdi
	movl	%ebx, %edx
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_esr2_set_rx_cfg                ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_PLL_TX_CFG_ENTX,4,2            ## @PLL_TX_CFG_ENTX
	.comm	_PLL_TX_CFG_SWING_1375MV,4,2    ## @PLL_TX_CFG_SWING_1375MV
	.comm	_PLL_RX_CFG_ENRX,4,2            ## @PLL_RX_CFG_ENRX
	.comm	_PLL_RX_CFG_TERM_0P8VDDT,4,2    ## @PLL_RX_CFG_TERM_0P8VDDT
	.comm	_PLL_RX_CFG_ALIGN_ENA,4,2       ## @PLL_RX_CFG_ALIGN_ENA
	.comm	_PLL_RX_CFG_LOS_LTHRESH,4,2     ## @PLL_RX_CFG_LOS_LTHRESH
	.comm	_PLL_RX_CFG_EQ_LP_ADAPTIVE,4,2  ## @PLL_RX_CFG_EQ_LP_ADAPTIVE
	.comm	_LOOPBACK_PHY,8,3               ## @LOOPBACK_PHY
	.comm	_PLL_TEST_CFG_LOOPBACK_CML_DIS,4,2 ## @PLL_TEST_CFG_LOOPBACK_CML_DIS
	.comm	_NIU_ESR2_DEV_ADDR,4,2          ## @NIU_ESR2_DEV_ADDR
	.comm	_ESR2_TI_PLL_TEST_CFG_L,4,2     ## @ESR2_TI_PLL_TEST_CFG_L
	.comm	_PLL_TX_CFG_ENTEST,4,2          ## @PLL_TX_CFG_ENTEST
	.comm	_PLL_RX_CFG_ENTEST,4,2          ## @PLL_RX_CFG_ENTEST
	.no_dead_strip	_serdes_init_niu_10g_fiber
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function serdes_init_niu_10g_fiber
_serdes_init_niu_10g_fiber:             ; @serdes_init_niu_10g_fiber
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x0
Lloh0:
	adrp	x8, _PLL_TX_CFG_ENTX@GOTPAGE
Lloh1:
	ldr	x8, [x8, _PLL_TX_CFG_ENTX@GOTPAGEOFF]
Lloh2:
	ldr	w8, [x8]
Lloh3:
	adrp	x9, _PLL_TX_CFG_SWING_1375MV@GOTPAGE
Lloh4:
	ldr	x9, [x9, _PLL_TX_CFG_SWING_1375MV@GOTPAGEOFF]
Lloh5:
	ldr	w9, [x9]
	orr	w21, w9, w8
Lloh6:
	adrp	x8, _PLL_RX_CFG_ENRX@GOTPAGE
Lloh7:
	ldr	x8, [x8, _PLL_RX_CFG_ENRX@GOTPAGEOFF]
Lloh8:
	ldr	w8, [x8]
Lloh9:
	adrp	x9, _PLL_RX_CFG_TERM_0P8VDDT@GOTPAGE
Lloh10:
	ldr	x9, [x9, _PLL_RX_CFG_TERM_0P8VDDT@GOTPAGEOFF]
Lloh11:
	ldr	w9, [x9]
	orr	w8, w9, w8
Lloh12:
	adrp	x9, _PLL_RX_CFG_ALIGN_ENA@GOTPAGE
Lloh13:
	ldr	x9, [x9, _PLL_RX_CFG_ALIGN_ENA@GOTPAGEOFF]
Lloh14:
	ldr	w9, [x9]
Lloh15:
	adrp	x10, _PLL_RX_CFG_LOS_LTHRESH@GOTPAGE
Lloh16:
	ldr	x10, [x10, _PLL_RX_CFG_LOS_LTHRESH@GOTPAGEOFF]
	orr	w8, w8, w9
Lloh17:
	ldr	w9, [x10]
	orr	w8, w8, w9
Lloh18:
	adrp	x9, _PLL_RX_CFG_EQ_LP_ADAPTIVE@GOTPAGE
Lloh19:
	ldr	x9, [x9, _PLL_RX_CFG_EQ_LP_ADAPTIVE@GOTPAGEOFF]
Lloh20:
	ldr	w9, [x9]
	orr	w20, w8, w9
	ldr	x8, [x0, #8]
Lloh21:
	adrp	x9, _LOOPBACK_PHY@GOTPAGE
Lloh22:
	ldr	x9, [x9, _LOOPBACK_PHY@GOTPAGEOFF]
Lloh23:
	ldr	x9, [x9]
	cmp	x8, x9
	b.ne	LBB0_2
; %bb.1:
Lloh24:
	adrp	x8, _PLL_TEST_CFG_LOOPBACK_CML_DIS@GOTPAGE
Lloh25:
	ldr	x8, [x8, _PLL_TEST_CFG_LOOPBACK_CML_DIS@GOTPAGEOFF]
Lloh26:
	ldr	w4, [x8]
	ldr	w1, [x19]
Lloh27:
	adrp	x8, _NIU_ESR2_DEV_ADDR@GOTPAGE
Lloh28:
	ldr	x8, [x8, _NIU_ESR2_DEV_ADDR@GOTPAGEOFF]
Lloh29:
	ldr	w2, [x8]
Lloh30:
	adrp	x8, _ESR2_TI_PLL_TEST_CFG_L@GOTPAGE
Lloh31:
	ldr	x8, [x8, _ESR2_TI_PLL_TEST_CFG_L@GOTPAGEOFF]
Lloh32:
	ldr	w3, [x8]
	mov	x0, x19
	bl	_mdio_write
Lloh33:
	adrp	x8, _PLL_TX_CFG_ENTEST@GOTPAGE
Lloh34:
	ldr	x8, [x8, _PLL_TX_CFG_ENTEST@GOTPAGEOFF]
Lloh35:
	ldr	w8, [x8]
	orr	w21, w8, w21
Lloh36:
	adrp	x8, _PLL_RX_CFG_ENTEST@GOTPAGE
Lloh37:
	ldr	x8, [x8, _PLL_RX_CFG_ENTEST@GOTPAGEOFF]
Lloh38:
	ldr	w8, [x8]
	orr	w20, w8, w20
LBB0_2:
	mov	x0, x19
	mov	x1, #0
	mov	x2, x21
	bl	_esr2_set_tx_cfg
	cbnz	w0, LBB0_9
; %bb.3:
	mov	x0, x19
	mov	w1, #1
	mov	x2, x21
	bl	_esr2_set_tx_cfg
	cbnz	w0, LBB0_9
; %bb.4:
	mov	x0, x19
	mov	w1, #2
	mov	x2, x21
	bl	_esr2_set_tx_cfg
	cbnz	w0, LBB0_9
; %bb.5:
	mov	x0, x19
	mov	w1, #3
	mov	x2, x21
	bl	_esr2_set_tx_cfg
	cbnz	w0, LBB0_9
; %bb.6:
	mov	x0, x19
	mov	x1, #0
	mov	x2, x20
	bl	_esr2_set_rx_cfg
	cbnz	w0, LBB0_9
; %bb.7:
	mov	x0, x19
	mov	w1, #1
	mov	x2, x20
	bl	_esr2_set_rx_cfg
	cbnz	w0, LBB0_9
; %bb.8:
	mov	x0, x19
	mov	w1, #2
	mov	x2, x20
	bl	_esr2_set_rx_cfg
	cbz	w0, LBB0_10
LBB0_9:
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
LBB0_10:
	mov	x0, x19
	mov	w1, #3
	mov	x2, x20
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	_esr2_set_rx_cfg
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh36, Lloh37, Lloh38
	.loh AdrpLdrGotLdr	Lloh33, Lloh34, Lloh35
	.loh AdrpLdrGotLdr	Lloh30, Lloh31, Lloh32
	.loh AdrpLdrGotLdr	Lloh27, Lloh28, Lloh29
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.cfi_endproc
                                        ; -- End function
	.comm	_PLL_TX_CFG_ENTX,4,2            ; @PLL_TX_CFG_ENTX
	.comm	_PLL_TX_CFG_SWING_1375MV,4,2    ; @PLL_TX_CFG_SWING_1375MV
	.comm	_PLL_RX_CFG_ENRX,4,2            ; @PLL_RX_CFG_ENRX
	.comm	_PLL_RX_CFG_TERM_0P8VDDT,4,2    ; @PLL_RX_CFG_TERM_0P8VDDT
	.comm	_PLL_RX_CFG_ALIGN_ENA,4,2       ; @PLL_RX_CFG_ALIGN_ENA
	.comm	_PLL_RX_CFG_LOS_LTHRESH,4,2     ; @PLL_RX_CFG_LOS_LTHRESH
	.comm	_PLL_RX_CFG_EQ_LP_ADAPTIVE,4,2  ; @PLL_RX_CFG_EQ_LP_ADAPTIVE
	.comm	_LOOPBACK_PHY,8,3               ; @LOOPBACK_PHY
	.comm	_PLL_TEST_CFG_LOOPBACK_CML_DIS,4,2 ; @PLL_TEST_CFG_LOOPBACK_CML_DIS
	.comm	_NIU_ESR2_DEV_ADDR,4,2          ; @NIU_ESR2_DEV_ADDR
	.comm	_ESR2_TI_PLL_TEST_CFG_L,4,2     ; @ESR2_TI_PLL_TEST_CFG_L
	.comm	_PLL_TX_CFG_ENTEST,4,2          ; @PLL_TX_CFG_ENTEST
	.comm	_PLL_RX_CFG_ENTEST,4,2          ; @PLL_RX_CFG_ENTEST
	.no_dead_strip	_serdes_init_niu_10g_fiber
.subsections_via_symbols
