	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function brcms_c_compute_mimo_plcp
_brcms_c_compute_mimo_plcp:             ## @brcms_c_compute_mimo_plcp
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdx, %r12
	movl	%esi, %r15d
	movl	%edi, %r14d
	movq	_RSPEC_RATE_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	andl	%edi, %ebx
	movl	%ebx, (%rdx)
	callq	_rspec_is40mhz
	testq	%rax, %rax
	jne	LBB0_2
## %bb.1:
	cmpl	$32, %ebx
	jne	LBB0_3
LBB0_2:
	movq	_MIMO_PLCP_40MHZ@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	orl	%eax, (%r12)
LBB0_3:
	movq	%r12, %rdi
	movl	%r15d, %esi
	callq	_BRCMS_SET_MIMO_PLCP_LEN
	movl	%r14d, %edi
	callq	_rspec_mimoplcp3
	orl	$7, %eax
	movl	%eax, 12(%r12)
	movq	$0, 16(%r12)
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_RSPEC_RATE_MASK,4,2            ## @RSPEC_RATE_MASK
	.comm	_MIMO_PLCP_40MHZ,4,2            ## @MIMO_PLCP_40MHZ
	.no_dead_strip	_brcms_c_compute_mimo_plcp
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function brcms_c_compute_mimo_plcp
_brcms_c_compute_mimo_plcp:             ; @brcms_c_compute_mimo_plcp
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x2
	mov	x21, x1
	mov	x20, x0
Lloh0:
	adrp	x8, _RSPEC_RATE_MASK@GOTPAGE
Lloh1:
	ldr	x8, [x8, _RSPEC_RATE_MASK@GOTPAGEOFF]
Lloh2:
	ldr	w8, [x8]
	and	w22, w8, w0
	str	w22, [x2]
	bl	_rspec_is40mhz
	cbnz	x0, LBB0_2
; %bb.1:
	cmp	w22, #32
	b.ne	LBB0_3
LBB0_2:
Lloh3:
	adrp	x8, _MIMO_PLCP_40MHZ@GOTPAGE
Lloh4:
	ldr	x8, [x8, _MIMO_PLCP_40MHZ@GOTPAGEOFF]
Lloh5:
	ldr	w8, [x8]
	ldr	w9, [x19]
	orr	w8, w9, w8
	str	w8, [x19]
LBB0_3:
	mov	x0, x19
	mov	x1, x21
	bl	_BRCMS_SET_MIMO_PLCP_LEN
	mov	x0, x20
	bl	_rspec_mimoplcp3
	str	xzr, [x19, #16]
	orr	w8, w0, #0x7
	str	w8, [x19, #12]
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.cfi_endproc
                                        ; -- End function
	.comm	_RSPEC_RATE_MASK,4,2            ; @RSPEC_RATE_MASK
	.comm	_MIMO_PLCP_40MHZ,4,2            ; @MIMO_PLCP_40MHZ
	.no_dead_strip	_brcms_c_compute_mimo_plcp
.subsections_via_symbols
