	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function mlxsw_sp_port_lag_leave
_mlxsw_sp_port_lag_leave:               ## @mlxsw_sp_port_lag_leave
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	cmpq	$0, (%rdi)
	je	LBB0_4
## %bb.1:
	movq	%rsi, %r13
	movq	%rdi, %rbx
	movq	24(%rdi), %r12
	movl	16(%rdi), %r14d
	movq	%r12, %rdi
	movl	%r14d, %esi
	callq	_mlxsw_sp_lag_get
	movq	%rax, %r15
	xorl	%edi, %edi
	cmpl	$0, (%rax)
	sete	%dil
	callq	_WARN_ON
	movq	%rbx, %rdi
	movl	%r14d, %esi
	callq	_mlxsw_sp_lag_col_port_remove
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	_mlxsw_sp_port_vlan_flush
	movl	12(%rbx), %edi
	callq	_mlxsw_sp_port_vlan_cleanup
	movq	%rbx, %rdi
	movq	%r13, %rsi
	callq	_mlxsw_sp_port_lag_uppers_cleanup
	cmpl	$1, (%r15)
	jne	LBB0_3
## %bb.2:
	movq	%r12, %rdi
	movl	%r14d, %esi
	callq	_mlxsw_sp_lag_destroy
LBB0_3:
	movl	(%r12), %edi
	movl	8(%rbx), %edx
	movl	%r14d, %esi
	callq	_mlxsw_core_lag_mapping_clear
	movq	$0, (%rbx)
	decl	(%r15)
	movq	_MLXSW_SP_DEFAULT_VID@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_mlxsw_sp_port_pvid_set         ## TAILCALL
LBB0_4:
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_MLXSW_SP_DEFAULT_VID,4,2       ## @MLXSW_SP_DEFAULT_VID
	.no_dead_strip	_mlxsw_sp_port_lag_leave
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function mlxsw_sp_port_lag_leave
_mlxsw_sp_port_lag_leave:               ; @mlxsw_sp_port_lag_leave
	.cfi_startproc
; %bb.0:
	stp	x24, x23, [sp, #-64]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	ldr	x8, [x0]
	cbz	x8, LBB0_4
; %bb.1:
	mov	x23, x1
	mov	x19, x0
	ldr	x22, [x0, #24]
	ldr	w21, [x0, #16]
	mov	x0, x22
	mov	x1, x21
	bl	_mlxsw_sp_lag_get
	mov	x20, x0
	ldr	w8, [x0]
	cmp	w8, #0
	cset	w0, eq
	bl	_WARN_ON
	mov	x0, x19
	mov	x1, x21
	bl	_mlxsw_sp_lag_col_port_remove
	mov	x0, x19
	mov	w1, #0
	bl	_mlxsw_sp_port_vlan_flush
	ldr	w0, [x19, #12]
	bl	_mlxsw_sp_port_vlan_cleanup
	mov	x0, x19
	mov	x1, x23
	bl	_mlxsw_sp_port_lag_uppers_cleanup
	ldr	w8, [x20]
	cmp	w8, #1
	b.ne	LBB0_3
; %bb.2:
	mov	x0, x22
	mov	x1, x21
	bl	_mlxsw_sp_lag_destroy
LBB0_3:
	ldr	w0, [x22]
	ldr	w2, [x19, #8]
	mov	x1, x21
	bl	_mlxsw_core_lag_mapping_clear
	str	xzr, [x19]
	ldr	w8, [x20]
	sub	w8, w8, #1
	str	w8, [x20]
Lloh0:
	adrp	x8, _MLXSW_SP_DEFAULT_VID@GOTPAGE
Lloh1:
	ldr	x8, [x8, _MLXSW_SP_DEFAULT_VID@GOTPAGEOFF]
Lloh2:
	ldr	w1, [x8]
	mov	x0, x19
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	b	_mlxsw_sp_port_pvid_set
LBB0_4:
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_MLXSW_SP_DEFAULT_VID,4,2       ; @MLXSW_SP_DEFAULT_VID
	.no_dead_strip	_mlxsw_sp_port_lag_leave
.subsections_via_symbols
