	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function rt2500pci_init_queues
_rt2500pci_init_queues:                 ## @rt2500pci_init_queues
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	subq	$16, %rsp
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %rbx
	movq	_TXCSR2@GOTPCREL(%rip), %r15
	movl	(%r15), %esi
	callq	_rt2x00mmio_register_read
	movl	%eax, -36(%rbp)
	movq	_TXCSR2_TXD_SIZE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	24(%rbx), %rax
	movl	12(%rax), %edx
	leaq	-36(%rbp), %r14
	movq	%r14, %rdi
	callq	_rt2x00_set_field32
	movq	_TXCSR2_NUM_TXD@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	24(%rbx), %rax
	movl	24(%rax), %edx
	movq	%r14, %rdi
	callq	_rt2x00_set_field32
	movq	_TXCSR2_NUM_ATIM@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	16(%rbx), %rax
	movl	8(%rax), %edx
	movq	%r14, %rdi
	callq	_rt2x00_set_field32
	movq	_TXCSR2_NUM_PRIO@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	24(%rbx), %rax
	movl	8(%rax), %edx
	movq	%r14, %rdi
	callq	_rt2x00_set_field32
	movl	(%r15), %esi
	movl	-36(%rbp), %edx
	movq	%rbx, %rdi
	callq	_rt2x00mmio_register_write
	movq	24(%rbx), %rax
	movq	16(%rax), %rax
	movq	(%rax), %r15
	movq	_TXCSR3@GOTPCREL(%rip), %r12
	movl	(%r12), %esi
	movq	%rbx, %rdi
	callq	_rt2x00mmio_register_read
	movl	%eax, -36(%rbp)
	movq	_TXCSR3_TX_RING_REGISTER@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	(%r15), %edx
	movq	%r14, %rdi
	callq	_rt2x00_set_field32
	movl	(%r12), %esi
	movl	-36(%rbp), %edx
	movq	%rbx, %rdi
	callq	_rt2x00mmio_register_write
	movq	24(%rbx), %rax
	movq	(%rax), %rax
	movq	(%rax), %r15
	movq	_TXCSR5@GOTPCREL(%rip), %r12
	movl	(%r12), %esi
	movq	%rbx, %rdi
	callq	_rt2x00mmio_register_read
	movl	%eax, -36(%rbp)
	movq	_TXCSR5_PRIO_RING_REGISTER@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	(%r15), %edx
	movq	%r14, %rdi
	callq	_rt2x00_set_field32
	movl	(%r12), %esi
	movl	-36(%rbp), %edx
	movq	%rbx, %rdi
	callq	_rt2x00mmio_register_write
	movq	16(%rbx), %rax
	movq	(%rax), %rax
	movq	(%rax), %r15
	movq	_TXCSR4@GOTPCREL(%rip), %r12
	movl	(%r12), %esi
	movq	%rbx, %rdi
	callq	_rt2x00mmio_register_read
	movl	%eax, -36(%rbp)
	movq	_TXCSR4_ATIM_RING_REGISTER@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	(%r15), %edx
	movq	%r14, %rdi
	callq	_rt2x00_set_field32
	movl	(%r12), %esi
	movl	-36(%rbp), %edx
	movq	%rbx, %rdi
	callq	_rt2x00mmio_register_write
	movq	8(%rbx), %rax
	movq	(%rax), %rax
	movq	(%rax), %r15
	movq	_TXCSR6@GOTPCREL(%rip), %r12
	movl	(%r12), %esi
	movq	%rbx, %rdi
	callq	_rt2x00mmio_register_read
	movl	%eax, -36(%rbp)
	movq	_TXCSR6_BEACON_RING_REGISTER@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	(%r15), %edx
	movq	%r14, %rdi
	callq	_rt2x00_set_field32
	movl	(%r12), %esi
	movl	-36(%rbp), %edx
	movq	%rbx, %rdi
	callq	_rt2x00mmio_register_write
	movq	_RXCSR1@GOTPCREL(%rip), %r15
	movl	(%r15), %esi
	movq	%rbx, %rdi
	callq	_rt2x00mmio_register_read
	movl	%eax, -36(%rbp)
	movq	_RXCSR1_RXD_SIZE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	(%rbx), %rax
	movl	12(%rax), %edx
	movq	%r14, %rdi
	callq	_rt2x00_set_field32
	movq	_RXCSR1_NUM_RXD@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	(%rbx), %rax
	movl	8(%rax), %edx
	movq	%r14, %rdi
	callq	_rt2x00_set_field32
	movl	(%r15), %esi
	movl	-36(%rbp), %edx
	movq	%rbx, %rdi
	callq	_rt2x00mmio_register_write
	movq	(%rbx), %rax
	movq	(%rax), %rax
	movq	(%rax), %r15
	movq	_RXCSR2@GOTPCREL(%rip), %r12
	movl	(%r12), %esi
	movq	%rbx, %rdi
	callq	_rt2x00mmio_register_read
	movl	%eax, -36(%rbp)
	movq	_RXCSR2_RX_RING_REGISTER@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	(%r15), %edx
	movq	%r14, %rdi
	callq	_rt2x00_set_field32
	movl	(%r12), %esi
	movl	-36(%rbp), %edx
	movq	%rbx, %rdi
	callq	_rt2x00mmio_register_write
	xorl	%eax, %eax
	addq	$16, %rsp
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_TXCSR2,4,2                     ## @TXCSR2
	.comm	_TXCSR2_TXD_SIZE,4,2            ## @TXCSR2_TXD_SIZE
	.comm	_TXCSR2_NUM_TXD,4,2             ## @TXCSR2_NUM_TXD
	.comm	_TXCSR2_NUM_ATIM,4,2            ## @TXCSR2_NUM_ATIM
	.comm	_TXCSR2_NUM_PRIO,4,2            ## @TXCSR2_NUM_PRIO
	.comm	_TXCSR3,4,2                     ## @TXCSR3
	.comm	_TXCSR3_TX_RING_REGISTER,4,2    ## @TXCSR3_TX_RING_REGISTER
	.comm	_TXCSR5,4,2                     ## @TXCSR5
	.comm	_TXCSR5_PRIO_RING_REGISTER,4,2  ## @TXCSR5_PRIO_RING_REGISTER
	.comm	_TXCSR4,4,2                     ## @TXCSR4
	.comm	_TXCSR4_ATIM_RING_REGISTER,4,2  ## @TXCSR4_ATIM_RING_REGISTER
	.comm	_TXCSR6,4,2                     ## @TXCSR6
	.comm	_TXCSR6_BEACON_RING_REGISTER,4,2 ## @TXCSR6_BEACON_RING_REGISTER
	.comm	_RXCSR1,4,2                     ## @RXCSR1
	.comm	_RXCSR1_RXD_SIZE,4,2            ## @RXCSR1_RXD_SIZE
	.comm	_RXCSR1_NUM_RXD,4,2             ## @RXCSR1_NUM_RXD
	.comm	_RXCSR2,4,2                     ## @RXCSR2
	.comm	_RXCSR2_RX_RING_REGISTER,4,2    ## @RXCSR2_RX_RING_REGISTER
	.no_dead_strip	_rt2500pci_init_queues
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function rt2500pci_init_queues
_rt2500pci_init_queues:                 ; @rt2500pci_init_queues
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #64
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x0
Lloh0:
	adrp	x20, _TXCSR2@GOTPAGE
Lloh1:
	ldr	x20, [x20, _TXCSR2@GOTPAGEOFF]
	ldr	w1, [x20]
	bl	_rt2x00mmio_register_read
	str	w0, [sp, #12]
Lloh2:
	adrp	x8, _TXCSR2_TXD_SIZE@GOTPAGE
Lloh3:
	ldr	x8, [x8, _TXCSR2_TXD_SIZE@GOTPAGEOFF]
Lloh4:
	ldr	w1, [x8]
	ldr	x8, [x19, #24]
	ldr	w2, [x8, #12]
	add	x0, sp, #12
	bl	_rt2x00_set_field32
Lloh5:
	adrp	x8, _TXCSR2_NUM_TXD@GOTPAGE
Lloh6:
	ldr	x8, [x8, _TXCSR2_NUM_TXD@GOTPAGEOFF]
Lloh7:
	ldr	w1, [x8]
	ldr	x8, [x19, #24]
	ldr	w2, [x8, #24]
	add	x0, sp, #12
	bl	_rt2x00_set_field32
Lloh8:
	adrp	x8, _TXCSR2_NUM_ATIM@GOTPAGE
Lloh9:
	ldr	x8, [x8, _TXCSR2_NUM_ATIM@GOTPAGEOFF]
Lloh10:
	ldr	w1, [x8]
	ldr	x8, [x19, #16]
	ldr	w2, [x8, #8]
	add	x0, sp, #12
	bl	_rt2x00_set_field32
Lloh11:
	adrp	x8, _TXCSR2_NUM_PRIO@GOTPAGE
Lloh12:
	ldr	x8, [x8, _TXCSR2_NUM_PRIO@GOTPAGEOFF]
Lloh13:
	ldr	w1, [x8]
	ldr	x8, [x19, #24]
	ldr	w2, [x8, #8]
	add	x0, sp, #12
	bl	_rt2x00_set_field32
	ldr	w1, [x20]
	ldr	w2, [sp, #12]
	mov	x0, x19
	bl	_rt2x00mmio_register_write
	ldr	x8, [x19, #24]
	ldr	x8, [x8, #16]
	ldr	x20, [x8]
Lloh14:
	adrp	x21, _TXCSR3@GOTPAGE
Lloh15:
	ldr	x21, [x21, _TXCSR3@GOTPAGEOFF]
	ldr	w1, [x21]
	mov	x0, x19
	bl	_rt2x00mmio_register_read
	str	w0, [sp, #12]
Lloh16:
	adrp	x8, _TXCSR3_TX_RING_REGISTER@GOTPAGE
Lloh17:
	ldr	x8, [x8, _TXCSR3_TX_RING_REGISTER@GOTPAGEOFF]
Lloh18:
	ldr	w1, [x8]
	ldr	w2, [x20]
	add	x0, sp, #12
	bl	_rt2x00_set_field32
	ldr	w1, [x21]
	ldr	w2, [sp, #12]
	mov	x0, x19
	bl	_rt2x00mmio_register_write
	ldr	x8, [x19, #24]
	ldr	x8, [x8]
	ldr	x20, [x8]
Lloh19:
	adrp	x21, _TXCSR5@GOTPAGE
Lloh20:
	ldr	x21, [x21, _TXCSR5@GOTPAGEOFF]
	ldr	w1, [x21]
	mov	x0, x19
	bl	_rt2x00mmio_register_read
	str	w0, [sp, #12]
Lloh21:
	adrp	x8, _TXCSR5_PRIO_RING_REGISTER@GOTPAGE
Lloh22:
	ldr	x8, [x8, _TXCSR5_PRIO_RING_REGISTER@GOTPAGEOFF]
Lloh23:
	ldr	w1, [x8]
	ldr	w2, [x20]
	add	x0, sp, #12
	bl	_rt2x00_set_field32
	ldr	w1, [x21]
	ldr	w2, [sp, #12]
	mov	x0, x19
	bl	_rt2x00mmio_register_write
	ldr	x8, [x19, #16]
	ldr	x8, [x8]
	ldr	x20, [x8]
Lloh24:
	adrp	x21, _TXCSR4@GOTPAGE
Lloh25:
	ldr	x21, [x21, _TXCSR4@GOTPAGEOFF]
	ldr	w1, [x21]
	mov	x0, x19
	bl	_rt2x00mmio_register_read
	str	w0, [sp, #12]
Lloh26:
	adrp	x8, _TXCSR4_ATIM_RING_REGISTER@GOTPAGE
Lloh27:
	ldr	x8, [x8, _TXCSR4_ATIM_RING_REGISTER@GOTPAGEOFF]
Lloh28:
	ldr	w1, [x8]
	ldr	w2, [x20]
	add	x0, sp, #12
	bl	_rt2x00_set_field32
	ldr	w1, [x21]
	ldr	w2, [sp, #12]
	mov	x0, x19
	bl	_rt2x00mmio_register_write
	ldr	x8, [x19, #8]
	ldr	x8, [x8]
	ldr	x20, [x8]
Lloh29:
	adrp	x21, _TXCSR6@GOTPAGE
Lloh30:
	ldr	x21, [x21, _TXCSR6@GOTPAGEOFF]
	ldr	w1, [x21]
	mov	x0, x19
	bl	_rt2x00mmio_register_read
	str	w0, [sp, #12]
Lloh31:
	adrp	x8, _TXCSR6_BEACON_RING_REGISTER@GOTPAGE
Lloh32:
	ldr	x8, [x8, _TXCSR6_BEACON_RING_REGISTER@GOTPAGEOFF]
Lloh33:
	ldr	w1, [x8]
	ldr	w2, [x20]
	add	x0, sp, #12
	bl	_rt2x00_set_field32
	ldr	w1, [x21]
	ldr	w2, [sp, #12]
	mov	x0, x19
	bl	_rt2x00mmio_register_write
Lloh34:
	adrp	x20, _RXCSR1@GOTPAGE
Lloh35:
	ldr	x20, [x20, _RXCSR1@GOTPAGEOFF]
	ldr	w1, [x20]
	mov	x0, x19
	bl	_rt2x00mmio_register_read
	str	w0, [sp, #12]
Lloh36:
	adrp	x8, _RXCSR1_RXD_SIZE@GOTPAGE
Lloh37:
	ldr	x8, [x8, _RXCSR1_RXD_SIZE@GOTPAGEOFF]
Lloh38:
	ldr	w1, [x8]
	ldr	x8, [x19]
	ldr	w2, [x8, #12]
	add	x0, sp, #12
	bl	_rt2x00_set_field32
Lloh39:
	adrp	x8, _RXCSR1_NUM_RXD@GOTPAGE
Lloh40:
	ldr	x8, [x8, _RXCSR1_NUM_RXD@GOTPAGEOFF]
Lloh41:
	ldr	w1, [x8]
	ldr	x8, [x19]
	ldr	w2, [x8, #8]
	add	x0, sp, #12
	bl	_rt2x00_set_field32
	ldr	w1, [x20]
	ldr	w2, [sp, #12]
	mov	x0, x19
	bl	_rt2x00mmio_register_write
	ldr	x8, [x19]
	ldr	x8, [x8]
	ldr	x20, [x8]
Lloh42:
	adrp	x21, _RXCSR2@GOTPAGE
Lloh43:
	ldr	x21, [x21, _RXCSR2@GOTPAGEOFF]
	ldr	w1, [x21]
	mov	x0, x19
	bl	_rt2x00mmio_register_read
	str	w0, [sp, #12]
Lloh44:
	adrp	x8, _RXCSR2_RX_RING_REGISTER@GOTPAGE
Lloh45:
	ldr	x8, [x8, _RXCSR2_RX_RING_REGISTER@GOTPAGEOFF]
Lloh46:
	ldr	w1, [x8]
	ldr	w2, [x20]
	add	x0, sp, #12
	bl	_rt2x00_set_field32
	ldr	w1, [x21]
	ldr	w2, [sp, #12]
	mov	x0, x19
	bl	_rt2x00mmio_register_write
	mov	w0, #0
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #64
	ret
	.loh AdrpLdrGotLdr	Lloh44, Lloh45, Lloh46
	.loh AdrpLdrGot	Lloh42, Lloh43
	.loh AdrpLdrGotLdr	Lloh39, Lloh40, Lloh41
	.loh AdrpLdrGotLdr	Lloh36, Lloh37, Lloh38
	.loh AdrpLdrGot	Lloh34, Lloh35
	.loh AdrpLdrGotLdr	Lloh31, Lloh32, Lloh33
	.loh AdrpLdrGot	Lloh29, Lloh30
	.loh AdrpLdrGotLdr	Lloh26, Lloh27, Lloh28
	.loh AdrpLdrGot	Lloh24, Lloh25
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGot	Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh16, Lloh17, Lloh18
	.loh AdrpLdrGot	Lloh14, Lloh15
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGot	Lloh0, Lloh1
	.cfi_endproc
                                        ; -- End function
	.comm	_TXCSR2,4,2                     ; @TXCSR2
	.comm	_TXCSR2_TXD_SIZE,4,2            ; @TXCSR2_TXD_SIZE
	.comm	_TXCSR2_NUM_TXD,4,2             ; @TXCSR2_NUM_TXD
	.comm	_TXCSR2_NUM_ATIM,4,2            ; @TXCSR2_NUM_ATIM
	.comm	_TXCSR2_NUM_PRIO,4,2            ; @TXCSR2_NUM_PRIO
	.comm	_TXCSR3,4,2                     ; @TXCSR3
	.comm	_TXCSR3_TX_RING_REGISTER,4,2    ; @TXCSR3_TX_RING_REGISTER
	.comm	_TXCSR5,4,2                     ; @TXCSR5
	.comm	_TXCSR5_PRIO_RING_REGISTER,4,2  ; @TXCSR5_PRIO_RING_REGISTER
	.comm	_TXCSR4,4,2                     ; @TXCSR4
	.comm	_TXCSR4_ATIM_RING_REGISTER,4,2  ; @TXCSR4_ATIM_RING_REGISTER
	.comm	_TXCSR6,4,2                     ; @TXCSR6
	.comm	_TXCSR6_BEACON_RING_REGISTER,4,2 ; @TXCSR6_BEACON_RING_REGISTER
	.comm	_RXCSR1,4,2                     ; @RXCSR1
	.comm	_RXCSR1_RXD_SIZE,4,2            ; @RXCSR1_RXD_SIZE
	.comm	_RXCSR1_NUM_RXD,4,2             ; @RXCSR1_NUM_RXD
	.comm	_RXCSR2,4,2                     ; @RXCSR2
	.comm	_RXCSR2_RX_RING_REGISTER,4,2    ; @RXCSR2_RX_RING_REGISTER
	.no_dead_strip	_rt2500pci_init_queues
.subsections_via_symbols
