	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_ath5k_hw_set_imr               ## -- Begin function ath5k_hw_set_imr
	.p2align	4, 0x90
_ath5k_hw_set_imr:                      ## @ath5k_hw_set_imr
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%esi, %r12d
	movq	%rdi, %r15
	movl	(%rdi), %eax
	movq	_AR5K_INT_GLOBAL@GOTPCREL(%rip), %rcx
	movl	%eax, -44(%rbp)                 ## 4-byte Spill
	testl	%eax, (%rcx)
	je	LBB0_2
## %bb.1:
	movq	_AR5K_IER_DISABLE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_AR5K_IER@GOTPCREL(%rip), %rbx
	movl	(%rbx), %edx
	movq	%r15, %rdi
	callq	_ath5k_hw_reg_write
	movl	(%rbx), %esi
	movq	%r15, %rdi
	callq	_ath5k_hw_reg_read
LBB0_2:
	movq	_AR5K_INT_COMMON@GOTPCREL(%rip), %rax
	movl	(%rax), %r14d
	andl	%r12d, %r14d
	movq	8(%r15), %rax
	movq	_AR5K_AR5210@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jne	LBB0_3
## %bb.14:
	movq	_AR5K_INT_FATAL@GOTPCREL(%rip), %rax
	movq	_AR5K_IMR@GOTPCREL(%rip), %r13
	testl	%r12d, (%rax)
	je	LBB0_16
## %bb.15:
	movq	_AR5K_IMR_SSERR@GOTPCREL(%rip), %rax
	movq	_AR5K_IMR_MCABT@GOTPCREL(%rip), %rcx
	movq	_AR5K_IMR_HIUERR@GOTPCREL(%rip), %rdx
	movq	_AR5K_IMR_DPERR@GOTPCREL(%rip), %rsi
	orl	(%rax), %r14d
	orl	(%rcx), %r14d
	orl	(%rdx), %r14d
	orl	(%rsi), %r14d
	jmp	LBB0_16
LBB0_3:
	movq	_AR5K_SIMR2@GOTPCREL(%rip), %r13
	movl	(%r13), %esi
	movq	%r15, %rdi
	callq	_ath5k_hw_reg_read
	movq	_AR5K_SIMR2_QCU_TXURN@GOTPCREL(%rip), %rcx
	andl	(%rcx), %eax
	movq	_AR5K_INT_FATAL@GOTPCREL(%rip), %rcx
	testl	%r12d, (%rcx)
	je	LBB0_5
## %bb.4:
	movq	_AR5K_IMR_HIUERR@GOTPCREL(%rip), %rcx
	orl	(%rcx), %r14d
	movq	_AR5K_SIMR2_MCABT@GOTPCREL(%rip), %rcx
	movq	_AR5K_SIMR2_SSERR@GOTPCREL(%rip), %rdx
	movq	_AR5K_SIMR2_DPERR@GOTPCREL(%rip), %rsi
	orl	(%rcx), %eax
	orl	(%rdx), %eax
	orl	(%rsi), %eax
LBB0_5:
	movq	_AR5K_INT_TIM@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ebx
	andl	%r12d, %ebx
	movq	_AR5K_IMR_TIM@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	cmovel	%ebx, %esi
	movq	_AR5K_SISR2_TIM@GOTPCREL(%rip), %rcx
	cmovnel	(%rcx), %ebx
	movq	_AR5K_INT_DTIM@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	andl	%r12d, %ecx
	je	LBB0_7
## %bb.6:
	movq	_AR5K_SISR2_DTIM@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
LBB0_7:
	movq	_AR5K_INT_DTIM_SYNC@GOTPCREL(%rip), %rdx
	movl	(%rdx), %edx
	andl	%r12d, %edx
	je	LBB0_9
## %bb.8:
	movq	_AR5K_SISR2_DTIM_SYNC@GOTPCREL(%rip), %rdx
	movl	(%rdx), %edx
LBB0_9:
	orl	%edx, %ecx
	orl	%eax, %ebx
	movq	_AR5K_INT_BCN_TIMEOUT@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	andl	%r12d, %eax
	je	LBB0_11
## %bb.10:
	movq	_AR5K_SISR2_BCN_TIMEOUT@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
LBB0_11:
	orl	%ecx, %ebx
	movq	_AR5K_INT_CAB_TIMEOUT@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	andl	%r12d, %ecx
	je	LBB0_13
## %bb.12:
	movq	_AR5K_SISR2_CAB_TIMEOUT@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
LBB0_13:
	orl	%ecx, %eax
	orl	%eax, %ebx
	movq	_AR5K_INT_BNR@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, %ecx
	andl	%r12d, %ecx
	cmovnel	%eax, %ecx
	orl	%ecx, %r14d
	orl	%r14d, %esi
	movq	_AR5K_PIMR@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r15, %rdi
	callq	_ath5k_hw_reg_write
	movl	%ebx, %r14d
LBB0_16:
	movl	(%r13), %edx
	movq	%r15, %rdi
	movl	%r14d, %esi
	callq	_ath5k_hw_reg_write
	movq	_AR5K_INT_RXNOFRM@GOTPCREL(%rip), %rax
	testl	%r12d, (%rax)
	jne	LBB0_18
## %bb.17:
	movq	_AR5K_RXNOFRM@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r15, %rdi
	xorl	%esi, %esi
	callq	_ath5k_hw_reg_write
LBB0_18:
	movl	%r12d, (%r15)
	movq	_AR5K_INT_GLOBAL@GOTPCREL(%rip), %rax
	testl	%r12d, (%rax)
	je	LBB0_20
## %bb.19:
	movq	_AR5K_IER_ENABLE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_AR5K_IER@GOTPCREL(%rip), %rbx
	movl	(%rbx), %edx
	movq	%r15, %rdi
	callq	_ath5k_hw_reg_write
	movl	(%rbx), %esi
	movq	%r15, %rdi
	callq	_ath5k_hw_reg_read
LBB0_20:
	movl	-44(%rbp), %eax                 ## 4-byte Reload
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_AR5K_INT_GLOBAL,4,2            ## @AR5K_INT_GLOBAL
	.comm	_AR5K_IER_DISABLE,4,2           ## @AR5K_IER_DISABLE
	.comm	_AR5K_IER,4,2                   ## @AR5K_IER
	.comm	_AR5K_INT_COMMON,4,2            ## @AR5K_INT_COMMON
	.comm	_AR5K_AR5210,8,3                ## @AR5K_AR5210
	.comm	_AR5K_SIMR2,4,2                 ## @AR5K_SIMR2
	.comm	_AR5K_SIMR2_QCU_TXURN,4,2       ## @AR5K_SIMR2_QCU_TXURN
	.comm	_AR5K_INT_FATAL,4,2             ## @AR5K_INT_FATAL
	.comm	_AR5K_IMR_HIUERR,4,2            ## @AR5K_IMR_HIUERR
	.comm	_AR5K_SIMR2_MCABT,4,2           ## @AR5K_SIMR2_MCABT
	.comm	_AR5K_SIMR2_SSERR,4,2           ## @AR5K_SIMR2_SSERR
	.comm	_AR5K_SIMR2_DPERR,4,2           ## @AR5K_SIMR2_DPERR
	.comm	_AR5K_INT_TIM,4,2               ## @AR5K_INT_TIM
	.comm	_AR5K_IMR_TIM,4,2               ## @AR5K_IMR_TIM
	.comm	_AR5K_SISR2_TIM,4,2             ## @AR5K_SISR2_TIM
	.comm	_AR5K_INT_DTIM,4,2              ## @AR5K_INT_DTIM
	.comm	_AR5K_SISR2_DTIM,4,2            ## @AR5K_SISR2_DTIM
	.comm	_AR5K_INT_DTIM_SYNC,4,2         ## @AR5K_INT_DTIM_SYNC
	.comm	_AR5K_SISR2_DTIM_SYNC,4,2       ## @AR5K_SISR2_DTIM_SYNC
	.comm	_AR5K_INT_BCN_TIMEOUT,4,2       ## @AR5K_INT_BCN_TIMEOUT
	.comm	_AR5K_SISR2_BCN_TIMEOUT,4,2     ## @AR5K_SISR2_BCN_TIMEOUT
	.comm	_AR5K_INT_CAB_TIMEOUT,4,2       ## @AR5K_INT_CAB_TIMEOUT
	.comm	_AR5K_SISR2_CAB_TIMEOUT,4,2     ## @AR5K_SISR2_CAB_TIMEOUT
	.comm	_AR5K_INT_BNR,4,2               ## @AR5K_INT_BNR
	.comm	_AR5K_PIMR,4,2                  ## @AR5K_PIMR
	.comm	_AR5K_IMR_SSERR,4,2             ## @AR5K_IMR_SSERR
	.comm	_AR5K_IMR_MCABT,4,2             ## @AR5K_IMR_MCABT
	.comm	_AR5K_IMR_DPERR,4,2             ## @AR5K_IMR_DPERR
	.comm	_AR5K_IMR,4,2                   ## @AR5K_IMR
	.comm	_AR5K_INT_RXNOFRM,4,2           ## @AR5K_INT_RXNOFRM
	.comm	_AR5K_RXNOFRM,4,2               ## @AR5K_RXNOFRM
	.comm	_AR5K_IER_ENABLE,4,2            ## @AR5K_IER_ENABLE
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_ath5k_hw_set_imr               ; -- Begin function ath5k_hw_set_imr
	.p2align	2
_ath5k_hw_set_imr:                      ; @ath5k_hw_set_imr
	.cfi_startproc
; %bb.0:
	stp	x24, x23, [sp, #-64]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x21, x1
	mov	x20, x0
	ldr	w19, [x0]
Lloh0:
	adrp	x24, _AR5K_INT_GLOBAL@GOTPAGE
Lloh1:
	ldr	x24, [x24, _AR5K_INT_GLOBAL@GOTPAGEOFF]
	ldr	w8, [x24]
Lloh2:
	adrp	x23, _AR5K_IER@GOTPAGE
Lloh3:
	ldr	x23, [x23, _AR5K_IER@GOTPAGEOFF]
	tst	w8, w19
	b.eq	LBB0_2
; %bb.1:
Lloh4:
	adrp	x8, _AR5K_IER_DISABLE@GOTPAGE
Lloh5:
	ldr	x8, [x8, _AR5K_IER_DISABLE@GOTPAGEOFF]
Lloh6:
	ldr	w1, [x8]
	ldr	w2, [x23]
	mov	x0, x20
	bl	_ath5k_hw_reg_write
	ldr	w1, [x23]
	mov	x0, x20
	bl	_ath5k_hw_reg_read
LBB0_2:
Lloh7:
	adrp	x8, _AR5K_INT_COMMON@GOTPAGE
Lloh8:
	ldr	x8, [x8, _AR5K_INT_COMMON@GOTPAGEOFF]
Lloh9:
	ldr	w8, [x8]
	and	w22, w8, w21
	ldr	x8, [x20, #8]
Lloh10:
	adrp	x9, _AR5K_AR5210@GOTPAGE
Lloh11:
	ldr	x9, [x9, _AR5K_AR5210@GOTPAGEOFF]
Lloh12:
	ldr	x9, [x9]
	cmp	x8, x9
	b.ne	LBB0_6
; %bb.3:
Lloh13:
	adrp	x8, _AR5K_INT_FATAL@GOTPAGE
Lloh14:
	ldr	x8, [x8, _AR5K_INT_FATAL@GOTPAGEOFF]
Lloh15:
	ldr	w8, [x8]
	tst	w8, w21
	b.eq	LBB0_5
; %bb.4:
Lloh16:
	adrp	x8, _AR5K_IMR_SSERR@GOTPAGE
Lloh17:
	ldr	x8, [x8, _AR5K_IMR_SSERR@GOTPAGEOFF]
Lloh18:
	ldr	w8, [x8]
Lloh19:
	adrp	x9, _AR5K_IMR_MCABT@GOTPAGE
Lloh20:
	ldr	x9, [x9, _AR5K_IMR_MCABT@GOTPAGEOFF]
Lloh21:
	ldr	w9, [x9]
Lloh22:
	adrp	x10, _AR5K_IMR_HIUERR@GOTPAGE
Lloh23:
	ldr	x10, [x10, _AR5K_IMR_HIUERR@GOTPAGEOFF]
Lloh24:
	ldr	w10, [x10]
Lloh25:
	adrp	x11, _AR5K_IMR_DPERR@GOTPAGE
Lloh26:
	ldr	x11, [x11, _AR5K_IMR_DPERR@GOTPAGEOFF]
Lloh27:
	ldr	w11, [x11]
	orr	w8, w8, w22
	orr	w8, w8, w9
	orr	w8, w8, w10
	orr	w22, w8, w11
LBB0_5:
Lloh28:
	adrp	x8, _AR5K_IMR@GOTPAGE
Lloh29:
	ldr	x8, [x8, _AR5K_IMR@GOTPAGEOFF]
	b	LBB0_9
LBB0_6:
Lloh30:
	adrp	x8, _AR5K_SIMR2@GOTPAGE
Lloh31:
	ldr	x8, [x8, _AR5K_SIMR2@GOTPAGEOFF]
Lloh32:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_ath5k_hw_reg_read
Lloh33:
	adrp	x8, _AR5K_SIMR2_QCU_TXURN@GOTPAGE
Lloh34:
	ldr	x8, [x8, _AR5K_SIMR2_QCU_TXURN@GOTPAGEOFF]
Lloh35:
	ldr	w8, [x8]
	and	w8, w8, w0
Lloh36:
	adrp	x9, _AR5K_INT_FATAL@GOTPAGE
Lloh37:
	ldr	x9, [x9, _AR5K_INT_FATAL@GOTPAGEOFF]
Lloh38:
	ldr	w9, [x9]
	tst	w9, w21
	b.eq	LBB0_8
; %bb.7:
Lloh39:
	adrp	x9, _AR5K_IMR_HIUERR@GOTPAGE
Lloh40:
	ldr	x9, [x9, _AR5K_IMR_HIUERR@GOTPAGEOFF]
Lloh41:
	ldr	w9, [x9]
	orr	w22, w9, w22
Lloh42:
	adrp	x9, _AR5K_SIMR2_MCABT@GOTPAGE
Lloh43:
	ldr	x9, [x9, _AR5K_SIMR2_MCABT@GOTPAGEOFF]
Lloh44:
	ldr	w9, [x9]
Lloh45:
	adrp	x10, _AR5K_SIMR2_SSERR@GOTPAGE
Lloh46:
	ldr	x10, [x10, _AR5K_SIMR2_SSERR@GOTPAGEOFF]
Lloh47:
	ldr	w10, [x10]
Lloh48:
	adrp	x11, _AR5K_SIMR2_DPERR@GOTPAGE
Lloh49:
	ldr	x11, [x11, _AR5K_SIMR2_DPERR@GOTPAGEOFF]
Lloh50:
	ldr	w11, [x11]
	orr	w8, w9, w8
	orr	w8, w8, w10
	orr	w8, w8, w11
LBB0_8:
Lloh51:
	adrp	x9, _AR5K_INT_TIM@GOTPAGE
Lloh52:
	ldr	x9, [x9, _AR5K_INT_TIM@GOTPAGEOFF]
Lloh53:
	ldr	w9, [x9]
Lloh54:
	adrp	x10, _AR5K_IMR_TIM@GOTPAGE
Lloh55:
	ldr	x10, [x10, _AR5K_IMR_TIM@GOTPAGEOFF]
Lloh56:
	ldr	w10, [x10]
	tst	w9, w21
	csel	w9, wzr, w10, eq
	orr	w9, w9, w22
Lloh57:
	adrp	x10, _AR5K_SISR2_TIM@GOTPAGE
Lloh58:
	ldr	x10, [x10, _AR5K_SISR2_TIM@GOTPAGEOFF]
Lloh59:
	ldr	w10, [x10]
	csel	w10, wzr, w10, eq
	orr	w8, w10, w8
Lloh60:
	adrp	x10, _AR5K_INT_DTIM@GOTPAGE
Lloh61:
	ldr	x10, [x10, _AR5K_INT_DTIM@GOTPAGEOFF]
Lloh62:
	ldr	w10, [x10]
Lloh63:
	adrp	x11, _AR5K_SISR2_DTIM@GOTPAGE
Lloh64:
	ldr	x11, [x11, _AR5K_SISR2_DTIM@GOTPAGEOFF]
Lloh65:
	ldr	w11, [x11]
	tst	w10, w21
	csel	w10, wzr, w11, eq
	orr	w8, w8, w10
Lloh66:
	adrp	x10, _AR5K_INT_DTIM_SYNC@GOTPAGE
Lloh67:
	ldr	x10, [x10, _AR5K_INT_DTIM_SYNC@GOTPAGEOFF]
Lloh68:
	ldr	w10, [x10]
Lloh69:
	adrp	x11, _AR5K_SISR2_DTIM_SYNC@GOTPAGE
Lloh70:
	ldr	x11, [x11, _AR5K_SISR2_DTIM_SYNC@GOTPAGEOFF]
Lloh71:
	ldr	w11, [x11]
	tst	w10, w21
	csel	w10, wzr, w11, eq
	orr	w8, w8, w10
Lloh72:
	adrp	x10, _AR5K_INT_BCN_TIMEOUT@GOTPAGE
Lloh73:
	ldr	x10, [x10, _AR5K_INT_BCN_TIMEOUT@GOTPAGEOFF]
Lloh74:
	ldr	w10, [x10]
Lloh75:
	adrp	x11, _AR5K_SISR2_BCN_TIMEOUT@GOTPAGE
Lloh76:
	ldr	x11, [x11, _AR5K_SISR2_BCN_TIMEOUT@GOTPAGEOFF]
Lloh77:
	ldr	w11, [x11]
	tst	w10, w21
	csel	w10, wzr, w11, eq
	orr	w8, w8, w10
Lloh78:
	adrp	x10, _AR5K_INT_CAB_TIMEOUT@GOTPAGE
Lloh79:
	ldr	x10, [x10, _AR5K_INT_CAB_TIMEOUT@GOTPAGEOFF]
Lloh80:
	ldr	w10, [x10]
Lloh81:
	adrp	x11, _AR5K_SISR2_CAB_TIMEOUT@GOTPAGE
Lloh82:
	ldr	x11, [x11, _AR5K_SISR2_CAB_TIMEOUT@GOTPAGEOFF]
Lloh83:
	ldr	w11, [x11]
	tst	w10, w21
	csel	w10, wzr, w11, eq
	orr	w22, w8, w10
Lloh84:
	adrp	x8, _AR5K_INT_BNR@GOTPAGE
Lloh85:
	ldr	x8, [x8, _AR5K_INT_BNR@GOTPAGEOFF]
Lloh86:
	ldr	w8, [x8]
	tst	w8, w21
	csel	w8, wzr, w8, eq
	orr	w1, w9, w8
Lloh87:
	adrp	x8, _AR5K_PIMR@GOTPAGE
Lloh88:
	ldr	x8, [x8, _AR5K_PIMR@GOTPAGEOFF]
Lloh89:
	ldr	w2, [x8]
	mov	x0, x20
	bl	_ath5k_hw_reg_write
Lloh90:
	adrp	x8, _AR5K_SIMR2@GOTPAGE
Lloh91:
	ldr	x8, [x8, _AR5K_SIMR2@GOTPAGEOFF]
LBB0_9:
	ldr	w2, [x8]
	mov	x0, x20
	mov	x1, x22
	bl	_ath5k_hw_reg_write
Lloh92:
	adrp	x8, _AR5K_INT_RXNOFRM@GOTPAGE
Lloh93:
	ldr	x8, [x8, _AR5K_INT_RXNOFRM@GOTPAGEOFF]
Lloh94:
	ldr	w8, [x8]
	tst	w8, w21
	b.ne	LBB0_11
; %bb.10:
Lloh95:
	adrp	x8, _AR5K_RXNOFRM@GOTPAGE
Lloh96:
	ldr	x8, [x8, _AR5K_RXNOFRM@GOTPAGEOFF]
Lloh97:
	ldr	w2, [x8]
	mov	x0, x20
	mov	w1, #0
	bl	_ath5k_hw_reg_write
LBB0_11:
	str	w21, [x20]
	ldr	w8, [x24]
	tst	w8, w21
	b.eq	LBB0_13
; %bb.12:
Lloh98:
	adrp	x8, _AR5K_IER_ENABLE@GOTPAGE
Lloh99:
	ldr	x8, [x8, _AR5K_IER_ENABLE@GOTPAGEOFF]
Lloh100:
	ldr	w1, [x8]
	ldr	w2, [x23]
	mov	x0, x20
	bl	_ath5k_hw_reg_write
	ldr	w1, [x23]
	mov	x0, x20
	bl	_ath5k_hw_reg_read
LBB0_13:
	mov	x0, x19
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh4, Lloh5, Lloh6
	.loh AdrpLdrGotLdr	Lloh10, Lloh11, Lloh12
	.loh AdrpLdrGotLdr	Lloh7, Lloh8, Lloh9
	.loh AdrpLdrGotLdr	Lloh13, Lloh14, Lloh15
	.loh AdrpLdrGotLdr	Lloh25, Lloh26, Lloh27
	.loh AdrpLdrGotLdr	Lloh22, Lloh23, Lloh24
	.loh AdrpLdrGotLdr	Lloh19, Lloh20, Lloh21
	.loh AdrpLdrGotLdr	Lloh16, Lloh17, Lloh18
	.loh AdrpLdrGot	Lloh28, Lloh29
	.loh AdrpLdrGotLdr	Lloh36, Lloh37, Lloh38
	.loh AdrpLdrGotLdr	Lloh33, Lloh34, Lloh35
	.loh AdrpLdrGotLdr	Lloh30, Lloh31, Lloh32
	.loh AdrpLdrGotLdr	Lloh48, Lloh49, Lloh50
	.loh AdrpLdrGotLdr	Lloh45, Lloh46, Lloh47
	.loh AdrpLdrGotLdr	Lloh42, Lloh43, Lloh44
	.loh AdrpLdrGotLdr	Lloh39, Lloh40, Lloh41
	.loh AdrpLdrGot	Lloh90, Lloh91
	.loh AdrpLdrGotLdr	Lloh87, Lloh88, Lloh89
	.loh AdrpLdrGotLdr	Lloh84, Lloh85, Lloh86
	.loh AdrpLdrGotLdr	Lloh81, Lloh82, Lloh83
	.loh AdrpLdrGotLdr	Lloh78, Lloh79, Lloh80
	.loh AdrpLdrGotLdr	Lloh75, Lloh76, Lloh77
	.loh AdrpLdrGotLdr	Lloh72, Lloh73, Lloh74
	.loh AdrpLdrGotLdr	Lloh69, Lloh70, Lloh71
	.loh AdrpLdrGotLdr	Lloh66, Lloh67, Lloh68
	.loh AdrpLdrGotLdr	Lloh63, Lloh64, Lloh65
	.loh AdrpLdrGotLdr	Lloh60, Lloh61, Lloh62
	.loh AdrpLdrGotLdr	Lloh57, Lloh58, Lloh59
	.loh AdrpLdrGotLdr	Lloh54, Lloh55, Lloh56
	.loh AdrpLdrGotLdr	Lloh51, Lloh52, Lloh53
	.loh AdrpLdrGotLdr	Lloh92, Lloh93, Lloh94
	.loh AdrpLdrGotLdr	Lloh95, Lloh96, Lloh97
	.loh AdrpLdrGotLdr	Lloh98, Lloh99, Lloh100
	.cfi_endproc
                                        ; -- End function
	.comm	_AR5K_INT_GLOBAL,4,2            ; @AR5K_INT_GLOBAL
	.comm	_AR5K_IER_DISABLE,4,2           ; @AR5K_IER_DISABLE
	.comm	_AR5K_IER,4,2                   ; @AR5K_IER
	.comm	_AR5K_INT_COMMON,4,2            ; @AR5K_INT_COMMON
	.comm	_AR5K_AR5210,8,3                ; @AR5K_AR5210
	.comm	_AR5K_SIMR2,4,2                 ; @AR5K_SIMR2
	.comm	_AR5K_SIMR2_QCU_TXURN,4,2       ; @AR5K_SIMR2_QCU_TXURN
	.comm	_AR5K_INT_FATAL,4,2             ; @AR5K_INT_FATAL
	.comm	_AR5K_IMR_HIUERR,4,2            ; @AR5K_IMR_HIUERR
	.comm	_AR5K_SIMR2_MCABT,4,2           ; @AR5K_SIMR2_MCABT
	.comm	_AR5K_SIMR2_SSERR,4,2           ; @AR5K_SIMR2_SSERR
	.comm	_AR5K_SIMR2_DPERR,4,2           ; @AR5K_SIMR2_DPERR
	.comm	_AR5K_INT_TIM,4,2               ; @AR5K_INT_TIM
	.comm	_AR5K_IMR_TIM,4,2               ; @AR5K_IMR_TIM
	.comm	_AR5K_SISR2_TIM,4,2             ; @AR5K_SISR2_TIM
	.comm	_AR5K_INT_DTIM,4,2              ; @AR5K_INT_DTIM
	.comm	_AR5K_SISR2_DTIM,4,2            ; @AR5K_SISR2_DTIM
	.comm	_AR5K_INT_DTIM_SYNC,4,2         ; @AR5K_INT_DTIM_SYNC
	.comm	_AR5K_SISR2_DTIM_SYNC,4,2       ; @AR5K_SISR2_DTIM_SYNC
	.comm	_AR5K_INT_BCN_TIMEOUT,4,2       ; @AR5K_INT_BCN_TIMEOUT
	.comm	_AR5K_SISR2_BCN_TIMEOUT,4,2     ; @AR5K_SISR2_BCN_TIMEOUT
	.comm	_AR5K_INT_CAB_TIMEOUT,4,2       ; @AR5K_INT_CAB_TIMEOUT
	.comm	_AR5K_SISR2_CAB_TIMEOUT,4,2     ; @AR5K_SISR2_CAB_TIMEOUT
	.comm	_AR5K_INT_BNR,4,2               ; @AR5K_INT_BNR
	.comm	_AR5K_PIMR,4,2                  ; @AR5K_PIMR
	.comm	_AR5K_IMR_SSERR,4,2             ; @AR5K_IMR_SSERR
	.comm	_AR5K_IMR_MCABT,4,2             ; @AR5K_IMR_MCABT
	.comm	_AR5K_IMR_DPERR,4,2             ; @AR5K_IMR_DPERR
	.comm	_AR5K_IMR,4,2                   ; @AR5K_IMR
	.comm	_AR5K_INT_RXNOFRM,4,2           ; @AR5K_INT_RXNOFRM
	.comm	_AR5K_RXNOFRM,4,2               ; @AR5K_RXNOFRM
	.comm	_AR5K_IER_ENABLE,4,2            ; @AR5K_IER_ENABLE
.subsections_via_symbols
