	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function spear1340_miphy_pcie_exit
_spear1340_miphy_pcie_exit:             ## @spear1340_miphy_pcie_exit
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -24
	movq	%rdi, %rbx
	movl	(%rdi), %edi
	movq	_SPEAR1340_PCIE_MIPHY_CFG@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_SPEAR1340_PCIE_MIPHY_CFG_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	xorl	%ecx, %ecx
	callq	_regmap_update_bits
	movl	(%rbx), %edi
	movq	_SPEAR1340_PCIE_SATA_CFG@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_SPEAR1340_PCIE_SATA_CFG_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	xorl	%ecx, %ecx
	callq	_regmap_update_bits
	xorl	%eax, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_SPEAR1340_PCIE_MIPHY_CFG,4,2   ## @SPEAR1340_PCIE_MIPHY_CFG
	.comm	_SPEAR1340_PCIE_MIPHY_CFG_MASK,4,2 ## @SPEAR1340_PCIE_MIPHY_CFG_MASK
	.comm	_SPEAR1340_PCIE_SATA_CFG,4,2    ## @SPEAR1340_PCIE_SATA_CFG
	.comm	_SPEAR1340_PCIE_SATA_CFG_MASK,4,2 ## @SPEAR1340_PCIE_SATA_CFG_MASK
	.no_dead_strip	_spear1340_miphy_pcie_exit
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function spear1340_miphy_pcie_exit
_spear1340_miphy_pcie_exit:             ; @spear1340_miphy_pcie_exit
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x19, x0
	ldr	w0, [x0]
Lloh0:
	adrp	x8, _SPEAR1340_PCIE_MIPHY_CFG@GOTPAGE
Lloh1:
	ldr	x8, [x8, _SPEAR1340_PCIE_MIPHY_CFG@GOTPAGEOFF]
Lloh2:
	ldr	w1, [x8]
Lloh3:
	adrp	x8, _SPEAR1340_PCIE_MIPHY_CFG_MASK@GOTPAGE
Lloh4:
	ldr	x8, [x8, _SPEAR1340_PCIE_MIPHY_CFG_MASK@GOTPAGEOFF]
Lloh5:
	ldr	w2, [x8]
	mov	w3, #0
	bl	_regmap_update_bits
	ldr	w0, [x19]
Lloh6:
	adrp	x8, _SPEAR1340_PCIE_SATA_CFG@GOTPAGE
Lloh7:
	ldr	x8, [x8, _SPEAR1340_PCIE_SATA_CFG@GOTPAGEOFF]
Lloh8:
	ldr	w1, [x8]
Lloh9:
	adrp	x8, _SPEAR1340_PCIE_SATA_CFG_MASK@GOTPAGE
Lloh10:
	ldr	x8, [x8, _SPEAR1340_PCIE_SATA_CFG_MASK@GOTPAGEOFF]
Lloh11:
	ldr	w2, [x8]
	mov	w3, #0
	bl	_regmap_update_bits
	mov	w0, #0
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_SPEAR1340_PCIE_MIPHY_CFG,4,2   ; @SPEAR1340_PCIE_MIPHY_CFG
	.comm	_SPEAR1340_PCIE_MIPHY_CFG_MASK,4,2 ; @SPEAR1340_PCIE_MIPHY_CFG_MASK
	.comm	_SPEAR1340_PCIE_SATA_CFG,4,2    ; @SPEAR1340_PCIE_SATA_CFG
	.comm	_SPEAR1340_PCIE_SATA_CFG_MASK,4,2 ; @SPEAR1340_PCIE_SATA_CFG_MASK
	.no_dead_strip	_spear1340_miphy_pcie_exit
.subsections_via_symbols
