	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function rt61pci_enable_mcu_interrupt
_rt61pci_enable_mcu_interrupt:          ## @rt61pci_enable_mcu_interrupt
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%esi, %r14d
	movq	%rdi, %rbx
	callq	_spin_lock_irq
	movq	_MCU_INT_MASK_CSR@GOTPCREL(%rip), %r15
	movl	(%r15), %esi
	movq	%rbx, %rdi
	callq	_rt2x00mmio_register_read
	movl	%eax, -28(%rbp)
	leaq	-28(%rbp), %rdi
	movl	%r14d, %esi
	xorl	%edx, %edx
	callq	_rt2x00_set_field32
	movl	(%r15), %esi
	movl	-28(%rbp), %edx
	movq	%rbx, %rdi
	callq	_rt2x00mmio_register_write
	movq	%rbx, %rdi
	callq	_spin_unlock_irq
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_MCU_INT_MASK_CSR,4,2           ## @MCU_INT_MASK_CSR
	.no_dead_strip	_rt61pci_enable_mcu_interrupt
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function rt61pci_enable_mcu_interrupt
_rt61pci_enable_mcu_interrupt:          ; @rt61pci_enable_mcu_interrupt
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #64
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x1
	mov	x20, x0
	bl	_spin_lock_irq
Lloh0:
	adrp	x21, _MCU_INT_MASK_CSR@GOTPAGE
Lloh1:
	ldr	x21, [x21, _MCU_INT_MASK_CSR@GOTPAGEOFF]
	ldr	w1, [x21]
	mov	x0, x20
	bl	_rt2x00mmio_register_read
	str	w0, [sp, #12]
	and	x1, x19, #0xffffffff
	add	x0, sp, #12
	mov	w2, #0
	bl	_rt2x00_set_field32
	ldr	w1, [x21]
	ldr	w2, [sp, #12]
	mov	x0, x20
	bl	_rt2x00mmio_register_write
	mov	x0, x20
	bl	_spin_unlock_irq
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #64
	ret
	.loh AdrpLdrGot	Lloh0, Lloh1
	.cfi_endproc
                                        ; -- End function
	.comm	_MCU_INT_MASK_CSR,4,2           ; @MCU_INT_MASK_CSR
	.no_dead_strip	_rt61pci_enable_mcu_interrupt
.subsections_via_symbols
