	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function dw_pci_bottom_ack
_dw_pci_bottom_ack:                     ## @dw_pci_bottom_ack
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r14
	pushq	%rbx
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	movq	%rdi, %rbx
	callq	_irq_data_get_irq_chip_data
	movq	%rax, %r14
	movl	(%rbx), %eax
	movq	_MAX_MSI_IRQS_PER_CTRL@GOTPCREL(%rip), %rcx
	xorl	%edx, %edx
	divl	(%rcx)
	movl	%eax, %ebx
	movl	%edx, %edi
	movq	_MSI_REG_CTRL_BLOCK_SIZE@GOTPCREL(%rip), %rax
	imull	(%rax), %ebx
	movq	_PCIE_MSI_INTR0_STATUS@GOTPCREL(%rip), %rax
	addq	(%rax), %rbx
	callq	_BIT
	movq	%r14, %rdi
	movq	%rbx, %rsi
	movl	$4, %edx
	movl	%eax, %ecx
	popq	%rbx
	popq	%r14
	popq	%rbp
	jmp	_dw_pcie_wr_own_conf            ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_MAX_MSI_IRQS_PER_CTRL,4,2      ## @MAX_MSI_IRQS_PER_CTRL
	.comm	_MSI_REG_CTRL_BLOCK_SIZE,4,2    ## @MSI_REG_CTRL_BLOCK_SIZE
	.comm	_PCIE_MSI_INTR0_STATUS,8,3      ## @PCIE_MSI_INTR0_STATUS
	.no_dead_strip	_dw_pci_bottom_ack
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function dw_pci_bottom_ack
_dw_pci_bottom_ack:                     ; @dw_pci_bottom_ack
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x19, x0
	bl	_irq_data_get_irq_chip_data
	mov	x20, x0
Lloh0:
	adrp	x8, _MAX_MSI_IRQS_PER_CTRL@GOTPAGE
Lloh1:
	ldr	x8, [x8, _MAX_MSI_IRQS_PER_CTRL@GOTPAGEOFF]
	ldr	w9, [x19]
Lloh2:
	ldr	w8, [x8]
	udiv	w10, w9, w8
Lloh3:
	adrp	x11, _MSI_REG_CTRL_BLOCK_SIZE@GOTPAGE
Lloh4:
	ldr	x11, [x11, _MSI_REG_CTRL_BLOCK_SIZE@GOTPAGEOFF]
Lloh5:
	ldr	w11, [x11]
	mul	w11, w11, w10
	msub	w0, w10, w8, w9
Lloh6:
	adrp	x8, _PCIE_MSI_INTR0_STATUS@GOTPAGE
Lloh7:
	ldr	x8, [x8, _PCIE_MSI_INTR0_STATUS@GOTPAGEOFF]
Lloh8:
	ldr	x8, [x8]
	add	x19, x8, x11
	bl	_BIT
	mov	x3, x0
	mov	x0, x20
	mov	x1, x19
	mov	w2, #4
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	b	_dw_pcie_wr_own_conf
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_MAX_MSI_IRQS_PER_CTRL,4,2      ; @MAX_MSI_IRQS_PER_CTRL
	.comm	_MSI_REG_CTRL_BLOCK_SIZE,4,2    ; @MSI_REG_CTRL_BLOCK_SIZE
	.comm	_PCIE_MSI_INTR0_STATUS,8,3      ; @PCIE_MSI_INTR0_STATUS
	.no_dead_strip	_dw_pci_bottom_ack
.subsections_via_symbols
