	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function e1000_post_phy_reset_ich8lan
_e1000_post_phy_reset_ich8lan:          ## @e1000_post_phy_reset_ich8lan
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r14
	pushq	%rbx
	subq	$16, %rsp
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	movq	%rdi, %r14
	callq	*16(%rdi)
	testq	%rax, %rax
	je	LBB0_2
## %bb.1:
	xorl	%ebx, %ebx
LBB0_17:
	movq	%rbx, %rax
	addq	$16, %rsp
	popq	%rbx
	popq	%r14
	popq	%rbp
	retq
LBB0_2:
	movl	$10000, %edi                    ## imm = 0x2710
	movl	$11000, %esi                    ## imm = 0x2AF8
	callq	_usleep_range
	movl	24(%r14), %eax
	cmpl	$129, %eax
	je	LBB0_5
## %bb.3:
	cmpl	$128, %eax
	jne	LBB0_8
## %bb.4:
	movq	%r14, %rdi
	callq	_e1000_hv_phy_workarounds_ich8lan
	jmp	LBB0_6
LBB0_5:
	movq	%r14, %rdi
	callq	_e1000_lv_phy_workarounds_ich8lan
LBB0_6:
	movq	%rax, %rbx
	testq	%rax, %rax
	jne	LBB0_17
## %bb.7:
	movl	24(%r14), %eax
LBB0_8:
	cmpl	$128, %eax
	jl	LBB0_10
## %bb.9:
	movq	_BM_PORT_GEN_CFG@GOTPCREL(%rip), %rbx
	movl	(%rbx), %esi
	leaq	-20(%rbp), %rdx
	movq	%r14, %rdi
	callq	_e1e_rphy
	movq	_BM_WUC_HOST_WU_BIT@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	notl	%edx
	andl	-20(%rbp), %edx
	movl	%edx, -20(%rbp)
	movl	(%rbx), %esi
	movq	%r14, %rdi
	callq	_e1e_wphy
LBB0_10:
	movq	%r14, %rdi
	callq	_e1000_sw_lcd_config_ich8lan
	movq	%rax, %rbx
	testq	%rax, %rax
	jne	LBB0_17
## %bb.11:
	movq	%r14, %rdi
	movl	$1, %esi
	callq	_e1000_oem_bits_config_ich8lan
	cmpl	$129, 24(%r14)
	jne	LBB0_12
## %bb.13:
	movq	_FWSM@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_er32
	movq	_E1000_ICH_FWSM_FW_VALID@GOTPCREL(%rip), %rcx
	testl	%eax, (%rcx)
	jne	LBB0_15
## %bb.14:
	movl	$10000, %edi                    ## imm = 0x2710
	movl	$11000, %esi                    ## imm = 0x2AF8
	callq	_usleep_range
	movq	%r14, %rdi
	xorl	%esi, %esi
	callq	_e1000_gate_hw_phy_config_ich8lan
LBB0_15:
	movq	%r14, %rdi
	callq	*8(%r14)
	movq	%rax, %rbx
	testq	%rax, %rax
	jne	LBB0_17
## %bb.16:
	movq	_I82579_LPI_UPDATE_TIMER@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	movl	$4999, %edx                     ## imm = 0x1387
	callq	_e1000_write_emi_reg_locked
	movq	%rax, %rbx
	movq	%r14, %rdi
	callq	*(%r14)
	jmp	LBB0_17
LBB0_12:
	movq	%rax, %rbx
	jmp	LBB0_17
	.cfi_endproc
                                        ## -- End function
	.comm	_BM_PORT_GEN_CFG,4,2            ## @BM_PORT_GEN_CFG
	.comm	_BM_WUC_HOST_WU_BIT,4,2         ## @BM_WUC_HOST_WU_BIT
	.comm	_FWSM,4,2                       ## @FWSM
	.comm	_E1000_ICH_FWSM_FW_VALID,4,2    ## @E1000_ICH_FWSM_FW_VALID
	.comm	_I82579_LPI_UPDATE_TIMER,4,2    ## @I82579_LPI_UPDATE_TIMER
	.no_dead_strip	_e1000_post_phy_reset_ich8lan
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function e1000_post_phy_reset_ich8lan
_e1000_post_phy_reset_ich8lan:          ; @e1000_post_phy_reset_ich8lan
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #48
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x19, x0
	ldr	x8, [x0, #16]
	blr	x8
	cbz	x0, LBB0_3
; %bb.1:
	mov	x20, #0
LBB0_2:
	mov	x0, x20
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #48
	ret
LBB0_3:
	mov	w0, #10000
	mov	w1, #11000
	bl	_usleep_range
	ldr	w8, [x19, #24]
	cmp	w8, #129
	b.eq	LBB0_6
; %bb.4:
	cmp	w8, #128
	b.ne	LBB0_8
; %bb.5:
	mov	x0, x19
	bl	_e1000_hv_phy_workarounds_ich8lan
	mov	x20, x0
	cbnz	x0, LBB0_2
	b	LBB0_7
LBB0_6:
	mov	x0, x19
	bl	_e1000_lv_phy_workarounds_ich8lan
	mov	x20, x0
	cbnz	x0, LBB0_2
LBB0_7:
	ldr	w8, [x19, #24]
LBB0_8:
	cmp	w8, #128
	b.lt	LBB0_10
; %bb.9:
Lloh0:
	adrp	x20, _BM_PORT_GEN_CFG@GOTPAGE
Lloh1:
	ldr	x20, [x20, _BM_PORT_GEN_CFG@GOTPAGEOFF]
	ldr	w1, [x20]
	add	x2, sp, #12
	mov	x0, x19
	bl	_e1e_rphy
Lloh2:
	adrp	x8, _BM_WUC_HOST_WU_BIT@GOTPAGE
Lloh3:
	ldr	x8, [x8, _BM_WUC_HOST_WU_BIT@GOTPAGEOFF]
Lloh4:
	ldr	w8, [x8]
	ldr	w9, [sp, #12]
	bic	w2, w9, w8
	str	w2, [sp, #12]
	ldr	w1, [x20]
	mov	x0, x19
	bl	_e1e_wphy
LBB0_10:
	mov	x0, x19
	bl	_e1000_sw_lcd_config_ich8lan
	mov	x20, x0
	cbnz	x0, LBB0_2
; %bb.11:
	mov	x0, x19
	mov	w1, #1
	bl	_e1000_oem_bits_config_ich8lan
	ldr	w8, [x19, #24]
	cmp	w8, #129
	b.ne	LBB0_16
; %bb.12:
Lloh5:
	adrp	x8, _FWSM@GOTPAGE
Lloh6:
	ldr	x8, [x8, _FWSM@GOTPAGEOFF]
Lloh7:
	ldr	w0, [x8]
	bl	_er32
Lloh8:
	adrp	x8, _E1000_ICH_FWSM_FW_VALID@GOTPAGE
Lloh9:
	ldr	x8, [x8, _E1000_ICH_FWSM_FW_VALID@GOTPAGEOFF]
Lloh10:
	ldr	w8, [x8]
	tst	w8, w0
	b.ne	LBB0_14
; %bb.13:
	mov	w0, #10000
	mov	w1, #11000
	bl	_usleep_range
	mov	x0, x19
	mov	w1, #0
	bl	_e1000_gate_hw_phy_config_ich8lan
LBB0_14:
	ldr	x8, [x19, #8]
	mov	x0, x19
	blr	x8
	mov	x20, x0
	cbnz	x0, LBB0_2
; %bb.15:
Lloh11:
	adrp	x8, _I82579_LPI_UPDATE_TIMER@GOTPAGE
Lloh12:
	ldr	x8, [x8, _I82579_LPI_UPDATE_TIMER@GOTPAGEOFF]
Lloh13:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #4999
	bl	_e1000_write_emi_reg_locked
	mov	x20, x0
	ldr	x8, [x19]
	mov	x0, x19
	blr	x8
	b	LBB0_2
LBB0_16:
	mov	x20, x0
	b	LBB0_2
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.cfi_endproc
                                        ; -- End function
	.comm	_BM_PORT_GEN_CFG,4,2            ; @BM_PORT_GEN_CFG
	.comm	_BM_WUC_HOST_WU_BIT,4,2         ; @BM_WUC_HOST_WU_BIT
	.comm	_FWSM,4,2                       ; @FWSM
	.comm	_E1000_ICH_FWSM_FW_VALID,4,2    ; @E1000_ICH_FWSM_FW_VALID
	.comm	_I82579_LPI_UPDATE_TIMER,4,2    ; @I82579_LPI_UPDATE_TIMER
	.no_dead_strip	_e1000_post_phy_reset_ich8lan
.subsections_via_symbols
