	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function pcie_port_enable_irq_vec
_pcie_port_enable_irq_vec:              ## @pcie_port_enable_irq_vec
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$24, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%edx, %r15d
	movq	%rsi, %r13
	movq	%rdi, %r12
	movl	$0, -52(%rbp)
	movl	$0, -48(%rbp)
	movl	$0, -44(%rbp)
	movq	_PCIE_PORT_MAX_MSI_ENTRIES@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	_PCI_IRQ_MSIX@GOTPCREL(%rip), %rax
	movq	_PCI_IRQ_MSI@GOTPCREL(%rip), %r14
	movl	(%r14), %ecx
	orl	(%rax), %ecx
	movl	$1, %esi
	callq	_pci_alloc_irq_vectors
	movl	%eax, %ebx
	testl	%eax, %eax
	js	LBB0_12
## %bb.1:
	movq	%r13, -64(%rbp)                 ## 8-byte Spill
	leaq	-52(%rbp), %rdx
	leaq	-48(%rbp), %rcx
	leaq	-44(%rbp), %r8
	movq	%r12, %rdi
	movl	%r15d, %esi
	callq	_pcie_message_numbers
	cmpl	%ebx, %eax
	jle	LBB0_3
## %bb.2:
	movq	%r12, %rdi
	callq	_pci_free_irq_vectors
	movq	_EIO@GOTPCREL(%rip), %rax
	xorl	%ebx, %ebx
	subl	(%rax), %ebx
	jmp	LBB0_12
LBB0_3:
	je	LBB0_6
## %bb.4:
	movl	%eax, %r13d
	movq	%r12, %rdi
	callq	_pci_free_irq_vectors
	movl	(%r14), %ecx
	movq	_PCI_IRQ_MSIX@GOTPCREL(%rip), %rax
	orl	(%rax), %ecx
	movq	%r12, %rdi
	movl	%r13d, %esi
	movl	%r13d, %edx
	callq	_pci_alloc_irq_vectors
	testl	%eax, %eax
	js	LBB0_5
LBB0_6:
	movq	_PCIE_PORT_SERVICE_PME@GOTPCREL(%rip), %rax
	movq	_PCIE_PORT_SERVICE_HP@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	orl	(%rax), %ecx
	movq	_PCIE_PORT_SERVICE_BWNOTIF@GOTPCREL(%rip), %rax
	orl	(%rax), %ecx
	testl	%r15d, %ecx
	movq	-64(%rbp), %r14                 ## 8-byte Reload
	je	LBB0_8
## %bb.7:
	movl	-52(%rbp), %esi
	movq	%r12, %rdi
	callq	_pci_irq_vector
	movq	_PCIE_PORT_SERVICE_PME_SHIFT@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rcx
	movl	%eax, (%r14,%rcx,4)
	movq	_PCIE_PORT_SERVICE_HP_SHIFT@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rcx
	movl	%eax, (%r14,%rcx,4)
	movq	_PCIE_PORT_SERVICE_BWNOTIF_SHIFT@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rcx
	movl	%eax, (%r14,%rcx,4)
LBB0_8:
	movq	_PCIE_PORT_SERVICE_AER@GOTPCREL(%rip), %rax
	testl	%r15d, (%rax)
	je	LBB0_10
## %bb.9:
	movl	-48(%rbp), %esi
	movq	%r12, %rdi
	callq	_pci_irq_vector
	movq	_PCIE_PORT_SERVICE_AER_SHIFT@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rcx
	movl	%eax, (%r14,%rcx,4)
LBB0_10:
	movq	_PCIE_PORT_SERVICE_DPC@GOTPCREL(%rip), %rax
	xorl	%ebx, %ebx
	testl	%r15d, (%rax)
	je	LBB0_12
## %bb.11:
	movl	-44(%rbp), %esi
	movq	%r12, %rdi
	callq	_pci_irq_vector
	movq	_PCIE_PORT_SERVICE_DPC_SHIFT@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rcx
	movl	%eax, (%r14,%rcx,4)
	jmp	LBB0_12
LBB0_5:
	movl	%eax, %ebx
LBB0_12:
	movl	%ebx, %eax
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_PCIE_PORT_MAX_MSI_ENTRIES,4,2  ## @PCIE_PORT_MAX_MSI_ENTRIES
	.comm	_PCI_IRQ_MSIX,4,2               ## @PCI_IRQ_MSIX
	.comm	_PCI_IRQ_MSI,4,2                ## @PCI_IRQ_MSI
	.comm	_EIO,4,2                        ## @EIO
	.comm	_PCIE_PORT_SERVICE_PME,4,2      ## @PCIE_PORT_SERVICE_PME
	.comm	_PCIE_PORT_SERVICE_HP,4,2       ## @PCIE_PORT_SERVICE_HP
	.comm	_PCIE_PORT_SERVICE_BWNOTIF,4,2  ## @PCIE_PORT_SERVICE_BWNOTIF
	.comm	_PCIE_PORT_SERVICE_PME_SHIFT,8,3 ## @PCIE_PORT_SERVICE_PME_SHIFT
	.comm	_PCIE_PORT_SERVICE_HP_SHIFT,8,3 ## @PCIE_PORT_SERVICE_HP_SHIFT
	.comm	_PCIE_PORT_SERVICE_BWNOTIF_SHIFT,8,3 ## @PCIE_PORT_SERVICE_BWNOTIF_SHIFT
	.comm	_PCIE_PORT_SERVICE_AER,4,2      ## @PCIE_PORT_SERVICE_AER
	.comm	_PCIE_PORT_SERVICE_AER_SHIFT,8,3 ## @PCIE_PORT_SERVICE_AER_SHIFT
	.comm	_PCIE_PORT_SERVICE_DPC,4,2      ## @PCIE_PORT_SERVICE_DPC
	.comm	_PCIE_PORT_SERVICE_DPC_SHIFT,8,3 ## @PCIE_PORT_SERVICE_DPC_SHIFT
	.no_dead_strip	_pcie_port_enable_irq_vec
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function pcie_port_enable_irq_vec
_pcie_port_enable_irq_vec:              ; @pcie_port_enable_irq_vec
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #96
	.cfi_def_cfa_offset 96
	stp	x26, x25, [sp, #16]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #32]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #48]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #64]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #80]             ; 16-byte Folded Spill
	add	x29, sp, #80
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	mov	x21, x2
	mov	x19, x1
	mov	x20, x0
	str	xzr, [sp, #8]
	str	wzr, [sp, #4]
Lloh0:
	adrp	x8, _PCIE_PORT_MAX_MSI_ENTRIES@GOTPAGE
Lloh1:
	ldr	x8, [x8, _PCIE_PORT_MAX_MSI_ENTRIES@GOTPAGEOFF]
Lloh2:
	adrp	x24, _PCI_IRQ_MSIX@GOTPAGE
Lloh3:
	ldr	x24, [x24, _PCI_IRQ_MSIX@GOTPAGEOFF]
Lloh4:
	ldr	w2, [x8]
	ldr	w8, [x24]
Lloh5:
	adrp	x25, _PCI_IRQ_MSI@GOTPAGE
Lloh6:
	ldr	x25, [x25, _PCI_IRQ_MSI@GOTPAGEOFF]
	ldr	w9, [x25]
	orr	w3, w9, w8
	mov	w1, #1
	bl	_pci_alloc_irq_vectors
	mov	x22, x0
	tbnz	w0, #31, LBB0_13
; %bb.1:
	add	x2, sp, #12
	add	x3, sp, #8
	add	x4, sp, #4
	mov	x0, x20
	mov	x1, x21
	bl	_pcie_message_numbers
	cmp	w0, w22
	b.le	LBB0_3
; %bb.2:
	mov	x0, x20
	bl	_pci_free_irq_vectors
Lloh7:
	adrp	x8, _EIO@GOTPAGE
Lloh8:
	ldr	x8, [x8, _EIO@GOTPAGEOFF]
Lloh9:
	ldr	w8, [x8]
	neg	w22, w8
	b	LBB0_13
LBB0_3:
	b.eq	LBB0_5
; %bb.4:
	mov	x23, x0
	mov	x0, x20
	bl	_pci_free_irq_vectors
	ldr	w8, [x24]
	ldr	w9, [x25]
	orr	w3, w9, w8
	mov	x0, x20
	mov	x1, x23
	mov	x2, x23
	bl	_pci_alloc_irq_vectors
	tbnz	w0, #31, LBB0_12
LBB0_5:
Lloh10:
	adrp	x8, _PCIE_PORT_SERVICE_PME@GOTPAGE
Lloh11:
	ldr	x8, [x8, _PCIE_PORT_SERVICE_PME@GOTPAGEOFF]
Lloh12:
	ldr	w8, [x8]
Lloh13:
	adrp	x9, _PCIE_PORT_SERVICE_HP@GOTPAGE
Lloh14:
	ldr	x9, [x9, _PCIE_PORT_SERVICE_HP@GOTPAGEOFF]
Lloh15:
	ldr	w9, [x9]
	orr	w8, w9, w8
Lloh16:
	adrp	x9, _PCIE_PORT_SERVICE_BWNOTIF@GOTPAGE
Lloh17:
	ldr	x9, [x9, _PCIE_PORT_SERVICE_BWNOTIF@GOTPAGEOFF]
Lloh18:
	ldr	w9, [x9]
	orr	w8, w8, w9
	tst	w8, w21
	b.eq	LBB0_7
; %bb.6:
	ldr	w1, [sp, #12]
	mov	x0, x20
	bl	_pci_irq_vector
Lloh19:
	adrp	x8, _PCIE_PORT_SERVICE_PME_SHIFT@GOTPAGE
Lloh20:
	ldr	x8, [x8, _PCIE_PORT_SERVICE_PME_SHIFT@GOTPAGEOFF]
Lloh21:
	ldr	x8, [x8]
	str	w0, [x19, x8, lsl #2]
Lloh22:
	adrp	x8, _PCIE_PORT_SERVICE_HP_SHIFT@GOTPAGE
Lloh23:
	ldr	x8, [x8, _PCIE_PORT_SERVICE_HP_SHIFT@GOTPAGEOFF]
Lloh24:
	ldr	x8, [x8]
	str	w0, [x19, x8, lsl #2]
Lloh25:
	adrp	x8, _PCIE_PORT_SERVICE_BWNOTIF_SHIFT@GOTPAGE
Lloh26:
	ldr	x8, [x8, _PCIE_PORT_SERVICE_BWNOTIF_SHIFT@GOTPAGEOFF]
Lloh27:
	ldr	x8, [x8]
	str	w0, [x19, x8, lsl #2]
LBB0_7:
Lloh28:
	adrp	x8, _PCIE_PORT_SERVICE_AER@GOTPAGE
Lloh29:
	ldr	x8, [x8, _PCIE_PORT_SERVICE_AER@GOTPAGEOFF]
Lloh30:
	ldr	w8, [x8]
	tst	w8, w21
	b.eq	LBB0_9
; %bb.8:
	ldr	w1, [sp, #8]
	mov	x0, x20
	bl	_pci_irq_vector
Lloh31:
	adrp	x8, _PCIE_PORT_SERVICE_AER_SHIFT@GOTPAGE
Lloh32:
	ldr	x8, [x8, _PCIE_PORT_SERVICE_AER_SHIFT@GOTPAGEOFF]
Lloh33:
	ldr	x8, [x8]
	str	w0, [x19, x8, lsl #2]
LBB0_9:
Lloh34:
	adrp	x8, _PCIE_PORT_SERVICE_DPC@GOTPAGE
Lloh35:
	ldr	x8, [x8, _PCIE_PORT_SERVICE_DPC@GOTPAGEOFF]
Lloh36:
	ldr	w8, [x8]
	tst	w8, w21
	b.eq	LBB0_11
; %bb.10:
	ldr	w1, [sp, #4]
	mov	x0, x20
	bl	_pci_irq_vector
	mov	w22, #0
Lloh37:
	adrp	x8, _PCIE_PORT_SERVICE_DPC_SHIFT@GOTPAGE
Lloh38:
	ldr	x8, [x8, _PCIE_PORT_SERVICE_DPC_SHIFT@GOTPAGEOFF]
Lloh39:
	ldr	x8, [x8]
	str	w0, [x19, x8, lsl #2]
	b	LBB0_13
LBB0_11:
	mov	w22, #0
	b	LBB0_13
LBB0_12:
	mov	x22, x0
LBB0_13:
	mov	x0, x22
	ldp	x29, x30, [sp, #80]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #64]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #48]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #32]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #96
	ret
	.loh AdrpLdrGot	Lloh5, Lloh6
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh4
	.loh AdrpLdrGotLdr	Lloh7, Lloh8, Lloh9
	.loh AdrpLdrGotLdr	Lloh16, Lloh17, Lloh18
	.loh AdrpLdrGotLdr	Lloh13, Lloh14, Lloh15
	.loh AdrpLdrGotLdr	Lloh10, Lloh11, Lloh12
	.loh AdrpLdrGotLdr	Lloh25, Lloh26, Lloh27
	.loh AdrpLdrGotLdr	Lloh22, Lloh23, Lloh24
	.loh AdrpLdrGotLdr	Lloh19, Lloh20, Lloh21
	.loh AdrpLdrGotLdr	Lloh28, Lloh29, Lloh30
	.loh AdrpLdrGotLdr	Lloh31, Lloh32, Lloh33
	.loh AdrpLdrGotLdr	Lloh34, Lloh35, Lloh36
	.loh AdrpLdrGotLdr	Lloh37, Lloh38, Lloh39
	.cfi_endproc
                                        ; -- End function
	.comm	_PCIE_PORT_MAX_MSI_ENTRIES,4,2  ; @PCIE_PORT_MAX_MSI_ENTRIES
	.comm	_PCI_IRQ_MSIX,4,2               ; @PCI_IRQ_MSIX
	.comm	_PCI_IRQ_MSI,4,2                ; @PCI_IRQ_MSI
	.comm	_EIO,4,2                        ; @EIO
	.comm	_PCIE_PORT_SERVICE_PME,4,2      ; @PCIE_PORT_SERVICE_PME
	.comm	_PCIE_PORT_SERVICE_HP,4,2       ; @PCIE_PORT_SERVICE_HP
	.comm	_PCIE_PORT_SERVICE_BWNOTIF,4,2  ; @PCIE_PORT_SERVICE_BWNOTIF
	.comm	_PCIE_PORT_SERVICE_PME_SHIFT,8,3 ; @PCIE_PORT_SERVICE_PME_SHIFT
	.comm	_PCIE_PORT_SERVICE_HP_SHIFT,8,3 ; @PCIE_PORT_SERVICE_HP_SHIFT
	.comm	_PCIE_PORT_SERVICE_BWNOTIF_SHIFT,8,3 ; @PCIE_PORT_SERVICE_BWNOTIF_SHIFT
	.comm	_PCIE_PORT_SERVICE_AER,4,2      ; @PCIE_PORT_SERVICE_AER
	.comm	_PCIE_PORT_SERVICE_AER_SHIFT,8,3 ; @PCIE_PORT_SERVICE_AER_SHIFT
	.comm	_PCIE_PORT_SERVICE_DPC,4,2      ; @PCIE_PORT_SERVICE_DPC
	.comm	_PCIE_PORT_SERVICE_DPC_SHIFT,8,3 ; @PCIE_PORT_SERVICE_DPC_SHIFT
	.no_dead_strip	_pcie_port_enable_irq_vec
.subsections_via_symbols
