	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function mlxsw_reg_recr2_ipv6_sip_enable
_mlxsw_reg_recr2_ipv6_sip_enable:       ## @mlxsw_reg_recr2_ipv6_sip_enable
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r14
	movq	_MLXSW_REG_RECR2_IPV6_SIP0_7@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	$1, %edx
	callq	_mlxsw_reg_recr2_outer_header_fields_enable_set
	movq	_MLXSW_REG_RECR2_IPV6_SIP8@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	movq	_MLXSW_REG_RECR2_IPV6_SIP15@GOTPCREL(%rip), %r15
	cmpl	(%r15), %ebx
	jg	LBB0_2
	.p2align	4, 0x90
LBB0_1:                                 ## =>This Inner Loop Header: Depth=1
	movq	%r14, %rdi
	movl	%ebx, %esi
	movl	$1, %edx
	callq	_mlxsw_reg_recr2_outer_header_fields_enable_set
	leal	1(%rbx), %eax
	cmpl	(%r15), %ebx
	movl	%eax, %ebx
	jl	LBB0_1
LBB0_2:
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_MLXSW_REG_RECR2_IPV6_SIP0_7,4,2 ## @MLXSW_REG_RECR2_IPV6_SIP0_7
	.comm	_MLXSW_REG_RECR2_IPV6_SIP8,4,2  ## @MLXSW_REG_RECR2_IPV6_SIP8
	.comm	_MLXSW_REG_RECR2_IPV6_SIP15,4,2 ## @MLXSW_REG_RECR2_IPV6_SIP15
	.no_dead_strip	_mlxsw_reg_recr2_ipv6_sip_enable
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function mlxsw_reg_recr2_ipv6_sip_enable
_mlxsw_reg_recr2_ipv6_sip_enable:       ; @mlxsw_reg_recr2_ipv6_sip_enable
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x0
Lloh0:
	adrp	x8, _MLXSW_REG_RECR2_IPV6_SIP0_7@GOTPAGE
Lloh1:
	ldr	x8, [x8, _MLXSW_REG_RECR2_IPV6_SIP0_7@GOTPAGEOFF]
Lloh2:
	ldr	w1, [x8]
	mov	w2, #1
	bl	_mlxsw_reg_recr2_outer_header_fields_enable_set
Lloh3:
	adrp	x8, _MLXSW_REG_RECR2_IPV6_SIP8@GOTPAGE
Lloh4:
	ldr	x8, [x8, _MLXSW_REG_RECR2_IPV6_SIP8@GOTPAGEOFF]
Lloh5:
	ldr	w20, [x8]
Lloh6:
	adrp	x21, _MLXSW_REG_RECR2_IPV6_SIP15@GOTPAGE
Lloh7:
	ldr	x21, [x21, _MLXSW_REG_RECR2_IPV6_SIP15@GOTPAGEOFF]
	ldr	w8, [x21]
	cmp	w20, w8
	b.gt	LBB0_2
LBB0_1:                                 ; =>This Inner Loop Header: Depth=1
	mov	x0, x19
	mov	x1, x20
	mov	w2, #1
	bl	_mlxsw_reg_recr2_outer_header_fields_enable_set
	add	w8, w20, #1
	ldr	w9, [x21]
	cmp	w20, w9
	mov	x20, x8
	b.lt	LBB0_1
LBB0_2:
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGot	Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_MLXSW_REG_RECR2_IPV6_SIP0_7,4,2 ; @MLXSW_REG_RECR2_IPV6_SIP0_7
	.comm	_MLXSW_REG_RECR2_IPV6_SIP8,4,2  ; @MLXSW_REG_RECR2_IPV6_SIP8
	.comm	_MLXSW_REG_RECR2_IPV6_SIP15,4,2 ; @MLXSW_REG_RECR2_IPV6_SIP15
	.no_dead_strip	_mlxsw_reg_recr2_ipv6_sip_enable
.subsections_via_symbols
