	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function vxge_post
_vxge_post:                             ## @vxge_post
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdx, %r15
	movq	%rsi, %r12
	movq	%rdi, %r14
	movl	(%rdi), %ebx
	movq	_VXGE_HW_RXSYNC_FREQ_CNT@GOTPCREL(%rip), %rsi
	movl	%ebx, %eax
	cltd
	idivl	(%rsi)
	testl	%edx, %edx
	je	LBB0_1
## %bb.4:
	movq	%rcx, %rdi
	movq	%r15, %rsi
	callq	_vxge_hw_ring_rxd_post_post
	jmp	LBB0_5
LBB0_1:
	movq	(%r12), %rsi
	testq	%rsi, %rsi
	je	LBB0_3
## %bb.2:
	movq	%rcx, %rdi
	callq	_vxge_hw_ring_rxd_post_post_wmb
LBB0_3:
	movq	%r15, (%r12)
LBB0_5:
	incl	%ebx
	movl	%ebx, (%r14)
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_VXGE_HW_RXSYNC_FREQ_CNT,4,2    ## @VXGE_HW_RXSYNC_FREQ_CNT
	.no_dead_strip	_vxge_post
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function vxge_post
_vxge_post:                             ; @vxge_post
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x20, x2
	mov	x19, x0
	ldr	w22, [x0]
Lloh0:
	adrp	x8, _VXGE_HW_RXSYNC_FREQ_CNT@GOTPAGE
Lloh1:
	ldr	x8, [x8, _VXGE_HW_RXSYNC_FREQ_CNT@GOTPAGEOFF]
Lloh2:
	ldr	w8, [x8]
	sdiv	w9, w22, w8
	msub	w8, w9, w8, w22
	cbz	w8, LBB0_2
; %bb.1:
	mov	x0, x3
	mov	x1, x20
	bl	_vxge_hw_ring_rxd_post_post
	b	LBB0_5
LBB0_2:
	mov	x21, x1
	ldr	x1, [x1]
	cbz	x1, LBB0_4
; %bb.3:
	mov	x0, x3
	bl	_vxge_hw_ring_rxd_post_post_wmb
LBB0_4:
	str	x20, [x21]
LBB0_5:
	add	w8, w22, #1
	str	w8, [x19]
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_VXGE_HW_RXSYNC_FREQ_CNT,4,2    ; @VXGE_HW_RXSYNC_FREQ_CNT
	.no_dead_strip	_vxge_post
.subsections_via_symbols
