	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function mvpp2_prs_mh_init
_mvpp2_prs_mh_init:                     ## @mvpp2_prs_mh_init
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r14
	leaq	-32(%rbp), %rbx
	movq	%rbx, %rdi
	xorl	%esi, %esi
	movl	$4, %edx
	callq	_memset
	movq	_MVPP2_PE_MH_DEFAULT@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, -32(%rbp)
	movq	_MVPP2_PRS_LU_MH@GOTPCREL(%rip), %r15
	movl	(%r15), %esi
	movq	%rbx, %rdi
	callq	_mvpp2_prs_tcam_lu_set
	movq	_MVPP2_MH_SIZE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_MVPP2_PRS_SRAM_OP_SEL_SHIFT_ADD@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	callq	_mvpp2_prs_sram_shift_set
	movq	_MVPP2_PRS_LU_MAC@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_mvpp2_prs_sram_next_lu_set
	movq	_MVPP2_PRS_PORT_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_mvpp2_prs_tcam_port_map_set
	movl	-32(%rbp), %esi
	movl	(%r15), %edx
	movq	%r14, %rdi
	callq	_mvpp2_prs_shadow_set
	movq	%r14, %rdi
	movq	%rbx, %rsi
	callq	_mvpp2_prs_hw_write
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_MVPP2_PE_MH_DEFAULT,4,2        ## @MVPP2_PE_MH_DEFAULT
	.comm	_MVPP2_PRS_LU_MH,4,2            ## @MVPP2_PRS_LU_MH
	.comm	_MVPP2_MH_SIZE,4,2              ## @MVPP2_MH_SIZE
	.comm	_MVPP2_PRS_SRAM_OP_SEL_SHIFT_ADD,4,2 ## @MVPP2_PRS_SRAM_OP_SEL_SHIFT_ADD
	.comm	_MVPP2_PRS_LU_MAC,4,2           ## @MVPP2_PRS_LU_MAC
	.comm	_MVPP2_PRS_PORT_MASK,4,2        ## @MVPP2_PRS_PORT_MASK
	.no_dead_strip	_mvpp2_prs_mh_init
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function mvpp2_prs_mh_init
_mvpp2_prs_mh_init:                     ; @mvpp2_prs_mh_init
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #48
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x19, x0
	add	x0, sp, #8
	mov	w1, #0
	mov	w2, #4
	bl	_memset
Lloh0:
	adrp	x8, _MVPP2_PE_MH_DEFAULT@GOTPAGE
Lloh1:
	ldr	x8, [x8, _MVPP2_PE_MH_DEFAULT@GOTPAGEOFF]
Lloh2:
	ldr	w8, [x8]
	str	w8, [sp, #8]
Lloh3:
	adrp	x20, _MVPP2_PRS_LU_MH@GOTPAGE
Lloh4:
	ldr	x20, [x20, _MVPP2_PRS_LU_MH@GOTPAGEOFF]
	ldr	w1, [x20]
	add	x0, sp, #8
	bl	_mvpp2_prs_tcam_lu_set
Lloh5:
	adrp	x8, _MVPP2_MH_SIZE@GOTPAGE
Lloh6:
	ldr	x8, [x8, _MVPP2_MH_SIZE@GOTPAGEOFF]
Lloh7:
	ldr	w1, [x8]
Lloh8:
	adrp	x8, _MVPP2_PRS_SRAM_OP_SEL_SHIFT_ADD@GOTPAGE
Lloh9:
	ldr	x8, [x8, _MVPP2_PRS_SRAM_OP_SEL_SHIFT_ADD@GOTPAGEOFF]
Lloh10:
	ldr	w2, [x8]
	add	x0, sp, #8
	bl	_mvpp2_prs_sram_shift_set
Lloh11:
	adrp	x8, _MVPP2_PRS_LU_MAC@GOTPAGE
Lloh12:
	ldr	x8, [x8, _MVPP2_PRS_LU_MAC@GOTPAGEOFF]
Lloh13:
	ldr	w1, [x8]
	add	x0, sp, #8
	bl	_mvpp2_prs_sram_next_lu_set
Lloh14:
	adrp	x8, _MVPP2_PRS_PORT_MASK@GOTPAGE
Lloh15:
	ldr	x8, [x8, _MVPP2_PRS_PORT_MASK@GOTPAGEOFF]
Lloh16:
	ldr	w1, [x8]
	add	x0, sp, #8
	bl	_mvpp2_prs_tcam_port_map_set
	ldr	w1, [sp, #8]
	ldr	w2, [x20]
	mov	x0, x19
	bl	_mvpp2_prs_shadow_set
	add	x1, sp, #8
	mov	x0, x19
	bl	_mvpp2_prs_hw_write
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #48
	ret
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh16
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGot	Lloh3, Lloh4
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_MVPP2_PE_MH_DEFAULT,4,2        ; @MVPP2_PE_MH_DEFAULT
	.comm	_MVPP2_PRS_LU_MH,4,2            ; @MVPP2_PRS_LU_MH
	.comm	_MVPP2_MH_SIZE,4,2              ; @MVPP2_MH_SIZE
	.comm	_MVPP2_PRS_SRAM_OP_SEL_SHIFT_ADD,4,2 ; @MVPP2_PRS_SRAM_OP_SEL_SHIFT_ADD
	.comm	_MVPP2_PRS_LU_MAC,4,2           ; @MVPP2_PRS_LU_MAC
	.comm	_MVPP2_PRS_PORT_MASK,4,2        ; @MVPP2_PRS_PORT_MASK
	.no_dead_strip	_mvpp2_prs_mh_init
.subsections_via_symbols
