	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function serdes_init_s1g
_serdes_init_s1g:                       ## @serdes_init_s1g
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%esi, %r14d
	movq	%rdi, %r12
	callq	_serdes_update_mcb_s1g
	testl	%eax, %eax
	jne	LBB0_2
## %bb.1:
	movq	_HSIO_S1G_COMMON_CFG@GOTPCREL(%rip), %rsi
	movq	_HSIO_S1G_COMMON_CFG_SYS_RST@GOTPCREL(%rip), %rdx
	movq	_HSIO_S1G_COMMON_CFG_ENA_LANE@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movl	(%rdx), %edx
	orl	%ecx, %edx
	movq	_HSIO_S1G_COMMON_CFG_ENA_ELOOP@GOTPCREL(%rip), %rax
	orl	(%rax), %edx
	movl	(%rsi), %esi
	movq	_HSIO_S1G_COMMON_CFG_ENA_FLOOP@GOTPCREL(%rip), %rax
	orl	(%rax), %edx
	movq	%r12, %rdi
	callq	_regmap_update_bits
	movq	_HSIO_S1G_PLL_CFG@GOTPCREL(%rip), %rax
	movl	(%rax), %r15d
	movq	_HSIO_S1G_PLL_CFG_PLL_FSM_ENA@GOTPCREL(%rip), %r13
	movq	_HSIO_S1G_PLL_CFG_PLL_FSM_CTRL_DATA_M@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	orl	(%r13), %ebx
	movl	$200, %edi
	callq	_HSIO_S1G_PLL_CFG_PLL_FSM_CTRL_DATA
	orl	(%r13), %eax
	movq	%r12, %rdi
	movl	%r15d, %esi
	movl	%ebx, %edx
	movl	%eax, %ecx
	callq	_regmap_update_bits
	movq	_HSIO_S1G_MISC_CFG@GOTPCREL(%rip), %r15
	movl	(%r15), %esi
	movq	_HSIO_S1G_MISC_CFG_DES_100FX_CPMD_ENA@GOTPCREL(%rip), %rax
	movq	_HSIO_S1G_MISC_CFG_LANE_RST@GOTPCREL(%rip), %rbx
	movl	(%rbx), %ecx
	movl	(%rax), %edx
	orl	%ecx, %edx
	movq	%r12, %rdi
	callq	_regmap_update_bits
	movq	%r12, %rdi
	movl	%r14d, %esi
	callq	_serdes_commit_mcb_s1g
	testl	%eax, %eax
	je	LBB0_3
LBB0_2:
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_3:
	movq	_HSIO_S1G_COMMON_CFG@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_HSIO_S1G_COMMON_CFG_SYS_RST@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movq	%r12, %rdi
	movl	%ecx, %edx
	callq	_regmap_update_bits
	movl	(%r15), %esi
	movl	(%rbx), %edx
	movq	%r12, %rdi
	xorl	%ecx, %ecx
	callq	_regmap_update_bits
	movq	%r12, %rdi
	movl	%r14d, %esi
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_serdes_commit_mcb_s1g          ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_HSIO_S1G_COMMON_CFG,4,2        ## @HSIO_S1G_COMMON_CFG
	.comm	_HSIO_S1G_COMMON_CFG_SYS_RST,4,2 ## @HSIO_S1G_COMMON_CFG_SYS_RST
	.comm	_HSIO_S1G_COMMON_CFG_ENA_LANE,4,2 ## @HSIO_S1G_COMMON_CFG_ENA_LANE
	.comm	_HSIO_S1G_COMMON_CFG_ENA_ELOOP,4,2 ## @HSIO_S1G_COMMON_CFG_ENA_ELOOP
	.comm	_HSIO_S1G_COMMON_CFG_ENA_FLOOP,4,2 ## @HSIO_S1G_COMMON_CFG_ENA_FLOOP
	.comm	_HSIO_S1G_PLL_CFG,4,2           ## @HSIO_S1G_PLL_CFG
	.comm	_HSIO_S1G_PLL_CFG_PLL_FSM_ENA,4,2 ## @HSIO_S1G_PLL_CFG_PLL_FSM_ENA
	.comm	_HSIO_S1G_PLL_CFG_PLL_FSM_CTRL_DATA_M,4,2 ## @HSIO_S1G_PLL_CFG_PLL_FSM_CTRL_DATA_M
	.comm	_HSIO_S1G_MISC_CFG,4,2          ## @HSIO_S1G_MISC_CFG
	.comm	_HSIO_S1G_MISC_CFG_DES_100FX_CPMD_ENA,4,2 ## @HSIO_S1G_MISC_CFG_DES_100FX_CPMD_ENA
	.comm	_HSIO_S1G_MISC_CFG_LANE_RST,4,2 ## @HSIO_S1G_MISC_CFG_LANE_RST
	.no_dead_strip	_serdes_init_s1g
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function serdes_init_s1g
_serdes_init_s1g:                       ; @serdes_init_s1g
	.cfi_startproc
; %bb.0:
	stp	x26, x25, [sp, #-80]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	mov	x19, x1
	mov	x20, x0
	bl	_serdes_update_mcb_s1g
	cbnz	w0, LBB0_2
; %bb.1:
Lloh0:
	adrp	x23, _HSIO_S1G_COMMON_CFG@GOTPAGE
Lloh1:
	ldr	x23, [x23, _HSIO_S1G_COMMON_CFG@GOTPAGEOFF]
	ldr	w1, [x23]
Lloh2:
	adrp	x24, _HSIO_S1G_COMMON_CFG_SYS_RST@GOTPAGE
Lloh3:
	ldr	x24, [x24, _HSIO_S1G_COMMON_CFG_SYS_RST@GOTPAGEOFF]
	ldr	w8, [x24]
Lloh4:
	adrp	x9, _HSIO_S1G_COMMON_CFG_ENA_LANE@GOTPAGE
Lloh5:
	ldr	x9, [x9, _HSIO_S1G_COMMON_CFG_ENA_LANE@GOTPAGEOFF]
Lloh6:
	ldr	w3, [x9]
	orr	w8, w3, w8
Lloh7:
	adrp	x9, _HSIO_S1G_COMMON_CFG_ENA_ELOOP@GOTPAGE
Lloh8:
	ldr	x9, [x9, _HSIO_S1G_COMMON_CFG_ENA_ELOOP@GOTPAGEOFF]
Lloh9:
	ldr	w9, [x9]
	orr	w8, w8, w9
Lloh10:
	adrp	x9, _HSIO_S1G_COMMON_CFG_ENA_FLOOP@GOTPAGE
Lloh11:
	ldr	x9, [x9, _HSIO_S1G_COMMON_CFG_ENA_FLOOP@GOTPAGEOFF]
Lloh12:
	ldr	w9, [x9]
	orr	w2, w8, w9
	mov	x0, x20
	bl	_regmap_update_bits
Lloh13:
	adrp	x8, _HSIO_S1G_PLL_CFG@GOTPAGE
Lloh14:
	ldr	x8, [x8, _HSIO_S1G_PLL_CFG@GOTPAGEOFF]
Lloh15:
	adrp	x25, _HSIO_S1G_PLL_CFG_PLL_FSM_ENA@GOTPAGE
Lloh16:
	ldr	x25, [x25, _HSIO_S1G_PLL_CFG_PLL_FSM_ENA@GOTPAGEOFF]
Lloh17:
	ldr	w21, [x8]
	ldr	w8, [x25]
Lloh18:
	adrp	x9, _HSIO_S1G_PLL_CFG_PLL_FSM_CTRL_DATA_M@GOTPAGE
Lloh19:
	ldr	x9, [x9, _HSIO_S1G_PLL_CFG_PLL_FSM_CTRL_DATA_M@GOTPAGEOFF]
Lloh20:
	ldr	w9, [x9]
	orr	w22, w9, w8
	mov	w0, #200
	bl	_HSIO_S1G_PLL_CFG_PLL_FSM_CTRL_DATA
	ldr	w8, [x25]
	orr	w3, w8, w0
	mov	x0, x20
	mov	x1, x21
	mov	x2, x22
	bl	_regmap_update_bits
Lloh21:
	adrp	x21, _HSIO_S1G_MISC_CFG@GOTPAGE
Lloh22:
	ldr	x21, [x21, _HSIO_S1G_MISC_CFG@GOTPAGEOFF]
Lloh23:
	adrp	x8, _HSIO_S1G_MISC_CFG_DES_100FX_CPMD_ENA@GOTPAGE
Lloh24:
	ldr	x8, [x8, _HSIO_S1G_MISC_CFG_DES_100FX_CPMD_ENA@GOTPAGEOFF]
	ldr	w1, [x21]
Lloh25:
	ldr	w8, [x8]
Lloh26:
	adrp	x22, _HSIO_S1G_MISC_CFG_LANE_RST@GOTPAGE
Lloh27:
	ldr	x22, [x22, _HSIO_S1G_MISC_CFG_LANE_RST@GOTPAGEOFF]
	ldr	w3, [x22]
	orr	w2, w3, w8
	mov	x0, x20
	bl	_regmap_update_bits
	mov	x0, x20
	mov	x1, x19
	bl	_serdes_commit_mcb_s1g
	cbz	w0, LBB0_3
LBB0_2:
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp], #80             ; 16-byte Folded Reload
	ret
LBB0_3:
	ldr	w1, [x23]
	ldr	w2, [x24]
	mov	x0, x20
	mov	x3, x2
	bl	_regmap_update_bits
	ldr	w1, [x21]
	ldr	w2, [x22]
	mov	x0, x20
	mov	w3, #0
	bl	_regmap_update_bits
	mov	x0, x20
	mov	x1, x19
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp], #80             ; 16-byte Folded Reload
	b	_serdes_commit_mcb_s1g
	.loh AdrpLdrGot	Lloh26, Lloh27
	.loh AdrpLdrGotLdr	Lloh23, Lloh24, Lloh25
	.loh AdrpLdrGot	Lloh21, Lloh22
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGot	Lloh15, Lloh16
	.loh AdrpLdrGotLdr	Lloh13, Lloh14, Lloh17
	.loh AdrpLdrGotLdr	Lloh10, Lloh11, Lloh12
	.loh AdrpLdrGotLdr	Lloh7, Lloh8, Lloh9
	.loh AdrpLdrGotLdr	Lloh4, Lloh5, Lloh6
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpLdrGot	Lloh0, Lloh1
	.cfi_endproc
                                        ; -- End function
	.comm	_HSIO_S1G_COMMON_CFG,4,2        ; @HSIO_S1G_COMMON_CFG
	.comm	_HSIO_S1G_COMMON_CFG_SYS_RST,4,2 ; @HSIO_S1G_COMMON_CFG_SYS_RST
	.comm	_HSIO_S1G_COMMON_CFG_ENA_LANE,4,2 ; @HSIO_S1G_COMMON_CFG_ENA_LANE
	.comm	_HSIO_S1G_COMMON_CFG_ENA_ELOOP,4,2 ; @HSIO_S1G_COMMON_CFG_ENA_ELOOP
	.comm	_HSIO_S1G_COMMON_CFG_ENA_FLOOP,4,2 ; @HSIO_S1G_COMMON_CFG_ENA_FLOOP
	.comm	_HSIO_S1G_PLL_CFG,4,2           ; @HSIO_S1G_PLL_CFG
	.comm	_HSIO_S1G_PLL_CFG_PLL_FSM_ENA,4,2 ; @HSIO_S1G_PLL_CFG_PLL_FSM_ENA
	.comm	_HSIO_S1G_PLL_CFG_PLL_FSM_CTRL_DATA_M,4,2 ; @HSIO_S1G_PLL_CFG_PLL_FSM_CTRL_DATA_M
	.comm	_HSIO_S1G_MISC_CFG,4,2          ; @HSIO_S1G_MISC_CFG
	.comm	_HSIO_S1G_MISC_CFG_DES_100FX_CPMD_ENA,4,2 ; @HSIO_S1G_MISC_CFG_DES_100FX_CPMD_ENA
	.comm	_HSIO_S1G_MISC_CFG_LANE_RST,4,2 ; @HSIO_S1G_MISC_CFG_LANE_RST
	.no_dead_strip	_serdes_init_s1g
.subsections_via_symbols
