	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_pcie_aspm_init_link_state      ## -- Begin function pcie_aspm_init_link_state
	.p2align	4, 0x90
_pcie_aspm_init_link_state:             ## @pcie_aspm_init_link_state
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %rbx
	callq	_pcie_aspm_sanity_check
	xorl	%r14d, %r14d
	testl	%eax, %eax
	setne	%r15b
	movq	_aspm_support_enabled@GOTPCREL(%rip), %rax
	cmpl	$0, (%rax)
	je	LBB0_12
## %bb.1:
	cmpq	$0, 16(%rbx)
	je	LBB0_2
LBB0_12:
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_2:
	movq	%rbx, %rdi
	callq	_pcie_downstream_port
	testl	%eax, %eax
	je	LBB0_12
## %bb.3:
	movq	%rbx, %rdi
	callq	_pci_pcie_type
	movq	_PCI_EXP_TYPE_ROOT_PORT@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jne	LBB0_5
## %bb.4:
	movq	8(%rbx), %rax
	cmpq	$0, (%rax)
	jne	LBB0_12
LBB0_5:
	movq	_pci_bus_sem@GOTPCREL(%rip), %rdi
	callq	_down_read
	movq	(%rbx), %rdi
	callq	_list_empty
	testq	%rax, %rax
	jne	LBB0_11
## %bb.6:
	movq	_aspm_lock@GOTPCREL(%rip), %rdi
	callq	_mutex_lock
	movq	%rbx, %rdi
	callq	_alloc_pcie_link_state
	testq	%rax, %rax
	je	LBB0_10
## %bb.7:
	movq	%rax, %rbx
	movb	%r15b, %r14b
	movq	%rax, %rdi
	movl	%r14d, %esi
	callq	_pcie_aspm_cap_init
	movq	%rbx, %rdi
	movl	%r14d, %esi
	callq	_pcie_clkpm_cap_init
	movq	_aspm_policy@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	movq	_POLICY_POWERSAVE@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	je	LBB0_10
## %bb.8:
	movq	_POLICY_POWER_SUPERSAVE@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	je	LBB0_10
## %bb.9:
	movq	%rbx, %rdi
	callq	_pcie_config_aspm_path
	movq	%rbx, %rdi
	callq	_policy_to_clkpm_state
	movq	%rbx, %rdi
	movl	%eax, %esi
	callq	_pcie_set_clkpm
LBB0_10:
	movq	_aspm_lock@GOTPCREL(%rip), %rdi
	callq	_mutex_unlock
LBB0_11:
	movq	_pci_bus_sem@GOTPCREL(%rip), %rdi
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_up_read                        ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_aspm_support_enabled,4,2       ## @aspm_support_enabled
	.comm	_PCI_EXP_TYPE_ROOT_PORT,8,3     ## @PCI_EXP_TYPE_ROOT_PORT
	.comm	_pci_bus_sem,4,2                ## @pci_bus_sem
	.comm	_aspm_lock,4,2                  ## @aspm_lock
	.comm	_aspm_policy,8,3                ## @aspm_policy
	.comm	_POLICY_POWERSAVE,8,3           ## @POLICY_POWERSAVE
	.comm	_POLICY_POWER_SUPERSAVE,8,3     ## @POLICY_POWER_SUPERSAVE
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_pcie_aspm_init_link_state      ; -- Begin function pcie_aspm_init_link_state
	.p2align	2
_pcie_aspm_init_link_state:             ; @pcie_aspm_init_link_state
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x20, x0
	bl	_pcie_aspm_sanity_check
	cmp	w0, #0
	cset	w19, ne
Lloh0:
	adrp	x8, _aspm_support_enabled@GOTPAGE
Lloh1:
	ldr	x8, [x8, _aspm_support_enabled@GOTPAGEOFF]
Lloh2:
	ldr	w8, [x8]
	cbz	w8, LBB0_2
; %bb.1:
	ldr	x8, [x20, #16]
	cbz	x8, LBB0_3
LBB0_2:
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	ret
LBB0_3:
	mov	x0, x20
	bl	_pcie_downstream_port
	cbz	w0, LBB0_2
; %bb.4:
	mov	x0, x20
	bl	_pci_pcie_type
Lloh3:
	adrp	x8, _PCI_EXP_TYPE_ROOT_PORT@GOTPAGE
Lloh4:
	ldr	x8, [x8, _PCI_EXP_TYPE_ROOT_PORT@GOTPAGEOFF]
Lloh5:
	ldr	x8, [x8]
	cmp	x0, x8
	b.ne	LBB0_6
; %bb.5:
	ldr	x8, [x20, #8]
	ldr	x8, [x8]
	cbnz	x8, LBB0_2
LBB0_6:
Lloh6:
	adrp	x0, _pci_bus_sem@GOTPAGE
Lloh7:
	ldr	x0, [x0, _pci_bus_sem@GOTPAGEOFF]
	bl	_down_read
	ldr	x0, [x20]
	bl	_list_empty
	cbnz	x0, LBB0_12
; %bb.7:
Lloh8:
	adrp	x0, _aspm_lock@GOTPAGE
Lloh9:
	ldr	x0, [x0, _aspm_lock@GOTPAGEOFF]
	bl	_mutex_lock
	mov	x0, x20
	bl	_alloc_pcie_link_state
	cbz	x0, LBB0_11
; %bb.8:
	mov	x20, x0
	mov	x1, x19
	bl	_pcie_aspm_cap_init
	mov	x0, x20
	mov	x1, x19
	bl	_pcie_clkpm_cap_init
Lloh10:
	adrp	x8, _aspm_policy@GOTPAGE
Lloh11:
	ldr	x8, [x8, _aspm_policy@GOTPAGEOFF]
Lloh12:
	ldr	x8, [x8]
Lloh13:
	adrp	x9, _POLICY_POWERSAVE@GOTPAGE
Lloh14:
	ldr	x9, [x9, _POLICY_POWERSAVE@GOTPAGEOFF]
Lloh15:
	ldr	x9, [x9]
	cmp	x8, x9
	b.eq	LBB0_11
; %bb.9:
Lloh16:
	adrp	x9, _POLICY_POWER_SUPERSAVE@GOTPAGE
Lloh17:
	ldr	x9, [x9, _POLICY_POWER_SUPERSAVE@GOTPAGEOFF]
Lloh18:
	ldr	x9, [x9]
	cmp	x8, x9
	b.eq	LBB0_11
; %bb.10:
	mov	x0, x20
	bl	_pcie_config_aspm_path
	mov	x0, x20
	bl	_policy_to_clkpm_state
	mov	x1, x0
	mov	x0, x20
	bl	_pcie_set_clkpm
LBB0_11:
Lloh19:
	adrp	x0, _aspm_lock@GOTPAGE
Lloh20:
	ldr	x0, [x0, _aspm_lock@GOTPAGEOFF]
	bl	_mutex_unlock
LBB0_12:
Lloh21:
	adrp	x0, _pci_bus_sem@GOTPAGE
Lloh22:
	ldr	x0, [x0, _pci_bus_sem@GOTPAGEOFF]
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	b	_up_read
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGot	Lloh6, Lloh7
	.loh AdrpLdrGot	Lloh8, Lloh9
	.loh AdrpLdrGotLdr	Lloh13, Lloh14, Lloh15
	.loh AdrpLdrGotLdr	Lloh10, Lloh11, Lloh12
	.loh AdrpLdrGotLdr	Lloh16, Lloh17, Lloh18
	.loh AdrpLdrGot	Lloh19, Lloh20
	.loh AdrpLdrGot	Lloh21, Lloh22
	.cfi_endproc
                                        ; -- End function
	.comm	_aspm_support_enabled,4,2       ; @aspm_support_enabled
	.comm	_PCI_EXP_TYPE_ROOT_PORT,8,3     ; @PCI_EXP_TYPE_ROOT_PORT
	.comm	_pci_bus_sem,4,2                ; @pci_bus_sem
	.comm	_aspm_lock,4,2                  ; @aspm_lock
	.comm	_aspm_policy,8,3                ; @aspm_policy
	.comm	_POLICY_POWERSAVE,8,3           ; @POLICY_POWERSAVE
	.comm	_POLICY_POWER_SUPERSAVE,8,3     ; @POLICY_POWER_SUPERSAVE
.subsections_via_symbols
