	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_mt76_pci_disable_aspm          ## -- Begin function mt76_pci_disable_aspm
	.p2align	4, 0x90
_mt76_pci_disable_aspm:                 ## @mt76_pci_disable_aspm
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	subq	$16, %rsp
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %rbx
	movq	8(%rdi), %rax
	movq	(%rax), %r14
	movl	$0, -40(%rbp)
	movq	_PCI_EXP_LNKCTL@GOTPCREL(%rip), %r15
	movl	(%r15), %esi
	leaq	-36(%rbp), %rdx
	callq	_pcie_capability_read_word
	movq	_PCI_EXP_LNKCTL_ASPMC@GOTPCREL(%rip), %r12
	movl	-36(%rbp), %eax
	andl	(%r12), %eax
	movl	%eax, -36(%rbp)
	testq	%r14, %r14
	je	LBB0_1
## %bb.2:
	movl	(%r15), %esi
	leaq	-40(%rbp), %rdx
	movq	%r14, %rdi
	callq	_pcie_capability_read_word
	movl	(%r12), %eax
	andl	%eax, -40(%rbp)
	movl	-36(%rbp), %eax
	setne	%cl
	testl	%eax, %eax
	je	LBB0_4
	jmp	LBB0_5
LBB0_1:
	xorl	%ecx, %ecx
	testl	%eax, %eax
	jne	LBB0_5
LBB0_4:
	testb	%cl, %cl
	je	LBB0_9
LBB0_5:
	movq	_PCI_EXP_LNKCTL_ASPM_L0S@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	andl	%eax, %ecx
	leaq	L_.str.2(%rip), %rsi
	leaq	L_.str.1(%rip), %rdx
	cmoveq	%rsi, %rdx
	movq	_PCI_EXP_LNKCTL_ASPM_L1@GOTPCREL(%rip), %rcx
	andl	(%rcx), %eax
	leaq	L_.str.3(%rip), %rcx
	cmoveq	%rsi, %rcx
	leaq	L_.str(%rip), %rsi
	movq	%rbx, %rdi
	callq	_dev_info
	movq	_CONFIG_PCIEASPM@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_IS_ENABLED
	testq	%rax, %rax
	je	LBB0_7
## %bb.6:
	movl	-36(%rbp), %esi
	movq	%rbx, %rdi
	callq	_pci_disable_link_state
	testl	%eax, %eax
	je	LBB0_9
LBB0_7:
	movl	(%r15), %esi
	movl	-36(%rbp), %edx
	movq	%rbx, %rdi
	callq	_pcie_capability_clear_word
	testq	%r14, %r14
	je	LBB0_9
## %bb.8:
	movl	(%r15), %esi
	movl	-36(%rbp), %edx
	movq	%r14, %rdi
	callq	_pcie_capability_clear_word
LBB0_9:
	addq	$16, %rsp
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_PCI_EXP_LNKCTL,4,2             ## @PCI_EXP_LNKCTL
	.comm	_PCI_EXP_LNKCTL_ASPMC,4,2       ## @PCI_EXP_LNKCTL_ASPMC
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"disabling ASPM %s %s\n"

	.comm	_PCI_EXP_LNKCTL_ASPM_L0S,4,2    ## @PCI_EXP_LNKCTL_ASPM_L0S
L_.str.1:                               ## @.str.1
	.asciz	"L0s"

L_.str.2:                               ## @.str.2
	.space	1

	.comm	_PCI_EXP_LNKCTL_ASPM_L1,4,2     ## @PCI_EXP_LNKCTL_ASPM_L1
L_.str.3:                               ## @.str.3
	.asciz	"L1"

	.comm	_CONFIG_PCIEASPM,4,2            ## @CONFIG_PCIEASPM
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_mt76_pci_disable_aspm          ; -- Begin function mt76_pci_disable_aspm
	.p2align	2
_mt76_pci_disable_aspm:                 ; @mt76_pci_disable_aspm
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #64
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x20, x0
	ldr	x8, [x0, #8]
	ldr	x19, [x8]
	str	wzr, [sp, #8]
Lloh0:
	adrp	x21, _PCI_EXP_LNKCTL@GOTPAGE
Lloh1:
	ldr	x21, [x21, _PCI_EXP_LNKCTL@GOTPAGEOFF]
	ldr	w1, [x21]
	add	x2, sp, #12
	bl	_pcie_capability_read_word
Lloh2:
	adrp	x22, _PCI_EXP_LNKCTL_ASPMC@GOTPAGE
Lloh3:
	ldr	x22, [x22, _PCI_EXP_LNKCTL_ASPMC@GOTPAGEOFF]
	ldr	w8, [x22]
	ldr	w9, [sp, #12]
	and	w8, w9, w8
	str	w8, [sp, #12]
	cbz	x19, LBB0_2
; %bb.1:
	ldr	w1, [x21]
	add	x2, sp, #8
	mov	x0, x19
	bl	_pcie_capability_read_word
	ldr	w8, [x22]
	ldr	w9, [sp, #8]
	ands	w8, w9, w8
	str	w8, [sp, #8]
	ldr	w8, [sp, #12]
	cset	w9, ne
	b	LBB0_3
LBB0_2:
	mov	w9, #0
LBB0_3:
	cmp	w8, #0
	ccmp	w9, #0, #0, eq
	b.eq	LBB0_8
; %bb.4:
Lloh4:
	adrp	x9, _PCI_EXP_LNKCTL_ASPM_L0S@GOTPAGE
Lloh5:
	ldr	x9, [x9, _PCI_EXP_LNKCTL_ASPM_L0S@GOTPAGEOFF]
Lloh6:
	adrp	x10, l_.str.1@PAGE
Lloh7:
	add	x10, x10, l_.str.1@PAGEOFF
Lloh8:
	ldr	w9, [x9]
Lloh9:
	adrp	x11, l_.str.2@PAGE
Lloh10:
	add	x11, x11, l_.str.2@PAGEOFF
	tst	w9, w8
Lloh11:
	adrp	x9, _PCI_EXP_LNKCTL_ASPM_L1@GOTPAGE
Lloh12:
	ldr	x9, [x9, _PCI_EXP_LNKCTL_ASPM_L1@GOTPAGEOFF]
	csel	x2, x11, x10, eq
Lloh13:
	ldr	w9, [x9]
Lloh14:
	adrp	x10, l_.str.3@PAGE
Lloh15:
	add	x10, x10, l_.str.3@PAGEOFF
	tst	w9, w8
	csel	x3, x11, x10, eq
Lloh16:
	adrp	x1, l_.str@PAGE
Lloh17:
	add	x1, x1, l_.str@PAGEOFF
	mov	x0, x20
	bl	_dev_info
Lloh18:
	adrp	x8, _CONFIG_PCIEASPM@GOTPAGE
Lloh19:
	ldr	x8, [x8, _CONFIG_PCIEASPM@GOTPAGEOFF]
Lloh20:
	ldr	w0, [x8]
	bl	_IS_ENABLED
	cbz	x0, LBB0_6
; %bb.5:
	ldr	w1, [sp, #12]
	mov	x0, x20
	bl	_pci_disable_link_state
	cbz	w0, LBB0_8
LBB0_6:
	ldr	w1, [x21]
	ldr	w2, [sp, #12]
	mov	x0, x20
	bl	_pcie_capability_clear_word
	cbz	x19, LBB0_8
; %bb.7:
	ldr	w1, [x21]
	ldr	w2, [sp, #12]
	mov	x0, x19
	bl	_pcie_capability_clear_word
LBB0_8:
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #64
	ret
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpAdd	Lloh16, Lloh17
	.loh AdrpAdd	Lloh14, Lloh15
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpAdd	Lloh9, Lloh10
	.loh AdrpAdd	Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh4, Lloh5, Lloh8
	.cfi_endproc
                                        ; -- End function
	.comm	_PCI_EXP_LNKCTL,4,2             ; @PCI_EXP_LNKCTL
	.comm	_PCI_EXP_LNKCTL_ASPMC,4,2       ; @PCI_EXP_LNKCTL_ASPMC
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"disabling ASPM %s %s\n"

	.comm	_PCI_EXP_LNKCTL_ASPM_L0S,4,2    ; @PCI_EXP_LNKCTL_ASPM_L0S
l_.str.1:                               ; @.str.1
	.asciz	"L0s"

l_.str.2:                               ; @.str.2
	.space	1

	.comm	_PCI_EXP_LNKCTL_ASPM_L1,4,2     ; @PCI_EXP_LNKCTL_ASPM_L1
l_.str.3:                               ; @.str.3
	.asciz	"L1"

	.comm	_CONFIG_PCIEASPM,4,2            ; @CONFIG_PCIEASPM
.subsections_via_symbols
