	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function iwl_pcie_gen2_force_power_gating
_iwl_pcie_gen2_force_power_gating:      ## @iwl_pcie_gen2_force_power_gating
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %rbx
	movq	_HPM_HIPM_GEN_CFG@GOTPCREL(%rip), %r14
	movl	(%r14), %esi
	movq	_HPM_HIPM_GEN_CFG_CR_FORCE_ACTIVE@GOTPCREL(%rip), %r15
	movl	(%r15), %edx
	callq	_iwl_set_bits_prph
	movl	$20, %edi
	callq	_udelay
	movl	(%r14), %esi
	movq	_HPM_HIPM_GEN_CFG_CR_PG_EN@GOTPCREL(%rip), %rax
	movq	_HPM_HIPM_GEN_CFG_CR_SLP_EN@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	orl	(%rax), %edx
	movq	%rbx, %rdi
	callq	_iwl_set_bits_prph
	movl	$20, %edi
	callq	_udelay
	movl	(%r14), %esi
	movl	(%r15), %edx
	movq	%rbx, %rdi
	callq	_iwl_clear_bits_prph
	movq	%rbx, %rdi
	callq	_iwl_trans_sw_reset
	movq	_CSR_GP_CNTRL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_CSR_GP_CNTRL_REG_FLAG_INIT_DONE@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	callq	_iwl_clear_bit
	xorl	%eax, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_HPM_HIPM_GEN_CFG,4,2           ## @HPM_HIPM_GEN_CFG
	.comm	_HPM_HIPM_GEN_CFG_CR_FORCE_ACTIVE,4,2 ## @HPM_HIPM_GEN_CFG_CR_FORCE_ACTIVE
	.comm	_HPM_HIPM_GEN_CFG_CR_PG_EN,4,2  ## @HPM_HIPM_GEN_CFG_CR_PG_EN
	.comm	_HPM_HIPM_GEN_CFG_CR_SLP_EN,4,2 ## @HPM_HIPM_GEN_CFG_CR_SLP_EN
	.comm	_CSR_GP_CNTRL,4,2               ## @CSR_GP_CNTRL
	.comm	_CSR_GP_CNTRL_REG_FLAG_INIT_DONE,4,2 ## @CSR_GP_CNTRL_REG_FLAG_INIT_DONE
	.no_dead_strip	_iwl_pcie_gen2_force_power_gating
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function iwl_pcie_gen2_force_power_gating
_iwl_pcie_gen2_force_power_gating:      ; @iwl_pcie_gen2_force_power_gating
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x0
Lloh0:
	adrp	x20, _HPM_HIPM_GEN_CFG@GOTPAGE
Lloh1:
	ldr	x20, [x20, _HPM_HIPM_GEN_CFG@GOTPAGEOFF]
	ldr	w1, [x20]
Lloh2:
	adrp	x21, _HPM_HIPM_GEN_CFG_CR_FORCE_ACTIVE@GOTPAGE
Lloh3:
	ldr	x21, [x21, _HPM_HIPM_GEN_CFG_CR_FORCE_ACTIVE@GOTPAGEOFF]
	ldr	w2, [x21]
	bl	_iwl_set_bits_prph
	mov	w0, #20
	bl	_udelay
Lloh4:
	adrp	x8, _HPM_HIPM_GEN_CFG_CR_PG_EN@GOTPAGE
Lloh5:
	ldr	x8, [x8, _HPM_HIPM_GEN_CFG_CR_PG_EN@GOTPAGEOFF]
	ldr	w1, [x20]
Lloh6:
	ldr	w8, [x8]
Lloh7:
	adrp	x9, _HPM_HIPM_GEN_CFG_CR_SLP_EN@GOTPAGE
Lloh8:
	ldr	x9, [x9, _HPM_HIPM_GEN_CFG_CR_SLP_EN@GOTPAGEOFF]
Lloh9:
	ldr	w9, [x9]
	orr	w2, w9, w8
	mov	x0, x19
	bl	_iwl_set_bits_prph
	mov	w0, #20
	bl	_udelay
	ldr	w1, [x20]
	ldr	w2, [x21]
	mov	x0, x19
	bl	_iwl_clear_bits_prph
	mov	x0, x19
	bl	_iwl_trans_sw_reset
Lloh10:
	adrp	x8, _CSR_GP_CNTRL@GOTPAGE
Lloh11:
	ldr	x8, [x8, _CSR_GP_CNTRL@GOTPAGEOFF]
Lloh12:
	ldr	w1, [x8]
Lloh13:
	adrp	x8, _CSR_GP_CNTRL_REG_FLAG_INIT_DONE@GOTPAGE
Lloh14:
	ldr	x8, [x8, _CSR_GP_CNTRL_REG_FLAG_INIT_DONE@GOTPAGEOFF]
Lloh15:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_iwl_clear_bit
	mov	w0, #0
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh13, Lloh14, Lloh15
	.loh AdrpLdrGotLdr	Lloh10, Lloh11, Lloh12
	.loh AdrpLdrGotLdr	Lloh7, Lloh8, Lloh9
	.loh AdrpLdrGotLdr	Lloh4, Lloh5, Lloh6
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpLdrGot	Lloh0, Lloh1
	.cfi_endproc
                                        ; -- End function
	.comm	_HPM_HIPM_GEN_CFG,4,2           ; @HPM_HIPM_GEN_CFG
	.comm	_HPM_HIPM_GEN_CFG_CR_FORCE_ACTIVE,4,2 ; @HPM_HIPM_GEN_CFG_CR_FORCE_ACTIVE
	.comm	_HPM_HIPM_GEN_CFG_CR_PG_EN,4,2  ; @HPM_HIPM_GEN_CFG_CR_PG_EN
	.comm	_HPM_HIPM_GEN_CFG_CR_SLP_EN,4,2 ; @HPM_HIPM_GEN_CFG_CR_SLP_EN
	.comm	_CSR_GP_CNTRL,4,2               ; @CSR_GP_CNTRL
	.comm	_CSR_GP_CNTRL_REG_FLAG_INIT_DONE,4,2 ; @CSR_GP_CNTRL_REG_FLAG_INIT_DONE
	.no_dead_strip	_iwl_pcie_gen2_force_power_gating
.subsections_via_symbols
