	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function cas_program_bridge
_cas_program_bridge:                    ## @cas_program_bridge
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -24
	movq	8(%rdi), %rax
	movq	(%rax), %rbx
	testq	%rbx, %rbx
	je	LBB0_4
## %bb.1:
	cmpl	$32902, (%rbx)                  ## imm = 0x8086
	jne	LBB0_4
## %bb.2:
	cmpl	$21372, 4(%rbx)                 ## imm = 0x537C
	jne	LBB0_4
## %bb.3:
	leaq	-12(%rbp), %rdx
	movq	%rbx, %rdi
	movl	$64, %esi
	callq	_pci_read_config_dword
	movl	$-262145, %edx                  ## imm = 0xFFFBFFFF
	andl	-12(%rbp), %edx
	movl	%edx, -12(%rbp)
	movq	%rbx, %rdi
	movl	$64, %esi
	callq	_pci_write_config_dword
	movq	%rbx, %rdi
	movl	$80, %esi
	movl	$6143, %edx                     ## imm = 0x17FF
	callq	_pci_write_config_word
	movq	%rbx, %rdi
	movl	$82, %esi
	movl	$65535, %edx                    ## imm = 0xFFFF
	callq	_pci_write_config_word
	movq	_PCI_CACHE_LINE_SIZE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	movl	$8, %edx
	callq	_pci_write_config_byte
	movq	_PCI_LATENCY_TIMER@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	movl	$255, %edx
	callq	_pci_write_config_byte
LBB0_4:
	addq	$8, %rsp
	popq	%rbx
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_PCI_CACHE_LINE_SIZE,4,2        ## @PCI_CACHE_LINE_SIZE
	.comm	_PCI_LATENCY_TIMER,4,2          ## @PCI_LATENCY_TIMER
	.no_dead_strip	_cas_program_bridge
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function cas_program_bridge
_cas_program_bridge:                    ; @cas_program_bridge
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #48
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	ldr	x8, [x0, #8]
	ldr	x19, [x8]
	cbz	x19, LBB0_4
; %bb.1:
	ldr	w8, [x19]
	mov	w9, #32902
	cmp	w8, w9
	b.ne	LBB0_4
; %bb.2:
	ldr	w8, [x19, #4]
	mov	w9, #21372
	cmp	w8, w9
	b.ne	LBB0_4
; %bb.3:
	add	x2, sp, #12
	mov	x0, x19
	mov	w1, #64
	bl	_pci_read_config_dword
	ldr	w8, [sp, #12]
	and	w2, w8, #0xfffbffff
	str	w2, [sp, #12]
	mov	x0, x19
	mov	w1, #64
	bl	_pci_write_config_dword
	mov	x0, x19
	mov	w1, #80
	mov	w2, #6143
	bl	_pci_write_config_word
	mov	x0, x19
	mov	w1, #82
	mov	w2, #65535
	bl	_pci_write_config_word
Lloh0:
	adrp	x8, _PCI_CACHE_LINE_SIZE@GOTPAGE
Lloh1:
	ldr	x8, [x8, _PCI_CACHE_LINE_SIZE@GOTPAGEOFF]
Lloh2:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #8
	bl	_pci_write_config_byte
Lloh3:
	adrp	x8, _PCI_LATENCY_TIMER@GOTPAGE
Lloh4:
	ldr	x8, [x8, _PCI_LATENCY_TIMER@GOTPAGEOFF]
Lloh5:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #255
	bl	_pci_write_config_byte
LBB0_4:
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #48
	ret
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_PCI_CACHE_LINE_SIZE,4,2        ; @PCI_CACHE_LINE_SIZE
	.comm	_PCI_LATENCY_TIMER,4,2          ; @PCI_LATENCY_TIMER
	.no_dead_strip	_cas_program_bridge
.subsections_via_symbols
