	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_pcie_capability_read_word      ## -- Begin function pcie_capability_read_word
	.p2align	4, 0x90
_pcie_capability_read_word:             ## @pcie_capability_read_word
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%esi, %r15d
	movq	$0, (%rdx)
	testb	$1, %r15b
	jne	LBB0_1
## %bb.2:
	movq	%rdx, %r14
	movq	%rdi, %r12
	movl	%r15d, %esi
	callq	_pcie_capability_reg_implemented
	movq	%r12, %rdi
	testq	%rax, %rax
	je	LBB0_6
## %bb.3:
	callq	_pci_pcie_cap
	movslq	%r15d, %rsi
	addq	%rax, %rsi
	movq	%r12, %rdi
	movq	%r14, %rdx
	callq	_pci_read_config_word
	testl	%eax, %eax
	je	LBB0_4
## %bb.5:
	movl	%eax, %ebx
	movq	$0, (%r14)
	jmp	LBB0_10
LBB0_1:
	movq	_EINVAL@GOTPCREL(%rip), %rax
	xorl	%ebx, %ebx
	subl	(%rax), %ebx
LBB0_10:
	movl	%ebx, %eax
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_6:
	callq	_pci_is_pcie
	xorl	%ebx, %ebx
	testq	%rax, %rax
	je	LBB0_10
## %bb.7:
	movq	%r12, %rdi
	callq	_pcie_downstream_port
	testq	%rax, %rax
	je	LBB0_10
## %bb.8:
	movq	_PCI_EXP_SLTSTA@GOTPCREL(%rip), %rax
	cmpl	%r15d, (%rax)
	jne	LBB0_10
## %bb.9:
	movq	_PCI_EXP_SLTSTA_PDS@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	movq	%rax, (%r14)
	jmp	LBB0_10
LBB0_4:
	xorl	%ebx, %ebx
	jmp	LBB0_10
	.cfi_endproc
                                        ## -- End function
	.comm	_EINVAL,4,2                     ## @EINVAL
	.comm	_PCI_EXP_SLTSTA,4,2             ## @PCI_EXP_SLTSTA
	.comm	_PCI_EXP_SLTSTA_PDS,8,3         ## @PCI_EXP_SLTSTA_PDS
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_pcie_capability_read_word      ; -- Begin function pcie_capability_read_word
	.p2align	2
_pcie_capability_read_word:             ; @pcie_capability_read_word
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	str	xzr, [x2]
	tbnz	w1, #0, LBB0_4
; %bb.1:
	mov	x19, x2
	mov	x20, x1
	mov	x21, x0
	bl	_pcie_capability_reg_implemented
	cbz	x0, LBB0_6
; %bb.2:
	mov	x0, x21
	bl	_pci_pcie_cap
	add	x1, x0, w20, sxtw
	mov	x0, x21
	mov	x2, x19
	bl	_pci_read_config_word
	cbz	w0, LBB0_5
; %bb.3:
	str	xzr, [x19]
	b	LBB0_5
LBB0_4:
Lloh0:
	adrp	x8, _EINVAL@GOTPAGE
Lloh1:
	ldr	x8, [x8, _EINVAL@GOTPAGEOFF]
Lloh2:
	ldr	w8, [x8]
	neg	w0, w8
LBB0_5:
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
LBB0_6:
	mov	x0, x21
	bl	_pci_is_pcie
	cbz	x0, LBB0_5
; %bb.7:
	mov	x0, x21
	bl	_pcie_downstream_port
	mov	x8, x0
	mov	w0, #0
	cbz	x8, LBB0_5
; %bb.8:
Lloh3:
	adrp	x8, _PCI_EXP_SLTSTA@GOTPAGE
Lloh4:
	ldr	x8, [x8, _PCI_EXP_SLTSTA@GOTPAGEOFF]
Lloh5:
	ldr	w8, [x8]
	cmp	w8, w20
	b.ne	LBB0_5
; %bb.9:
	mov	w0, #0
Lloh6:
	adrp	x8, _PCI_EXP_SLTSTA_PDS@GOTPAGE
Lloh7:
	ldr	x8, [x8, _PCI_EXP_SLTSTA_PDS@GOTPAGEOFF]
Lloh8:
	ldr	x8, [x8]
	str	x8, [x19]
	b	LBB0_5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.cfi_endproc
                                        ; -- End function
	.comm	_EINVAL,4,2                     ; @EINVAL
	.comm	_PCI_EXP_SLTSTA,4,2             ; @PCI_EXP_SLTSTA
	.comm	_PCI_EXP_SLTSTA_PDS,8,3         ; @PCI_EXP_SLTSTA_PDS
.subsections_via_symbols
