	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function ti_pipe3_power_on
_ti_pipe3_power_on:                     ## @ti_pipe3_power_on
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	callq	_phy_get_drvdata
	movq	%rax, %r15
	cmpl	$0, 12(%rax)
	je	LBB0_1
## %bb.2:
	movl	20(%r15), %edi
	callq	_clk_get_rate
	testq	%rax, %rax
	je	LBB0_3
## %bb.4:
	movabsq	$4835703278458516699, %rcx      ## imm = 0x431BDE82D7B634DB
	mulq	%rcx
	movq	%rdx, %rax
	shrq	$18, %rax
	movq	_OMAP_CTRL_PIPE3_PHY_PWRCTL_CLK_FREQ_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shlq	%cl, %rax
	movq	_OMAP_CTRL_PIPE3_PHY_PWRCTL_CLK_FREQ_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	movl	8(%r15), %esi
	movl	12(%r15), %edi
	movl	%eax, %ecx
	callq	_regmap_update_bits
	movq	_OMAP_CTRL_PIPE3_PHY_PWRCTL_CLK_CMD_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %r14d
	movq	(%r15), %rax
	movq	_PIPE3_MODE_SATA@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	sete	%dl
	movq	_PIPE3_MODE_USBSS@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	sete	%bl
	xorl	%ecx, %ecx
	orb	%dl, %bl
	movq	_PIPE3_PHY_TX_POWERON@GOTPCREL(%rip), %r12
	movq	_PIPE3_PHY_RX_POWERON@GOTPCREL(%rip), %r13
	jne	LBB0_6
## %bb.5:
	movl	(%r13), %ecx
LBB0_6:
	orl	(%r12), %ecx
	movl	12(%r15), %edi
	movl	8(%r15), %esi
	movl	%r14d, %edx
	callq	_regmap_update_bits
	cmpb	$1, %bl
	jne	LBB0_8
## %bb.7:
	movl	(%r13), %ecx
	orl	(%r12), %ecx
	movl	8(%r15), %esi
	movl	12(%r15), %edi
	movl	%r14d, %edx
	callq	_regmap_update_bits
LBB0_8:
	movq	(%r15), %rax
	movq	_PIPE3_MODE_PCIE@GOTPCREL(%rip), %rcx
	xorl	%ebx, %ebx
	cmpq	(%rcx), %rax
	jne	LBB0_10
## %bb.9:
	movq	%r15, %rdi
	callq	_ti_pipe3_calibrate
	jmp	LBB0_10
LBB0_1:
	movl	24(%r15), %edi
	movl	$1, %esi
	callq	_omap_control_phy_power
	xorl	%ebx, %ebx
	jmp	LBB0_10
LBB0_3:
	movl	16(%r15), %edi
	leaq	L_.str(%rip), %rsi
	callq	_dev_err
	movq	_EINVAL@GOTPCREL(%rip), %rax
	xorl	%ebx, %ebx
	subl	(%rax), %ebx
LBB0_10:
	movl	%ebx, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"Invalid clock rate\n"

	.comm	_EINVAL,4,2                     ## @EINVAL
	.comm	_OMAP_CTRL_PIPE3_PHY_PWRCTL_CLK_FREQ_MASK,4,2 ## @OMAP_CTRL_PIPE3_PHY_PWRCTL_CLK_FREQ_MASK
	.comm	_OMAP_CTRL_PIPE3_PHY_PWRCTL_CLK_FREQ_SHIFT,8,3 ## @OMAP_CTRL_PIPE3_PHY_PWRCTL_CLK_FREQ_SHIFT
	.comm	_OMAP_CTRL_PIPE3_PHY_PWRCTL_CLK_CMD_MASK,4,2 ## @OMAP_CTRL_PIPE3_PHY_PWRCTL_CLK_CMD_MASK
	.comm	_PIPE3_MODE_SATA,8,3            ## @PIPE3_MODE_SATA
	.comm	_PIPE3_MODE_USBSS,8,3           ## @PIPE3_MODE_USBSS
	.comm	_PIPE3_PHY_TX_POWERON,4,2       ## @PIPE3_PHY_TX_POWERON
	.comm	_PIPE3_PHY_RX_POWERON,4,2       ## @PIPE3_PHY_RX_POWERON
	.comm	_PIPE3_MODE_PCIE,8,3            ## @PIPE3_MODE_PCIE
	.no_dead_strip	_ti_pipe3_power_on
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function ti_pipe3_power_on
_ti_pipe3_power_on:                     ; @ti_pipe3_power_on
	.cfi_startproc
; %bb.0:
	stp	x24, x23, [sp, #-64]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	bl	_phy_get_drvdata
	mov	x19, x0
	ldr	w8, [x0, #12]
	cbz	w8, LBB0_6
; %bb.1:
	ldr	w0, [x19, #20]
	bl	_clk_get_rate
	cbz	x0, LBB0_8
; %bb.2:
	mov	x8, #13531
	movk	x8, #55222, lsl #16
	movk	x8, #56962, lsl #32
	movk	x8, #17179, lsl #48
	umulh	x8, x0, x8
	lsr	x8, x8, #18
Lloh0:
	adrp	x9, _OMAP_CTRL_PIPE3_PHY_PWRCTL_CLK_FREQ_MASK@GOTPAGE
Lloh1:
	ldr	x9, [x9, _OMAP_CTRL_PIPE3_PHY_PWRCTL_CLK_FREQ_MASK@GOTPAGEOFF]
Lloh2:
	ldr	w2, [x9]
Lloh3:
	adrp	x9, _OMAP_CTRL_PIPE3_PHY_PWRCTL_CLK_FREQ_SHIFT@GOTPAGE
Lloh4:
	ldr	x9, [x9, _OMAP_CTRL_PIPE3_PHY_PWRCTL_CLK_FREQ_SHIFT@GOTPAGEOFF]
Lloh5:
	ldr	x9, [x9]
	lsl	x3, x8, x9
	ldp	w1, w0, [x19, #8]
                                        ; kill: def $w3 killed $w3 killed $x3
	bl	_regmap_update_bits
Lloh6:
	adrp	x8, _OMAP_CTRL_PIPE3_PHY_PWRCTL_CLK_CMD_MASK@GOTPAGE
Lloh7:
	ldr	x8, [x8, _OMAP_CTRL_PIPE3_PHY_PWRCTL_CLK_CMD_MASK@GOTPAGEOFF]
Lloh8:
	ldr	w20, [x8]
Lloh9:
	adrp	x8, _PIPE3_MODE_SATA@GOTPAGE
Lloh10:
	ldr	x8, [x8, _PIPE3_MODE_SATA@GOTPAGEOFF]
	ldr	x9, [x19]
Lloh11:
	ldr	x8, [x8]
	cmp	x9, x8
Lloh12:
	adrp	x8, _PIPE3_MODE_USBSS@GOTPAGE
Lloh13:
	ldr	x8, [x8, _PIPE3_MODE_USBSS@GOTPAGEOFF]
Lloh14:
	ldr	x8, [x8]
	ccmp	x9, x8, #4, ne
	cset	w23, eq
Lloh15:
	adrp	x21, _PIPE3_PHY_TX_POWERON@GOTPAGE
Lloh16:
	ldr	x21, [x21, _PIPE3_PHY_TX_POWERON@GOTPAGEOFF]
Lloh17:
	adrp	x22, _PIPE3_PHY_RX_POWERON@GOTPAGE
Lloh18:
	ldr	x22, [x22, _PIPE3_PHY_RX_POWERON@GOTPAGEOFF]
	ldr	w8, [x21]
	ldr	w9, [x22]
	csel	w9, wzr, w9, eq
	orr	w3, w9, w8
	ldp	w1, w0, [x19, #8]
	mov	x2, x20
	bl	_regmap_update_bits
	cmp	w23, #1
	b.ne	LBB0_4
; %bb.3:
	ldr	w8, [x21]
	ldr	w9, [x22]
	orr	w3, w9, w8
	ldp	w1, w0, [x19, #8]
	mov	x2, x20
	bl	_regmap_update_bits
LBB0_4:
	ldr	x8, [x19]
Lloh19:
	adrp	x9, _PIPE3_MODE_PCIE@GOTPAGE
Lloh20:
	ldr	x9, [x9, _PIPE3_MODE_PCIE@GOTPAGEOFF]
Lloh21:
	ldr	x9, [x9]
	cmp	x8, x9
	b.ne	LBB0_7
; %bb.5:
	mov	x0, x19
	bl	_ti_pipe3_calibrate
	b	LBB0_7
LBB0_6:
	ldr	w0, [x19, #24]
	mov	w1, #1
	bl	_omap_control_phy_power
LBB0_7:
	mov	w0, #0
	b	LBB0_9
LBB0_8:
	ldr	w0, [x19, #16]
Lloh22:
	adrp	x1, l_.str@PAGE
Lloh23:
	add	x1, x1, l_.str@PAGEOFF
	bl	_dev_err
Lloh24:
	adrp	x8, _EINVAL@GOTPAGE
Lloh25:
	ldr	x8, [x8, _EINVAL@GOTPAGEOFF]
Lloh26:
	ldr	w8, [x8]
	neg	w0, w8
LBB0_9:
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGot	Lloh17, Lloh18
	.loh AdrpLdrGot	Lloh15, Lloh16
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh19, Lloh20, Lloh21
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.loh AdrpAdd	Lloh22, Lloh23
	.cfi_endproc
                                        ; -- End function
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"Invalid clock rate\n"

	.comm	_EINVAL,4,2                     ; @EINVAL
	.comm	_OMAP_CTRL_PIPE3_PHY_PWRCTL_CLK_FREQ_MASK,4,2 ; @OMAP_CTRL_PIPE3_PHY_PWRCTL_CLK_FREQ_MASK
	.comm	_OMAP_CTRL_PIPE3_PHY_PWRCTL_CLK_FREQ_SHIFT,8,3 ; @OMAP_CTRL_PIPE3_PHY_PWRCTL_CLK_FREQ_SHIFT
	.comm	_OMAP_CTRL_PIPE3_PHY_PWRCTL_CLK_CMD_MASK,4,2 ; @OMAP_CTRL_PIPE3_PHY_PWRCTL_CLK_CMD_MASK
	.comm	_PIPE3_MODE_SATA,8,3            ; @PIPE3_MODE_SATA
	.comm	_PIPE3_MODE_USBSS,8,3           ; @PIPE3_MODE_USBSS
	.comm	_PIPE3_PHY_TX_POWERON,4,2       ; @PIPE3_PHY_TX_POWERON
	.comm	_PIPE3_PHY_RX_POWERON,4,2       ; @PIPE3_PHY_RX_POWERON
	.comm	_PIPE3_MODE_PCIE,8,3            ; @PIPE3_MODE_PCIE
	.no_dead_strip	_ti_pipe3_power_on
.subsections_via_symbols
