	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function sunxi_pinctrl_set_io_bias_cfg
_sunxi_pinctrl_set_io_bias_cfg:         ## @sunxi_pinctrl_set_io_bias_cfg
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdx, %rcx
	movl	%esi, %ebx
	movq	_PINS_PER_BANK@GOTPCREL(%rip), %rsi
	movl	%ebx, %eax
	xorl	%edx, %edx
	divl	(%rsi)
	movl	%eax, %r12d
	xorl	%r14d, %r14d
	movq	16(%rdi), %rax
	cmpl	$0, (%rax)
	je	LBB0_13
## %bb.1:
	movq	%rdi, %r15
	movq	%rcx, %rdi
	callq	_regulator_get_voltage
	testl	%eax, %eax
	js	LBB0_2
## %bb.3:
	je	LBB0_13
## %bb.4:
	movq	16(%r15), %rcx
	movl	(%rcx), %edx
	cmpl	$128, %edx
	je	LBB0_11
## %bb.5:
	cmpl	$129, %edx
	jne	LBB0_12
## %bb.6:
	xorl	%r14d, %r14d
	movl	$0, %r13d
	cmpl	$1800001, %eax                  ## imm = 0x1B7741
	jb	LBB0_10
## %bb.7:
	movl	$6, %r13d
	cmpl	$2500001, %eax                  ## imm = 0x2625A1
	jb	LBB0_10
## %bb.8:
	movl	$9, %r13d
	cmpl	$2800001, %eax                  ## imm = 0x2AB981
	jb	LBB0_10
## %bb.9:
	xorl	%edx, %edx
	cmpl	$3000001, %eax                  ## imm = 0x2DC6C1
	setae	%dl
	leal	(%rdx,%rdx,2), %r13d
	addl	$10, %r13d
LBB0_10:
	subl	4(%rcx), %ebx
	movq	8(%r15), %r12
	movl	%ebx, %edi
	callq	_sunxi_grp_config_reg
	addq	%rax, %r12
	movq	%r12, %rdi
	callq	_readl
	movq	_IO_BIAS_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %r12d
	notl	%r12d
	andl	%eax, %r12d
	orl	%r13d, %r12d
	movq	8(%r15), %r15
	movl	%ebx, %edi
	callq	_sunxi_grp_config_reg
	addq	%rax, %r15
	movl	%r12d, %edi
	movq	%r15, %rsi
	callq	_writel
	jmp	LBB0_13
LBB0_2:
	movl	%eax, %r14d
	jmp	LBB0_13
LBB0_11:
	xorl	%ebx, %ebx
	cmpl	$1800001, %eax                  ## imm = 0x1B7741
	setb	%bl
	movq	%r15, %rdi
	callq	_raw_spin_lock_irqsave
	movq	_PIO_POW_MOD_SEL_REG@GOTPCREL(%rip), %r13
	movq	(%r13), %rdi
	addq	8(%r15), %rdi
	callq	_readl
	btrl	%r12d, %eax
	movl	%r12d, %ecx
	shll	%cl, %ebx
	orl	%eax, %ebx
	movq	(%r13), %rsi
	addq	8(%r15), %rsi
	movl	%ebx, %edi
	callq	_writel
	movq	%r15, %rdi
	callq	_raw_spin_unlock_irqrestore
	jmp	LBB0_13
LBB0_12:
	movq	_EINVAL@GOTPCREL(%rip), %rax
	xorl	%r14d, %r14d
	subl	(%rax), %r14d
LBB0_13:
	movl	%r14d, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_PINS_PER_BANK,4,2              ## @PINS_PER_BANK
	.comm	_IO_BIAS_MASK,4,2               ## @IO_BIAS_MASK
	.comm	_PIO_POW_MOD_SEL_REG,8,3        ## @PIO_POW_MOD_SEL_REG
	.comm	_EINVAL,4,2                     ## @EINVAL
	.no_dead_strip	_sunxi_pinctrl_set_io_bias_cfg
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function sunxi_pinctrl_set_io_bias_cfg
_sunxi_pinctrl_set_io_bias_cfg:         ; @sunxi_pinctrl_set_io_bias_cfg
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	ldr	x8, [x0, #16]
	ldr	w8, [x8]
	cbz	w8, LBB0_7
; %bb.1:
	mov	x20, x1
	mov	x19, x0
Lloh0:
	adrp	x8, _PINS_PER_BANK@GOTPAGE
Lloh1:
	ldr	x8, [x8, _PINS_PER_BANK@GOTPAGEOFF]
Lloh2:
	ldr	w21, [x8]
	mov	x0, x2
	bl	_regulator_get_voltage
	tbnz	w0, #31, LBB0_8
; %bb.2:
	cbz	w0, LBB0_8
; %bb.3:
	ldr	x8, [x19, #16]
	ldr	w9, [x8]
	cmp	w9, #128
	b.eq	LBB0_6
; %bb.4:
	cmp	w9, #129
	b.ne	LBB0_9
; %bb.5:
	mov	w9, #30529
	movk	w9, #27, lsl #16
	mov	w10, #6
	mov	w11, #9633
	movk	w11, #38, lsl #16
	mov	w12, #9
	mov	w13, #47489
	movk	w13, #42, lsl #16
	mov	w14, #50881
	movk	w14, #45, lsl #16
	mov	w15, #13
	mov	w16, #10
	cmp	w0, w14
	csel	w14, w16, w15, lo
	cmp	w0, w13
	csel	w12, w12, w14, lo
	cmp	w0, w11
	csel	w10, w10, w12, lo
	cmp	w0, w9
	csel	w21, wzr, w10, lo
	ldr	w8, [x8, #4]
	sub	w20, w20, w8
	ldr	x22, [x19, #8]
	mov	x0, x20
	bl	_sunxi_grp_config_reg
	add	x0, x0, x22
	bl	_readl
Lloh3:
	adrp	x8, _IO_BIAS_MASK@GOTPAGE
Lloh4:
	ldr	x8, [x8, _IO_BIAS_MASK@GOTPAGEOFF]
Lloh5:
	ldr	w8, [x8]
	bic	w8, w0, w8
	orr	w21, w8, w21
	ldr	x19, [x19, #8]
	mov	x0, x20
	bl	_sunxi_grp_config_reg
	add	x1, x0, x19
	mov	x0, x21
	bl	_writel
	b	LBB0_7
LBB0_6:
	mov	w8, #30529
	movk	w8, #27, lsl #16
	cmp	w0, w8
	cset	w22, lo
	udiv	w20, w20, w21
	mov	x0, x19
	bl	_raw_spin_lock_irqsave
	ldr	x8, [x19, #8]
Lloh6:
	adrp	x21, _PIO_POW_MOD_SEL_REG@GOTPAGE
Lloh7:
	ldr	x21, [x21, _PIO_POW_MOD_SEL_REG@GOTPAGEOFF]
	ldr	x9, [x21]
	add	x0, x9, x8
	bl	_readl
	mov	w8, #1
	lsl	w8, w8, w20
	bic	w8, w0, w8
	lsl	w9, w22, w20
	orr	w0, w8, w9
	ldr	x8, [x19, #8]
	ldr	x9, [x21]
	add	x1, x9, x8
	bl	_writel
	mov	x0, x19
	bl	_raw_spin_unlock_irqrestore
LBB0_7:
	mov	w0, #0
LBB0_8:
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
LBB0_9:
Lloh8:
	adrp	x8, _EINVAL@GOTPAGE
Lloh9:
	ldr	x8, [x8, _EINVAL@GOTPAGEOFF]
Lloh10:
	ldr	w8, [x8]
	neg	w0, w8
	b	LBB0_8
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGot	Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.cfi_endproc
                                        ; -- End function
	.comm	_PINS_PER_BANK,4,2              ; @PINS_PER_BANK
	.comm	_IO_BIAS_MASK,4,2               ; @IO_BIAS_MASK
	.comm	_PIO_POW_MOD_SEL_REG,8,3        ; @PIO_POW_MOD_SEL_REG
	.comm	_EINVAL,4,2                     ; @EINVAL
	.no_dead_strip	_sunxi_pinctrl_set_io_bias_cfg
.subsections_via_symbols
