	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function mvpp2_axi_init
_mvpp2_axi_init:                        ## @mvpp2_axi_init
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r14
	movq	_MVPP22_BM_ADDR_HIGH_RLS_REG@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	xorl	%edx, %edx
	callq	_mvpp2_write
	movq	_MVPP22_AXI_CODE_CACHE_RD_CACHE@GOTPCREL(%rip), %rax
	movl	(%rax), %r15d
	movq	_MVPP22_AXI_ATTR_CACHE_OFFS@GOTPCREL(%rip), %rax
	movb	(%rax), %al
	movl	%eax, %ecx
	shll	%cl, %r15d
	movq	_MVPP22_AXI_CODE_DOMAIN_OUTER_DOM@GOTPCREL(%rip), %r12
	movl	(%r12), %edx
	movq	_MVPP22_AXI_ATTR_DOMAIN_OFFS@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shll	%cl, %edx
	movq	_MVPP22_AXI_CODE_CACHE_WR_CACHE@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ebx
	movl	%eax, %ecx
	shll	%cl, %ebx
	orl	%edx, %r15d
	orl	%edx, %ebx
	movq	_MVPP22_AXI_BM_WR_ATTR_REG@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	movl	%ebx, %edx
	callq	_mvpp2_write
	movq	_MVPP22_AXI_BM_RD_ATTR_REG@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	movl	%r15d, %edx
	callq	_mvpp2_write
	movq	_MVPP22_AXI_AGGRQ_DESCR_RD_ATTR_REG@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	movl	%r15d, %edx
	callq	_mvpp2_write
	movq	_MVPP22_AXI_TXQ_DESCR_WR_ATTR_REG@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	movl	%ebx, %edx
	callq	_mvpp2_write
	movq	_MVPP22_AXI_TXQ_DESCR_RD_ATTR_REG@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	movl	%r15d, %edx
	callq	_mvpp2_write
	movq	_MVPP22_AXI_RXQ_DESCR_WR_ATTR_REG@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	movl	%ebx, %edx
	callq	_mvpp2_write
	movq	_MVPP22_AXI_TX_DATA_RD_ATTR_REG@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	movl	%r15d, %edx
	callq	_mvpp2_write
	movq	_MVPP22_AXI_RX_DATA_WR_ATTR_REG@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	movl	%ebx, %edx
	callq	_mvpp2_write
	movq	_MVPP22_AXI_CODE_CACHE_NON_CACHE@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movq	_MVPP22_AXI_CODE_CACHE_OFFS@GOTPCREL(%rip), %r15
	movb	(%r15), %cl
	shll	%cl, %eax
	movq	_MVPP22_AXI_CODE_DOMAIN_SYSTEM@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ebx
	movq	_MVPP22_AXI_CODE_DOMAIN_OFFS@GOTPCREL(%rip), %r13
	movb	(%r13), %cl
	shll	%cl, %ebx
	orl	%eax, %ebx
	movq	_MVPP22_AXI_RD_NORMAL_CODE_REG@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	movl	%ebx, %edx
	callq	_mvpp2_write
	movq	_MVPP22_AXI_WR_NORMAL_CODE_REG@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	movl	%ebx, %edx
	callq	_mvpp2_write
	movq	_MVPP22_AXI_CODE_CACHE_RD_CACHE@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movb	(%r15), %cl
	shll	%cl, %eax
	movl	(%r12), %edx
	movb	(%r13), %cl
	shll	%cl, %edx
	orl	%eax, %edx
	movq	_MVPP22_AXI_RD_SNOOP_CODE_REG@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	callq	_mvpp2_write
	movq	_MVPP22_AXI_CODE_CACHE_WR_CACHE@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movb	(%r15), %cl
	shll	%cl, %eax
	movl	(%r12), %edx
	movb	(%r13), %cl
	shll	%cl, %edx
	orl	%eax, %edx
	movq	_MVPP22_AXI_WR_SNOOP_CODE_REG@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_mvpp2_write                    ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_MVPP22_BM_ADDR_HIGH_RLS_REG,4,2 ## @MVPP22_BM_ADDR_HIGH_RLS_REG
	.comm	_MVPP22_AXI_CODE_CACHE_RD_CACHE,4,2 ## @MVPP22_AXI_CODE_CACHE_RD_CACHE
	.comm	_MVPP22_AXI_ATTR_CACHE_OFFS,4,2 ## @MVPP22_AXI_ATTR_CACHE_OFFS
	.comm	_MVPP22_AXI_CODE_DOMAIN_OUTER_DOM,4,2 ## @MVPP22_AXI_CODE_DOMAIN_OUTER_DOM
	.comm	_MVPP22_AXI_ATTR_DOMAIN_OFFS,4,2 ## @MVPP22_AXI_ATTR_DOMAIN_OFFS
	.comm	_MVPP22_AXI_CODE_CACHE_WR_CACHE,4,2 ## @MVPP22_AXI_CODE_CACHE_WR_CACHE
	.comm	_MVPP22_AXI_BM_WR_ATTR_REG,4,2  ## @MVPP22_AXI_BM_WR_ATTR_REG
	.comm	_MVPP22_AXI_BM_RD_ATTR_REG,4,2  ## @MVPP22_AXI_BM_RD_ATTR_REG
	.comm	_MVPP22_AXI_AGGRQ_DESCR_RD_ATTR_REG,4,2 ## @MVPP22_AXI_AGGRQ_DESCR_RD_ATTR_REG
	.comm	_MVPP22_AXI_TXQ_DESCR_WR_ATTR_REG,4,2 ## @MVPP22_AXI_TXQ_DESCR_WR_ATTR_REG
	.comm	_MVPP22_AXI_TXQ_DESCR_RD_ATTR_REG,4,2 ## @MVPP22_AXI_TXQ_DESCR_RD_ATTR_REG
	.comm	_MVPP22_AXI_RXQ_DESCR_WR_ATTR_REG,4,2 ## @MVPP22_AXI_RXQ_DESCR_WR_ATTR_REG
	.comm	_MVPP22_AXI_TX_DATA_RD_ATTR_REG,4,2 ## @MVPP22_AXI_TX_DATA_RD_ATTR_REG
	.comm	_MVPP22_AXI_RX_DATA_WR_ATTR_REG,4,2 ## @MVPP22_AXI_RX_DATA_WR_ATTR_REG
	.comm	_MVPP22_AXI_CODE_CACHE_NON_CACHE,4,2 ## @MVPP22_AXI_CODE_CACHE_NON_CACHE
	.comm	_MVPP22_AXI_CODE_CACHE_OFFS,4,2 ## @MVPP22_AXI_CODE_CACHE_OFFS
	.comm	_MVPP22_AXI_CODE_DOMAIN_SYSTEM,4,2 ## @MVPP22_AXI_CODE_DOMAIN_SYSTEM
	.comm	_MVPP22_AXI_CODE_DOMAIN_OFFS,4,2 ## @MVPP22_AXI_CODE_DOMAIN_OFFS
	.comm	_MVPP22_AXI_RD_NORMAL_CODE_REG,4,2 ## @MVPP22_AXI_RD_NORMAL_CODE_REG
	.comm	_MVPP22_AXI_WR_NORMAL_CODE_REG,4,2 ## @MVPP22_AXI_WR_NORMAL_CODE_REG
	.comm	_MVPP22_AXI_RD_SNOOP_CODE_REG,4,2 ## @MVPP22_AXI_RD_SNOOP_CODE_REG
	.comm	_MVPP22_AXI_WR_SNOOP_CODE_REG,4,2 ## @MVPP22_AXI_WR_SNOOP_CODE_REG
	.no_dead_strip	_mvpp2_axi_init
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function mvpp2_axi_init
_mvpp2_axi_init:                        ; @mvpp2_axi_init
	.cfi_startproc
; %bb.0:
	stp	x26, x25, [sp, #-80]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	mov	x19, x0
Lloh0:
	adrp	x8, _MVPP22_BM_ADDR_HIGH_RLS_REG@GOTPAGE
Lloh1:
	ldr	x8, [x8, _MVPP22_BM_ADDR_HIGH_RLS_REG@GOTPAGEOFF]
Lloh2:
	ldr	w1, [x8]
	mov	w2, #0
	bl	_mvpp2_write
Lloh3:
	adrp	x24, _MVPP22_AXI_CODE_CACHE_RD_CACHE@GOTPAGE
Lloh4:
	ldr	x24, [x24, _MVPP22_AXI_CODE_CACHE_RD_CACHE@GOTPAGEOFF]
	ldr	w8, [x24]
Lloh5:
	adrp	x9, _MVPP22_AXI_ATTR_CACHE_OFFS@GOTPAGE
Lloh6:
	ldr	x9, [x9, _MVPP22_AXI_ATTR_CACHE_OFFS@GOTPAGEOFF]
Lloh7:
	ldr	w9, [x9]
	lsl	w8, w8, w9
Lloh8:
	adrp	x22, _MVPP22_AXI_CODE_DOMAIN_OUTER_DOM@GOTPAGE
Lloh9:
	ldr	x22, [x22, _MVPP22_AXI_CODE_DOMAIN_OUTER_DOM@GOTPAGEOFF]
Lloh10:
	adrp	x10, _MVPP22_AXI_ATTR_DOMAIN_OFFS@GOTPAGE
Lloh11:
	ldr	x10, [x10, _MVPP22_AXI_ATTR_DOMAIN_OFFS@GOTPAGEOFF]
	ldr	w11, [x22]
Lloh12:
	ldr	w10, [x10]
	lsl	w10, w11, w10
	orr	w21, w10, w8
Lloh13:
	adrp	x23, _MVPP22_AXI_CODE_CACHE_WR_CACHE@GOTPAGE
Lloh14:
	ldr	x23, [x23, _MVPP22_AXI_CODE_CACHE_WR_CACHE@GOTPAGEOFF]
	ldr	w8, [x23]
	lsl	w8, w8, w9
	orr	w20, w8, w10
Lloh15:
	adrp	x8, _MVPP22_AXI_BM_WR_ATTR_REG@GOTPAGE
Lloh16:
	ldr	x8, [x8, _MVPP22_AXI_BM_WR_ATTR_REG@GOTPAGEOFF]
Lloh17:
	ldr	w1, [x8]
	mov	x0, x19
	mov	x2, x20
	bl	_mvpp2_write
Lloh18:
	adrp	x8, _MVPP22_AXI_BM_RD_ATTR_REG@GOTPAGE
Lloh19:
	ldr	x8, [x8, _MVPP22_AXI_BM_RD_ATTR_REG@GOTPAGEOFF]
Lloh20:
	ldr	w1, [x8]
	mov	x0, x19
	mov	x2, x21
	bl	_mvpp2_write
Lloh21:
	adrp	x8, _MVPP22_AXI_AGGRQ_DESCR_RD_ATTR_REG@GOTPAGE
Lloh22:
	ldr	x8, [x8, _MVPP22_AXI_AGGRQ_DESCR_RD_ATTR_REG@GOTPAGEOFF]
Lloh23:
	ldr	w1, [x8]
	mov	x0, x19
	mov	x2, x21
	bl	_mvpp2_write
Lloh24:
	adrp	x8, _MVPP22_AXI_TXQ_DESCR_WR_ATTR_REG@GOTPAGE
Lloh25:
	ldr	x8, [x8, _MVPP22_AXI_TXQ_DESCR_WR_ATTR_REG@GOTPAGEOFF]
Lloh26:
	ldr	w1, [x8]
	mov	x0, x19
	mov	x2, x20
	bl	_mvpp2_write
Lloh27:
	adrp	x8, _MVPP22_AXI_TXQ_DESCR_RD_ATTR_REG@GOTPAGE
Lloh28:
	ldr	x8, [x8, _MVPP22_AXI_TXQ_DESCR_RD_ATTR_REG@GOTPAGEOFF]
Lloh29:
	ldr	w1, [x8]
	mov	x0, x19
	mov	x2, x21
	bl	_mvpp2_write
Lloh30:
	adrp	x8, _MVPP22_AXI_RXQ_DESCR_WR_ATTR_REG@GOTPAGE
Lloh31:
	ldr	x8, [x8, _MVPP22_AXI_RXQ_DESCR_WR_ATTR_REG@GOTPAGEOFF]
Lloh32:
	ldr	w1, [x8]
	mov	x0, x19
	mov	x2, x20
	bl	_mvpp2_write
Lloh33:
	adrp	x8, _MVPP22_AXI_TX_DATA_RD_ATTR_REG@GOTPAGE
Lloh34:
	ldr	x8, [x8, _MVPP22_AXI_TX_DATA_RD_ATTR_REG@GOTPAGEOFF]
Lloh35:
	ldr	w1, [x8]
	mov	x0, x19
	mov	x2, x21
	bl	_mvpp2_write
Lloh36:
	adrp	x8, _MVPP22_AXI_RX_DATA_WR_ATTR_REG@GOTPAGE
Lloh37:
	ldr	x8, [x8, _MVPP22_AXI_RX_DATA_WR_ATTR_REG@GOTPAGEOFF]
Lloh38:
	ldr	w1, [x8]
	mov	x0, x19
	mov	x2, x20
	bl	_mvpp2_write
Lloh39:
	adrp	x8, _MVPP22_AXI_CODE_CACHE_NON_CACHE@GOTPAGE
Lloh40:
	ldr	x8, [x8, _MVPP22_AXI_CODE_CACHE_NON_CACHE@GOTPAGEOFF]
Lloh41:
	ldr	w8, [x8]
Lloh42:
	adrp	x21, _MVPP22_AXI_CODE_CACHE_OFFS@GOTPAGE
Lloh43:
	ldr	x21, [x21, _MVPP22_AXI_CODE_CACHE_OFFS@GOTPAGEOFF]
	ldr	w9, [x21]
	lsl	w8, w8, w9
Lloh44:
	adrp	x9, _MVPP22_AXI_CODE_DOMAIN_SYSTEM@GOTPAGE
Lloh45:
	ldr	x9, [x9, _MVPP22_AXI_CODE_DOMAIN_SYSTEM@GOTPAGEOFF]
Lloh46:
	ldr	w9, [x9]
Lloh47:
	adrp	x25, _MVPP22_AXI_CODE_DOMAIN_OFFS@GOTPAGE
Lloh48:
	ldr	x25, [x25, _MVPP22_AXI_CODE_DOMAIN_OFFS@GOTPAGEOFF]
	ldr	w10, [x25]
	lsl	w9, w9, w10
	orr	w20, w9, w8
Lloh49:
	adrp	x8, _MVPP22_AXI_RD_NORMAL_CODE_REG@GOTPAGE
Lloh50:
	ldr	x8, [x8, _MVPP22_AXI_RD_NORMAL_CODE_REG@GOTPAGEOFF]
Lloh51:
	ldr	w1, [x8]
	mov	x0, x19
	mov	x2, x20
	bl	_mvpp2_write
Lloh52:
	adrp	x8, _MVPP22_AXI_WR_NORMAL_CODE_REG@GOTPAGE
Lloh53:
	ldr	x8, [x8, _MVPP22_AXI_WR_NORMAL_CODE_REG@GOTPAGEOFF]
Lloh54:
	ldr	w1, [x8]
	mov	x0, x19
	mov	x2, x20
	bl	_mvpp2_write
	ldr	w8, [x24]
	ldr	w9, [x21]
	lsl	w8, w8, w9
	ldr	w9, [x22]
	ldr	w10, [x25]
	lsl	w9, w9, w10
	orr	w2, w9, w8
Lloh55:
	adrp	x8, _MVPP22_AXI_RD_SNOOP_CODE_REG@GOTPAGE
Lloh56:
	ldr	x8, [x8, _MVPP22_AXI_RD_SNOOP_CODE_REG@GOTPAGEOFF]
Lloh57:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_mvpp2_write
	ldr	w8, [x23]
	ldr	w9, [x21]
	lsl	w8, w8, w9
	ldr	w9, [x22]
	ldr	w10, [x25]
	lsl	w9, w9, w10
	orr	w2, w9, w8
Lloh58:
	adrp	x8, _MVPP22_AXI_WR_SNOOP_CODE_REG@GOTPAGE
Lloh59:
	ldr	x8, [x8, _MVPP22_AXI_WR_SNOOP_CODE_REG@GOTPAGEOFF]
Lloh60:
	ldr	w1, [x8]
	mov	x0, x19
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp], #80             ; 16-byte Folded Reload
	b	_mvpp2_write
	.loh AdrpLdrGotLdr	Lloh58, Lloh59, Lloh60
	.loh AdrpLdrGotLdr	Lloh55, Lloh56, Lloh57
	.loh AdrpLdrGotLdr	Lloh52, Lloh53, Lloh54
	.loh AdrpLdrGotLdr	Lloh49, Lloh50, Lloh51
	.loh AdrpLdrGot	Lloh47, Lloh48
	.loh AdrpLdrGotLdr	Lloh44, Lloh45, Lloh46
	.loh AdrpLdrGot	Lloh42, Lloh43
	.loh AdrpLdrGotLdr	Lloh39, Lloh40, Lloh41
	.loh AdrpLdrGotLdr	Lloh36, Lloh37, Lloh38
	.loh AdrpLdrGotLdr	Lloh33, Lloh34, Lloh35
	.loh AdrpLdrGotLdr	Lloh30, Lloh31, Lloh32
	.loh AdrpLdrGotLdr	Lloh27, Lloh28, Lloh29
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGot	Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh10, Lloh11, Lloh12
	.loh AdrpLdrGot	Lloh8, Lloh9
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGot	Lloh3, Lloh4
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_MVPP22_BM_ADDR_HIGH_RLS_REG,4,2 ; @MVPP22_BM_ADDR_HIGH_RLS_REG
	.comm	_MVPP22_AXI_CODE_CACHE_RD_CACHE,4,2 ; @MVPP22_AXI_CODE_CACHE_RD_CACHE
	.comm	_MVPP22_AXI_ATTR_CACHE_OFFS,4,2 ; @MVPP22_AXI_ATTR_CACHE_OFFS
	.comm	_MVPP22_AXI_CODE_DOMAIN_OUTER_DOM,4,2 ; @MVPP22_AXI_CODE_DOMAIN_OUTER_DOM
	.comm	_MVPP22_AXI_ATTR_DOMAIN_OFFS,4,2 ; @MVPP22_AXI_ATTR_DOMAIN_OFFS
	.comm	_MVPP22_AXI_CODE_CACHE_WR_CACHE,4,2 ; @MVPP22_AXI_CODE_CACHE_WR_CACHE
	.comm	_MVPP22_AXI_BM_WR_ATTR_REG,4,2  ; @MVPP22_AXI_BM_WR_ATTR_REG
	.comm	_MVPP22_AXI_BM_RD_ATTR_REG,4,2  ; @MVPP22_AXI_BM_RD_ATTR_REG
	.comm	_MVPP22_AXI_AGGRQ_DESCR_RD_ATTR_REG,4,2 ; @MVPP22_AXI_AGGRQ_DESCR_RD_ATTR_REG
	.comm	_MVPP22_AXI_TXQ_DESCR_WR_ATTR_REG,4,2 ; @MVPP22_AXI_TXQ_DESCR_WR_ATTR_REG
	.comm	_MVPP22_AXI_TXQ_DESCR_RD_ATTR_REG,4,2 ; @MVPP22_AXI_TXQ_DESCR_RD_ATTR_REG
	.comm	_MVPP22_AXI_RXQ_DESCR_WR_ATTR_REG,4,2 ; @MVPP22_AXI_RXQ_DESCR_WR_ATTR_REG
	.comm	_MVPP22_AXI_TX_DATA_RD_ATTR_REG,4,2 ; @MVPP22_AXI_TX_DATA_RD_ATTR_REG
	.comm	_MVPP22_AXI_RX_DATA_WR_ATTR_REG,4,2 ; @MVPP22_AXI_RX_DATA_WR_ATTR_REG
	.comm	_MVPP22_AXI_CODE_CACHE_NON_CACHE,4,2 ; @MVPP22_AXI_CODE_CACHE_NON_CACHE
	.comm	_MVPP22_AXI_CODE_CACHE_OFFS,4,2 ; @MVPP22_AXI_CODE_CACHE_OFFS
	.comm	_MVPP22_AXI_CODE_DOMAIN_SYSTEM,4,2 ; @MVPP22_AXI_CODE_DOMAIN_SYSTEM
	.comm	_MVPP22_AXI_CODE_DOMAIN_OFFS,4,2 ; @MVPP22_AXI_CODE_DOMAIN_OFFS
	.comm	_MVPP22_AXI_RD_NORMAL_CODE_REG,4,2 ; @MVPP22_AXI_RD_NORMAL_CODE_REG
	.comm	_MVPP22_AXI_WR_NORMAL_CODE_REG,4,2 ; @MVPP22_AXI_WR_NORMAL_CODE_REG
	.comm	_MVPP22_AXI_RD_SNOOP_CODE_REG,4,2 ; @MVPP22_AXI_RD_SNOOP_CODE_REG
	.comm	_MVPP22_AXI_WR_SNOOP_CODE_REG,4,2 ; @MVPP22_AXI_WR_SNOOP_CODE_REG
	.no_dead_strip	_mvpp2_axi_init
.subsections_via_symbols
