	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function link_status_10g_mrvl
_link_status_10g_mrvl:                  ## @link_status_10g_mrvl
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$24, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rsi, %r14
	movq	%rdi, %r12
	movl	8(%rdi), %esi
	movq	_MRVL88X2011_USER_DEV1_ADDR@GOTPCREL(%rip), %r15
	movl	(%r15), %edx
	movq	_MRVL88X2011_10G_PMD_STATUS_2@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	callq	_mdio_read
	testl	%eax, %eax
	js	LBB0_9
## %bb.1:
	movl	8(%r12), %esi
	movl	(%r15), %edx
	movq	_MRVL88X2011_PMA_PMD_STATUS_1@GOTPCREL(%rip), %r13
	movl	(%r13), %ecx
	movq	%r12, %rdi
	callq	_mdio_read
	movl	%eax, %r15d
	testl	%eax, %eax
	js	LBB0_10
## %bb.2:
	movq	%r14, -48(%rbp)                 ## 8-byte Spill
	movq	_MRVL88X2011_LNK_STATUS_OK@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, -52(%rbp)                 ## 4-byte Spill
	movl	8(%r12), %esi
	movq	_MRVL88X2011_USER_DEV3_ADDR@GOTPCREL(%rip), %r14
	movl	(%r14), %edx
	movl	(%r13), %ecx
	movq	%r12, %rdi
	callq	_mdio_read
	testl	%eax, %eax
	js	LBB0_11
## %bb.3:
	movl	8(%r12), %esi
	movl	(%r14), %edx
	movl	(%r13), %ecx
	movq	%r12, %rdi
	callq	_mdio_read
	movl	%eax, %r13d
	testl	%eax, %eax
	js	LBB0_12
## %bb.4:
	movq	_MRVL88X2011_LNK_STATUS_OK@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	movl	8(%r12), %esi
	movq	_MRVL88X2011_USER_DEV4_ADDR@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	_MRVL88X2011_10G_XGXS_LANE_STAT@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movq	%r12, %rdi
	callq	_mdio_read
	testl	%eax, %eax
	movq	-48(%rbp), %r14                 ## 8-byte Reload
	js	LBB0_9
## %bb.5:
	movl	%ebx, %r8d
	movq	_PHYXS_XGXS_LANE_STAT_ALINGED@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	movq	_PHYXS_XGXS_LANE_STAT_LANE3@GOTPCREL(%rip), %rdx
	movq	_PHYXS_XGXS_LANE_STAT_LANE2@GOTPCREL(%rip), %rsi
	movq	_PHYXS_XGXS_LANE_STAT_LANE1@GOTPCREL(%rip), %rdi
	movq	_PHYXS_XGXS_LANE_STAT_LANE0@GOTPCREL(%rip), %rbx
	orl	(%rdx), %ecx
	orl	(%rsi), %ecx
	orl	(%rdi), %ecx
	orl	(%rbx), %ecx
	movq	_PHYXS_XGXS_LANE_STAT_MAGIC@GOTPCREL(%rip), %rdx
	orl	(%rdx), %ecx
	orl	$2048, %ecx                     ## imm = 0x800
	xorl	%ebx, %ebx
	movq	_SPEED_10000@GOTPCREL(%rip), %rdx
	movl	(%rdx), %edx
	movl	%edx, 4(%r12)
	movq	_DUPLEX_FULL@GOTPCREL(%rip), %rdx
	movl	(%rdx), %edx
	movl	%edx, (%r12)
	cmpl	%ecx, %eax
	jne	LBB0_14
## %bb.6:
	xorl	%ebx, %ebx
	testl	%r15d, -52(%rbp)                ## 4-byte Folded Reload
	je	LBB0_14
## %bb.7:
	andl	%r13d, %r8d
	je	LBB0_14
## %bb.8:
	movq	_MRVL88X2011_LED_CTL_PCS_ACT@GOTPCREL(%rip), %rax
	movl	$1, %r15d
	jmp	LBB0_15
LBB0_9:
	movl	%eax, %ebx
	jmp	LBB0_14
LBB0_10:
	movl	%r15d, %ebx
	jmp	LBB0_14
LBB0_11:
	movl	%eax, %ebx
	jmp	LBB0_13
LBB0_12:
	movl	%r13d, %ebx
LBB0_13:
	movq	-48(%rbp), %r14                 ## 8-byte Reload
LBB0_14:
	movq	_MRVL88X2011_LED_CTL_OFF@GOTPCREL(%rip), %rax
	xorl	%r15d, %r15d
LBB0_15:
	movl	(%rax), %esi
	movq	%r12, %rdi
	callq	_mrvl88x2011_act_led
	movl	%r15d, (%r14)
	movl	%ebx, %eax
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_MRVL88X2011_USER_DEV1_ADDR,4,2 ## @MRVL88X2011_USER_DEV1_ADDR
	.comm	_MRVL88X2011_10G_PMD_STATUS_2,4,2 ## @MRVL88X2011_10G_PMD_STATUS_2
	.comm	_MRVL88X2011_PMA_PMD_STATUS_1,4,2 ## @MRVL88X2011_PMA_PMD_STATUS_1
	.comm	_MRVL88X2011_LNK_STATUS_OK,4,2  ## @MRVL88X2011_LNK_STATUS_OK
	.comm	_MRVL88X2011_USER_DEV3_ADDR,4,2 ## @MRVL88X2011_USER_DEV3_ADDR
	.comm	_MRVL88X2011_USER_DEV4_ADDR,4,2 ## @MRVL88X2011_USER_DEV4_ADDR
	.comm	_MRVL88X2011_10G_XGXS_LANE_STAT,4,2 ## @MRVL88X2011_10G_XGXS_LANE_STAT
	.comm	_PHYXS_XGXS_LANE_STAT_ALINGED,4,2 ## @PHYXS_XGXS_LANE_STAT_ALINGED
	.comm	_PHYXS_XGXS_LANE_STAT_LANE3,4,2 ## @PHYXS_XGXS_LANE_STAT_LANE3
	.comm	_PHYXS_XGXS_LANE_STAT_LANE2,4,2 ## @PHYXS_XGXS_LANE_STAT_LANE2
	.comm	_PHYXS_XGXS_LANE_STAT_LANE1,4,2 ## @PHYXS_XGXS_LANE_STAT_LANE1
	.comm	_PHYXS_XGXS_LANE_STAT_LANE0,4,2 ## @PHYXS_XGXS_LANE_STAT_LANE0
	.comm	_PHYXS_XGXS_LANE_STAT_MAGIC,4,2 ## @PHYXS_XGXS_LANE_STAT_MAGIC
	.comm	_SPEED_10000,4,2                ## @SPEED_10000
	.comm	_DUPLEX_FULL,4,2                ## @DUPLEX_FULL
	.comm	_MRVL88X2011_LED_CTL_PCS_ACT,4,2 ## @MRVL88X2011_LED_CTL_PCS_ACT
	.comm	_MRVL88X2011_LED_CTL_OFF,4,2    ## @MRVL88X2011_LED_CTL_OFF
	.no_dead_strip	_link_status_10g_mrvl
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function link_status_10g_mrvl
_link_status_10g_mrvl:                  ; @link_status_10g_mrvl
	.cfi_startproc
; %bb.0:
	stp	x26, x25, [sp, #-80]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	mov	x19, x1
	mov	x20, x0
	ldr	w1, [x0, #8]
Lloh0:
	adrp	x22, _MRVL88X2011_USER_DEV1_ADDR@GOTPAGE
Lloh1:
	ldr	x22, [x22, _MRVL88X2011_USER_DEV1_ADDR@GOTPAGEOFF]
	ldr	w2, [x22]
Lloh2:
	adrp	x8, _MRVL88X2011_10G_PMD_STATUS_2@GOTPAGE
Lloh3:
	ldr	x8, [x8, _MRVL88X2011_10G_PMD_STATUS_2@GOTPAGEOFF]
Lloh4:
	ldr	w3, [x8]
	bl	_mdio_read
	tbnz	w0, #31, LBB0_9
; %bb.1:
	ldr	w1, [x20, #8]
	ldr	w2, [x22]
Lloh5:
	adrp	x22, _MRVL88X2011_PMA_PMD_STATUS_1@GOTPAGE
Lloh6:
	ldr	x22, [x22, _MRVL88X2011_PMA_PMD_STATUS_1@GOTPAGEOFF]
	ldr	w3, [x22]
	mov	x0, x20
	bl	_mdio_read
	mov	x21, x0
	tbnz	w0, #31, LBB0_10
; %bb.2:
Lloh7:
	adrp	x24, _MRVL88X2011_LNK_STATUS_OK@GOTPAGE
Lloh8:
	ldr	x24, [x24, _MRVL88X2011_LNK_STATUS_OK@GOTPAGEOFF]
	ldr	w23, [x24]
	ldr	w1, [x20, #8]
Lloh9:
	adrp	x25, _MRVL88X2011_USER_DEV3_ADDR@GOTPAGE
Lloh10:
	ldr	x25, [x25, _MRVL88X2011_USER_DEV3_ADDR@GOTPAGEOFF]
	ldr	w2, [x25]
	ldr	w3, [x22]
	mov	x0, x20
	bl	_mdio_read
	tbnz	w0, #31, LBB0_9
; %bb.3:
	ldr	w1, [x20, #8]
	ldr	w2, [x25]
	ldr	w3, [x22]
	mov	x0, x20
	bl	_mdio_read
	mov	x22, x0
	tbnz	w0, #31, LBB0_12
; %bb.4:
	ldr	w24, [x24]
	ldr	w1, [x20, #8]
Lloh11:
	adrp	x8, _MRVL88X2011_USER_DEV4_ADDR@GOTPAGE
Lloh12:
	ldr	x8, [x8, _MRVL88X2011_USER_DEV4_ADDR@GOTPAGEOFF]
Lloh13:
	ldr	w2, [x8]
Lloh14:
	adrp	x8, _MRVL88X2011_10G_XGXS_LANE_STAT@GOTPAGE
Lloh15:
	ldr	x8, [x8, _MRVL88X2011_10G_XGXS_LANE_STAT@GOTPAGEOFF]
Lloh16:
	ldr	w3, [x8]
	mov	x0, x20
	bl	_mdio_read
	tbnz	w0, #31, LBB0_9
; %bb.5:
Lloh17:
	adrp	x8, _PHYXS_XGXS_LANE_STAT_ALINGED@GOTPAGE
Lloh18:
	ldr	x8, [x8, _PHYXS_XGXS_LANE_STAT_ALINGED@GOTPAGEOFF]
Lloh19:
	ldr	w8, [x8]
Lloh20:
	adrp	x9, _PHYXS_XGXS_LANE_STAT_LANE3@GOTPAGE
Lloh21:
	ldr	x9, [x9, _PHYXS_XGXS_LANE_STAT_LANE3@GOTPAGEOFF]
Lloh22:
	ldr	w9, [x9]
Lloh23:
	adrp	x10, _PHYXS_XGXS_LANE_STAT_LANE2@GOTPAGE
Lloh24:
	ldr	x10, [x10, _PHYXS_XGXS_LANE_STAT_LANE2@GOTPAGEOFF]
Lloh25:
	ldr	w10, [x10]
Lloh26:
	adrp	x11, _PHYXS_XGXS_LANE_STAT_LANE1@GOTPAGE
Lloh27:
	ldr	x11, [x11, _PHYXS_XGXS_LANE_STAT_LANE1@GOTPAGEOFF]
Lloh28:
	ldr	w11, [x11]
Lloh29:
	adrp	x12, _PHYXS_XGXS_LANE_STAT_LANE0@GOTPAGE
Lloh30:
	ldr	x12, [x12, _PHYXS_XGXS_LANE_STAT_LANE0@GOTPAGEOFF]
Lloh31:
	ldr	w12, [x12]
Lloh32:
	adrp	x13, _PHYXS_XGXS_LANE_STAT_MAGIC@GOTPAGE
Lloh33:
	ldr	x13, [x13, _PHYXS_XGXS_LANE_STAT_MAGIC@GOTPAGEOFF]
Lloh34:
	ldr	w13, [x13]
	orr	w8, w8, w9
	orr	w8, w8, w10
	orr	w8, w8, w11
	orr	w8, w8, w12
	orr	w8, w8, w13
	orr	w8, w8, #0x800
Lloh35:
	adrp	x9, _SPEED_10000@GOTPAGE
Lloh36:
	ldr	x9, [x9, _SPEED_10000@GOTPAGEOFF]
Lloh37:
	ldr	w9, [x9]
Lloh38:
	adrp	x10, _DUPLEX_FULL@GOTPAGE
Lloh39:
	ldr	x10, [x10, _DUPLEX_FULL@GOTPAGEOFF]
Lloh40:
	ldr	w10, [x10]
	stp	w10, w9, [x20]
	cmp	w0, w8
	b.ne	LBB0_13
; %bb.6:
	and	w8, w23, w21
	mov	w21, #0
	cbz	w8, LBB0_10
; %bb.7:
	and	w8, w24, w22
	cbz	w8, LBB0_10
; %bb.8:
Lloh41:
	adrp	x8, _MRVL88X2011_LED_CTL_PCS_ACT@GOTPAGE
Lloh42:
	ldr	x8, [x8, _MRVL88X2011_LED_CTL_PCS_ACT@GOTPAGEOFF]
	mov	w22, #1
	b	LBB0_11
LBB0_9:
	mov	x21, x0
LBB0_10:
	mov	w22, #0
Lloh43:
	adrp	x8, _MRVL88X2011_LED_CTL_OFF@GOTPAGE
Lloh44:
	ldr	x8, [x8, _MRVL88X2011_LED_CTL_OFF@GOTPAGEOFF]
LBB0_11:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_mrvl88x2011_act_led
	str	w22, [x19]
	mov	x0, x21
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp], #80             ; 16-byte Folded Reload
	ret
LBB0_12:
	mov	x21, x22
	b	LBB0_10
LBB0_13:
	mov	w21, #0
	b	LBB0_10
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGot	Lloh5, Lloh6
	.loh AdrpLdrGot	Lloh9, Lloh10
	.loh AdrpLdrGot	Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh16
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh38, Lloh39, Lloh40
	.loh AdrpLdrGotLdr	Lloh35, Lloh36, Lloh37
	.loh AdrpLdrGotLdr	Lloh32, Lloh33, Lloh34
	.loh AdrpLdrGotLdr	Lloh29, Lloh30, Lloh31
	.loh AdrpLdrGotLdr	Lloh26, Lloh27, Lloh28
	.loh AdrpLdrGotLdr	Lloh23, Lloh24, Lloh25
	.loh AdrpLdrGotLdr	Lloh20, Lloh21, Lloh22
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh19
	.loh AdrpLdrGot	Lloh41, Lloh42
	.loh AdrpLdrGot	Lloh43, Lloh44
	.cfi_endproc
                                        ; -- End function
	.comm	_MRVL88X2011_USER_DEV1_ADDR,4,2 ; @MRVL88X2011_USER_DEV1_ADDR
	.comm	_MRVL88X2011_10G_PMD_STATUS_2,4,2 ; @MRVL88X2011_10G_PMD_STATUS_2
	.comm	_MRVL88X2011_PMA_PMD_STATUS_1,4,2 ; @MRVL88X2011_PMA_PMD_STATUS_1
	.comm	_MRVL88X2011_LNK_STATUS_OK,4,2  ; @MRVL88X2011_LNK_STATUS_OK
	.comm	_MRVL88X2011_USER_DEV3_ADDR,4,2 ; @MRVL88X2011_USER_DEV3_ADDR
	.comm	_MRVL88X2011_USER_DEV4_ADDR,4,2 ; @MRVL88X2011_USER_DEV4_ADDR
	.comm	_MRVL88X2011_10G_XGXS_LANE_STAT,4,2 ; @MRVL88X2011_10G_XGXS_LANE_STAT
	.comm	_PHYXS_XGXS_LANE_STAT_ALINGED,4,2 ; @PHYXS_XGXS_LANE_STAT_ALINGED
	.comm	_PHYXS_XGXS_LANE_STAT_LANE3,4,2 ; @PHYXS_XGXS_LANE_STAT_LANE3
	.comm	_PHYXS_XGXS_LANE_STAT_LANE2,4,2 ; @PHYXS_XGXS_LANE_STAT_LANE2
	.comm	_PHYXS_XGXS_LANE_STAT_LANE1,4,2 ; @PHYXS_XGXS_LANE_STAT_LANE1
	.comm	_PHYXS_XGXS_LANE_STAT_LANE0,4,2 ; @PHYXS_XGXS_LANE_STAT_LANE0
	.comm	_PHYXS_XGXS_LANE_STAT_MAGIC,4,2 ; @PHYXS_XGXS_LANE_STAT_MAGIC
	.comm	_SPEED_10000,4,2                ; @SPEED_10000
	.comm	_DUPLEX_FULL,4,2                ; @DUPLEX_FULL
	.comm	_MRVL88X2011_LED_CTL_PCS_ACT,4,2 ; @MRVL88X2011_LED_CTL_PCS_ACT
	.comm	_MRVL88X2011_LED_CTL_OFF,4,2    ; @MRVL88X2011_LED_CTL_OFF
	.no_dead_strip	_link_status_10g_mrvl
.subsections_via_symbols
