	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_i40e_clear_hw                  ## -- Begin function i40e_clear_hw
	.p2align	4, 0x90
_i40e_clear_hw:                         ## @i40e_clear_hw
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$40, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r12
	movq	_I40E_GLPCI_CNF2@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_rd32
	movl	%eax, %r14d
	movq	_I40E_GLPCI_CNF2_MSI_X_PF_N_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %r13d
	andl	%r14d, %r13d
	movq	_I40E_GLPCI_CNF2_MSI_X_PF_N_SHIFT@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	sarl	%cl, %r13d
	movq	_I40E_GLPCI_CNF2_MSI_X_VF_N_MASK@GOTPCREL(%rip), %rax
	andl	(%rax), %r14d
	movq	_I40E_GLPCI_CNF2_MSI_X_VF_N_SHIFT@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	sarl	%cl, %r14d
	movq	_I40E_PFLAN_QALLOC@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r12, %rdi
	callq	_rd32
	movq	_I40E_PFLAN_QALLOC_FIRSTQ_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	andl	%eax, %esi
	movq	_I40E_PFLAN_QALLOC_FIRSTQ_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	sarl	%cl, %esi
	movq	_I40E_PFLAN_QALLOC_VALID_MASK@GOTPCREL(%rip), %rcx
	xorl	%ebx, %ebx
	movl	$0, %edx
	testl	%eax, (%rcx)
	je	LBB0_2
## %bb.1:
	movq	_I40E_PFLAN_QALLOC_LASTQ_MASK@GOTPCREL(%rip), %rcx
	andl	(%rcx), %eax
	movq	_I40E_PFLAN_QALLOC_LASTQ_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	sarl	%cl, %eax
	subl	%esi, %eax
	incl	%eax
	movl	%eax, %edx
LBB0_2:
	movq	%rsi, -64(%rbp)                 ## 8-byte Spill
	movl	%edx, -44(%rbp)                 ## 4-byte Spill
	movq	_I40E_PF_VT_PFALLOC@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r12, %rdi
	callq	_rd32
	movq	_I40E_PF_VT_PFALLOC_VALID_MASK@GOTPCREL(%rip), %rcx
	testl	%eax, (%rcx)
	je	LBB0_4
## %bb.3:
	movq	_I40E_PF_VT_PFALLOC_LASTVF_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ebx
	andl	%eax, %ebx
	movq	_I40E_PF_VT_PFALLOC_LASTVF_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	sarl	%cl, %ebx
	movq	_I40E_PF_VT_PFALLOC_FIRSTVF_MASK@GOTPCREL(%rip), %rcx
	andl	(%rcx), %eax
	movq	_I40E_PF_VT_PFALLOC_FIRSTVF_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	sarl	%cl, %eax
	subl	%eax, %ebx
	incl	%ebx
LBB0_4:
	movl	%ebx, -48(%rbp)                 ## 4-byte Spill
	movl	%r14d, -52(%rbp)                ## 4-byte Spill
	movq	_I40E_PFINT_ICR0_ENA@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	xorl	%ebx, %ebx
	movq	%r12, %rdi
	xorl	%edx, %edx
	callq	_wr32
	movq	_I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	movl	$3, %r15d
	shll	%cl, %r15d
	leal	-2(%r13), %r14d
	movq	%r13, -72(%rbp)                 ## 8-byte Spill
	cmpl	$3, %r13d
	jl	LBB0_6
	.p2align	4, 0x90
LBB0_5:                                 ## =>This Inner Loop Header: Depth=1
	movl	%ebx, %edi
	callq	_I40E_PFINT_DYN_CTLN
	movq	%r12, %rdi
	movl	%eax, %esi
	movl	%r15d, %edx
	callq	_wr32
	incl	%ebx
	cmpl	%ebx, %r14d
	jne	LBB0_5
LBB0_6:
	movq	_I40E_PFINT_LNKLST0_FIRSTQ_INDX_SHIFT@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	movl	$2047, %r13d                    ## imm = 0x7FF
	shll	%cl, %r13d
	movl	$2047, %r15d                    ## imm = 0x7FF
	movq	_I40E_PFINT_LNKLST0@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r12, %rdi
	movl	%r13d, %edx
	callq	_wr32
	cmpl	$3, -72(%rbp)                   ## 4-byte Folded Reload
	jl	LBB0_9
## %bb.7:
	xorl	%ebx, %ebx
	.p2align	4, 0x90
LBB0_8:                                 ## =>This Inner Loop Header: Depth=1
	movl	%ebx, %edi
	callq	_I40E_PFINT_LNKLSTN
	movq	%r12, %rdi
	movl	%eax, %esi
	movl	%r13d, %edx
	callq	_wr32
	incl	%ebx
	cmpl	%ebx, %r14d
	jne	LBB0_8
LBB0_9:
	movq	_I40E_VPINT_LNKLST0_FIRSTQ_INDX_SHIFT@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	shll	%cl, %r15d
	movl	-48(%rbp), %r14d                ## 4-byte Reload
	testl	%r14d, %r14d
	jle	LBB0_12
## %bb.10:
	xorl	%ebx, %ebx
	.p2align	4, 0x90
LBB0_11:                                ## =>This Inner Loop Header: Depth=1
	movl	%ebx, %edi
	callq	_I40E_VPINT_LNKLST0
	movq	%r12, %rdi
	movl	%eax, %esi
	movl	%r15d, %edx
	callq	_wr32
	incl	%ebx
	cmpl	%ebx, %r14d
	jne	LBB0_11
LBB0_12:
	movl	-52(%rbp), %r13d                ## 4-byte Reload
	cmpl	$3, %r13d
	movl	-44(%rbp), %r14d                ## 4-byte Reload
	jl	LBB0_15
## %bb.13:
	addl	$-2, %r13d
	xorl	%ebx, %ebx
	.p2align	4, 0x90
LBB0_14:                                ## =>This Inner Loop Header: Depth=1
	movl	%ebx, %edi
	callq	_I40E_VPINT_LNKLSTN
	movq	%r12, %rdi
	movl	%eax, %esi
	movl	%r15d, %edx
	callq	_wr32
	incl	%ebx
	cmpl	%ebx, %r13d
	jne	LBB0_14
LBB0_15:
	testl	%r14d, %r14d
	jle	LBB0_21
## %bb.16:
	xorl	%r15d, %r15d
	movq	-64(%rbp), %r13                 ## 8-byte Reload
	.p2align	4, 0x90
LBB0_17:                                ## =>This Inner Loop Header: Depth=1
	leal	(%r15,%r13), %eax
	movl	%eax, %r14d
	shrl	$7, %r14d
	movl	%eax, %ebx
	andl	$127, %ebx
	cmpl	$127, %eax
	cmovlel	%eax, %ebx
	movl	$0, %eax
	cmovlel	%eax, %r14d
	movl	%r14d, %edi
	callq	_I40E_GLLAN_TXPRE_QDIS
	movq	%r12, %rdi
	movl	%eax, %esi
	callq	_rd32
	movq	_I40E_GLLAN_TXPRE_QDIS_QINDX_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	notl	%edx
	movq	_I40E_GLLAN_TXPRE_QDIS_QINDX_SHIFT@GOTPCREL(%rip), %rcx
	movzbl	(%rcx), %ecx
	shll	%cl, %ebx
	andl	%eax, %edx
	orl	%edx, %ebx
	movq	_I40E_GLLAN_TXPRE_QDIS_SET_QDIS_MASK@GOTPCREL(%rip), %rax
	orl	(%rax), %ebx
	movl	%r14d, %edi
	movl	-44(%rbp), %r14d                ## 4-byte Reload
	callq	_I40E_GLLAN_TXPRE_QDIS
	movq	%r12, %rdi
	movl	%eax, %esi
	movl	%ebx, %edx
	callq	_wr32
	incl	%r15d
	cmpl	%r15d, %r14d
	jne	LBB0_17
## %bb.18:
	movl	$400, %edi                      ## imm = 0x190
	callq	_udelay
	testl	%r14d, %r14d
	jle	LBB0_22
## %bb.19:
	xorl	%ebx, %ebx
	.p2align	4, 0x90
LBB0_20:                                ## =>This Inner Loop Header: Depth=1
	movl	%ebx, %edi
	callq	_I40E_QINT_TQCTL
	movq	%r12, %rdi
	movl	%eax, %esi
	xorl	%edx, %edx
	callq	_wr32
	movl	%ebx, %edi
	callq	_I40E_QTX_ENA
	movq	%r12, %rdi
	movl	%eax, %esi
	xorl	%edx, %edx
	callq	_wr32
	movl	%ebx, %edi
	callq	_I40E_QINT_RQCTL
	movq	%r12, %rdi
	movl	%eax, %esi
	xorl	%edx, %edx
	callq	_wr32
	movl	%ebx, %edi
	callq	_I40E_QRX_ENA
	movq	%r12, %rdi
	movl	%eax, %esi
	xorl	%edx, %edx
	callq	_wr32
	incl	%ebx
	cmpl	%ebx, %r14d
	jne	LBB0_20
	jmp	LBB0_22
LBB0_21:
	movl	$400, %edi                      ## imm = 0x190
	callq	_udelay
LBB0_22:
	movl	$50, %edi
	addq	$40, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_udelay                         ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_I40E_GLPCI_CNF2,4,2            ## @I40E_GLPCI_CNF2
	.comm	_I40E_GLPCI_CNF2_MSI_X_PF_N_MASK,4,2 ## @I40E_GLPCI_CNF2_MSI_X_PF_N_MASK
	.comm	_I40E_GLPCI_CNF2_MSI_X_PF_N_SHIFT,4,2 ## @I40E_GLPCI_CNF2_MSI_X_PF_N_SHIFT
	.comm	_I40E_GLPCI_CNF2_MSI_X_VF_N_MASK,4,2 ## @I40E_GLPCI_CNF2_MSI_X_VF_N_MASK
	.comm	_I40E_GLPCI_CNF2_MSI_X_VF_N_SHIFT,4,2 ## @I40E_GLPCI_CNF2_MSI_X_VF_N_SHIFT
	.comm	_I40E_PFLAN_QALLOC,4,2          ## @I40E_PFLAN_QALLOC
	.comm	_I40E_PFLAN_QALLOC_FIRSTQ_MASK,4,2 ## @I40E_PFLAN_QALLOC_FIRSTQ_MASK
	.comm	_I40E_PFLAN_QALLOC_FIRSTQ_SHIFT,4,2 ## @I40E_PFLAN_QALLOC_FIRSTQ_SHIFT
	.comm	_I40E_PFLAN_QALLOC_LASTQ_MASK,4,2 ## @I40E_PFLAN_QALLOC_LASTQ_MASK
	.comm	_I40E_PFLAN_QALLOC_LASTQ_SHIFT,4,2 ## @I40E_PFLAN_QALLOC_LASTQ_SHIFT
	.comm	_I40E_PFLAN_QALLOC_VALID_MASK,4,2 ## @I40E_PFLAN_QALLOC_VALID_MASK
	.comm	_I40E_PF_VT_PFALLOC,4,2         ## @I40E_PF_VT_PFALLOC
	.comm	_I40E_PF_VT_PFALLOC_FIRSTVF_MASK,4,2 ## @I40E_PF_VT_PFALLOC_FIRSTVF_MASK
	.comm	_I40E_PF_VT_PFALLOC_FIRSTVF_SHIFT,4,2 ## @I40E_PF_VT_PFALLOC_FIRSTVF_SHIFT
	.comm	_I40E_PF_VT_PFALLOC_LASTVF_MASK,4,2 ## @I40E_PF_VT_PFALLOC_LASTVF_MASK
	.comm	_I40E_PF_VT_PFALLOC_LASTVF_SHIFT,4,2 ## @I40E_PF_VT_PFALLOC_LASTVF_SHIFT
	.comm	_I40E_PF_VT_PFALLOC_VALID_MASK,4,2 ## @I40E_PF_VT_PFALLOC_VALID_MASK
	.comm	_I40E_PFINT_ICR0_ENA,4,2        ## @I40E_PFINT_ICR0_ENA
	.comm	_I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT,4,2 ## @I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT
	.comm	_I40E_PFINT_LNKLST0_FIRSTQ_INDX_SHIFT,4,2 ## @I40E_PFINT_LNKLST0_FIRSTQ_INDX_SHIFT
	.comm	_I40E_PFINT_LNKLST0,4,2         ## @I40E_PFINT_LNKLST0
	.comm	_I40E_VPINT_LNKLST0_FIRSTQ_INDX_SHIFT,4,2 ## @I40E_VPINT_LNKLST0_FIRSTQ_INDX_SHIFT
	.comm	_I40E_GLLAN_TXPRE_QDIS_QINDX_MASK,4,2 ## @I40E_GLLAN_TXPRE_QDIS_QINDX_MASK
	.comm	_I40E_GLLAN_TXPRE_QDIS_QINDX_SHIFT,4,2 ## @I40E_GLLAN_TXPRE_QDIS_QINDX_SHIFT
	.comm	_I40E_GLLAN_TXPRE_QDIS_SET_QDIS_MASK,4,2 ## @I40E_GLLAN_TXPRE_QDIS_SET_QDIS_MASK
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_i40e_clear_hw                  ; -- Begin function i40e_clear_hw
	.p2align	2
_i40e_clear_hw:                         ; @i40e_clear_hw
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #112
	.cfi_def_cfa_offset 112
	stp	x28, x27, [sp, #16]             ; 16-byte Folded Spill
	stp	x26, x25, [sp, #32]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #48]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #64]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #80]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #96]             ; 16-byte Folded Spill
	add	x29, sp, #96
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	mov	x19, x0
Lloh0:
	adrp	x8, _I40E_GLPCI_CNF2@GOTPAGE
Lloh1:
	ldr	x8, [x8, _I40E_GLPCI_CNF2@GOTPAGEOFF]
Lloh2:
	ldr	w1, [x8]
	bl	_rd32
	mov	x20, x0
Lloh3:
	adrp	x8, _I40E_GLPCI_CNF2_MSI_X_PF_N_MASK@GOTPAGE
Lloh4:
	ldr	x8, [x8, _I40E_GLPCI_CNF2_MSI_X_PF_N_MASK@GOTPAGEOFF]
Lloh5:
	ldr	w8, [x8]
	and	w21, w8, w0
Lloh6:
	adrp	x8, _I40E_GLPCI_CNF2_MSI_X_PF_N_SHIFT@GOTPAGE
Lloh7:
	ldr	x8, [x8, _I40E_GLPCI_CNF2_MSI_X_PF_N_SHIFT@GOTPAGEOFF]
Lloh8:
	ldr	w22, [x8]
Lloh9:
	adrp	x8, _I40E_GLPCI_CNF2_MSI_X_VF_N_MASK@GOTPAGE
Lloh10:
	ldr	x8, [x8, _I40E_GLPCI_CNF2_MSI_X_VF_N_MASK@GOTPAGEOFF]
Lloh11:
	ldr	w27, [x8]
Lloh12:
	adrp	x8, _I40E_GLPCI_CNF2_MSI_X_VF_N_SHIFT@GOTPAGE
Lloh13:
	ldr	x8, [x8, _I40E_GLPCI_CNF2_MSI_X_VF_N_SHIFT@GOTPAGEOFF]
Lloh14:
	ldr	w8, [x8]
	str	x8, [sp, #8]                    ; 8-byte Folded Spill
Lloh15:
	adrp	x8, _I40E_PFLAN_QALLOC@GOTPAGE
Lloh16:
	ldr	x8, [x8, _I40E_PFLAN_QALLOC@GOTPAGEOFF]
Lloh17:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_rd32
Lloh18:
	adrp	x8, _I40E_PFLAN_QALLOC_FIRSTQ_MASK@GOTPAGE
Lloh19:
	ldr	x8, [x8, _I40E_PFLAN_QALLOC_FIRSTQ_MASK@GOTPAGEOFF]
Lloh20:
	ldr	w8, [x8]
	and	w8, w8, w0
Lloh21:
	adrp	x9, _I40E_PFLAN_QALLOC_FIRSTQ_SHIFT@GOTPAGE
Lloh22:
	ldr	x9, [x9, _I40E_PFLAN_QALLOC_FIRSTQ_SHIFT@GOTPAGEOFF]
Lloh23:
	ldr	w9, [x9]
	asr	w24, w8, w9
Lloh24:
	adrp	x8, _I40E_PFLAN_QALLOC_VALID_MASK@GOTPAGE
Lloh25:
	ldr	x8, [x8, _I40E_PFLAN_QALLOC_VALID_MASK@GOTPAGEOFF]
Lloh26:
	ldr	w8, [x8]
	tst	w8, w0
	b.eq	LBB0_2
; %bb.1:
Lloh27:
	adrp	x8, _I40E_PFLAN_QALLOC_LASTQ_MASK@GOTPAGE
Lloh28:
	ldr	x8, [x8, _I40E_PFLAN_QALLOC_LASTQ_MASK@GOTPAGEOFF]
Lloh29:
	ldr	w8, [x8]
	and	w8, w8, w0
Lloh30:
	adrp	x9, _I40E_PFLAN_QALLOC_LASTQ_SHIFT@GOTPAGE
Lloh31:
	ldr	x9, [x9, _I40E_PFLAN_QALLOC_LASTQ_SHIFT@GOTPAGEOFF]
Lloh32:
	ldr	w9, [x9]
	asr	w8, w8, w9
	sub	w8, w8, w24
	add	w23, w8, #1
	b	LBB0_3
LBB0_2:
	mov	w23, #0
LBB0_3:
	asr	w28, w21, w22
Lloh33:
	adrp	x8, _I40E_PF_VT_PFALLOC@GOTPAGE
Lloh34:
	ldr	x8, [x8, _I40E_PF_VT_PFALLOC@GOTPAGEOFF]
Lloh35:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_rd32
Lloh36:
	adrp	x8, _I40E_PF_VT_PFALLOC_VALID_MASK@GOTPAGE
Lloh37:
	ldr	x8, [x8, _I40E_PF_VT_PFALLOC_VALID_MASK@GOTPAGEOFF]
Lloh38:
	ldr	w8, [x8]
	tst	w8, w0
	b.eq	LBB0_5
; %bb.4:
Lloh39:
	adrp	x8, _I40E_PF_VT_PFALLOC_LASTVF_MASK@GOTPAGE
Lloh40:
	ldr	x8, [x8, _I40E_PF_VT_PFALLOC_LASTVF_MASK@GOTPAGEOFF]
Lloh41:
	ldr	w8, [x8]
	and	w8, w8, w0
Lloh42:
	adrp	x9, _I40E_PF_VT_PFALLOC_LASTVF_SHIFT@GOTPAGE
Lloh43:
	ldr	x9, [x9, _I40E_PF_VT_PFALLOC_LASTVF_SHIFT@GOTPAGEOFF]
Lloh44:
	ldr	w9, [x9]
	asr	w8, w8, w9
Lloh45:
	adrp	x9, _I40E_PF_VT_PFALLOC_FIRSTVF_MASK@GOTPAGE
Lloh46:
	ldr	x9, [x9, _I40E_PF_VT_PFALLOC_FIRSTVF_MASK@GOTPAGEOFF]
Lloh47:
	ldr	w9, [x9]
	and	w9, w9, w0
Lloh48:
	adrp	x10, _I40E_PF_VT_PFALLOC_FIRSTVF_SHIFT@GOTPAGE
Lloh49:
	ldr	x10, [x10, _I40E_PF_VT_PFALLOC_FIRSTVF_SHIFT@GOTPAGEOFF]
Lloh50:
	ldr	w10, [x10]
	asr	w9, w9, w10
	sub	w8, w8, w9
	add	w26, w8, #1
	b	LBB0_6
LBB0_5:
	mov	w26, #0
LBB0_6:
Lloh51:
	adrp	x8, _I40E_PFINT_ICR0_ENA@GOTPAGE
Lloh52:
	ldr	x8, [x8, _I40E_PFINT_ICR0_ENA@GOTPAGEOFF]
Lloh53:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #0
	bl	_wr32
	sub	w25, w28, #2
	cmp	w28, #3
	b.lt	LBB0_9
; %bb.7:
	mov	w21, #0
Lloh54:
	adrp	x8, _I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT@GOTPAGE
Lloh55:
	ldr	x8, [x8, _I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT@GOTPAGEOFF]
Lloh56:
	ldr	w8, [x8]
	mov	w9, #3
	lsl	w22, w9, w8
LBB0_8:                                 ; =>This Inner Loop Header: Depth=1
	mov	x0, x21
	bl	_I40E_PFINT_DYN_CTLN
	mov	x1, x0
	mov	x0, x19
	mov	x2, x22
	bl	_wr32
	add	w21, w21, #1
	cmp	w25, w21
	b.ne	LBB0_8
LBB0_9:
	and	w22, w27, w20
Lloh57:
	adrp	x8, _I40E_PFINT_LNKLST0_FIRSTQ_INDX_SHIFT@GOTPAGE
Lloh58:
	ldr	x8, [x8, _I40E_PFINT_LNKLST0_FIRSTQ_INDX_SHIFT@GOTPAGEOFF]
Lloh59:
	ldr	w8, [x8]
	mov	w27, #2047
	lsl	w20, w27, w8
Lloh60:
	adrp	x8, _I40E_PFINT_LNKLST0@GOTPAGE
Lloh61:
	ldr	x8, [x8, _I40E_PFINT_LNKLST0@GOTPAGEOFF]
Lloh62:
	ldr	w1, [x8]
	mov	x0, x19
	mov	x2, x20
	bl	_wr32
	cmp	w28, #3
	b.lt	LBB0_12
; %bb.10:
	mov	w21, #0
LBB0_11:                                ; =>This Inner Loop Header: Depth=1
	mov	x0, x21
	bl	_I40E_PFINT_LNKLSTN
	mov	x1, x0
	mov	x0, x19
	mov	x2, x20
	bl	_wr32
	add	w21, w21, #1
	cmp	w25, w21
	b.ne	LBB0_11
LBB0_12:
	ldr	x8, [sp, #8]                    ; 8-byte Folded Reload
	asr	w22, w22, w8
Lloh63:
	adrp	x8, _I40E_VPINT_LNKLST0_FIRSTQ_INDX_SHIFT@GOTPAGE
Lloh64:
	ldr	x8, [x8, _I40E_VPINT_LNKLST0_FIRSTQ_INDX_SHIFT@GOTPAGEOFF]
Lloh65:
	ldr	w8, [x8]
	lsl	w20, w27, w8
	cmp	w26, #1
	b.lt	LBB0_15
; %bb.13:
	mov	w21, #0
LBB0_14:                                ; =>This Inner Loop Header: Depth=1
	mov	x0, x21
	bl	_I40E_VPINT_LNKLST0
	mov	x1, x0
	mov	x0, x19
	mov	x2, x20
	bl	_wr32
	add	w21, w21, #1
	cmp	w26, w21
	b.ne	LBB0_14
LBB0_15:
	cmp	w22, #3
	b.lt	LBB0_18
; %bb.16:
	mov	w21, #0
	sub	w22, w22, #2
LBB0_17:                                ; =>This Inner Loop Header: Depth=1
	mov	x0, x21
	bl	_I40E_VPINT_LNKLSTN
	mov	x1, x0
	mov	x0, x19
	mov	x2, x20
	bl	_wr32
	add	w21, w21, #1
	cmp	w22, w21
	b.ne	LBB0_17
LBB0_18:
	cmp	w23, #1
	b.lt	LBB0_24
; %bb.19:
	mov	w22, #0
Lloh66:
	adrp	x25, _I40E_GLLAN_TXPRE_QDIS_QINDX_MASK@GOTPAGE
Lloh67:
	ldr	x25, [x25, _I40E_GLLAN_TXPRE_QDIS_QINDX_MASK@GOTPAGEOFF]
Lloh68:
	adrp	x26, _I40E_GLLAN_TXPRE_QDIS_QINDX_SHIFT@GOTPAGE
Lloh69:
	ldr	x26, [x26, _I40E_GLLAN_TXPRE_QDIS_QINDX_SHIFT@GOTPAGEOFF]
Lloh70:
	adrp	x27, _I40E_GLLAN_TXPRE_QDIS_SET_QDIS_MASK@GOTPAGE
Lloh71:
	ldr	x27, [x27, _I40E_GLLAN_TXPRE_QDIS_SET_QDIS_MASK@GOTPAGEOFF]
LBB0_20:                                ; =>This Inner Loop Header: Depth=1
	add	w8, w24, w22
	lsr	w9, w8, #7
	and	w10, w8, #0x7f
	cmp	w8, #127
	csel	w21, w10, w8, gt
	csel	w20, w9, wzr, gt
	mov	x0, x20
	bl	_I40E_GLLAN_TXPRE_QDIS
	mov	x1, x0
	mov	x0, x19
	bl	_rd32
	ldr	w8, [x25]
	bic	w8, w0, w8
	ldr	w9, [x26]
	lsl	w9, w21, w9
	orr	w8, w9, w8
	ldr	w9, [x27]
	orr	w21, w8, w9
	mov	x0, x20
	bl	_I40E_GLLAN_TXPRE_QDIS
	mov	x1, x0
	mov	x0, x19
	mov	x2, x21
	bl	_wr32
	add	w22, w22, #1
	cmp	w23, w22
	b.ne	LBB0_20
; %bb.21:
	mov	w0, #400
	bl	_udelay
	cmp	w23, #1
	b.lt	LBB0_25
; %bb.22:
	mov	w20, #0
LBB0_23:                                ; =>This Inner Loop Header: Depth=1
	mov	x0, x20
	bl	_I40E_QINT_TQCTL
	mov	x1, x0
	mov	x0, x19
	mov	w2, #0
	bl	_wr32
	mov	x0, x20
	bl	_I40E_QTX_ENA
	mov	x1, x0
	mov	x0, x19
	mov	w2, #0
	bl	_wr32
	mov	x0, x20
	bl	_I40E_QINT_RQCTL
	mov	x1, x0
	mov	x0, x19
	mov	w2, #0
	bl	_wr32
	mov	x0, x20
	bl	_I40E_QRX_ENA
	mov	x1, x0
	mov	x0, x19
	mov	w2, #0
	bl	_wr32
	add	w20, w20, #1
	cmp	w23, w20
	b.ne	LBB0_23
	b	LBB0_25
LBB0_24:
	mov	w0, #400
	bl	_udelay
LBB0_25:
	mov	w0, #50
	ldp	x29, x30, [sp, #96]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #80]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #64]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #48]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #32]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #112
	b	_udelay
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh30, Lloh31, Lloh32
	.loh AdrpLdrGotLdr	Lloh27, Lloh28, Lloh29
	.loh AdrpLdrGotLdr	Lloh36, Lloh37, Lloh38
	.loh AdrpLdrGotLdr	Lloh33, Lloh34, Lloh35
	.loh AdrpLdrGotLdr	Lloh48, Lloh49, Lloh50
	.loh AdrpLdrGotLdr	Lloh45, Lloh46, Lloh47
	.loh AdrpLdrGotLdr	Lloh42, Lloh43, Lloh44
	.loh AdrpLdrGotLdr	Lloh39, Lloh40, Lloh41
	.loh AdrpLdrGotLdr	Lloh51, Lloh52, Lloh53
	.loh AdrpLdrGotLdr	Lloh54, Lloh55, Lloh56
	.loh AdrpLdrGotLdr	Lloh60, Lloh61, Lloh62
	.loh AdrpLdrGotLdr	Lloh57, Lloh58, Lloh59
	.loh AdrpLdrGotLdr	Lloh63, Lloh64, Lloh65
	.loh AdrpLdrGot	Lloh70, Lloh71
	.loh AdrpLdrGot	Lloh68, Lloh69
	.loh AdrpLdrGot	Lloh66, Lloh67
	.cfi_endproc
                                        ; -- End function
	.comm	_I40E_GLPCI_CNF2,4,2            ; @I40E_GLPCI_CNF2
	.comm	_I40E_GLPCI_CNF2_MSI_X_PF_N_MASK,4,2 ; @I40E_GLPCI_CNF2_MSI_X_PF_N_MASK
	.comm	_I40E_GLPCI_CNF2_MSI_X_PF_N_SHIFT,4,2 ; @I40E_GLPCI_CNF2_MSI_X_PF_N_SHIFT
	.comm	_I40E_GLPCI_CNF2_MSI_X_VF_N_MASK,4,2 ; @I40E_GLPCI_CNF2_MSI_X_VF_N_MASK
	.comm	_I40E_GLPCI_CNF2_MSI_X_VF_N_SHIFT,4,2 ; @I40E_GLPCI_CNF2_MSI_X_VF_N_SHIFT
	.comm	_I40E_PFLAN_QALLOC,4,2          ; @I40E_PFLAN_QALLOC
	.comm	_I40E_PFLAN_QALLOC_FIRSTQ_MASK,4,2 ; @I40E_PFLAN_QALLOC_FIRSTQ_MASK
	.comm	_I40E_PFLAN_QALLOC_FIRSTQ_SHIFT,4,2 ; @I40E_PFLAN_QALLOC_FIRSTQ_SHIFT
	.comm	_I40E_PFLAN_QALLOC_LASTQ_MASK,4,2 ; @I40E_PFLAN_QALLOC_LASTQ_MASK
	.comm	_I40E_PFLAN_QALLOC_LASTQ_SHIFT,4,2 ; @I40E_PFLAN_QALLOC_LASTQ_SHIFT
	.comm	_I40E_PFLAN_QALLOC_VALID_MASK,4,2 ; @I40E_PFLAN_QALLOC_VALID_MASK
	.comm	_I40E_PF_VT_PFALLOC,4,2         ; @I40E_PF_VT_PFALLOC
	.comm	_I40E_PF_VT_PFALLOC_FIRSTVF_MASK,4,2 ; @I40E_PF_VT_PFALLOC_FIRSTVF_MASK
	.comm	_I40E_PF_VT_PFALLOC_FIRSTVF_SHIFT,4,2 ; @I40E_PF_VT_PFALLOC_FIRSTVF_SHIFT
	.comm	_I40E_PF_VT_PFALLOC_LASTVF_MASK,4,2 ; @I40E_PF_VT_PFALLOC_LASTVF_MASK
	.comm	_I40E_PF_VT_PFALLOC_LASTVF_SHIFT,4,2 ; @I40E_PF_VT_PFALLOC_LASTVF_SHIFT
	.comm	_I40E_PF_VT_PFALLOC_VALID_MASK,4,2 ; @I40E_PF_VT_PFALLOC_VALID_MASK
	.comm	_I40E_PFINT_ICR0_ENA,4,2        ; @I40E_PFINT_ICR0_ENA
	.comm	_I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT,4,2 ; @I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT
	.comm	_I40E_PFINT_LNKLST0_FIRSTQ_INDX_SHIFT,4,2 ; @I40E_PFINT_LNKLST0_FIRSTQ_INDX_SHIFT
	.comm	_I40E_PFINT_LNKLST0,4,2         ; @I40E_PFINT_LNKLST0
	.comm	_I40E_VPINT_LNKLST0_FIRSTQ_INDX_SHIFT,4,2 ; @I40E_VPINT_LNKLST0_FIRSTQ_INDX_SHIFT
	.comm	_I40E_GLLAN_TXPRE_QDIS_QINDX_MASK,4,2 ; @I40E_GLLAN_TXPRE_QDIS_QINDX_MASK
	.comm	_I40E_GLLAN_TXPRE_QDIS_QINDX_SHIFT,4,2 ; @I40E_GLLAN_TXPRE_QDIS_QINDX_SHIFT
	.comm	_I40E_GLLAN_TXPRE_QDIS_SET_QDIS_MASK,4,2 ; @I40E_GLLAN_TXPRE_QDIS_SET_QDIS_MASK
.subsections_via_symbols
