	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function pci_enable_crs
_pci_enable_crs:                        ## @pci_enable_crs
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -24
	movq	%rdi, %rbx
	movl	$0, -12(%rbp)
	movq	_PCI_EXP_RTCAP@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	leaq	-12(%rbp), %rdx
	callq	_pcie_capability_read_word
	movq	_PCI_EXP_RTCAP_CRSVIS@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	testl	%eax, -12(%rbp)
	je	LBB0_2
## %bb.1:
	movq	_PCI_EXP_RTCTL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_PCI_EXP_RTCTL_CRSSVE@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	callq	_pcie_capability_set_word
LBB0_2:
	addq	$8, %rsp
	popq	%rbx
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_PCI_EXP_RTCAP,4,2              ## @PCI_EXP_RTCAP
	.comm	_PCI_EXP_RTCAP_CRSVIS,4,2       ## @PCI_EXP_RTCAP_CRSVIS
	.comm	_PCI_EXP_RTCTL,4,2              ## @PCI_EXP_RTCTL
	.comm	_PCI_EXP_RTCTL_CRSSVE,4,2       ## @PCI_EXP_RTCTL_CRSSVE
	.no_dead_strip	_pci_enable_crs
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function pci_enable_crs
_pci_enable_crs:                        ; @pci_enable_crs
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #48
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x19, x0
	str	wzr, [sp, #12]
Lloh0:
	adrp	x8, _PCI_EXP_RTCAP@GOTPAGE
Lloh1:
	ldr	x8, [x8, _PCI_EXP_RTCAP@GOTPAGEOFF]
Lloh2:
	ldr	w1, [x8]
	add	x2, sp, #12
	bl	_pcie_capability_read_word
	ldr	w8, [sp, #12]
Lloh3:
	adrp	x9, _PCI_EXP_RTCAP_CRSVIS@GOTPAGE
Lloh4:
	ldr	x9, [x9, _PCI_EXP_RTCAP_CRSVIS@GOTPAGEOFF]
Lloh5:
	ldr	w9, [x9]
	tst	w9, w8
	b.eq	LBB0_2
; %bb.1:
Lloh6:
	adrp	x8, _PCI_EXP_RTCTL@GOTPAGE
Lloh7:
	ldr	x8, [x8, _PCI_EXP_RTCTL@GOTPAGEOFF]
Lloh8:
	ldr	w1, [x8]
Lloh9:
	adrp	x8, _PCI_EXP_RTCTL_CRSSVE@GOTPAGE
Lloh10:
	ldr	x8, [x8, _PCI_EXP_RTCTL_CRSSVE@GOTPAGEOFF]
Lloh11:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_pcie_capability_set_word
LBB0_2:
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #48
	ret
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.cfi_endproc
                                        ; -- End function
	.comm	_PCI_EXP_RTCAP,4,2              ; @PCI_EXP_RTCAP
	.comm	_PCI_EXP_RTCAP_CRSVIS,4,2       ; @PCI_EXP_RTCAP_CRSVIS
	.comm	_PCI_EXP_RTCTL,4,2              ; @PCI_EXP_RTCTL
	.comm	_PCI_EXP_RTCTL_CRSSVE,4,2       ; @PCI_EXP_RTCTL_CRSSVE
	.no_dead_strip	_pci_enable_crs
.subsections_via_symbols
