	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function pnv_php_reset_slot
_pnv_php_reset_slot:                    ## @pnv_php_reset_slot
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%esi, %ebx
	callq	_to_pnv_php_slot
	movq	8(%rax), %r14
	testl	%ebx, %ebx
	je	LBB0_2
## %bb.1:
	xorl	%ebx, %ebx
	testq	%r14, %r14
	sete	%bl
	jmp	LBB0_6
LBB0_2:
	movq	%rax, %r15
	movq	(%rax), %rdi
	testq	%rdi, %rdi
	jle	LBB0_4
## %bb.3:
	callq	_disable_irq
LBB0_4:
	movq	%r14, %rdi
	callq	_pci_bridge_secondary_bus_reset
	movq	8(%r15), %rdi
	movq	_PCI_EXP_SLTSTA@GOTPCREL(%rip), %rbx
	movl	(%rbx), %esi
	leaq	-28(%rbp), %rdx
	callq	_pcie_capability_read_word
	movq	_PCI_EXP_SLTSTA_PDC@GOTPCREL(%rip), %rax
	movq	_PCI_EXP_SLTSTA_DLLSC@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	orl	(%rax), %edx
	andl	-28(%rbp), %edx
	movl	%edx, -28(%rbp)
	movq	8(%r15), %rdi
	movl	(%rbx), %esi
	callq	_pcie_capability_write_word
	movq	(%r15), %rdi
	xorl	%ebx, %ebx
	testq	%rdi, %rdi
	jle	LBB0_6
## %bb.5:
	callq	_enable_irq
LBB0_6:
	movl	%ebx, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_PCI_EXP_SLTSTA,4,2             ## @PCI_EXP_SLTSTA
	.comm	_PCI_EXP_SLTSTA_PDC,4,2         ## @PCI_EXP_SLTSTA_PDC
	.comm	_PCI_EXP_SLTSTA_DLLSC,4,2       ## @PCI_EXP_SLTSTA_DLLSC
	.no_dead_strip	_pnv_php_reset_slot
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function pnv_php_reset_slot
_pnv_php_reset_slot:                    ; @pnv_php_reset_slot
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #64
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x21, x1
	bl	_to_pnv_php_slot
	ldr	x20, [x0, #8]
	cbz	w21, LBB0_2
; %bb.1:
	cmp	x20, #0
	cset	w0, eq
	b	LBB0_7
LBB0_2:
	mov	x19, x0
	ldr	x0, [x0]
	cmp	x0, #1
	b.lt	LBB0_4
; %bb.3:
	bl	_disable_irq
LBB0_4:
	mov	x0, x20
	bl	_pci_bridge_secondary_bus_reset
	ldr	x0, [x19, #8]
Lloh0:
	adrp	x20, _PCI_EXP_SLTSTA@GOTPAGE
Lloh1:
	ldr	x20, [x20, _PCI_EXP_SLTSTA@GOTPAGEOFF]
	ldr	w1, [x20]
	add	x2, sp, #12
	bl	_pcie_capability_read_word
Lloh2:
	adrp	x8, _PCI_EXP_SLTSTA_PDC@GOTPAGE
Lloh3:
	ldr	x8, [x8, _PCI_EXP_SLTSTA_PDC@GOTPAGEOFF]
Lloh4:
	ldr	w8, [x8]
Lloh5:
	adrp	x9, _PCI_EXP_SLTSTA_DLLSC@GOTPAGE
Lloh6:
	ldr	x9, [x9, _PCI_EXP_SLTSTA_DLLSC@GOTPAGEOFF]
Lloh7:
	ldr	w9, [x9]
	orr	w8, w9, w8
	ldr	w9, [sp, #12]
	and	w2, w9, w8
	str	w2, [sp, #12]
	ldr	x0, [x19, #8]
	ldr	w1, [x20]
	bl	_pcie_capability_write_word
	ldr	x0, [x19]
	cmp	x0, #1
	b.lt	LBB0_6
; %bb.5:
	bl	_enable_irq
LBB0_6:
	mov	w0, #0
LBB0_7:
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #64
	ret
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGot	Lloh0, Lloh1
	.cfi_endproc
                                        ; -- End function
	.comm	_PCI_EXP_SLTSTA,4,2             ; @PCI_EXP_SLTSTA
	.comm	_PCI_EXP_SLTSTA_PDC,4,2         ; @PCI_EXP_SLTSTA_PDC
	.comm	_PCI_EXP_SLTSTA_DLLSC,4,2       ; @PCI_EXP_SLTSTA_DLLSC
	.no_dead_strip	_pnv_php_reset_slot
.subsections_via_symbols
