	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function dw_pcie_find_next_ext_capability
_dw_pcie_find_next_ext_capability:      ## @dw_pcie_find_next_ext_capability
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdx, %r15
	movl	%esi, %r13d
	movq	%rdi, %r12
	movq	_PCI_CFG_SPACE_SIZE@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movq	_PCI_CFG_SPACE_EXP_SIZE@GOTPCREL(%rip), %rax
	movl	(%rax), %r14d
	testl	%esi, %esi
	movl	%esi, -48(%rbp)                 ## 4-byte Spill
	movl	%ecx, -44(%rbp)                 ## 4-byte Spill
	cmovel	%ecx, %r13d
	movl	%r13d, %esi
	callq	_dw_pcie_readl_dbi
	testq	%rax, %rax
	je	LBB0_7
## %bb.1:
	subl	-44(%rbp), %r14d                ## 4-byte Folded Reload
	cmpl	$8, %r14d
	jl	LBB0_7
## %bb.2:
	movq	%rax, %rbx
	shrl	$3, %r14d
	incl	%r14d
	.p2align	4, 0x90
LBB0_3:                                 ## =>This Inner Loop Header: Depth=1
	movq	%rbx, %rdi
	callq	_PCI_EXT_CAP_ID
	cmpq	%r15, %rax
	jne	LBB0_5
## %bb.4:                               ##   in Loop: Header=BB0_3 Depth=1
	cmpl	-48(%rbp), %r13d                ## 4-byte Folded Reload
	jne	LBB0_8
LBB0_5:                                 ##   in Loop: Header=BB0_3 Depth=1
	movq	%rbx, %rdi
	callq	_PCI_EXT_CAP_NEXT
	movl	%eax, %r13d
	movq	_PCI_CFG_SPACE_SIZE@GOTPCREL(%rip), %rax
	cmpl	(%rax), %r13d
	jl	LBB0_7
## %bb.6:                               ##   in Loop: Header=BB0_3 Depth=1
	movq	%r12, %rdi
	movl	%r13d, %esi
	callq	_dw_pcie_readl_dbi
	movq	%rax, %rbx
	decl	%r14d
	cmpl	$1, %r14d
	ja	LBB0_3
LBB0_7:
	xorl	%r13d, %r13d
LBB0_8:
	movl	%r13d, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_PCI_CFG_SPACE_SIZE,4,2         ## @PCI_CFG_SPACE_SIZE
	.comm	_PCI_CFG_SPACE_EXP_SIZE,4,2     ## @PCI_CFG_SPACE_EXP_SIZE
	.no_dead_strip	_dw_pcie_find_next_ext_capability
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function dw_pcie_find_next_ext_capability
_dw_pcie_find_next_ext_capability:      ; @dw_pcie_find_next_ext_capability
	.cfi_startproc
; %bb.0:
	stp	x26, x25, [sp, #-80]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	mov	x19, x2
	mov	x20, x1
	mov	x21, x0
Lloh0:
	adrp	x24, _PCI_CFG_SPACE_SIZE@GOTPAGE
Lloh1:
	ldr	x24, [x24, _PCI_CFG_SPACE_SIZE@GOTPAGEOFF]
	ldr	w8, [x24]
Lloh2:
	adrp	x9, _PCI_CFG_SPACE_EXP_SIZE@GOTPAGE
Lloh3:
	ldr	x9, [x9, _PCI_CFG_SPACE_EXP_SIZE@GOTPAGEOFF]
Lloh4:
	ldr	w9, [x9]
	sub	w25, w9, w8
	cmp	w1, #0
	csel	w22, w8, w1, eq
	mov	x1, x22
	bl	_dw_pcie_readl_dbi
	cmp	x0, #0
	ccmp	w25, #8, #8, ne
	b.lt	LBB0_6
; %bb.1:
	mov	x23, x0
	lsr	w8, w25, #3
	add	w25, w8, #1
LBB0_2:                                 ; =>This Inner Loop Header: Depth=1
	mov	x0, x23
	bl	_PCI_EXT_CAP_ID
	cmp	x0, x19
	b.ne	LBB0_4
; %bb.3:                                ;   in Loop: Header=BB0_2 Depth=1
	cmp	w22, w20
	b.ne	LBB0_7
LBB0_4:                                 ;   in Loop: Header=BB0_2 Depth=1
	mov	x0, x23
	bl	_PCI_EXT_CAP_NEXT
	ldr	w8, [x24]
	cmp	w0, w8
	b.lt	LBB0_6
; %bb.5:                                ;   in Loop: Header=BB0_2 Depth=1
	mov	x22, x0
	mov	x0, x21
	mov	x1, x22
	bl	_dw_pcie_readl_dbi
	mov	x23, x0
	sub	w25, w25, #1
	cmp	w25, #1
	b.hi	LBB0_2
LBB0_6:
	mov	w22, #0
LBB0_7:
	mov	x0, x22
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp], #80             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGot	Lloh0, Lloh1
	.cfi_endproc
                                        ; -- End function
	.comm	_PCI_CFG_SPACE_SIZE,4,2         ; @PCI_CFG_SPACE_SIZE
	.comm	_PCI_CFG_SPACE_EXP_SIZE,4,2     ; @PCI_CFG_SPACE_EXP_SIZE
	.no_dead_strip	_dw_pcie_find_next_ext_capability
.subsections_via_symbols
