	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function iwl_pcie_irq_set_affinity
_iwl_pcie_irq_set_affinity:             ## @iwl_pcie_irq_set_affinity
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	callq	_IWL_TRANS_GET_PCIE_TRANS
	movq	%rax, %r14
	movq	_IWL_SHARED_IRQ_FIRST_RSS@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	xorl	%r12d, %r12d
	andl	(%r14), %eax
	sete	%dl
	movq	8(%r14), %rcx
	movl	(%rcx), %ecx
	cmpl	$2, %ecx
	jl	LBB0_5
## %bb.1:
	movb	%dl, %r12b
	notl	%r12d
	xorl	%ebx, %ebx
	testl	%eax, %eax
	sete	%bl
	leal	(%rcx,%rbx), %r13d
	decl	%r13d
	leaq	(,%rbx,4), %r15
	jmp	LBB0_2
	.p2align	4, 0x90
LBB0_4:                                 ##   in Loop: Header=BB0_2 Depth=1
	incq	%rbx
	addq	$4, %r15
	cmpq	%r13, %rbx
	jae	LBB0_5
LBB0_2:                                 ## =>This Inner Loop Header: Depth=1
	leal	(%r12,%rbx), %edi
	movq	_cpu_online_mask@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_cpumask_next
	movq	16(%r14), %rsi
	addq	%r15, %rsi
	movl	%eax, %edi
	callq	_cpumask_set_cpu
	movq	24(%r14), %rax
	movl	(%rax,%r15), %edi
	movq	16(%r14), %rsi
	addq	%r15, %rsi
	callq	_irq_set_affinity_hint
	testl	%eax, %eax
	je	LBB0_4
## %bb.3:                               ##   in Loop: Header=BB0_2 Depth=1
	movq	8(%r14), %rdi
	leaq	L_.str(%rip), %rsi
	movl	%ebx, %edx
	callq	_IWL_ERR
	jmp	LBB0_4
LBB0_5:
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_IWL_SHARED_IRQ_FIRST_RSS,4,2   ## @IWL_SHARED_IRQ_FIRST_RSS
	.comm	_cpu_online_mask,4,2            ## @cpu_online_mask
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"Failed to set affinity mask for IRQ %d\n"

	.no_dead_strip	_iwl_pcie_irq_set_affinity
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function iwl_pcie_irq_set_affinity
_iwl_pcie_irq_set_affinity:             ; @iwl_pcie_irq_set_affinity
	.cfi_startproc
; %bb.0:
	stp	x26, x25, [sp, #-80]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	bl	_IWL_TRANS_GET_PCIE_TRANS
	ldr	w8, [x0]
Lloh0:
	adrp	x9, _IWL_SHARED_IRQ_FIRST_RSS@GOTPAGE
Lloh1:
	ldr	x9, [x9, _IWL_SHARED_IRQ_FIRST_RSS@GOTPAGEOFF]
Lloh2:
	ldr	w9, [x9]
	ands	w8, w9, w8
	ldr	x9, [x0, #8]
	ldr	w9, [x9]
	mov	w10, #-2
	cinc	w22, w10, ne
	cmp	w9, #2
	b.lt	LBB0_5
; %bb.1:
	mov	x19, x0
	cmp	w8, #0
	cset	w20, eq
	cinc	w8, w9, eq
	sub	w23, w8, #1
	lsl	x24, x20, #2
Lloh3:
	adrp	x25, _cpu_online_mask@GOTPAGE
Lloh4:
	ldr	x25, [x25, _cpu_online_mask@GOTPAGEOFF]
Lloh5:
	adrp	x21, l_.str@PAGE
Lloh6:
	add	x21, x21, l_.str@PAGEOFF
	b	LBB0_3
LBB0_2:                                 ;   in Loop: Header=BB0_3 Depth=1
	add	x20, x20, #1
	add	x24, x24, #4
	cmp	x20, x23
	b.hs	LBB0_5
LBB0_3:                                 ; =>This Inner Loop Header: Depth=1
	add	w0, w22, w20
	ldr	w1, [x25]
	bl	_cpumask_next
	ldr	x8, [x19, #16]
	add	x1, x8, x24
	bl	_cpumask_set_cpu
	ldp	x9, x8, [x19, #16]
	ldr	w0, [x8, x24]
	add	x1, x9, x24
	bl	_irq_set_affinity_hint
	cbz	w0, LBB0_2
; %bb.4:                                ;   in Loop: Header=BB0_3 Depth=1
	ldr	x0, [x19, #8]
	mov	x1, x21
	mov	x2, x20
	bl	_IWL_ERR
	b	LBB0_2
LBB0_5:
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp], #80             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpAdd	Lloh5, Lloh6
	.loh AdrpLdrGot	Lloh3, Lloh4
	.cfi_endproc
                                        ; -- End function
	.comm	_IWL_SHARED_IRQ_FIRST_RSS,4,2   ; @IWL_SHARED_IRQ_FIRST_RSS
	.comm	_cpu_online_mask,4,2            ; @cpu_online_mask
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"Failed to set affinity mask for IRQ %d\n"

	.no_dead_strip	_iwl_pcie_irq_set_affinity
.subsections_via_symbols
