	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function qed_hw_init_port
_qed_hw_init_port:                      ## @qed_hw_init_port
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%edx, %r15d
	movq	%rsi, %r14
	movq	%rdi, %rbx
	movl	4(%rdi), %edi
	callq	_QED_IS_CMT
	testl	%eax, %eax
	je	LBB0_2
## %bb.1:
	movq	%rbx, %rdi
	callq	_IS_LEAD_HWFN
	testl	%eax, %eax
	jne	LBB0_3
LBB0_2:
	movq	_NIG_REG_BRB_GATE_DNTFWD_PORT_RT_OFFSET@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	xorl	%edx, %edx
	callq	_STORE_RT_REG
LBB0_3:
	movq	_PHASE_PORT@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movl	(%rbx), %ecx
	movq	%rbx, %rdi
	movq	%r14, %rsi
	movl	%r15d, %r8d
	callq	_qed_init_run
	movl	%eax, %r15d
	testl	%eax, %eax
	jne	LBB0_5
## %bb.4:
	movq	_PGLUE_B_REG_MASTER_WRITE_PAD_ENABLE@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	movq	%r14, %rsi
	xorl	%ecx, %ecx
	callq	_qed_wr
LBB0_5:
	movl	%r15d, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_NIG_REG_BRB_GATE_DNTFWD_PORT_RT_OFFSET,4,2 ## @NIG_REG_BRB_GATE_DNTFWD_PORT_RT_OFFSET
	.comm	_PHASE_PORT,4,2                 ## @PHASE_PORT
	.comm	_PGLUE_B_REG_MASTER_WRITE_PAD_ENABLE,4,2 ## @PGLUE_B_REG_MASTER_WRITE_PAD_ENABLE
	.no_dead_strip	_qed_hw_init_port
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function qed_hw_init_port
_qed_hw_init_port:                      ; @qed_hw_init_port
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x21, x2
	mov	x19, x1
	mov	x20, x0
	ldr	w0, [x0, #4]
	bl	_QED_IS_CMT
	cbz	w0, LBB0_2
; %bb.1:
	mov	x0, x20
	bl	_IS_LEAD_HWFN
	cbnz	w0, LBB0_3
LBB0_2:
Lloh0:
	adrp	x8, _NIG_REG_BRB_GATE_DNTFWD_PORT_RT_OFFSET@GOTPAGE
Lloh1:
	ldr	x8, [x8, _NIG_REG_BRB_GATE_DNTFWD_PORT_RT_OFFSET@GOTPAGEOFF]
Lloh2:
	ldr	w1, [x8]
	mov	x0, x20
	mov	w2, #0
	bl	_STORE_RT_REG
LBB0_3:
Lloh3:
	adrp	x8, _PHASE_PORT@GOTPAGE
Lloh4:
	ldr	x8, [x8, _PHASE_PORT@GOTPAGEOFF]
Lloh5:
	ldr	w2, [x8]
	ldr	w3, [x20]
	mov	x0, x20
	mov	x1, x19
	mov	x4, x21
	bl	_qed_init_run
	mov	x21, x0
	cbnz	w0, LBB0_5
; %bb.4:
Lloh6:
	adrp	x8, _PGLUE_B_REG_MASTER_WRITE_PAD_ENABLE@GOTPAGE
Lloh7:
	ldr	x8, [x8, _PGLUE_B_REG_MASTER_WRITE_PAD_ENABLE@GOTPAGEOFF]
Lloh8:
	ldr	w2, [x8]
	mov	x0, x20
	mov	x1, x19
	mov	w3, #0
	bl	_qed_wr
LBB0_5:
	mov	x0, x21
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.cfi_endproc
                                        ; -- End function
	.comm	_NIG_REG_BRB_GATE_DNTFWD_PORT_RT_OFFSET,4,2 ; @NIG_REG_BRB_GATE_DNTFWD_PORT_RT_OFFSET
	.comm	_PHASE_PORT,4,2                 ; @PHASE_PORT
	.comm	_PGLUE_B_REG_MASTER_WRITE_PAD_ENABLE,4,2 ; @PGLUE_B_REG_MASTER_WRITE_PAD_ENABLE
	.no_dead_strip	_qed_hw_init_port
.subsections_via_symbols
