	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function r8153_first_init
_r8153_first_init:                      ## @r8153_first_init
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r14
	xorl	%esi, %esi
	callq	_r8153_mac_clk_spd
	movq	%r14, %rdi
	movl	$1, %esi
	callq	_rxdy_gated_en
	movq	%r14, %rdi
	callq	_r8153_teredo_off
	movq	_MCU_TYPE_PLA@GOTPCREL(%rip), %r12
	movl	(%r12), %esi
	movq	_PLA_RCR@GOTPCREL(%rip), %rbx
	movl	(%rbx), %edx
	movq	%r14, %rdi
	callq	_ocp_read_dword
	movq	_RCR_ACPT_ALL@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	notl	%ecx
	andl	%eax, %ecx
	movl	(%r12), %esi
	movl	(%rbx), %edx
	movq	%r14, %rdi
	callq	_ocp_write_dword
	movq	%r14, %rdi
	callq	_rtl8152_nic_reset
	movq	%r14, %rdi
	callq	_rtl_reset_bmu
	movl	(%r12), %esi
	movq	_PLA_OOB_CTRL@GOTPCREL(%rip), %r15
	movl	(%r15), %edx
	movq	%r14, %rdi
	callq	_ocp_read_byte
	movq	_NOW_IS_OOB@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	notl	%ecx
	andl	%eax, %ecx
	movl	(%r12), %esi
	movl	(%r15), %edx
	movq	%r14, %rdi
	callq	_ocp_write_byte
	movl	(%r12), %esi
	movq	_PLA_SFF_STS_7@GOTPCREL(%rip), %r13
	movl	(%r13), %edx
	movq	%r14, %rdi
	callq	_ocp_read_word
	movq	_MCU_BORW_EN@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	notl	%ecx
	andl	%eax, %ecx
	movq	%r12, %rbx
	movl	(%r12), %esi
	movl	(%r13), %edx
	movq	%r14, %rdi
	callq	_ocp_write_word
	movl	$1000, %r13d                    ## imm = 0x3E8
	movq	_LINK_LIST_READY@GOTPCREL(%rip), %r12
	.p2align	4, 0x90
LBB0_1:                                 ## =>This Inner Loop Header: Depth=1
	movl	(%rbx), %esi
	movl	(%r15), %edx
	movq	%r14, %rdi
	callq	_ocp_read_byte
	testl	%eax, (%r12)
	jne	LBB0_3
## %bb.2:                               ##   in Loop: Header=BB0_1 Depth=1
	movl	$1000, %edi                     ## imm = 0x3E8
	movl	$2000, %esi                     ## imm = 0x7D0
	callq	_usleep_range
	decl	%r13d
	jne	LBB0_1
LBB0_3:
	movq	%rbx, %r13
	movl	(%rbx), %esi
	movq	_PLA_SFF_STS_7@GOTPCREL(%rip), %rbx
	movl	(%rbx), %edx
	movq	%r14, %rdi
	callq	_ocp_read_word
	movq	_RE_INIT_LL@GOTPCREL(%rip), %rcx
	orl	(%rcx), %eax
	movl	(%r13), %esi
	movl	(%rbx), %edx
	movq	%r14, %rdi
	movl	%eax, %ecx
	callq	_ocp_write_word
	movl	$1000, %ebx                     ## imm = 0x3E8
	.p2align	4, 0x90
LBB0_4:                                 ## =>This Inner Loop Header: Depth=1
	movl	(%r13), %esi
	movl	(%r15), %edx
	movq	%r14, %rdi
	callq	_ocp_read_byte
	testl	%eax, (%r12)
	jne	LBB0_6
## %bb.5:                               ##   in Loop: Header=BB0_4 Depth=1
	movl	$1000, %edi                     ## imm = 0x3E8
	movl	$2000, %esi                     ## imm = 0x7D0
	callq	_usleep_range
	decl	%ebx
	jne	LBB0_4
LBB0_6:
	movq	(%r14), %rax
	movq	_NETIF_F_HW_VLAN_CTAG_RX@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	andl	(%rax), %esi
	movq	%r14, %rdi
	callq	_rtl_rx_vlan_en
	movq	(%r14), %rax
	movq	_VLAN_ETH_HLEN@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	addl	4(%rax), %ecx
	movq	_ETH_FCS_LEN@GOTPCREL(%rip), %rax
	addl	(%rax), %ecx
	movl	(%r13), %esi
	movq	_PLA_RMS@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r14, %rdi
	callq	_ocp_write_word
	movl	(%r13), %esi
	movq	_PLA_MTPS@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	_MTPS_JUMBO@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movq	%r14, %rdi
	callq	_ocp_write_byte
	movl	(%r13), %esi
	movq	_PLA_TCR0@GOTPCREL(%rip), %rbx
	movl	(%rbx), %edx
	movq	%r14, %rdi
	callq	_ocp_read_word
	movq	_TCR0_AUTO_FIFO@GOTPCREL(%rip), %rcx
	orl	(%rcx), %eax
	movl	(%r13), %esi
	movl	(%rbx), %edx
	movq	%r14, %rdi
	movl	%eax, %ecx
	callq	_ocp_write_word
	movq	%r14, %rdi
	callq	_rtl8152_nic_reset
	movl	(%r13), %esi
	movq	_PLA_RXFIFO_CTRL0@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	_RXFIFO_THR1_NORMAL@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movq	%r14, %rdi
	callq	_ocp_write_dword
	movl	(%r13), %esi
	movq	_PLA_RXFIFO_CTRL1@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	_RXFIFO_THR2_NORMAL@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movq	%r14, %rdi
	callq	_ocp_write_word
	movl	(%r13), %esi
	movq	_PLA_RXFIFO_CTRL2@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	_RXFIFO_THR3_NORMAL@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movq	%r14, %rdi
	callq	_ocp_write_word
	movl	(%r13), %esi
	movq	_PLA_TXFIFO_CTRL@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	_TXFIFO_THR_NORMAL2@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movq	%r14, %rdi
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_ocp_write_dword                ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_MCU_TYPE_PLA,4,2               ## @MCU_TYPE_PLA
	.comm	_PLA_RCR,4,2                    ## @PLA_RCR
	.comm	_RCR_ACPT_ALL,4,2               ## @RCR_ACPT_ALL
	.comm	_PLA_OOB_CTRL,4,2               ## @PLA_OOB_CTRL
	.comm	_NOW_IS_OOB,4,2                 ## @NOW_IS_OOB
	.comm	_PLA_SFF_STS_7,4,2              ## @PLA_SFF_STS_7
	.comm	_MCU_BORW_EN,4,2                ## @MCU_BORW_EN
	.comm	_LINK_LIST_READY,4,2            ## @LINK_LIST_READY
	.comm	_RE_INIT_LL,4,2                 ## @RE_INIT_LL
	.comm	_NETIF_F_HW_VLAN_CTAG_RX,4,2    ## @NETIF_F_HW_VLAN_CTAG_RX
	.comm	_VLAN_ETH_HLEN,4,2              ## @VLAN_ETH_HLEN
	.comm	_ETH_FCS_LEN,4,2                ## @ETH_FCS_LEN
	.comm	_PLA_RMS,4,2                    ## @PLA_RMS
	.comm	_PLA_MTPS,4,2                   ## @PLA_MTPS
	.comm	_MTPS_JUMBO,4,2                 ## @MTPS_JUMBO
	.comm	_PLA_TCR0,4,2                   ## @PLA_TCR0
	.comm	_TCR0_AUTO_FIFO,4,2             ## @TCR0_AUTO_FIFO
	.comm	_PLA_RXFIFO_CTRL0,4,2           ## @PLA_RXFIFO_CTRL0
	.comm	_RXFIFO_THR1_NORMAL,4,2         ## @RXFIFO_THR1_NORMAL
	.comm	_PLA_RXFIFO_CTRL1,4,2           ## @PLA_RXFIFO_CTRL1
	.comm	_RXFIFO_THR2_NORMAL,4,2         ## @RXFIFO_THR2_NORMAL
	.comm	_PLA_RXFIFO_CTRL2,4,2           ## @PLA_RXFIFO_CTRL2
	.comm	_RXFIFO_THR3_NORMAL,4,2         ## @RXFIFO_THR3_NORMAL
	.comm	_PLA_TXFIFO_CTRL,4,2            ## @PLA_TXFIFO_CTRL
	.comm	_TXFIFO_THR_NORMAL2,4,2         ## @TXFIFO_THR_NORMAL2
	.no_dead_strip	_r8153_first_init
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function r8153_first_init
_r8153_first_init:                      ; @r8153_first_init
	.cfi_startproc
; %bb.0:
	stp	x24, x23, [sp, #-64]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x19, x0
	mov	w1, #0
	bl	_r8153_mac_clk_spd
	mov	x0, x19
	mov	w1, #1
	bl	_rxdy_gated_en
	mov	x0, x19
	bl	_r8153_teredo_off
Lloh0:
	adrp	x20, _MCU_TYPE_PLA@GOTPAGE
Lloh1:
	ldr	x20, [x20, _MCU_TYPE_PLA@GOTPAGEOFF]
	ldr	w1, [x20]
Lloh2:
	adrp	x21, _PLA_RCR@GOTPAGE
Lloh3:
	ldr	x21, [x21, _PLA_RCR@GOTPAGEOFF]
	ldr	w2, [x21]
	mov	x0, x19
	bl	_ocp_read_dword
Lloh4:
	adrp	x8, _RCR_ACPT_ALL@GOTPAGE
Lloh5:
	ldr	x8, [x8, _RCR_ACPT_ALL@GOTPAGEOFF]
Lloh6:
	ldr	w8, [x8]
	bic	w3, w0, w8
	ldr	w1, [x20]
	ldr	w2, [x21]
	mov	x0, x19
	bl	_ocp_write_dword
	mov	x0, x19
	bl	_rtl8152_nic_reset
	mov	x0, x19
	bl	_rtl_reset_bmu
	ldr	w1, [x20]
Lloh7:
	adrp	x21, _PLA_OOB_CTRL@GOTPAGE
Lloh8:
	ldr	x21, [x21, _PLA_OOB_CTRL@GOTPAGEOFF]
	ldr	w2, [x21]
	mov	x0, x19
	bl	_ocp_read_byte
Lloh9:
	adrp	x8, _NOW_IS_OOB@GOTPAGE
Lloh10:
	ldr	x8, [x8, _NOW_IS_OOB@GOTPAGEOFF]
Lloh11:
	ldr	w8, [x8]
	bic	w3, w0, w8
	ldr	w1, [x20]
	ldr	w2, [x21]
	mov	x0, x19
	bl	_ocp_write_byte
	ldr	w1, [x20]
Lloh12:
	adrp	x23, _PLA_SFF_STS_7@GOTPAGE
Lloh13:
	ldr	x23, [x23, _PLA_SFF_STS_7@GOTPAGEOFF]
	ldr	w2, [x23]
	mov	x0, x19
	bl	_ocp_read_word
Lloh14:
	adrp	x8, _MCU_BORW_EN@GOTPAGE
Lloh15:
	ldr	x8, [x8, _MCU_BORW_EN@GOTPAGEOFF]
Lloh16:
	ldr	w8, [x8]
	bic	w3, w0, w8
	ldr	w1, [x20]
	ldr	w2, [x23]
	mov	x0, x19
	bl	_ocp_write_word
	mov	w24, #1000
Lloh17:
	adrp	x22, _LINK_LIST_READY@GOTPAGE
Lloh18:
	ldr	x22, [x22, _LINK_LIST_READY@GOTPAGEOFF]
LBB0_1:                                 ; =>This Inner Loop Header: Depth=1
	ldr	w1, [x20]
	ldr	w2, [x21]
	mov	x0, x19
	bl	_ocp_read_byte
	ldr	w8, [x22]
	tst	w8, w0
	b.ne	LBB0_3
; %bb.2:                                ;   in Loop: Header=BB0_1 Depth=1
	mov	w0, #1000
	mov	w1, #2000
	bl	_usleep_range
	subs	w24, w24, #1
	b.ne	LBB0_1
LBB0_3:
	ldr	w1, [x20]
	ldr	w2, [x23]
	mov	x0, x19
	bl	_ocp_read_word
Lloh19:
	adrp	x8, _RE_INIT_LL@GOTPAGE
Lloh20:
	ldr	x8, [x8, _RE_INIT_LL@GOTPAGEOFF]
Lloh21:
	ldr	w8, [x8]
	orr	w3, w8, w0
	ldr	w1, [x20]
	ldr	w2, [x23]
	mov	x0, x19
	bl	_ocp_write_word
	mov	w23, #1000
LBB0_4:                                 ; =>This Inner Loop Header: Depth=1
	ldr	w1, [x20]
	ldr	w2, [x21]
	mov	x0, x19
	bl	_ocp_read_byte
	ldr	w8, [x22]
	tst	w8, w0
	b.ne	LBB0_6
; %bb.5:                                ;   in Loop: Header=BB0_4 Depth=1
	mov	w0, #1000
	mov	w1, #2000
	bl	_usleep_range
	subs	w23, w23, #1
	b.ne	LBB0_4
LBB0_6:
	ldr	x8, [x19]
	ldr	w8, [x8]
Lloh22:
	adrp	x9, _NETIF_F_HW_VLAN_CTAG_RX@GOTPAGE
Lloh23:
	ldr	x9, [x9, _NETIF_F_HW_VLAN_CTAG_RX@GOTPAGEOFF]
Lloh24:
	ldr	w9, [x9]
	and	w1, w9, w8
	mov	x0, x19
	bl	_rtl_rx_vlan_en
	ldr	x8, [x19]
	ldr	w8, [x8, #4]
Lloh25:
	adrp	x9, _VLAN_ETH_HLEN@GOTPAGE
Lloh26:
	ldr	x9, [x9, _VLAN_ETH_HLEN@GOTPAGEOFF]
Lloh27:
	ldr	w9, [x9]
Lloh28:
	adrp	x10, _ETH_FCS_LEN@GOTPAGE
Lloh29:
	ldr	x10, [x10, _ETH_FCS_LEN@GOTPAGEOFF]
Lloh30:
	ldr	w10, [x10]
	add	w8, w9, w8
	add	w3, w8, w10
	ldr	w1, [x20]
Lloh31:
	adrp	x8, _PLA_RMS@GOTPAGE
Lloh32:
	ldr	x8, [x8, _PLA_RMS@GOTPAGEOFF]
Lloh33:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_ocp_write_word
	ldr	w1, [x20]
Lloh34:
	adrp	x8, _PLA_MTPS@GOTPAGE
Lloh35:
	ldr	x8, [x8, _PLA_MTPS@GOTPAGEOFF]
Lloh36:
	ldr	w2, [x8]
Lloh37:
	adrp	x8, _MTPS_JUMBO@GOTPAGE
Lloh38:
	ldr	x8, [x8, _MTPS_JUMBO@GOTPAGEOFF]
Lloh39:
	ldr	w3, [x8]
	mov	x0, x19
	bl	_ocp_write_byte
	ldr	w1, [x20]
Lloh40:
	adrp	x21, _PLA_TCR0@GOTPAGE
Lloh41:
	ldr	x21, [x21, _PLA_TCR0@GOTPAGEOFF]
	ldr	w2, [x21]
	mov	x0, x19
	bl	_ocp_read_word
Lloh42:
	adrp	x8, _TCR0_AUTO_FIFO@GOTPAGE
Lloh43:
	ldr	x8, [x8, _TCR0_AUTO_FIFO@GOTPAGEOFF]
Lloh44:
	ldr	w8, [x8]
	orr	w3, w8, w0
	ldr	w1, [x20]
	ldr	w2, [x21]
	mov	x0, x19
	bl	_ocp_write_word
	mov	x0, x19
	bl	_rtl8152_nic_reset
	ldr	w1, [x20]
Lloh45:
	adrp	x8, _PLA_RXFIFO_CTRL0@GOTPAGE
Lloh46:
	ldr	x8, [x8, _PLA_RXFIFO_CTRL0@GOTPAGEOFF]
Lloh47:
	ldr	w2, [x8]
Lloh48:
	adrp	x8, _RXFIFO_THR1_NORMAL@GOTPAGE
Lloh49:
	ldr	x8, [x8, _RXFIFO_THR1_NORMAL@GOTPAGEOFF]
Lloh50:
	ldr	w3, [x8]
	mov	x0, x19
	bl	_ocp_write_dword
	ldr	w1, [x20]
Lloh51:
	adrp	x8, _PLA_RXFIFO_CTRL1@GOTPAGE
Lloh52:
	ldr	x8, [x8, _PLA_RXFIFO_CTRL1@GOTPAGEOFF]
Lloh53:
	ldr	w2, [x8]
Lloh54:
	adrp	x8, _RXFIFO_THR2_NORMAL@GOTPAGE
Lloh55:
	ldr	x8, [x8, _RXFIFO_THR2_NORMAL@GOTPAGEOFF]
Lloh56:
	ldr	w3, [x8]
	mov	x0, x19
	bl	_ocp_write_word
	ldr	w1, [x20]
Lloh57:
	adrp	x8, _PLA_RXFIFO_CTRL2@GOTPAGE
Lloh58:
	ldr	x8, [x8, _PLA_RXFIFO_CTRL2@GOTPAGEOFF]
Lloh59:
	ldr	w2, [x8]
Lloh60:
	adrp	x8, _RXFIFO_THR3_NORMAL@GOTPAGE
Lloh61:
	ldr	x8, [x8, _RXFIFO_THR3_NORMAL@GOTPAGEOFF]
Lloh62:
	ldr	w3, [x8]
	mov	x0, x19
	bl	_ocp_write_word
	ldr	w1, [x20]
Lloh63:
	adrp	x8, _PLA_TXFIFO_CTRL@GOTPAGE
Lloh64:
	ldr	x8, [x8, _PLA_TXFIFO_CTRL@GOTPAGEOFF]
Lloh65:
	adrp	x9, _TXFIFO_THR_NORMAL2@GOTPAGE
Lloh66:
	ldr	x9, [x9, _TXFIFO_THR_NORMAL2@GOTPAGEOFF]
Lloh67:
	ldr	w2, [x8]
Lloh68:
	ldr	w3, [x9]
	mov	x0, x19
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	b	_ocp_write_dword
	.loh AdrpLdrGot	Lloh17, Lloh18
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh16
	.loh AdrpLdrGot	Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGot	Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh4, Lloh5, Lloh6
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh19, Lloh20, Lloh21
	.loh AdrpLdrGotLdr	Lloh65, Lloh66, Lloh68
	.loh AdrpLdrGotLdr	Lloh63, Lloh64, Lloh67
	.loh AdrpLdrGotLdr	Lloh60, Lloh61, Lloh62
	.loh AdrpLdrGotLdr	Lloh57, Lloh58, Lloh59
	.loh AdrpLdrGotLdr	Lloh54, Lloh55, Lloh56
	.loh AdrpLdrGotLdr	Lloh51, Lloh52, Lloh53
	.loh AdrpLdrGotLdr	Lloh48, Lloh49, Lloh50
	.loh AdrpLdrGotLdr	Lloh45, Lloh46, Lloh47
	.loh AdrpLdrGotLdr	Lloh42, Lloh43, Lloh44
	.loh AdrpLdrGot	Lloh40, Lloh41
	.loh AdrpLdrGotLdr	Lloh37, Lloh38, Lloh39
	.loh AdrpLdrGotLdr	Lloh34, Lloh35, Lloh36
	.loh AdrpLdrGotLdr	Lloh31, Lloh32, Lloh33
	.loh AdrpLdrGotLdr	Lloh28, Lloh29, Lloh30
	.loh AdrpLdrGotLdr	Lloh25, Lloh26, Lloh27
	.loh AdrpLdrGotLdr	Lloh22, Lloh23, Lloh24
	.cfi_endproc
                                        ; -- End function
	.comm	_MCU_TYPE_PLA,4,2               ; @MCU_TYPE_PLA
	.comm	_PLA_RCR,4,2                    ; @PLA_RCR
	.comm	_RCR_ACPT_ALL,4,2               ; @RCR_ACPT_ALL
	.comm	_PLA_OOB_CTRL,4,2               ; @PLA_OOB_CTRL
	.comm	_NOW_IS_OOB,4,2                 ; @NOW_IS_OOB
	.comm	_PLA_SFF_STS_7,4,2              ; @PLA_SFF_STS_7
	.comm	_MCU_BORW_EN,4,2                ; @MCU_BORW_EN
	.comm	_LINK_LIST_READY,4,2            ; @LINK_LIST_READY
	.comm	_RE_INIT_LL,4,2                 ; @RE_INIT_LL
	.comm	_NETIF_F_HW_VLAN_CTAG_RX,4,2    ; @NETIF_F_HW_VLAN_CTAG_RX
	.comm	_VLAN_ETH_HLEN,4,2              ; @VLAN_ETH_HLEN
	.comm	_ETH_FCS_LEN,4,2                ; @ETH_FCS_LEN
	.comm	_PLA_RMS,4,2                    ; @PLA_RMS
	.comm	_PLA_MTPS,4,2                   ; @PLA_MTPS
	.comm	_MTPS_JUMBO,4,2                 ; @MTPS_JUMBO
	.comm	_PLA_TCR0,4,2                   ; @PLA_TCR0
	.comm	_TCR0_AUTO_FIFO,4,2             ; @TCR0_AUTO_FIFO
	.comm	_PLA_RXFIFO_CTRL0,4,2           ; @PLA_RXFIFO_CTRL0
	.comm	_RXFIFO_THR1_NORMAL,4,2         ; @RXFIFO_THR1_NORMAL
	.comm	_PLA_RXFIFO_CTRL1,4,2           ; @PLA_RXFIFO_CTRL1
	.comm	_RXFIFO_THR2_NORMAL,4,2         ; @RXFIFO_THR2_NORMAL
	.comm	_PLA_RXFIFO_CTRL2,4,2           ; @PLA_RXFIFO_CTRL2
	.comm	_RXFIFO_THR3_NORMAL,4,2         ; @RXFIFO_THR3_NORMAL
	.comm	_PLA_TXFIFO_CTRL,4,2            ; @PLA_TXFIFO_CTRL
	.comm	_TXFIFO_THR_NORMAL2,4,2         ; @TXFIFO_THR_NORMAL2
	.no_dead_strip	_r8153_first_init
.subsections_via_symbols
