	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_pci_bridge_emul_conf_write     ## -- Begin function pci_bridge_emul_conf_write
	.p2align	4, 0x90
_pci_bridge_emul_conf_write:            ## @pci_bridge_emul_conf_write
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%ecx, %r14d
	movl	%esi, %r12d
	movq	%rdi, %r15
	movl	%esi, %ebx
	andl	$-4, %ebx
	movq	40(%rdi), %rax
	testq	%rax, %rax
	je	LBB0_2
## %bb.1:
	movq	_PCI_CAP_PCIE_END@GOTPCREL(%rip), %rcx
	cmpl	(%rcx), %ebx
	jge	LBB0_4
LBB0_2:
	testq	%rax, %rax
	jne	LBB0_7
## %bb.3:
	movq	_PCI_BRIDGE_CONF_END@GOTPCREL(%rip), %rax
	cmpl	(%rax), %ebx
	jl	LBB0_7
LBB0_4:
	movq	_PCIBIOS_SUCCESSFUL@GOTPCREL(%rip), %rax
LBB0_5:
	movl	(%rax), %eax
LBB0_6:
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_7:
	shll	$3, %r12d
	andl	$24, %r12d
	cmpl	$1, %edx
	je	LBB0_11
## %bb.8:
	cmpl	$4, %edx
	je	LBB0_13
## %bb.9:
	cmpl	$2, %edx
	jne	LBB0_18
## %bb.10:
	movl	$65535, %r13d                   ## imm = 0xFFFF
	jmp	LBB0_12
LBB0_11:
	movl	$255, %r13d
LBB0_12:
	movl	%r12d, %ecx
	shll	%cl, %r13d
	jmp	LBB0_14
LBB0_13:
	movl	$-1, %r13d
LBB0_14:
	leaq	-44(%rbp), %rcx
	movq	%r15, %rdi
	movl	%ebx, %esi
	movl	$4, %edx
	callq	_pci_bridge_emul_conf_read
	movq	_PCIBIOS_SUCCESSFUL@GOTPCREL(%rip), %r10
	cmpl	(%r10), %eax
	jne	LBB0_6
## %bb.15:
	cmpq	$0, 40(%r15)
	je	LBB0_17
## %bb.16:
	movq	_PCI_CAP_PCIE_START@GOTPCREL(%rip), %rax
	movl	%ebx, %edx
	subl	(%rax), %edx
	jge	LBB0_19
LBB0_17:
	movq	16(%r15), %rax
	addq	$8, %rax
	leaq	8(%r15), %r8
	movq	%r15, %rcx
	jmp	LBB0_20
LBB0_18:
	movq	_PCIBIOS_BAD_REGISTER_NUMBER@GOTPCREL(%rip), %rax
	jmp	LBB0_5
LBB0_19:
	movq	16(%r15), %rax
	leaq	32(%r15), %r8
	leaq	24(%r15), %rcx
	movl	%edx, %ebx
LBB0_20:
	movq	(%rcx), %rdi
	movq	(%rax), %r9
	movl	-44(%rbp), %edx
	leal	3(%rbx), %ecx
	testl	%ebx, %ebx
	cmovnsl	%ebx, %ecx
	sarl	$2, %ecx
	movslq	%ecx, %rsi
	movl	%r12d, %ecx
	shll	%cl, %r14d
	movl	(%rdi,%rsi,8), %eax
	andl	%r13d, %eax
	movl	%r13d, %ecx
	andl	%r14d, %ecx
	xorl	%edx, %r14d
	andl	%eax, %r14d
	xorl	%edx, %r14d
	andl	4(%rdi,%rsi,8), %ecx
	notl	%ecx
	andl	%r14d, %ecx
	movl	%ecx, (%r8,%rsi,4)
	testq	%r9, %r9
	je	LBB0_22
## %bb.21:
	movq	%r15, %rdi
	movl	%ebx, %esi
	movl	%r13d, %r8d
	movq	%r10, %rbx
	callq	*%r9
	movq	%rbx, %r10
LBB0_22:
	movl	(%r10), %eax
	jmp	LBB0_6
	.cfi_endproc
                                        ## -- End function
	.comm	_PCI_CAP_PCIE_END,4,2           ## @PCI_CAP_PCIE_END
	.comm	_PCIBIOS_SUCCESSFUL,4,2         ## @PCIBIOS_SUCCESSFUL
	.comm	_PCI_BRIDGE_CONF_END,4,2        ## @PCI_BRIDGE_CONF_END
	.comm	_PCIBIOS_BAD_REGISTER_NUMBER,4,2 ## @PCIBIOS_BAD_REGISTER_NUMBER
	.comm	_PCI_CAP_PCIE_START,4,2         ## @PCI_CAP_PCIE_START
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_pci_bridge_emul_conf_write     ; -- Begin function pci_bridge_emul_conf_write
	.p2align	2
_pci_bridge_emul_conf_write:            ; @pci_bridge_emul_conf_write
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #80
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	and	w21, w1, #0xfffffffc
	ldr	x8, [x0, #40]
Lloh0:
	adrp	x9, _PCI_CAP_PCIE_END@GOTPAGE
Lloh1:
	ldr	x9, [x9, _PCI_CAP_PCIE_END@GOTPAGEOFF]
Lloh2:
	ldr	w9, [x9]
	cmp	x8, #0
	ccmp	w21, w9, #8, ne
	b.ge	LBB0_6
; %bb.1:
Lloh3:
	adrp	x9, _PCI_BRIDGE_CONF_END@GOTPAGE
Lloh4:
	ldr	x9, [x9, _PCI_BRIDGE_CONF_END@GOTPAGEOFF]
Lloh5:
	ldr	w9, [x9]
	cmp	x8, #0
	ccmp	w21, w9, #8, eq
	b.ge	LBB0_6
; %bb.2:
	mov	x20, x3
	mov	x19, x0
	ubfiz	w23, w1, #3, #2
	cmp	w2, #1
	b.eq	LBB0_9
; %bb.3:
	cmp	w2, #4
	b.eq	LBB0_11
; %bb.4:
	cmp	w2, #2
	b.ne	LBB0_16
; %bb.5:
	mov	w8, #65535
	b	LBB0_10
LBB0_6:
Lloh6:
	adrp	x8, _PCIBIOS_SUCCESSFUL@GOTPAGE
Lloh7:
	ldr	x8, [x8, _PCIBIOS_SUCCESSFUL@GOTPAGEOFF]
LBB0_7:
	ldr	w0, [x8]
LBB0_8:
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #80
	ret
LBB0_9:
	mov	w8, #255
LBB0_10:
	lsl	w22, w8, w23
	b	LBB0_12
LBB0_11:
	mov	w22, #-1
LBB0_12:
	add	x3, sp, #12
	mov	x0, x19
	mov	x1, x21
	mov	w2, #4
	bl	_pci_bridge_emul_conf_read
Lloh8:
	adrp	x24, _PCIBIOS_SUCCESSFUL@GOTPAGE
Lloh9:
	ldr	x24, [x24, _PCIBIOS_SUCCESSFUL@GOTPAGEOFF]
	ldr	w8, [x24]
	cmp	w0, w8
	b.ne	LBB0_8
; %bb.13:
	ldr	x8, [x19, #40]
	cbz	x8, LBB0_15
; %bb.14:
Lloh10:
	adrp	x8, _PCI_CAP_PCIE_START@GOTPAGE
Lloh11:
	ldr	x8, [x8, _PCI_CAP_PCIE_START@GOTPAGEOFF]
Lloh12:
	ldr	w8, [x8]
	subs	w11, w21, w8
	b.ge	LBB0_17
LBB0_15:
	ldr	x8, [x19, #16]
	add	x9, x8, #8
	add	x8, x19, #8
	mov	x10, x19
	b	LBB0_18
LBB0_16:
Lloh13:
	adrp	x8, _PCIBIOS_BAD_REGISTER_NUMBER@GOTPAGE
Lloh14:
	ldr	x8, [x8, _PCIBIOS_BAD_REGISTER_NUMBER@GOTPAGEOFF]
	b	LBB0_7
LBB0_17:
	ldr	x9, [x19, #16]
	add	x8, x19, #32
	add	x10, x19, #24
	mov	x21, x11
LBB0_18:
	ldr	x10, [x10]
	ldr	x9, [x9]
	ldr	w2, [sp, #12]
	add	w11, w21, #3
	cmp	w21, #0
	csel	w11, w11, w21, lt
	asr	w11, w11, #2
	add	x10, x10, w11, sxtw #3
	ldp	w12, w10, [x10]
	and	w12, w12, w22
	bic	w13, w2, w12
	lsl	w14, w20, w23
	and	w12, w12, w14
	orr	w12, w13, w12
	and	w13, w22, w14
	and	w10, w13, w10
	bic	w3, w12, w10
	str	w3, [x8, w11, sxtw #2]
	cbz	x9, LBB0_20
; %bb.19:
	mov	x0, x19
	mov	x1, x21
	mov	x4, x22
	blr	x9
LBB0_20:
	ldr	w0, [x24]
	b	LBB0_8
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGot	Lloh6, Lloh7
	.loh AdrpLdrGot	Lloh8, Lloh9
	.loh AdrpLdrGotLdr	Lloh10, Lloh11, Lloh12
	.loh AdrpLdrGot	Lloh13, Lloh14
	.cfi_endproc
                                        ; -- End function
	.comm	_PCI_CAP_PCIE_END,4,2           ; @PCI_CAP_PCIE_END
	.comm	_PCIBIOS_SUCCESSFUL,4,2         ; @PCIBIOS_SUCCESSFUL
	.comm	_PCI_BRIDGE_CONF_END,4,2        ; @PCI_BRIDGE_CONF_END
	.comm	_PCIBIOS_BAD_REGISTER_NUMBER,4,2 ; @PCIBIOS_BAD_REGISTER_NUMBER
	.comm	_PCI_CAP_PCIE_START,4,2         ; @PCI_CAP_PCIE_START
.subsections_via_symbols
