	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function rt61pci_stop_queue
_rt61pci_stop_queue:                    ## @rt61pci_stop_queue
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	(%rdi), %eax
	addl	$-128, %eax
	cmpl	$5, %eax
	ja	LBB0_9
## %bb.1:
	movq	8(%rdi), %rbx
	leaq	LJTI0_0(%rip), %rcx
	movslq	(%rcx,%rax,4), %rax
	addq	%rcx, %rax
	jmpq	*%rax
LBB0_7:
	movq	_TXRX_CSR0@GOTPCREL(%rip), %r14
	movl	(%r14), %esi
	movq	%rbx, %rdi
	callq	_rt2x00mmio_register_read
	movl	%eax, -28(%rbp)
	movq	_TXRX_CSR0_DISABLE_RX@GOTPCREL(%rip), %rax
	jmp	LBB0_3
LBB0_8:
	movq	_TXRX_CSR9@GOTPCREL(%rip), %r15
	movl	(%r15), %esi
	movq	%rbx, %rdi
	callq	_rt2x00mmio_register_read
	movl	%eax, -28(%rbp)
	movq	_TXRX_CSR9_TSF_TICKING@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	leaq	-28(%rbp), %r14
	movq	%r14, %rdi
	xorl	%edx, %edx
	callq	_rt2x00_set_field32
	movq	_TXRX_CSR9_TBTT_ENABLE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	xorl	%edx, %edx
	callq	_rt2x00_set_field32
	movq	_TXRX_CSR9_BEACON_GEN@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	xorl	%edx, %edx
	callq	_rt2x00_set_field32
	movl	(%r15), %esi
	movl	-28(%rbp), %edx
	movq	%rbx, %rdi
	callq	_rt2x00mmio_register_write
	movq	%rbx, %rdi
	callq	_tasklet_kill
	jmp	LBB0_9
LBB0_2:
	movq	_TX_CNTL_CSR@GOTPCREL(%rip), %r14
	movl	(%r14), %esi
	movq	%rbx, %rdi
	callq	_rt2x00mmio_register_read
	movl	%eax, -28(%rbp)
	movq	_TX_CNTL_CSR_ABORT_TX_AC0@GOTPCREL(%rip), %rax
	jmp	LBB0_3
LBB0_4:
	movq	_TX_CNTL_CSR@GOTPCREL(%rip), %r14
	movl	(%r14), %esi
	movq	%rbx, %rdi
	callq	_rt2x00mmio_register_read
	movl	%eax, -28(%rbp)
	movq	_TX_CNTL_CSR_ABORT_TX_AC1@GOTPCREL(%rip), %rax
	jmp	LBB0_3
LBB0_6:
	movq	_TX_CNTL_CSR@GOTPCREL(%rip), %r14
	movl	(%r14), %esi
	movq	%rbx, %rdi
	callq	_rt2x00mmio_register_read
	movl	%eax, -28(%rbp)
	movq	_TX_CNTL_CSR_ABORT_TX_AC3@GOTPCREL(%rip), %rax
	jmp	LBB0_3
LBB0_5:
	movq	_TX_CNTL_CSR@GOTPCREL(%rip), %r14
	movl	(%r14), %esi
	movq	%rbx, %rdi
	callq	_rt2x00mmio_register_read
	movl	%eax, -28(%rbp)
	movq	_TX_CNTL_CSR_ABORT_TX_AC2@GOTPCREL(%rip), %rax
LBB0_3:
	movl	(%rax), %esi
	leaq	-28(%rbp), %rdi
	movl	$1, %edx
	callq	_rt2x00_set_field32
	movl	(%r14), %esi
	movl	-28(%rbp), %edx
	movq	%rbx, %rdi
	callq	_rt2x00mmio_register_write
LBB0_9:
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
	.p2align	2, 0x90
	.data_region jt32
.set L0_0_set_7, LBB0_7-LJTI0_0
.set L0_0_set_8, LBB0_8-LJTI0_0
.set L0_0_set_2, LBB0_2-LJTI0_0
.set L0_0_set_4, LBB0_4-LJTI0_0
.set L0_0_set_6, LBB0_6-LJTI0_0
.set L0_0_set_5, LBB0_5-LJTI0_0
LJTI0_0:
	.long	L0_0_set_7
	.long	L0_0_set_8
	.long	L0_0_set_2
	.long	L0_0_set_4
	.long	L0_0_set_6
	.long	L0_0_set_5
	.end_data_region
                                        ## -- End function
	.comm	_TX_CNTL_CSR,4,2                ## @TX_CNTL_CSR
	.comm	_TX_CNTL_CSR_ABORT_TX_AC0,4,2   ## @TX_CNTL_CSR_ABORT_TX_AC0
	.comm	_TX_CNTL_CSR_ABORT_TX_AC1,4,2   ## @TX_CNTL_CSR_ABORT_TX_AC1
	.comm	_TX_CNTL_CSR_ABORT_TX_AC2,4,2   ## @TX_CNTL_CSR_ABORT_TX_AC2
	.comm	_TX_CNTL_CSR_ABORT_TX_AC3,4,2   ## @TX_CNTL_CSR_ABORT_TX_AC3
	.comm	_TXRX_CSR0,4,2                  ## @TXRX_CSR0
	.comm	_TXRX_CSR0_DISABLE_RX,4,2       ## @TXRX_CSR0_DISABLE_RX
	.comm	_TXRX_CSR9,4,2                  ## @TXRX_CSR9
	.comm	_TXRX_CSR9_TSF_TICKING,4,2      ## @TXRX_CSR9_TSF_TICKING
	.comm	_TXRX_CSR9_TBTT_ENABLE,4,2      ## @TXRX_CSR9_TBTT_ENABLE
	.comm	_TXRX_CSR9_BEACON_GEN,4,2       ## @TXRX_CSR9_BEACON_GEN
	.no_dead_strip	_rt61pci_stop_queue
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function rt61pci_stop_queue
_rt61pci_stop_queue:                    ; @rt61pci_stop_queue
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #48
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	ldr	w8, [x0]
	sub	w8, w8, #128
	cmp	w8, #5
	b.hi	LBB0_9
; %bb.1:
	ldr	x19, [x0, #8]
Lloh0:
	adrp	x9, lJTI0_0@PAGE
Lloh1:
	add	x9, x9, lJTI0_0@PAGEOFF
	adr	x10, LBB0_2
	ldrb	w11, [x9, x8]
	add	x10, x10, x11, lsl #2
	br	x10
LBB0_2:
Lloh2:
	adrp	x20, _TXRX_CSR0@GOTPAGE
Lloh3:
	ldr	x20, [x20, _TXRX_CSR0@GOTPAGEOFF]
	ldr	w1, [x20]
	mov	x0, x19
	bl	_rt2x00mmio_register_read
	str	w0, [sp, #12]
Lloh4:
	adrp	x8, _TXRX_CSR0_DISABLE_RX@GOTPAGE
Lloh5:
	ldr	x8, [x8, _TXRX_CSR0_DISABLE_RX@GOTPAGEOFF]
	b	LBB0_8
LBB0_3:
Lloh6:
	adrp	x20, _TXRX_CSR9@GOTPAGE
Lloh7:
	ldr	x20, [x20, _TXRX_CSR9@GOTPAGEOFF]
	ldr	w1, [x20]
	mov	x0, x19
	bl	_rt2x00mmio_register_read
	str	w0, [sp, #12]
Lloh8:
	adrp	x8, _TXRX_CSR9_TSF_TICKING@GOTPAGE
Lloh9:
	ldr	x8, [x8, _TXRX_CSR9_TSF_TICKING@GOTPAGEOFF]
Lloh10:
	ldr	w1, [x8]
	add	x0, sp, #12
	mov	w2, #0
	bl	_rt2x00_set_field32
Lloh11:
	adrp	x8, _TXRX_CSR9_TBTT_ENABLE@GOTPAGE
Lloh12:
	ldr	x8, [x8, _TXRX_CSR9_TBTT_ENABLE@GOTPAGEOFF]
Lloh13:
	ldr	w1, [x8]
	add	x0, sp, #12
	mov	w2, #0
	bl	_rt2x00_set_field32
Lloh14:
	adrp	x8, _TXRX_CSR9_BEACON_GEN@GOTPAGE
Lloh15:
	ldr	x8, [x8, _TXRX_CSR9_BEACON_GEN@GOTPAGEOFF]
Lloh16:
	ldr	w1, [x8]
	add	x0, sp, #12
	mov	w2, #0
	bl	_rt2x00_set_field32
	ldr	w1, [x20]
	ldr	w2, [sp, #12]
	mov	x0, x19
	bl	_rt2x00mmio_register_write
	mov	x0, x19
	bl	_tasklet_kill
	b	LBB0_9
LBB0_4:
Lloh17:
	adrp	x20, _TX_CNTL_CSR@GOTPAGE
Lloh18:
	ldr	x20, [x20, _TX_CNTL_CSR@GOTPAGEOFF]
	ldr	w1, [x20]
	mov	x0, x19
	bl	_rt2x00mmio_register_read
	str	w0, [sp, #12]
Lloh19:
	adrp	x8, _TX_CNTL_CSR_ABORT_TX_AC0@GOTPAGE
Lloh20:
	ldr	x8, [x8, _TX_CNTL_CSR_ABORT_TX_AC0@GOTPAGEOFF]
	b	LBB0_8
LBB0_5:
Lloh21:
	adrp	x20, _TX_CNTL_CSR@GOTPAGE
Lloh22:
	ldr	x20, [x20, _TX_CNTL_CSR@GOTPAGEOFF]
	ldr	w1, [x20]
	mov	x0, x19
	bl	_rt2x00mmio_register_read
	str	w0, [sp, #12]
Lloh23:
	adrp	x8, _TX_CNTL_CSR_ABORT_TX_AC1@GOTPAGE
Lloh24:
	ldr	x8, [x8, _TX_CNTL_CSR_ABORT_TX_AC1@GOTPAGEOFF]
	b	LBB0_8
LBB0_6:
Lloh25:
	adrp	x20, _TX_CNTL_CSR@GOTPAGE
Lloh26:
	ldr	x20, [x20, _TX_CNTL_CSR@GOTPAGEOFF]
	ldr	w1, [x20]
	mov	x0, x19
	bl	_rt2x00mmio_register_read
	str	w0, [sp, #12]
Lloh27:
	adrp	x8, _TX_CNTL_CSR_ABORT_TX_AC3@GOTPAGE
Lloh28:
	ldr	x8, [x8, _TX_CNTL_CSR_ABORT_TX_AC3@GOTPAGEOFF]
	b	LBB0_8
LBB0_7:
Lloh29:
	adrp	x20, _TX_CNTL_CSR@GOTPAGE
Lloh30:
	ldr	x20, [x20, _TX_CNTL_CSR@GOTPAGEOFF]
	ldr	w1, [x20]
	mov	x0, x19
	bl	_rt2x00mmio_register_read
	str	w0, [sp, #12]
Lloh31:
	adrp	x8, _TX_CNTL_CSR_ABORT_TX_AC2@GOTPAGE
Lloh32:
	ldr	x8, [x8, _TX_CNTL_CSR_ABORT_TX_AC2@GOTPAGEOFF]
LBB0_8:
	ldr	w1, [x8]
	add	x0, sp, #12
	mov	w2, #1
	bl	_rt2x00_set_field32
	ldr	w1, [x20]
	ldr	w2, [sp, #12]
	mov	x0, x19
	bl	_rt2x00mmio_register_write
LBB0_9:
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #48
	ret
	.loh AdrpAdd	Lloh0, Lloh1
	.loh AdrpLdrGot	Lloh4, Lloh5
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh16
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGot	Lloh6, Lloh7
	.loh AdrpLdrGot	Lloh19, Lloh20
	.loh AdrpLdrGot	Lloh17, Lloh18
	.loh AdrpLdrGot	Lloh23, Lloh24
	.loh AdrpLdrGot	Lloh21, Lloh22
	.loh AdrpLdrGot	Lloh27, Lloh28
	.loh AdrpLdrGot	Lloh25, Lloh26
	.loh AdrpLdrGot	Lloh31, Lloh32
	.loh AdrpLdrGot	Lloh29, Lloh30
	.cfi_endproc
	.section	__TEXT,__const
lJTI0_0:
	.byte	(LBB0_2-LBB0_2)>>2
	.byte	(LBB0_3-LBB0_2)>>2
	.byte	(LBB0_4-LBB0_2)>>2
	.byte	(LBB0_5-LBB0_2)>>2
	.byte	(LBB0_6-LBB0_2)>>2
	.byte	(LBB0_7-LBB0_2)>>2
                                        ; -- End function
	.comm	_TX_CNTL_CSR,4,2                ; @TX_CNTL_CSR
	.comm	_TX_CNTL_CSR_ABORT_TX_AC0,4,2   ; @TX_CNTL_CSR_ABORT_TX_AC0
	.comm	_TX_CNTL_CSR_ABORT_TX_AC1,4,2   ; @TX_CNTL_CSR_ABORT_TX_AC1
	.comm	_TX_CNTL_CSR_ABORT_TX_AC2,4,2   ; @TX_CNTL_CSR_ABORT_TX_AC2
	.comm	_TX_CNTL_CSR_ABORT_TX_AC3,4,2   ; @TX_CNTL_CSR_ABORT_TX_AC3
	.comm	_TXRX_CSR0,4,2                  ; @TXRX_CSR0
	.comm	_TXRX_CSR0_DISABLE_RX,4,2       ; @TXRX_CSR0_DISABLE_RX
	.comm	_TXRX_CSR9,4,2                  ; @TXRX_CSR9
	.comm	_TXRX_CSR9_TSF_TICKING,4,2      ; @TXRX_CSR9_TSF_TICKING
	.comm	_TXRX_CSR9_TBTT_ENABLE,4,2      ; @TXRX_CSR9_TBTT_ENABLE
	.comm	_TXRX_CSR9_BEACON_GEN,4,2       ; @TXRX_CSR9_BEACON_GEN
	.no_dead_strip	_rt61pci_stop_queue
.subsections_via_symbols
