	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function carl9170_tx_physet
_carl9170_tx_physet:                    ## @carl9170_tx_physet
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$24, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdx, %r14
	movq	%rsi, %r15
	movq	%rdi, %rbx
	movl	$0, -52(%rbp)
	movl	$0, -48(%rbp)
	movl	$0, -44(%rbp)
	xorl	%edi, %edi
	callq	_cpu_to_le32
	movl	%eax, %r12d
	movl	(%r14), %eax
	movq	_IEEE80211_TX_RC_40_MHZ_WIDTH@GOTPCREL(%rip), %rcx
	testl	%eax, (%rcx)
	je	LBB0_2
## %bb.1:
	movq	_AR9170_TX_PHY_BW_40MHZ@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_AR9170_TX_PHY_BW_S@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	shll	%cl, %edi
	callq	_cpu_to_le32
	orl	%eax, %r12d
	movl	(%r14), %eax
LBB0_2:
	movq	_IEEE80211_TX_RC_DUP_DATA@GOTPCREL(%rip), %rcx
	testl	%eax, (%rcx)
	je	LBB0_4
## %bb.3:
	movq	_AR9170_TX_PHY_BW_40MHZ_DUP@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_AR9170_TX_PHY_BW_S@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	shll	%cl, %edi
	callq	_cpu_to_le32
	orl	%eax, %r12d
	movl	(%r14), %eax
LBB0_4:
	movq	_IEEE80211_TX_RC_SHORT_GI@GOTPCREL(%rip), %rcx
	testl	%eax, (%rcx)
	je	LBB0_6
## %bb.5:
	movq	_AR9170_TX_PHY_SHORT_GI@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_cpu_to_le32
	orl	%eax, %r12d
	movl	(%r14), %eax
LBB0_6:
	movq	_IEEE80211_TX_RC_MCS@GOTPCREL(%rip), %rcx
	testl	%eax, (%rcx)
	je	LBB0_8
## %bb.7:
	movq	_AR9170_TX_PHY_MCS@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	4(%r14), %edx
	xorl	%esi, %esi
	callq	_SET_VAL
	movl	4(%r14), %edi
	andl	$7, %edi
	movq	_AR9170_TX_PHY_TX_HEAVY_CLIP_S@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	shll	%cl, %edi
	callq	_cpu_to_le32
	movl	%eax, %r13d
	orl	%r12d, %r13d
	movq	_AR9170_TX_PHY_MOD_HT@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_cpu_to_le32
	movl	%eax, %r12d
	jmp	LBB0_13
LBB0_8:
	movq	(%r15), %rax
	movq	_NL80211_BAND_2GHZ@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jne	LBB0_11
## %bb.9:
	movl	4(%r14), %eax
	movq	_AR9170_TX_PHY_RATE_CCK_11M@GOTPCREL(%rip), %rcx
	cmpl	(%rcx), %eax
	jle	LBB0_10
LBB0_11:
	movq	_AR9170_TX_PHY_MOD_OFDM@GOTPCREL(%rip), %rax
	jmp	LBB0_12
LBB0_10:
	movq	_AR9170_TX_PHY_MOD_CCK@GOTPCREL(%rip), %rax
LBB0_12:
	movl	(%rax), %edi
	callq	_cpu_to_le32
	movl	%eax, %r13d
LBB0_13:
	leaq	-44(%rbp), %rcx
	leaq	-52(%rbp), %r8
	leaq	-48(%rbp), %r9
	movq	%rbx, %rdi
	movq	%r15, %rsi
	movq	%r14, %rdx
	callq	_carl9170_tx_rate_tpc_chains
	movq	_AR9170_TX_PHY_MCS@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	-44(%rbp), %esi
	callq	_SET_CONSTVAL
	movl	%eax, %edi
	callq	_cpu_to_le32
	movl	%eax, %ebx
	orl	%r12d, %ebx
	movq	_AR9170_TX_PHY_TX_PWR@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	-52(%rbp), %esi
	callq	_SET_CONSTVAL
	movl	%eax, %edi
	callq	_cpu_to_le32
	movl	%eax, %r14d
	orl	%ebx, %r14d
	movq	_AR9170_TX_PHY_TXCHAIN@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	-48(%rbp), %esi
	callq	_SET_CONSTVAL
	movl	%eax, %edi
	callq	_cpu_to_le32
	orl	%r14d, %eax
	orl	%r13d, %eax
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_IEEE80211_TX_RC_40_MHZ_WIDTH,4,2 ## @IEEE80211_TX_RC_40_MHZ_WIDTH
	.comm	_AR9170_TX_PHY_BW_40MHZ,4,2     ## @AR9170_TX_PHY_BW_40MHZ
	.comm	_AR9170_TX_PHY_BW_S,4,2         ## @AR9170_TX_PHY_BW_S
	.comm	_IEEE80211_TX_RC_DUP_DATA,4,2   ## @IEEE80211_TX_RC_DUP_DATA
	.comm	_AR9170_TX_PHY_BW_40MHZ_DUP,4,2 ## @AR9170_TX_PHY_BW_40MHZ_DUP
	.comm	_IEEE80211_TX_RC_SHORT_GI,4,2   ## @IEEE80211_TX_RC_SHORT_GI
	.comm	_AR9170_TX_PHY_SHORT_GI,4,2     ## @AR9170_TX_PHY_SHORT_GI
	.comm	_IEEE80211_TX_RC_MCS,4,2        ## @IEEE80211_TX_RC_MCS
	.comm	_AR9170_TX_PHY_MCS,4,2          ## @AR9170_TX_PHY_MCS
	.comm	_AR9170_TX_PHY_TX_HEAVY_CLIP_S,4,2 ## @AR9170_TX_PHY_TX_HEAVY_CLIP_S
	.comm	_AR9170_TX_PHY_MOD_HT,4,2       ## @AR9170_TX_PHY_MOD_HT
	.comm	_NL80211_BAND_2GHZ,8,3          ## @NL80211_BAND_2GHZ
	.comm	_AR9170_TX_PHY_RATE_CCK_11M,4,2 ## @AR9170_TX_PHY_RATE_CCK_11M
	.comm	_AR9170_TX_PHY_MOD_CCK,4,2      ## @AR9170_TX_PHY_MOD_CCK
	.comm	_AR9170_TX_PHY_MOD_OFDM,4,2     ## @AR9170_TX_PHY_MOD_OFDM
	.comm	_AR9170_TX_PHY_TX_PWR,4,2       ## @AR9170_TX_PHY_TX_PWR
	.comm	_AR9170_TX_PHY_TXCHAIN,4,2      ## @AR9170_TX_PHY_TXCHAIN
	.no_dead_strip	_carl9170_tx_physet
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function carl9170_tx_physet
_carl9170_tx_physet:                    ; @carl9170_tx_physet
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #80
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x19, x2
	mov	x20, x1
	mov	x21, x0
	str	xzr, [sp, #8]
	str	wzr, [sp, #4]
	mov	w0, #0
	bl	_cpu_to_le32
	mov	x22, x0
	ldr	w8, [x19]
Lloh0:
	adrp	x9, _IEEE80211_TX_RC_40_MHZ_WIDTH@GOTPAGE
Lloh1:
	ldr	x9, [x9, _IEEE80211_TX_RC_40_MHZ_WIDTH@GOTPAGEOFF]
Lloh2:
	ldr	w9, [x9]
Lloh3:
	adrp	x23, _AR9170_TX_PHY_BW_S@GOTPAGE
Lloh4:
	ldr	x23, [x23, _AR9170_TX_PHY_BW_S@GOTPAGEOFF]
	tst	w9, w8
	b.eq	LBB0_2
; %bb.1:
Lloh5:
	adrp	x8, _AR9170_TX_PHY_BW_40MHZ@GOTPAGE
Lloh6:
	ldr	x8, [x8, _AR9170_TX_PHY_BW_40MHZ@GOTPAGEOFF]
Lloh7:
	ldr	w8, [x8]
	ldr	w9, [x23]
	lsl	w0, w8, w9
	bl	_cpu_to_le32
	orr	w22, w0, w22
	ldr	w8, [x19]
LBB0_2:
Lloh8:
	adrp	x9, _IEEE80211_TX_RC_DUP_DATA@GOTPAGE
Lloh9:
	ldr	x9, [x9, _IEEE80211_TX_RC_DUP_DATA@GOTPAGEOFF]
Lloh10:
	ldr	w9, [x9]
	tst	w9, w8
	b.eq	LBB0_4
; %bb.3:
Lloh11:
	adrp	x8, _AR9170_TX_PHY_BW_40MHZ_DUP@GOTPAGE
Lloh12:
	ldr	x8, [x8, _AR9170_TX_PHY_BW_40MHZ_DUP@GOTPAGEOFF]
Lloh13:
	ldr	w8, [x8]
	ldr	w9, [x23]
	lsl	w0, w8, w9
	bl	_cpu_to_le32
	orr	w22, w0, w22
	ldr	w8, [x19]
LBB0_4:
Lloh14:
	adrp	x9, _IEEE80211_TX_RC_SHORT_GI@GOTPAGE
Lloh15:
	ldr	x9, [x9, _IEEE80211_TX_RC_SHORT_GI@GOTPAGEOFF]
Lloh16:
	ldr	w9, [x9]
	tst	w9, w8
	b.eq	LBB0_6
; %bb.5:
Lloh17:
	adrp	x8, _AR9170_TX_PHY_SHORT_GI@GOTPAGE
Lloh18:
	ldr	x8, [x8, _AR9170_TX_PHY_SHORT_GI@GOTPAGEOFF]
Lloh19:
	ldr	w0, [x8]
	bl	_cpu_to_le32
	orr	w22, w0, w22
	ldr	w8, [x19]
LBB0_6:
Lloh20:
	adrp	x9, _IEEE80211_TX_RC_MCS@GOTPAGE
Lloh21:
	ldr	x9, [x9, _IEEE80211_TX_RC_MCS@GOTPAGEOFF]
Lloh22:
	ldr	w9, [x9]
Lloh23:
	adrp	x24, _AR9170_TX_PHY_MCS@GOTPAGE
Lloh24:
	ldr	x24, [x24, _AR9170_TX_PHY_MCS@GOTPAGEOFF]
	tst	w9, w8
	b.eq	LBB0_8
; %bb.7:
	ldr	w0, [x24]
	ldr	w2, [x19, #4]
	mov	w1, #0
	bl	_SET_VAL
	ldr	w8, [x19, #4]
	and	w8, w8, #0x7
Lloh25:
	adrp	x9, _AR9170_TX_PHY_TX_HEAVY_CLIP_S@GOTPAGE
Lloh26:
	ldr	x9, [x9, _AR9170_TX_PHY_TX_HEAVY_CLIP_S@GOTPAGEOFF]
Lloh27:
	ldr	w9, [x9]
	lsl	w0, w8, w9
	bl	_cpu_to_le32
	orr	w23, w0, w22
Lloh28:
	adrp	x8, _AR9170_TX_PHY_MOD_HT@GOTPAGE
Lloh29:
	ldr	x8, [x8, _AR9170_TX_PHY_MOD_HT@GOTPAGEOFF]
Lloh30:
	ldr	w0, [x8]
	bl	_cpu_to_le32
	mov	x22, x0
	b	LBB0_13
LBB0_8:
	ldr	x8, [x20]
Lloh31:
	adrp	x9, _NL80211_BAND_2GHZ@GOTPAGE
Lloh32:
	ldr	x9, [x9, _NL80211_BAND_2GHZ@GOTPAGEOFF]
Lloh33:
	ldr	x9, [x9]
	cmp	x8, x9
	b.ne	LBB0_10
; %bb.9:
	ldr	w8, [x19, #4]
Lloh34:
	adrp	x9, _AR9170_TX_PHY_RATE_CCK_11M@GOTPAGE
Lloh35:
	ldr	x9, [x9, _AR9170_TX_PHY_RATE_CCK_11M@GOTPAGEOFF]
Lloh36:
	ldr	w9, [x9]
	cmp	w8, w9
	b.le	LBB0_11
LBB0_10:
Lloh37:
	adrp	x8, _AR9170_TX_PHY_MOD_OFDM@GOTPAGE
Lloh38:
	ldr	x8, [x8, _AR9170_TX_PHY_MOD_OFDM@GOTPAGEOFF]
	b	LBB0_12
LBB0_11:
Lloh39:
	adrp	x8, _AR9170_TX_PHY_MOD_CCK@GOTPAGE
Lloh40:
	ldr	x8, [x8, _AR9170_TX_PHY_MOD_CCK@GOTPAGEOFF]
LBB0_12:
	ldr	w0, [x8]
	bl	_cpu_to_le32
	mov	x23, x0
LBB0_13:
	orr	w22, w23, w22
	add	x3, sp, #4
	add	x4, sp, #12
	add	x5, sp, #8
	mov	x0, x21
	mov	x1, x20
	mov	x2, x19
	bl	_carl9170_tx_rate_tpc_chains
	ldr	w0, [x24]
	ldr	w1, [sp, #4]
	bl	_SET_CONSTVAL
	bl	_cpu_to_le32
	orr	w19, w0, w22
Lloh41:
	adrp	x8, _AR9170_TX_PHY_TX_PWR@GOTPAGE
Lloh42:
	ldr	x8, [x8, _AR9170_TX_PHY_TX_PWR@GOTPAGEOFF]
Lloh43:
	ldr	w0, [x8]
	ldr	w1, [sp, #12]
	bl	_SET_CONSTVAL
	bl	_cpu_to_le32
	orr	w19, w19, w0
Lloh44:
	adrp	x8, _AR9170_TX_PHY_TXCHAIN@GOTPAGE
Lloh45:
	ldr	x8, [x8, _AR9170_TX_PHY_TXCHAIN@GOTPAGEOFF]
Lloh46:
	ldr	w0, [x8]
	ldr	w1, [sp, #8]
	bl	_SET_CONSTVAL
	bl	_cpu_to_le32
	orr	w0, w19, w0
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #80
	ret
	.loh AdrpLdrGot	Lloh3, Lloh4
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh16
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh19
	.loh AdrpLdrGot	Lloh23, Lloh24
	.loh AdrpLdrGotLdr	Lloh20, Lloh21, Lloh22
	.loh AdrpLdrGotLdr	Lloh28, Lloh29, Lloh30
	.loh AdrpLdrGotLdr	Lloh25, Lloh26, Lloh27
	.loh AdrpLdrGotLdr	Lloh31, Lloh32, Lloh33
	.loh AdrpLdrGotLdr	Lloh34, Lloh35, Lloh36
	.loh AdrpLdrGot	Lloh37, Lloh38
	.loh AdrpLdrGot	Lloh39, Lloh40
	.loh AdrpLdrGotLdr	Lloh44, Lloh45, Lloh46
	.loh AdrpLdrGotLdr	Lloh41, Lloh42, Lloh43
	.cfi_endproc
                                        ; -- End function
	.comm	_IEEE80211_TX_RC_40_MHZ_WIDTH,4,2 ; @IEEE80211_TX_RC_40_MHZ_WIDTH
	.comm	_AR9170_TX_PHY_BW_40MHZ,4,2     ; @AR9170_TX_PHY_BW_40MHZ
	.comm	_AR9170_TX_PHY_BW_S,4,2         ; @AR9170_TX_PHY_BW_S
	.comm	_IEEE80211_TX_RC_DUP_DATA,4,2   ; @IEEE80211_TX_RC_DUP_DATA
	.comm	_AR9170_TX_PHY_BW_40MHZ_DUP,4,2 ; @AR9170_TX_PHY_BW_40MHZ_DUP
	.comm	_IEEE80211_TX_RC_SHORT_GI,4,2   ; @IEEE80211_TX_RC_SHORT_GI
	.comm	_AR9170_TX_PHY_SHORT_GI,4,2     ; @AR9170_TX_PHY_SHORT_GI
	.comm	_IEEE80211_TX_RC_MCS,4,2        ; @IEEE80211_TX_RC_MCS
	.comm	_AR9170_TX_PHY_MCS,4,2          ; @AR9170_TX_PHY_MCS
	.comm	_AR9170_TX_PHY_TX_HEAVY_CLIP_S,4,2 ; @AR9170_TX_PHY_TX_HEAVY_CLIP_S
	.comm	_AR9170_TX_PHY_MOD_HT,4,2       ; @AR9170_TX_PHY_MOD_HT
	.comm	_NL80211_BAND_2GHZ,8,3          ; @NL80211_BAND_2GHZ
	.comm	_AR9170_TX_PHY_RATE_CCK_11M,4,2 ; @AR9170_TX_PHY_RATE_CCK_11M
	.comm	_AR9170_TX_PHY_MOD_CCK,4,2      ; @AR9170_TX_PHY_MOD_CCK
	.comm	_AR9170_TX_PHY_MOD_OFDM,4,2     ; @AR9170_TX_PHY_MOD_OFDM
	.comm	_AR9170_TX_PHY_TX_PWR,4,2       ; @AR9170_TX_PHY_TX_PWR
	.comm	_AR9170_TX_PHY_TXCHAIN,4,2      ; @AR9170_TX_PHY_TXCHAIN
	.no_dead_strip	_carl9170_tx_physet
.subsections_via_symbols
