	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function validate_fpga_full_mask
_validate_fpga_full_mask:               ## @validate_fpga_full_mask
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdx, %r12
	movq	%rsi, %rbx
	movq	%rdi, %r15
	movq	_fte_match_param@GOTPCREL(%rip), %r14
	movl	(%r14), %edi
	movq	_misc_parameters@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	callq	_MLX5_ADDR_OF
	movq	%rax, -48(%rbp)                 ## 8-byte Spill
	movl	(%r14), %edi
	movq	_outer_headers@GOTPCREL(%rip), %r13
	movl	(%r13), %edx
	movq	%rbx, %rsi
	callq	_MLX5_ADDR_OF
	movq	%rax, %rbx
	movl	(%r14), %edi
	movl	(%r13), %edx
	movq	%r12, %rsi
	callq	_MLX5_ADDR_OF
	movq	%r15, %rdi
	movq	%rbx, %rsi
	movq	%rax, %rdx
	callq	_mlx5_fs_is_outer_ipv4_flow
	movq	_fte_match_set_lyr_2_4@GOTPCREL(%rip), %r15
	movl	(%r15), %edi
	testq	%rax, %rax
	je	LBB0_2
## %bb.1:
	movq	_src_ipv4_src_ipv6@GOTPCREL(%rip), %rax
	movl	4(%rax), %edx
	movq	%rbx, %rsi
	callq	_MLX5_ADDR_OF
	movq	%rax, %r12
	movl	(%r15), %edi
	movq	_dst_ipv4_dst_ipv6@GOTPCREL(%rip), %rax
	movl	4(%rax), %edx
	movq	%rbx, %rsi
	callq	_MLX5_ADDR_OF
	movq	%rax, %r15
	movq	_ipv4_layout@GOTPCREL(%rip), %r13
	movl	(%r13), %edi
	movq	_ipv4@GOTPCREL(%rip), %r14
	jmp	LBB0_3
LBB0_2:
	movq	_src_ipv4_src_ipv6@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rsi
	callq	_MLX5_ADDR_OF
	movq	%rax, %r12
	movl	(%r15), %edi
	movq	_dst_ipv4_dst_ipv6@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rsi
	callq	_MLX5_ADDR_OF
	movq	%rax, %r15
	movq	_ipv6_layout@GOTPCREL(%rip), %r13
	movl	(%r13), %edi
	movq	_ipv6@GOTPCREL(%rip), %r14
LBB0_3:
	movl	(%r14), %esi
	callq	_MLX5_FLD_SZ_BYTES
	movq	%r12, %rdi
	movl	%eax, %esi
	callq	_is_full_mask
	xorl	%ebx, %ebx
	testl	%eax, %eax
	je	LBB0_6
## %bb.4:
	movl	(%r13), %edi
	movl	(%r14), %esi
	callq	_MLX5_FLD_SZ_BYTES
	movq	%r15, %rdi
	movl	%eax, %esi
	callq	_is_full_mask
	testl	%eax, %eax
	je	LBB0_6
## %bb.5:
	movq	_fte_match_set_misc@GOTPCREL(%rip), %r14
	movl	(%r14), %edi
	movq	_outer_esp_spi@GOTPCREL(%rip), %r15
	movl	(%r15), %edx
	movq	-48(%rbp), %rsi                 ## 8-byte Reload
	callq	_MLX5_ADDR_OF
	movq	%rax, %rbx
	movl	(%r14), %edi
	movl	(%r15), %esi
	callq	_MLX5_FLD_SZ_BYTES
	movq	%rbx, %rdi
	movl	%eax, %esi
	callq	_is_full_mask
	xorl	%ebx, %ebx
	testl	%eax, %eax
	setne	%bl
LBB0_6:
	movl	%ebx, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_fte_match_param,4,2            ## @fte_match_param
	.comm	_misc_parameters,4,2            ## @misc_parameters
	.comm	_outer_headers,4,2              ## @outer_headers
	.comm	_fte_match_set_lyr_2_4,4,2      ## @fte_match_set_lyr_2_4
	.comm	_src_ipv4_src_ipv6,8,2          ## @src_ipv4_src_ipv6
	.comm	_dst_ipv4_dst_ipv6,8,2          ## @dst_ipv4_dst_ipv6
	.comm	_ipv4_layout,4,2                ## @ipv4_layout
	.comm	_ipv4,4,2                       ## @ipv4
	.comm	_ipv6_layout,4,2                ## @ipv6_layout
	.comm	_ipv6,4,2                       ## @ipv6
	.comm	_fte_match_set_misc,4,2         ## @fte_match_set_misc
	.comm	_outer_esp_spi,4,2              ## @outer_esp_spi
	.no_dead_strip	_validate_fpga_full_mask
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function validate_fpga_full_mask
_validate_fpga_full_mask:               ; @validate_fpga_full_mask
	.cfi_startproc
; %bb.0:
	stp	x24, x23, [sp, #-64]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x21, x2
	mov	x20, x1
	mov	x22, x0
Lloh0:
	adrp	x23, _fte_match_param@GOTPAGE
Lloh1:
	ldr	x23, [x23, _fte_match_param@GOTPAGEOFF]
	ldr	w0, [x23]
Lloh2:
	adrp	x8, _misc_parameters@GOTPAGE
Lloh3:
	ldr	x8, [x8, _misc_parameters@GOTPAGEOFF]
Lloh4:
	ldr	w2, [x8]
	bl	_MLX5_ADDR_OF
	mov	x19, x0
	ldr	w0, [x23]
Lloh5:
	adrp	x24, _outer_headers@GOTPAGE
Lloh6:
	ldr	x24, [x24, _outer_headers@GOTPAGEOFF]
	ldr	w2, [x24]
	mov	x1, x20
	bl	_MLX5_ADDR_OF
	mov	x20, x0
	ldr	w0, [x23]
	ldr	w2, [x24]
	mov	x1, x21
	bl	_MLX5_ADDR_OF
	mov	x2, x0
	mov	x0, x22
	mov	x1, x20
	bl	_mlx5_fs_is_outer_ipv4_flow
	mov	x8, x0
Lloh7:
	adrp	x22, _fte_match_set_lyr_2_4@GOTPAGE
Lloh8:
	ldr	x22, [x22, _fte_match_set_lyr_2_4@GOTPAGEOFF]
	ldr	w0, [x22]
	cbz	x8, LBB0_2
; %bb.1:
Lloh9:
	adrp	x8, _src_ipv4_src_ipv6@GOTPAGE
Lloh10:
	ldr	x8, [x8, _src_ipv4_src_ipv6@GOTPAGEOFF]
Lloh11:
	ldr	w2, [x8, #4]
	mov	x1, x20
	bl	_MLX5_ADDR_OF
	mov	x21, x0
	ldr	w0, [x22]
Lloh12:
	adrp	x8, _dst_ipv4_dst_ipv6@GOTPAGE
Lloh13:
	ldr	x8, [x8, _dst_ipv4_dst_ipv6@GOTPAGEOFF]
Lloh14:
	ldr	w2, [x8, #4]
	mov	x1, x20
	bl	_MLX5_ADDR_OF
	mov	x20, x0
Lloh15:
	adrp	x22, _ipv4_layout@GOTPAGE
Lloh16:
	ldr	x22, [x22, _ipv4_layout@GOTPAGEOFF]
	ldr	w0, [x22]
Lloh17:
	adrp	x23, _ipv4@GOTPAGE
Lloh18:
	ldr	x23, [x23, _ipv4@GOTPAGEOFF]
	b	LBB0_3
LBB0_2:
Lloh19:
	adrp	x8, _src_ipv4_src_ipv6@GOTPAGE
Lloh20:
	ldr	x8, [x8, _src_ipv4_src_ipv6@GOTPAGEOFF]
Lloh21:
	ldr	w2, [x8]
	mov	x1, x20
	bl	_MLX5_ADDR_OF
	mov	x21, x0
	ldr	w0, [x22]
Lloh22:
	adrp	x8, _dst_ipv4_dst_ipv6@GOTPAGE
Lloh23:
	ldr	x8, [x8, _dst_ipv4_dst_ipv6@GOTPAGEOFF]
Lloh24:
	ldr	w2, [x8]
	mov	x1, x20
	bl	_MLX5_ADDR_OF
	mov	x20, x0
Lloh25:
	adrp	x22, _ipv6_layout@GOTPAGE
Lloh26:
	ldr	x22, [x22, _ipv6_layout@GOTPAGEOFF]
	ldr	w0, [x22]
Lloh27:
	adrp	x23, _ipv6@GOTPAGE
Lloh28:
	ldr	x23, [x23, _ipv6@GOTPAGEOFF]
LBB0_3:
	ldr	w1, [x23]
	bl	_MLX5_FLD_SZ_BYTES
	mov	x1, x0
	mov	x0, x21
	bl	_is_full_mask
	cbz	w0, LBB0_6
; %bb.4:
	ldr	w0, [x22]
	ldr	w1, [x23]
	bl	_MLX5_FLD_SZ_BYTES
	mov	x1, x0
	mov	x0, x20
	bl	_is_full_mask
	cbz	w0, LBB0_6
; %bb.5:
Lloh29:
	adrp	x20, _fte_match_set_misc@GOTPAGE
Lloh30:
	ldr	x20, [x20, _fte_match_set_misc@GOTPAGEOFF]
	ldr	w0, [x20]
Lloh31:
	adrp	x21, _outer_esp_spi@GOTPAGE
Lloh32:
	ldr	x21, [x21, _outer_esp_spi@GOTPAGEOFF]
	ldr	w2, [x21]
	mov	x1, x19
	bl	_MLX5_ADDR_OF
	mov	x19, x0
	ldr	w0, [x20]
	ldr	w1, [x21]
	bl	_MLX5_FLD_SZ_BYTES
	mov	x1, x0
	mov	x0, x19
	bl	_is_full_mask
	cmp	w0, #0
	cset	w0, ne
LBB0_6:
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGot	Lloh7, Lloh8
	.loh AdrpLdrGot	Lloh5, Lloh6
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGot	Lloh17, Lloh18
	.loh AdrpLdrGot	Lloh15, Lloh16
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGot	Lloh27, Lloh28
	.loh AdrpLdrGot	Lloh25, Lloh26
	.loh AdrpLdrGotLdr	Lloh22, Lloh23, Lloh24
	.loh AdrpLdrGotLdr	Lloh19, Lloh20, Lloh21
	.loh AdrpLdrGot	Lloh31, Lloh32
	.loh AdrpLdrGot	Lloh29, Lloh30
	.cfi_endproc
                                        ; -- End function
	.comm	_fte_match_param,4,2            ; @fte_match_param
	.comm	_misc_parameters,4,2            ; @misc_parameters
	.comm	_outer_headers,4,2              ; @outer_headers
	.comm	_fte_match_set_lyr_2_4,4,2      ; @fte_match_set_lyr_2_4
	.comm	_src_ipv4_src_ipv6,8,2          ; @src_ipv4_src_ipv6
	.comm	_dst_ipv4_dst_ipv6,8,2          ; @dst_ipv4_dst_ipv6
	.comm	_ipv4_layout,4,2                ; @ipv4_layout
	.comm	_ipv4,4,2                       ; @ipv4
	.comm	_ipv6_layout,4,2                ; @ipv6_layout
	.comm	_ipv6,4,2                       ; @ipv6
	.comm	_fte_match_set_misc,4,2         ; @fte_match_set_misc
	.comm	_outer_esp_spi,4,2              ; @outer_esp_spi
	.no_dead_strip	_validate_fpga_full_mask
.subsections_via_symbols
