	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_iwl_pcie_txq_check_wrptrs      ## -- Begin function iwl_pcie_txq_check_wrptrs
	.p2align	4, 0x90
_iwl_pcie_txq_check_wrptrs:             ## @iwl_pcie_txq_check_wrptrs
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r14
	callq	_IWL_TRANS_GET_PCIE_TRANS
	movq	%rax, %r15
	movq	(%r14), %rax
	movq	(%rax), %rax
	cmpl	$0, (%rax)
	jle	LBB0_7
## %bb.1:
	xorl	%ebx, %ebx
	jmp	LBB0_2
	.p2align	4, 0x90
LBB0_5:                                 ##   in Loop: Header=BB0_2 Depth=1
	movq	%r13, %rdi
	callq	_spin_unlock_bh
LBB0_6:                                 ##   in Loop: Header=BB0_2 Depth=1
	incq	%rbx
	movq	(%r14), %rax
	movq	(%rax), %rax
	movslq	(%rax), %rax
	cmpq	%rax, %rbx
	jge	LBB0_7
LBB0_2:                                 ## =>This Inner Loop Header: Depth=1
	movq	8(%r15), %rax
	movq	(%rax,%rbx,8), %r12
	movl	(%r15), %esi
	movl	%ebx, %edi
	callq	_test_bit
	testl	%eax, %eax
	je	LBB0_6
## %bb.3:                               ##   in Loop: Header=BB0_2 Depth=1
	leaq	4(%r12), %r13
	movq	%r13, %rdi
	callq	_spin_lock_bh
	cmpl	$0, (%r12)
	je	LBB0_5
## %bb.4:                               ##   in Loop: Header=BB0_2 Depth=1
	movq	%r14, %rdi
	movq	%r12, %rsi
	callq	_iwl_pcie_txq_inc_wr_ptr
	movl	$0, (%r12)
	jmp	LBB0_5
LBB0_7:
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_iwl_pcie_txq_check_wrptrs      ; -- Begin function iwl_pcie_txq_check_wrptrs
	.p2align	2
_iwl_pcie_txq_check_wrptrs:             ; @iwl_pcie_txq_check_wrptrs
	.cfi_startproc
; %bb.0:
	stp	x24, x23, [sp, #-64]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x19, x0
	bl	_IWL_TRANS_GET_PCIE_TRANS
	ldr	x8, [x19]
	ldr	x8, [x8]
	ldr	w8, [x8]
	cmp	w8, #1
	b.lt	LBB0_7
; %bb.1:
	mov	x20, x0
	mov	x21, #0
	b	LBB0_4
LBB0_2:                                 ;   in Loop: Header=BB0_4 Depth=1
	mov	x0, x23
	bl	_spin_unlock_bh
LBB0_3:                                 ;   in Loop: Header=BB0_4 Depth=1
	add	x21, x21, #1
	ldr	x8, [x19]
	ldr	x8, [x8]
	ldrsw	x8, [x8]
	cmp	x21, x8
	b.ge	LBB0_7
LBB0_4:                                 ; =>This Inner Loop Header: Depth=1
	ldr	x8, [x20, #8]
	ldr	x22, [x8, x21, lsl #3]
	ldr	w1, [x20]
	mov	x0, x21
	bl	_test_bit
	cbz	w0, LBB0_3
; %bb.5:                                ;   in Loop: Header=BB0_4 Depth=1
	add	x23, x22, #4
	mov	x0, x23
	bl	_spin_lock_bh
	ldr	w8, [x22]
	cbz	w8, LBB0_2
; %bb.6:                                ;   in Loop: Header=BB0_4 Depth=1
	mov	x0, x19
	mov	x1, x22
	bl	_iwl_pcie_txq_inc_wr_ptr
	str	wzr, [x22]
	b	LBB0_2
LBB0_7:
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	ret
	.cfi_endproc
                                        ; -- End function
.subsections_via_symbols
