	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function g12a_enable_internal_mdio
_g12a_enable_internal_mdio:             ## @g12a_enable_internal_mdio
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r14
	pushq	%rbx
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	movq	%rdi, %r14
	cmpl	$0, (%rdi)
	jne	LBB0_2
## %bb.1:
	movl	16(%r14), %edi
	callq	_clk_prepare_enable
	testl	%eax, %eax
	jne	LBB0_3
LBB0_2:
	movl	$1, (%r14)
	movq	_EPHY_G12A_ID@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_ETH_PHY_CNTL0@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	addq	8(%r14), %rsi
	callq	_writel
	movq	_PHY_CNTL1_ST_MODE@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	$3, %esi
	callq	_FIELD_PREP
	movl	%eax, %ebx
	movq	_PHY_CNTL1_ST_PHYADD@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_EPHY_DFLT_ADD@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_FIELD_PREP
	orl	%eax, %ebx
	movq	_PHY_CNTL1_MII_MODE@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_EPHY_MODE_RMII@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_FIELD_PREP
	orl	%eax, %ebx
	movq	_PHY_CNTL1_CLK_EN@GOTPCREL(%rip), %rax
	orl	(%rax), %ebx
	movq	_PHY_CNTL1_CLKFREQ@GOTPCREL(%rip), %rax
	orl	(%rax), %ebx
	movq	_PHY_CNTL1_PHY_ENB@GOTPCREL(%rip), %rax
	orl	(%rax), %ebx
	movq	_ETH_PHY_CNTL1@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	addq	8(%r14), %rsi
	movl	%ebx, %edi
	callq	_writel
	movq	_PHY_CNTL2_USE_INTERNAL@GOTPCREL(%rip), %rax
	movq	_PHY_CNTL2_SMI_SRC_MAC@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edi
	orl	(%rax), %edi
	movq	_PHY_CNTL2_RX_CLK_EPHY@GOTPCREL(%rip), %rax
	orl	(%rax), %edi
	movq	_ETH_PHY_CNTL2@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	addq	8(%r14), %rsi
	callq	_writel
	xorl	%eax, %eax
LBB0_3:
	popq	%rbx
	popq	%r14
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_EPHY_G12A_ID,4,2               ## @EPHY_G12A_ID
	.comm	_ETH_PHY_CNTL0,8,3              ## @ETH_PHY_CNTL0
	.comm	_PHY_CNTL1_ST_MODE,4,2          ## @PHY_CNTL1_ST_MODE
	.comm	_PHY_CNTL1_ST_PHYADD,4,2        ## @PHY_CNTL1_ST_PHYADD
	.comm	_EPHY_DFLT_ADD,4,2              ## @EPHY_DFLT_ADD
	.comm	_PHY_CNTL1_MII_MODE,4,2         ## @PHY_CNTL1_MII_MODE
	.comm	_EPHY_MODE_RMII,4,2             ## @EPHY_MODE_RMII
	.comm	_PHY_CNTL1_CLK_EN,4,2           ## @PHY_CNTL1_CLK_EN
	.comm	_PHY_CNTL1_CLKFREQ,4,2          ## @PHY_CNTL1_CLKFREQ
	.comm	_PHY_CNTL1_PHY_ENB,4,2          ## @PHY_CNTL1_PHY_ENB
	.comm	_ETH_PHY_CNTL1,8,3              ## @ETH_PHY_CNTL1
	.comm	_PHY_CNTL2_USE_INTERNAL,4,2     ## @PHY_CNTL2_USE_INTERNAL
	.comm	_PHY_CNTL2_SMI_SRC_MAC,4,2      ## @PHY_CNTL2_SMI_SRC_MAC
	.comm	_PHY_CNTL2_RX_CLK_EPHY,4,2      ## @PHY_CNTL2_RX_CLK_EPHY
	.comm	_ETH_PHY_CNTL2,8,3              ## @ETH_PHY_CNTL2
	.no_dead_strip	_g12a_enable_internal_mdio
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function g12a_enable_internal_mdio
_g12a_enable_internal_mdio:             ; @g12a_enable_internal_mdio
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x19, x0
	ldr	w8, [x0]
	cbnz	w8, LBB0_2
; %bb.1:
	ldr	w0, [x19, #16]
	bl	_clk_prepare_enable
	cbnz	w0, LBB0_3
LBB0_2:
	mov	w8, #1
	str	w8, [x19]
Lloh0:
	adrp	x8, _EPHY_G12A_ID@GOTPAGE
Lloh1:
	ldr	x8, [x8, _EPHY_G12A_ID@GOTPAGEOFF]
Lloh2:
	ldr	w0, [x8]
	ldr	x8, [x19, #8]
Lloh3:
	adrp	x9, _ETH_PHY_CNTL0@GOTPAGE
Lloh4:
	ldr	x9, [x9, _ETH_PHY_CNTL0@GOTPAGEOFF]
Lloh5:
	ldr	x9, [x9]
	add	x1, x9, x8
	bl	_writel
Lloh6:
	adrp	x8, _PHY_CNTL1_ST_MODE@GOTPAGE
Lloh7:
	ldr	x8, [x8, _PHY_CNTL1_ST_MODE@GOTPAGEOFF]
Lloh8:
	ldr	w0, [x8]
	mov	w1, #3
	bl	_FIELD_PREP
	mov	x20, x0
Lloh9:
	adrp	x8, _PHY_CNTL1_ST_PHYADD@GOTPAGE
Lloh10:
	ldr	x8, [x8, _PHY_CNTL1_ST_PHYADD@GOTPAGEOFF]
Lloh11:
	ldr	w0, [x8]
Lloh12:
	adrp	x8, _EPHY_DFLT_ADD@GOTPAGE
Lloh13:
	ldr	x8, [x8, _EPHY_DFLT_ADD@GOTPAGEOFF]
Lloh14:
	ldr	w1, [x8]
	bl	_FIELD_PREP
	orr	w20, w0, w20
Lloh15:
	adrp	x8, _PHY_CNTL1_MII_MODE@GOTPAGE
Lloh16:
	ldr	x8, [x8, _PHY_CNTL1_MII_MODE@GOTPAGEOFF]
Lloh17:
	ldr	w0, [x8]
Lloh18:
	adrp	x8, _EPHY_MODE_RMII@GOTPAGE
Lloh19:
	ldr	x8, [x8, _EPHY_MODE_RMII@GOTPAGEOFF]
Lloh20:
	ldr	w1, [x8]
	bl	_FIELD_PREP
	orr	w8, w20, w0
Lloh21:
	adrp	x9, _PHY_CNTL1_CLK_EN@GOTPAGE
Lloh22:
	ldr	x9, [x9, _PHY_CNTL1_CLK_EN@GOTPAGEOFF]
Lloh23:
	ldr	w9, [x9]
Lloh24:
	adrp	x10, _PHY_CNTL1_CLKFREQ@GOTPAGE
Lloh25:
	ldr	x10, [x10, _PHY_CNTL1_CLKFREQ@GOTPAGEOFF]
	orr	w8, w8, w9
Lloh26:
	ldr	w9, [x10]
	orr	w8, w8, w9
Lloh27:
	adrp	x9, _PHY_CNTL1_PHY_ENB@GOTPAGE
Lloh28:
	ldr	x9, [x9, _PHY_CNTL1_PHY_ENB@GOTPAGEOFF]
Lloh29:
	ldr	w9, [x9]
	orr	w0, w8, w9
	ldr	x8, [x19, #8]
Lloh30:
	adrp	x9, _ETH_PHY_CNTL1@GOTPAGE
Lloh31:
	ldr	x9, [x9, _ETH_PHY_CNTL1@GOTPAGEOFF]
Lloh32:
	ldr	x9, [x9]
	add	x1, x9, x8
	bl	_writel
Lloh33:
	adrp	x8, _PHY_CNTL2_USE_INTERNAL@GOTPAGE
Lloh34:
	ldr	x8, [x8, _PHY_CNTL2_USE_INTERNAL@GOTPAGEOFF]
Lloh35:
	adrp	x9, _PHY_CNTL2_SMI_SRC_MAC@GOTPAGE
Lloh36:
	ldr	x9, [x9, _PHY_CNTL2_SMI_SRC_MAC@GOTPAGEOFF]
Lloh37:
	ldr	w8, [x8]
Lloh38:
	ldr	w9, [x9]
	orr	w8, w9, w8
Lloh39:
	adrp	x9, _PHY_CNTL2_RX_CLK_EPHY@GOTPAGE
Lloh40:
	ldr	x9, [x9, _PHY_CNTL2_RX_CLK_EPHY@GOTPAGEOFF]
Lloh41:
	ldr	w9, [x9]
	orr	w0, w8, w9
	ldr	x8, [x19, #8]
Lloh42:
	adrp	x9, _ETH_PHY_CNTL2@GOTPAGE
Lloh43:
	ldr	x9, [x9, _ETH_PHY_CNTL2@GOTPAGEOFF]
Lloh44:
	ldr	x9, [x9]
	add	x1, x9, x8
	bl	_writel
	mov	w0, #0
LBB0_3:
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh42, Lloh43, Lloh44
	.loh AdrpLdrGotLdr	Lloh39, Lloh40, Lloh41
	.loh AdrpLdrGotLdr	Lloh35, Lloh36, Lloh38
	.loh AdrpLdrGotLdr	Lloh33, Lloh34, Lloh37
	.loh AdrpLdrGotLdr	Lloh30, Lloh31, Lloh32
	.loh AdrpLdrGotLdr	Lloh27, Lloh28, Lloh29
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_EPHY_G12A_ID,4,2               ; @EPHY_G12A_ID
	.comm	_ETH_PHY_CNTL0,8,3              ; @ETH_PHY_CNTL0
	.comm	_PHY_CNTL1_ST_MODE,4,2          ; @PHY_CNTL1_ST_MODE
	.comm	_PHY_CNTL1_ST_PHYADD,4,2        ; @PHY_CNTL1_ST_PHYADD
	.comm	_EPHY_DFLT_ADD,4,2              ; @EPHY_DFLT_ADD
	.comm	_PHY_CNTL1_MII_MODE,4,2         ; @PHY_CNTL1_MII_MODE
	.comm	_EPHY_MODE_RMII,4,2             ; @EPHY_MODE_RMII
	.comm	_PHY_CNTL1_CLK_EN,4,2           ; @PHY_CNTL1_CLK_EN
	.comm	_PHY_CNTL1_CLKFREQ,4,2          ; @PHY_CNTL1_CLKFREQ
	.comm	_PHY_CNTL1_PHY_ENB,4,2          ; @PHY_CNTL1_PHY_ENB
	.comm	_ETH_PHY_CNTL1,8,3              ; @ETH_PHY_CNTL1
	.comm	_PHY_CNTL2_USE_INTERNAL,4,2     ; @PHY_CNTL2_USE_INTERNAL
	.comm	_PHY_CNTL2_SMI_SRC_MAC,4,2      ; @PHY_CNTL2_SMI_SRC_MAC
	.comm	_PHY_CNTL2_RX_CLK_EPHY,4,2      ; @PHY_CNTL2_RX_CLK_EPHY
	.comm	_ETH_PHY_CNTL2,8,3              ; @ETH_PHY_CNTL2
	.no_dead_strip	_g12a_enable_internal_mdio
.subsections_via_symbols
