	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_mlxsw_core_cpu_port_init       ## -- Begin function mlxsw_core_cpu_port_init
	.p2align	4, 0x90
_mlxsw_core_cpu_port_init:              ## @mlxsw_core_cpu_port_init
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%ecx, %eax
	movq	%rdx, %r10
	movq	%rsi, %r14
	movq	(%rdi), %r15
	movq	_MLXSW_PORT_CPU_PORT@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rbx
	movq	_DEVLINK_PORT_FLAVOUR_CPU@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	movq	%rbx, %rsi
	xorl	%ecx, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	pushq	%rax
	pushq	%r10
	callq	___mlxsw_core_port_init
	addq	$16, %rsp
	testl	%eax, %eax
	jne	LBB0_2
## %bb.1:
	movq	%r14, (%r15,%rbx,8)
LBB0_2:
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_MLXSW_PORT_CPU_PORT,8,3        ## @MLXSW_PORT_CPU_PORT
	.comm	_DEVLINK_PORT_FLAVOUR_CPU,4,2   ## @DEVLINK_PORT_FLAVOUR_CPU
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_mlxsw_core_cpu_port_init       ; -- Begin function mlxsw_core_cpu_port_init
	.p2align	2
_mlxsw_core_cpu_port_init:              ; @mlxsw_core_cpu_port_init
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x7, x3
	mov	x6, x2
	mov	x19, x1
	ldr	x21, [x0]
Lloh0:
	adrp	x8, _MLXSW_PORT_CPU_PORT@GOTPAGE
Lloh1:
	ldr	x8, [x8, _MLXSW_PORT_CPU_PORT@GOTPAGEOFF]
Lloh2:
	ldr	x20, [x8]
Lloh3:
	adrp	x8, _DEVLINK_PORT_FLAVOUR_CPU@GOTPAGE
Lloh4:
	ldr	x8, [x8, _DEVLINK_PORT_FLAVOUR_CPU@GOTPAGEOFF]
Lloh5:
	ldr	w2, [x8]
	mov	x1, x20
	mov	w3, #0
	mov	w4, #0
	mov	w5, #0
	bl	___mlxsw_core_port_init
	cbnz	w0, LBB0_2
; %bb.1:
	str	x19, [x21, x20, lsl #3]
LBB0_2:
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_MLXSW_PORT_CPU_PORT,8,3        ; @MLXSW_PORT_CPU_PORT
	.comm	_DEVLINK_PORT_FLAVOUR_CPU,4,2   ; @DEVLINK_PORT_FLAVOUR_CPU
.subsections_via_symbols
