	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function exynos_pcie_sideband_dbi_r_mode
_exynos_pcie_sideband_dbi_r_mode:       ## @exynos_pcie_sideband_dbi_r_mode
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%esi, %r14d
	movq	%rdi, %rbx
	movq	(%rdi), %rax
	movl	(%rax), %edi
	movq	_PCIE_ELBI_SLV_ARMISC@GOTPCREL(%rip), %r15
	movl	(%r15), %esi
	callq	_exynos_pcie_readl
	movq	_PCIE_ELBI_SLV_DBI_ENABLE@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	movl	%esi, %ecx
	orl	%eax, %ecx
	notl	%esi
	andl	%eax, %esi
	testl	%r14d, %r14d
	cmovnel	%ecx, %esi
	movq	(%rbx), %rax
	movl	(%rax), %edi
	movl	(%r15), %edx
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_exynos_pcie_writel             ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_PCIE_ELBI_SLV_ARMISC,4,2       ## @PCIE_ELBI_SLV_ARMISC
	.comm	_PCIE_ELBI_SLV_DBI_ENABLE,4,2   ## @PCIE_ELBI_SLV_DBI_ENABLE
	.no_dead_strip	_exynos_pcie_sideband_dbi_r_mode
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function exynos_pcie_sideband_dbi_r_mode
_exynos_pcie_sideband_dbi_r_mode:       ; @exynos_pcie_sideband_dbi_r_mode
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x1
	mov	x20, x0
	ldr	x8, [x0]
	ldr	w0, [x8]
Lloh0:
	adrp	x21, _PCIE_ELBI_SLV_ARMISC@GOTPAGE
Lloh1:
	ldr	x21, [x21, _PCIE_ELBI_SLV_ARMISC@GOTPAGEOFF]
	ldr	w1, [x21]
	bl	_exynos_pcie_readl
Lloh2:
	adrp	x8, _PCIE_ELBI_SLV_DBI_ENABLE@GOTPAGE
Lloh3:
	ldr	x8, [x8, _PCIE_ELBI_SLV_DBI_ENABLE@GOTPAGEOFF]
Lloh4:
	ldr	w8, [x8]
	orr	w9, w8, w0
	bic	w8, w0, w8
	cmp	w19, #0
	csel	w1, w8, w9, eq
	ldr	x8, [x20]
	ldr	w0, [x8]
	ldr	w2, [x21]
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	_exynos_pcie_writel
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGot	Lloh0, Lloh1
	.cfi_endproc
                                        ; -- End function
	.comm	_PCIE_ELBI_SLV_ARMISC,4,2       ; @PCIE_ELBI_SLV_ARMISC
	.comm	_PCIE_ELBI_SLV_DBI_ENABLE,4,2   ; @PCIE_ELBI_SLV_DBI_ENABLE
	.no_dead_strip	_exynos_pcie_sideband_dbi_r_mode
.subsections_via_symbols
