	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function rtl8xxxu_init_phy_bb
_rtl8xxxu_init_phy_bb:                  ## @rtl8xxxu_init_phy_bb
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r15
	movq	32(%rdi), %rax
	callq	*(%rax)
	cmpl	$1, (%r15)
	jne	LBB0_3
## %bb.1:
	cmpl	$2, 4(%r15)
	jne	LBB0_3
## %bb.2:
	movq	_REG_FPGA0_TX_INFO@GOTPCREL(%rip), %r12
	movl	(%r12), %esi
	movq	%r15, %rdi
	callq	_rtl8xxxu_read32
	movl	%eax, %r14d
	xorl	%edi, %edi
	callq	_BIT
	movl	%eax, %ebx
	movl	$1, %edi
	callq	_BIT
	orl	%eax, %ebx
	notl	%ebx
	andl	%r14d, %ebx
	movl	$1, %edi
	callq	_BIT
	orl	%eax, %ebx
	movl	(%r12), %esi
	movq	%r15, %rdi
	movl	%ebx, %edx
	callq	_rtl8xxxu_write32
	movq	_REG_FPGA1_TX_INFO@GOTPCREL(%rip), %rbx
	movl	(%rbx), %esi
	movq	%r15, %rdi
	callq	_rtl8xxxu_read32
                                        ## kill: def $eax killed $eax def $rax
	andl	$-3145780, %eax                 ## imm = 0xFFCFFFCC
	leal	2097186(%rax), %edx
	movl	(%rbx), %esi
	movq	%r15, %rdi
	callq	_rtl8xxxu_write32
	movq	_REG_CCK0_AFE_SETTING@GOTPCREL(%rip), %rbx
	movl	(%rbx), %esi
	movq	%r15, %rdi
	callq	_rtl8xxxu_read32
	movq	_CCK0_AFE_RX_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	notl	%edx
	andl	%eax, %edx
	andl	$16777215, %edx                 ## imm = 0xFFFFFF
	movq	_CCK0_AFE_RX_ANT_B@GOTPCREL(%rip), %rax
	orl	(%rax), %edx
	orl	$1073741824, %edx               ## imm = 0x40000000
	movl	(%rbx), %esi
	movq	%r15, %rdi
	callq	_rtl8xxxu_write32
	movq	_REG_OFDM0_TRX_PATH_ENABLE@GOTPCREL(%rip), %rbx
	movl	(%rbx), %esi
	movq	%r15, %rdi
	callq	_rtl8xxxu_read32
	movq	_OFDM_RF_PATH_RX_MASK@GOTPCREL(%rip), %rcx
	movq	_OFDM_RF_PATH_TX_MASK@GOTPCREL(%rip), %rdx
	movl	(%rdx), %esi
	orl	(%rcx), %esi
	notl	%esi
	andl	%eax, %esi
	movq	_OFDM_RF_PATH_RX_A@GOTPCREL(%rip), %rax
	movq	_OFDM_RF_PATH_RX_B@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	orl	(%rax), %edx
	orl	%esi, %edx
	movq	_OFDM_RF_PATH_TX_B@GOTPCREL(%rip), %rax
	orl	(%rax), %edx
	movl	(%rbx), %esi
	movq	%r15, %rdi
	callq	_rtl8xxxu_write32
	movq	_REG_OFDM0_AGC_PARM1@GOTPCREL(%rip), %r12
	movl	(%r12), %esi
	movq	%r15, %rdi
	callq	_rtl8xxxu_read32
	movl	%eax, %r14d
	movl	$4, %edi
	callq	_BIT
	movl	%eax, %ebx
	movl	$5, %edi
	callq	_BIT
	orl	%eax, %ebx
	notl	%ebx
	andl	%r14d, %ebx
	movl	$4, %edi
	callq	_BIT
	orl	%eax, %ebx
	movl	(%r12), %esi
	movq	%r15, %rdi
	movl	%ebx, %edx
	callq	_rtl8xxxu_write32
	movq	_REG_TX_CCK_RFON@GOTPCREL(%rip), %r12
	movl	(%r12), %esi
	movq	%r15, %rdi
	callq	_rtl8xxxu_read32
	movl	%eax, %r14d
	movl	$27, %edi
	callq	_BIT
	movl	%eax, %ebx
	movl	$26, %edi
	callq	_BIT
	orl	%eax, %ebx
	notl	%ebx
	andl	%r14d, %ebx
	movl	$27, %edi
	callq	_BIT
	orl	%eax, %ebx
	movl	(%r12), %esi
	movq	%r15, %rdi
	movl	%ebx, %edx
	callq	_rtl8xxxu_write32
	movq	_REG_TX_CCK_BBON@GOTPCREL(%rip), %r12
	movl	(%r12), %esi
	movq	%r15, %rdi
	callq	_rtl8xxxu_read32
	movl	%eax, %r14d
	movl	$27, %edi
	callq	_BIT
	movl	%eax, %ebx
	movl	$26, %edi
	callq	_BIT
	orl	%eax, %ebx
	notl	%ebx
	andl	%r14d, %ebx
	movl	$27, %edi
	callq	_BIT
	orl	%eax, %ebx
	movl	(%r12), %esi
	movq	%r15, %rdi
	movl	%ebx, %edx
	callq	_rtl8xxxu_write32
	movq	_REG_TX_OFDM_RFON@GOTPCREL(%rip), %r12
	movl	(%r12), %esi
	movq	%r15, %rdi
	callq	_rtl8xxxu_read32
	movl	%eax, %r14d
	movl	$27, %edi
	callq	_BIT
	movl	%eax, %ebx
	movl	$26, %edi
	callq	_BIT
	orl	%eax, %ebx
	notl	%ebx
	andl	%r14d, %ebx
	movl	$27, %edi
	callq	_BIT
	orl	%eax, %ebx
	movl	(%r12), %esi
	movq	%r15, %rdi
	movl	%ebx, %edx
	callq	_rtl8xxxu_write32
	movq	_REG_TX_OFDM_BBON@GOTPCREL(%rip), %r12
	movl	(%r12), %esi
	movq	%r15, %rdi
	callq	_rtl8xxxu_read32
	movl	%eax, %r14d
	movl	$27, %edi
	callq	_BIT
	movl	%eax, %ebx
	movl	$26, %edi
	callq	_BIT
	orl	%eax, %ebx
	notl	%ebx
	andl	%r14d, %ebx
	movl	$27, %edi
	callq	_BIT
	orl	%eax, %ebx
	movl	(%r12), %esi
	movq	%r15, %rdi
	movl	%ebx, %edx
	callq	_rtl8xxxu_write32
	movq	_REG_TX_TO_TX@GOTPCREL(%rip), %r12
	movl	(%r12), %esi
	movq	%r15, %rdi
	callq	_rtl8xxxu_read32
	movl	%eax, %r14d
	movl	$27, %edi
	callq	_BIT
	movl	%eax, %ebx
	movl	$26, %edi
	callq	_BIT
	orl	%eax, %ebx
	notl	%ebx
	andl	%r14d, %ebx
	movl	$27, %edi
	callq	_BIT
	orl	%eax, %ebx
	movl	(%r12), %esi
	movq	%r15, %rdi
	movl	%ebx, %edx
	callq	_rtl8xxxu_write32
LBB0_3:
	cmpq	$0, 24(%r15)
	je	LBB0_5
## %bb.4:
	movq	_REG_MAC_PHY_CTRL@GOTPCREL(%rip), %rbx
	movl	(%rbx), %esi
	movq	%r15, %rdi
	callq	_rtl8xxxu_read32
	movl	8(%r15), %edx
	andl	$-16773121, %eax                ## imm = 0xFF000FFF
	movl	%edx, %ecx
	shll	$18, %ecx
	shll	$12, %edx
	orl	%ecx, %edx
	orl	%eax, %edx
	movl	(%rbx), %esi
	movq	%r15, %rdi
	callq	_rtl8xxxu_write32
LBB0_5:
	movq	16(%r15), %rax
	movq	_RTL8192E@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jne	LBB0_7
## %bb.6:
	movq	_REG_AFE_XTAL_CTRL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r15, %rdi
	movl	$1016315, %edx                  ## imm = 0xF81FB
	callq	_rtl8xxxu_write32
LBB0_7:
	xorl	%eax, %eax
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_REG_FPGA0_TX_INFO,4,2          ## @REG_FPGA0_TX_INFO
	.comm	_REG_FPGA1_TX_INFO,4,2          ## @REG_FPGA1_TX_INFO
	.comm	_REG_CCK0_AFE_SETTING,4,2       ## @REG_CCK0_AFE_SETTING
	.comm	_CCK0_AFE_RX_MASK,4,2           ## @CCK0_AFE_RX_MASK
	.comm	_CCK0_AFE_RX_ANT_B,4,2          ## @CCK0_AFE_RX_ANT_B
	.comm	_REG_OFDM0_TRX_PATH_ENABLE,4,2  ## @REG_OFDM0_TRX_PATH_ENABLE
	.comm	_OFDM_RF_PATH_RX_MASK,4,2       ## @OFDM_RF_PATH_RX_MASK
	.comm	_OFDM_RF_PATH_TX_MASK,4,2       ## @OFDM_RF_PATH_TX_MASK
	.comm	_OFDM_RF_PATH_RX_A,4,2          ## @OFDM_RF_PATH_RX_A
	.comm	_OFDM_RF_PATH_RX_B,4,2          ## @OFDM_RF_PATH_RX_B
	.comm	_OFDM_RF_PATH_TX_B,4,2          ## @OFDM_RF_PATH_TX_B
	.comm	_REG_OFDM0_AGC_PARM1,4,2        ## @REG_OFDM0_AGC_PARM1
	.comm	_REG_TX_CCK_RFON,4,2            ## @REG_TX_CCK_RFON
	.comm	_REG_TX_CCK_BBON,4,2            ## @REG_TX_CCK_BBON
	.comm	_REG_TX_OFDM_RFON,4,2           ## @REG_TX_OFDM_RFON
	.comm	_REG_TX_OFDM_BBON,4,2           ## @REG_TX_OFDM_BBON
	.comm	_REG_TX_TO_TX,4,2               ## @REG_TX_TO_TX
	.comm	_REG_MAC_PHY_CTRL,4,2           ## @REG_MAC_PHY_CTRL
	.comm	_RTL8192E,8,3                   ## @RTL8192E
	.comm	_REG_AFE_XTAL_CTRL,4,2          ## @REG_AFE_XTAL_CTRL
	.no_dead_strip	_rtl8xxxu_init_phy_bb
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function rtl8xxxu_init_phy_bb
_rtl8xxxu_init_phy_bb:                  ; @rtl8xxxu_init_phy_bb
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x0
	ldr	x8, [x0, #32]
	ldr	x8, [x8]
	blr	x8
	ldr	w8, [x19]
	cmp	w8, #1
	b.ne	LBB0_3
; %bb.1:
	ldr	w8, [x19, #4]
	cmp	w8, #2
	b.ne	LBB0_3
; %bb.2:
Lloh0:
	adrp	x22, _REG_FPGA0_TX_INFO@GOTPAGE
Lloh1:
	ldr	x22, [x22, _REG_FPGA0_TX_INFO@GOTPAGEOFF]
	ldr	w1, [x22]
	mov	x0, x19
	bl	_rtl8xxxu_read32
	mov	x20, x0
	mov	w0, #0
	bl	_BIT
	mov	x21, x0
	mov	w0, #1
	bl	_BIT
	orr	w8, w0, w21
	bic	w20, w20, w8
	mov	w0, #1
	bl	_BIT
	orr	w2, w20, w0
	ldr	w1, [x22]
	mov	x0, x19
	bl	_rtl8xxxu_write32
Lloh2:
	adrp	x20, _REG_FPGA1_TX_INFO@GOTPAGE
Lloh3:
	ldr	x20, [x20, _REG_FPGA1_TX_INFO@GOTPAGEOFF]
	ldr	w1, [x20]
	mov	x0, x19
	bl	_rtl8xxxu_read32
	and	w8, w0, #0xfffffffc
	and	w8, w8, #0xffcfffcf
	mov	w9, #34
	movk	w9, #32, lsl #16
	orr	w2, w8, w9
	ldr	w1, [x20]
	mov	x0, x19
	bl	_rtl8xxxu_write32
Lloh4:
	adrp	x20, _REG_CCK0_AFE_SETTING@GOTPAGE
Lloh5:
	ldr	x20, [x20, _REG_CCK0_AFE_SETTING@GOTPAGEOFF]
	ldr	w1, [x20]
	mov	x0, x19
	bl	_rtl8xxxu_read32
Lloh6:
	adrp	x8, _CCK0_AFE_RX_MASK@GOTPAGE
Lloh7:
	ldr	x8, [x8, _CCK0_AFE_RX_MASK@GOTPAGEOFF]
Lloh8:
	ldr	w8, [x8]
	bic	w8, w0, w8
	and	w8, w8, #0xffffff
Lloh9:
	adrp	x9, _CCK0_AFE_RX_ANT_B@GOTPAGE
Lloh10:
	ldr	x9, [x9, _CCK0_AFE_RX_ANT_B@GOTPAGEOFF]
Lloh11:
	ldr	w9, [x9]
	orr	w8, w9, w8
	orr	w2, w8, #0x40000000
	ldr	w1, [x20]
	mov	x0, x19
	bl	_rtl8xxxu_write32
Lloh12:
	adrp	x20, _REG_OFDM0_TRX_PATH_ENABLE@GOTPAGE
Lloh13:
	ldr	x20, [x20, _REG_OFDM0_TRX_PATH_ENABLE@GOTPAGEOFF]
	ldr	w1, [x20]
	mov	x0, x19
	bl	_rtl8xxxu_read32
Lloh14:
	adrp	x8, _OFDM_RF_PATH_RX_MASK@GOTPAGE
Lloh15:
	ldr	x8, [x8, _OFDM_RF_PATH_RX_MASK@GOTPAGEOFF]
Lloh16:
	ldr	w8, [x8]
Lloh17:
	adrp	x9, _OFDM_RF_PATH_TX_MASK@GOTPAGE
Lloh18:
	ldr	x9, [x9, _OFDM_RF_PATH_TX_MASK@GOTPAGEOFF]
Lloh19:
	ldr	w9, [x9]
	orr	w8, w9, w8
Lloh20:
	adrp	x9, _OFDM_RF_PATH_RX_A@GOTPAGE
Lloh21:
	ldr	x9, [x9, _OFDM_RF_PATH_RX_A@GOTPAGEOFF]
	bic	w8, w0, w8
Lloh22:
	ldr	w9, [x9]
Lloh23:
	adrp	x10, _OFDM_RF_PATH_RX_B@GOTPAGE
Lloh24:
	ldr	x10, [x10, _OFDM_RF_PATH_RX_B@GOTPAGEOFF]
Lloh25:
	ldr	w10, [x10]
	orr	w9, w10, w9
Lloh26:
	adrp	x10, _OFDM_RF_PATH_TX_B@GOTPAGE
Lloh27:
	ldr	x10, [x10, _OFDM_RF_PATH_TX_B@GOTPAGEOFF]
Lloh28:
	ldr	w10, [x10]
	orr	w8, w9, w8
	orr	w2, w8, w10
	ldr	w1, [x20]
	mov	x0, x19
	bl	_rtl8xxxu_write32
Lloh29:
	adrp	x22, _REG_OFDM0_AGC_PARM1@GOTPAGE
Lloh30:
	ldr	x22, [x22, _REG_OFDM0_AGC_PARM1@GOTPAGEOFF]
	ldr	w1, [x22]
	mov	x0, x19
	bl	_rtl8xxxu_read32
	mov	x20, x0
	mov	w0, #4
	bl	_BIT
	mov	x21, x0
	mov	w0, #5
	bl	_BIT
	orr	w8, w0, w21
	bic	w20, w20, w8
	mov	w0, #4
	bl	_BIT
	orr	w2, w20, w0
	ldr	w1, [x22]
	mov	x0, x19
	bl	_rtl8xxxu_write32
Lloh31:
	adrp	x22, _REG_TX_CCK_RFON@GOTPAGE
Lloh32:
	ldr	x22, [x22, _REG_TX_CCK_RFON@GOTPAGEOFF]
	ldr	w1, [x22]
	mov	x0, x19
	bl	_rtl8xxxu_read32
	mov	x20, x0
	mov	w0, #27
	bl	_BIT
	mov	x21, x0
	mov	w0, #26
	bl	_BIT
	orr	w8, w0, w21
	bic	w20, w20, w8
	mov	w0, #27
	bl	_BIT
	orr	w2, w20, w0
	ldr	w1, [x22]
	mov	x0, x19
	bl	_rtl8xxxu_write32
Lloh33:
	adrp	x22, _REG_TX_CCK_BBON@GOTPAGE
Lloh34:
	ldr	x22, [x22, _REG_TX_CCK_BBON@GOTPAGEOFF]
	ldr	w1, [x22]
	mov	x0, x19
	bl	_rtl8xxxu_read32
	mov	x20, x0
	mov	w0, #27
	bl	_BIT
	mov	x21, x0
	mov	w0, #26
	bl	_BIT
	orr	w8, w0, w21
	bic	w20, w20, w8
	mov	w0, #27
	bl	_BIT
	orr	w2, w20, w0
	ldr	w1, [x22]
	mov	x0, x19
	bl	_rtl8xxxu_write32
Lloh35:
	adrp	x22, _REG_TX_OFDM_RFON@GOTPAGE
Lloh36:
	ldr	x22, [x22, _REG_TX_OFDM_RFON@GOTPAGEOFF]
	ldr	w1, [x22]
	mov	x0, x19
	bl	_rtl8xxxu_read32
	mov	x20, x0
	mov	w0, #27
	bl	_BIT
	mov	x21, x0
	mov	w0, #26
	bl	_BIT
	orr	w8, w0, w21
	bic	w20, w20, w8
	mov	w0, #27
	bl	_BIT
	orr	w2, w20, w0
	ldr	w1, [x22]
	mov	x0, x19
	bl	_rtl8xxxu_write32
Lloh37:
	adrp	x22, _REG_TX_OFDM_BBON@GOTPAGE
Lloh38:
	ldr	x22, [x22, _REG_TX_OFDM_BBON@GOTPAGEOFF]
	ldr	w1, [x22]
	mov	x0, x19
	bl	_rtl8xxxu_read32
	mov	x20, x0
	mov	w0, #27
	bl	_BIT
	mov	x21, x0
	mov	w0, #26
	bl	_BIT
	orr	w8, w0, w21
	bic	w20, w20, w8
	mov	w0, #27
	bl	_BIT
	orr	w2, w20, w0
	ldr	w1, [x22]
	mov	x0, x19
	bl	_rtl8xxxu_write32
Lloh39:
	adrp	x22, _REG_TX_TO_TX@GOTPAGE
Lloh40:
	ldr	x22, [x22, _REG_TX_TO_TX@GOTPAGEOFF]
	ldr	w1, [x22]
	mov	x0, x19
	bl	_rtl8xxxu_read32
	mov	x20, x0
	mov	w0, #27
	bl	_BIT
	mov	x21, x0
	mov	w0, #26
	bl	_BIT
	orr	w8, w0, w21
	bic	w20, w20, w8
	mov	w0, #27
	bl	_BIT
	orr	w2, w20, w0
	ldr	w1, [x22]
	mov	x0, x19
	bl	_rtl8xxxu_write32
LBB0_3:
	ldr	x8, [x19, #24]
	cbz	x8, LBB0_5
; %bb.4:
Lloh41:
	adrp	x20, _REG_MAC_PHY_CTRL@GOTPAGE
Lloh42:
	ldr	x20, [x20, _REG_MAC_PHY_CTRL@GOTPAGEOFF]
	ldr	w1, [x20]
	mov	x0, x19
	bl	_rtl8xxxu_read32
	ldr	w8, [x19, #8]
	and	w9, w0, #0xff000fff
	orr	w9, w9, w8, lsl #12
	orr	w2, w9, w8, lsl #18
	ldr	w1, [x20]
	mov	x0, x19
	bl	_rtl8xxxu_write32
LBB0_5:
	ldr	x8, [x19, #16]
Lloh43:
	adrp	x9, _RTL8192E@GOTPAGE
Lloh44:
	ldr	x9, [x9, _RTL8192E@GOTPAGEOFF]
Lloh45:
	ldr	x9, [x9]
	cmp	x8, x9
	b.ne	LBB0_7
; %bb.6:
Lloh46:
	adrp	x8, _REG_AFE_XTAL_CTRL@GOTPAGE
Lloh47:
	ldr	x8, [x8, _REG_AFE_XTAL_CTRL@GOTPAGEOFF]
Lloh48:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #33275
	movk	w2, #15, lsl #16
	bl	_rtl8xxxu_write32
LBB0_7:
	mov	w0, #0
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGot	Lloh39, Lloh40
	.loh AdrpLdrGot	Lloh37, Lloh38
	.loh AdrpLdrGot	Lloh35, Lloh36
	.loh AdrpLdrGot	Lloh33, Lloh34
	.loh AdrpLdrGot	Lloh31, Lloh32
	.loh AdrpLdrGot	Lloh29, Lloh30
	.loh AdrpLdrGotLdr	Lloh26, Lloh27, Lloh28
	.loh AdrpLdrGotLdr	Lloh23, Lloh24, Lloh25
	.loh AdrpLdrGotLdr	Lloh20, Lloh21, Lloh22
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh19
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh16
	.loh AdrpLdrGot	Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGot	Lloh4, Lloh5
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGot	Lloh41, Lloh42
	.loh AdrpLdrGotLdr	Lloh43, Lloh44, Lloh45
	.loh AdrpLdrGotLdr	Lloh46, Lloh47, Lloh48
	.cfi_endproc
                                        ; -- End function
	.comm	_REG_FPGA0_TX_INFO,4,2          ; @REG_FPGA0_TX_INFO
	.comm	_REG_FPGA1_TX_INFO,4,2          ; @REG_FPGA1_TX_INFO
	.comm	_REG_CCK0_AFE_SETTING,4,2       ; @REG_CCK0_AFE_SETTING
	.comm	_CCK0_AFE_RX_MASK,4,2           ; @CCK0_AFE_RX_MASK
	.comm	_CCK0_AFE_RX_ANT_B,4,2          ; @CCK0_AFE_RX_ANT_B
	.comm	_REG_OFDM0_TRX_PATH_ENABLE,4,2  ; @REG_OFDM0_TRX_PATH_ENABLE
	.comm	_OFDM_RF_PATH_RX_MASK,4,2       ; @OFDM_RF_PATH_RX_MASK
	.comm	_OFDM_RF_PATH_TX_MASK,4,2       ; @OFDM_RF_PATH_TX_MASK
	.comm	_OFDM_RF_PATH_RX_A,4,2          ; @OFDM_RF_PATH_RX_A
	.comm	_OFDM_RF_PATH_RX_B,4,2          ; @OFDM_RF_PATH_RX_B
	.comm	_OFDM_RF_PATH_TX_B,4,2          ; @OFDM_RF_PATH_TX_B
	.comm	_REG_OFDM0_AGC_PARM1,4,2        ; @REG_OFDM0_AGC_PARM1
	.comm	_REG_TX_CCK_RFON,4,2            ; @REG_TX_CCK_RFON
	.comm	_REG_TX_CCK_BBON,4,2            ; @REG_TX_CCK_BBON
	.comm	_REG_TX_OFDM_RFON,4,2           ; @REG_TX_OFDM_RFON
	.comm	_REG_TX_OFDM_BBON,4,2           ; @REG_TX_OFDM_BBON
	.comm	_REG_TX_TO_TX,4,2               ; @REG_TX_TO_TX
	.comm	_REG_MAC_PHY_CTRL,4,2           ; @REG_MAC_PHY_CTRL
	.comm	_RTL8192E,8,3                   ; @RTL8192E
	.comm	_REG_AFE_XTAL_CTRL,4,2          ; @REG_AFE_XTAL_CTRL
	.no_dead_strip	_rtl8xxxu_init_phy_bb
.subsections_via_symbols
