	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function niu_init_one_rx_channel
_niu_init_one_rx_channel:               ## @niu_init_one_rx_channel
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	subq	$16, %rsp
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rsi, %r14
	movq	%rdi, %r15
	movl	(%rsi), %ebx
	movl	%ebx, %esi
	callq	_niu_rx_channel_reset
	testl	%eax, %eax
	jne	LBB0_5
## %bb.1:
	movq	%r15, %rdi
	movl	%ebx, %esi
	callq	_niu_rx_channel_lpage_init
	testl	%eax, %eax
	jne	LBB0_5
## %bb.2:
	movq	%r15, %rdi
	movq	%r14, %rsi
	callq	_niu_rx_channel_wred_init
	movl	%ebx, %edi
	callq	_RX_DMA_ENT_MSK
	movq	_RX_DMA_ENT_MSK_RBR_EMPTY@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	movl	%eax, %edi
	callq	_nw64
	movl	%ebx, %edi
	callq	_RX_DMA_CTL_STAT
	movq	_RX_DMA_CTL_STAT_MEX@GOTPCREL(%rip), %rcx
	movq	_RX_DMA_CTL_STAT_RCRTHRES@GOTPCREL(%rip), %rdx
	movl	(%rdx), %esi
	orl	(%rcx), %esi
	movq	_RX_DMA_CTL_STAT_RCRTO@GOTPCREL(%rip), %rcx
	orl	(%rcx), %esi
	movq	_RX_DMA_CTL_STAT_RBR_EMPTY@GOTPCREL(%rip), %r12
	orl	(%r12), %esi
	movl	%eax, %edi
	callq	_nw64
	movl	%ebx, %edi
	callq	_RXDMA_CFIG1
	movl	%eax, %edi
	callq	_nw64
	movl	%ebx, %edi
	callq	_RXDMA_CFIG2
	movq	_RXDMA_CFIG2_MBADDR_L@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	andl	4(%r14), %esi
	movq	_RXDMA_CFIG2_FULL_HDR@GOTPCREL(%rip), %rcx
	orl	(%rcx), %esi
	movl	%eax, %edi
	callq	_nw64
	movl	%ebx, %edi
	callq	_RBR_CFIG_A
	movl	48(%r14), %edx
	movq	_RBR_CFIG_A_LEN_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shll	%cl, %edx
	movq	_RBR_CFIG_A_STADDR_BASE@GOTPCREL(%rip), %rcx
	movq	_RBR_CFIG_A_STADDR@GOTPCREL(%rip), %rsi
	movl	(%rsi), %esi
	orl	(%rcx), %esi
	andl	8(%r14), %esi
	orl	%edx, %esi
	movl	%eax, %edi
	callq	_nw64
	leaq	-36(%rbp), %rsi
	movq	%r14, %rdi
	callq	_niu_compute_rbr_cfig_b
	testl	%eax, %eax
	jne	LBB0_5
## %bb.3:
	movl	%ebx, %edi
	callq	_RBR_CFIG_B
	movl	-36(%rbp), %esi
	movl	%eax, %edi
	callq	_nw64
	movl	%ebx, %edi
	callq	_RCRCFIG_A
	movl	40(%r14), %edx
	movq	_RCRCFIG_A_LEN_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shll	%cl, %edx
	movq	_RCRCFIG_A_STADDR_BASE@GOTPCREL(%rip), %rcx
	movq	_RCRCFIG_A_STADDR@GOTPCREL(%rip), %rsi
	movl	(%rsi), %esi
	orl	(%rcx), %esi
	andl	12(%r14), %esi
	orl	%edx, %esi
	movl	%eax, %edi
	callq	_nw64
	movl	%ebx, %edi
	callq	_RCRCFIG_B
	movl	24(%r14), %esi
	movl	32(%r14), %edx
	movq	_RCRCFIG_B_PTHRES_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shll	%cl, %edx
	movq	_RCRCFIG_B_ENTOUT@GOTPCREL(%rip), %rcx
	orl	(%rcx), %edx
	movq	_RCRCFIG_B_TIMEOUT_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shll	%cl, %esi
	orl	%edx, %esi
	movl	%eax, %edi
	callq	_nw64
	movq	%r15, %rdi
	movl	%ebx, %esi
	movl	$1, %edx
	callq	_niu_enable_rx_channel
	testl	%eax, %eax
	jne	LBB0_5
## %bb.4:
	movl	%ebx, %edi
	callq	_RBR_KICK
	movl	16(%r14), %esi
	movl	%eax, %edi
	callq	_nw64
	movl	%ebx, %edi
	callq	_RX_DMA_CTL_STAT
	movl	%eax, %edi
	callq	_nr64
	orl	(%r12), %eax
	movl	%eax, -36(%rbp)
	movl	%ebx, %edi
	callq	_RX_DMA_CTL_STAT
	movl	-36(%rbp), %esi
	movl	%eax, %edi
	callq	_nw64
	xorl	%eax, %eax
LBB0_5:
	addq	$16, %rsp
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_RX_DMA_ENT_MSK_RBR_EMPTY,4,2   ## @RX_DMA_ENT_MSK_RBR_EMPTY
	.comm	_RX_DMA_CTL_STAT_MEX,4,2        ## @RX_DMA_CTL_STAT_MEX
	.comm	_RX_DMA_CTL_STAT_RCRTHRES,4,2   ## @RX_DMA_CTL_STAT_RCRTHRES
	.comm	_RX_DMA_CTL_STAT_RCRTO,4,2      ## @RX_DMA_CTL_STAT_RCRTO
	.comm	_RX_DMA_CTL_STAT_RBR_EMPTY,4,2  ## @RX_DMA_CTL_STAT_RBR_EMPTY
	.comm	_RXDMA_CFIG2_MBADDR_L,4,2       ## @RXDMA_CFIG2_MBADDR_L
	.comm	_RXDMA_CFIG2_FULL_HDR,4,2       ## @RXDMA_CFIG2_FULL_HDR
	.comm	_RBR_CFIG_A_LEN_SHIFT,4,2       ## @RBR_CFIG_A_LEN_SHIFT
	.comm	_RBR_CFIG_A_STADDR_BASE,4,2     ## @RBR_CFIG_A_STADDR_BASE
	.comm	_RBR_CFIG_A_STADDR,4,2          ## @RBR_CFIG_A_STADDR
	.comm	_RCRCFIG_A_LEN_SHIFT,4,2        ## @RCRCFIG_A_LEN_SHIFT
	.comm	_RCRCFIG_A_STADDR_BASE,4,2      ## @RCRCFIG_A_STADDR_BASE
	.comm	_RCRCFIG_A_STADDR,4,2           ## @RCRCFIG_A_STADDR
	.comm	_RCRCFIG_B_PTHRES_SHIFT,4,2     ## @RCRCFIG_B_PTHRES_SHIFT
	.comm	_RCRCFIG_B_ENTOUT,4,2           ## @RCRCFIG_B_ENTOUT
	.comm	_RCRCFIG_B_TIMEOUT_SHIFT,4,2    ## @RCRCFIG_B_TIMEOUT_SHIFT
	.no_dead_strip	_niu_init_one_rx_channel
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function niu_init_one_rx_channel
_niu_init_one_rx_channel:               ; @niu_init_one_rx_channel
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #64
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x20, x1
	mov	x21, x0
	ldr	w19, [x1]
	mov	x1, x19
	bl	_niu_rx_channel_reset
	cbnz	w0, LBB0_5
; %bb.1:
	mov	x0, x21
	mov	x1, x19
	bl	_niu_rx_channel_lpage_init
	cbnz	w0, LBB0_5
; %bb.2:
	mov	x0, x21
	mov	x1, x20
	bl	_niu_rx_channel_wred_init
	mov	x0, x19
	bl	_RX_DMA_ENT_MSK
Lloh0:
	adrp	x8, _RX_DMA_ENT_MSK_RBR_EMPTY@GOTPAGE
Lloh1:
	ldr	x8, [x8, _RX_DMA_ENT_MSK_RBR_EMPTY@GOTPAGEOFF]
Lloh2:
	ldr	w1, [x8]
	bl	_nw64
	mov	x0, x19
	bl	_RX_DMA_CTL_STAT
Lloh3:
	adrp	x8, _RX_DMA_CTL_STAT_MEX@GOTPAGE
Lloh4:
	ldr	x8, [x8, _RX_DMA_CTL_STAT_MEX@GOTPAGEOFF]
Lloh5:
	ldr	w8, [x8]
Lloh6:
	adrp	x9, _RX_DMA_CTL_STAT_RCRTHRES@GOTPAGE
Lloh7:
	ldr	x9, [x9, _RX_DMA_CTL_STAT_RCRTHRES@GOTPAGEOFF]
Lloh8:
	ldr	w9, [x9]
	orr	w8, w9, w8
Lloh9:
	adrp	x9, _RX_DMA_CTL_STAT_RCRTO@GOTPAGE
Lloh10:
	ldr	x9, [x9, _RX_DMA_CTL_STAT_RCRTO@GOTPAGEOFF]
Lloh11:
	ldr	w9, [x9]
	orr	w8, w8, w9
Lloh12:
	adrp	x22, _RX_DMA_CTL_STAT_RBR_EMPTY@GOTPAGE
Lloh13:
	ldr	x22, [x22, _RX_DMA_CTL_STAT_RBR_EMPTY@GOTPAGEOFF]
	ldr	w9, [x22]
	orr	w1, w8, w9
	bl	_nw64
	mov	x0, x19
	bl	_RXDMA_CFIG1
	bl	_nw64
	mov	x0, x19
	bl	_RXDMA_CFIG2
	ldr	w8, [x20, #4]
Lloh14:
	adrp	x9, _RXDMA_CFIG2_MBADDR_L@GOTPAGE
Lloh15:
	ldr	x9, [x9, _RXDMA_CFIG2_MBADDR_L@GOTPAGEOFF]
Lloh16:
	ldr	w9, [x9]
	and	w8, w9, w8
Lloh17:
	adrp	x9, _RXDMA_CFIG2_FULL_HDR@GOTPAGE
Lloh18:
	ldr	x9, [x9, _RXDMA_CFIG2_FULL_HDR@GOTPAGEOFF]
Lloh19:
	ldr	w9, [x9]
	orr	w1, w8, w9
	bl	_nw64
	mov	x0, x19
	bl	_RBR_CFIG_A
	ldr	w8, [x20, #48]
Lloh20:
	adrp	x9, _RBR_CFIG_A_LEN_SHIFT@GOTPAGE
Lloh21:
	ldr	x9, [x9, _RBR_CFIG_A_LEN_SHIFT@GOTPAGEOFF]
Lloh22:
	ldr	w9, [x9]
	lsl	w8, w8, w9
	ldr	w9, [x20, #8]
Lloh23:
	adrp	x10, _RBR_CFIG_A_STADDR_BASE@GOTPAGE
Lloh24:
	ldr	x10, [x10, _RBR_CFIG_A_STADDR_BASE@GOTPAGEOFF]
Lloh25:
	ldr	w10, [x10]
Lloh26:
	adrp	x11, _RBR_CFIG_A_STADDR@GOTPAGE
Lloh27:
	ldr	x11, [x11, _RBR_CFIG_A_STADDR@GOTPAGEOFF]
Lloh28:
	ldr	w11, [x11]
	orr	w10, w11, w10
	and	w9, w10, w9
	orr	w1, w9, w8
	bl	_nw64
	add	x1, sp, #12
	mov	x0, x20
	bl	_niu_compute_rbr_cfig_b
	cbnz	w0, LBB0_5
; %bb.3:
	mov	x0, x19
	bl	_RBR_CFIG_B
	ldr	w1, [sp, #12]
	bl	_nw64
	mov	x0, x19
	bl	_RCRCFIG_A
	ldr	w8, [x20, #40]
Lloh29:
	adrp	x9, _RCRCFIG_A_LEN_SHIFT@GOTPAGE
Lloh30:
	ldr	x9, [x9, _RCRCFIG_A_LEN_SHIFT@GOTPAGEOFF]
Lloh31:
	ldr	w9, [x9]
	lsl	w8, w8, w9
	ldr	w9, [x20, #12]
Lloh32:
	adrp	x10, _RCRCFIG_A_STADDR_BASE@GOTPAGE
Lloh33:
	ldr	x10, [x10, _RCRCFIG_A_STADDR_BASE@GOTPAGEOFF]
Lloh34:
	ldr	w10, [x10]
Lloh35:
	adrp	x11, _RCRCFIG_A_STADDR@GOTPAGE
Lloh36:
	ldr	x11, [x11, _RCRCFIG_A_STADDR@GOTPAGEOFF]
Lloh37:
	ldr	w11, [x11]
	orr	w10, w11, w10
	and	w9, w10, w9
	orr	w1, w9, w8
	bl	_nw64
	mov	x0, x19
	bl	_RCRCFIG_B
	ldr	w8, [x20, #32]
Lloh38:
	adrp	x9, _RCRCFIG_B_PTHRES_SHIFT@GOTPAGE
Lloh39:
	ldr	x9, [x9, _RCRCFIG_B_PTHRES_SHIFT@GOTPAGEOFF]
Lloh40:
	ldr	w9, [x9]
	lsl	w8, w8, w9
Lloh41:
	adrp	x9, _RCRCFIG_B_ENTOUT@GOTPAGE
Lloh42:
	ldr	x9, [x9, _RCRCFIG_B_ENTOUT@GOTPAGEOFF]
Lloh43:
	ldr	w9, [x9]
	orr	w8, w8, w9
	ldr	w9, [x20, #24]
Lloh44:
	adrp	x10, _RCRCFIG_B_TIMEOUT_SHIFT@GOTPAGE
Lloh45:
	ldr	x10, [x10, _RCRCFIG_B_TIMEOUT_SHIFT@GOTPAGEOFF]
Lloh46:
	ldr	w10, [x10]
	lsl	w9, w9, w10
	orr	w1, w8, w9
	bl	_nw64
	mov	x0, x21
	mov	x1, x19
	mov	w2, #1
	bl	_niu_enable_rx_channel
	cbnz	w0, LBB0_5
; %bb.4:
	mov	x0, x19
	bl	_RBR_KICK
	ldr	w1, [x20, #16]
	bl	_nw64
	mov	x0, x19
	bl	_RX_DMA_CTL_STAT
	bl	_nr64
	ldr	w8, [x22]
	orr	w8, w8, w0
	str	w8, [sp, #12]
	mov	x0, x19
	bl	_RX_DMA_CTL_STAT
	ldr	w1, [sp, #12]
	bl	_nw64
	mov	w0, #0
LBB0_5:
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #64
	ret
	.loh AdrpLdrGotLdr	Lloh26, Lloh27, Lloh28
	.loh AdrpLdrGotLdr	Lloh23, Lloh24, Lloh25
	.loh AdrpLdrGotLdr	Lloh20, Lloh21, Lloh22
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh19
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh16
	.loh AdrpLdrGot	Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh44, Lloh45, Lloh46
	.loh AdrpLdrGotLdr	Lloh41, Lloh42, Lloh43
	.loh AdrpLdrGotLdr	Lloh38, Lloh39, Lloh40
	.loh AdrpLdrGotLdr	Lloh35, Lloh36, Lloh37
	.loh AdrpLdrGotLdr	Lloh32, Lloh33, Lloh34
	.loh AdrpLdrGotLdr	Lloh29, Lloh30, Lloh31
	.cfi_endproc
                                        ; -- End function
	.comm	_RX_DMA_ENT_MSK_RBR_EMPTY,4,2   ; @RX_DMA_ENT_MSK_RBR_EMPTY
	.comm	_RX_DMA_CTL_STAT_MEX,4,2        ; @RX_DMA_CTL_STAT_MEX
	.comm	_RX_DMA_CTL_STAT_RCRTHRES,4,2   ; @RX_DMA_CTL_STAT_RCRTHRES
	.comm	_RX_DMA_CTL_STAT_RCRTO,4,2      ; @RX_DMA_CTL_STAT_RCRTO
	.comm	_RX_DMA_CTL_STAT_RBR_EMPTY,4,2  ; @RX_DMA_CTL_STAT_RBR_EMPTY
	.comm	_RXDMA_CFIG2_MBADDR_L,4,2       ; @RXDMA_CFIG2_MBADDR_L
	.comm	_RXDMA_CFIG2_FULL_HDR,4,2       ; @RXDMA_CFIG2_FULL_HDR
	.comm	_RBR_CFIG_A_LEN_SHIFT,4,2       ; @RBR_CFIG_A_LEN_SHIFT
	.comm	_RBR_CFIG_A_STADDR_BASE,4,2     ; @RBR_CFIG_A_STADDR_BASE
	.comm	_RBR_CFIG_A_STADDR,4,2          ; @RBR_CFIG_A_STADDR
	.comm	_RCRCFIG_A_LEN_SHIFT,4,2        ; @RCRCFIG_A_LEN_SHIFT
	.comm	_RCRCFIG_A_STADDR_BASE,4,2      ; @RCRCFIG_A_STADDR_BASE
	.comm	_RCRCFIG_A_STADDR,4,2           ; @RCRCFIG_A_STADDR
	.comm	_RCRCFIG_B_PTHRES_SHIFT,4,2     ; @RCRCFIG_B_PTHRES_SHIFT
	.comm	_RCRCFIG_B_ENTOUT,4,2           ; @RCRCFIG_B_ENTOUT
	.comm	_RCRCFIG_B_TIMEOUT_SHIFT,4,2    ; @RCRCFIG_B_TIMEOUT_SHIFT
	.no_dead_strip	_niu_init_one_rx_channel
.subsections_via_symbols
