	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function rt2800_init_rfcsr_3352
_rt2800_init_rfcsr_3352:                ## @rt2800_init_rfcsr_3352
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$24, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %rbx
	movq	_CAPABILITY_EXTERNAL_PA_TX0@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	%rbx, %rsi
	callq	_test_bit
	movl	%eax, %r12d
	movq	_CAPABILITY_EXTERNAL_PA_TX1@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	%rbx, %rsi
	callq	_test_bit
	movl	%eax, %r13d
	movq	%rbx, %rdi
	movl	$30, %esi
	callq	_rt2800_rf_init_calibration
	movq	%rbx, %rdi
	xorl	%esi, %esi
	movl	$240, %edx
	callq	_rt2800_rfcsr_write
	movq	%rbx, %rdi
	movl	$1, %esi
	movl	$35, %edx
	callq	_rt2800_rfcsr_write
	movq	%rbx, %rdi
	movl	$2, %esi
	movl	$80, %edx
	callq	_rt2800_rfcsr_write
	movq	%rbx, %rdi
	movl	$3, %esi
	movl	$24, %edx
	callq	_rt2800_rfcsr_write
	movq	%rbx, %rdi
	movl	$4, %esi
	xorl	%edx, %edx
	callq	_rt2800_rfcsr_write
	movq	%rbx, %rdi
	movl	$5, %esi
	xorl	%edx, %edx
	callq	_rt2800_rfcsr_write
	movq	%rbx, %rdi
	movl	$6, %esi
	movl	$51, %edx
	callq	_rt2800_rfcsr_write
	movq	%rbx, %rdi
	movl	$7, %esi
	xorl	%edx, %edx
	callq	_rt2800_rfcsr_write
	movq	%rbx, %rdi
	movl	$8, %esi
	movl	$241, %edx
	callq	_rt2800_rfcsr_write
	movq	%rbx, %rdi
	movl	$9, %esi
	movl	$2, %edx
	callq	_rt2800_rfcsr_write
	movq	%rbx, %rdi
	movl	$10, %esi
	movl	$210, %edx
	callq	_rt2800_rfcsr_write
	movq	%rbx, %rdi
	movl	$11, %esi
	movl	$66, %edx
	callq	_rt2800_rfcsr_write
	movq	%rbx, %rdi
	movl	$12, %esi
	movl	$28, %edx
	callq	_rt2800_rfcsr_write
	movq	%rbx, %rdi
	movl	$13, %esi
	xorl	%edx, %edx
	callq	_rt2800_rfcsr_write
	movq	%rbx, %rdi
	movl	$14, %esi
	movl	$90, %edx
	callq	_rt2800_rfcsr_write
	movq	%rbx, %rdi
	movl	$15, %esi
	xorl	%edx, %edx
	callq	_rt2800_rfcsr_write
	movq	%rbx, %rdi
	movl	$16, %esi
	movl	$1, %edx
	callq	_rt2800_rfcsr_write
	movq	%rbx, %rdi
	movl	$18, %esi
	movl	$69, %edx
	callq	_rt2800_rfcsr_write
	movq	%rbx, %rdi
	movl	$19, %esi
	movl	$2, %edx
	callq	_rt2800_rfcsr_write
	movq	%rbx, %rdi
	movl	$20, %esi
	xorl	%edx, %edx
	callq	_rt2800_rfcsr_write
	movq	%rbx, %rdi
	movl	$21, %esi
	xorl	%edx, %edx
	callq	_rt2800_rfcsr_write
	movq	%rbx, %rdi
	movl	$22, %esi
	xorl	%edx, %edx
	callq	_rt2800_rfcsr_write
	movq	%rbx, %rdi
	movl	$23, %esi
	xorl	%edx, %edx
	callq	_rt2800_rfcsr_write
	movq	%rbx, %rdi
	movl	$24, %esi
	xorl	%edx, %edx
	callq	_rt2800_rfcsr_write
	movq	%rbx, %rdi
	movl	$25, %esi
	movl	$128, %edx
	callq	_rt2800_rfcsr_write
	movq	%rbx, %rdi
	movl	$26, %esi
	xorl	%edx, %edx
	callq	_rt2800_rfcsr_write
	movq	%rbx, %rdi
	movl	$27, %esi
	movl	$3, %edx
	callq	_rt2800_rfcsr_write
	movq	%rbx, %rdi
	movl	$28, %esi
	movl	$3, %edx
	callq	_rt2800_rfcsr_write
	movq	%rbx, %rdi
	movl	$29, %esi
	xorl	%edx, %edx
	callq	_rt2800_rfcsr_write
	movq	%rbx, %rdi
	movl	$30, %esi
	movl	$16, %edx
	callq	_rt2800_rfcsr_write
	movq	%rbx, %rdi
	movl	$31, %esi
	movl	$128, %edx
	callq	_rt2800_rfcsr_write
	movq	%rbx, %rdi
	movl	$32, %esi
	movl	$128, %edx
	callq	_rt2800_rfcsr_write
	movq	%rbx, %rdi
	movl	$33, %esi
	xorl	%edx, %edx
	callq	_rt2800_rfcsr_write
	movl	$1, -44(%rbp)
	testl	%r12d, %r12d
	je	LBB0_2
## %bb.1:
	movq	_RFCSR34_TX0_EXT_PA@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	leaq	-44(%rbp), %rdi
	movl	$1, %edx
	callq	_rt2x00_set_field8
LBB0_2:
	testl	%r13d, %r13d
	je	LBB0_4
## %bb.3:
	movq	_RFCSR34_TX1_EXT_PA@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	leaq	-44(%rbp), %rdi
	movl	$1, %edx
	callq	_rt2x00_set_field8
LBB0_4:
	movl	-44(%rbp), %edx
	movq	%rbx, %rdi
	movl	$34, %esi
	callq	_rt2800_rfcsr_write
	movq	%rbx, %rdi
	movl	$35, %esi
	movl	$3, %edx
	callq	_rt2800_rfcsr_write
	movq	%rbx, %rdi
	movl	$36, %esi
	movl	$189, %edx
	callq	_rt2800_rfcsr_write
	movq	%rbx, %rdi
	movl	$37, %esi
	movl	$60, %edx
	callq	_rt2800_rfcsr_write
	movq	%rbx, %rdi
	movl	$38, %esi
	movl	$95, %edx
	callq	_rt2800_rfcsr_write
	movq	%rbx, %rdi
	movl	$39, %esi
	movl	$197, %edx
	callq	_rt2800_rfcsr_write
	movq	%rbx, %rdi
	movl	$40, %esi
	movl	$51, %edx
	callq	_rt2800_rfcsr_write
	movl	$82, -44(%rbp)
	movl	$82, %r14d
	movl	$82, %edx
	testl	%r12d, %r12d
	jne	LBB0_6
## %bb.5:
	movq	_RFCSR41_BIT1@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	leaq	-44(%rbp), %r15
	movq	%r15, %rdi
	movl	$1, %edx
	callq	_rt2x00_set_field8
	movq	_RFCSR41_BIT4@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r15, %rdi
	movl	$1, %edx
	callq	_rt2x00_set_field8
	movl	-44(%rbp), %edx
LBB0_6:
	movq	%rbx, %rdi
	movl	$41, %esi
	callq	_rt2800_rfcsr_write
	movl	$82, -44(%rbp)
	testl	%r13d, %r13d
	jne	LBB0_8
## %bb.7:
	movq	_RFCSR42_BIT1@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	leaq	-44(%rbp), %r14
	movq	%r14, %rdi
	movl	$1, %edx
	callq	_rt2x00_set_field8
	movq	_RFCSR42_BIT4@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	movl	$1, %edx
	callq	_rt2x00_set_field8
	movl	-44(%rbp), %r14d
LBB0_8:
	movq	%rbx, %rdi
	movl	$42, %esi
	movl	%r14d, %edx
	callq	_rt2800_rfcsr_write
	movq	%rbx, %rdi
	movl	$43, %esi
	movl	$219, %edx
	callq	_rt2800_rfcsr_write
	movq	%rbx, %rdi
	movl	$44, %esi
	movl	$219, %edx
	callq	_rt2800_rfcsr_write
	movq	%rbx, %rdi
	movl	$45, %esi
	movl	$219, %edx
	callq	_rt2800_rfcsr_write
	movq	%rbx, %rdi
	movl	$46, %esi
	movl	$221, %edx
	callq	_rt2800_rfcsr_write
	movq	%rbx, %rdi
	movl	$47, %esi
	movl	$13, %edx
	callq	_rt2800_rfcsr_write
	movq	%rbx, %rdi
	movl	$48, %esi
	movl	$20, %edx
	callq	_rt2800_rfcsr_write
	movl	$0, -48(%rbp)                   ## 4-byte Folded Spill
	movq	%rbx, %rdi
	movl	$49, %esi
	xorl	%edx, %edx
	callq	_rt2800_rfcsr_write
	movl	$45, -44(%rbp)
	testl	%r12d, %r12d
	je	LBB0_10
## %bb.9:
	movq	_RFCSR50_TX0_EXT_PA@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	leaq	-44(%rbp), %rdi
	movl	$1, %edx
	callq	_rt2x00_set_field8
LBB0_10:
	movl	%r12d, %r14d
	movl	$27, %r15d
	movl	$27, %eax
	movl	$127, %ecx
	testl	%r13d, %r13d
	je	LBB0_12
## %bb.11:
	movq	_RFCSR50_TX1_EXT_PA@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	leaq	-44(%rbp), %rdi
	movl	$1, %edx
	callq	_rt2x00_set_field8
	movl	$82, %ecx
	movl	$192, %eax
	movl	$192, -48(%rbp)                 ## 4-byte Folded Spill
LBB0_12:
	movl	%ecx, -52(%rbp)                 ## 4-byte Spill
	movl	%eax, -56(%rbp)                 ## 4-byte Spill
	movl	-44(%rbp), %edx
	movq	%rbx, %rdi
	movl	$50, %esi
	callq	_rt2800_rfcsr_write
	xorl	%r13d, %r13d
	xorl	%r12d, %r12d
	testl	%r14d, %r14d
	movl	$82, %edx
	movl	$127, %eax
	cmovel	%eax, %edx
	sete	%r13b
	movl	$192, %eax
	cmovnel	%eax, %r14d
	setne	%r12b
	cmovnel	%eax, %r15d
	movq	%rbx, %rdi
	movl	$51, %esi
	callq	_rt2800_rfcsr_write
	movq	%rbx, %rdi
	movl	$52, %esi
	movl	%r14d, %edx
	callq	_rt2800_rfcsr_write
	shll	$7, %r12d
	orl	$82, %r12d
	movq	%rbx, %rdi
	movl	$53, %esi
	movl	%r12d, %edx
	callq	_rt2800_rfcsr_write
	movq	%rbx, %rdi
	movl	$54, %esi
	movl	%r15d, %edx
	callq	_rt2800_rfcsr_write
	movq	%rbx, %rdi
	movl	$55, %esi
	movl	-52(%rbp), %edx                 ## 4-byte Reload
	callq	_rt2800_rfcsr_write
	movq	%rbx, %rdi
	movl	$56, %esi
	movl	-48(%rbp), %edx                 ## 4-byte Reload
	callq	_rt2800_rfcsr_write
	leal	73(%r13,%r13,8), %edx
	movq	%rbx, %rdi
	movl	$57, %esi
	callq	_rt2800_rfcsr_write
	movq	%rbx, %rdi
	movl	$58, %esi
	movl	-56(%rbp), %edx                 ## 4-byte Reload
	callq	_rt2800_rfcsr_write
	movq	%rbx, %rdi
	movl	$59, %esi
	xorl	%edx, %edx
	callq	_rt2800_rfcsr_write
	movq	%rbx, %rdi
	movl	$60, %esi
	xorl	%edx, %edx
	callq	_rt2800_rfcsr_write
	movq	%rbx, %rdi
	movl	$61, %esi
	xorl	%edx, %edx
	callq	_rt2800_rfcsr_write
	movq	%rbx, %rdi
	movl	$62, %esi
	xorl	%edx, %edx
	callq	_rt2800_rfcsr_write
	movq	%rbx, %rdi
	movl	$63, %esi
	xorl	%edx, %edx
	callq	_rt2800_rfcsr_write
	movq	%rbx, %rdi
	callq	_rt2800_rx_filter_calibration
	movq	%rbx, %rdi
	callq	_rt2800_led_open_drain_enable
	movq	%rbx, %rdi
	callq	_rt2800_normal_mode_setup_3xxx
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_CAPABILITY_EXTERNAL_PA_TX0,4,2 ## @CAPABILITY_EXTERNAL_PA_TX0
	.comm	_CAPABILITY_EXTERNAL_PA_TX1,4,2 ## @CAPABILITY_EXTERNAL_PA_TX1
	.comm	_RFCSR34_TX0_EXT_PA,4,2         ## @RFCSR34_TX0_EXT_PA
	.comm	_RFCSR34_TX1_EXT_PA,4,2         ## @RFCSR34_TX1_EXT_PA
	.comm	_RFCSR41_BIT1,4,2               ## @RFCSR41_BIT1
	.comm	_RFCSR41_BIT4,4,2               ## @RFCSR41_BIT4
	.comm	_RFCSR42_BIT1,4,2               ## @RFCSR42_BIT1
	.comm	_RFCSR42_BIT4,4,2               ## @RFCSR42_BIT4
	.comm	_RFCSR50_TX0_EXT_PA,4,2         ## @RFCSR50_TX0_EXT_PA
	.comm	_RFCSR50_TX1_EXT_PA,4,2         ## @RFCSR50_TX1_EXT_PA
	.no_dead_strip	_rt2800_init_rfcsr_3352
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function rt2800_init_rfcsr_3352
_rt2800_init_rfcsr_3352:                ; @rt2800_init_rfcsr_3352
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #96
	.cfi_def_cfa_offset 96
	stp	x26, x25, [sp, #16]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #32]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #48]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #64]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #80]             ; 16-byte Folded Spill
	add	x29, sp, #80
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	mov	x19, x0
Lloh0:
	adrp	x8, _CAPABILITY_EXTERNAL_PA_TX0@GOTPAGE
Lloh1:
	ldr	x8, [x8, _CAPABILITY_EXTERNAL_PA_TX0@GOTPAGEOFF]
Lloh2:
	ldr	w0, [x8]
	mov	x1, x19
	bl	_test_bit
	mov	x20, x0
Lloh3:
	adrp	x8, _CAPABILITY_EXTERNAL_PA_TX1@GOTPAGE
Lloh4:
	ldr	x8, [x8, _CAPABILITY_EXTERNAL_PA_TX1@GOTPAGEOFF]
Lloh5:
	ldr	w0, [x8]
	mov	x1, x19
	bl	_test_bit
	mov	x21, x0
	mov	x0, x19
	mov	w1, #30
	bl	_rt2800_rf_init_calibration
	mov	x0, x19
	mov	w1, #0
	mov	w2, #240
	bl	_rt2800_rfcsr_write
	mov	w22, #1
	mov	x0, x19
	mov	w1, #1
	mov	w2, #35
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #2
	mov	w2, #80
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #3
	mov	w2, #24
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #4
	mov	w2, #0
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #5
	mov	w2, #0
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #6
	mov	w2, #51
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #7
	mov	w2, #0
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #8
	mov	w2, #241
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #9
	mov	w2, #2
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #10
	mov	w2, #210
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #11
	mov	w2, #66
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #12
	mov	w2, #28
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #13
	mov	w2, #0
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #14
	mov	w2, #90
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #15
	mov	w2, #0
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #16
	mov	w2, #1
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #18
	mov	w2, #69
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #19
	mov	w2, #2
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #20
	mov	w2, #0
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #21
	mov	w2, #0
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #22
	mov	w2, #0
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #23
	mov	w2, #0
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #24
	mov	w2, #0
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #25
	mov	w2, #128
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #26
	mov	w2, #0
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #27
	mov	w2, #3
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #28
	mov	w2, #3
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #29
	mov	w2, #0
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #30
	mov	w2, #16
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #31
	mov	w2, #128
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #32
	mov	w2, #128
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #33
	mov	w2, #0
	bl	_rt2800_rfcsr_write
	str	w22, [sp, #12]
	cbz	w20, LBB0_2
; %bb.1:
Lloh6:
	adrp	x8, _RFCSR34_TX0_EXT_PA@GOTPAGE
Lloh7:
	ldr	x8, [x8, _RFCSR34_TX0_EXT_PA@GOTPAGEOFF]
Lloh8:
	ldr	w1, [x8]
	add	x0, sp, #12
	mov	w2, #1
	bl	_rt2x00_set_field8
LBB0_2:
	cbz	w21, LBB0_4
; %bb.3:
Lloh9:
	adrp	x8, _RFCSR34_TX1_EXT_PA@GOTPAGE
Lloh10:
	ldr	x8, [x8, _RFCSR34_TX1_EXT_PA@GOTPAGEOFF]
Lloh11:
	ldr	w1, [x8]
	add	x0, sp, #12
	mov	w2, #1
	bl	_rt2x00_set_field8
LBB0_4:
	ldr	w2, [sp, #12]
	mov	x0, x19
	mov	w1, #34
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #35
	mov	w2, #3
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #36
	mov	w2, #189
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #37
	mov	w2, #60
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #38
	mov	w2, #95
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #39
	mov	w2, #197
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #40
	mov	w2, #51
	bl	_rt2800_rfcsr_write
	mov	w22, #82
	str	w22, [sp, #12]
	mov	w2, #82
	cbnz	w20, LBB0_6
; %bb.5:
Lloh12:
	adrp	x8, _RFCSR41_BIT1@GOTPAGE
Lloh13:
	ldr	x8, [x8, _RFCSR41_BIT1@GOTPAGEOFF]
Lloh14:
	ldr	w1, [x8]
	add	x0, sp, #12
	mov	w2, #1
	bl	_rt2x00_set_field8
Lloh15:
	adrp	x8, _RFCSR41_BIT4@GOTPAGE
Lloh16:
	ldr	x8, [x8, _RFCSR41_BIT4@GOTPAGEOFF]
Lloh17:
	ldr	w1, [x8]
	add	x0, sp, #12
	mov	w2, #1
	bl	_rt2x00_set_field8
	ldr	w2, [sp, #12]
LBB0_6:
	mov	x0, x19
	mov	w1, #41
	bl	_rt2800_rfcsr_write
	str	w22, [sp, #12]
	cbnz	w21, LBB0_8
; %bb.7:
Lloh18:
	adrp	x8, _RFCSR42_BIT1@GOTPAGE
Lloh19:
	ldr	x8, [x8, _RFCSR42_BIT1@GOTPAGEOFF]
Lloh20:
	ldr	w1, [x8]
	add	x0, sp, #12
	mov	w2, #1
	bl	_rt2x00_set_field8
Lloh21:
	adrp	x8, _RFCSR42_BIT4@GOTPAGE
Lloh22:
	ldr	x8, [x8, _RFCSR42_BIT4@GOTPAGEOFF]
Lloh23:
	ldr	w1, [x8]
	add	x0, sp, #12
	mov	w2, #1
	bl	_rt2x00_set_field8
	ldr	w22, [sp, #12]
LBB0_8:
	mov	x0, x19
	mov	w1, #42
	mov	x2, x22
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #43
	mov	w2, #219
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #44
	mov	w2, #219
	bl	_rt2800_rfcsr_write
	mov	w22, #45
	mov	x0, x19
	mov	w1, #45
	mov	w2, #219
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #46
	mov	w2, #221
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #47
	mov	w2, #13
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #48
	mov	w2, #20
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #49
	mov	w2, #0
	bl	_rt2800_rfcsr_write
	str	w22, [sp, #12]
	cbz	w20, LBB0_10
; %bb.9:
Lloh24:
	adrp	x8, _RFCSR50_TX0_EXT_PA@GOTPAGE
Lloh25:
	ldr	x8, [x8, _RFCSR50_TX0_EXT_PA@GOTPAGEOFF]
Lloh26:
	ldr	w1, [x8]
	add	x0, sp, #12
	mov	w2, #1
	bl	_rt2x00_set_field8
LBB0_10:
	mov	w24, #127
	mov	w25, #27
	cbz	w21, LBB0_12
; %bb.11:
Lloh27:
	adrp	x8, _RFCSR50_TX1_EXT_PA@GOTPAGE
Lloh28:
	ldr	x8, [x8, _RFCSR50_TX1_EXT_PA@GOTPAGEOFF]
Lloh29:
	ldr	w1, [x8]
	add	x0, sp, #12
	mov	w2, #1
	bl	_rt2x00_set_field8
	mov	w23, #82
	mov	w21, #192
	mov	w22, #192
	b	LBB0_13
LBB0_12:
	mov	w22, #0
	mov	w21, #27
	mov	w23, #127
LBB0_13:
	ldr	w2, [sp, #12]
	mov	x0, x19
	mov	w1, #50
	bl	_rt2800_rfcsr_write
	mov	w8, #82
	cmp	w20, #0
	csel	w2, w24, w8, eq
	mov	w9, #192
	csel	w20, wzr, w9, eq
	mov	w10, #210
	csel	w24, w8, w10, eq
	csel	w25, w25, w9, eq
	mov	w9, #73
	csel	w26, w8, w9, eq
	mov	x0, x19
	mov	w1, #51
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #52
	mov	x2, x20
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #53
	mov	x2, x24
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #54
	mov	x2, x25
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #55
	mov	x2, x23
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #56
	mov	x2, x22
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #57
	mov	x2, x26
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #58
	mov	x2, x21
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #59
	mov	w2, #0
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #60
	mov	w2, #0
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #61
	mov	w2, #0
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #62
	mov	w2, #0
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	mov	w1, #63
	mov	w2, #0
	bl	_rt2800_rfcsr_write
	mov	x0, x19
	bl	_rt2800_rx_filter_calibration
	mov	x0, x19
	bl	_rt2800_led_open_drain_enable
	mov	x0, x19
	bl	_rt2800_normal_mode_setup_3xxx
	ldp	x29, x30, [sp, #80]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #64]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #48]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #32]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #96
	ret
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.loh AdrpLdrGotLdr	Lloh27, Lloh28, Lloh29
	.cfi_endproc
                                        ; -- End function
	.comm	_CAPABILITY_EXTERNAL_PA_TX0,4,2 ; @CAPABILITY_EXTERNAL_PA_TX0
	.comm	_CAPABILITY_EXTERNAL_PA_TX1,4,2 ; @CAPABILITY_EXTERNAL_PA_TX1
	.comm	_RFCSR34_TX0_EXT_PA,4,2         ; @RFCSR34_TX0_EXT_PA
	.comm	_RFCSR34_TX1_EXT_PA,4,2         ; @RFCSR34_TX1_EXT_PA
	.comm	_RFCSR41_BIT1,4,2               ; @RFCSR41_BIT1
	.comm	_RFCSR41_BIT4,4,2               ; @RFCSR41_BIT4
	.comm	_RFCSR42_BIT1,4,2               ; @RFCSR42_BIT1
	.comm	_RFCSR42_BIT4,4,2               ; @RFCSR42_BIT4
	.comm	_RFCSR50_TX0_EXT_PA,4,2         ; @RFCSR50_TX0_EXT_PA
	.comm	_RFCSR50_TX1_EXT_PA,4,2         ; @RFCSR50_TX1_EXT_PA
	.no_dead_strip	_rt2800_init_rfcsr_3352
.subsections_via_symbols
