	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function tegra186_utmi_phy_init
_tegra186_utmi_phy_init:                ## @tegra186_utmi_phy_init
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	callq	_phy_get_drvdata
	movq	8(%rax), %rcx
	movq	(%rcx), %rdi
	movl	(%rax), %r15d
	movq	(%rdi), %r14
	movl	%r15d, %esi
	callq	_tegra_xusb_find_usb2_port
	testq	%rax, %rax
	je	LBB0_1
## %bb.2:
	movq	8(%rax), %rdi
	xorl	%ebx, %ebx
	testq	%rdi, %rdi
	je	LBB0_6
## %bb.3:
	movq	(%rax), %rax
	movq	_USB_DR_MODE_HOST@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jne	LBB0_6
## %bb.4:
	callq	_regulator_enable
	testl	%eax, %eax
	je	LBB0_6
## %bb.5:
	movl	%eax, %r12d
	leaq	L_.str.1(%rip), %rsi
	movq	%r14, %rdi
	movl	%r15d, %edx
	movl	%eax, %ecx
	xorl	%eax, %eax
	callq	_dev_err
	movl	%r12d, %ebx
	jmp	LBB0_6
LBB0_1:
	leaq	L_.str(%rip), %rsi
	xorl	%ebx, %ebx
	movq	%r14, %rdi
	movl	%r15d, %edx
	xorl	%eax, %eax
	callq	_dev_err
	movq	_ENODEV@GOTPCREL(%rip), %rax
	subl	(%rax), %ebx
LBB0_6:
	movl	%ebx, %eax
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"no port found for USB2 lane %u\n"

	.comm	_ENODEV,4,2                     ## @ENODEV
	.comm	_USB_DR_MODE_HOST,8,3           ## @USB_DR_MODE_HOST
L_.str.1:                               ## @.str.1
	.asciz	"failed to enable port %u VBUS: %d\n"

	.no_dead_strip	_tegra186_utmi_phy_init
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function tegra186_utmi_phy_init
_tegra186_utmi_phy_init:                ; @tegra186_utmi_phy_init
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #64
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	bl	_phy_get_drvdata
	ldr	x8, [x0, #8]
	ldr	x8, [x8]
	ldr	w19, [x0]
	ldr	x20, [x8]
	mov	x0, x8
	mov	x1, x19
	bl	_tegra_xusb_find_usb2_port
	cbz	x0, LBB0_6
; %bb.1:
	mov	x8, x0
	ldr	x0, [x0, #8]
	cbz	x0, LBB0_5
; %bb.2:
	ldr	x8, [x8]
Lloh0:
	adrp	x9, _USB_DR_MODE_HOST@GOTPAGE
Lloh1:
	ldr	x9, [x9, _USB_DR_MODE_HOST@GOTPAGEOFF]
Lloh2:
	ldr	x9, [x9]
	cmp	x8, x9
	b.ne	LBB0_5
; %bb.3:
	bl	_regulator_enable
	mov	x21, x0
	cbz	w0, LBB0_7
; %bb.4:
	str	x21, [sp]
Lloh3:
	adrp	x1, l_.str.1@PAGE
Lloh4:
	add	x1, x1, l_.str.1@PAGEOFF
	mov	x0, x20
	mov	x2, x19
	bl	_dev_err
	b	LBB0_7
LBB0_5:
	mov	w21, #0
	b	LBB0_7
LBB0_6:
Lloh5:
	adrp	x1, l_.str@PAGE
Lloh6:
	add	x1, x1, l_.str@PAGEOFF
	mov	x0, x20
	mov	x2, x19
	bl	_dev_err
Lloh7:
	adrp	x8, _ENODEV@GOTPAGE
Lloh8:
	ldr	x8, [x8, _ENODEV@GOTPAGEOFF]
Lloh9:
	ldr	w8, [x8]
	neg	w21, w8
LBB0_7:
	mov	x0, x21
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #64
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpAdd	Lloh3, Lloh4
	.loh AdrpLdrGotLdr	Lloh7, Lloh8, Lloh9
	.loh AdrpAdd	Lloh5, Lloh6
	.cfi_endproc
                                        ; -- End function
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"no port found for USB2 lane %u\n"

	.comm	_ENODEV,4,2                     ; @ENODEV
	.comm	_USB_DR_MODE_HOST,8,3           ; @USB_DR_MODE_HOST
l_.str.1:                               ; @.str.1
	.asciz	"failed to enable port %u VBUS: %d\n"

	.no_dead_strip	_tegra186_utmi_phy_init
.subsections_via_symbols
