	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function ixgbe_set_pcie_completion_timeout
_ixgbe_set_pcie_completion_timeout:     ## @ixgbe_set_pcie_completion_timeout
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %rbx
	movq	_IXGBE_GCR@GOTPCREL(%rip), %r15
	movl	(%r15), %esi
	callq	_IXGBE_READ_REG
	movl	%eax, %r14d
	movl	(%rbx), %edi
	callq	_ixgbe_removed
	testq	%rax, %rax
	je	LBB0_1
## %bb.6:
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_1:
	movq	_IXGBE_GCR_CMPL_TMOUT_MASK@GOTPCREL(%rip), %rax
	testl	%r14d, (%rax)
	jne	LBB0_5
## %bb.2:
	movq	_IXGBE_GCR_CAP_VER2@GOTPCREL(%rip), %rax
	testl	%r14d, (%rax)
	je	LBB0_3
## %bb.4:
	movq	_IXGBE_PCI_DEVICE_CONTROL2@GOTPCREL(%rip), %r12
	movl	(%r12), %esi
	movq	%rbx, %rdi
	callq	_ixgbe_read_pci_cfg_word
	movq	_IXGBE_PCI_DEVICE_CONTROL2_16ms@GOTPCREL(%rip), %rcx
	orl	(%rcx), %eax
	movl	(%r12), %esi
	movq	%rbx, %rdi
	movl	%eax, %edx
	callq	_ixgbe_write_pci_cfg_word
	jmp	LBB0_5
LBB0_3:
	movq	_IXGBE_GCR_CMPL_TMOUT_10ms@GOTPCREL(%rip), %rax
	orl	(%rax), %r14d
LBB0_5:
	movq	_IXGBE_GCR_CMPL_TMOUT_RESEND@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	notl	%edx
	andl	%r14d, %edx
	movl	(%r15), %esi
	movq	%rbx, %rdi
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_IXGBE_WRITE_REG                ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_IXGBE_GCR,4,2                  ## @IXGBE_GCR
	.comm	_IXGBE_GCR_CMPL_TMOUT_MASK,4,2  ## @IXGBE_GCR_CMPL_TMOUT_MASK
	.comm	_IXGBE_GCR_CAP_VER2,4,2         ## @IXGBE_GCR_CAP_VER2
	.comm	_IXGBE_GCR_CMPL_TMOUT_10ms,4,2  ## @IXGBE_GCR_CMPL_TMOUT_10ms
	.comm	_IXGBE_PCI_DEVICE_CONTROL2,4,2  ## @IXGBE_PCI_DEVICE_CONTROL2
	.comm	_IXGBE_PCI_DEVICE_CONTROL2_16ms,4,2 ## @IXGBE_PCI_DEVICE_CONTROL2_16ms
	.comm	_IXGBE_GCR_CMPL_TMOUT_RESEND,4,2 ## @IXGBE_GCR_CMPL_TMOUT_RESEND
	.no_dead_strip	_ixgbe_set_pcie_completion_timeout
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function ixgbe_set_pcie_completion_timeout
_ixgbe_set_pcie_completion_timeout:     ; @ixgbe_set_pcie_completion_timeout
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x0
Lloh0:
	adrp	x21, _IXGBE_GCR@GOTPAGE
Lloh1:
	ldr	x21, [x21, _IXGBE_GCR@GOTPAGEOFF]
	ldr	w1, [x21]
	bl	_IXGBE_READ_REG
	mov	x20, x0
	ldr	w0, [x19]
	bl	_ixgbe_removed
	cbz	x0, LBB0_2
; %bb.1:
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
LBB0_2:
Lloh2:
	adrp	x8, _IXGBE_GCR_CMPL_TMOUT_MASK@GOTPAGE
Lloh3:
	ldr	x8, [x8, _IXGBE_GCR_CMPL_TMOUT_MASK@GOTPAGEOFF]
Lloh4:
	ldr	w8, [x8]
	tst	w8, w20
	b.ne	LBB0_6
; %bb.3:
Lloh5:
	adrp	x8, _IXGBE_GCR_CAP_VER2@GOTPAGE
Lloh6:
	ldr	x8, [x8, _IXGBE_GCR_CAP_VER2@GOTPAGEOFF]
Lloh7:
	ldr	w8, [x8]
	tst	w8, w20
	b.eq	LBB0_5
; %bb.4:
Lloh8:
	adrp	x22, _IXGBE_PCI_DEVICE_CONTROL2@GOTPAGE
Lloh9:
	ldr	x22, [x22, _IXGBE_PCI_DEVICE_CONTROL2@GOTPAGEOFF]
	ldr	w1, [x22]
	mov	x0, x19
	bl	_ixgbe_read_pci_cfg_word
Lloh10:
	adrp	x8, _IXGBE_PCI_DEVICE_CONTROL2_16ms@GOTPAGE
Lloh11:
	ldr	x8, [x8, _IXGBE_PCI_DEVICE_CONTROL2_16ms@GOTPAGEOFF]
Lloh12:
	ldr	w8, [x8]
	orr	w2, w8, w0
	ldr	w1, [x22]
	mov	x0, x19
	bl	_ixgbe_write_pci_cfg_word
	b	LBB0_6
LBB0_5:
Lloh13:
	adrp	x8, _IXGBE_GCR_CMPL_TMOUT_10ms@GOTPAGE
Lloh14:
	ldr	x8, [x8, _IXGBE_GCR_CMPL_TMOUT_10ms@GOTPAGEOFF]
Lloh15:
	ldr	w8, [x8]
	orr	w20, w8, w20
LBB0_6:
Lloh16:
	adrp	x8, _IXGBE_GCR_CMPL_TMOUT_RESEND@GOTPAGE
Lloh17:
	ldr	x8, [x8, _IXGBE_GCR_CMPL_TMOUT_RESEND@GOTPAGEOFF]
Lloh18:
	ldr	w8, [x8]
	bic	w2, w20, w8
	ldr	w1, [x21]
	mov	x0, x19
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	_IXGBE_WRITE_REG
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh10, Lloh11, Lloh12
	.loh AdrpLdrGot	Lloh8, Lloh9
	.loh AdrpLdrGotLdr	Lloh13, Lloh14, Lloh15
	.loh AdrpLdrGotLdr	Lloh16, Lloh17, Lloh18
	.cfi_endproc
                                        ; -- End function
	.comm	_IXGBE_GCR,4,2                  ; @IXGBE_GCR
	.comm	_IXGBE_GCR_CMPL_TMOUT_MASK,4,2  ; @IXGBE_GCR_CMPL_TMOUT_MASK
	.comm	_IXGBE_GCR_CAP_VER2,4,2         ; @IXGBE_GCR_CAP_VER2
	.comm	_IXGBE_GCR_CMPL_TMOUT_10ms,4,2  ; @IXGBE_GCR_CMPL_TMOUT_10ms
	.comm	_IXGBE_PCI_DEVICE_CONTROL2,4,2  ; @IXGBE_PCI_DEVICE_CONTROL2
	.comm	_IXGBE_PCI_DEVICE_CONTROL2_16ms,4,2 ; @IXGBE_PCI_DEVICE_CONTROL2_16ms
	.comm	_IXGBE_GCR_CMPL_TMOUT_RESEND,4,2 ; @IXGBE_GCR_CMPL_TMOUT_RESEND
	.no_dead_strip	_ixgbe_set_pcie_completion_timeout
.subsections_via_symbols
