	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.section	__TEXT,__literal16,16byte_literals
	.p2align	4                               ## -- Begin function nixge_dma_err_handler
LCPI0_0:
	.space	16
	.section	__TEXT,__text,regular,pure_instructions
	.p2align	4, 0x90
_nixge_dma_err_handler:                 ## @nixge_dma_err_handler
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r15
	movq	_XAXIDMA_TX_CR_OFFSET@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	___nixge_device_reset
	movq	_XAXIDMA_RX_CR_OFFSET@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r15, %rdi
	callq	___nixge_device_reset
	movq	_TX_BD_NUM@GOTPCREL(%rip), %rax
	cmpq	$0, (%rax)
	je	LBB0_3
## %bb.1:
	xorl	%r12d, %r12d
	xorl	%ebx, %ebx
	xorl	%r13d, %r13d
	.p2align	4, 0x90
LBB0_2:                                 ## =>This Inner Loop Header: Depth=1
	movq	56(%r15), %rax
	movq	%rax, -48(%rbp)                 ## 8-byte Spill
	leaq	(%rax,%r12), %r14
	movq	48(%r15), %rsi
	addq	%rbx, %rsi
	movq	%r15, %rdi
	callq	_nixge_tx_skb_unmap
	movq	%r14, %rdi
	xorl	%esi, %esi
	callq	_nixge_hw_dma_bd_set_phys
	xorps	%xmm0, %xmm0
	movq	-48(%rbp), %rax                 ## 8-byte Reload
	movups	%xmm0, (%rax,%rbx,4)
	movq	%r14, %rdi
	xorl	%esi, %esi
	callq	_nixge_hw_dma_bd_set_offset
	movq	_TX_BD_NUM@GOTPCREL(%rip), %rax
	incq	%r13
	addq	$4, %rbx
	addq	$16, %r12
	cmpq	(%rax), %r13
	jb	LBB0_2
LBB0_3:
	movq	_RX_BD_NUM@GOTPCREL(%rip), %r14
	cmpq	$0, (%r14)
	je	LBB0_6
## %bb.4:
	movq	40(%r15), %rax
	xorl	%ecx, %ecx
	.p2align	4, 0x90
LBB0_5:                                 ## =>This Inner Loop Header: Depth=1
	movq	$0, (%rax)
	incq	%rcx
	addq	$16, %rax
	cmpq	(%r14), %rcx
	jb	LBB0_5
LBB0_6:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%r15)
	movq	$0, 32(%r15)
	movq	_XAXIDMA_RX_CR_OFFSET@GOTPCREL(%rip), %r12
	movl	(%r12), %esi
	movq	%r15, %rbx
	movq	%r15, %rdi
	callq	_nixge_dma_read_reg
	movq	_XAXIDMA_COALESCE_MASK@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rdx
	notq	%rdx
	andq	%rax, %rdx
	movq	_XAXIDMA_DFT_RX_THRESHOLD@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	movq	_XAXIDMA_COALESCE_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shlq	%cl, %rax
	orq	%rdx, %rax
	movq	_XAXIDMA_DELAY_MASK@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rsi
	notq	%rsi
	andq	%rax, %rsi
	movq	_XAXIDMA_DFT_RX_WAITBOUND@GOTPCREL(%rip), %rax
	movq	(%rax), %rdx
	movq	_XAXIDMA_DELAY_SHIFT@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	shlq	%cl, %rdx
	orq	%rsi, %rdx
	movq	_XAXIDMA_IRQ_ALL_MASK@GOTPCREL(%rip), %r15
	orq	(%r15), %rdx
	movl	(%r12), %esi
	movq	%rbx, %rdi
	callq	_nixge_dma_write_reg
	movq	_XAXIDMA_TX_CR_OFFSET@GOTPCREL(%rip), %r13
	movl	(%r13), %esi
	movq	%rbx, %rdi
	callq	_nixge_dma_read_reg
	movq	_XAXIDMA_COALESCE_MASK@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rdx
	movq	_XAXIDMA_COALESCE_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	movq	_XAXIDMA_DFT_TX_THRESHOLD@GOTPCREL(%rip), %rsi
	movq	(%rsi), %rsi
	shlq	%cl, %rsi
	notq	%rdx
	andq	%rax, %rdx
	orq	%rdx, %rsi
	movq	_XAXIDMA_DELAY_MASK@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	notq	%rax
	andq	%rsi, %rax
	movq	_XAXIDMA_DFT_TX_WAITBOUND@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rdx
	movq	_XAXIDMA_DELAY_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shlq	%cl, %rdx
	orq	%rax, %rdx
	orq	(%r15), %rdx
	movl	(%r13), %esi
	movq	%rbx, %rdi
	callq	_nixge_dma_write_reg
	movq	_XAXIDMA_RX_CDESC_OFFSET@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	8(%rbx), %rdx
	movq	%rbx, %rdi
	callq	_nixge_dma_write_desc_reg
	movl	(%r12), %esi
	movq	%rbx, %rdi
	callq	_nixge_dma_read_reg
	movl	(%r12), %esi
	movq	_XAXIDMA_CR_RUNSTOP_MASK@GOTPCREL(%rip), %r15
	orq	(%r15), %rax
	movq	%rbx, %rdi
	movq	%rax, %rdx
	callq	_nixge_dma_write_reg
	movq	_XAXIDMA_RX_TDESC_OFFSET@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	8(%rbx), %rax
	movq	(%r14), %rcx
	shlq	$4, %rcx
	leaq	(%rax,%rcx), %rdx
	addq	$-16, %rdx
	movq	%rbx, %rdi
	callq	_nixge_dma_write_desc_reg
	movq	_XAXIDMA_TX_CDESC_OFFSET@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	(%rbx), %rdx
	movq	%rbx, %rdi
	callq	_nixge_dma_write_desc_reg
	movl	(%r13), %esi
	movq	%rbx, %rdi
	callq	_nixge_dma_read_reg
	movl	(%r13), %esi
	orq	(%r15), %rax
	movq	%rbx, %rdi
	movq	%rax, %rdx
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_nixge_dma_write_reg            ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_XAXIDMA_TX_CR_OFFSET,4,2       ## @XAXIDMA_TX_CR_OFFSET
	.comm	_XAXIDMA_RX_CR_OFFSET,4,2       ## @XAXIDMA_RX_CR_OFFSET
	.comm	_TX_BD_NUM,8,3                  ## @TX_BD_NUM
	.comm	_RX_BD_NUM,8,3                  ## @RX_BD_NUM
	.comm	_XAXIDMA_COALESCE_MASK,8,3      ## @XAXIDMA_COALESCE_MASK
	.comm	_XAXIDMA_DFT_RX_THRESHOLD,8,3   ## @XAXIDMA_DFT_RX_THRESHOLD
	.comm	_XAXIDMA_COALESCE_SHIFT,8,3     ## @XAXIDMA_COALESCE_SHIFT
	.comm	_XAXIDMA_DELAY_MASK,8,3         ## @XAXIDMA_DELAY_MASK
	.comm	_XAXIDMA_DFT_RX_WAITBOUND,8,3   ## @XAXIDMA_DFT_RX_WAITBOUND
	.comm	_XAXIDMA_DELAY_SHIFT,8,3        ## @XAXIDMA_DELAY_SHIFT
	.comm	_XAXIDMA_IRQ_ALL_MASK,8,3       ## @XAXIDMA_IRQ_ALL_MASK
	.comm	_XAXIDMA_DFT_TX_THRESHOLD,8,3   ## @XAXIDMA_DFT_TX_THRESHOLD
	.comm	_XAXIDMA_DFT_TX_WAITBOUND,8,3   ## @XAXIDMA_DFT_TX_WAITBOUND
	.comm	_XAXIDMA_RX_CDESC_OFFSET,4,2    ## @XAXIDMA_RX_CDESC_OFFSET
	.comm	_XAXIDMA_CR_RUNSTOP_MASK,8,3    ## @XAXIDMA_CR_RUNSTOP_MASK
	.comm	_XAXIDMA_RX_TDESC_OFFSET,4,2    ## @XAXIDMA_RX_TDESC_OFFSET
	.comm	_XAXIDMA_TX_CDESC_OFFSET,4,2    ## @XAXIDMA_TX_CDESC_OFFSET
	.no_dead_strip	_nixge_dma_err_handler
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function nixge_dma_err_handler
_nixge_dma_err_handler:                 ; @nixge_dma_err_handler
	.cfi_startproc
; %bb.0:
	stp	x28, x27, [sp, #-96]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 96
	stp	x26, x25, [sp, #16]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #32]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #48]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #64]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #80]             ; 16-byte Folded Spill
	add	x29, sp, #80
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	mov	x19, x0
Lloh0:
	adrp	x21, _XAXIDMA_TX_CR_OFFSET@GOTPAGE
Lloh1:
	ldr	x21, [x21, _XAXIDMA_TX_CR_OFFSET@GOTPAGEOFF]
	ldr	w1, [x21]
	bl	___nixge_device_reset
Lloh2:
	adrp	x22, _XAXIDMA_RX_CR_OFFSET@GOTPAGE
Lloh3:
	ldr	x22, [x22, _XAXIDMA_RX_CR_OFFSET@GOTPAGEOFF]
	ldr	w1, [x22]
	mov	x0, x19
	bl	___nixge_device_reset
Lloh4:
	adrp	x23, _TX_BD_NUM@GOTPAGE
Lloh5:
	ldr	x23, [x23, _TX_BD_NUM@GOTPAGEOFF]
	ldr	x8, [x23]
	cbz	x8, LBB0_3
; %bb.1:
	mov	x24, #0
	mov	x25, #0
	mov	x26, #0
LBB0_2:                                 ; =>This Inner Loop Header: Depth=1
	ldp	x9, x8, [x19, #48]
	add	x20, x8, x24
	add	x1, x9, x25
	mov	x0, x19
	bl	_nixge_tx_skb_unmap
	mov	x0, x20
	mov	w1, #0
	bl	_nixge_hw_dma_bd_set_phys
	stp	xzr, xzr, [x20]
	mov	x0, x20
	mov	w1, #0
	bl	_nixge_hw_dma_bd_set_offset
	add	x26, x26, #1
	ldr	x8, [x23]
	add	x25, x25, #4
	add	x24, x24, #16
	cmp	x26, x8
	b.lo	LBB0_2
LBB0_3:
Lloh6:
	adrp	x20, _RX_BD_NUM@GOTPAGE
Lloh7:
	ldr	x20, [x20, _RX_BD_NUM@GOTPAGEOFF]
	ldr	x8, [x20]
	cbz	x8, LBB0_6
; %bb.4:
	mov	x8, #0
	ldr	x9, [x19, #40]
LBB0_5:                                 ; =>This Inner Loop Header: Depth=1
	str	xzr, [x9], #16
	add	x8, x8, #1
	ldr	x10, [x20]
	cmp	x8, x10
	b.lo	LBB0_5
LBB0_6:
	stp	xzr, xzr, [x19, #16]
	str	xzr, [x19, #32]
	ldr	w1, [x22]
	mov	x0, x19
	bl	_nixge_dma_read_reg
Lloh8:
	adrp	x23, _XAXIDMA_COALESCE_MASK@GOTPAGE
Lloh9:
	ldr	x23, [x23, _XAXIDMA_COALESCE_MASK@GOTPAGEOFF]
	ldr	x8, [x23]
Lloh10:
	adrp	x9, _XAXIDMA_DFT_RX_THRESHOLD@GOTPAGE
Lloh11:
	ldr	x9, [x9, _XAXIDMA_DFT_RX_THRESHOLD@GOTPAGEOFF]
	bic	x8, x0, x8
Lloh12:
	ldr	x9, [x9]
Lloh13:
	adrp	x24, _XAXIDMA_COALESCE_SHIFT@GOTPAGE
Lloh14:
	ldr	x24, [x24, _XAXIDMA_COALESCE_SHIFT@GOTPAGEOFF]
	ldr	x10, [x24]
	lsl	x9, x9, x10
	orr	x8, x9, x8
Lloh15:
	adrp	x25, _XAXIDMA_DELAY_MASK@GOTPAGE
Lloh16:
	ldr	x25, [x25, _XAXIDMA_DELAY_MASK@GOTPAGEOFF]
	ldr	x9, [x25]
Lloh17:
	adrp	x10, _XAXIDMA_DFT_RX_WAITBOUND@GOTPAGE
Lloh18:
	ldr	x10, [x10, _XAXIDMA_DFT_RX_WAITBOUND@GOTPAGEOFF]
	bic	x8, x8, x9
Lloh19:
	ldr	x9, [x10]
Lloh20:
	adrp	x26, _XAXIDMA_DELAY_SHIFT@GOTPAGE
Lloh21:
	ldr	x26, [x26, _XAXIDMA_DELAY_SHIFT@GOTPAGEOFF]
	ldr	x10, [x26]
	lsl	x9, x9, x10
	orr	x8, x9, x8
Lloh22:
	adrp	x27, _XAXIDMA_IRQ_ALL_MASK@GOTPAGE
Lloh23:
	ldr	x27, [x27, _XAXIDMA_IRQ_ALL_MASK@GOTPAGEOFF]
	ldr	x9, [x27]
	orr	x2, x8, x9
	ldr	w1, [x22]
	mov	x0, x19
	bl	_nixge_dma_write_reg
	ldr	w1, [x21]
	mov	x0, x19
	bl	_nixge_dma_read_reg
	ldr	x8, [x23]
	bic	x8, x0, x8
Lloh24:
	adrp	x9, _XAXIDMA_DFT_TX_THRESHOLD@GOTPAGE
Lloh25:
	ldr	x9, [x9, _XAXIDMA_DFT_TX_THRESHOLD@GOTPAGEOFF]
Lloh26:
	ldr	x9, [x9]
	ldr	x10, [x24]
	lsl	x9, x9, x10
	orr	x8, x9, x8
	ldr	x9, [x25]
	bic	x8, x8, x9
Lloh27:
	adrp	x9, _XAXIDMA_DFT_TX_WAITBOUND@GOTPAGE
Lloh28:
	ldr	x9, [x9, _XAXIDMA_DFT_TX_WAITBOUND@GOTPAGEOFF]
Lloh29:
	ldr	x9, [x9]
	ldr	x10, [x26]
	lsl	x9, x9, x10
	orr	x8, x9, x8
	ldr	x9, [x27]
	orr	x2, x8, x9
	ldr	w1, [x21]
	mov	x0, x19
	bl	_nixge_dma_write_reg
Lloh30:
	adrp	x8, _XAXIDMA_RX_CDESC_OFFSET@GOTPAGE
Lloh31:
	ldr	x8, [x8, _XAXIDMA_RX_CDESC_OFFSET@GOTPAGEOFF]
Lloh32:
	ldr	w1, [x8]
	ldr	x2, [x19, #8]
	mov	x0, x19
	bl	_nixge_dma_write_desc_reg
	ldr	w1, [x22]
	mov	x0, x19
	bl	_nixge_dma_read_reg
	ldr	w1, [x22]
Lloh33:
	adrp	x22, _XAXIDMA_CR_RUNSTOP_MASK@GOTPAGE
Lloh34:
	ldr	x22, [x22, _XAXIDMA_CR_RUNSTOP_MASK@GOTPAGEOFF]
	ldr	x8, [x22]
	orr	x2, x8, x0
	mov	x0, x19
	bl	_nixge_dma_write_reg
Lloh35:
	adrp	x8, _XAXIDMA_RX_TDESC_OFFSET@GOTPAGE
Lloh36:
	ldr	x8, [x8, _XAXIDMA_RX_TDESC_OFFSET@GOTPAGEOFF]
Lloh37:
	ldr	w1, [x8]
	ldr	x8, [x19, #8]
	ldr	x9, [x20]
	add	x8, x8, x9, lsl #4
	sub	x2, x8, #16
	mov	x0, x19
	bl	_nixge_dma_write_desc_reg
Lloh38:
	adrp	x8, _XAXIDMA_TX_CDESC_OFFSET@GOTPAGE
Lloh39:
	ldr	x8, [x8, _XAXIDMA_TX_CDESC_OFFSET@GOTPAGEOFF]
Lloh40:
	ldr	w1, [x8]
	ldr	x2, [x19]
	mov	x0, x19
	bl	_nixge_dma_write_desc_reg
	ldr	w1, [x21]
	mov	x0, x19
	bl	_nixge_dma_read_reg
	ldr	w1, [x21]
	ldr	x8, [x22]
	orr	x2, x8, x0
	mov	x0, x19
	ldp	x29, x30, [sp, #80]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #64]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #48]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #32]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #16]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp], #96             ; 16-byte Folded Reload
	b	_nixge_dma_write_reg
	.loh AdrpLdrGot	Lloh4, Lloh5
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGot	Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh38, Lloh39, Lloh40
	.loh AdrpLdrGotLdr	Lloh35, Lloh36, Lloh37
	.loh AdrpLdrGot	Lloh33, Lloh34
	.loh AdrpLdrGotLdr	Lloh30, Lloh31, Lloh32
	.loh AdrpLdrGotLdr	Lloh27, Lloh28, Lloh29
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.loh AdrpLdrGot	Lloh22, Lloh23
	.loh AdrpLdrGot	Lloh20, Lloh21
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh19
	.loh AdrpLdrGot	Lloh15, Lloh16
	.loh AdrpLdrGot	Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh10, Lloh11, Lloh12
	.loh AdrpLdrGot	Lloh8, Lloh9
	.cfi_endproc
                                        ; -- End function
	.comm	_XAXIDMA_TX_CR_OFFSET,4,2       ; @XAXIDMA_TX_CR_OFFSET
	.comm	_XAXIDMA_RX_CR_OFFSET,4,2       ; @XAXIDMA_RX_CR_OFFSET
	.comm	_TX_BD_NUM,8,3                  ; @TX_BD_NUM
	.comm	_RX_BD_NUM,8,3                  ; @RX_BD_NUM
	.comm	_XAXIDMA_COALESCE_MASK,8,3      ; @XAXIDMA_COALESCE_MASK
	.comm	_XAXIDMA_DFT_RX_THRESHOLD,8,3   ; @XAXIDMA_DFT_RX_THRESHOLD
	.comm	_XAXIDMA_COALESCE_SHIFT,8,3     ; @XAXIDMA_COALESCE_SHIFT
	.comm	_XAXIDMA_DELAY_MASK,8,3         ; @XAXIDMA_DELAY_MASK
	.comm	_XAXIDMA_DFT_RX_WAITBOUND,8,3   ; @XAXIDMA_DFT_RX_WAITBOUND
	.comm	_XAXIDMA_DELAY_SHIFT,8,3        ; @XAXIDMA_DELAY_SHIFT
	.comm	_XAXIDMA_IRQ_ALL_MASK,8,3       ; @XAXIDMA_IRQ_ALL_MASK
	.comm	_XAXIDMA_DFT_TX_THRESHOLD,8,3   ; @XAXIDMA_DFT_TX_THRESHOLD
	.comm	_XAXIDMA_DFT_TX_WAITBOUND,8,3   ; @XAXIDMA_DFT_TX_WAITBOUND
	.comm	_XAXIDMA_RX_CDESC_OFFSET,4,2    ; @XAXIDMA_RX_CDESC_OFFSET
	.comm	_XAXIDMA_CR_RUNSTOP_MASK,8,3    ; @XAXIDMA_CR_RUNSTOP_MASK
	.comm	_XAXIDMA_RX_TDESC_OFFSET,4,2    ; @XAXIDMA_RX_TDESC_OFFSET
	.comm	_XAXIDMA_TX_CDESC_OFFSET,4,2    ; @XAXIDMA_TX_CDESC_OFFSET
	.no_dead_strip	_nixge_dma_err_handler
.subsections_via_symbols
