	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function pci_setup_bridge_mmio_pref
_pci_setup_bridge_mmio_pref:            ## @pci_setup_bridge_mmio_pref
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$24, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r15
	movq	_PCI_PREF_LIMIT_UPPER32@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	xorl	%edx, %edx
	callq	_pci_write_config_dword
	movq	8(%r15), %r14
	movq	_PCI_BRIDGE_RESOURCES@GOTPCREL(%rip), %rax
	movslq	(%rax), %rbx
	leaq	(%r14,%rbx,4), %r12
	addq	$8, %r12
	movl	(%r15), %edi
	leaq	-56(%rbp), %rsi
	movq	%r12, %rdx
	callq	_pcibios_resource_to_bus
	movl	8(%r14,%rbx,4), %eax
	movq	_IORESOURCE_PREFETCH@GOTPCREL(%rip), %rcx
	testl	%eax, (%rcx)
	je	LBB0_1
## %bb.2:
	movl	-56(%rbp), %edi
	movl	%edi, %ebx
	shrl	$16, %ebx
	movl	$-1048576, %r14d                ## imm = 0xFFF00000
	andl	-52(%rbp), %r14d
	andl	$-16, %ebx
	movq	_IORESOURCE_MEM_64@GOTPCREL(%rip), %rcx
	testl	%eax, (%rcx)
	je	LBB0_3
## %bb.4:
	callq	_upper_32_bits
	movl	%eax, -44(%rbp)                 ## 4-byte Spill
	movl	-52(%rbp), %edi
	callq	_upper_32_bits
	movl	%eax, %r13d
	jmp	LBB0_5
LBB0_1:
	movl	$0, -44(%rbp)                   ## 4-byte Folded Spill
	movl	$65520, %ebx                    ## imm = 0xFFF0
	xorl	%r13d, %r13d
	jmp	LBB0_6
LBB0_3:
	movl	$0, -44(%rbp)                   ## 4-byte Folded Spill
	xorl	%r13d, %r13d
LBB0_5:
	orl	%r14d, %ebx
	leaq	L_.str(%rip), %rsi
	movq	%r15, %rdi
	movq	%r12, %rdx
	callq	_pci_info
LBB0_6:
	movq	_PCI_PREF_LIMIT_UPPER32@GOTPCREL(%rip), %r14
	movq	_PCI_PREF_MEMORY_BASE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r15, %rdi
	movl	%ebx, %edx
	callq	_pci_write_config_dword
	movq	_PCI_PREF_BASE_UPPER32@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r15, %rdi
	movl	-44(%rbp), %edx                 ## 4-byte Reload
	callq	_pci_write_config_dword
	movl	(%r14), %esi
	movq	%r15, %rdi
	movl	%r13d, %edx
	callq	_pci_write_config_dword
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_PCI_PREF_LIMIT_UPPER32,4,2     ## @PCI_PREF_LIMIT_UPPER32
	.comm	_PCI_BRIDGE_RESOURCES,4,2       ## @PCI_BRIDGE_RESOURCES
	.comm	_IORESOURCE_PREFETCH,4,2        ## @IORESOURCE_PREFETCH
	.comm	_IORESOURCE_MEM_64,4,2          ## @IORESOURCE_MEM_64
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"  bridge window %pR\n"

	.comm	_PCI_PREF_MEMORY_BASE,4,2       ## @PCI_PREF_MEMORY_BASE
	.comm	_PCI_PREF_BASE_UPPER32,4,2      ## @PCI_PREF_BASE_UPPER32
	.no_dead_strip	_pci_setup_bridge_mmio_pref
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function pci_setup_bridge_mmio_pref
_pci_setup_bridge_mmio_pref:            ; @pci_setup_bridge_mmio_pref
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #80
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x19, x0
Lloh0:
	adrp	x24, _PCI_PREF_LIMIT_UPPER32@GOTPAGE
Lloh1:
	ldr	x24, [x24, _PCI_PREF_LIMIT_UPPER32@GOTPAGEOFF]
	ldr	w1, [x24]
	mov	w2, #0
	bl	_pci_write_config_dword
	ldr	x8, [x19, #8]
Lloh2:
	adrp	x9, _PCI_BRIDGE_RESOURCES@GOTPAGE
Lloh3:
	ldr	x9, [x9, _PCI_BRIDGE_RESOURCES@GOTPAGEOFF]
Lloh4:
	ldrsw	x9, [x9]
	add	x21, x8, x9, lsl #2
	add	x20, x21, #8
	ldr	w0, [x19]
	add	x1, sp, #8
	mov	x2, x20
	bl	_pcibios_resource_to_bus
	ldr	w8, [x21, #8]
Lloh5:
	adrp	x9, _IORESOURCE_PREFETCH@GOTPAGE
Lloh6:
	ldr	x9, [x9, _IORESOURCE_PREFETCH@GOTPAGEOFF]
Lloh7:
	ldr	w9, [x9]
	tst	w9, w8
	b.eq	LBB0_3
; %bb.1:
	ldp	w0, w9, [sp, #8]
	lsr	w10, w0, #16
	and	w10, w10, #0xfff0
	and	w9, w9, #0xfff00000
	orr	w21, w10, w9
Lloh8:
	adrp	x9, _IORESOURCE_MEM_64@GOTPAGE
Lloh9:
	ldr	x9, [x9, _IORESOURCE_MEM_64@GOTPAGEOFF]
Lloh10:
	ldr	w9, [x9]
	tst	w9, w8
	b.eq	LBB0_4
; %bb.2:
	bl	_upper_32_bits
	mov	x22, x0
	ldr	w0, [sp, #12]
	bl	_upper_32_bits
	mov	x23, x0
	b	LBB0_5
LBB0_3:
	mov	w22, #0
	mov	w23, #0
	mov	w21, #65520
	b	LBB0_6
LBB0_4:
	mov	w22, #0
	mov	w23, #0
LBB0_5:
Lloh11:
	adrp	x1, l_.str@PAGE
Lloh12:
	add	x1, x1, l_.str@PAGEOFF
	mov	x0, x19
	mov	x2, x20
	bl	_pci_info
LBB0_6:
Lloh13:
	adrp	x8, _PCI_PREF_MEMORY_BASE@GOTPAGE
Lloh14:
	ldr	x8, [x8, _PCI_PREF_MEMORY_BASE@GOTPAGEOFF]
Lloh15:
	ldr	w1, [x8]
	mov	x0, x19
	mov	x2, x21
	bl	_pci_write_config_dword
Lloh16:
	adrp	x8, _PCI_PREF_BASE_UPPER32@GOTPAGE
Lloh17:
	ldr	x8, [x8, _PCI_PREF_BASE_UPPER32@GOTPAGEOFF]
Lloh18:
	ldr	w1, [x8]
	mov	x0, x19
	mov	x2, x22
	bl	_pci_write_config_dword
	ldr	w1, [x24]
	mov	x0, x19
	mov	x2, x23
	bl	_pci_write_config_dword
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #80
	ret
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpAdd	Lloh11, Lloh12
	.loh AdrpLdrGotLdr	Lloh16, Lloh17, Lloh18
	.loh AdrpLdrGotLdr	Lloh13, Lloh14, Lloh15
	.cfi_endproc
                                        ; -- End function
	.comm	_PCI_PREF_LIMIT_UPPER32,4,2     ; @PCI_PREF_LIMIT_UPPER32
	.comm	_PCI_BRIDGE_RESOURCES,4,2       ; @PCI_BRIDGE_RESOURCES
	.comm	_IORESOURCE_PREFETCH,4,2        ; @IORESOURCE_PREFETCH
	.comm	_IORESOURCE_MEM_64,4,2          ; @IORESOURCE_MEM_64
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"  bridge window %pR\n"

	.comm	_PCI_PREF_MEMORY_BASE,4,2       ; @PCI_PREF_MEMORY_BASE
	.comm	_PCI_PREF_BASE_UPPER32,4,2      ; @PCI_PREF_BASE_UPPER32
	.no_dead_strip	_pci_setup_bridge_mmio_pref
.subsections_via_symbols
