	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function sh_eth_tsu_disable_cam_entry_post
_sh_eth_tsu_disable_cam_entry_post:     ## @sh_eth_tsu_disable_cam_entry_post
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%esi, %r15d
	callq	_netdev_priv
	movq	%rax, %r14
	leal	7(%r15), %r13d
	testl	%r15d, %r15d
	cmovnsl	%r15d, %r13d
	movq	_TSU_POST1@GOTPCREL(%rip), %rax
	sarl	$3, %r13d
	addl	(%rax), %r13d
	movl	%r15d, %edi
	callq	_sh_eth_tsu_get_post_mask
	movl	%eax, %r12d
	movq	%r14, %rdi
	movl	%r15d, %esi
	callq	_sh_eth_tsu_get_post_bit
	movl	%eax, %r15d
	notl	%r12d
	movq	%r14, %rdi
	movl	%r13d, %esi
	callq	_sh_eth_tsu_read
	movl	%eax, %ebx
	andl	%r12d, %ebx
	movq	%r14, %rdi
	movl	%ebx, %esi
	movl	%r13d, %edx
	callq	_sh_eth_tsu_write
	andl	%r15d, %ebx
	movl	%ebx, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_TSU_POST1,4,2                  ## @TSU_POST1
	.no_dead_strip	_sh_eth_tsu_disable_cam_entry_post
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function sh_eth_tsu_disable_cam_entry_post
_sh_eth_tsu_disable_cam_entry_post:     ; @sh_eth_tsu_disable_cam_entry_post
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x1
	bl	_netdev_priv
	mov	x20, x0
Lloh0:
	adrp	x8, _TSU_POST1@GOTPAGE
Lloh1:
	ldr	x8, [x8, _TSU_POST1@GOTPAGEOFF]
Lloh2:
	ldr	w8, [x8]
	add	w9, w19, #7
	cmp	w19, #0
	csel	w9, w9, w19, lt
	add	w21, w8, w9, asr #3
	mov	x0, x19
	bl	_sh_eth_tsu_get_post_mask
	mov	x22, x0
	mov	x0, x20
	mov	x1, x19
	bl	_sh_eth_tsu_get_post_bit
	mov	x19, x0
	mov	x0, x20
	mov	x1, x21
	bl	_sh_eth_tsu_read
	bic	w22, w0, w22
	mov	x0, x20
	mov	x1, x22
	mov	x2, x21
	bl	_sh_eth_tsu_write
	and	w0, w22, w19
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_TSU_POST1,4,2                  ; @TSU_POST1
	.no_dead_strip	_sh_eth_tsu_disable_cam_entry_post
.subsections_via_symbols
