	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function rockchip_pcie_set_power_limit
_rockchip_pcie_set_power_limit:         ## @rockchip_pcie_set_power_limit
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r14
	movl	4(%rdi), %edi
	callq	_IS_ERR
	testq	%rax, %rax
	je	LBB0_1
LBB0_7:
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_1:
	movl	4(%r14), %edi
	callq	_regulator_get_current_limit
	testl	%eax, %eax
	jle	LBB0_7
## %bb.2:
	movl	%eax, %eax
	imulq	$274877907, %rax, %rax          ## imm = 0x10624DD3
	shrq	$38, %rax
	imull	$3300, %eax, %ecx               ## imm = 0xCE4
	imulq	$274877907, %rcx, %rbx          ## imm = 0x10624DD3
	shrq	$38, %rbx
	movq	_PCIE_RC_CONFIG_DCR_CSPL_LIMIT@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	$3, %r15d
	cmpl	%eax, %ebx
	jle	LBB0_6
## %bb.3:
	movl	%ecx, %edx
	movl	$3518437209, %ebx               ## imm = 0xD1B71759
	imulq	%rdx, %rbx
	shrq	$45, %rbx
	movl	$2, %r15d
	cmpl	%eax, %ebx
	jle	LBB0_6
## %bb.4:
	shrl	$5, %ecx
	imulq	$175921861, %rcx, %rbx          ## imm = 0xA7C5AC5
	shrq	$39, %rbx
	movl	$1, %r15d
	cmpl	%eax, %ebx
	jle	LBB0_6
## %bb.5:
	imulq	$1125899907, %rdx, %rbx         ## imm = 0x431BDE83
	shrq	$50, %rbx
	xorl	%r15d, %r15d
	cmpl	%eax, %ebx
	jle	LBB0_6
## %bb.8:
	movl	(%r14), %edi
	leaq	L_.str(%rip), %rsi
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_dev_warn                       ## TAILCALL
LBB0_6:
	movq	_PCIE_RC_CONFIG_DCR@GOTPCREL(%rip), %r12
	movl	(%r12), %esi
	movq	%r14, %rdi
	callq	_rockchip_pcie_read
	movq	_PCIE_RC_CONFIG_DCR_CSPL_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shll	%cl, %ebx
	movq	_PCIE_RC_CONFIG_DCR_CPLS_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shll	%cl, %r15d
	orl	%eax, %r15d
	orl	%ebx, %r15d
	movl	(%r12), %edx
	movq	%r14, %rdi
	movl	%r15d, %esi
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_rockchip_pcie_write            ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_PCIE_RC_CONFIG_DCR_CSPL_LIMIT,4,2 ## @PCIE_RC_CONFIG_DCR_CSPL_LIMIT
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"invalid power supply\n"

	.comm	_PCIE_RC_CONFIG_DCR,4,2         ## @PCIE_RC_CONFIG_DCR
	.comm	_PCIE_RC_CONFIG_DCR_CSPL_SHIFT,4,2 ## @PCIE_RC_CONFIG_DCR_CSPL_SHIFT
	.comm	_PCIE_RC_CONFIG_DCR_CPLS_SHIFT,4,2 ## @PCIE_RC_CONFIG_DCR_CPLS_SHIFT
	.no_dead_strip	_rockchip_pcie_set_power_limit
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function rockchip_pcie_set_power_limit
_rockchip_pcie_set_power_limit:         ; @rockchip_pcie_set_power_limit
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x0
	ldr	w0, [x0, #4]
	bl	_IS_ERR
	cbz	x0, LBB0_2
LBB0_1:
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
LBB0_2:
	ldr	w0, [x19, #4]
	bl	_regulator_get_current_limit
	cmp	w0, #1
	b.lt	LBB0_1
; %bb.3:
	mov	w9, #19923
	movk	w9, #4194, lsl #16
	umull	x8, w0, w9
	lsr	x8, x8, #38
	mov	w10, #3300
	mul	w8, w8, w10
	umull	x9, w8, w9
	lsr	x20, x9, #38
Lloh0:
	adrp	x9, _PCIE_RC_CONFIG_DCR_CSPL_LIMIT@GOTPAGE
Lloh1:
	ldr	x9, [x9, _PCIE_RC_CONFIG_DCR_CSPL_LIMIT@GOTPAGEOFF]
Lloh2:
	ldr	w9, [x9]
	cmp	w20, w9
	b.le	LBB0_8
; %bb.4:
	mov	w10, #5977
	movk	w10, #53687, lsl #16
	umull	x10, w8, w10
	lsr	x20, x10, #45
                                        ; kill: def $w20 killed $w20 killed $x20 def $x20
	cmp	w20, w9
	b.le	LBB0_9
; %bb.5:
	lsr	w10, w8, #5
	mov	w11, #23237
	movk	w11, #2684, lsl #16
	umull	x10, w10, w11
	lsr	x20, x10, #39
                                        ; kill: def $w20 killed $w20 killed $x20 def $x20
	cmp	w20, w9
	b.le	LBB0_10
; %bb.6:
	mov	w10, #56963
	movk	w10, #17179, lsl #16
	umull	x8, w8, w10
	lsr	x20, x8, #50
                                        ; kill: def $w20 killed $w20 killed $x20 def $x20
	cmp	w20, w9
	b.le	LBB0_11
; %bb.7:
	ldr	w0, [x19]
Lloh3:
	adrp	x1, l_.str@PAGE
Lloh4:
	add	x1, x1, l_.str@PAGEOFF
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	_dev_warn
LBB0_8:
	mov	w21, #3
	b	LBB0_12
LBB0_9:
	mov	w21, #2
	b	LBB0_12
LBB0_10:
	mov	w21, #1
	b	LBB0_12
LBB0_11:
	mov	w21, #0
LBB0_12:
Lloh5:
	adrp	x22, _PCIE_RC_CONFIG_DCR@GOTPAGE
Lloh6:
	ldr	x22, [x22, _PCIE_RC_CONFIG_DCR@GOTPAGEOFF]
	ldr	w1, [x22]
	mov	x0, x19
	bl	_rockchip_pcie_read
Lloh7:
	adrp	x8, _PCIE_RC_CONFIG_DCR_CSPL_SHIFT@GOTPAGE
Lloh8:
	ldr	x8, [x8, _PCIE_RC_CONFIG_DCR_CSPL_SHIFT@GOTPAGEOFF]
Lloh9:
	ldr	w8, [x8]
	lsl	w8, w20, w8
Lloh10:
	adrp	x9, _PCIE_RC_CONFIG_DCR_CPLS_SHIFT@GOTPAGE
Lloh11:
	ldr	x9, [x9, _PCIE_RC_CONFIG_DCR_CPLS_SHIFT@GOTPAGEOFF]
Lloh12:
	ldr	w9, [x9]
	lsl	w9, w21, w9
	orr	w8, w8, w0
	orr	w1, w8, w9
	ldr	w2, [x22]
	mov	x0, x19
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	_rockchip_pcie_write
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpAdd	Lloh3, Lloh4
	.loh AdrpLdrGotLdr	Lloh10, Lloh11, Lloh12
	.loh AdrpLdrGotLdr	Lloh7, Lloh8, Lloh9
	.loh AdrpLdrGot	Lloh5, Lloh6
	.cfi_endproc
                                        ; -- End function
	.comm	_PCIE_RC_CONFIG_DCR_CSPL_LIMIT,4,2 ; @PCIE_RC_CONFIG_DCR_CSPL_LIMIT
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"invalid power supply\n"

	.comm	_PCIE_RC_CONFIG_DCR,4,2         ; @PCIE_RC_CONFIG_DCR
	.comm	_PCIE_RC_CONFIG_DCR_CSPL_SHIFT,4,2 ; @PCIE_RC_CONFIG_DCR_CSPL_SHIFT
	.comm	_PCIE_RC_CONFIG_DCR_CPLS_SHIFT,4,2 ; @PCIE_RC_CONFIG_DCR_CPLS_SHIFT
	.no_dead_strip	_rockchip_pcie_set_power_limit
.subsections_via_symbols
