	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_iwl_pcie_gen2_apm_init         ## -- Begin function iwl_pcie_gen2_apm_init
	.p2align	4, 0x90
_iwl_pcie_gen2_apm_init:                ## @iwl_pcie_gen2_apm_init
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -24
	movq	%rdi, %rbx
	leaq	L_.str(%rip), %rsi
	callq	_IWL_DEBUG_INFO
	movq	_CSR_GIO_CHICKEN_BITS@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_CSR_GIO_CHICKEN_BITS_REG_BIT_L1A_NO_L0S_RX@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	callq	_iwl_set_bit
	movq	_CSR_DBG_HPET_MEM_REG@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_CSR_DBG_HPET_MEM_REG_VAL@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	callq	_iwl_set_bit
	movq	_CSR_HW_IF_CONFIG_REG@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_CSR_HW_IF_CONFIG_REG_BIT_HAP_WAKE_L1A@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	callq	_iwl_set_bit
	movq	%rbx, %rdi
	callq	_iwl_pcie_apm_config
	movq	8(%rbx), %rsi
	movq	(%rsi), %rax
	movq	_IWL_DEVICE_FAMILY_22000@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jne	LBB0_4
## %bb.1:
	movq	16(%rbx), %rax
	cmpq	$0, (%rax)
	je	LBB0_4
## %bb.2:
	movq	%rbx, %rdi
	callq	_iwl_pcie_gen2_force_power_gating
	testl	%eax, %eax
	jne	LBB0_6
## %bb.3:
	movq	8(%rbx), %rsi
LBB0_4:
	movq	%rbx, %rdi
	callq	_iwl_finish_nic_init
	testl	%eax, %eax
	jne	LBB0_6
## %bb.5:
	movq	_STATUS_DEVICE_ENABLED@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	%rbx, %rsi
	callq	_set_bit
	xorl	%eax, %eax
LBB0_6:
	addq	$8, %rsp
	popq	%rbx
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"Init card's basic functions\n"

	.comm	_CSR_GIO_CHICKEN_BITS,4,2       ## @CSR_GIO_CHICKEN_BITS
	.comm	_CSR_GIO_CHICKEN_BITS_REG_BIT_L1A_NO_L0S_RX,4,2 ## @CSR_GIO_CHICKEN_BITS_REG_BIT_L1A_NO_L0S_RX
	.comm	_CSR_DBG_HPET_MEM_REG,4,2       ## @CSR_DBG_HPET_MEM_REG
	.comm	_CSR_DBG_HPET_MEM_REG_VAL,4,2   ## @CSR_DBG_HPET_MEM_REG_VAL
	.comm	_CSR_HW_IF_CONFIG_REG,4,2       ## @CSR_HW_IF_CONFIG_REG
	.comm	_CSR_HW_IF_CONFIG_REG_BIT_HAP_WAKE_L1A,4,2 ## @CSR_HW_IF_CONFIG_REG_BIT_HAP_WAKE_L1A
	.comm	_IWL_DEVICE_FAMILY_22000,8,3    ## @IWL_DEVICE_FAMILY_22000
	.comm	_STATUS_DEVICE_ENABLED,4,2      ## @STATUS_DEVICE_ENABLED
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_iwl_pcie_gen2_apm_init         ; -- Begin function iwl_pcie_gen2_apm_init
	.p2align	2
_iwl_pcie_gen2_apm_init:                ; @iwl_pcie_gen2_apm_init
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x19, x0
Lloh0:
	adrp	x1, l_.str@PAGE
Lloh1:
	add	x1, x1, l_.str@PAGEOFF
	bl	_IWL_DEBUG_INFO
Lloh2:
	adrp	x8, _CSR_GIO_CHICKEN_BITS@GOTPAGE
Lloh3:
	ldr	x8, [x8, _CSR_GIO_CHICKEN_BITS@GOTPAGEOFF]
Lloh4:
	ldr	w1, [x8]
Lloh5:
	adrp	x8, _CSR_GIO_CHICKEN_BITS_REG_BIT_L1A_NO_L0S_RX@GOTPAGE
Lloh6:
	ldr	x8, [x8, _CSR_GIO_CHICKEN_BITS_REG_BIT_L1A_NO_L0S_RX@GOTPAGEOFF]
Lloh7:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_iwl_set_bit
Lloh8:
	adrp	x8, _CSR_DBG_HPET_MEM_REG@GOTPAGE
Lloh9:
	ldr	x8, [x8, _CSR_DBG_HPET_MEM_REG@GOTPAGEOFF]
Lloh10:
	ldr	w1, [x8]
Lloh11:
	adrp	x8, _CSR_DBG_HPET_MEM_REG_VAL@GOTPAGE
Lloh12:
	ldr	x8, [x8, _CSR_DBG_HPET_MEM_REG_VAL@GOTPAGEOFF]
Lloh13:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_iwl_set_bit
Lloh14:
	adrp	x8, _CSR_HW_IF_CONFIG_REG@GOTPAGE
Lloh15:
	ldr	x8, [x8, _CSR_HW_IF_CONFIG_REG@GOTPAGEOFF]
Lloh16:
	ldr	w1, [x8]
Lloh17:
	adrp	x8, _CSR_HW_IF_CONFIG_REG_BIT_HAP_WAKE_L1A@GOTPAGE
Lloh18:
	ldr	x8, [x8, _CSR_HW_IF_CONFIG_REG_BIT_HAP_WAKE_L1A@GOTPAGEOFF]
Lloh19:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_iwl_set_bit
	mov	x0, x19
	bl	_iwl_pcie_apm_config
	ldr	x1, [x19, #8]
	ldr	x8, [x1]
Lloh20:
	adrp	x9, _IWL_DEVICE_FAMILY_22000@GOTPAGE
Lloh21:
	ldr	x9, [x9, _IWL_DEVICE_FAMILY_22000@GOTPAGEOFF]
Lloh22:
	ldr	x9, [x9]
	cmp	x8, x9
	b.ne	LBB0_4
; %bb.1:
	ldr	x8, [x19, #16]
	ldr	x8, [x8]
	cbz	x8, LBB0_4
; %bb.2:
	mov	x0, x19
	bl	_iwl_pcie_gen2_force_power_gating
	cbnz	w0, LBB0_6
; %bb.3:
	ldr	x1, [x19, #8]
LBB0_4:
	mov	x0, x19
	bl	_iwl_finish_nic_init
	cbnz	w0, LBB0_6
; %bb.5:
Lloh23:
	adrp	x8, _STATUS_DEVICE_ENABLED@GOTPAGE
Lloh24:
	ldr	x8, [x8, _STATUS_DEVICE_ENABLED@GOTPAGEOFF]
Lloh25:
	ldr	w0, [x8]
	mov	x1, x19
	bl	_set_bit
	mov	w0, #0
LBB0_6:
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh20, Lloh21, Lloh22
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh19
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh16
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpAdd	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh23, Lloh24, Lloh25
	.cfi_endproc
                                        ; -- End function
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"Init card's basic functions\n"

	.comm	_CSR_GIO_CHICKEN_BITS,4,2       ; @CSR_GIO_CHICKEN_BITS
	.comm	_CSR_GIO_CHICKEN_BITS_REG_BIT_L1A_NO_L0S_RX,4,2 ; @CSR_GIO_CHICKEN_BITS_REG_BIT_L1A_NO_L0S_RX
	.comm	_CSR_DBG_HPET_MEM_REG,4,2       ; @CSR_DBG_HPET_MEM_REG
	.comm	_CSR_DBG_HPET_MEM_REG_VAL,4,2   ; @CSR_DBG_HPET_MEM_REG_VAL
	.comm	_CSR_HW_IF_CONFIG_REG,4,2       ; @CSR_HW_IF_CONFIG_REG
	.comm	_CSR_HW_IF_CONFIG_REG_BIT_HAP_WAKE_L1A,4,2 ; @CSR_HW_IF_CONFIG_REG_BIT_HAP_WAKE_L1A
	.comm	_IWL_DEVICE_FAMILY_22000,8,3    ; @IWL_DEVICE_FAMILY_22000
	.comm	_STATUS_DEVICE_ENABLED,4,2      ; @STATUS_DEVICE_ENABLED
.subsections_via_symbols
