	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_mlx4_update_qp                 ## -- Begin function mlx4_update_qp
	.p2align	4, 0x90
_mlx4_update_qp:                        ## @mlx4_update_qp
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$40, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	testl	%edx, %edx
	je	LBB0_2
## %bb.1:
	movl	%edx, %ebx
	movq	_MLX4_UPDATE_QP_SUPPORTED_ATTRS@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	notl	%eax
	testl	%edx, %eax
	je	LBB0_3
LBB0_2:
	movq	_EINVAL@GOTPCREL(%rip), %rax
	xorl	%ebx, %ebx
	subl	(%rax), %ebx
LBB0_24:
	movl	%ebx, %eax
	addq	$40, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_3:
	movq	%rcx, %r13
	movl	%esi, %r15d
	movq	%rdi, %r12
	callq	_mlx4_alloc_cmd_mailbox
	movq	%rax, %r14
	movq	%rax, %rdi
	callq	_IS_ERR
	testq	%rax, %rax
	je	LBB0_4
## %bb.25:
	movq	%r14, %rdi
	addq	$40, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_PTR_ERR                        ## TAILCALL
LBB0_4:
	movq	8(%r14), %rdx
	movq	_MLX4_UPDATE_QP_SMAC@GOTPCREL(%rip), %rax
	testl	%ebx, (%rax)
	je	LBB0_5
## %bb.6:
	movq	_MLX4_UPD_QP_PATH_MASK_MAC_INDEX@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	movl	$1, %edi
	shlq	%cl, %rdi
	movl	16(%r13), %eax
	movl	%eax, 32(%rdx)
	jmp	LBB0_7
LBB0_5:
	xorl	%edi, %edi
LBB0_7:
	movq	_MLX4_UPDATE_QP_ETH_SRC_CHECK_MC_LB@GOTPCREL(%rip), %rax
	testl	%ebx, (%rax)
	je	LBB0_12
## %bb.8:
	movq	_MLX4_DEV_CAP_FLAG2_UPDATE_QP_SRC_CHECK_LB@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	testl	%eax, (%r12)
	je	LBB0_9
## %bb.10:
	movq	_MLX4_UPD_QP_PATH_MASK_ETH_SRC_CHECK_MC_LB@GOTPCREL(%rip), %rax
	movb	(%rax), %al
	btsq	%rax, %rdi
	movq	_MLX4_UPDATE_QP_PARAMS_FLAGS_ETH_CHECK_MC_LB@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	testl	%eax, (%r13)
	je	LBB0_12
## %bb.11:
	movq	_MLX4_FL_ETH_SRC_CHECK_MC_LB@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	orl	%eax, 28(%rdx)
LBB0_12:
	movq	_MLX4_UPDATE_QP_VSD@GOTPCREL(%rip), %rax
	testl	%ebx, (%rax)
	movq	%r14, -48(%rbp)                 ## 8-byte Spill
	movq	%rdx, -64(%rbp)                 ## 8-byte Spill
	movq	%rdi, -56(%rbp)                 ## 8-byte Spill
	je	LBB0_13
## %bb.14:
	movq	_MLX4_UPD_QP_MASK_VSD@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	movl	$1, %r14d
	shlq	%cl, %r14
	movq	_MLX4_UPDATE_QP_PARAMS_FLAGS_VSD_ENABLE@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	testl	%eax, (%r13)
	je	LBB0_16
## %bb.15:
	movq	_MLX4_STRIP_VLAN@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_cpu_to_be32
	movq	-56(%rbp), %rdi                 ## 8-byte Reload
	movq	-64(%rbp), %rdx                 ## 8-byte Reload
	orl	%eax, 24(%rdx)
	jmp	LBB0_16
LBB0_13:
	xorl	%r14d, %r14d
LBB0_16:
	movq	_MLX4_UPDATE_QP_RATE_LIMIT@GOTPCREL(%rip), %rax
	testl	%ebx, (%rax)
	je	LBB0_18
## %bb.17:
	movq	_MLX4_UPD_QP_MASK_RATE_LIMIT@GOTPCREL(%rip), %rax
	movb	(%rax), %al
	btsq	%rax, %r14
	movl	4(%r13), %edi
	shll	$14, %edi
	orl	8(%r13), %edi
	callq	_cpu_to_be16
	movq	-56(%rbp), %rdi                 ## 8-byte Reload
	movq	-64(%rbp), %rdx                 ## 8-byte Reload
	movl	%eax, 20(%rdx)
LBB0_18:
	movq	_MLX4_UPDATE_QP_QOS_VPORT@GOTPCREL(%rip), %rax
	testl	%ebx, (%rax)
	je	LBB0_22
## %bb.19:
	movq	_MLX4_DEV_CAP_FLAG2_QOS_VPP@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	testl	%eax, (%r12)
	je	LBB0_20
## %bb.21:
	movq	_MLX4_UPD_QP_MASK_QOS_VPP@GOTPCREL(%rip), %rax
	movb	(%rax), %al
	btsq	%rax, %r14
	movl	12(%r13), %eax
	movl	%eax, 16(%rdx)
LBB0_22:
	movq	%rdx, %rbx
	callq	_cpu_to_be64
	movq	%rax, 8(%rbx)
	movq	%r14, %rdi
	callq	_cpu_to_be64
	movq	%rax, (%rbx)
	movq	-48(%rbp), %r14                 ## 8-byte Reload
	movl	(%r14), %esi
	andl	$16777215, %r15d                ## imm = 0xFFFFFF
	movq	_MLX4_CMD_UPDATE_QP@GOTPCREL(%rip), %rax
	movl	(%rax), %r8d
	movq	_MLX4_CMD_TIME_CLASS_A@GOTPCREL(%rip), %rax
	movl	(%rax), %r9d
	movq	_MLX4_CMD_NATIVE@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, (%rsp)
	movq	%r12, %rdi
	movl	%r15d, %edx
	xorl	%ecx, %ecx
	callq	_mlx4_cmd
	movl	%eax, %ebx
	jmp	LBB0_23
LBB0_9:
	leaq	L_.str(%rip), %rsi
	movq	%r12, %rdi
	callq	_mlx4_warn
	movq	_EOPNOTSUPP@GOTPCREL(%rip), %rax
	xorl	%ebx, %ebx
	subl	(%rax), %ebx
	jmp	LBB0_23
LBB0_20:
	leaq	L_.str.1(%rip), %rsi
	movq	%r12, %rdi
	callq	_mlx4_warn
	movq	_EOPNOTSUPP@GOTPCREL(%rip), %rax
	xorl	%ebx, %ebx
	subl	(%rax), %ebx
	movq	-48(%rbp), %r14                 ## 8-byte Reload
LBB0_23:
	movq	%r12, %rdi
	movq	%r14, %rsi
	callq	_mlx4_free_cmd_mailbox
	jmp	LBB0_24
	.cfi_endproc
                                        ## -- End function
	.comm	_MLX4_UPDATE_QP_SUPPORTED_ATTRS,4,2 ## @MLX4_UPDATE_QP_SUPPORTED_ATTRS
	.comm	_EINVAL,4,2                     ## @EINVAL
	.comm	_MLX4_UPDATE_QP_SMAC,4,2        ## @MLX4_UPDATE_QP_SMAC
	.comm	_MLX4_UPD_QP_PATH_MASK_MAC_INDEX,8,3 ## @MLX4_UPD_QP_PATH_MASK_MAC_INDEX
	.comm	_MLX4_UPDATE_QP_ETH_SRC_CHECK_MC_LB,4,2 ## @MLX4_UPDATE_QP_ETH_SRC_CHECK_MC_LB
	.comm	_MLX4_DEV_CAP_FLAG2_UPDATE_QP_SRC_CHECK_LB,4,2 ## @MLX4_DEV_CAP_FLAG2_UPDATE_QP_SRC_CHECK_LB
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"Trying to set src check LB, but it isn't supported\n"

	.comm	_EOPNOTSUPP,4,2                 ## @EOPNOTSUPP
	.comm	_MLX4_UPD_QP_PATH_MASK_ETH_SRC_CHECK_MC_LB,8,3 ## @MLX4_UPD_QP_PATH_MASK_ETH_SRC_CHECK_MC_LB
	.comm	_MLX4_UPDATE_QP_PARAMS_FLAGS_ETH_CHECK_MC_LB,4,2 ## @MLX4_UPDATE_QP_PARAMS_FLAGS_ETH_CHECK_MC_LB
	.comm	_MLX4_FL_ETH_SRC_CHECK_MC_LB,4,2 ## @MLX4_FL_ETH_SRC_CHECK_MC_LB
	.comm	_MLX4_UPDATE_QP_VSD,4,2         ## @MLX4_UPDATE_QP_VSD
	.comm	_MLX4_UPD_QP_MASK_VSD,8,3       ## @MLX4_UPD_QP_MASK_VSD
	.comm	_MLX4_UPDATE_QP_PARAMS_FLAGS_VSD_ENABLE,4,2 ## @MLX4_UPDATE_QP_PARAMS_FLAGS_VSD_ENABLE
	.comm	_MLX4_STRIP_VLAN,4,2            ## @MLX4_STRIP_VLAN
	.comm	_MLX4_UPDATE_QP_RATE_LIMIT,4,2  ## @MLX4_UPDATE_QP_RATE_LIMIT
	.comm	_MLX4_UPD_QP_MASK_RATE_LIMIT,8,3 ## @MLX4_UPD_QP_MASK_RATE_LIMIT
	.comm	_MLX4_UPDATE_QP_QOS_VPORT,4,2   ## @MLX4_UPDATE_QP_QOS_VPORT
	.comm	_MLX4_DEV_CAP_FLAG2_QOS_VPP,4,2 ## @MLX4_DEV_CAP_FLAG2_QOS_VPP
L_.str.1:                               ## @.str.1
	.asciz	"Granular QoS per VF is not enabled\n"

	.comm	_MLX4_UPD_QP_MASK_QOS_VPP,8,3   ## @MLX4_UPD_QP_MASK_QOS_VPP
	.comm	_MLX4_CMD_UPDATE_QP,4,2         ## @MLX4_CMD_UPDATE_QP
	.comm	_MLX4_CMD_TIME_CLASS_A,4,2      ## @MLX4_CMD_TIME_CLASS_A
	.comm	_MLX4_CMD_NATIVE,4,2            ## @MLX4_CMD_NATIVE
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_mlx4_update_qp                 ; -- Begin function mlx4_update_qp
	.p2align	2
_mlx4_update_qp:                        ; @mlx4_update_qp
	.cfi_startproc
; %bb.0:
	stp	x26, x25, [sp, #-80]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	cbz	w2, LBB0_2
; %bb.1:
	mov	x23, x2
Lloh0:
	adrp	x8, _MLX4_UPDATE_QP_SUPPORTED_ATTRS@GOTPAGE
Lloh1:
	ldr	x8, [x8, _MLX4_UPDATE_QP_SUPPORTED_ATTRS@GOTPAGEOFF]
Lloh2:
	ldr	w8, [x8]
	bics	wzr, w2, w8
	b.eq	LBB0_4
LBB0_2:
Lloh3:
	adrp	x8, _EINVAL@GOTPAGE
Lloh4:
	ldr	x8, [x8, _EINVAL@GOTPAGEOFF]
Lloh5:
	ldr	w8, [x8]
	neg	w21, w8
LBB0_3:
	mov	x0, x21
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp], #80             ; 16-byte Folded Reload
	ret
LBB0_4:
	mov	x22, x3
	mov	x21, x1
	mov	x19, x0
	bl	_mlx4_alloc_cmd_mailbox
	mov	x20, x0
	bl	_IS_ERR
	cbz	x0, LBB0_6
; %bb.5:
	mov	x0, x20
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp], #80             ; 16-byte Folded Reload
	b	_PTR_ERR
LBB0_6:
	ldr	x26, [x20, #8]
Lloh6:
	adrp	x8, _MLX4_UPDATE_QP_SMAC@GOTPAGE
Lloh7:
	ldr	x8, [x8, _MLX4_UPDATE_QP_SMAC@GOTPAGEOFF]
Lloh8:
	ldr	w8, [x8]
	tst	w8, w23
	b.eq	LBB0_8
; %bb.7:
Lloh9:
	adrp	x8, _MLX4_UPD_QP_PATH_MASK_MAC_INDEX@GOTPAGE
Lloh10:
	ldr	x8, [x8, _MLX4_UPD_QP_PATH_MASK_MAC_INDEX@GOTPAGEOFF]
Lloh11:
	ldr	x8, [x8]
	mov	w9, #1
	lsl	x24, x9, x8
	ldr	w8, [x22, #16]
	str	w8, [x26, #32]
	b	LBB0_9
LBB0_8:
	mov	x24, #0
LBB0_9:
Lloh12:
	adrp	x8, _MLX4_UPDATE_QP_ETH_SRC_CHECK_MC_LB@GOTPAGE
Lloh13:
	ldr	x8, [x8, _MLX4_UPDATE_QP_ETH_SRC_CHECK_MC_LB@GOTPAGEOFF]
Lloh14:
	ldr	w8, [x8]
	tst	w8, w23
	b.eq	LBB0_13
; %bb.10:
	ldr	w8, [x19]
Lloh15:
	adrp	x9, _MLX4_DEV_CAP_FLAG2_UPDATE_QP_SRC_CHECK_LB@GOTPAGE
Lloh16:
	ldr	x9, [x9, _MLX4_DEV_CAP_FLAG2_UPDATE_QP_SRC_CHECK_LB@GOTPAGEOFF]
Lloh17:
	ldr	w9, [x9]
	tst	w9, w8
	b.eq	LBB0_23
; %bb.11:
Lloh18:
	adrp	x8, _MLX4_UPD_QP_PATH_MASK_ETH_SRC_CHECK_MC_LB@GOTPAGE
Lloh19:
	ldr	x8, [x8, _MLX4_UPD_QP_PATH_MASK_ETH_SRC_CHECK_MC_LB@GOTPAGEOFF]
Lloh20:
	ldr	x8, [x8]
	mov	w9, #1
	lsl	x8, x9, x8
	orr	x24, x8, x24
	ldr	w8, [x22]
Lloh21:
	adrp	x9, _MLX4_UPDATE_QP_PARAMS_FLAGS_ETH_CHECK_MC_LB@GOTPAGE
Lloh22:
	ldr	x9, [x9, _MLX4_UPDATE_QP_PARAMS_FLAGS_ETH_CHECK_MC_LB@GOTPAGEOFF]
Lloh23:
	ldr	w9, [x9]
	tst	w9, w8
	b.eq	LBB0_13
; %bb.12:
Lloh24:
	adrp	x8, _MLX4_FL_ETH_SRC_CHECK_MC_LB@GOTPAGE
Lloh25:
	ldr	x8, [x8, _MLX4_FL_ETH_SRC_CHECK_MC_LB@GOTPAGEOFF]
Lloh26:
	ldr	w8, [x8]
	ldr	w9, [x26, #28]
	orr	w8, w9, w8
	str	w8, [x26, #28]
LBB0_13:
Lloh27:
	adrp	x8, _MLX4_UPDATE_QP_VSD@GOTPAGE
Lloh28:
	ldr	x8, [x8, _MLX4_UPDATE_QP_VSD@GOTPAGEOFF]
Lloh29:
	ldr	w8, [x8]
	tst	w8, w23
	b.eq	LBB0_16
; %bb.14:
Lloh30:
	adrp	x8, _MLX4_UPD_QP_MASK_VSD@GOTPAGE
Lloh31:
	ldr	x8, [x8, _MLX4_UPD_QP_MASK_VSD@GOTPAGEOFF]
Lloh32:
	ldr	x8, [x8]
	mov	w9, #1
	lsl	x25, x9, x8
	ldr	w8, [x22]
Lloh33:
	adrp	x9, _MLX4_UPDATE_QP_PARAMS_FLAGS_VSD_ENABLE@GOTPAGE
Lloh34:
	ldr	x9, [x9, _MLX4_UPDATE_QP_PARAMS_FLAGS_VSD_ENABLE@GOTPAGEOFF]
Lloh35:
	ldr	w9, [x9]
	tst	w9, w8
	b.eq	LBB0_17
; %bb.15:
Lloh36:
	adrp	x8, _MLX4_STRIP_VLAN@GOTPAGE
Lloh37:
	ldr	x8, [x8, _MLX4_STRIP_VLAN@GOTPAGEOFF]
Lloh38:
	ldr	w0, [x8]
	bl	_cpu_to_be32
	ldr	w8, [x26, #24]
	orr	w8, w8, w0
	str	w8, [x26, #24]
	b	LBB0_17
LBB0_16:
	mov	x25, #0
LBB0_17:
Lloh39:
	adrp	x8, _MLX4_UPDATE_QP_RATE_LIMIT@GOTPAGE
Lloh40:
	ldr	x8, [x8, _MLX4_UPDATE_QP_RATE_LIMIT@GOTPAGEOFF]
Lloh41:
	ldr	w8, [x8]
	tst	w8, w23
	b.eq	LBB0_19
; %bb.18:
Lloh42:
	adrp	x8, _MLX4_UPD_QP_MASK_RATE_LIMIT@GOTPAGE
Lloh43:
	ldr	x8, [x8, _MLX4_UPD_QP_MASK_RATE_LIMIT@GOTPAGEOFF]
Lloh44:
	ldr	x8, [x8]
	mov	w9, #1
	lsl	x8, x9, x8
	orr	x25, x8, x25
	ldp	w8, w9, [x22, #4]
	orr	w0, w9, w8, lsl #14
	bl	_cpu_to_be16
	str	w0, [x26, #20]
LBB0_19:
Lloh45:
	adrp	x8, _MLX4_UPDATE_QP_QOS_VPORT@GOTPAGE
Lloh46:
	ldr	x8, [x8, _MLX4_UPDATE_QP_QOS_VPORT@GOTPAGEOFF]
Lloh47:
	ldr	w8, [x8]
	tst	w8, w23
	b.eq	LBB0_22
; %bb.20:
	ldr	w8, [x19]
Lloh48:
	adrp	x9, _MLX4_DEV_CAP_FLAG2_QOS_VPP@GOTPAGE
Lloh49:
	ldr	x9, [x9, _MLX4_DEV_CAP_FLAG2_QOS_VPP@GOTPAGEOFF]
Lloh50:
	ldr	w9, [x9]
	tst	w9, w8
	b.eq	LBB0_24
; %bb.21:
Lloh51:
	adrp	x8, _MLX4_UPD_QP_MASK_QOS_VPP@GOTPAGE
Lloh52:
	ldr	x8, [x8, _MLX4_UPD_QP_MASK_QOS_VPP@GOTPAGEOFF]
Lloh53:
	ldr	x8, [x8]
	mov	w9, #1
	lsl	x8, x9, x8
	orr	x25, x8, x25
	ldr	w8, [x22, #12]
	str	w8, [x26, #16]
LBB0_22:
	mov	x0, x24
	bl	_cpu_to_be64
	str	x0, [x26, #8]
	mov	x0, x25
	bl	_cpu_to_be64
	str	x0, [x26]
	ldr	w1, [x20]
	and	w2, w21, #0xffffff
Lloh54:
	adrp	x8, _MLX4_CMD_UPDATE_QP@GOTPAGE
Lloh55:
	ldr	x8, [x8, _MLX4_CMD_UPDATE_QP@GOTPAGEOFF]
Lloh56:
	ldr	w4, [x8]
Lloh57:
	adrp	x8, _MLX4_CMD_TIME_CLASS_A@GOTPAGE
Lloh58:
	ldr	x8, [x8, _MLX4_CMD_TIME_CLASS_A@GOTPAGEOFF]
Lloh59:
	ldr	w5, [x8]
Lloh60:
	adrp	x8, _MLX4_CMD_NATIVE@GOTPAGE
Lloh61:
	ldr	x8, [x8, _MLX4_CMD_NATIVE@GOTPAGEOFF]
Lloh62:
	ldr	w6, [x8]
	mov	x0, x19
	mov	w3, #0
	bl	_mlx4_cmd
	mov	x21, x0
	b	LBB0_26
LBB0_23:
Lloh63:
	adrp	x1, l_.str@PAGE
Lloh64:
	add	x1, x1, l_.str@PAGEOFF
	b	LBB0_25
LBB0_24:
Lloh65:
	adrp	x1, l_.str.1@PAGE
Lloh66:
	add	x1, x1, l_.str.1@PAGEOFF
LBB0_25:
	mov	x0, x19
	bl	_mlx4_warn
Lloh67:
	adrp	x8, _EOPNOTSUPP@GOTPAGE
Lloh68:
	ldr	x8, [x8, _EOPNOTSUPP@GOTPAGEOFF]
Lloh69:
	ldr	w8, [x8]
	neg	w21, w8
LBB0_26:
	mov	x0, x19
	mov	x1, x20
	bl	_mlx4_free_cmd_mailbox
	b	LBB0_3
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.loh AdrpLdrGotLdr	Lloh27, Lloh28, Lloh29
	.loh AdrpLdrGotLdr	Lloh33, Lloh34, Lloh35
	.loh AdrpLdrGotLdr	Lloh30, Lloh31, Lloh32
	.loh AdrpLdrGotLdr	Lloh36, Lloh37, Lloh38
	.loh AdrpLdrGotLdr	Lloh39, Lloh40, Lloh41
	.loh AdrpLdrGotLdr	Lloh42, Lloh43, Lloh44
	.loh AdrpLdrGotLdr	Lloh45, Lloh46, Lloh47
	.loh AdrpLdrGotLdr	Lloh48, Lloh49, Lloh50
	.loh AdrpLdrGotLdr	Lloh51, Lloh52, Lloh53
	.loh AdrpLdrGotLdr	Lloh60, Lloh61, Lloh62
	.loh AdrpLdrGotLdr	Lloh57, Lloh58, Lloh59
	.loh AdrpLdrGotLdr	Lloh54, Lloh55, Lloh56
	.loh AdrpAdd	Lloh63, Lloh64
	.loh AdrpAdd	Lloh65, Lloh66
	.loh AdrpLdrGotLdr	Lloh67, Lloh68, Lloh69
	.cfi_endproc
                                        ; -- End function
	.comm	_MLX4_UPDATE_QP_SUPPORTED_ATTRS,4,2 ; @MLX4_UPDATE_QP_SUPPORTED_ATTRS
	.comm	_EINVAL,4,2                     ; @EINVAL
	.comm	_MLX4_UPDATE_QP_SMAC,4,2        ; @MLX4_UPDATE_QP_SMAC
	.comm	_MLX4_UPD_QP_PATH_MASK_MAC_INDEX,8,3 ; @MLX4_UPD_QP_PATH_MASK_MAC_INDEX
	.comm	_MLX4_UPDATE_QP_ETH_SRC_CHECK_MC_LB,4,2 ; @MLX4_UPDATE_QP_ETH_SRC_CHECK_MC_LB
	.comm	_MLX4_DEV_CAP_FLAG2_UPDATE_QP_SRC_CHECK_LB,4,2 ; @MLX4_DEV_CAP_FLAG2_UPDATE_QP_SRC_CHECK_LB
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"Trying to set src check LB, but it isn't supported\n"

	.comm	_EOPNOTSUPP,4,2                 ; @EOPNOTSUPP
	.comm	_MLX4_UPD_QP_PATH_MASK_ETH_SRC_CHECK_MC_LB,8,3 ; @MLX4_UPD_QP_PATH_MASK_ETH_SRC_CHECK_MC_LB
	.comm	_MLX4_UPDATE_QP_PARAMS_FLAGS_ETH_CHECK_MC_LB,4,2 ; @MLX4_UPDATE_QP_PARAMS_FLAGS_ETH_CHECK_MC_LB
	.comm	_MLX4_FL_ETH_SRC_CHECK_MC_LB,4,2 ; @MLX4_FL_ETH_SRC_CHECK_MC_LB
	.comm	_MLX4_UPDATE_QP_VSD,4,2         ; @MLX4_UPDATE_QP_VSD
	.comm	_MLX4_UPD_QP_MASK_VSD,8,3       ; @MLX4_UPD_QP_MASK_VSD
	.comm	_MLX4_UPDATE_QP_PARAMS_FLAGS_VSD_ENABLE,4,2 ; @MLX4_UPDATE_QP_PARAMS_FLAGS_VSD_ENABLE
	.comm	_MLX4_STRIP_VLAN,4,2            ; @MLX4_STRIP_VLAN
	.comm	_MLX4_UPDATE_QP_RATE_LIMIT,4,2  ; @MLX4_UPDATE_QP_RATE_LIMIT
	.comm	_MLX4_UPD_QP_MASK_RATE_LIMIT,8,3 ; @MLX4_UPD_QP_MASK_RATE_LIMIT
	.comm	_MLX4_UPDATE_QP_QOS_VPORT,4,2   ; @MLX4_UPDATE_QP_QOS_VPORT
	.comm	_MLX4_DEV_CAP_FLAG2_QOS_VPP,4,2 ; @MLX4_DEV_CAP_FLAG2_QOS_VPP
l_.str.1:                               ; @.str.1
	.asciz	"Granular QoS per VF is not enabled\n"

	.comm	_MLX4_UPD_QP_MASK_QOS_VPP,8,3   ; @MLX4_UPD_QP_MASK_QOS_VPP
	.comm	_MLX4_CMD_UPDATE_QP,4,2         ; @MLX4_CMD_UPDATE_QP
	.comm	_MLX4_CMD_TIME_CLASS_A,4,2      ; @MLX4_CMD_TIME_CLASS_A
	.comm	_MLX4_CMD_NATIVE,4,2            ; @MLX4_CMD_NATIVE
.subsections_via_symbols
