	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function tegra_pcie_dw_wr_own_conf
_tegra_pcie_dw_wr_own_conf:             ## @tegra_pcie_dw_wr_own_conf
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%ecx, %r14d
	movl	%edx, %r15d
	movl	%esi, %ebx
	callq	_to_dw_pcie_from_pp
	movq	_PORT_LOGIC_MSIX_DOORBELL@GOTPCREL(%rip), %rcx
	cmpl	%ebx, (%rcx)
	jne	LBB0_2
## %bb.1:
	movq	_PCIBIOS_SUCCESSFUL@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_2:
	movslq	%ebx, %rdi
	addq	(%rax), %rdi
	movl	%r15d, %esi
	movl	%r14d, %edx
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_dw_pcie_write                  ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_PORT_LOGIC_MSIX_DOORBELL,4,2   ## @PORT_LOGIC_MSIX_DOORBELL
	.comm	_PCIBIOS_SUCCESSFUL,4,2         ## @PCIBIOS_SUCCESSFUL
	.no_dead_strip	_tegra_pcie_dw_wr_own_conf
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function tegra_pcie_dw_wr_own_conf
_tegra_pcie_dw_wr_own_conf:             ; @tegra_pcie_dw_wr_own_conf
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x3
	mov	x20, x2
	mov	x21, x1
	bl	_to_dw_pcie_from_pp
Lloh0:
	adrp	x8, _PORT_LOGIC_MSIX_DOORBELL@GOTPAGE
Lloh1:
	ldr	x8, [x8, _PORT_LOGIC_MSIX_DOORBELL@GOTPAGEOFF]
Lloh2:
	ldr	w8, [x8]
	cmp	w8, w21
	b.ne	LBB0_2
; %bb.1:
Lloh3:
	adrp	x8, _PCIBIOS_SUCCESSFUL@GOTPAGE
Lloh4:
	ldr	x8, [x8, _PCIBIOS_SUCCESSFUL@GOTPAGEOFF]
Lloh5:
	ldr	w0, [x8]
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
LBB0_2:
	ldr	x8, [x0]
	add	x0, x8, w21, sxtw
	mov	x1, x20
	mov	x2, x19
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	_dw_pcie_write
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.cfi_endproc
                                        ; -- End function
	.comm	_PORT_LOGIC_MSIX_DOORBELL,4,2   ; @PORT_LOGIC_MSIX_DOORBELL
	.comm	_PCIBIOS_SUCCESSFUL,4,2         ; @PCIBIOS_SUCCESSFUL
	.no_dead_strip	_tegra_pcie_dw_wr_own_conf
.subsections_via_symbols
