	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_mt76x2_mac_reset               ## -- Begin function mt76x2_mac_reset
	.p2align	4, 0x90
_mt76x2_mac_reset:                      ## @mt76x2_mac_reset
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%esi, %r14d
	movq	%rdi, %r12
	movq	(%rdi), %r15
	callq	_mt76x02_wait_for_mac
	testl	%eax, %eax
	je	LBB0_1
## %bb.2:
	movq	_MT_WPDMA_GLO_CFG@GOTPCREL(%rip), %r13
	movq	(%r13), %rsi
	movq	%r12, %rdi
	callq	_mt76_rr
	movq	_MT_WPDMA_GLO_CFG_TX_DMA_EN@GOTPCREL(%rip), %rcx
	movq	_MT_WPDMA_GLO_CFG_TX_DMA_BUSY@GOTPCREL(%rip), %rdx
	movl	(%rdx), %ebx
	orl	(%rcx), %ebx
	movq	_MT_WPDMA_GLO_CFG_RX_DMA_EN@GOTPCREL(%rip), %rcx
	orl	(%rcx), %ebx
	movq	_MT_WPDMA_GLO_CFG_RX_DMA_BUSY@GOTPCREL(%rip), %rcx
	orl	(%rcx), %ebx
	movq	_MT_WPDMA_GLO_CFG_DMA_BURST_SIZE@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edi
	orl	%edi, %ebx
	notl	%ebx
	andl	%eax, %ebx
	movl	$3, %esi
	callq	_FIELD_PREP
	orl	%eax, %ebx
	movq	(%r13), %rsi
	movq	%r12, %rdi
	movl	%ebx, %edx
	callq	_mt76_wr
	movq	%r12, %rdi
	callq	_mt76x2_mac_pbf_init
	movq	%r12, %rdi
	callq	_mt76_write_mac_initvals
	movq	%r12, %rdi
	callq	_mt76x2_fixup_xtal
	movq	_MT_MAC_SYS_CTRL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_MT_MAC_SYS_CTRL_RESET_CSR@GOTPCREL(%rip), %rax
	movq	_MT_MAC_SYS_CTRL_RESET_BBP@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	orl	(%rax), %edx
	movq	%r12, %rdi
	callq	_mt76_clear
	movq	%r12, %rdi
	callq	_is_mt7612
	testq	%rax, %rax
	je	LBB0_4
## %bb.3:
	movq	_MT_COEXCFG0@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_MT_COEXCFG0_COEX_EN@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r12, %rdi
	callq	_mt76_clear
LBB0_4:
	movq	_MT_EXT_CCA_CFG@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r12, %rdi
	movl	$61440, %edx                    ## imm = 0xF000
	callq	_mt76_set
	movq	_MT_TX_ALC_CFG_4@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	movl	$31, %edi
	callq	_BIT
	movq	%r12, %rdi
	movl	%ebx, %esi
	movl	%eax, %edx
	callq	_mt76_clear
	movq	_MT_RF_BYPASS_0@GOTPCREL(%rip), %rbx
	movq	(%rbx), %rsi
	movq	%r12, %rdi
	movl	$100663296, %edx                ## imm = 0x6000000
	callq	_mt76_wr
	movq	_MT_RF_SETTING_0@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	movq	%r12, %rdi
	movl	$142606336, %edx                ## imm = 0x8800000
	callq	_mt76_wr
	movl	$5000, %edi                     ## imm = 0x1388
	movl	$10000, %esi                    ## imm = 0x2710
	callq	_usleep_range
	movq	(%rbx), %rsi
	xorl	%ebx, %ebx
	movq	%r12, %rdi
	xorl	%edx, %edx
	callq	_mt76_wr
	movq	_MT_MCU_CLOCK_CTL@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	movq	%r12, %rdi
	movl	$5121, %edx                     ## imm = 0x1401
	callq	_mt76_wr
	movq	_MT_FCE_L2_STUFF@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_MT_FCE_L2_STUFF_WR_MPDU_LEN_EN@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r12, %rdi
	callq	_mt76_clear
	movq	%r12, %rdi
	movq	%r15, %rsi
	callq	_mt76x02_mac_setaddr
	movq	%r12, %rdi
	callq	_mt76x02e_init_beacon_config
	testl	%r14d, %r14d
	je	LBB0_13
## %bb.5:
	movq	_MT_WCID_DROP_BASE@GOTPCREL(%rip), %r14
	movq	(%r14), %rsi
	xorl	%ebx, %ebx
	movq	%r12, %rdi
	xorl	%edx, %edx
	callq	_mt76_wr
	movq	(%r14), %rsi
	addq	$4, %rsi
	movq	%r12, %rdi
	xorl	%edx, %edx
	callq	_mt76_wr
	movq	(%r14), %rsi
	addq	$8, %rsi
	movq	%r12, %rdi
	xorl	%edx, %edx
	callq	_mt76_wr
	movq	(%r14), %rsi
	addq	$12, %rsi
	movq	%r12, %rdi
	xorl	%edx, %edx
	callq	_mt76_wr
	movq	(%r14), %rsi
	addq	$16, %rsi
	movq	%r12, %rdi
	xorl	%edx, %edx
	callq	_mt76_wr
	movq	(%r14), %rsi
	addq	$20, %rsi
	movq	%r12, %rdi
	xorl	%edx, %edx
	callq	_mt76_wr
	movq	(%r14), %rsi
	addq	$24, %rsi
	movq	%r12, %rdi
	xorl	%edx, %edx
	callq	_mt76_wr
	movq	(%r14), %rsi
	addq	$28, %rsi
	movq	%r12, %rdi
	xorl	%edx, %edx
	callq	_mt76_wr
	.p2align	4, 0x90
LBB0_6:                                 ## =>This Inner Loop Header: Depth=1
	movq	%r12, %rdi
	movl	%ebx, %esi
	xorl	%edx, %edx
	xorl	%ecx, %ecx
	callq	_mt76x02_mac_wcid_setup
	movl	%ebx, %edi
	callq	_MT_WCID_TX_RATE
	movq	%r12, %rdi
	movq	%rax, %rsi
	xorl	%edx, %edx
	callq	_mt76_wr
	movl	%ebx, %edi
	callq	_MT_WCID_TX_RATE
	leaq	4(%rax), %rsi
	movq	%r12, %rdi
	xorl	%edx, %edx
	callq	_mt76_wr
	incl	%ebx
	cmpl	$256, %ebx                      ## imm = 0x100
	jne	LBB0_6
## %bb.7:
	movq	_MT_MAX_VIFS@GOTPCREL(%rip), %r14
	cmpl	$0, (%r14)
	jle	LBB0_10
## %bb.8:
	xorl	%ebx, %ebx
	.p2align	4, 0x90
LBB0_9:                                 ## =>This Inner Loop Header: Depth=1
	movl	%ebx, %edi
	callq	_MT_VIF_WCID
	movq	%r12, %rdi
	movl	%eax, %esi
	movl	%ebx, %edx
	xorl	%ecx, %ecx
	callq	_mt76x02_mac_wcid_setup
	incl	%ebx
	cmpl	(%r14), %ebx
	jl	LBB0_9
LBB0_10:
	xorl	%ebx, %ebx
	.p2align	4, 0x90
LBB0_11:                                ## =>This Inner Loop Header: Depth=1
	movq	%r12, %rdi
	movl	%ebx, %esi
	xorl	%edx, %edx
	xorl	%ecx, %ecx
	callq	_mt76x02_mac_shared_key_setup
	movq	%r12, %rdi
	movl	%ebx, %esi
	movl	$1, %edx
	xorl	%ecx, %ecx
	callq	_mt76x02_mac_shared_key_setup
	movq	%r12, %rdi
	movl	%ebx, %esi
	movl	$2, %edx
	xorl	%ecx, %ecx
	callq	_mt76x02_mac_shared_key_setup
	movq	%r12, %rdi
	movl	%ebx, %esi
	movl	$3, %edx
	xorl	%ecx, %ecx
	callq	_mt76x02_mac_shared_key_setup
	incl	%ebx
	cmpl	$16, %ebx
	jne	LBB0_11
## %bb.12:
	movq	_MT_TX_STAT_FIFO@GOTPCREL(%rip), %rbx
	movq	(%rbx), %rsi
	movq	%r12, %rdi
	callq	_mt76_rr
	movq	(%rbx), %rsi
	movq	%r12, %rdi
	callq	_mt76_rr
	movq	(%rbx), %rsi
	movq	%r12, %rdi
	callq	_mt76_rr
	movq	(%rbx), %rsi
	movq	%r12, %rdi
	callq	_mt76_rr
	movq	(%rbx), %rsi
	movq	%r12, %rdi
	callq	_mt76_rr
	movq	(%rbx), %rsi
	movq	%r12, %rdi
	callq	_mt76_rr
	movq	(%rbx), %rsi
	movq	%r12, %rdi
	callq	_mt76_rr
	movq	(%rbx), %rsi
	movq	%r12, %rdi
	callq	_mt76_rr
	movq	(%rbx), %rsi
	movq	%r12, %rdi
	callq	_mt76_rr
	movq	(%rbx), %rsi
	movq	%r12, %rdi
	callq	_mt76_rr
	movq	(%rbx), %rsi
	movq	%r12, %rdi
	callq	_mt76_rr
	movq	(%rbx), %rsi
	movq	%r12, %rdi
	callq	_mt76_rr
	movq	(%rbx), %rsi
	movq	%r12, %rdi
	callq	_mt76_rr
	movq	(%rbx), %rsi
	movq	%r12, %rdi
	callq	_mt76_rr
	movq	(%rbx), %rsi
	movq	%r12, %rdi
	callq	_mt76_rr
	movq	(%rbx), %rsi
	movq	%r12, %rdi
	callq	_mt76_rr
	movq	_MT_CH_TIME_CFG_TIMER_EN@GOTPCREL(%rip), %rax
	movq	_MT_CH_TIME_CFG_TX_AS_BUSY@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ebx
	orl	(%rax), %ebx
	movq	_MT_CH_TIME_CFG@GOTPCREL(%rip), %rax
	movq	_MT_CH_TIME_CFG_RX_AS_BUSY@GOTPCREL(%rip), %rcx
	orl	(%rcx), %ebx
	movq	(%rax), %r14
	movq	_MT_CH_TIME_CFG_NAV_AS_BUSY@GOTPCREL(%rip), %rax
	orl	(%rax), %ebx
	movq	_MT_CH_TIME_CFG_EIFS_AS_BUSY@GOTPCREL(%rip), %rax
	orl	(%rax), %ebx
	movq	_MT_CH_CCA_RC_EN@GOTPCREL(%rip), %rax
	orl	(%rax), %ebx
	movq	_MT_CH_TIME_CFG_CH_TIMER_CLR@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	$1, %esi
	callq	_FIELD_PREP
	orl	%eax, %ebx
	movq	%r12, %rdi
	movq	%r14, %rsi
	movl	%ebx, %edx
	callq	_mt76_wr
	movq	%r12, %rdi
	callq	_mt76x02_set_tx_ackto
	xorl	%ebx, %ebx
	jmp	LBB0_13
LBB0_1:
	movq	_ETIMEDOUT@GOTPCREL(%rip), %rax
	xorl	%ebx, %ebx
	subl	(%rax), %ebx
LBB0_13:
	movl	%ebx, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_ETIMEDOUT,4,2                  ## @ETIMEDOUT
	.comm	_MT_WPDMA_GLO_CFG,8,3           ## @MT_WPDMA_GLO_CFG
	.comm	_MT_WPDMA_GLO_CFG_TX_DMA_EN,4,2 ## @MT_WPDMA_GLO_CFG_TX_DMA_EN
	.comm	_MT_WPDMA_GLO_CFG_TX_DMA_BUSY,4,2 ## @MT_WPDMA_GLO_CFG_TX_DMA_BUSY
	.comm	_MT_WPDMA_GLO_CFG_RX_DMA_EN,4,2 ## @MT_WPDMA_GLO_CFG_RX_DMA_EN
	.comm	_MT_WPDMA_GLO_CFG_RX_DMA_BUSY,4,2 ## @MT_WPDMA_GLO_CFG_RX_DMA_BUSY
	.comm	_MT_WPDMA_GLO_CFG_DMA_BURST_SIZE,4,2 ## @MT_WPDMA_GLO_CFG_DMA_BURST_SIZE
	.comm	_MT_MAC_SYS_CTRL,4,2            ## @MT_MAC_SYS_CTRL
	.comm	_MT_MAC_SYS_CTRL_RESET_CSR,4,2  ## @MT_MAC_SYS_CTRL_RESET_CSR
	.comm	_MT_MAC_SYS_CTRL_RESET_BBP,4,2  ## @MT_MAC_SYS_CTRL_RESET_BBP
	.comm	_MT_COEXCFG0,4,2                ## @MT_COEXCFG0
	.comm	_MT_COEXCFG0_COEX_EN,4,2        ## @MT_COEXCFG0_COEX_EN
	.comm	_MT_EXT_CCA_CFG,4,2             ## @MT_EXT_CCA_CFG
	.comm	_MT_TX_ALC_CFG_4,4,2            ## @MT_TX_ALC_CFG_4
	.comm	_MT_RF_BYPASS_0,8,3             ## @MT_RF_BYPASS_0
	.comm	_MT_RF_SETTING_0,8,3            ## @MT_RF_SETTING_0
	.comm	_MT_MCU_CLOCK_CTL,8,3           ## @MT_MCU_CLOCK_CTL
	.comm	_MT_FCE_L2_STUFF,4,2            ## @MT_FCE_L2_STUFF
	.comm	_MT_FCE_L2_STUFF_WR_MPDU_LEN_EN,4,2 ## @MT_FCE_L2_STUFF_WR_MPDU_LEN_EN
	.comm	_MT_WCID_DROP_BASE,8,3          ## @MT_WCID_DROP_BASE
	.comm	_MT_MAX_VIFS,4,2                ## @MT_MAX_VIFS
	.comm	_MT_TX_STAT_FIFO,8,3            ## @MT_TX_STAT_FIFO
	.comm	_MT_CH_TIME_CFG,8,3             ## @MT_CH_TIME_CFG
	.comm	_MT_CH_TIME_CFG_TIMER_EN,4,2    ## @MT_CH_TIME_CFG_TIMER_EN
	.comm	_MT_CH_TIME_CFG_TX_AS_BUSY,4,2  ## @MT_CH_TIME_CFG_TX_AS_BUSY
	.comm	_MT_CH_TIME_CFG_RX_AS_BUSY,4,2  ## @MT_CH_TIME_CFG_RX_AS_BUSY
	.comm	_MT_CH_TIME_CFG_NAV_AS_BUSY,4,2 ## @MT_CH_TIME_CFG_NAV_AS_BUSY
	.comm	_MT_CH_TIME_CFG_EIFS_AS_BUSY,4,2 ## @MT_CH_TIME_CFG_EIFS_AS_BUSY
	.comm	_MT_CH_CCA_RC_EN,4,2            ## @MT_CH_CCA_RC_EN
	.comm	_MT_CH_TIME_CFG_CH_TIMER_CLR,4,2 ## @MT_CH_TIME_CFG_CH_TIMER_CLR
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_mt76x2_mac_reset               ; -- Begin function mt76x2_mac_reset
	.p2align	2
_mt76x2_mac_reset:                      ; @mt76x2_mac_reset
	.cfi_startproc
; %bb.0:
	stp	x24, x23, [sp, #-64]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x20, x1
	mov	x19, x0
	ldr	x21, [x0]
	bl	_mt76x02_wait_for_mac
	cbz	w0, LBB0_13
; %bb.1:
Lloh0:
	adrp	x22, _MT_WPDMA_GLO_CFG@GOTPAGE
Lloh1:
	ldr	x22, [x22, _MT_WPDMA_GLO_CFG@GOTPAGEOFF]
	ldr	x1, [x22]
	mov	x0, x19
	bl	_mt76_rr
Lloh2:
	adrp	x8, _MT_WPDMA_GLO_CFG_TX_DMA_EN@GOTPAGE
Lloh3:
	ldr	x8, [x8, _MT_WPDMA_GLO_CFG_TX_DMA_EN@GOTPAGEOFF]
Lloh4:
	ldr	w8, [x8]
Lloh5:
	adrp	x9, _MT_WPDMA_GLO_CFG_TX_DMA_BUSY@GOTPAGE
Lloh6:
	ldr	x9, [x9, _MT_WPDMA_GLO_CFG_TX_DMA_BUSY@GOTPAGEOFF]
Lloh7:
	ldr	w9, [x9]
Lloh8:
	adrp	x10, _MT_WPDMA_GLO_CFG_RX_DMA_EN@GOTPAGE
Lloh9:
	ldr	x10, [x10, _MT_WPDMA_GLO_CFG_RX_DMA_EN@GOTPAGEOFF]
	orr	w8, w9, w8
Lloh10:
	ldr	w9, [x10]
	orr	w8, w8, w9
Lloh11:
	adrp	x9, _MT_WPDMA_GLO_CFG_RX_DMA_BUSY@GOTPAGE
Lloh12:
	ldr	x9, [x9, _MT_WPDMA_GLO_CFG_RX_DMA_BUSY@GOTPAGEOFF]
Lloh13:
	ldr	w9, [x9]
	orr	w9, w8, w9
Lloh14:
	adrp	x8, _MT_WPDMA_GLO_CFG_DMA_BURST_SIZE@GOTPAGE
Lloh15:
	ldr	x8, [x8, _MT_WPDMA_GLO_CFG_DMA_BURST_SIZE@GOTPAGEOFF]
Lloh16:
	ldr	w8, [x8]
	orr	w9, w9, w8
	bic	w23, w0, w9
	mov	x0, x8
	mov	w1, #3
	bl	_FIELD_PREP
	orr	w2, w23, w0
	ldr	x1, [x22]
	mov	x0, x19
	bl	_mt76_wr
	mov	x0, x19
	bl	_mt76x2_mac_pbf_init
	mov	x0, x19
	bl	_mt76_write_mac_initvals
	mov	x0, x19
	bl	_mt76x2_fixup_xtal
Lloh17:
	adrp	x8, _MT_MAC_SYS_CTRL@GOTPAGE
Lloh18:
	ldr	x8, [x8, _MT_MAC_SYS_CTRL@GOTPAGEOFF]
Lloh19:
	adrp	x9, _MT_MAC_SYS_CTRL_RESET_CSR@GOTPAGE
Lloh20:
	ldr	x9, [x9, _MT_MAC_SYS_CTRL_RESET_CSR@GOTPAGEOFF]
Lloh21:
	ldr	w1, [x8]
Lloh22:
	ldr	w8, [x9]
Lloh23:
	adrp	x9, _MT_MAC_SYS_CTRL_RESET_BBP@GOTPAGE
Lloh24:
	ldr	x9, [x9, _MT_MAC_SYS_CTRL_RESET_BBP@GOTPAGEOFF]
Lloh25:
	ldr	w9, [x9]
	orr	w2, w9, w8
	mov	x0, x19
	bl	_mt76_clear
	mov	x0, x19
	bl	_is_mt7612
	cbz	x0, LBB0_3
; %bb.2:
Lloh26:
	adrp	x8, _MT_COEXCFG0@GOTPAGE
Lloh27:
	ldr	x8, [x8, _MT_COEXCFG0@GOTPAGEOFF]
Lloh28:
	ldr	w1, [x8]
Lloh29:
	adrp	x8, _MT_COEXCFG0_COEX_EN@GOTPAGE
Lloh30:
	ldr	x8, [x8, _MT_COEXCFG0_COEX_EN@GOTPAGEOFF]
Lloh31:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_mt76_clear
LBB0_3:
Lloh32:
	adrp	x8, _MT_EXT_CCA_CFG@GOTPAGE
Lloh33:
	ldr	x8, [x8, _MT_EXT_CCA_CFG@GOTPAGEOFF]
Lloh34:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #61440
	bl	_mt76_set
Lloh35:
	adrp	x8, _MT_TX_ALC_CFG_4@GOTPAGE
Lloh36:
	ldr	x8, [x8, _MT_TX_ALC_CFG_4@GOTPAGEOFF]
Lloh37:
	ldr	w22, [x8]
	mov	w0, #31
	bl	_BIT
	mov	x2, x0
	mov	x0, x19
	mov	x1, x22
	bl	_mt76_clear
Lloh38:
	adrp	x22, _MT_RF_BYPASS_0@GOTPAGE
Lloh39:
	ldr	x22, [x22, _MT_RF_BYPASS_0@GOTPAGEOFF]
	ldr	x1, [x22]
	mov	x0, x19
	mov	w2, #100663296
	bl	_mt76_wr
Lloh40:
	adrp	x8, _MT_RF_SETTING_0@GOTPAGE
Lloh41:
	ldr	x8, [x8, _MT_RF_SETTING_0@GOTPAGEOFF]
Lloh42:
	ldr	x1, [x8]
	mov	x0, x19
	mov	w2, #142606336
	bl	_mt76_wr
	mov	w0, #5000
	mov	w1, #10000
	bl	_usleep_range
	ldr	x1, [x22]
	mov	x0, x19
	mov	w2, #0
	bl	_mt76_wr
Lloh43:
	adrp	x8, _MT_MCU_CLOCK_CTL@GOTPAGE
Lloh44:
	ldr	x8, [x8, _MT_MCU_CLOCK_CTL@GOTPAGEOFF]
Lloh45:
	ldr	x1, [x8]
	mov	x0, x19
	mov	w2, #5121
	bl	_mt76_wr
Lloh46:
	adrp	x8, _MT_FCE_L2_STUFF@GOTPAGE
Lloh47:
	ldr	x8, [x8, _MT_FCE_L2_STUFF@GOTPAGEOFF]
Lloh48:
	ldr	w1, [x8]
Lloh49:
	adrp	x8, _MT_FCE_L2_STUFF_WR_MPDU_LEN_EN@GOTPAGE
Lloh50:
	ldr	x8, [x8, _MT_FCE_L2_STUFF_WR_MPDU_LEN_EN@GOTPAGEOFF]
Lloh51:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_mt76_clear
	mov	x0, x19
	mov	x1, x21
	bl	_mt76x02_mac_setaddr
	mov	x0, x19
	bl	_mt76x02e_init_beacon_config
	cbz	w20, LBB0_12
; %bb.4:
Lloh52:
	adrp	x20, _MT_WCID_DROP_BASE@GOTPAGE
Lloh53:
	ldr	x20, [x20, _MT_WCID_DROP_BASE@GOTPAGEOFF]
	ldr	x1, [x20]
	mov	x0, x19
	mov	w2, #0
	bl	_mt76_wr
	ldr	x8, [x20]
	add	x1, x8, #4
	mov	x0, x19
	mov	w2, #0
	bl	_mt76_wr
	ldr	x8, [x20]
	add	x1, x8, #8
	mov	x0, x19
	mov	w2, #0
	bl	_mt76_wr
	ldr	x8, [x20]
	add	x1, x8, #12
	mov	x0, x19
	mov	w2, #0
	bl	_mt76_wr
	ldr	x8, [x20]
	add	x1, x8, #16
	mov	x0, x19
	mov	w2, #0
	bl	_mt76_wr
	ldr	x8, [x20]
	add	x1, x8, #20
	mov	x0, x19
	mov	w2, #0
	bl	_mt76_wr
	ldr	x8, [x20]
	add	x1, x8, #24
	mov	x0, x19
	mov	w2, #0
	bl	_mt76_wr
	ldr	x8, [x20]
	add	x1, x8, #28
	mov	x0, x19
	mov	w2, #0
	bl	_mt76_wr
	mov	w20, #0
LBB0_5:                                 ; =>This Inner Loop Header: Depth=1
	mov	x0, x19
	mov	x1, x20
	mov	w2, #0
	mov	x3, #0
	bl	_mt76x02_mac_wcid_setup
	mov	x0, x20
	bl	_MT_WCID_TX_RATE
	mov	x1, x0
	mov	x0, x19
	mov	w2, #0
	bl	_mt76_wr
	mov	x0, x20
	bl	_MT_WCID_TX_RATE
	add	x1, x0, #4
	mov	x0, x19
	mov	w2, #0
	bl	_mt76_wr
	add	w20, w20, #1
	cmp	w20, #256
	b.ne	LBB0_5
; %bb.6:
Lloh54:
	adrp	x21, _MT_MAX_VIFS@GOTPAGE
Lloh55:
	ldr	x21, [x21, _MT_MAX_VIFS@GOTPAGEOFF]
	ldr	w8, [x21]
	cmp	w8, #1
	b.lt	LBB0_9
; %bb.7:
	mov	w20, #0
LBB0_8:                                 ; =>This Inner Loop Header: Depth=1
	mov	x0, x20
	bl	_MT_VIF_WCID
	mov	x1, x0
	mov	x0, x19
	mov	x2, x20
	mov	x3, #0
	bl	_mt76x02_mac_wcid_setup
	add	w20, w20, #1
	ldr	w8, [x21]
	cmp	w20, w8
	b.lt	LBB0_8
LBB0_9:
	mov	w20, #0
LBB0_10:                                ; =>This Inner Loop Header: Depth=1
	mov	x0, x19
	mov	x1, x20
	mov	w2, #0
	mov	x3, #0
	bl	_mt76x02_mac_shared_key_setup
	mov	x0, x19
	mov	x1, x20
	mov	w2, #1
	mov	x3, #0
	bl	_mt76x02_mac_shared_key_setup
	mov	x0, x19
	mov	x1, x20
	mov	w2, #2
	mov	x3, #0
	bl	_mt76x02_mac_shared_key_setup
	mov	x0, x19
	mov	x1, x20
	mov	w2, #3
	mov	x3, #0
	bl	_mt76x02_mac_shared_key_setup
	add	w20, w20, #1
	cmp	w20, #16
	b.ne	LBB0_10
; %bb.11:
Lloh56:
	adrp	x20, _MT_TX_STAT_FIFO@GOTPAGE
Lloh57:
	ldr	x20, [x20, _MT_TX_STAT_FIFO@GOTPAGEOFF]
	ldr	x1, [x20]
	mov	x0, x19
	bl	_mt76_rr
	ldr	x1, [x20]
	mov	x0, x19
	bl	_mt76_rr
	ldr	x1, [x20]
	mov	x0, x19
	bl	_mt76_rr
	ldr	x1, [x20]
	mov	x0, x19
	bl	_mt76_rr
	ldr	x1, [x20]
	mov	x0, x19
	bl	_mt76_rr
	ldr	x1, [x20]
	mov	x0, x19
	bl	_mt76_rr
	ldr	x1, [x20]
	mov	x0, x19
	bl	_mt76_rr
	ldr	x1, [x20]
	mov	x0, x19
	bl	_mt76_rr
	ldr	x1, [x20]
	mov	x0, x19
	bl	_mt76_rr
	ldr	x1, [x20]
	mov	x0, x19
	bl	_mt76_rr
	ldr	x1, [x20]
	mov	x0, x19
	bl	_mt76_rr
	ldr	x1, [x20]
	mov	x0, x19
	bl	_mt76_rr
	ldr	x1, [x20]
	mov	x0, x19
	bl	_mt76_rr
	ldr	x1, [x20]
	mov	x0, x19
	bl	_mt76_rr
	ldr	x1, [x20]
	mov	x0, x19
	bl	_mt76_rr
	ldr	x1, [x20]
	mov	x0, x19
	bl	_mt76_rr
Lloh58:
	adrp	x8, _MT_CH_TIME_CFG@GOTPAGE
Lloh59:
	ldr	x8, [x8, _MT_CH_TIME_CFG@GOTPAGEOFF]
Lloh60:
	adrp	x9, _MT_CH_TIME_CFG_TIMER_EN@GOTPAGE
Lloh61:
	ldr	x9, [x9, _MT_CH_TIME_CFG_TIMER_EN@GOTPAGEOFF]
Lloh62:
	ldr	w9, [x9]
Lloh63:
	adrp	x10, _MT_CH_TIME_CFG_TX_AS_BUSY@GOTPAGE
Lloh64:
	ldr	x10, [x10, _MT_CH_TIME_CFG_TX_AS_BUSY@GOTPAGEOFF]
Lloh65:
	ldr	w10, [x10]
	orr	w9, w10, w9
Lloh66:
	adrp	x10, _MT_CH_TIME_CFG_RX_AS_BUSY@GOTPAGE
Lloh67:
	ldr	x10, [x10, _MT_CH_TIME_CFG_RX_AS_BUSY@GOTPAGEOFF]
Lloh68:
	ldr	w10, [x10]
	orr	w9, w9, w10
Lloh69:
	adrp	x10, _MT_CH_TIME_CFG_NAV_AS_BUSY@GOTPAGE
Lloh70:
	ldr	x10, [x10, _MT_CH_TIME_CFG_NAV_AS_BUSY@GOTPAGEOFF]
Lloh71:
	ldr	w10, [x10]
	orr	w9, w9, w10
Lloh72:
	adrp	x10, _MT_CH_TIME_CFG_EIFS_AS_BUSY@GOTPAGE
Lloh73:
	ldr	x10, [x10, _MT_CH_TIME_CFG_EIFS_AS_BUSY@GOTPAGEOFF]
Lloh74:
	ldr	w10, [x10]
	orr	w9, w9, w10
Lloh75:
	adrp	x10, _MT_CH_CCA_RC_EN@GOTPAGE
Lloh76:
	ldr	x10, [x10, _MT_CH_CCA_RC_EN@GOTPAGEOFF]
Lloh77:
	ldr	x20, [x8]
Lloh78:
	ldr	w8, [x10]
	orr	w21, w9, w8
Lloh79:
	adrp	x8, _MT_CH_TIME_CFG_CH_TIMER_CLR@GOTPAGE
Lloh80:
	ldr	x8, [x8, _MT_CH_TIME_CFG_CH_TIMER_CLR@GOTPAGEOFF]
Lloh81:
	ldr	w0, [x8]
	mov	w1, #1
	bl	_FIELD_PREP
	orr	w2, w21, w0
	mov	x0, x19
	mov	x1, x20
	bl	_mt76_wr
	mov	x0, x19
	bl	_mt76x02_set_tx_ackto
LBB0_12:
	mov	w0, #0
	b	LBB0_14
LBB0_13:
Lloh82:
	adrp	x8, _ETIMEDOUT@GOTPAGE
Lloh83:
	ldr	x8, [x8, _ETIMEDOUT@GOTPAGEOFF]
Lloh84:
	ldr	w8, [x8]
	neg	w0, w8
LBB0_14:
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh23, Lloh24, Lloh25
	.loh AdrpLdrGotLdr	Lloh19, Lloh20, Lloh22
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh21
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh16
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh29, Lloh30, Lloh31
	.loh AdrpLdrGotLdr	Lloh26, Lloh27, Lloh28
	.loh AdrpLdrGotLdr	Lloh49, Lloh50, Lloh51
	.loh AdrpLdrGotLdr	Lloh46, Lloh47, Lloh48
	.loh AdrpLdrGotLdr	Lloh43, Lloh44, Lloh45
	.loh AdrpLdrGotLdr	Lloh40, Lloh41, Lloh42
	.loh AdrpLdrGot	Lloh38, Lloh39
	.loh AdrpLdrGotLdr	Lloh35, Lloh36, Lloh37
	.loh AdrpLdrGotLdr	Lloh32, Lloh33, Lloh34
	.loh AdrpLdrGot	Lloh52, Lloh53
	.loh AdrpLdrGot	Lloh54, Lloh55
	.loh AdrpLdrGotLdr	Lloh79, Lloh80, Lloh81
	.loh AdrpLdrGotLdr	Lloh75, Lloh76, Lloh78
	.loh AdrpLdrGotLdr	Lloh72, Lloh73, Lloh74
	.loh AdrpLdrGotLdr	Lloh69, Lloh70, Lloh71
	.loh AdrpLdrGotLdr	Lloh66, Lloh67, Lloh68
	.loh AdrpLdrGotLdr	Lloh63, Lloh64, Lloh65
	.loh AdrpLdrGotLdr	Lloh60, Lloh61, Lloh62
	.loh AdrpLdrGotLdr	Lloh58, Lloh59, Lloh77
	.loh AdrpLdrGot	Lloh56, Lloh57
	.loh AdrpLdrGotLdr	Lloh82, Lloh83, Lloh84
	.cfi_endproc
                                        ; -- End function
	.comm	_ETIMEDOUT,4,2                  ; @ETIMEDOUT
	.comm	_MT_WPDMA_GLO_CFG,8,3           ; @MT_WPDMA_GLO_CFG
	.comm	_MT_WPDMA_GLO_CFG_TX_DMA_EN,4,2 ; @MT_WPDMA_GLO_CFG_TX_DMA_EN
	.comm	_MT_WPDMA_GLO_CFG_TX_DMA_BUSY,4,2 ; @MT_WPDMA_GLO_CFG_TX_DMA_BUSY
	.comm	_MT_WPDMA_GLO_CFG_RX_DMA_EN,4,2 ; @MT_WPDMA_GLO_CFG_RX_DMA_EN
	.comm	_MT_WPDMA_GLO_CFG_RX_DMA_BUSY,4,2 ; @MT_WPDMA_GLO_CFG_RX_DMA_BUSY
	.comm	_MT_WPDMA_GLO_CFG_DMA_BURST_SIZE,4,2 ; @MT_WPDMA_GLO_CFG_DMA_BURST_SIZE
	.comm	_MT_MAC_SYS_CTRL,4,2            ; @MT_MAC_SYS_CTRL
	.comm	_MT_MAC_SYS_CTRL_RESET_CSR,4,2  ; @MT_MAC_SYS_CTRL_RESET_CSR
	.comm	_MT_MAC_SYS_CTRL_RESET_BBP,4,2  ; @MT_MAC_SYS_CTRL_RESET_BBP
	.comm	_MT_COEXCFG0,4,2                ; @MT_COEXCFG0
	.comm	_MT_COEXCFG0_COEX_EN,4,2        ; @MT_COEXCFG0_COEX_EN
	.comm	_MT_EXT_CCA_CFG,4,2             ; @MT_EXT_CCA_CFG
	.comm	_MT_TX_ALC_CFG_4,4,2            ; @MT_TX_ALC_CFG_4
	.comm	_MT_RF_BYPASS_0,8,3             ; @MT_RF_BYPASS_0
	.comm	_MT_RF_SETTING_0,8,3            ; @MT_RF_SETTING_0
	.comm	_MT_MCU_CLOCK_CTL,8,3           ; @MT_MCU_CLOCK_CTL
	.comm	_MT_FCE_L2_STUFF,4,2            ; @MT_FCE_L2_STUFF
	.comm	_MT_FCE_L2_STUFF_WR_MPDU_LEN_EN,4,2 ; @MT_FCE_L2_STUFF_WR_MPDU_LEN_EN
	.comm	_MT_WCID_DROP_BASE,8,3          ; @MT_WCID_DROP_BASE
	.comm	_MT_MAX_VIFS,4,2                ; @MT_MAX_VIFS
	.comm	_MT_TX_STAT_FIFO,8,3            ; @MT_TX_STAT_FIFO
	.comm	_MT_CH_TIME_CFG,8,3             ; @MT_CH_TIME_CFG
	.comm	_MT_CH_TIME_CFG_TIMER_EN,4,2    ; @MT_CH_TIME_CFG_TIMER_EN
	.comm	_MT_CH_TIME_CFG_TX_AS_BUSY,4,2  ; @MT_CH_TIME_CFG_TX_AS_BUSY
	.comm	_MT_CH_TIME_CFG_RX_AS_BUSY,4,2  ; @MT_CH_TIME_CFG_RX_AS_BUSY
	.comm	_MT_CH_TIME_CFG_NAV_AS_BUSY,4,2 ; @MT_CH_TIME_CFG_NAV_AS_BUSY
	.comm	_MT_CH_TIME_CFG_EIFS_AS_BUSY,4,2 ; @MT_CH_TIME_CFG_EIFS_AS_BUSY
	.comm	_MT_CH_CCA_RC_EN,4,2            ; @MT_CH_CCA_RC_EN
	.comm	_MT_CH_TIME_CFG_CH_TIMER_CLR,4,2 ; @MT_CH_TIME_CFG_CH_TIMER_CLR
.subsections_via_symbols
