	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function set_pcie_thunderbolt
_set_pcie_thunderbolt:                  ## @set_pcie_thunderbolt
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r14
	movq	_PCI_EXT_CAP_ID_VNDR@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	xorl	%esi, %esi
	callq	_pci_find_next_ext_capability
	testl	%eax, %eax
	je	LBB0_6
## %bb.1:
	movl	%eax, %ebx
	movq	_PCI_VNDR_HEADER@GOTPCREL(%rip), %r13
	leaq	-44(%rbp), %r15
	movq	_PCI_VENDOR_ID_INTEL@GOTPCREL(%rip), %r12
	jmp	LBB0_2
	.p2align	4, 0x90
LBB0_5:                                 ##   in Loop: Header=BB0_2 Depth=1
	movq	_PCI_EXT_CAP_ID_VNDR@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r14, %rdi
	movl	%ebx, %esi
	callq	_pci_find_next_ext_capability
	movl	%eax, %ebx
	testl	%eax, %eax
	je	LBB0_6
LBB0_2:                                 ## =>This Inner Loop Header: Depth=1
	movslq	%ebx, %rsi
	addq	(%r13), %rsi
	movq	%r14, %rdi
	movq	%r15, %rdx
	callq	_pci_read_config_dword
	movq	(%r14), %rax
	cmpq	(%r12), %rax
	jne	LBB0_5
## %bb.3:                               ##   in Loop: Header=BB0_2 Depth=1
	movl	-44(%rbp), %edi
	callq	_PCI_VNDR_HEADER_ID
	movq	_PCI_VSEC_ID_INTEL_TBT@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jne	LBB0_5
## %bb.4:
	movl	$1, 8(%r14)
LBB0_6:
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_PCI_EXT_CAP_ID_VNDR,4,2        ## @PCI_EXT_CAP_ID_VNDR
	.comm	_PCI_VNDR_HEADER,8,3            ## @PCI_VNDR_HEADER
	.comm	_PCI_VENDOR_ID_INTEL,8,3        ## @PCI_VENDOR_ID_INTEL
	.comm	_PCI_VSEC_ID_INTEL_TBT,8,3      ## @PCI_VSEC_ID_INTEL_TBT
	.no_dead_strip	_set_pcie_thunderbolt
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function set_pcie_thunderbolt
_set_pcie_thunderbolt:                  ; @set_pcie_thunderbolt
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #80
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x19, x0
Lloh0:
	adrp	x21, _PCI_EXT_CAP_ID_VNDR@GOTPAGE
Lloh1:
	ldr	x21, [x21, _PCI_EXT_CAP_ID_VNDR@GOTPAGEOFF]
	ldr	w2, [x21]
	mov	w1, #0
	bl	_pci_find_next_ext_capability
	cbz	w0, LBB0_6
; %bb.1:
	mov	x20, x0
Lloh2:
	adrp	x22, _PCI_VNDR_HEADER@GOTPAGE
Lloh3:
	ldr	x22, [x22, _PCI_VNDR_HEADER@GOTPAGEOFF]
Lloh4:
	adrp	x23, _PCI_VENDOR_ID_INTEL@GOTPAGE
Lloh5:
	ldr	x23, [x23, _PCI_VENDOR_ID_INTEL@GOTPAGEOFF]
Lloh6:
	adrp	x24, _PCI_VSEC_ID_INTEL_TBT@GOTPAGE
Lloh7:
	ldr	x24, [x24, _PCI_VSEC_ID_INTEL_TBT@GOTPAGEOFF]
	b	LBB0_3
LBB0_2:                                 ;   in Loop: Header=BB0_3 Depth=1
	ldr	w2, [x21]
	mov	x0, x19
	mov	x1, x20
	bl	_pci_find_next_ext_capability
	mov	x20, x0
	cbz	w0, LBB0_6
LBB0_3:                                 ; =>This Inner Loop Header: Depth=1
	ldr	x8, [x22]
	add	x1, x8, w20, sxtw
	add	x2, sp, #12
	mov	x0, x19
	bl	_pci_read_config_dword
	ldr	x8, [x19]
	ldr	x9, [x23]
	cmp	x8, x9
	b.ne	LBB0_2
; %bb.4:                                ;   in Loop: Header=BB0_3 Depth=1
	ldr	w0, [sp, #12]
	bl	_PCI_VNDR_HEADER_ID
	ldr	x8, [x24]
	cmp	x0, x8
	b.ne	LBB0_2
; %bb.5:
	mov	w8, #1
	str	w8, [x19, #8]
LBB0_6:
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #80
	ret
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGot	Lloh6, Lloh7
	.loh AdrpLdrGot	Lloh4, Lloh5
	.loh AdrpLdrGot	Lloh2, Lloh3
	.cfi_endproc
                                        ; -- End function
	.comm	_PCI_EXT_CAP_ID_VNDR,4,2        ; @PCI_EXT_CAP_ID_VNDR
	.comm	_PCI_VNDR_HEADER,8,3            ; @PCI_VNDR_HEADER
	.comm	_PCI_VENDOR_ID_INTEL,8,3        ; @PCI_VENDOR_ID_INTEL
	.comm	_PCI_VSEC_ID_INTEL_TBT,8,3      ; @PCI_VSEC_ID_INTEL_TBT
	.no_dead_strip	_set_pcie_thunderbolt
.subsections_via_symbols
