	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function il4965_irq_tasklet
_il4965_irq_tasklet:                    ## @il4965_irq_tasklet
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %rbx
	leaq	80(%rdi), %r15
	movq	%r15, %rdi
	callq	_spin_lock_irqsave
	movq	_CSR_INT@GOTPCREL(%rip), %r14
	movl	(%r14), %esi
	movq	%rbx, %rdi
	callq	__il_rd
	movl	%eax, %r12d
	movl	(%r14), %esi
	movq	%rbx, %rdi
	movl	%eax, %edx
	callq	__il_wr
	movq	_CSR_FH_INT_STATUS@GOTPCREL(%rip), %r14
	movl	(%r14), %esi
	movq	%rbx, %rdi
	callq	__il_rd
	movl	%eax, %r13d
	movl	(%r14), %esi
	movq	%rbx, %rdi
	movl	%eax, %edx
	callq	__il_wr
	movq	%r15, %rdi
	callq	_spin_unlock_irqrestore
	movq	_CSR49_FH_INT_RX_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %r15d
	movq	_CSR_INT_BIT_FH_RX@GOTPCREL(%rip), %rax
	andl	%r13d, %r15d
	je	LBB0_2
## %bb.1:
	movl	(%rax), %r15d
LBB0_2:
	orl	%r12d, %r15d
	movq	_CSR49_FH_INT_TX_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movq	_CSR_INT_BIT_FH_TX@GOTPCREL(%rip), %rcx
	andl	%r13d, %eax
	je	LBB0_4
## %bb.3:
	movl	(%rcx), %eax
LBB0_4:
	orl	%eax, %r15d
	movq	_CSR_INT_BIT_HW_ERR@GOTPCREL(%rip), %rax
	testl	%r15d, (%rax)
	je	LBB0_5
## %bb.31:
	leaq	L_.str(%rip), %rdi
	xorl	%eax, %eax
	callq	_IL_ERR
	movq	%rbx, %rdi
	callq	_il_disable_interrupts
	incl	48(%rbx)
	movq	%rbx, %rdi
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_il_irq_handle_error            ## TAILCALL
LBB0_5:
	movq	_CSR_INT_BIT_SCD@GOTPCREL(%rip), %rax
	movq	_CSR_INT_BIT_ALIVE@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	orl	(%rax), %ecx
	notl	%ecx
	andl	%ecx, %r15d
	movq	_CSR_INT_BIT_RF_KILL@GOTPCREL(%rip), %rax
	testl	%r15d, (%rax)
	je	LBB0_6
## %bb.7:
	movl	%r13d, %r14d
	movq	_CSR_GP_CNTRL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	__il_rd
	movl	%eax, %r13d
	movq	_CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW@GOTPCREL(%rip), %rax
	andl	(%rax), %r13d
	leaq	L_.str.2(%rip), %rax
	leaq	L_.str.3(%rip), %rsi
	cmoveq	%rax, %rsi
	leaq	L_.str.1(%rip), %rdi
	xorl	%eax, %eax
	callq	_IL_WARN
	incl	36(%rbx)
	leaq	8(%rbx), %rsi
	xorl	%r12d, %r12d
	movq	_S_RFKILL@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	testl	%r13d, %r13d
	sete	%r12b
	je	LBB0_8
## %bb.9:
	callq	_clear_bit
	movq	%rbx, %rdi
	movl	$1, %esi
	callq	_il_force_reset
	jmp	LBB0_10
LBB0_6:
	xorl	%r12d, %r12d
	jmp	LBB0_11
LBB0_8:
	callq	_set_bit
LBB0_10:
	movq	72(%rbx), %rax
	movl	(%rax), %edi
	movl	%r12d, %esi
	callq	_wiphy_rfkill_set_hw_state
	movq	_CSR_INT_BIT_RF_KILL@GOTPCREL(%rip), %rax
	movl	(%rax), %r12d
	movl	%r14d, %r13d
LBB0_11:
	movq	_CSR_INT_BIT_CT_KILL@GOTPCREL(%rip), %r14
	testl	%r15d, (%r14)
	je	LBB0_13
## %bb.12:
	leaq	L_.str.4(%rip), %rdi
	xorl	%eax, %eax
	callq	_IL_ERR
	incl	32(%rbx)
	orl	(%r14), %r12d
LBB0_13:
	movq	_CSR_INT_BIT_SW_ERR@GOTPCREL(%rip), %r14
	testl	%r15d, (%r14)
	je	LBB0_15
## %bb.14:
	leaq	L_.str.5(%rip), %rdi
	movl	%r15d, %esi
	xorl	%eax, %eax
	callq	_IL_ERR
	incl	28(%rbx)
	movq	%rbx, %rdi
	callq	_il_irq_handle_error
	orl	(%r14), %r12d
LBB0_15:
	movq	_CSR_INT_BIT_WAKEUP@GOTPCREL(%rip), %rax
	testl	%r15d, (%rax)
	je	LBB0_20
## %bb.16:
	movl	%r13d, -44(%rbp)                ## 4-byte Spill
	leaq	L_.str.6(%rip), %rdi
	xorl	%eax, %eax
	callq	_D_ISR
	leaq	68(%rbx), %rsi
	movq	%rbx, %rdi
	callq	_il_rx_queue_update_write_ptr
	cmpl	$0, 64(%rbx)
	jle	LBB0_19
## %bb.17:
	xorl	%r13d, %r13d
	xorl	%r14d, %r14d
	.p2align	4, 0x90
LBB0_18:                                ## =>This Inner Loop Header: Depth=1
	movq	56(%rbx), %rsi
	addq	%r13, %rsi
	movq	%rbx, %rdi
	callq	_il_txq_update_write_ptr
	incq	%r14
	movslq	64(%rbx), %rax
	addq	$4, %r13
	cmpq	%rax, %r14
	jl	LBB0_18
LBB0_19:
	incl	24(%rbx)
	movq	_CSR_INT_BIT_WAKEUP@GOTPCREL(%rip), %rax
	orl	(%rax), %r12d
	movl	-44(%rbp), %r13d                ## 4-byte Reload
LBB0_20:
	movq	_CSR_INT_BIT_SW_RX@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movq	_CSR_INT_BIT_FH_RX@GOTPCREL(%rip), %r14
	orl	(%r14), %eax
	testl	%r15d, %eax
	je	LBB0_22
## %bb.21:
	movq	%rbx, %rdi
	callq	_il4965_rx_handle
	incl	20(%rbx)
	orl	(%r14), %r12d
	movq	_CSR_INT_BIT_SW_RX@GOTPCREL(%rip), %rax
	orl	(%rax), %r12d
LBB0_22:
	movq	_CSR_INT_BIT_FH_TX@GOTPCREL(%rip), %r14
	testl	%r15d, (%r14)
	je	LBB0_24
## %bb.23:
	leaq	L_.str.7(%rip), %rdi
	xorl	%eax, %eax
	callq	_D_ISR
	incl	16(%rbx)
	orl	(%r14), %r12d
	movl	$1, (%rbx)
	leaq	52(%rbx), %rdi
	callq	_wake_up
LBB0_24:
	movl	%r12d, %esi
	notl	%esi
	andl	%r15d, %esi
	je	LBB0_26
## %bb.25:
	leaq	L_.str.8(%rip), %rdi
	xorl	%eax, %eax
	callq	_IL_ERR
	incl	12(%rbx)
LBB0_26:
	movl	4(%rbx), %eax
	notl	%eax
	andl	%eax, %r15d
	je	LBB0_28
## %bb.27:
	leaq	L_.str.9(%rip), %rdi
	movl	%r15d, %esi
	xorl	%eax, %eax
	callq	_IL_WARN
	leaq	L_.str.10(%rip), %rdi
	movl	%r13d, %esi
	xorl	%eax, %eax
	callq	_IL_WARN
LBB0_28:
	movq	_S_INT_ENABLED@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	leaq	8(%rbx), %rsi
	callq	_test_bit
	testq	%rax, %rax
	je	LBB0_29
## %bb.32:
	movq	%rbx, %rdi
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_il_enable_interrupts           ## TAILCALL
LBB0_29:
	movq	_CSR_INT_BIT_RF_KILL@GOTPCREL(%rip), %rax
	testl	%r12d, (%rax)
	je	LBB0_30
## %bb.33:
	movq	%rbx, %rdi
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_il_enable_rfkill_int           ## TAILCALL
LBB0_30:
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_CSR_INT,4,2                    ## @CSR_INT
	.comm	_CSR_FH_INT_STATUS,4,2          ## @CSR_FH_INT_STATUS
	.comm	_CSR49_FH_INT_RX_MASK,4,2       ## @CSR49_FH_INT_RX_MASK
	.comm	_CSR_INT_BIT_FH_RX,4,2          ## @CSR_INT_BIT_FH_RX
	.comm	_CSR49_FH_INT_TX_MASK,4,2       ## @CSR49_FH_INT_TX_MASK
	.comm	_CSR_INT_BIT_FH_TX,4,2          ## @CSR_INT_BIT_FH_TX
	.comm	_CSR_INT_BIT_HW_ERR,4,2         ## @CSR_INT_BIT_HW_ERR
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"Hardware error detected.  Restarting.\n"

	.comm	_CSR_INT_BIT_SCD,4,2            ## @CSR_INT_BIT_SCD
	.comm	_CSR_INT_BIT_ALIVE,4,2          ## @CSR_INT_BIT_ALIVE
	.comm	_CSR_INT_BIT_RF_KILL,4,2        ## @CSR_INT_BIT_RF_KILL
	.comm	_CSR_GP_CNTRL,4,2               ## @CSR_GP_CNTRL
	.comm	_CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW,4,2 ## @CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW
L_.str.1:                               ## @.str.1
	.asciz	"RF_KILL bit toggled to %s.\n"

L_.str.2:                               ## @.str.2
	.asciz	"disable radio"

L_.str.3:                               ## @.str.3
	.asciz	"enable radio"

	.comm	_S_RFKILL,4,2                   ## @S_RFKILL
	.comm	_CSR_INT_BIT_CT_KILL,4,2        ## @CSR_INT_BIT_CT_KILL
L_.str.4:                               ## @.str.4
	.asciz	"Microcode CT kill error detected.\n"

	.comm	_CSR_INT_BIT_SW_ERR,4,2         ## @CSR_INT_BIT_SW_ERR
L_.str.5:                               ## @.str.5
	.asciz	"Microcode SW error detected.  Restarting 0x%X.\n"

	.comm	_CSR_INT_BIT_WAKEUP,4,2         ## @CSR_INT_BIT_WAKEUP
L_.str.6:                               ## @.str.6
	.asciz	"Wakeup interrupt\n"

	.comm	_CSR_INT_BIT_SW_RX,4,2          ## @CSR_INT_BIT_SW_RX
L_.str.7:                               ## @.str.7
	.asciz	"uCode load interrupt\n"

L_.str.8:                               ## @.str.8
	.asciz	"Unhandled INTA bits 0x%08x\n"

L_.str.9:                               ## @.str.9
	.asciz	"Disabled INTA bits 0x%08x were pending\n"

L_.str.10:                              ## @.str.10
	.asciz	"   with FH49_INT = 0x%08x\n"

	.comm	_S_INT_ENABLED,4,2              ## @S_INT_ENABLED
	.comm	_CSR_INT_MASK,4,2               ## @CSR_INT_MASK
	.comm	_IL_DL_ISR,4,2                  ## @IL_DL_ISR
	.no_dead_strip	_il4965_irq_tasklet
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function il4965_irq_tasklet
_il4965_irq_tasklet:                    ; @il4965_irq_tasklet
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #112
	.cfi_def_cfa_offset 112
	stp	x28, x27, [sp, #16]             ; 16-byte Folded Spill
	stp	x26, x25, [sp, #32]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #48]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #64]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #80]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #96]             ; 16-byte Folded Spill
	add	x29, sp, #96
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	mov	x19, x0
	add	x21, x0, #80
	mov	x0, x21
	bl	_spin_lock_irqsave
Lloh0:
	adrp	x20, _CSR_INT@GOTPAGE
Lloh1:
	ldr	x20, [x20, _CSR_INT@GOTPAGEOFF]
	ldr	w1, [x20]
	mov	x0, x19
	bl	__il_rd
	mov	x22, x0
	ldr	w1, [x20]
	mov	x0, x19
	mov	x2, x22
	bl	__il_wr
Lloh2:
	adrp	x23, _CSR_FH_INT_STATUS@GOTPAGE
Lloh3:
	ldr	x23, [x23, _CSR_FH_INT_STATUS@GOTPAGEOFF]
	ldr	w1, [x23]
	mov	x0, x19
	bl	__il_rd
	mov	x20, x0
	ldr	w1, [x23]
	mov	x0, x19
	mov	x2, x20
	bl	__il_wr
	mov	x0, x21
	bl	_spin_unlock_irqrestore
Lloh4:
	adrp	x8, _CSR49_FH_INT_RX_MASK@GOTPAGE
Lloh5:
	ldr	x8, [x8, _CSR49_FH_INT_RX_MASK@GOTPAGEOFF]
Lloh6:
	adrp	x25, _CSR_INT_BIT_FH_RX@GOTPAGE
Lloh7:
	ldr	x25, [x25, _CSR_INT_BIT_FH_RX@GOTPAGEOFF]
Lloh8:
	ldr	w8, [x8]
	ldr	w9, [x25]
	tst	w8, w20
	csel	w8, wzr, w9, eq
Lloh9:
	adrp	x9, _CSR49_FH_INT_TX_MASK@GOTPAGE
Lloh10:
	ldr	x9, [x9, _CSR49_FH_INT_TX_MASK@GOTPAGEOFF]
	orr	w8, w8, w22
Lloh11:
	ldr	w9, [x9]
Lloh12:
	adrp	x24, _CSR_INT_BIT_FH_TX@GOTPAGE
Lloh13:
	ldr	x24, [x24, _CSR_INT_BIT_FH_TX@GOTPAGEOFF]
	ldr	w10, [x24]
	tst	w9, w20
	csel	w9, wzr, w10, eq
	orr	w8, w8, w9
Lloh14:
	adrp	x9, _CSR_INT_BIT_HW_ERR@GOTPAGE
Lloh15:
	ldr	x9, [x9, _CSR_INT_BIT_HW_ERR@GOTPAGEOFF]
Lloh16:
	ldr	w9, [x9]
	tst	w8, w9
	b.eq	LBB0_2
; %bb.1:
Lloh17:
	adrp	x0, l_.str@PAGE
Lloh18:
	add	x0, x0, l_.str@PAGEOFF
	bl	_IL_ERR
	mov	x0, x19
	bl	_il_disable_interrupts
	ldr	w8, [x19, #48]
	add	w8, w8, #1
	str	w8, [x19, #48]
	mov	x0, x19
	ldp	x29, x30, [sp, #96]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #80]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #64]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #48]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #32]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #112
	b	_il_irq_handle_error
LBB0_2:
Lloh19:
	adrp	x9, _CSR_INT_BIT_SCD@GOTPAGE
Lloh20:
	ldr	x9, [x9, _CSR_INT_BIT_SCD@GOTPAGEOFF]
Lloh21:
	ldr	w9, [x9]
Lloh22:
	adrp	x10, _CSR_INT_BIT_ALIVE@GOTPAGE
Lloh23:
	ldr	x10, [x10, _CSR_INT_BIT_ALIVE@GOTPAGEOFF]
Lloh24:
	ldr	w10, [x10]
	orr	w9, w10, w9
	bic	w23, w8, w9
Lloh25:
	adrp	x22, _CSR_INT_BIT_RF_KILL@GOTPAGE
Lloh26:
	ldr	x22, [x22, _CSR_INT_BIT_RF_KILL@GOTPAGEOFF]
	ldr	w8, [x22]
	tst	w23, w8
	b.eq	LBB0_5
; %bb.3:
Lloh27:
	adrp	x8, _CSR_GP_CNTRL@GOTPAGE
Lloh28:
	ldr	x8, [x8, _CSR_GP_CNTRL@GOTPAGEOFF]
Lloh29:
	ldr	w1, [x8]
	mov	x0, x19
	bl	__il_rd
Lloh30:
	adrp	x8, _CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW@GOTPAGE
Lloh31:
	ldr	x8, [x8, _CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW@GOTPAGEOFF]
Lloh32:
	ldr	w8, [x8]
	ands	w26, w8, w0
	cset	w21, eq
Lloh33:
	adrp	x8, l_.str.3@PAGE
Lloh34:
	add	x8, x8, l_.str.3@PAGEOFF
Lloh35:
	adrp	x9, l_.str.2@PAGE
Lloh36:
	add	x9, x9, l_.str.2@PAGEOFF
	csel	x8, x9, x8, eq
	str	x8, [sp]
Lloh37:
	adrp	x0, l_.str.1@PAGE
Lloh38:
	add	x0, x0, l_.str.1@PAGEOFF
	bl	_IL_WARN
	ldr	w8, [x19, #36]
	add	w8, w8, #1
	str	w8, [x19, #36]
Lloh39:
	adrp	x8, _S_RFKILL@GOTPAGE
Lloh40:
	ldr	x8, [x8, _S_RFKILL@GOTPAGEOFF]
Lloh41:
	ldr	w0, [x8]
	add	x1, x19, #8
	cbz	w26, LBB0_6
; %bb.4:
	bl	_clear_bit
	mov	x0, x19
	mov	w1, #1
	bl	_il_force_reset
	b	LBB0_7
LBB0_5:
	mov	w21, #0
	b	LBB0_8
LBB0_6:
	bl	_set_bit
LBB0_7:
	ldr	x8, [x19, #72]
	ldr	w0, [x8]
	mov	x1, x21
	bl	_wiphy_rfkill_set_hw_state
	ldr	w21, [x22]
LBB0_8:
Lloh42:
	adrp	x26, _CSR_INT_BIT_CT_KILL@GOTPAGE
Lloh43:
	ldr	x26, [x26, _CSR_INT_BIT_CT_KILL@GOTPAGEOFF]
	ldr	w8, [x26]
	tst	w8, w23
	b.eq	LBB0_10
; %bb.9:
Lloh44:
	adrp	x0, l_.str.4@PAGE
Lloh45:
	add	x0, x0, l_.str.4@PAGEOFF
	bl	_IL_ERR
	ldr	w8, [x19, #32]
	add	w8, w8, #1
	str	w8, [x19, #32]
	ldr	w8, [x26]
	orr	w21, w8, w21
LBB0_10:
Lloh46:
	adrp	x26, _CSR_INT_BIT_SW_ERR@GOTPAGE
Lloh47:
	ldr	x26, [x26, _CSR_INT_BIT_SW_ERR@GOTPAGEOFF]
	ldr	w8, [x26]
	tst	w8, w23
	b.eq	LBB0_12
; %bb.11:
	str	x23, [sp]
Lloh48:
	adrp	x0, l_.str.5@PAGE
Lloh49:
	add	x0, x0, l_.str.5@PAGEOFF
	bl	_IL_ERR
	ldr	w8, [x19, #28]
	add	w8, w8, #1
	str	w8, [x19, #28]
	mov	x0, x19
	bl	_il_irq_handle_error
	ldr	w8, [x26]
	orr	w21, w8, w21
LBB0_12:
Lloh50:
	adrp	x26, _CSR_INT_BIT_WAKEUP@GOTPAGE
Lloh51:
	ldr	x26, [x26, _CSR_INT_BIT_WAKEUP@GOTPAGEOFF]
	ldr	w8, [x26]
	tst	w8, w23
	b.eq	LBB0_17
; %bb.13:
Lloh52:
	adrp	x0, l_.str.6@PAGE
Lloh53:
	add	x0, x0, l_.str.6@PAGEOFF
	bl	_D_ISR
	add	x1, x19, #68
	mov	x0, x19
	bl	_il_rx_queue_update_write_ptr
	ldr	w8, [x19, #64]
	cmp	w8, #1
	b.lt	LBB0_16
; %bb.14:
	mov	x27, #0
	mov	x28, #0
LBB0_15:                                ; =>This Inner Loop Header: Depth=1
	ldr	x8, [x19, #56]
	add	x1, x8, x27
	mov	x0, x19
	bl	_il_txq_update_write_ptr
	add	x28, x28, #1
	ldrsw	x8, [x19, #64]
	add	x27, x27, #4
	cmp	x28, x8
	b.lt	LBB0_15
LBB0_16:
	ldr	w8, [x19, #24]
	add	w8, w8, #1
	str	w8, [x19, #24]
	ldr	w8, [x26]
	orr	w21, w8, w21
LBB0_17:
	ldr	w8, [x25]
Lloh54:
	adrp	x26, _CSR_INT_BIT_SW_RX@GOTPAGE
Lloh55:
	ldr	x26, [x26, _CSR_INT_BIT_SW_RX@GOTPAGEOFF]
	ldr	w9, [x26]
	orr	w8, w9, w8
	tst	w8, w23
	b.eq	LBB0_19
; %bb.18:
	mov	x0, x19
	bl	_il4965_rx_handle
	ldr	w8, [x19, #20]
	add	w8, w8, #1
	str	w8, [x19, #20]
	ldr	w8, [x25]
	ldr	w9, [x26]
	orr	w8, w8, w21
	orr	w21, w8, w9
LBB0_19:
	ldr	w8, [x24]
	tst	w8, w23
	b.eq	LBB0_21
; %bb.20:
Lloh56:
	adrp	x0, l_.str.7@PAGE
Lloh57:
	add	x0, x0, l_.str.7@PAGEOFF
	bl	_D_ISR
	ldr	w8, [x19, #16]
	add	w8, w8, #1
	str	w8, [x19, #16]
	ldr	w8, [x24]
	orr	w21, w8, w21
	mov	w8, #1
	str	w8, [x19]
	add	x0, x19, #52
	bl	_wake_up
LBB0_21:
	bics	w8, w23, w21
	b.eq	LBB0_23
; %bb.22:
	str	x8, [sp]
Lloh58:
	adrp	x0, l_.str.8@PAGE
Lloh59:
	add	x0, x0, l_.str.8@PAGEOFF
	bl	_IL_ERR
	ldr	w8, [x19, #12]
	add	w8, w8, #1
	str	w8, [x19, #12]
LBB0_23:
	ldr	w8, [x19, #4]
	bics	w8, w23, w8
	b.eq	LBB0_25
; %bb.24:
	str	x8, [sp]
Lloh60:
	adrp	x0, l_.str.9@PAGE
Lloh61:
	add	x0, x0, l_.str.9@PAGEOFF
	bl	_IL_WARN
	str	x20, [sp]
Lloh62:
	adrp	x0, l_.str.10@PAGE
Lloh63:
	add	x0, x0, l_.str.10@PAGEOFF
	bl	_IL_WARN
LBB0_25:
Lloh64:
	adrp	x8, _S_INT_ENABLED@GOTPAGE
Lloh65:
	ldr	x8, [x8, _S_INT_ENABLED@GOTPAGEOFF]
Lloh66:
	ldr	w0, [x8]
	add	x1, x19, #8
	bl	_test_bit
	cbz	x0, LBB0_27
; %bb.26:
	mov	x0, x19
	ldp	x29, x30, [sp, #96]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #80]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #64]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #48]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #32]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #112
	b	_il_enable_interrupts
LBB0_27:
	ldr	w8, [x22]
	tst	w8, w21
	b.eq	LBB0_29
; %bb.28:
	mov	x0, x19
	ldp	x29, x30, [sp, #96]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #80]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #64]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #48]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #32]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #112
	b	_il_enable_rfkill_int
LBB0_29:
	ldp	x29, x30, [sp, #96]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #80]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #64]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #48]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #32]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #112
	ret
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh16
	.loh AdrpLdrGot	Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGot	Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh4, Lloh5, Lloh8
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpAdd	Lloh17, Lloh18
	.loh AdrpLdrGot	Lloh25, Lloh26
	.loh AdrpLdrGotLdr	Lloh22, Lloh23, Lloh24
	.loh AdrpLdrGotLdr	Lloh19, Lloh20, Lloh21
	.loh AdrpLdrGotLdr	Lloh39, Lloh40, Lloh41
	.loh AdrpAdd	Lloh37, Lloh38
	.loh AdrpAdd	Lloh35, Lloh36
	.loh AdrpAdd	Lloh33, Lloh34
	.loh AdrpLdrGotLdr	Lloh30, Lloh31, Lloh32
	.loh AdrpLdrGotLdr	Lloh27, Lloh28, Lloh29
	.loh AdrpLdrGot	Lloh42, Lloh43
	.loh AdrpAdd	Lloh44, Lloh45
	.loh AdrpLdrGot	Lloh46, Lloh47
	.loh AdrpAdd	Lloh48, Lloh49
	.loh AdrpLdrGot	Lloh50, Lloh51
	.loh AdrpAdd	Lloh52, Lloh53
	.loh AdrpLdrGot	Lloh54, Lloh55
	.loh AdrpAdd	Lloh56, Lloh57
	.loh AdrpAdd	Lloh58, Lloh59
	.loh AdrpAdd	Lloh62, Lloh63
	.loh AdrpAdd	Lloh60, Lloh61
	.loh AdrpLdrGotLdr	Lloh64, Lloh65, Lloh66
	.cfi_endproc
                                        ; -- End function
	.comm	_CSR_INT,4,2                    ; @CSR_INT
	.comm	_CSR_FH_INT_STATUS,4,2          ; @CSR_FH_INT_STATUS
	.comm	_CSR49_FH_INT_RX_MASK,4,2       ; @CSR49_FH_INT_RX_MASK
	.comm	_CSR_INT_BIT_FH_RX,4,2          ; @CSR_INT_BIT_FH_RX
	.comm	_CSR49_FH_INT_TX_MASK,4,2       ; @CSR49_FH_INT_TX_MASK
	.comm	_CSR_INT_BIT_FH_TX,4,2          ; @CSR_INT_BIT_FH_TX
	.comm	_CSR_INT_BIT_HW_ERR,4,2         ; @CSR_INT_BIT_HW_ERR
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"Hardware error detected.  Restarting.\n"

	.comm	_CSR_INT_BIT_SCD,4,2            ; @CSR_INT_BIT_SCD
	.comm	_CSR_INT_BIT_ALIVE,4,2          ; @CSR_INT_BIT_ALIVE
	.comm	_CSR_INT_BIT_RF_KILL,4,2        ; @CSR_INT_BIT_RF_KILL
	.comm	_CSR_GP_CNTRL,4,2               ; @CSR_GP_CNTRL
	.comm	_CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW,4,2 ; @CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW
l_.str.1:                               ; @.str.1
	.asciz	"RF_KILL bit toggled to %s.\n"

l_.str.2:                               ; @.str.2
	.asciz	"disable radio"

l_.str.3:                               ; @.str.3
	.asciz	"enable radio"

	.comm	_S_RFKILL,4,2                   ; @S_RFKILL
	.comm	_CSR_INT_BIT_CT_KILL,4,2        ; @CSR_INT_BIT_CT_KILL
l_.str.4:                               ; @.str.4
	.asciz	"Microcode CT kill error detected.\n"

	.comm	_CSR_INT_BIT_SW_ERR,4,2         ; @CSR_INT_BIT_SW_ERR
l_.str.5:                               ; @.str.5
	.asciz	"Microcode SW error detected.  Restarting 0x%X.\n"

	.comm	_CSR_INT_BIT_WAKEUP,4,2         ; @CSR_INT_BIT_WAKEUP
l_.str.6:                               ; @.str.6
	.asciz	"Wakeup interrupt\n"

	.comm	_CSR_INT_BIT_SW_RX,4,2          ; @CSR_INT_BIT_SW_RX
l_.str.7:                               ; @.str.7
	.asciz	"uCode load interrupt\n"

l_.str.8:                               ; @.str.8
	.asciz	"Unhandled INTA bits 0x%08x\n"

l_.str.9:                               ; @.str.9
	.asciz	"Disabled INTA bits 0x%08x were pending\n"

l_.str.10:                              ; @.str.10
	.asciz	"   with FH49_INT = 0x%08x\n"

	.comm	_S_INT_ENABLED,4,2              ; @S_INT_ENABLED
	.comm	_CSR_INT_MASK,4,2               ; @CSR_INT_MASK
	.comm	_IL_DL_ISR,4,2                  ; @IL_DL_ISR
	.no_dead_strip	_il4965_irq_tasklet
.subsections_via_symbols
