	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function imx6_pcie_enable_ref_clk
_imx6_pcie_enable_ref_clk:              ## @imx6_pcie_enable_ref_clk
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %rbx
	movq	16(%rdi), %rax
	movl	(%rax), %eax
	leal	-131(%rax), %ecx
	cmpl	$2, %ecx
	jb	LBB0_7
## %bb.1:
	movq	24(%rbx), %rcx
	movq	(%rcx), %r15
	cmpl	$128, %eax
	je	LBB0_8
## %bb.2:
	xorl	%r14d, %r14d
	cmpl	$130, %eax
	jne	LBB0_12
## %bb.3:
	movl	8(%rbx), %edi
	callq	_clk_prepare_enable
	testl	%eax, %eax
	je	LBB0_6
## %bb.4:
	movl	%eax, %r14d
	leaq	L_.str(%rip), %rsi
	jmp	LBB0_5
LBB0_7:
	movl	(%rbx), %edi
	movq	_IOMUXC_GPR1@GOTPCREL(%rip), %r15
	movl	(%r15), %esi
	movq	_IMX6Q_GPR1_PCIE_TEST_PD@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	xorl	%r14d, %r14d
	xorl	%ecx, %ecx
	callq	_regmap_update_bits
	movl	$10, %edi
	movl	$100, %esi
	callq	_usleep_range
	movl	(%rbx), %edi
	movl	(%r15), %esi
	movq	_IMX6Q_GPR1_PCIE_REF_CLK_EN@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movl	$65536, %ecx                    ## imm = 0x10000
LBB0_11:
	callq	_regmap_update_bits
	jmp	LBB0_12
LBB0_8:
	movl	4(%rbx), %edi
	callq	_clk_prepare_enable
	testl	%eax, %eax
	je	LBB0_10
## %bb.9:
	movl	%eax, %r14d
	leaq	L_.str.1(%rip), %rsi
LBB0_5:
	movq	%r15, %rdi
	callq	_dev_err
LBB0_12:
	movl	%r14d, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_6:
	movl	(%rbx), %edi
	movq	_IOMUXC_GPR12@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_IMX6SX_GPR12_PCIE_TEST_POWERDOWN@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	xorl	%r14d, %r14d
	xorl	%ecx, %ecx
	jmp	LBB0_11
LBB0_10:
	movq	%rbx, %rdi
	callq	_imx6_pcie_grp_offset
	movl	%eax, %r15d
	movl	(%rbx), %edi
	movq	_IMX8MQ_GPR_PCIE_CLK_REQ_OVERRIDE@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	xorl	%r14d, %r14d
	movl	%r15d, %esi
	xorl	%ecx, %ecx
	callq	_regmap_update_bits
	movl	(%rbx), %edi
	movq	_IMX8MQ_GPR_PCIE_CLK_REQ_OVERRIDE_EN@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movl	%r15d, %esi
	movl	%ecx, %edx
	jmp	LBB0_11
	.cfi_endproc
                                        ## -- End function
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"unable to enable pcie_axi clock\n"

	.comm	_IOMUXC_GPR12,4,2               ## @IOMUXC_GPR12
	.comm	_IMX6SX_GPR12_PCIE_TEST_POWERDOWN,4,2 ## @IMX6SX_GPR12_PCIE_TEST_POWERDOWN
	.comm	_IOMUXC_GPR1,4,2                ## @IOMUXC_GPR1
	.comm	_IMX6Q_GPR1_PCIE_TEST_PD,4,2    ## @IMX6Q_GPR1_PCIE_TEST_PD
	.comm	_IMX6Q_GPR1_PCIE_REF_CLK_EN,4,2 ## @IMX6Q_GPR1_PCIE_REF_CLK_EN
L_.str.1:                               ## @.str.1
	.asciz	"unable to enable pcie_aux clock\n"

	.comm	_IMX8MQ_GPR_PCIE_CLK_REQ_OVERRIDE,4,2 ## @IMX8MQ_GPR_PCIE_CLK_REQ_OVERRIDE
	.comm	_IMX8MQ_GPR_PCIE_CLK_REQ_OVERRIDE_EN,4,2 ## @IMX8MQ_GPR_PCIE_CLK_REQ_OVERRIDE_EN
	.no_dead_strip	_imx6_pcie_enable_ref_clk
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function imx6_pcie_enable_ref_clk
_imx6_pcie_enable_ref_clk:              ; @imx6_pcie_enable_ref_clk
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x0
	ldr	x8, [x0, #16]
	ldr	w8, [x8]
	sub	w9, w8, #131
	cmp	w9, #2
	b.lo	LBB0_5
; %bb.1:
	ldr	x9, [x19, #24]
	ldr	x21, [x9]
	cmp	w8, #128
	b.eq	LBB0_8
; %bb.2:
	cmp	w8, #130
	b.ne	LBB0_7
; %bb.3:
	ldr	w0, [x19, #8]
	bl	_clk_prepare_enable
	mov	x20, x0
	cbz	w0, LBB0_11
; %bb.4:
Lloh0:
	adrp	x1, l_.str@PAGE
Lloh1:
	add	x1, x1, l_.str@PAGEOFF
	b	LBB0_10
LBB0_5:
	ldr	w0, [x19]
Lloh2:
	adrp	x20, _IOMUXC_GPR1@GOTPAGE
Lloh3:
	ldr	x20, [x20, _IOMUXC_GPR1@GOTPAGEOFF]
	ldr	w1, [x20]
Lloh4:
	adrp	x8, _IMX6Q_GPR1_PCIE_TEST_PD@GOTPAGE
Lloh5:
	ldr	x8, [x8, _IMX6Q_GPR1_PCIE_TEST_PD@GOTPAGEOFF]
Lloh6:
	ldr	w2, [x8]
	mov	w3, #0
	bl	_regmap_update_bits
	mov	w0, #10
	mov	w1, #100
	bl	_usleep_range
	ldr	w0, [x19]
	ldr	w1, [x20]
Lloh7:
	adrp	x8, _IMX6Q_GPR1_PCIE_REF_CLK_EN@GOTPAGE
Lloh8:
	ldr	x8, [x8, _IMX6Q_GPR1_PCIE_REF_CLK_EN@GOTPAGEOFF]
Lloh9:
	ldr	w2, [x8]
	mov	w3, #65536
LBB0_6:
	bl	_regmap_update_bits
LBB0_7:
	mov	w20, #0
	b	LBB0_12
LBB0_8:
	ldr	w0, [x19, #4]
	bl	_clk_prepare_enable
	cbz	w0, LBB0_13
; %bb.9:
	mov	x20, x0
Lloh10:
	adrp	x1, l_.str.1@PAGE
Lloh11:
	add	x1, x1, l_.str.1@PAGEOFF
LBB0_10:
	mov	x0, x21
	bl	_dev_err
	b	LBB0_12
LBB0_11:
	ldr	w0, [x19]
Lloh12:
	adrp	x8, _IOMUXC_GPR12@GOTPAGE
Lloh13:
	ldr	x8, [x8, _IOMUXC_GPR12@GOTPAGEOFF]
Lloh14:
	ldr	w1, [x8]
Lloh15:
	adrp	x8, _IMX6SX_GPR12_PCIE_TEST_POWERDOWN@GOTPAGE
Lloh16:
	ldr	x8, [x8, _IMX6SX_GPR12_PCIE_TEST_POWERDOWN@GOTPAGEOFF]
Lloh17:
	ldr	w2, [x8]
	mov	w3, #0
	bl	_regmap_update_bits
LBB0_12:
	mov	x0, x20
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
LBB0_13:
	mov	x0, x19
	bl	_imx6_pcie_grp_offset
	mov	x20, x0
	ldr	w0, [x19]
Lloh18:
	adrp	x8, _IMX8MQ_GPR_PCIE_CLK_REQ_OVERRIDE@GOTPAGE
Lloh19:
	ldr	x8, [x8, _IMX8MQ_GPR_PCIE_CLK_REQ_OVERRIDE@GOTPAGEOFF]
Lloh20:
	ldr	w2, [x8]
	mov	x1, x20
	mov	w3, #0
	bl	_regmap_update_bits
	ldr	w0, [x19]
Lloh21:
	adrp	x8, _IMX8MQ_GPR_PCIE_CLK_REQ_OVERRIDE_EN@GOTPAGE
Lloh22:
	ldr	x8, [x8, _IMX8MQ_GPR_PCIE_CLK_REQ_OVERRIDE_EN@GOTPAGEOFF]
Lloh23:
	ldr	w2, [x8]
	mov	x1, x20
	mov	x3, x2
	b	LBB0_6
	.loh AdrpAdd	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh7, Lloh8, Lloh9
	.loh AdrpLdrGotLdr	Lloh4, Lloh5, Lloh6
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpAdd	Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.cfi_endproc
                                        ; -- End function
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"unable to enable pcie_axi clock\n"

	.comm	_IOMUXC_GPR12,4,2               ; @IOMUXC_GPR12
	.comm	_IMX6SX_GPR12_PCIE_TEST_POWERDOWN,4,2 ; @IMX6SX_GPR12_PCIE_TEST_POWERDOWN
	.comm	_IOMUXC_GPR1,4,2                ; @IOMUXC_GPR1
	.comm	_IMX6Q_GPR1_PCIE_TEST_PD,4,2    ; @IMX6Q_GPR1_PCIE_TEST_PD
	.comm	_IMX6Q_GPR1_PCIE_REF_CLK_EN,4,2 ; @IMX6Q_GPR1_PCIE_REF_CLK_EN
l_.str.1:                               ; @.str.1
	.asciz	"unable to enable pcie_aux clock\n"

	.comm	_IMX8MQ_GPR_PCIE_CLK_REQ_OVERRIDE,4,2 ; @IMX8MQ_GPR_PCIE_CLK_REQ_OVERRIDE
	.comm	_IMX8MQ_GPR_PCIE_CLK_REQ_OVERRIDE_EN,4,2 ; @IMX8MQ_GPR_PCIE_CLK_REQ_OVERRIDE_EN
	.no_dead_strip	_imx6_pcie_enable_ref_clk
.subsections_via_symbols
