	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function pmic_gpio_config_set
_pmic_gpio_config_set:                  ## @pmic_gpio_config_set
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$24, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%ecx, %r12d
	movq	%rdx, %r13
	movl	%esi, %r15d
	movq	%rdi, %rbx
	callq	_pinctrl_dev_get_drvdata
	movq	%rax, -48(%rbp)                 ## 8-byte Spill
	movq	(%rbx), %rax
	movq	(%rax), %rax
	movl	%r15d, %ecx
	movq	(%rax,%rcx,8), %rbx
	movl	$1, (%rbx)
	testl	%r12d, %r12d
	je	LBB0_32
## %bb.1:
	movl	%r12d, %eax
	movq	%rax, -56(%rbp)                 ## 8-byte Spill
	xorl	%r14d, %r14d
	leaq	LJTI0_0(%rip), %r15
	jmp	LBB0_6
LBB0_20:                                ##   in Loop: Header=BB0_6 Depth=1
	movq	%r12, %rbx
	movl	$1, 24(%r12)
	movl	%eax, 28(%r12)
	.p2align	4, 0x90
LBB0_5:                                 ##   in Loop: Header=BB0_6 Depth=1
	incq	%r14
	cmpq	%r14, -56(%rbp)                 ## 8-byte Folded Reload
	je	LBB0_32
LBB0_6:                                 ## =>This Inner Loop Header: Depth=1
	movq	%rbx, %r12
	movq	(%r13,%r14,8), %rdi
	callq	_pinconf_to_config_param
	movl	%eax, %ebx
	movq	(%r13,%r14,8), %rdi
	callq	_pinconf_to_config_argument
	addl	$-128, %ebx
	cmpl	$14, %ebx
	ja	LBB0_38
## %bb.7:                               ##   in Loop: Header=BB0_6 Depth=1
	movslq	(%r15,%rbx,4), %rcx
	addq	%r15, %rcx
	jmpq	*%rcx
LBB0_8:                                 ##   in Loop: Header=BB0_6 Depth=1
	movq	_PMIC_GPIO_STRENGTH_LOW@GOTPCREL(%rip), %rcx
	cmpl	(%rcx), %eax
	ja	LBB0_38
## %bb.9:                               ##   in Loop: Header=BB0_6 Depth=1
	movq	%r12, %rbx
	movl	%eax, 32(%r12)
	jmp	LBB0_5
LBB0_10:                                ##   in Loop: Header=BB0_6 Depth=1
	movq	_PMIC_GPIO_PULL_UP_1P5_30@GOTPCREL(%rip), %rcx
	cmpl	(%rcx), %eax
	jbe	LBB0_4
	jmp	LBB0_38
LBB0_11:                                ##   in Loop: Header=BB0_6 Depth=1
	cmpl	$5, %eax
	jae	LBB0_38
## %bb.12:                              ##   in Loop: Header=BB0_6 Depth=1
	movq	%r12, %rbx
	movl	%eax, 44(%r12)
	jmp	LBB0_5
LBB0_13:                                ##   in Loop: Header=BB0_6 Depth=1
	cmpq	$0, 56(%r12)
	je	LBB0_38
## %bb.14:                              ##   in Loop: Header=BB0_6 Depth=1
	cmpl	$5, %eax
	jae	LBB0_38
## %bb.15:                              ##   in Loop: Header=BB0_6 Depth=1
	movq	%r12, %rbx
	movl	%eax, 36(%r12)
	jmp	LBB0_5
LBB0_16:                                ##   in Loop: Header=BB0_6 Depth=1
	cmpq	$0, 56(%r12)
	je	LBB0_38
## %bb.17:                              ##   in Loop: Header=BB0_6 Depth=1
	movq	%r12, %rbx
	movl	$1, 40(%r12)
	jmp	LBB0_5
LBB0_18:                                ##   in Loop: Header=BB0_6 Depth=1
	cmpl	12(%r12), %eax
	jae	LBB0_38
## %bb.19:                              ##   in Loop: Header=BB0_6 Depth=1
	movq	%r12, %rbx
	movl	%eax, 16(%r12)
	jmp	LBB0_5
LBB0_21:                                ##   in Loop: Header=BB0_6 Depth=1
	xorl	%ecx, %ecx
	testl	%eax, %eax
	setne	%cl
	movq	%r12, %rbx
	movl	%ecx, 20(%r12)
	jmp	LBB0_5
LBB0_22:                                ##   in Loop: Header=BB0_6 Depth=1
	movq	_PMIC_GPIO_OUT_BUF_CMOS@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movq	%r12, %rbx
	movl	%eax, 4(%r12)
	jmp	LBB0_5
LBB0_23:                                ##   in Loop: Header=BB0_6 Depth=1
	cmpl	$0, 64(%r12)
	je	LBB0_38
## %bb.24:                              ##   in Loop: Header=BB0_6 Depth=1
	movq	%r12, %rbx
	movq	_PMIC_GPIO_OUT_BUF_OPEN_DRAIN_PMOS@GOTPCREL(%rip), %rax
	jmp	LBB0_27
LBB0_25:                                ##   in Loop: Header=BB0_6 Depth=1
	cmpl	$0, 64(%r12)
	je	LBB0_38
## %bb.26:                              ##   in Loop: Header=BB0_6 Depth=1
	movq	%r12, %rbx
	movq	_PMIC_GPIO_OUT_BUF_OPEN_DRAIN_NMOS@GOTPCREL(%rip), %rax
LBB0_27:                                ##   in Loop: Header=BB0_6 Depth=1
	movl	(%rax), %eax
	movl	%eax, 4(%rbx)
	jmp	LBB0_5
LBB0_28:                                ##   in Loop: Header=BB0_6 Depth=1
	movq	_PMIC_GPIO_PULL_UP_30@GOTPCREL(%rip), %rax
	jmp	LBB0_3
LBB0_29:                                ##   in Loop: Header=BB0_6 Depth=1
	testl	%eax, %eax
	je	LBB0_2
## %bb.30:                              ##   in Loop: Header=BB0_6 Depth=1
	movq	_PMIC_GPIO_PULL_DOWN@GOTPCREL(%rip), %rax
	jmp	LBB0_3
LBB0_2:                                 ##   in Loop: Header=BB0_6 Depth=1
	movq	_PMIC_GPIO_PULL_DISABLE@GOTPCREL(%rip), %rax
LBB0_3:                                 ##   in Loop: Header=BB0_6 Depth=1
	movl	(%rax), %eax
LBB0_4:                                 ##   in Loop: Header=BB0_6 Depth=1
	movq	%r12, %rbx
	movl	%eax, 8(%r12)
	jmp	LBB0_5
LBB0_31:                                ##   in Loop: Header=BB0_6 Depth=1
	movq	%r12, %rbx
	movl	$0, (%r12)
	jmp	LBB0_5
LBB0_32:
	movl	16(%rbx), %eax
	movq	_PMIC_GPIO_REG_VIN_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shll	%cl, %eax
	movq	_PMIC_GPIO_REG_DIG_VIN_CTL@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	movq	-48(%rbp), %r15                 ## 8-byte Reload
	movq	%r15, %rdi
	movq	%rbx, %rsi
	movl	%eax, %ecx
	callq	_pmic_gpio_write
	testl	%eax, %eax
	js	LBB0_54
## %bb.33:
	movl	8(%rbx), %eax
	movq	_PMIC_GPIO_REG_PULL_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shll	%cl, %eax
	movq	_PMIC_GPIO_REG_DIG_PULL_CTL@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	movq	%r15, %rdi
	movq	%rbx, %rsi
	movl	%eax, %ecx
	callq	_pmic_gpio_write
	testl	%eax, %eax
	js	LBB0_54
## %bb.34:
	movq	_PMIC_GPIO_REG_OUT_TYPE_SHIFT@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	movl	4(%rbx), %edx
	movl	32(%rbx), %eax
	shll	%cl, %edx
	movq	_PMIC_GPIO_REG_OUT_STRENGTH_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shll	%cl, %eax
	orl	%edx, %eax
	movq	_PMIC_GPIO_REG_DIG_OUT_CTL@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	movq	%r15, %rdi
	movq	%rbx, %rsi
	movl	%eax, %ecx
	callq	_pmic_gpio_write
	testl	%eax, %eax
	js	LBB0_54
## %bb.35:
	movl	44(%rbx), %ecx
	testl	%ecx, %ecx
	je	LBB0_39
## %bb.36:
	decl	%ecx
	cmpq	$0, 56(%rbx)
	je	LBB0_40
## %bb.37:
	movq	_PMIC_GPIO_LV_MV_DIG_IN_DTEST_EN@GOTPCREL(%rip), %rax
	orl	(%rax), %ecx
	jmp	LBB0_41
LBB0_38:
	movq	_EINVAL@GOTPCREL(%rip), %rcx
	xorl	%eax, %eax
	subl	(%rcx), %eax
	jmp	LBB0_54
LBB0_39:
	xorl	%ecx, %ecx
	jmp	LBB0_41
LBB0_40:
	movl	%ecx, %edi
	callq	_BIT
	movl	%eax, %ecx
LBB0_41:
	movq	_PMIC_GPIO_REG_DIG_IN_CTL@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r15, %rdi
	movq	%rbx, %rsi
	callq	_pmic_gpio_write
	testl	%eax, %eax
	js	LBB0_54
## %bb.42:
	cmpl	$0, 40(%rbx)
	je	LBB0_48
## %bb.43:
	movq	_PMIC_GPIO_MODE_ANALOG_PASS_THRU@GOTPCREL(%rip), %rax
LBB0_44:
	movl	(%rax), %eax
	cmpq	$0, 56(%rbx)
	je	LBB0_51
## %bb.45:
	movq	_PMIC_GPIO_REG_MODE_CTL@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	movq	%r15, %rdi
	movq	%rbx, %rsi
	movl	%eax, %ecx
	callq	_pmic_gpio_write
	testl	%eax, %eax
	js	LBB0_54
## %bb.46:
	movl	36(%rbx), %ecx
	decl	%ecx
	movq	_PMIC_GPIO_REG_LV_MV_ANA_PASS_THRU_SEL@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r15, %rdi
	movq	%rbx, %rsi
	callq	_pmic_gpio_write
	testl	%eax, %eax
	js	LBB0_54
## %bb.47:
	movl	28(%rbx), %eax
	movq	_PMIC_GPIO_LV_MV_OUTPUT_INVERT_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shll	%cl, %eax
	movq	_PMIC_GPIO_LV_MV_OUTPUT_SOURCE_SEL_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	andl	48(%rbx), %ecx
	orl	%eax, %ecx
	movq	_PMIC_GPIO_REG_LV_MV_DIG_OUT_SOURCE_CTL@GOTPCREL(%rip), %rax
	jmp	LBB0_52
LBB0_48:
	cmpl	$0, 24(%rbx)
	je	LBB0_55
## %bb.49:
	cmpl	$0, 20(%rbx)
	je	LBB0_56
## %bb.50:
	movq	_PMIC_GPIO_MODE_DIGITAL_INPUT_OUTPUT@GOTPCREL(%rip), %rax
	jmp	LBB0_44
LBB0_51:
	movq	_PMIC_GPIO_REG_MODE_DIR_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shll	%cl, %eax
	movl	48(%rbx), %edx
	movq	_PMIC_GPIO_REG_MODE_FUNCTION_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shll	%cl, %edx
	movq	_PMIC_GPIO_REG_MODE_VALUE_SHIFT@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	andl	28(%rbx), %ecx
	orl	%eax, %ecx
	orl	%edx, %ecx
	movq	_PMIC_GPIO_REG_MODE_CTL@GOTPCREL(%rip), %rax
LBB0_52:
	movl	(%rax), %edx
	movq	%r15, %rdi
	movq	%rbx, %rsi
	callq	_pmic_gpio_write
	testl	%eax, %eax
	js	LBB0_54
## %bb.53:
	movl	(%rbx), %eax
	movq	_PMIC_GPIO_REG_MASTER_EN_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shll	%cl, %eax
	movq	_PMIC_GPIO_REG_EN_CTL@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	movq	%r15, %rdi
	movq	%rbx, %rsi
	movl	%eax, %ecx
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_pmic_gpio_write                ## TAILCALL
LBB0_54:
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_55:
	movq	_PMIC_GPIO_MODE_DIGITAL_INPUT@GOTPCREL(%rip), %rax
	jmp	LBB0_44
LBB0_56:
	movq	_PMIC_GPIO_MODE_DIGITAL_OUTPUT@GOTPCREL(%rip), %rax
	jmp	LBB0_44
	.cfi_endproc
	.p2align	2, 0x90
	.data_region jt32
.set L0_0_set_8, LBB0_8-LJTI0_0
.set L0_0_set_10, LBB0_10-LJTI0_0
.set L0_0_set_11, LBB0_11-LJTI0_0
.set L0_0_set_13, LBB0_13-LJTI0_0
.set L0_0_set_16, LBB0_16-LJTI0_0
.set L0_0_set_18, LBB0_18-LJTI0_0
.set L0_0_set_20, LBB0_20-LJTI0_0
.set L0_0_set_21, LBB0_21-LJTI0_0
.set L0_0_set_22, LBB0_22-LJTI0_0
.set L0_0_set_23, LBB0_23-LJTI0_0
.set L0_0_set_25, LBB0_25-LJTI0_0
.set L0_0_set_28, LBB0_28-LJTI0_0
.set L0_0_set_29, LBB0_29-LJTI0_0
.set L0_0_set_31, LBB0_31-LJTI0_0
.set L0_0_set_2, LBB0_2-LJTI0_0
LJTI0_0:
	.long	L0_0_set_8
	.long	L0_0_set_10
	.long	L0_0_set_11
	.long	L0_0_set_13
	.long	L0_0_set_16
	.long	L0_0_set_18
	.long	L0_0_set_20
	.long	L0_0_set_21
	.long	L0_0_set_22
	.long	L0_0_set_23
	.long	L0_0_set_25
	.long	L0_0_set_28
	.long	L0_0_set_29
	.long	L0_0_set_31
	.long	L0_0_set_2
	.end_data_region
                                        ## -- End function
	.comm	_PMIC_GPIO_OUT_BUF_CMOS,4,2     ## @PMIC_GPIO_OUT_BUF_CMOS
	.comm	_EINVAL,4,2                     ## @EINVAL
	.comm	_PMIC_GPIO_OUT_BUF_OPEN_DRAIN_NMOS,4,2 ## @PMIC_GPIO_OUT_BUF_OPEN_DRAIN_NMOS
	.comm	_PMIC_GPIO_OUT_BUF_OPEN_DRAIN_PMOS,4,2 ## @PMIC_GPIO_OUT_BUF_OPEN_DRAIN_PMOS
	.comm	_PMIC_GPIO_PULL_DISABLE,8,3     ## @PMIC_GPIO_PULL_DISABLE
	.comm	_PMIC_GPIO_PULL_UP_30,4,2       ## @PMIC_GPIO_PULL_UP_30
	.comm	_PMIC_GPIO_PULL_DOWN,4,2        ## @PMIC_GPIO_PULL_DOWN
	.comm	_PMIC_GPIO_PULL_UP_1P5_30,4,2   ## @PMIC_GPIO_PULL_UP_1P5_30
	.comm	_PMIC_GPIO_STRENGTH_LOW,4,2     ## @PMIC_GPIO_STRENGTH_LOW
	.comm	_PMIC_GPIO_REG_VIN_SHIFT,4,2    ## @PMIC_GPIO_REG_VIN_SHIFT
	.comm	_PMIC_GPIO_REG_DIG_VIN_CTL,4,2  ## @PMIC_GPIO_REG_DIG_VIN_CTL
	.comm	_PMIC_GPIO_REG_PULL_SHIFT,4,2   ## @PMIC_GPIO_REG_PULL_SHIFT
	.comm	_PMIC_GPIO_REG_DIG_PULL_CTL,4,2 ## @PMIC_GPIO_REG_DIG_PULL_CTL
	.comm	_PMIC_GPIO_REG_OUT_TYPE_SHIFT,4,2 ## @PMIC_GPIO_REG_OUT_TYPE_SHIFT
	.comm	_PMIC_GPIO_REG_OUT_STRENGTH_SHIFT,4,2 ## @PMIC_GPIO_REG_OUT_STRENGTH_SHIFT
	.comm	_PMIC_GPIO_REG_DIG_OUT_CTL,4,2  ## @PMIC_GPIO_REG_DIG_OUT_CTL
	.comm	_PMIC_GPIO_LV_MV_DIG_IN_DTEST_EN,4,2 ## @PMIC_GPIO_LV_MV_DIG_IN_DTEST_EN
	.comm	_PMIC_GPIO_REG_DIG_IN_CTL,4,2   ## @PMIC_GPIO_REG_DIG_IN_CTL
	.comm	_PMIC_GPIO_MODE_ANALOG_PASS_THRU,4,2 ## @PMIC_GPIO_MODE_ANALOG_PASS_THRU
	.comm	_PMIC_GPIO_MODE_DIGITAL_INPUT_OUTPUT,4,2 ## @PMIC_GPIO_MODE_DIGITAL_INPUT_OUTPUT
	.comm	_PMIC_GPIO_MODE_DIGITAL_OUTPUT,4,2 ## @PMIC_GPIO_MODE_DIGITAL_OUTPUT
	.comm	_PMIC_GPIO_MODE_DIGITAL_INPUT,4,2 ## @PMIC_GPIO_MODE_DIGITAL_INPUT
	.comm	_PMIC_GPIO_REG_MODE_CTL,4,2     ## @PMIC_GPIO_REG_MODE_CTL
	.comm	_PMIC_GPIO_REG_LV_MV_ANA_PASS_THRU_SEL,4,2 ## @PMIC_GPIO_REG_LV_MV_ANA_PASS_THRU_SEL
	.comm	_PMIC_GPIO_LV_MV_OUTPUT_INVERT_SHIFT,4,2 ## @PMIC_GPIO_LV_MV_OUTPUT_INVERT_SHIFT
	.comm	_PMIC_GPIO_LV_MV_OUTPUT_SOURCE_SEL_MASK,4,2 ## @PMIC_GPIO_LV_MV_OUTPUT_SOURCE_SEL_MASK
	.comm	_PMIC_GPIO_REG_LV_MV_DIG_OUT_SOURCE_CTL,4,2 ## @PMIC_GPIO_REG_LV_MV_DIG_OUT_SOURCE_CTL
	.comm	_PMIC_GPIO_REG_MODE_DIR_SHIFT,4,2 ## @PMIC_GPIO_REG_MODE_DIR_SHIFT
	.comm	_PMIC_GPIO_REG_MODE_FUNCTION_SHIFT,4,2 ## @PMIC_GPIO_REG_MODE_FUNCTION_SHIFT
	.comm	_PMIC_GPIO_REG_MODE_VALUE_SHIFT,4,2 ## @PMIC_GPIO_REG_MODE_VALUE_SHIFT
	.comm	_PMIC_GPIO_REG_MASTER_EN_SHIFT,4,2 ## @PMIC_GPIO_REG_MASTER_EN_SHIFT
	.comm	_PMIC_GPIO_REG_EN_CTL,4,2       ## @PMIC_GPIO_REG_EN_CTL
	.no_dead_strip	_pmic_gpio_config_set
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function pmic_gpio_config_set
_pmic_gpio_config_set:                  ; @pmic_gpio_config_set
	.cfi_startproc
; %bb.0:
	stp	x28, x27, [sp, #-96]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 96
	stp	x26, x25, [sp, #16]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #32]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #48]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #64]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #80]             ; 16-byte Folded Spill
	add	x29, sp, #80
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	mov	x22, x3
	mov	x21, x2
	mov	x20, x1
	mov	x23, x0
	bl	_pinctrl_dev_get_drvdata
	mov	x19, x0
	ldr	x8, [x23]
	ldr	x8, [x8]
	ldr	x20, [x8, w20, uxtw #3]
	mov	w23, #1
	str	w23, [x20]
	cbz	w22, LBB0_30
; %bb.1:
	mov	w24, w22
Lloh0:
	adrp	x27, _PMIC_GPIO_OUT_BUF_CMOS@GOTPAGE
Lloh1:
	ldr	x27, [x27, _PMIC_GPIO_OUT_BUF_CMOS@GOTPAGEOFF]
Lloh2:
	adrp	x25, lJTI0_0@PAGE
Lloh3:
	add	x25, x25, lJTI0_0@PAGEOFF
Lloh4:
	adrp	x26, _PMIC_GPIO_PULL_UP_30@GOTPAGE
Lloh5:
	ldr	x26, [x26, _PMIC_GPIO_PULL_UP_30@GOTPAGEOFF]
Lloh6:
	adrp	x28, _PMIC_GPIO_PULL_DISABLE@GOTPAGE
Lloh7:
	ldr	x28, [x28, _PMIC_GPIO_PULL_DISABLE@GOTPAGEOFF]
	b	LBB0_5
LBB0_2:                                 ;   in Loop: Header=BB0_5 Depth=1
	ldr	w8, [x27]
LBB0_3:                                 ;   in Loop: Header=BB0_5 Depth=1
	str	w8, [x20, #4]
LBB0_4:                                 ;   in Loop: Header=BB0_5 Depth=1
	add	x21, x21, #8
	subs	x24, x24, #1
	b.eq	LBB0_30
LBB0_5:                                 ; =>This Inner Loop Header: Depth=1
	ldr	x0, [x21]
	bl	_pinconf_to_config_param
	mov	x22, x0
	ldr	x0, [x21]
	bl	_pinconf_to_config_argument
	sub	w8, w22, #128
	cmp	w8, #14
	b.hi	LBB0_36
; %bb.6:                                ;   in Loop: Header=BB0_5 Depth=1
	adr	x9, LBB0_2
	ldrb	w10, [x25, x8]
	add	x9, x9, x10, lsl #2
	br	x9
LBB0_7:                                 ;   in Loop: Header=BB0_5 Depth=1
Lloh8:
	adrp	x8, _PMIC_GPIO_STRENGTH_LOW@GOTPAGE
Lloh9:
	ldr	x8, [x8, _PMIC_GPIO_STRENGTH_LOW@GOTPAGEOFF]
Lloh10:
	ldr	w8, [x8]
	cmp	w0, w8
	b.hi	LBB0_36
; %bb.8:                                ;   in Loop: Header=BB0_5 Depth=1
	str	w0, [x20, #32]
	b	LBB0_4
LBB0_9:                                 ;   in Loop: Header=BB0_5 Depth=1
Lloh11:
	adrp	x8, _PMIC_GPIO_PULL_UP_1P5_30@GOTPAGE
Lloh12:
	ldr	x8, [x8, _PMIC_GPIO_PULL_UP_1P5_30@GOTPAGEOFF]
Lloh13:
	ldr	w8, [x8]
	cmp	w0, w8
	b.hi	LBB0_36
; %bb.10:                               ;   in Loop: Header=BB0_5 Depth=1
	str	w0, [x20, #8]
	b	LBB0_4
LBB0_11:                                ;   in Loop: Header=BB0_5 Depth=1
	cmp	w0, #5
	b.hs	LBB0_36
; %bb.12:                               ;   in Loop: Header=BB0_5 Depth=1
	str	w0, [x20, #44]
	b	LBB0_4
LBB0_13:                                ;   in Loop: Header=BB0_5 Depth=1
	ldr	x8, [x20, #56]
	cmp	x8, #0
	ccmp	w0, #5, #2, ne
	b.hs	LBB0_36
; %bb.14:                               ;   in Loop: Header=BB0_5 Depth=1
	str	w0, [x20, #36]
	b	LBB0_4
LBB0_15:                                ;   in Loop: Header=BB0_5 Depth=1
	ldr	x8, [x20, #56]
	cbz	x8, LBB0_36
; %bb.16:                               ;   in Loop: Header=BB0_5 Depth=1
	str	w23, [x20, #40]
	b	LBB0_4
LBB0_17:                                ;   in Loop: Header=BB0_5 Depth=1
	ldr	w8, [x20, #12]
	cmp	w0, w8
	b.hs	LBB0_36
; %bb.18:                               ;   in Loop: Header=BB0_5 Depth=1
	str	w0, [x20, #16]
	b	LBB0_4
LBB0_19:                                ;   in Loop: Header=BB0_5 Depth=1
	stp	w23, w0, [x20, #24]
	b	LBB0_4
LBB0_20:                                ;   in Loop: Header=BB0_5 Depth=1
	cmp	w0, #0
	cset	w8, ne
	str	w8, [x20, #20]
	b	LBB0_4
LBB0_21:                                ;   in Loop: Header=BB0_5 Depth=1
	ldr	w8, [x20, #64]
	cbz	w8, LBB0_36
; %bb.22:                               ;   in Loop: Header=BB0_5 Depth=1
Lloh14:
	adrp	x8, _PMIC_GPIO_OUT_BUF_OPEN_DRAIN_PMOS@GOTPAGE
Lloh15:
	ldr	x8, [x8, _PMIC_GPIO_OUT_BUF_OPEN_DRAIN_PMOS@GOTPAGEOFF]
Lloh16:
	ldr	w8, [x8]
	b	LBB0_3
LBB0_23:                                ;   in Loop: Header=BB0_5 Depth=1
	ldr	w8, [x20, #64]
	cbz	w8, LBB0_36
; %bb.24:                               ;   in Loop: Header=BB0_5 Depth=1
Lloh17:
	adrp	x8, _PMIC_GPIO_OUT_BUF_OPEN_DRAIN_NMOS@GOTPAGE
Lloh18:
	ldr	x8, [x8, _PMIC_GPIO_OUT_BUF_OPEN_DRAIN_NMOS@GOTPAGEOFF]
Lloh19:
	ldr	w8, [x8]
	b	LBB0_3
LBB0_25:                                ;   in Loop: Header=BB0_5 Depth=1
	ldr	w8, [x26]
	str	w8, [x20, #8]
	b	LBB0_4
LBB0_26:                                ;   in Loop: Header=BB0_5 Depth=1
	cbz	w0, LBB0_28
; %bb.27:                               ;   in Loop: Header=BB0_5 Depth=1
Lloh20:
	adrp	x8, _PMIC_GPIO_PULL_DOWN@GOTPAGE
Lloh21:
	ldr	x8, [x8, _PMIC_GPIO_PULL_DOWN@GOTPAGEOFF]
Lloh22:
	ldr	w8, [x8]
	str	w8, [x20, #8]
	b	LBB0_4
LBB0_28:                                ;   in Loop: Header=BB0_5 Depth=1
	ldr	x8, [x28]
	str	w8, [x20, #8]
	b	LBB0_4
LBB0_29:                                ;   in Loop: Header=BB0_5 Depth=1
	str	wzr, [x20]
	b	LBB0_4
LBB0_30:
Lloh23:
	adrp	x8, _PMIC_GPIO_REG_VIN_SHIFT@GOTPAGE
Lloh24:
	ldr	x8, [x8, _PMIC_GPIO_REG_VIN_SHIFT@GOTPAGEOFF]
	ldr	w9, [x20, #16]
Lloh25:
	ldr	w8, [x8]
	lsl	w3, w9, w8
Lloh26:
	adrp	x8, _PMIC_GPIO_REG_DIG_VIN_CTL@GOTPAGE
Lloh27:
	ldr	x8, [x8, _PMIC_GPIO_REG_DIG_VIN_CTL@GOTPAGEOFF]
Lloh28:
	ldr	w2, [x8]
	mov	x0, x19
	mov	x1, x20
	bl	_pmic_gpio_write
	tbnz	w0, #31, LBB0_52
; %bb.31:
Lloh29:
	adrp	x8, _PMIC_GPIO_REG_PULL_SHIFT@GOTPAGE
Lloh30:
	ldr	x8, [x8, _PMIC_GPIO_REG_PULL_SHIFT@GOTPAGEOFF]
	ldr	w9, [x20, #8]
Lloh31:
	ldr	w8, [x8]
	lsl	w3, w9, w8
Lloh32:
	adrp	x8, _PMIC_GPIO_REG_DIG_PULL_CTL@GOTPAGE
Lloh33:
	ldr	x8, [x8, _PMIC_GPIO_REG_DIG_PULL_CTL@GOTPAGEOFF]
Lloh34:
	ldr	w2, [x8]
	mov	x0, x19
	mov	x1, x20
	bl	_pmic_gpio_write
	tbnz	w0, #31, LBB0_52
; %bb.32:
Lloh35:
	adrp	x8, _PMIC_GPIO_REG_OUT_TYPE_SHIFT@GOTPAGE
Lloh36:
	ldr	x8, [x8, _PMIC_GPIO_REG_OUT_TYPE_SHIFT@GOTPAGEOFF]
	ldr	w9, [x20, #4]
Lloh37:
	ldr	w8, [x8]
	lsl	w8, w9, w8
	ldr	w9, [x20, #32]
Lloh38:
	adrp	x10, _PMIC_GPIO_REG_OUT_STRENGTH_SHIFT@GOTPAGE
Lloh39:
	ldr	x10, [x10, _PMIC_GPIO_REG_OUT_STRENGTH_SHIFT@GOTPAGEOFF]
Lloh40:
	ldr	w10, [x10]
	lsl	w9, w9, w10
	orr	w3, w9, w8
Lloh41:
	adrp	x8, _PMIC_GPIO_REG_DIG_OUT_CTL@GOTPAGE
Lloh42:
	ldr	x8, [x8, _PMIC_GPIO_REG_DIG_OUT_CTL@GOTPAGEOFF]
Lloh43:
	ldr	w2, [x8]
	mov	x0, x19
	mov	x1, x20
	bl	_pmic_gpio_write
	tbnz	w0, #31, LBB0_52
; %bb.33:
	ldr	w8, [x20, #44]
	cbz	w8, LBB0_37
; %bb.34:
	ldr	x9, [x20, #56]
	sub	w0, w8, #1
	cbz	x9, LBB0_38
; %bb.35:
Lloh44:
	adrp	x8, _PMIC_GPIO_LV_MV_DIG_IN_DTEST_EN@GOTPAGE
Lloh45:
	ldr	x8, [x8, _PMIC_GPIO_LV_MV_DIG_IN_DTEST_EN@GOTPAGEOFF]
Lloh46:
	ldr	w8, [x8]
	orr	w3, w8, w0
	b	LBB0_39
LBB0_36:
Lloh47:
	adrp	x8, _EINVAL@GOTPAGE
Lloh48:
	ldr	x8, [x8, _EINVAL@GOTPAGEOFF]
Lloh49:
	ldr	w8, [x8]
	neg	w0, w8
	b	LBB0_52
LBB0_37:
	mov	w3, #0
	b	LBB0_39
LBB0_38:
	bl	_BIT
	mov	x3, x0
LBB0_39:
Lloh50:
	adrp	x8, _PMIC_GPIO_REG_DIG_IN_CTL@GOTPAGE
Lloh51:
	ldr	x8, [x8, _PMIC_GPIO_REG_DIG_IN_CTL@GOTPAGEOFF]
Lloh52:
	ldr	w2, [x8]
	mov	x0, x19
	mov	x1, x20
	bl	_pmic_gpio_write
	tbnz	w0, #31, LBB0_52
; %bb.40:
	ldr	w8, [x20, #40]
	cbz	w8, LBB0_46
; %bb.41:
Lloh53:
	adrp	x8, _PMIC_GPIO_MODE_ANALOG_PASS_THRU@GOTPAGE
Lloh54:
	ldr	x8, [x8, _PMIC_GPIO_MODE_ANALOG_PASS_THRU@GOTPAGEOFF]
LBB0_42:
	ldr	w3, [x8]
	ldr	x8, [x20, #56]
	cbz	x8, LBB0_49
; %bb.43:
Lloh55:
	adrp	x8, _PMIC_GPIO_REG_MODE_CTL@GOTPAGE
Lloh56:
	ldr	x8, [x8, _PMIC_GPIO_REG_MODE_CTL@GOTPAGEOFF]
Lloh57:
	ldr	w2, [x8]
	mov	x0, x19
	mov	x1, x20
	bl	_pmic_gpio_write
	tbnz	w0, #31, LBB0_52
; %bb.44:
	ldr	w8, [x20, #36]
	sub	w3, w8, #1
Lloh58:
	adrp	x8, _PMIC_GPIO_REG_LV_MV_ANA_PASS_THRU_SEL@GOTPAGE
Lloh59:
	ldr	x8, [x8, _PMIC_GPIO_REG_LV_MV_ANA_PASS_THRU_SEL@GOTPAGEOFF]
Lloh60:
	ldr	w2, [x8]
	mov	x0, x19
	mov	x1, x20
	bl	_pmic_gpio_write
	tbnz	w0, #31, LBB0_52
; %bb.45:
Lloh61:
	adrp	x8, _PMIC_GPIO_LV_MV_OUTPUT_INVERT_SHIFT@GOTPAGE
Lloh62:
	ldr	x8, [x8, _PMIC_GPIO_LV_MV_OUTPUT_INVERT_SHIFT@GOTPAGEOFF]
	ldr	w9, [x20, #28]
Lloh63:
	ldr	w8, [x8]
	lsl	w8, w9, w8
	ldr	w9, [x20, #48]
Lloh64:
	adrp	x10, _PMIC_GPIO_LV_MV_OUTPUT_SOURCE_SEL_MASK@GOTPAGE
Lloh65:
	ldr	x10, [x10, _PMIC_GPIO_LV_MV_OUTPUT_SOURCE_SEL_MASK@GOTPAGEOFF]
Lloh66:
	ldr	w10, [x10]
	and	w9, w10, w9
	orr	w3, w9, w8
Lloh67:
	adrp	x8, _PMIC_GPIO_REG_LV_MV_DIG_OUT_SOURCE_CTL@GOTPAGE
Lloh68:
	ldr	x8, [x8, _PMIC_GPIO_REG_LV_MV_DIG_OUT_SOURCE_CTL@GOTPAGEOFF]
	b	LBB0_50
LBB0_46:
	ldr	w8, [x20, #24]
	cbz	w8, LBB0_53
; %bb.47:
	ldr	w8, [x20, #20]
	cbz	w8, LBB0_54
; %bb.48:
Lloh69:
	adrp	x8, _PMIC_GPIO_MODE_DIGITAL_INPUT_OUTPUT@GOTPAGE
Lloh70:
	ldr	x8, [x8, _PMIC_GPIO_MODE_DIGITAL_INPUT_OUTPUT@GOTPAGEOFF]
	b	LBB0_42
LBB0_49:
Lloh71:
	adrp	x8, _PMIC_GPIO_REG_MODE_DIR_SHIFT@GOTPAGE
Lloh72:
	ldr	x8, [x8, _PMIC_GPIO_REG_MODE_DIR_SHIFT@GOTPAGEOFF]
Lloh73:
	ldr	w8, [x8]
	lsl	w8, w3, w8
	ldr	w9, [x20, #48]
Lloh74:
	adrp	x10, _PMIC_GPIO_REG_MODE_FUNCTION_SHIFT@GOTPAGE
Lloh75:
	ldr	x10, [x10, _PMIC_GPIO_REG_MODE_FUNCTION_SHIFT@GOTPAGEOFF]
Lloh76:
	ldr	w10, [x10]
	lsl	w9, w9, w10
	orr	w8, w9, w8
	ldr	w9, [x20, #28]
Lloh77:
	adrp	x10, _PMIC_GPIO_REG_MODE_VALUE_SHIFT@GOTPAGE
Lloh78:
	ldr	x10, [x10, _PMIC_GPIO_REG_MODE_VALUE_SHIFT@GOTPAGEOFF]
Lloh79:
	ldr	w10, [x10]
	and	w9, w10, w9
	orr	w3, w8, w9
Lloh80:
	adrp	x8, _PMIC_GPIO_REG_MODE_CTL@GOTPAGE
Lloh81:
	ldr	x8, [x8, _PMIC_GPIO_REG_MODE_CTL@GOTPAGEOFF]
LBB0_50:
	ldr	w2, [x8]
	mov	x0, x19
	mov	x1, x20
	bl	_pmic_gpio_write
	tbnz	w0, #31, LBB0_52
; %bb.51:
	ldr	w8, [x20]
Lloh82:
	adrp	x9, _PMIC_GPIO_REG_MASTER_EN_SHIFT@GOTPAGE
Lloh83:
	ldr	x9, [x9, _PMIC_GPIO_REG_MASTER_EN_SHIFT@GOTPAGEOFF]
Lloh84:
	ldr	w9, [x9]
Lloh85:
	adrp	x10, _PMIC_GPIO_REG_EN_CTL@GOTPAGE
Lloh86:
	ldr	x10, [x10, _PMIC_GPIO_REG_EN_CTL@GOTPAGEOFF]
	lsl	w3, w8, w9
Lloh87:
	ldr	w2, [x10]
	mov	x0, x19
	mov	x1, x20
	ldp	x29, x30, [sp, #80]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #64]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #48]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #32]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #16]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp], #96             ; 16-byte Folded Reload
	b	_pmic_gpio_write
LBB0_52:
	ldp	x29, x30, [sp, #80]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #64]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #48]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #32]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #16]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp], #96             ; 16-byte Folded Reload
	ret
LBB0_53:
Lloh88:
	adrp	x8, _PMIC_GPIO_MODE_DIGITAL_INPUT@GOTPAGE
Lloh89:
	ldr	x8, [x8, _PMIC_GPIO_MODE_DIGITAL_INPUT@GOTPAGEOFF]
	b	LBB0_42
LBB0_54:
Lloh90:
	adrp	x8, _PMIC_GPIO_MODE_DIGITAL_OUTPUT@GOTPAGE
Lloh91:
	ldr	x8, [x8, _PMIC_GPIO_MODE_DIGITAL_OUTPUT@GOTPAGEOFF]
	b	LBB0_42
	.loh AdrpLdrGot	Lloh6, Lloh7
	.loh AdrpLdrGot	Lloh4, Lloh5
	.loh AdrpAdd	Lloh2, Lloh3
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh16
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh19
	.loh AdrpLdrGotLdr	Lloh20, Lloh21, Lloh22
	.loh AdrpLdrGotLdr	Lloh26, Lloh27, Lloh28
	.loh AdrpLdrGotLdr	Lloh23, Lloh24, Lloh25
	.loh AdrpLdrGotLdr	Lloh32, Lloh33, Lloh34
	.loh AdrpLdrGotLdr	Lloh29, Lloh30, Lloh31
	.loh AdrpLdrGotLdr	Lloh41, Lloh42, Lloh43
	.loh AdrpLdrGotLdr	Lloh38, Lloh39, Lloh40
	.loh AdrpLdrGotLdr	Lloh35, Lloh36, Lloh37
	.loh AdrpLdrGotLdr	Lloh44, Lloh45, Lloh46
	.loh AdrpLdrGotLdr	Lloh47, Lloh48, Lloh49
	.loh AdrpLdrGotLdr	Lloh50, Lloh51, Lloh52
	.loh AdrpLdrGot	Lloh53, Lloh54
	.loh AdrpLdrGotLdr	Lloh55, Lloh56, Lloh57
	.loh AdrpLdrGotLdr	Lloh58, Lloh59, Lloh60
	.loh AdrpLdrGot	Lloh67, Lloh68
	.loh AdrpLdrGotLdr	Lloh64, Lloh65, Lloh66
	.loh AdrpLdrGotLdr	Lloh61, Lloh62, Lloh63
	.loh AdrpLdrGot	Lloh69, Lloh70
	.loh AdrpLdrGot	Lloh80, Lloh81
	.loh AdrpLdrGotLdr	Lloh77, Lloh78, Lloh79
	.loh AdrpLdrGotLdr	Lloh74, Lloh75, Lloh76
	.loh AdrpLdrGotLdr	Lloh71, Lloh72, Lloh73
	.loh AdrpLdrGotLdr	Lloh85, Lloh86, Lloh87
	.loh AdrpLdrGotLdr	Lloh82, Lloh83, Lloh84
	.loh AdrpLdrGot	Lloh88, Lloh89
	.loh AdrpLdrGot	Lloh90, Lloh91
	.cfi_endproc
	.section	__TEXT,__const
lJTI0_0:
	.byte	(LBB0_7-LBB0_2)>>2
	.byte	(LBB0_9-LBB0_2)>>2
	.byte	(LBB0_11-LBB0_2)>>2
	.byte	(LBB0_13-LBB0_2)>>2
	.byte	(LBB0_15-LBB0_2)>>2
	.byte	(LBB0_17-LBB0_2)>>2
	.byte	(LBB0_19-LBB0_2)>>2
	.byte	(LBB0_20-LBB0_2)>>2
	.byte	(LBB0_2-LBB0_2)>>2
	.byte	(LBB0_21-LBB0_2)>>2
	.byte	(LBB0_23-LBB0_2)>>2
	.byte	(LBB0_25-LBB0_2)>>2
	.byte	(LBB0_26-LBB0_2)>>2
	.byte	(LBB0_29-LBB0_2)>>2
	.byte	(LBB0_28-LBB0_2)>>2
                                        ; -- End function
	.comm	_PMIC_GPIO_OUT_BUF_CMOS,4,2     ; @PMIC_GPIO_OUT_BUF_CMOS
	.comm	_EINVAL,4,2                     ; @EINVAL
	.comm	_PMIC_GPIO_OUT_BUF_OPEN_DRAIN_NMOS,4,2 ; @PMIC_GPIO_OUT_BUF_OPEN_DRAIN_NMOS
	.comm	_PMIC_GPIO_OUT_BUF_OPEN_DRAIN_PMOS,4,2 ; @PMIC_GPIO_OUT_BUF_OPEN_DRAIN_PMOS
	.comm	_PMIC_GPIO_PULL_DISABLE,8,3     ; @PMIC_GPIO_PULL_DISABLE
	.comm	_PMIC_GPIO_PULL_UP_30,4,2       ; @PMIC_GPIO_PULL_UP_30
	.comm	_PMIC_GPIO_PULL_DOWN,4,2        ; @PMIC_GPIO_PULL_DOWN
	.comm	_PMIC_GPIO_PULL_UP_1P5_30,4,2   ; @PMIC_GPIO_PULL_UP_1P5_30
	.comm	_PMIC_GPIO_STRENGTH_LOW,4,2     ; @PMIC_GPIO_STRENGTH_LOW
	.comm	_PMIC_GPIO_REG_VIN_SHIFT,4,2    ; @PMIC_GPIO_REG_VIN_SHIFT
	.comm	_PMIC_GPIO_REG_DIG_VIN_CTL,4,2  ; @PMIC_GPIO_REG_DIG_VIN_CTL
	.comm	_PMIC_GPIO_REG_PULL_SHIFT,4,2   ; @PMIC_GPIO_REG_PULL_SHIFT
	.comm	_PMIC_GPIO_REG_DIG_PULL_CTL,4,2 ; @PMIC_GPIO_REG_DIG_PULL_CTL
	.comm	_PMIC_GPIO_REG_OUT_TYPE_SHIFT,4,2 ; @PMIC_GPIO_REG_OUT_TYPE_SHIFT
	.comm	_PMIC_GPIO_REG_OUT_STRENGTH_SHIFT,4,2 ; @PMIC_GPIO_REG_OUT_STRENGTH_SHIFT
	.comm	_PMIC_GPIO_REG_DIG_OUT_CTL,4,2  ; @PMIC_GPIO_REG_DIG_OUT_CTL
	.comm	_PMIC_GPIO_LV_MV_DIG_IN_DTEST_EN,4,2 ; @PMIC_GPIO_LV_MV_DIG_IN_DTEST_EN
	.comm	_PMIC_GPIO_REG_DIG_IN_CTL,4,2   ; @PMIC_GPIO_REG_DIG_IN_CTL
	.comm	_PMIC_GPIO_MODE_ANALOG_PASS_THRU,4,2 ; @PMIC_GPIO_MODE_ANALOG_PASS_THRU
	.comm	_PMIC_GPIO_MODE_DIGITAL_INPUT_OUTPUT,4,2 ; @PMIC_GPIO_MODE_DIGITAL_INPUT_OUTPUT
	.comm	_PMIC_GPIO_MODE_DIGITAL_OUTPUT,4,2 ; @PMIC_GPIO_MODE_DIGITAL_OUTPUT
	.comm	_PMIC_GPIO_MODE_DIGITAL_INPUT,4,2 ; @PMIC_GPIO_MODE_DIGITAL_INPUT
	.comm	_PMIC_GPIO_REG_MODE_CTL,4,2     ; @PMIC_GPIO_REG_MODE_CTL
	.comm	_PMIC_GPIO_REG_LV_MV_ANA_PASS_THRU_SEL,4,2 ; @PMIC_GPIO_REG_LV_MV_ANA_PASS_THRU_SEL
	.comm	_PMIC_GPIO_LV_MV_OUTPUT_INVERT_SHIFT,4,2 ; @PMIC_GPIO_LV_MV_OUTPUT_INVERT_SHIFT
	.comm	_PMIC_GPIO_LV_MV_OUTPUT_SOURCE_SEL_MASK,4,2 ; @PMIC_GPIO_LV_MV_OUTPUT_SOURCE_SEL_MASK
	.comm	_PMIC_GPIO_REG_LV_MV_DIG_OUT_SOURCE_CTL,4,2 ; @PMIC_GPIO_REG_LV_MV_DIG_OUT_SOURCE_CTL
	.comm	_PMIC_GPIO_REG_MODE_DIR_SHIFT,4,2 ; @PMIC_GPIO_REG_MODE_DIR_SHIFT
	.comm	_PMIC_GPIO_REG_MODE_FUNCTION_SHIFT,4,2 ; @PMIC_GPIO_REG_MODE_FUNCTION_SHIFT
	.comm	_PMIC_GPIO_REG_MODE_VALUE_SHIFT,4,2 ; @PMIC_GPIO_REG_MODE_VALUE_SHIFT
	.comm	_PMIC_GPIO_REG_MASTER_EN_SHIFT,4,2 ; @PMIC_GPIO_REG_MASTER_EN_SHIFT
	.comm	_PMIC_GPIO_REG_EN_CTL,4,2       ; @PMIC_GPIO_REG_EN_CTL
	.no_dead_strip	_pmic_gpio_config_set
.subsections_via_symbols
