	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function rt61pci_config_erp
_rt61pci_config_erp:                    ## @rt61pci_config_erp
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%edx, %r15d
	movq	%rsi, %r14
	movq	%rdi, %r12
	movq	_TXRX_CSR0@GOTPCREL(%rip), %r13
	movl	(%r13), %esi
	callq	_rt2x00mmio_register_read
	movl	%eax, -44(%rbp)
	movq	_TXRX_CSR0_RX_ACK_TIMEOUT@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	leaq	-44(%rbp), %rbx
	movq	%rbx, %rdi
	movl	$50, %edx
	callq	_rt2x00_set_field32
	movq	_TXRX_CSR0_TSF_OFFSET@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_IEEE80211_HEADER@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	callq	_rt2x00_set_field32
	movl	(%r13), %esi
	movl	-44(%rbp), %edx
	movq	%r12, %rdi
	callq	_rt2x00mmio_register_write
	movq	_BSS_CHANGED_ERP_PREAMBLE@GOTPCREL(%rip), %rax
	testl	%r15d, (%rax)
	je	LBB0_2
## %bb.1:
	movq	_TXRX_CSR4@GOTPCREL(%rip), %r13
	movl	(%r13), %esi
	movq	%r12, %rdi
	callq	_rt2x00mmio_register_read
	movl	%eax, -44(%rbp)
	movq	_TXRX_CSR4_AUTORESPOND_ENABLE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	leaq	-44(%rbp), %rbx
	movq	%rbx, %rdi
	movl	$1, %edx
	callq	_rt2x00_set_field32
	movq	_TXRX_CSR4_AUTORESPOND_PREAMBLE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	xorl	%edx, %edx
	cmpl	$0, 20(%r14)
	setne	%dl
	movq	%rbx, %rdi
	callq	_rt2x00_set_field32
	movl	(%r13), %esi
	movl	-44(%rbp), %edx
	movq	%r12, %rdi
	callq	_rt2x00mmio_register_write
LBB0_2:
	movq	_BSS_CHANGED_BASIC_RATES@GOTPCREL(%rip), %rax
	testl	%r15d, (%rax)
	je	LBB0_4
## %bb.3:
	movq	_TXRX_CSR5@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	(%r14), %edx
	movq	%r12, %rdi
	callq	_rt2x00mmio_register_write
LBB0_4:
	movq	_BSS_CHANGED_BEACON_INT@GOTPCREL(%rip), %rax
	testl	%r15d, (%rax)
	je	LBB0_6
## %bb.5:
	movq	_TXRX_CSR9@GOTPCREL(%rip), %rbx
	movl	(%rbx), %esi
	movq	%r12, %rdi
	callq	_rt2x00mmio_register_read
	movl	%eax, -44(%rbp)
	movq	_TXRX_CSR9_BEACON_INTERVAL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	4(%r14), %edx
	shll	$4, %edx
	leaq	-44(%rbp), %rdi
	callq	_rt2x00_set_field32
	movl	(%rbx), %esi
	movl	-44(%rbp), %edx
	movq	%r12, %rdi
	callq	_rt2x00mmio_register_write
LBB0_6:
	movq	_BSS_CHANGED_ERP_SLOT@GOTPCREL(%rip), %rax
	testl	%r15d, (%rax)
	je	LBB0_8
## %bb.7:
	movq	_MAC_CSR9@GOTPCREL(%rip), %rbx
	movl	(%rbx), %esi
	movq	%r12, %rdi
	callq	_rt2x00mmio_register_read
	movl	%eax, -44(%rbp)
	movq	_MAC_CSR9_SLOT_TIME@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	8(%r14), %edx
	leaq	-44(%rbp), %r15
	movq	%r15, %rdi
	callq	_rt2x00_set_field32
	movl	(%rbx), %esi
	movl	-44(%rbp), %edx
	movq	%r12, %rdi
	callq	_rt2x00mmio_register_write
	movq	_MAC_CSR8@GOTPCREL(%rip), %rbx
	movl	(%rbx), %esi
	movq	%r12, %rdi
	callq	_rt2x00mmio_register_read
	movl	%eax, -44(%rbp)
	movq	_MAC_CSR8_SIFS@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	12(%r14), %edx
	movq	%r15, %rdi
	callq	_rt2x00_set_field32
	movq	_MAC_CSR8_SIFS_AFTER_RX_OFDM@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r15, %rdi
	movl	$3, %edx
	callq	_rt2x00_set_field32
	movq	_MAC_CSR8_EIFS@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	16(%r14), %edx
	movq	%r15, %rdi
	callq	_rt2x00_set_field32
	movl	(%rbx), %esi
	movl	-44(%rbp), %edx
	movq	%r12, %rdi
	callq	_rt2x00mmio_register_write
LBB0_8:
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_TXRX_CSR0,4,2                  ## @TXRX_CSR0
	.comm	_TXRX_CSR0_RX_ACK_TIMEOUT,4,2   ## @TXRX_CSR0_RX_ACK_TIMEOUT
	.comm	_TXRX_CSR0_TSF_OFFSET,4,2       ## @TXRX_CSR0_TSF_OFFSET
	.comm	_IEEE80211_HEADER,4,2           ## @IEEE80211_HEADER
	.comm	_BSS_CHANGED_ERP_PREAMBLE,4,2   ## @BSS_CHANGED_ERP_PREAMBLE
	.comm	_TXRX_CSR4,4,2                  ## @TXRX_CSR4
	.comm	_TXRX_CSR4_AUTORESPOND_ENABLE,4,2 ## @TXRX_CSR4_AUTORESPOND_ENABLE
	.comm	_TXRX_CSR4_AUTORESPOND_PREAMBLE,4,2 ## @TXRX_CSR4_AUTORESPOND_PREAMBLE
	.comm	_BSS_CHANGED_BASIC_RATES,4,2    ## @BSS_CHANGED_BASIC_RATES
	.comm	_TXRX_CSR5,4,2                  ## @TXRX_CSR5
	.comm	_BSS_CHANGED_BEACON_INT,4,2     ## @BSS_CHANGED_BEACON_INT
	.comm	_TXRX_CSR9,4,2                  ## @TXRX_CSR9
	.comm	_TXRX_CSR9_BEACON_INTERVAL,4,2  ## @TXRX_CSR9_BEACON_INTERVAL
	.comm	_BSS_CHANGED_ERP_SLOT,4,2       ## @BSS_CHANGED_ERP_SLOT
	.comm	_MAC_CSR9,4,2                   ## @MAC_CSR9
	.comm	_MAC_CSR9_SLOT_TIME,4,2         ## @MAC_CSR9_SLOT_TIME
	.comm	_MAC_CSR8,4,2                   ## @MAC_CSR8
	.comm	_MAC_CSR8_SIFS,4,2              ## @MAC_CSR8_SIFS
	.comm	_MAC_CSR8_SIFS_AFTER_RX_OFDM,4,2 ## @MAC_CSR8_SIFS_AFTER_RX_OFDM
	.comm	_MAC_CSR8_EIFS,4,2              ## @MAC_CSR8_EIFS
	.no_dead_strip	_rt61pci_config_erp
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function rt61pci_config_erp
_rt61pci_config_erp:                    ; @rt61pci_config_erp
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #64
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x21, x2
	mov	x20, x1
	mov	x19, x0
Lloh0:
	adrp	x22, _TXRX_CSR0@GOTPAGE
Lloh1:
	ldr	x22, [x22, _TXRX_CSR0@GOTPAGEOFF]
	ldr	w1, [x22]
	bl	_rt2x00mmio_register_read
	str	w0, [sp, #12]
Lloh2:
	adrp	x8, _TXRX_CSR0_RX_ACK_TIMEOUT@GOTPAGE
Lloh3:
	ldr	x8, [x8, _TXRX_CSR0_RX_ACK_TIMEOUT@GOTPAGEOFF]
Lloh4:
	ldr	w1, [x8]
	add	x0, sp, #12
	mov	w2, #50
	bl	_rt2x00_set_field32
Lloh5:
	adrp	x8, _TXRX_CSR0_TSF_OFFSET@GOTPAGE
Lloh6:
	ldr	x8, [x8, _TXRX_CSR0_TSF_OFFSET@GOTPAGEOFF]
Lloh7:
	ldr	w1, [x8]
Lloh8:
	adrp	x8, _IEEE80211_HEADER@GOTPAGE
Lloh9:
	ldr	x8, [x8, _IEEE80211_HEADER@GOTPAGEOFF]
Lloh10:
	ldr	w2, [x8]
	add	x0, sp, #12
	bl	_rt2x00_set_field32
	ldr	w1, [x22]
	ldr	w2, [sp, #12]
	mov	x0, x19
	bl	_rt2x00mmio_register_write
Lloh11:
	adrp	x8, _BSS_CHANGED_ERP_PREAMBLE@GOTPAGE
Lloh12:
	ldr	x8, [x8, _BSS_CHANGED_ERP_PREAMBLE@GOTPAGEOFF]
Lloh13:
	ldr	w8, [x8]
	tst	w8, w21
	b.eq	LBB0_2
; %bb.1:
Lloh14:
	adrp	x22, _TXRX_CSR4@GOTPAGE
Lloh15:
	ldr	x22, [x22, _TXRX_CSR4@GOTPAGEOFF]
	ldr	w1, [x22]
	mov	x0, x19
	bl	_rt2x00mmio_register_read
	str	w0, [sp, #12]
Lloh16:
	adrp	x8, _TXRX_CSR4_AUTORESPOND_ENABLE@GOTPAGE
Lloh17:
	ldr	x8, [x8, _TXRX_CSR4_AUTORESPOND_ENABLE@GOTPAGEOFF]
Lloh18:
	ldr	w1, [x8]
	add	x0, sp, #12
	mov	w2, #1
	bl	_rt2x00_set_field32
Lloh19:
	adrp	x8, _TXRX_CSR4_AUTORESPOND_PREAMBLE@GOTPAGE
Lloh20:
	ldr	x8, [x8, _TXRX_CSR4_AUTORESPOND_PREAMBLE@GOTPAGEOFF]
Lloh21:
	ldr	w1, [x8]
	ldr	w8, [x20, #20]
	cmp	w8, #0
	cset	w2, ne
	add	x0, sp, #12
	bl	_rt2x00_set_field32
	ldr	w1, [x22]
	ldr	w2, [sp, #12]
	mov	x0, x19
	bl	_rt2x00mmio_register_write
LBB0_2:
Lloh22:
	adrp	x8, _BSS_CHANGED_BASIC_RATES@GOTPAGE
Lloh23:
	ldr	x8, [x8, _BSS_CHANGED_BASIC_RATES@GOTPAGEOFF]
Lloh24:
	ldr	w8, [x8]
	tst	w8, w21
	b.eq	LBB0_4
; %bb.3:
Lloh25:
	adrp	x8, _TXRX_CSR5@GOTPAGE
Lloh26:
	ldr	x8, [x8, _TXRX_CSR5@GOTPAGEOFF]
Lloh27:
	ldr	w1, [x8]
	ldr	w2, [x20]
	mov	x0, x19
	bl	_rt2x00mmio_register_write
LBB0_4:
Lloh28:
	adrp	x8, _BSS_CHANGED_BEACON_INT@GOTPAGE
Lloh29:
	ldr	x8, [x8, _BSS_CHANGED_BEACON_INT@GOTPAGEOFF]
Lloh30:
	ldr	w8, [x8]
	tst	w8, w21
	b.eq	LBB0_6
; %bb.5:
Lloh31:
	adrp	x22, _TXRX_CSR9@GOTPAGE
Lloh32:
	ldr	x22, [x22, _TXRX_CSR9@GOTPAGEOFF]
	ldr	w1, [x22]
	mov	x0, x19
	bl	_rt2x00mmio_register_read
	str	w0, [sp, #12]
Lloh33:
	adrp	x8, _TXRX_CSR9_BEACON_INTERVAL@GOTPAGE
Lloh34:
	ldr	x8, [x8, _TXRX_CSR9_BEACON_INTERVAL@GOTPAGEOFF]
Lloh35:
	ldr	w1, [x8]
	ldr	w8, [x20, #4]
	lsl	w2, w8, #4
	add	x0, sp, #12
	bl	_rt2x00_set_field32
	ldr	w1, [x22]
	ldr	w2, [sp, #12]
	mov	x0, x19
	bl	_rt2x00mmio_register_write
LBB0_6:
Lloh36:
	adrp	x8, _BSS_CHANGED_ERP_SLOT@GOTPAGE
Lloh37:
	ldr	x8, [x8, _BSS_CHANGED_ERP_SLOT@GOTPAGEOFF]
Lloh38:
	ldr	w8, [x8]
	tst	w8, w21
	b.eq	LBB0_8
; %bb.7:
Lloh39:
	adrp	x21, _MAC_CSR9@GOTPAGE
Lloh40:
	ldr	x21, [x21, _MAC_CSR9@GOTPAGEOFF]
	ldr	w1, [x21]
	mov	x0, x19
	bl	_rt2x00mmio_register_read
	str	w0, [sp, #12]
Lloh41:
	adrp	x8, _MAC_CSR9_SLOT_TIME@GOTPAGE
Lloh42:
	ldr	x8, [x8, _MAC_CSR9_SLOT_TIME@GOTPAGEOFF]
Lloh43:
	ldr	w1, [x8]
	ldr	w2, [x20, #8]
	add	x0, sp, #12
	bl	_rt2x00_set_field32
	ldr	w1, [x21]
	ldr	w2, [sp, #12]
	mov	x0, x19
	bl	_rt2x00mmio_register_write
Lloh44:
	adrp	x21, _MAC_CSR8@GOTPAGE
Lloh45:
	ldr	x21, [x21, _MAC_CSR8@GOTPAGEOFF]
	ldr	w1, [x21]
	mov	x0, x19
	bl	_rt2x00mmio_register_read
	str	w0, [sp, #12]
Lloh46:
	adrp	x8, _MAC_CSR8_SIFS@GOTPAGE
Lloh47:
	ldr	x8, [x8, _MAC_CSR8_SIFS@GOTPAGEOFF]
Lloh48:
	ldr	w1, [x8]
	ldr	w2, [x20, #12]
	add	x0, sp, #12
	bl	_rt2x00_set_field32
Lloh49:
	adrp	x8, _MAC_CSR8_SIFS_AFTER_RX_OFDM@GOTPAGE
Lloh50:
	ldr	x8, [x8, _MAC_CSR8_SIFS_AFTER_RX_OFDM@GOTPAGEOFF]
Lloh51:
	ldr	w1, [x8]
	add	x0, sp, #12
	mov	w2, #3
	bl	_rt2x00_set_field32
Lloh52:
	adrp	x8, _MAC_CSR8_EIFS@GOTPAGE
Lloh53:
	ldr	x8, [x8, _MAC_CSR8_EIFS@GOTPAGEOFF]
Lloh54:
	ldr	w1, [x8]
	ldr	w2, [x20, #16]
	add	x0, sp, #12
	bl	_rt2x00_set_field32
	ldr	w1, [x21]
	ldr	w2, [sp, #12]
	mov	x0, x19
	bl	_rt2x00mmio_register_write
LBB0_8:
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #64
	ret
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh19, Lloh20, Lloh21
	.loh AdrpLdrGotLdr	Lloh16, Lloh17, Lloh18
	.loh AdrpLdrGot	Lloh14, Lloh15
	.loh AdrpLdrGotLdr	Lloh22, Lloh23, Lloh24
	.loh AdrpLdrGotLdr	Lloh25, Lloh26, Lloh27
	.loh AdrpLdrGotLdr	Lloh28, Lloh29, Lloh30
	.loh AdrpLdrGotLdr	Lloh33, Lloh34, Lloh35
	.loh AdrpLdrGot	Lloh31, Lloh32
	.loh AdrpLdrGotLdr	Lloh36, Lloh37, Lloh38
	.loh AdrpLdrGotLdr	Lloh52, Lloh53, Lloh54
	.loh AdrpLdrGotLdr	Lloh49, Lloh50, Lloh51
	.loh AdrpLdrGotLdr	Lloh46, Lloh47, Lloh48
	.loh AdrpLdrGot	Lloh44, Lloh45
	.loh AdrpLdrGotLdr	Lloh41, Lloh42, Lloh43
	.loh AdrpLdrGot	Lloh39, Lloh40
	.cfi_endproc
                                        ; -- End function
	.comm	_TXRX_CSR0,4,2                  ; @TXRX_CSR0
	.comm	_TXRX_CSR0_RX_ACK_TIMEOUT,4,2   ; @TXRX_CSR0_RX_ACK_TIMEOUT
	.comm	_TXRX_CSR0_TSF_OFFSET,4,2       ; @TXRX_CSR0_TSF_OFFSET
	.comm	_IEEE80211_HEADER,4,2           ; @IEEE80211_HEADER
	.comm	_BSS_CHANGED_ERP_PREAMBLE,4,2   ; @BSS_CHANGED_ERP_PREAMBLE
	.comm	_TXRX_CSR4,4,2                  ; @TXRX_CSR4
	.comm	_TXRX_CSR4_AUTORESPOND_ENABLE,4,2 ; @TXRX_CSR4_AUTORESPOND_ENABLE
	.comm	_TXRX_CSR4_AUTORESPOND_PREAMBLE,4,2 ; @TXRX_CSR4_AUTORESPOND_PREAMBLE
	.comm	_BSS_CHANGED_BASIC_RATES,4,2    ; @BSS_CHANGED_BASIC_RATES
	.comm	_TXRX_CSR5,4,2                  ; @TXRX_CSR5
	.comm	_BSS_CHANGED_BEACON_INT,4,2     ; @BSS_CHANGED_BEACON_INT
	.comm	_TXRX_CSR9,4,2                  ; @TXRX_CSR9
	.comm	_TXRX_CSR9_BEACON_INTERVAL,4,2  ; @TXRX_CSR9_BEACON_INTERVAL
	.comm	_BSS_CHANGED_ERP_SLOT,4,2       ; @BSS_CHANGED_ERP_SLOT
	.comm	_MAC_CSR9,4,2                   ; @MAC_CSR9
	.comm	_MAC_CSR9_SLOT_TIME,4,2         ; @MAC_CSR9_SLOT_TIME
	.comm	_MAC_CSR8,4,2                   ; @MAC_CSR8
	.comm	_MAC_CSR8_SIFS,4,2              ; @MAC_CSR8_SIFS
	.comm	_MAC_CSR8_SIFS_AFTER_RX_OFDM,4,2 ; @MAC_CSR8_SIFS_AFTER_RX_OFDM
	.comm	_MAC_CSR8_EIFS,4,2              ; @MAC_CSR8_EIFS
	.no_dead_strip	_rt61pci_config_erp
.subsections_via_symbols
