	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function tegra_pcie_phy_disable
_tegra_pcie_phy_disable:                ## @tegra_pcie_phy_disable
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %rbx
	movq	(%rdi), %r14
	movq	_PADS_CTL@GOTPCREL(%rip), %r15
	movl	(%r15), %esi
	callq	_pads_readl
	movq	_PADS_CTL_TX_DATA_EN_1L@GOTPCREL(%rip), %rcx
	movq	_PADS_CTL_RX_DATA_EN_1L@GOTPCREL(%rip), %rdx
	movl	(%rdx), %esi
	orl	(%rcx), %esi
	notl	%esi
	andl	%eax, %esi
	movl	(%r15), %edx
	movq	%rbx, %rdi
	callq	_pads_writel
	movl	(%r15), %esi
	movq	%rbx, %rdi
	callq	_pads_readl
	movq	_PADS_CTL_IDDQ_1L@GOTPCREL(%rip), %rcx
	orl	(%rcx), %eax
	movl	(%r15), %edx
	movq	%rbx, %rdi
	movl	%eax, %esi
	callq	_pads_writel
	movl	(%r14), %esi
	movq	%rbx, %rdi
	callq	_pads_readl
	movq	_PADS_PLL_CTL_RST_B4SM@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	notl	%esi
	andl	%eax, %esi
	movl	(%r14), %edx
	movq	%rbx, %rdi
	callq	_pads_writel
	movl	$20, %edi
	movl	$100, %esi
	callq	_usleep_range
	xorl	%eax, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_PADS_CTL,4,2                   ## @PADS_CTL
	.comm	_PADS_CTL_TX_DATA_EN_1L,4,2     ## @PADS_CTL_TX_DATA_EN_1L
	.comm	_PADS_CTL_RX_DATA_EN_1L,4,2     ## @PADS_CTL_RX_DATA_EN_1L
	.comm	_PADS_CTL_IDDQ_1L,4,2           ## @PADS_CTL_IDDQ_1L
	.comm	_PADS_PLL_CTL_RST_B4SM,4,2      ## @PADS_PLL_CTL_RST_B4SM
	.no_dead_strip	_tegra_pcie_phy_disable
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function tegra_pcie_phy_disable
_tegra_pcie_phy_disable:                ; @tegra_pcie_phy_disable
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x0
	ldr	x20, [x0]
Lloh0:
	adrp	x21, _PADS_CTL@GOTPAGE
Lloh1:
	ldr	x21, [x21, _PADS_CTL@GOTPAGEOFF]
	ldr	w1, [x21]
	bl	_pads_readl
Lloh2:
	adrp	x8, _PADS_CTL_TX_DATA_EN_1L@GOTPAGE
Lloh3:
	ldr	x8, [x8, _PADS_CTL_TX_DATA_EN_1L@GOTPAGEOFF]
Lloh4:
	ldr	w8, [x8]
Lloh5:
	adrp	x9, _PADS_CTL_RX_DATA_EN_1L@GOTPAGE
Lloh6:
	ldr	x9, [x9, _PADS_CTL_RX_DATA_EN_1L@GOTPAGEOFF]
Lloh7:
	ldr	w9, [x9]
	orr	w8, w9, w8
	bic	w1, w0, w8
	ldr	w2, [x21]
	mov	x0, x19
	bl	_pads_writel
	ldr	w1, [x21]
	mov	x0, x19
	bl	_pads_readl
Lloh8:
	adrp	x8, _PADS_CTL_IDDQ_1L@GOTPAGE
Lloh9:
	ldr	x8, [x8, _PADS_CTL_IDDQ_1L@GOTPAGEOFF]
Lloh10:
	ldr	w8, [x8]
	orr	w1, w8, w0
	ldr	w2, [x21]
	mov	x0, x19
	bl	_pads_writel
	ldr	w1, [x20]
	mov	x0, x19
	bl	_pads_readl
Lloh11:
	adrp	x8, _PADS_PLL_CTL_RST_B4SM@GOTPAGE
Lloh12:
	ldr	x8, [x8, _PADS_PLL_CTL_RST_B4SM@GOTPAGEOFF]
Lloh13:
	ldr	w8, [x8]
	bic	w1, w0, w8
	ldr	w2, [x20]
	mov	x0, x19
	bl	_pads_writel
	mov	w0, #20
	mov	w1, #100
	bl	_usleep_range
	mov	w0, #0
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGot	Lloh0, Lloh1
	.cfi_endproc
                                        ; -- End function
	.comm	_PADS_CTL,4,2                   ; @PADS_CTL
	.comm	_PADS_CTL_TX_DATA_EN_1L,4,2     ; @PADS_CTL_TX_DATA_EN_1L
	.comm	_PADS_CTL_RX_DATA_EN_1L,4,2     ; @PADS_CTL_RX_DATA_EN_1L
	.comm	_PADS_CTL_IDDQ_1L,4,2           ; @PADS_CTL_IDDQ_1L
	.comm	_PADS_PLL_CTL_RST_B4SM,4,2      ; @PADS_PLL_CTL_RST_B4SM
	.no_dead_strip	_tegra_pcie_phy_disable
.subsections_via_symbols
