	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function tegra_pcie_enable_system_interrupts
_tegra_pcie_enable_system_interrupts:   ## @tegra_pcie_enable_system_interrupts
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	callq	_to_dw_pcie_from_pp
	movq	%rax, %rdi
	callq	_to_tegra_pcie
	movq	%rax, %r14
	movq	_APPL_INTR_EN_L0_0@GOTPCREL(%rip), %r15
	movl	(%r15), %esi
	movq	%rax, %rdi
	callq	_appl_readl
	movq	_APPL_INTR_EN_L0_0_LINK_STATE_INT_EN@GOTPCREL(%rip), %rcx
	orl	(%rcx), %eax
	movl	(%r15), %edx
	movq	%r14, %rdi
	movl	%eax, %esi
	callq	_appl_writel
	movq	_APPL_INTR_EN_L1_0_0@GOTPCREL(%rip), %rbx
	movl	(%rbx), %esi
	movq	%r14, %rdi
	callq	_appl_readl
	movq	_APPL_INTR_EN_L1_0_0_LINK_REQ_RST_NOT_INT_EN@GOTPCREL(%rip), %rcx
	orl	(%rcx), %eax
	movl	(%rbx), %edx
	movq	%r14, %rdi
	movl	%eax, %esi
	callq	_appl_writel
	cmpq	$0, 24(%r14)
	je	LBB0_2
## %bb.1:
	movl	(%r15), %esi
	movq	%r14, %rdi
	callq	_appl_readl
	movq	_APPL_INTR_EN_L0_0_CDM_REG_CHK_INT_EN@GOTPCREL(%rip), %rcx
	orl	(%rcx), %eax
	movl	(%r15), %edx
	movq	%r14, %rdi
	movl	%eax, %esi
	callq	_appl_writel
	movq	_APPL_INTR_EN_L1_18@GOTPCREL(%rip), %rbx
	movl	(%rbx), %esi
	movq	%r14, %rdi
	callq	_appl_readl
	movq	_APPL_INTR_EN_L1_18_CDM_REG_CHK_CMP_ERR@GOTPCREL(%rip), %rcx
	orl	(%rcx), %eax
	movq	_APPL_INTR_EN_L1_18_CDM_REG_CHK_LOGIC_ERR@GOTPCREL(%rip), %rcx
	orl	(%rcx), %eax
	movl	(%rbx), %edx
	movq	%r14, %rdi
	movl	%eax, %esi
	callq	_appl_writel
LBB0_2:
	movq	%r14, %rbx
	addq	$16, %rbx
	movq	_PCI_EXP_LNKSTA@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	addq	8(%r14), %rsi
	movq	%rbx, %rdi
	callq	_dw_pcie_readw_dbi
	movq	_PCI_EXP_LNKSTA_NLW@GOTPCREL(%rip), %rcx
	andl	(%rcx), %eax
	movq	_PCI_EXP_LNKSTA_NLW_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	sarl	%cl, %eax
	movl	%eax, (%r14)
	movq	_PCI_EXP_LNKCTL@GOTPCREL(%rip), %r15
	movq	(%r15), %rsi
	addq	8(%r14), %rsi
	movq	%rbx, %rdi
	callq	_dw_pcie_readw_dbi
	movq	_PCI_EXP_LNKCTL_LBMIE@GOTPCREL(%rip), %rcx
	orl	(%rcx), %eax
	movq	(%r15), %rsi
	addq	8(%r14), %rsi
	movq	%rbx, %rdi
	movl	%eax, %edx
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_dw_pcie_writew_dbi             ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_APPL_INTR_EN_L0_0,4,2          ## @APPL_INTR_EN_L0_0
	.comm	_APPL_INTR_EN_L0_0_LINK_STATE_INT_EN,4,2 ## @APPL_INTR_EN_L0_0_LINK_STATE_INT_EN
	.comm	_APPL_INTR_EN_L1_0_0,4,2        ## @APPL_INTR_EN_L1_0_0
	.comm	_APPL_INTR_EN_L1_0_0_LINK_REQ_RST_NOT_INT_EN,4,2 ## @APPL_INTR_EN_L1_0_0_LINK_REQ_RST_NOT_INT_EN
	.comm	_APPL_INTR_EN_L0_0_CDM_REG_CHK_INT_EN,4,2 ## @APPL_INTR_EN_L0_0_CDM_REG_CHK_INT_EN
	.comm	_APPL_INTR_EN_L1_18,4,2         ## @APPL_INTR_EN_L1_18
	.comm	_APPL_INTR_EN_L1_18_CDM_REG_CHK_CMP_ERR,4,2 ## @APPL_INTR_EN_L1_18_CDM_REG_CHK_CMP_ERR
	.comm	_APPL_INTR_EN_L1_18_CDM_REG_CHK_LOGIC_ERR,4,2 ## @APPL_INTR_EN_L1_18_CDM_REG_CHK_LOGIC_ERR
	.comm	_PCI_EXP_LNKSTA,8,3             ## @PCI_EXP_LNKSTA
	.comm	_PCI_EXP_LNKSTA_NLW,4,2         ## @PCI_EXP_LNKSTA_NLW
	.comm	_PCI_EXP_LNKSTA_NLW_SHIFT,4,2   ## @PCI_EXP_LNKSTA_NLW_SHIFT
	.comm	_PCI_EXP_LNKCTL,8,3             ## @PCI_EXP_LNKCTL
	.comm	_PCI_EXP_LNKCTL_LBMIE,4,2       ## @PCI_EXP_LNKCTL_LBMIE
	.no_dead_strip	_tegra_pcie_enable_system_interrupts
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function tegra_pcie_enable_system_interrupts
_tegra_pcie_enable_system_interrupts:   ; @tegra_pcie_enable_system_interrupts
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	bl	_to_dw_pcie_from_pp
	bl	_to_tegra_pcie
	mov	x19, x0
Lloh0:
	adrp	x20, _APPL_INTR_EN_L0_0@GOTPAGE
Lloh1:
	ldr	x20, [x20, _APPL_INTR_EN_L0_0@GOTPAGEOFF]
	ldr	w1, [x20]
	bl	_appl_readl
Lloh2:
	adrp	x8, _APPL_INTR_EN_L0_0_LINK_STATE_INT_EN@GOTPAGE
Lloh3:
	ldr	x8, [x8, _APPL_INTR_EN_L0_0_LINK_STATE_INT_EN@GOTPAGEOFF]
Lloh4:
	ldr	w8, [x8]
	orr	w1, w8, w0
	ldr	w2, [x20]
	mov	x0, x19
	bl	_appl_writel
Lloh5:
	adrp	x21, _APPL_INTR_EN_L1_0_0@GOTPAGE
Lloh6:
	ldr	x21, [x21, _APPL_INTR_EN_L1_0_0@GOTPAGEOFF]
	ldr	w1, [x21]
	mov	x0, x19
	bl	_appl_readl
Lloh7:
	adrp	x8, _APPL_INTR_EN_L1_0_0_LINK_REQ_RST_NOT_INT_EN@GOTPAGE
Lloh8:
	ldr	x8, [x8, _APPL_INTR_EN_L1_0_0_LINK_REQ_RST_NOT_INT_EN@GOTPAGEOFF]
Lloh9:
	ldr	w8, [x8]
	orr	w1, w8, w0
	ldr	w2, [x21]
	mov	x0, x19
	bl	_appl_writel
	ldr	x8, [x19, #24]
	cbz	x8, LBB0_2
; %bb.1:
	ldr	w1, [x20]
	mov	x0, x19
	bl	_appl_readl
Lloh10:
	adrp	x8, _APPL_INTR_EN_L0_0_CDM_REG_CHK_INT_EN@GOTPAGE
Lloh11:
	ldr	x8, [x8, _APPL_INTR_EN_L0_0_CDM_REG_CHK_INT_EN@GOTPAGEOFF]
Lloh12:
	ldr	w8, [x8]
	orr	w1, w8, w0
	ldr	w2, [x20]
	mov	x0, x19
	bl	_appl_writel
Lloh13:
	adrp	x20, _APPL_INTR_EN_L1_18@GOTPAGE
Lloh14:
	ldr	x20, [x20, _APPL_INTR_EN_L1_18@GOTPAGEOFF]
	ldr	w1, [x20]
	mov	x0, x19
	bl	_appl_readl
Lloh15:
	adrp	x8, _APPL_INTR_EN_L1_18_CDM_REG_CHK_CMP_ERR@GOTPAGE
Lloh16:
	ldr	x8, [x8, _APPL_INTR_EN_L1_18_CDM_REG_CHK_CMP_ERR@GOTPAGEOFF]
Lloh17:
	ldr	w8, [x8]
	orr	w8, w8, w0
Lloh18:
	adrp	x9, _APPL_INTR_EN_L1_18_CDM_REG_CHK_LOGIC_ERR@GOTPAGE
Lloh19:
	ldr	x9, [x9, _APPL_INTR_EN_L1_18_CDM_REG_CHK_LOGIC_ERR@GOTPAGEOFF]
Lloh20:
	ldr	w9, [x9]
	orr	w1, w8, w9
	ldr	w2, [x20]
	mov	x0, x19
	bl	_appl_writel
LBB0_2:
	add	x20, x19, #16
	ldr	x8, [x19, #8]
Lloh21:
	adrp	x9, _PCI_EXP_LNKSTA@GOTPAGE
Lloh22:
	ldr	x9, [x9, _PCI_EXP_LNKSTA@GOTPAGEOFF]
Lloh23:
	ldr	x9, [x9]
	add	x1, x9, x8
	mov	x0, x20
	bl	_dw_pcie_readw_dbi
Lloh24:
	adrp	x8, _PCI_EXP_LNKSTA_NLW@GOTPAGE
Lloh25:
	ldr	x8, [x8, _PCI_EXP_LNKSTA_NLW@GOTPAGEOFF]
Lloh26:
	ldr	w8, [x8]
	and	w8, w8, w0
Lloh27:
	adrp	x9, _PCI_EXP_LNKSTA_NLW_SHIFT@GOTPAGE
Lloh28:
	ldr	x9, [x9, _PCI_EXP_LNKSTA_NLW_SHIFT@GOTPAGEOFF]
Lloh29:
	ldr	w9, [x9]
	asr	w8, w8, w9
	str	w8, [x19]
	ldr	x8, [x19, #8]
Lloh30:
	adrp	x21, _PCI_EXP_LNKCTL@GOTPAGE
Lloh31:
	ldr	x21, [x21, _PCI_EXP_LNKCTL@GOTPAGEOFF]
	ldr	x9, [x21]
	add	x1, x9, x8
	mov	x0, x20
	bl	_dw_pcie_readw_dbi
Lloh32:
	adrp	x8, _PCI_EXP_LNKCTL_LBMIE@GOTPAGE
Lloh33:
	ldr	x8, [x8, _PCI_EXP_LNKCTL_LBMIE@GOTPAGEOFF]
Lloh34:
	ldr	w8, [x8]
	orr	w2, w8, w0
	ldr	x8, [x19, #8]
	ldr	x9, [x21]
	add	x1, x9, x8
	mov	x0, x20
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	_dw_pcie_writew_dbi
	.loh AdrpLdrGotLdr	Lloh7, Lloh8, Lloh9
	.loh AdrpLdrGot	Lloh5, Lloh6
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGot	Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh10, Lloh11, Lloh12
	.loh AdrpLdrGotLdr	Lloh32, Lloh33, Lloh34
	.loh AdrpLdrGot	Lloh30, Lloh31
	.loh AdrpLdrGotLdr	Lloh27, Lloh28, Lloh29
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.cfi_endproc
                                        ; -- End function
	.comm	_APPL_INTR_EN_L0_0,4,2          ; @APPL_INTR_EN_L0_0
	.comm	_APPL_INTR_EN_L0_0_LINK_STATE_INT_EN,4,2 ; @APPL_INTR_EN_L0_0_LINK_STATE_INT_EN
	.comm	_APPL_INTR_EN_L1_0_0,4,2        ; @APPL_INTR_EN_L1_0_0
	.comm	_APPL_INTR_EN_L1_0_0_LINK_REQ_RST_NOT_INT_EN,4,2 ; @APPL_INTR_EN_L1_0_0_LINK_REQ_RST_NOT_INT_EN
	.comm	_APPL_INTR_EN_L0_0_CDM_REG_CHK_INT_EN,4,2 ; @APPL_INTR_EN_L0_0_CDM_REG_CHK_INT_EN
	.comm	_APPL_INTR_EN_L1_18,4,2         ; @APPL_INTR_EN_L1_18
	.comm	_APPL_INTR_EN_L1_18_CDM_REG_CHK_CMP_ERR,4,2 ; @APPL_INTR_EN_L1_18_CDM_REG_CHK_CMP_ERR
	.comm	_APPL_INTR_EN_L1_18_CDM_REG_CHK_LOGIC_ERR,4,2 ; @APPL_INTR_EN_L1_18_CDM_REG_CHK_LOGIC_ERR
	.comm	_PCI_EXP_LNKSTA,8,3             ; @PCI_EXP_LNKSTA
	.comm	_PCI_EXP_LNKSTA_NLW,4,2         ; @PCI_EXP_LNKSTA_NLW
	.comm	_PCI_EXP_LNKSTA_NLW_SHIFT,4,2   ; @PCI_EXP_LNKSTA_NLW_SHIFT
	.comm	_PCI_EXP_LNKCTL,8,3             ; @PCI_EXP_LNKCTL
	.comm	_PCI_EXP_LNKCTL_LBMIE,4,2       ; @PCI_EXP_LNKCTL_LBMIE
	.no_dead_strip	_tegra_pcie_enable_system_interrupts
.subsections_via_symbols
