	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_pci_find_pcie_root_port        ## -- Begin function pci_find_pcie_root_port
	.p2align	4, 0x90
_pci_find_pcie_root_port:               ## @pci_find_pcie_root_port
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r14
	pushq	%rbx
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	movq	%rdi, %r14
	.p2align	4, 0x90
LBB0_1:                                 ## =>This Inner Loop Header: Depth=1
	callq	_pci_upstream_bridge
	testq	%rax, %rax
	je	LBB0_4
## %bb.2:                               ##   in Loop: Header=BB0_1 Depth=1
	movq	%rax, %rbx
	movq	%rax, %rdi
	callq	_pci_is_pcie
	testq	%rax, %rax
	je	LBB0_4
## %bb.3:                               ##   in Loop: Header=BB0_1 Depth=1
	movq	%rbx, %r14
	movq	%rbx, %rdi
	jmp	LBB0_1
LBB0_4:
	movq	%r14, %rdi
	callq	_pci_pcie_type
	movq	_PCI_EXP_TYPE_ROOT_PORT@GOTPCREL(%rip), %rdx
	xorl	%ecx, %ecx
	cmpq	(%rdx), %rax
	cmoveq	%r14, %rcx
	movq	%rcx, %rax
	popq	%rbx
	popq	%r14
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_PCI_EXP_TYPE_ROOT_PORT,8,3     ## @PCI_EXP_TYPE_ROOT_PORT
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_pci_find_pcie_root_port        ; -- Begin function pci_find_pcie_root_port
	.p2align	2
_pci_find_pcie_root_port:               ; @pci_find_pcie_root_port
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x19, x0
	bl	_pci_upstream_bridge
	cbz	x0, LBB0_3
LBB0_1:                                 ; =>This Inner Loop Header: Depth=1
	mov	x20, x0
	bl	_pci_is_pcie
	cbz	x0, LBB0_3
; %bb.2:                                ;   in Loop: Header=BB0_1 Depth=1
	mov	x19, x20
	mov	x0, x20
	bl	_pci_upstream_bridge
	cbnz	x0, LBB0_1
LBB0_3:
	mov	x0, x19
	bl	_pci_pcie_type
Lloh0:
	adrp	x8, _PCI_EXP_TYPE_ROOT_PORT@GOTPAGE
Lloh1:
	ldr	x8, [x8, _PCI_EXP_TYPE_ROOT_PORT@GOTPAGEOFF]
Lloh2:
	ldr	x8, [x8]
	cmp	x0, x8
	csel	x0, x19, xzr, eq
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_PCI_EXP_TYPE_ROOT_PORT,8,3     ; @PCI_EXP_TYPE_ROOT_PORT
.subsections_via_symbols
