	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function yenta_config_init
_yenta_config_init:                     ## @yenta_config_init
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r14
	pushq	%rbx
	subq	$16, %rsp
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	movq	%rdi, %rbx
	movq	(%rdi), %r14
	movl	16(%r14), %edi
	movq	8(%r14), %rdx
	leaq	-24(%rbp), %rsi
	callq	_pcibios_resource_to_bus
	movq	_CB_LEGACY_MODE_BASE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	xorl	%edx, %edx
	callq	_config_writel
	movq	_PCI_BASE_ADDRESS_0@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	-24(%rbp), %edx
	movq	%rbx, %rdi
	callq	_config_writel
	movq	_PCI_COMMAND_IO@GOTPCREL(%rip), %rax
	movq	_PCI_COMMAND_MEMORY@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	orl	(%rax), %edx
	movq	_PCI_COMMAND@GOTPCREL(%rip), %rax
	movq	_PCI_COMMAND_MASTER@GOTPCREL(%rip), %rcx
	orl	(%rcx), %edx
	movl	(%rax), %esi
	movq	_PCI_COMMAND_WAIT@GOTPCREL(%rip), %rax
	orl	(%rax), %edx
	movq	%rbx, %rdi
	callq	_config_writew
	movq	_PCI_CACHE_LINE_SIZE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_L1_CACHE_BYTES@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	leal	3(%rax), %edx
	testl	%eax, %eax
	cmovnsl	%eax, %edx
	sarl	$2, %edx
	movq	%rbx, %rdi
	callq	_config_writeb
	movq	_PCI_LATENCY_TIMER@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	movl	$168, %edx
	callq	_config_writeb
	movq	_PCI_PRIMARY_BUS@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	(%r14), %rax
	movl	8(%rax), %ecx
	movl	16(%rax), %edx
	shll	$16, %edx
	shll	$8, %ecx
	orl	(%rax), %edx
	orl	%ecx, %edx
	orl	$-1342177280, %edx              ## imm = 0xB0000000
	movq	%rbx, %rdi
	callq	_config_writel
	movq	_CB_BRIDGE_CONTROL@GOTPCREL(%rip), %r14
	movl	(%r14), %esi
	movq	%rbx, %rdi
	callq	_config_readw
	movq	_CB_BRIDGE_CRST@GOTPCREL(%rip), %rcx
	movq	_CB_BRIDGE_PREFETCH1@GOTPCREL(%rip), %rdx
	movl	(%rdx), %esi
	orl	(%rcx), %esi
	movq	_CB_BRIDGE_ISAEN@GOTPCREL(%rip), %rcx
	orl	(%rcx), %esi
	movq	_CB_BRIDGE_VGAEN@GOTPCREL(%rip), %rcx
	orl	(%rcx), %esi
	notl	%esi
	andl	%eax, %esi
	movq	_CB_BRIDGE_PREFETCH0@GOTPCREL(%rip), %rax
	movq	_CB_BRIDGE_POSTEN@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	orl	(%rax), %edx
	orl	%esi, %edx
	movl	(%r14), %esi
	movq	%rbx, %rdi
	callq	_config_writew
	addq	$16, %rsp
	popq	%rbx
	popq	%r14
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_CB_LEGACY_MODE_BASE,4,2        ## @CB_LEGACY_MODE_BASE
	.comm	_PCI_BASE_ADDRESS_0,4,2         ## @PCI_BASE_ADDRESS_0
	.comm	_PCI_COMMAND,4,2                ## @PCI_COMMAND
	.comm	_PCI_COMMAND_IO,4,2             ## @PCI_COMMAND_IO
	.comm	_PCI_COMMAND_MEMORY,4,2         ## @PCI_COMMAND_MEMORY
	.comm	_PCI_COMMAND_MASTER,4,2         ## @PCI_COMMAND_MASTER
	.comm	_PCI_COMMAND_WAIT,4,2           ## @PCI_COMMAND_WAIT
	.comm	_PCI_CACHE_LINE_SIZE,4,2        ## @PCI_CACHE_LINE_SIZE
	.comm	_L1_CACHE_BYTES,4,2             ## @L1_CACHE_BYTES
	.comm	_PCI_LATENCY_TIMER,4,2          ## @PCI_LATENCY_TIMER
	.comm	_PCI_PRIMARY_BUS,4,2            ## @PCI_PRIMARY_BUS
	.comm	_CB_BRIDGE_CONTROL,4,2          ## @CB_BRIDGE_CONTROL
	.comm	_CB_BRIDGE_CRST,4,2             ## @CB_BRIDGE_CRST
	.comm	_CB_BRIDGE_PREFETCH1,4,2        ## @CB_BRIDGE_PREFETCH1
	.comm	_CB_BRIDGE_ISAEN,4,2            ## @CB_BRIDGE_ISAEN
	.comm	_CB_BRIDGE_VGAEN,4,2            ## @CB_BRIDGE_VGAEN
	.comm	_CB_BRIDGE_PREFETCH0,4,2        ## @CB_BRIDGE_PREFETCH0
	.comm	_CB_BRIDGE_POSTEN,4,2           ## @CB_BRIDGE_POSTEN
	.no_dead_strip	_yenta_config_init
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function yenta_config_init
_yenta_config_init:                     ; @yenta_config_init
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #48
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x19, x0
	ldr	x20, [x0]
	ldr	w0, [x20, #16]
	ldr	x2, [x20, #8]
	add	x1, sp, #8
	bl	_pcibios_resource_to_bus
Lloh0:
	adrp	x8, _CB_LEGACY_MODE_BASE@GOTPAGE
Lloh1:
	ldr	x8, [x8, _CB_LEGACY_MODE_BASE@GOTPAGEOFF]
Lloh2:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #0
	bl	_config_writel
Lloh3:
	adrp	x8, _PCI_BASE_ADDRESS_0@GOTPAGE
Lloh4:
	ldr	x8, [x8, _PCI_BASE_ADDRESS_0@GOTPAGEOFF]
Lloh5:
	ldr	w1, [x8]
	ldr	w2, [sp, #8]
	mov	x0, x19
	bl	_config_writel
Lloh6:
	adrp	x8, _PCI_COMMAND@GOTPAGE
Lloh7:
	ldr	x8, [x8, _PCI_COMMAND@GOTPAGEOFF]
Lloh8:
	ldr	w1, [x8]
Lloh9:
	adrp	x8, _PCI_COMMAND_IO@GOTPAGE
Lloh10:
	ldr	x8, [x8, _PCI_COMMAND_IO@GOTPAGEOFF]
Lloh11:
	ldr	w8, [x8]
Lloh12:
	adrp	x9, _PCI_COMMAND_MEMORY@GOTPAGE
Lloh13:
	ldr	x9, [x9, _PCI_COMMAND_MEMORY@GOTPAGEOFF]
Lloh14:
	ldr	w9, [x9]
	orr	w8, w9, w8
Lloh15:
	adrp	x9, _PCI_COMMAND_MASTER@GOTPAGE
Lloh16:
	ldr	x9, [x9, _PCI_COMMAND_MASTER@GOTPAGEOFF]
Lloh17:
	ldr	w9, [x9]
	orr	w8, w8, w9
Lloh18:
	adrp	x9, _PCI_COMMAND_WAIT@GOTPAGE
Lloh19:
	ldr	x9, [x9, _PCI_COMMAND_WAIT@GOTPAGEOFF]
Lloh20:
	ldr	w9, [x9]
	orr	w2, w8, w9
	mov	x0, x19
	bl	_config_writew
Lloh21:
	adrp	x8, _PCI_CACHE_LINE_SIZE@GOTPAGE
Lloh22:
	ldr	x8, [x8, _PCI_CACHE_LINE_SIZE@GOTPAGEOFF]
Lloh23:
	adrp	x9, _L1_CACHE_BYTES@GOTPAGE
Lloh24:
	ldr	x9, [x9, _L1_CACHE_BYTES@GOTPAGEOFF]
Lloh25:
	ldr	w1, [x8]
Lloh26:
	ldr	w8, [x9]
	add	w9, w8, #3
	cmp	w8, #0
	csel	w8, w9, w8, lt
	asr	w2, w8, #2
	mov	x0, x19
	bl	_config_writeb
Lloh27:
	adrp	x8, _PCI_LATENCY_TIMER@GOTPAGE
Lloh28:
	ldr	x8, [x8, _PCI_LATENCY_TIMER@GOTPAGEOFF]
Lloh29:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #168
	bl	_config_writeb
Lloh30:
	adrp	x8, _PCI_PRIMARY_BUS@GOTPAGE
Lloh31:
	ldr	x8, [x8, _PCI_PRIMARY_BUS@GOTPAGEOFF]
Lloh32:
	ldr	w1, [x8]
	ldr	x8, [x20]
	ldr	w9, [x8, #16]
	ldr	w10, [x8, #8]
	ldr	w8, [x8]
	orr	w8, w8, w9, lsl #16
	orr	w8, w8, w10, lsl #8
	mov	w9, #-1342177280
	orr	w2, w8, w9
	mov	x0, x19
	bl	_config_writel
Lloh33:
	adrp	x20, _CB_BRIDGE_CONTROL@GOTPAGE
Lloh34:
	ldr	x20, [x20, _CB_BRIDGE_CONTROL@GOTPAGEOFF]
	ldr	w1, [x20]
	mov	x0, x19
	bl	_config_readw
Lloh35:
	adrp	x8, _CB_BRIDGE_CRST@GOTPAGE
Lloh36:
	ldr	x8, [x8, _CB_BRIDGE_CRST@GOTPAGEOFF]
Lloh37:
	ldr	w8, [x8]
Lloh38:
	adrp	x9, _CB_BRIDGE_PREFETCH1@GOTPAGE
Lloh39:
	ldr	x9, [x9, _CB_BRIDGE_PREFETCH1@GOTPAGEOFF]
Lloh40:
	ldr	w9, [x9]
	orr	w8, w9, w8
Lloh41:
	adrp	x9, _CB_BRIDGE_ISAEN@GOTPAGE
Lloh42:
	ldr	x9, [x9, _CB_BRIDGE_ISAEN@GOTPAGEOFF]
Lloh43:
	ldr	w9, [x9]
	orr	w8, w8, w9
Lloh44:
	adrp	x9, _CB_BRIDGE_VGAEN@GOTPAGE
Lloh45:
	ldr	x9, [x9, _CB_BRIDGE_VGAEN@GOTPAGEOFF]
Lloh46:
	ldr	w9, [x9]
	orr	w8, w8, w9
	bic	w8, w0, w8
Lloh47:
	adrp	x9, _CB_BRIDGE_PREFETCH0@GOTPAGE
Lloh48:
	ldr	x9, [x9, _CB_BRIDGE_PREFETCH0@GOTPAGEOFF]
Lloh49:
	ldr	w9, [x9]
Lloh50:
	adrp	x10, _CB_BRIDGE_POSTEN@GOTPAGE
Lloh51:
	ldr	x10, [x10, _CB_BRIDGE_POSTEN@GOTPAGEOFF]
Lloh52:
	ldr	w10, [x10]
	orr	w9, w10, w9
	orr	w2, w9, w8
	ldr	w1, [x20]
	mov	x0, x19
	bl	_config_writew
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #48
	ret
	.loh AdrpLdrGotLdr	Lloh50, Lloh51, Lloh52
	.loh AdrpLdrGotLdr	Lloh47, Lloh48, Lloh49
	.loh AdrpLdrGotLdr	Lloh44, Lloh45, Lloh46
	.loh AdrpLdrGotLdr	Lloh41, Lloh42, Lloh43
	.loh AdrpLdrGotLdr	Lloh38, Lloh39, Lloh40
	.loh AdrpLdrGotLdr	Lloh35, Lloh36, Lloh37
	.loh AdrpLdrGot	Lloh33, Lloh34
	.loh AdrpLdrGotLdr	Lloh30, Lloh31, Lloh32
	.loh AdrpLdrGotLdr	Lloh27, Lloh28, Lloh29
	.loh AdrpLdrGotLdr	Lloh23, Lloh24, Lloh26
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh25
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_CB_LEGACY_MODE_BASE,4,2        ; @CB_LEGACY_MODE_BASE
	.comm	_PCI_BASE_ADDRESS_0,4,2         ; @PCI_BASE_ADDRESS_0
	.comm	_PCI_COMMAND,4,2                ; @PCI_COMMAND
	.comm	_PCI_COMMAND_IO,4,2             ; @PCI_COMMAND_IO
	.comm	_PCI_COMMAND_MEMORY,4,2         ; @PCI_COMMAND_MEMORY
	.comm	_PCI_COMMAND_MASTER,4,2         ; @PCI_COMMAND_MASTER
	.comm	_PCI_COMMAND_WAIT,4,2           ; @PCI_COMMAND_WAIT
	.comm	_PCI_CACHE_LINE_SIZE,4,2        ; @PCI_CACHE_LINE_SIZE
	.comm	_L1_CACHE_BYTES,4,2             ; @L1_CACHE_BYTES
	.comm	_PCI_LATENCY_TIMER,4,2          ; @PCI_LATENCY_TIMER
	.comm	_PCI_PRIMARY_BUS,4,2            ; @PCI_PRIMARY_BUS
	.comm	_CB_BRIDGE_CONTROL,4,2          ; @CB_BRIDGE_CONTROL
	.comm	_CB_BRIDGE_CRST,4,2             ; @CB_BRIDGE_CRST
	.comm	_CB_BRIDGE_PREFETCH1,4,2        ; @CB_BRIDGE_PREFETCH1
	.comm	_CB_BRIDGE_ISAEN,4,2            ; @CB_BRIDGE_ISAEN
	.comm	_CB_BRIDGE_VGAEN,4,2            ; @CB_BRIDGE_VGAEN
	.comm	_CB_BRIDGE_PREFETCH0,4,2        ; @CB_BRIDGE_PREFETCH0
	.comm	_CB_BRIDGE_POSTEN,4,2           ; @CB_BRIDGE_POSTEN
	.no_dead_strip	_yenta_config_init
.subsections_via_symbols
