	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function rtl8192eu_iqk_path_a
_rtl8192eu_iqk_path_a:                  ## @rtl8192eu_iqk_path_a
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %rbx
	movq	_REG_FPGA0_IQK@GOTPCREL(%rip), %r14
	movl	(%r14), %esi
	xorl	%edx, %edx
	callq	_rtl8xxxu_write32
	movq	_RF_A@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_RF6052_REG_UNKNOWN_DF@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	movl	$384, %ecx                      ## imm = 0x180
	callq	_rtl8xxxu_write_rfreg
	movl	(%r14), %esi
	movq	%rbx, %rdi
	movl	$-2139095040, %edx              ## imm = 0x80800000
	callq	_rtl8xxxu_write32
	movq	_REG_TX_IQK_TONE_A@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	movl	$402689052, %edx                ## imm = 0x18008C1C
	callq	_rtl8xxxu_write32
	movq	_REG_RX_IQK_TONE_A@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	movl	$939559964, %edx                ## imm = 0x38008C1C
	callq	_rtl8xxxu_write32
	movq	_REG_TX_IQK_TONE_B@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	movl	$939559964, %edx                ## imm = 0x38008C1C
	callq	_rtl8xxxu_write32
	movq	_REG_RX_IQK_TONE_B@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	movl	$939559964, %edx                ## imm = 0x38008C1C
	callq	_rtl8xxxu_write32
	movq	_REG_TX_IQK_PI_A@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	movl	$-2112617725, %edx              ## imm = 0x82140303
	callq	_rtl8xxxu_write32
	movq	_REG_RX_IQK_PI_A@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	movl	$1746272256, %edx               ## imm = 0x68160000
	callq	_rtl8xxxu_write32
	movq	_REG_IQK_AGC_RSP@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	movl	$4598033, %edx                  ## imm = 0x462911
	callq	_rtl8xxxu_write32
	movq	_REG_IQK_AGC_PTS@GOTPCREL(%rip), %r14
	movl	(%r14), %esi
	movq	%rbx, %rdi
	movl	$-117440512, %edx               ## imm = 0xF9000000
	callq	_rtl8xxxu_write32
	movl	(%r14), %esi
	movq	%rbx, %rdi
	movl	$-134217728, %edx               ## imm = 0xF8000000
	callq	_rtl8xxxu_write32
	movl	$10, %edi
	callq	_mdelay
	movq	_REG_RX_POWER_AFTER_IQK_A_2@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_rtl8xxxu_read32
	movl	%eax, %r14d
	movq	_REG_TX_POWER_BEFORE_IQK_A@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_rtl8xxxu_read32
	movl	%eax, %r15d
	movq	_REG_TX_POWER_AFTER_IQK_A@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_rtl8xxxu_read32
	movl	%eax, %ebx
	movl	$28, %edi
	callq	_BIT
	testl	%r14d, %eax
	sete	%al
	andl	$67043328, %r15d                ## imm = 0x3FF0000
	cmpl	$21102592, %r15d                ## imm = 0x1420000
	setne	%cl
	andb	%al, %cl
	andl	$67043328, %ebx                 ## imm = 0x3FF0000
	cmpl	$4325376, %ebx                  ## imm = 0x420000
	setne	%al
	andb	%cl, %al
	movzbl	%al, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_REG_FPGA0_IQK,4,2              ## @REG_FPGA0_IQK
	.comm	_RF_A,4,2                       ## @RF_A
	.comm	_RF6052_REG_UNKNOWN_DF,4,2      ## @RF6052_REG_UNKNOWN_DF
	.comm	_REG_TX_IQK_TONE_A,4,2          ## @REG_TX_IQK_TONE_A
	.comm	_REG_RX_IQK_TONE_A,4,2          ## @REG_RX_IQK_TONE_A
	.comm	_REG_TX_IQK_TONE_B,4,2          ## @REG_TX_IQK_TONE_B
	.comm	_REG_RX_IQK_TONE_B,4,2          ## @REG_RX_IQK_TONE_B
	.comm	_REG_TX_IQK_PI_A,4,2            ## @REG_TX_IQK_PI_A
	.comm	_REG_RX_IQK_PI_A,4,2            ## @REG_RX_IQK_PI_A
	.comm	_REG_IQK_AGC_RSP,4,2            ## @REG_IQK_AGC_RSP
	.comm	_REG_IQK_AGC_PTS,4,2            ## @REG_IQK_AGC_PTS
	.comm	_REG_RX_POWER_AFTER_IQK_A_2,4,2 ## @REG_RX_POWER_AFTER_IQK_A_2
	.comm	_REG_TX_POWER_BEFORE_IQK_A,4,2  ## @REG_TX_POWER_BEFORE_IQK_A
	.comm	_REG_TX_POWER_AFTER_IQK_A,4,2   ## @REG_TX_POWER_AFTER_IQK_A
	.no_dead_strip	_rtl8192eu_iqk_path_a
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function rtl8192eu_iqk_path_a
_rtl8192eu_iqk_path_a:                  ; @rtl8192eu_iqk_path_a
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x0
Lloh0:
	adrp	x20, _REG_FPGA0_IQK@GOTPAGE
Lloh1:
	ldr	x20, [x20, _REG_FPGA0_IQK@GOTPAGEOFF]
	ldr	w1, [x20]
	mov	w2, #0
	bl	_rtl8xxxu_write32
Lloh2:
	adrp	x8, _RF_A@GOTPAGE
Lloh3:
	ldr	x8, [x8, _RF_A@GOTPAGEOFF]
Lloh4:
	ldr	w1, [x8]
Lloh5:
	adrp	x8, _RF6052_REG_UNKNOWN_DF@GOTPAGE
Lloh6:
	ldr	x8, [x8, _RF6052_REG_UNKNOWN_DF@GOTPAGEOFF]
Lloh7:
	ldr	w2, [x8]
	mov	x0, x19
	mov	w3, #384
	bl	_rtl8xxxu_write_rfreg
	ldr	w1, [x20]
	mov	x0, x19
	mov	w2, #-2139095040
	bl	_rtl8xxxu_write32
Lloh8:
	adrp	x8, _REG_TX_IQK_TONE_A@GOTPAGE
Lloh9:
	ldr	x8, [x8, _REG_TX_IQK_TONE_A@GOTPAGEOFF]
Lloh10:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #35868
	movk	w2, #6144, lsl #16
	bl	_rtl8xxxu_write32
Lloh11:
	adrp	x8, _REG_RX_IQK_TONE_A@GOTPAGE
Lloh12:
	ldr	x8, [x8, _REG_RX_IQK_TONE_A@GOTPAGEOFF]
Lloh13:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #35868
	movk	w2, #14336, lsl #16
	bl	_rtl8xxxu_write32
Lloh14:
	adrp	x8, _REG_TX_IQK_TONE_B@GOTPAGE
Lloh15:
	ldr	x8, [x8, _REG_TX_IQK_TONE_B@GOTPAGEOFF]
Lloh16:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #35868
	movk	w2, #14336, lsl #16
	bl	_rtl8xxxu_write32
Lloh17:
	adrp	x8, _REG_RX_IQK_TONE_B@GOTPAGE
Lloh18:
	ldr	x8, [x8, _REG_RX_IQK_TONE_B@GOTPAGEOFF]
Lloh19:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #35868
	movk	w2, #14336, lsl #16
	bl	_rtl8xxxu_write32
Lloh20:
	adrp	x8, _REG_TX_IQK_PI_A@GOTPAGE
Lloh21:
	ldr	x8, [x8, _REG_TX_IQK_PI_A@GOTPAGEOFF]
Lloh22:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #771
	movk	w2, #33300, lsl #16
	bl	_rtl8xxxu_write32
Lloh23:
	adrp	x8, _REG_RX_IQK_PI_A@GOTPAGE
Lloh24:
	ldr	x8, [x8, _REG_RX_IQK_PI_A@GOTPAGEOFF]
Lloh25:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #1746272256
	bl	_rtl8xxxu_write32
Lloh26:
	adrp	x8, _REG_IQK_AGC_RSP@GOTPAGE
Lloh27:
	ldr	x8, [x8, _REG_IQK_AGC_RSP@GOTPAGEOFF]
Lloh28:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #10513
	movk	w2, #70, lsl #16
	bl	_rtl8xxxu_write32
Lloh29:
	adrp	x20, _REG_IQK_AGC_PTS@GOTPAGE
Lloh30:
	ldr	x20, [x20, _REG_IQK_AGC_PTS@GOTPAGEOFF]
	ldr	w1, [x20]
	mov	x0, x19
	mov	w2, #-117440512
	bl	_rtl8xxxu_write32
	ldr	w1, [x20]
	mov	x0, x19
	mov	w2, #-134217728
	bl	_rtl8xxxu_write32
	mov	w0, #10
	bl	_mdelay
Lloh31:
	adrp	x8, _REG_RX_POWER_AFTER_IQK_A_2@GOTPAGE
Lloh32:
	ldr	x8, [x8, _REG_RX_POWER_AFTER_IQK_A_2@GOTPAGEOFF]
Lloh33:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_rtl8xxxu_read32
	mov	x20, x0
Lloh34:
	adrp	x8, _REG_TX_POWER_BEFORE_IQK_A@GOTPAGE
Lloh35:
	ldr	x8, [x8, _REG_TX_POWER_BEFORE_IQK_A@GOTPAGEOFF]
Lloh36:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_rtl8xxxu_read32
	mov	x21, x0
Lloh37:
	adrp	x8, _REG_TX_POWER_AFTER_IQK_A@GOTPAGE
Lloh38:
	ldr	x8, [x8, _REG_TX_POWER_AFTER_IQK_A@GOTPAGEOFF]
Lloh39:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_rtl8xxxu_read32
	mov	x19, x0
	mov	w0, #28
	bl	_BIT
	tst	w0, w20
	and	w8, w21, #0x3ff0000
	mov	w9, #21102592
	ccmp	w8, w9, #4, eq
	and	w8, w19, #0x3ff0000
	mov	w9, #4325376
	ccmp	w8, w9, #4, ne
	cset	w0, ne
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh37, Lloh38, Lloh39
	.loh AdrpLdrGotLdr	Lloh34, Lloh35, Lloh36
	.loh AdrpLdrGotLdr	Lloh31, Lloh32, Lloh33
	.loh AdrpLdrGot	Lloh29, Lloh30
	.loh AdrpLdrGotLdr	Lloh26, Lloh27, Lloh28
	.loh AdrpLdrGotLdr	Lloh23, Lloh24, Lloh25
	.loh AdrpLdrGotLdr	Lloh20, Lloh21, Lloh22
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh19
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh16
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGot	Lloh0, Lloh1
	.cfi_endproc
                                        ; -- End function
	.comm	_REG_FPGA0_IQK,4,2              ; @REG_FPGA0_IQK
	.comm	_RF_A,4,2                       ; @RF_A
	.comm	_RF6052_REG_UNKNOWN_DF,4,2      ; @RF6052_REG_UNKNOWN_DF
	.comm	_REG_TX_IQK_TONE_A,4,2          ; @REG_TX_IQK_TONE_A
	.comm	_REG_RX_IQK_TONE_A,4,2          ; @REG_RX_IQK_TONE_A
	.comm	_REG_TX_IQK_TONE_B,4,2          ; @REG_TX_IQK_TONE_B
	.comm	_REG_RX_IQK_TONE_B,4,2          ; @REG_RX_IQK_TONE_B
	.comm	_REG_TX_IQK_PI_A,4,2            ; @REG_TX_IQK_PI_A
	.comm	_REG_RX_IQK_PI_A,4,2            ; @REG_RX_IQK_PI_A
	.comm	_REG_IQK_AGC_RSP,4,2            ; @REG_IQK_AGC_RSP
	.comm	_REG_IQK_AGC_PTS,4,2            ; @REG_IQK_AGC_PTS
	.comm	_REG_RX_POWER_AFTER_IQK_A_2,4,2 ; @REG_RX_POWER_AFTER_IQK_A_2
	.comm	_REG_TX_POWER_BEFORE_IQK_A,4,2  ; @REG_TX_POWER_BEFORE_IQK_A
	.comm	_REG_TX_POWER_AFTER_IQK_A,4,2   ; @REG_TX_POWER_AFTER_IQK_A
	.no_dead_strip	_rtl8192eu_iqk_path_a
.subsections_via_symbols
