	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function ufs_mtk_phy_set_active
_ufs_mtk_phy_set_active:                ## @ufs_mtk_phy_set_active
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r14
	pushq	%rbx
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	movq	%rdi, %rbx
	movq	_MP_GLB_DIG_8C@GOTPCREL(%rip), %r14
	movl	(%r14), %esi
	movq	_PLL_PWR_ON@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	callq	_mphy_set_bit
	movl	(%r14), %esi
	movq	_FRC_FRC_PWR_ON@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	callq	_mphy_clr_bit
	movl	(%r14), %esi
	movq	_PLL_ISO_EN@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	callq	_mphy_clr_bit
	movl	(%r14), %esi
	movq	_FRC_PLL_ISO_EN@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	callq	_mphy_clr_bit
	movq	_MP_LN_RX_44@GOTPCREL(%rip), %r14
	movl	(%r14), %esi
	movq	_CDR_PWR_ON@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	callq	_mphy_set_bit
	movl	(%r14), %esi
	movq	_FRC_CDR_PWR_ON@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	callq	_mphy_clr_bit
	movl	(%r14), %esi
	movq	_CDR_ISO_EN@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	callq	_mphy_clr_bit
	movl	(%r14), %esi
	movq	_FRC_CDR_ISO_EN@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	callq	_mphy_clr_bit
	movq	_MP_LN_DIG_RX_AC@GOTPCREL(%rip), %r14
	movl	(%r14), %esi
	movq	_RX_SQ_EN@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	callq	_mphy_set_bit
	movl	(%r14), %esi
	movq	_FRC_RX_SQ_EN@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	callq	_mphy_clr_bit
	movl	$1, %edi
	callq	_udelay
	movq	_MP_LN_DIG_RX_9C@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_FSM_DIFZ_FRC@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	popq	%rbx
	popq	%r14
	popq	%rbp
	jmp	_mphy_clr_bit                   ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_MP_GLB_DIG_8C,4,2              ## @MP_GLB_DIG_8C
	.comm	_PLL_PWR_ON,4,2                 ## @PLL_PWR_ON
	.comm	_FRC_FRC_PWR_ON,4,2             ## @FRC_FRC_PWR_ON
	.comm	_PLL_ISO_EN,4,2                 ## @PLL_ISO_EN
	.comm	_FRC_PLL_ISO_EN,4,2             ## @FRC_PLL_ISO_EN
	.comm	_MP_LN_RX_44,4,2                ## @MP_LN_RX_44
	.comm	_CDR_PWR_ON,4,2                 ## @CDR_PWR_ON
	.comm	_FRC_CDR_PWR_ON,4,2             ## @FRC_CDR_PWR_ON
	.comm	_CDR_ISO_EN,4,2                 ## @CDR_ISO_EN
	.comm	_FRC_CDR_ISO_EN,4,2             ## @FRC_CDR_ISO_EN
	.comm	_MP_LN_DIG_RX_AC,4,2            ## @MP_LN_DIG_RX_AC
	.comm	_RX_SQ_EN,4,2                   ## @RX_SQ_EN
	.comm	_FRC_RX_SQ_EN,4,2               ## @FRC_RX_SQ_EN
	.comm	_MP_LN_DIG_RX_9C,4,2            ## @MP_LN_DIG_RX_9C
	.comm	_FSM_DIFZ_FRC,4,2               ## @FSM_DIFZ_FRC
	.no_dead_strip	_ufs_mtk_phy_set_active
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function ufs_mtk_phy_set_active
_ufs_mtk_phy_set_active:                ; @ufs_mtk_phy_set_active
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x19, x0
Lloh0:
	adrp	x20, _MP_GLB_DIG_8C@GOTPAGE
Lloh1:
	ldr	x20, [x20, _MP_GLB_DIG_8C@GOTPAGEOFF]
	ldr	w1, [x20]
Lloh2:
	adrp	x8, _PLL_PWR_ON@GOTPAGE
Lloh3:
	ldr	x8, [x8, _PLL_PWR_ON@GOTPAGEOFF]
Lloh4:
	ldr	w2, [x8]
	bl	_mphy_set_bit
	ldr	w1, [x20]
Lloh5:
	adrp	x8, _FRC_FRC_PWR_ON@GOTPAGE
Lloh6:
	ldr	x8, [x8, _FRC_FRC_PWR_ON@GOTPAGEOFF]
Lloh7:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_mphy_clr_bit
	ldr	w1, [x20]
Lloh8:
	adrp	x8, _PLL_ISO_EN@GOTPAGE
Lloh9:
	ldr	x8, [x8, _PLL_ISO_EN@GOTPAGEOFF]
Lloh10:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_mphy_clr_bit
	ldr	w1, [x20]
Lloh11:
	adrp	x8, _FRC_PLL_ISO_EN@GOTPAGE
Lloh12:
	ldr	x8, [x8, _FRC_PLL_ISO_EN@GOTPAGEOFF]
Lloh13:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_mphy_clr_bit
Lloh14:
	adrp	x20, _MP_LN_RX_44@GOTPAGE
Lloh15:
	ldr	x20, [x20, _MP_LN_RX_44@GOTPAGEOFF]
	ldr	w1, [x20]
Lloh16:
	adrp	x8, _CDR_PWR_ON@GOTPAGE
Lloh17:
	ldr	x8, [x8, _CDR_PWR_ON@GOTPAGEOFF]
Lloh18:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_mphy_set_bit
	ldr	w1, [x20]
Lloh19:
	adrp	x8, _FRC_CDR_PWR_ON@GOTPAGE
Lloh20:
	ldr	x8, [x8, _FRC_CDR_PWR_ON@GOTPAGEOFF]
Lloh21:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_mphy_clr_bit
	ldr	w1, [x20]
Lloh22:
	adrp	x8, _CDR_ISO_EN@GOTPAGE
Lloh23:
	ldr	x8, [x8, _CDR_ISO_EN@GOTPAGEOFF]
Lloh24:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_mphy_clr_bit
	ldr	w1, [x20]
Lloh25:
	adrp	x8, _FRC_CDR_ISO_EN@GOTPAGE
Lloh26:
	ldr	x8, [x8, _FRC_CDR_ISO_EN@GOTPAGEOFF]
Lloh27:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_mphy_clr_bit
Lloh28:
	adrp	x20, _MP_LN_DIG_RX_AC@GOTPAGE
Lloh29:
	ldr	x20, [x20, _MP_LN_DIG_RX_AC@GOTPAGEOFF]
	ldr	w1, [x20]
Lloh30:
	adrp	x8, _RX_SQ_EN@GOTPAGE
Lloh31:
	ldr	x8, [x8, _RX_SQ_EN@GOTPAGEOFF]
Lloh32:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_mphy_set_bit
	ldr	w1, [x20]
Lloh33:
	adrp	x8, _FRC_RX_SQ_EN@GOTPAGE
Lloh34:
	ldr	x8, [x8, _FRC_RX_SQ_EN@GOTPAGEOFF]
Lloh35:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_mphy_clr_bit
	mov	w0, #1
	bl	_udelay
Lloh36:
	adrp	x8, _MP_LN_DIG_RX_9C@GOTPAGE
Lloh37:
	ldr	x8, [x8, _MP_LN_DIG_RX_9C@GOTPAGEOFF]
Lloh38:
	ldr	w1, [x8]
Lloh39:
	adrp	x8, _FSM_DIFZ_FRC@GOTPAGE
Lloh40:
	ldr	x8, [x8, _FSM_DIFZ_FRC@GOTPAGEOFF]
Lloh41:
	ldr	w2, [x8]
	mov	x0, x19
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	b	_mphy_clr_bit
	.loh AdrpLdrGotLdr	Lloh39, Lloh40, Lloh41
	.loh AdrpLdrGotLdr	Lloh36, Lloh37, Lloh38
	.loh AdrpLdrGotLdr	Lloh33, Lloh34, Lloh35
	.loh AdrpLdrGotLdr	Lloh30, Lloh31, Lloh32
	.loh AdrpLdrGot	Lloh28, Lloh29
	.loh AdrpLdrGotLdr	Lloh25, Lloh26, Lloh27
	.loh AdrpLdrGotLdr	Lloh22, Lloh23, Lloh24
	.loh AdrpLdrGotLdr	Lloh19, Lloh20, Lloh21
	.loh AdrpLdrGotLdr	Lloh16, Lloh17, Lloh18
	.loh AdrpLdrGot	Lloh14, Lloh15
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGot	Lloh0, Lloh1
	.cfi_endproc
                                        ; -- End function
	.comm	_MP_GLB_DIG_8C,4,2              ; @MP_GLB_DIG_8C
	.comm	_PLL_PWR_ON,4,2                 ; @PLL_PWR_ON
	.comm	_FRC_FRC_PWR_ON,4,2             ; @FRC_FRC_PWR_ON
	.comm	_PLL_ISO_EN,4,2                 ; @PLL_ISO_EN
	.comm	_FRC_PLL_ISO_EN,4,2             ; @FRC_PLL_ISO_EN
	.comm	_MP_LN_RX_44,4,2                ; @MP_LN_RX_44
	.comm	_CDR_PWR_ON,4,2                 ; @CDR_PWR_ON
	.comm	_FRC_CDR_PWR_ON,4,2             ; @FRC_CDR_PWR_ON
	.comm	_CDR_ISO_EN,4,2                 ; @CDR_ISO_EN
	.comm	_FRC_CDR_ISO_EN,4,2             ; @FRC_CDR_ISO_EN
	.comm	_MP_LN_DIG_RX_AC,4,2            ; @MP_LN_DIG_RX_AC
	.comm	_RX_SQ_EN,4,2                   ; @RX_SQ_EN
	.comm	_FRC_RX_SQ_EN,4,2               ; @FRC_RX_SQ_EN
	.comm	_MP_LN_DIG_RX_9C,4,2            ; @MP_LN_DIG_RX_9C
	.comm	_FSM_DIFZ_FRC,4,2               ; @FSM_DIFZ_FRC
	.no_dead_strip	_ufs_mtk_phy_set_active
.subsections_via_symbols
