	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_ath5k_hw_set_ifs_intervals     ## -- Begin function ath5k_hw_set_ifs_intervals
	.p2align	4, 0x90
_ath5k_hw_set_ifs_intervals:            ## @ath5k_hw_set_ifs_intervals
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$24, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%esi, %r12d
	movq	%rdi, %r15
	movq	24(%rdi), %rbx
	callq	_ath5k_hw_htoclock
	cmpl	$6, %r12d
	jb	LBB0_2
## %bb.1:
	movq	_AR5K_SLOT_TIME_MAX@GOTPCREL(%rip), %rcx
	cmpl	(%rcx), %eax
	jg	LBB0_2
## %bb.3:
	movl	%eax, -48(%rbp)                 ## 4-byte Spill
	movq	%r15, %rdi
	callq	_ath5k_hw_get_default_sifs
	movl	%eax, %r13d
	leal	-2(%r13), %esi
	movq	%r15, %rdi
	callq	_ath5k_hw_htoclock
	movl	%eax, %r14d
	movq	_NL80211_BAND_5GHZ@GOTPCREL(%rip), %rax
	movq	(%rax), %rdi
	cmpq	%rdi, (%rbx)
	je	LBB0_5
## %bb.4:
	movq	_NL80211_BAND_2GHZ@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
LBB0_5:
	movl	(%r15), %ecx
	cmpl	$129, %ecx
	je	LBB0_8
## %bb.6:
	xorl	%eax, %eax
	cmpl	$128, %ecx
	jne	LBB0_10
## %bb.7:
	movq	_IEEE80211_RATE_SUPPORTS_5MHZ@GOTPCREL(%rip), %rax
	jmp	LBB0_9
LBB0_8:
	movq	_IEEE80211_RATE_SUPPORTS_10MHZ@GOTPCREL(%rip), %rax
LBB0_9:
	movl	(%rax), %eax
LBB0_10:
	movq	16(%r15), %rdx
	movl	%edi, %esi
	shlq	$4, %rsi
	movl	(%rdx,%rsi), %ecx
	testl	%ecx, %ecx
	movq	%r13, -64(%rbp)                 ## 8-byte Spill
	jle	LBB0_11
## %bb.13:
	movq	8(%rdx,%rsi), %r13
	.p2align	4, 0x90
LBB0_14:                                ## =>This Inner Loop Header: Depth=1
	movl	(%r13), %edx
	notl	%edx
	testl	%edx, %eax
	je	LBB0_15
## %bb.12:                              ##   in Loop: Header=BB0_14 Depth=1
	addq	$4, %r13
	decq	%rcx
	jne	LBB0_14
LBB0_11:
	movq	%rdi, %rbx
	xorl	%r13d, %r13d
	jmp	LBB0_16
LBB0_15:
	movq	%rdi, %rbx
LBB0_16:
	xorl	%edi, %edi
	testq	%r13, %r13
	sete	%dil
	callq	_WARN_ON
	testq	%rax, %rax
	je	LBB0_17
LBB0_2:
	movq	_EINVAL@GOTPCREL(%rip), %rax
	xorl	%r14d, %r14d
	subl	(%rax), %r14d
LBB0_21:
	movl	%r14d, %eax
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_17:
	movl	%r14d, -44(%rbp)                ## 4-byte Spill
	xorl	%r14d, %r14d
	movq	%r15, %rdi
	movl	%ebx, %esi
	movl	$10, %edx
	movq	%r13, %rcx
	xorl	%r8d, %r8d
	callq	_ath5k_hw_get_frame_duration
                                        ## kill: def $eax killed $eax def $rax
	movq	-64(%rbp), %rbx                 ## 8-byte Reload
	leal	(%rbx,%r12,2), %ecx
	movq	%rcx, -56(%rbp)                 ## 8-byte Spill
	leal	(%rax,%rcx), %esi
	movq	%r15, %rdi
	callq	_ath5k_hw_htoclock
	movl	%eax, %r13d
	movq	8(%r15), %rax
	movq	_AR5K_AR5210@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	movl	-48(%rbp), %esi                 ## 4-byte Reload
	jne	LBB0_19
## %bb.18:
	movq	_AR5K_SLOT_TIME@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r15, %rdi
	callq	_ath5k_hw_reg_write
	movq	_AR5K_IFS1_EIFS@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	%r13d, %edi
	callq	_AR5K_REG_SM
	movl	%eax, %r13d
	addl	%r12d, %ebx
	movq	%r15, %rdi
	movl	%ebx, %esi
	callq	_ath5k_hw_htoclock
	movq	_AR5K_IFS1_PIFS@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	movl	%eax, %edi
	callq	_AR5K_REG_SM
	movl	%eax, %r12d
	movq	%r15, %rdi
	movq	-56(%rbp), %rsi                 ## 8-byte Reload
                                        ## kill: def $esi killed $esi killed $rsi
	callq	_ath5k_hw_htoclock
	movq	_AR5K_IFS0_DIFS_S@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shll	%cl, %eax
	movl	-44(%rbp), %esi                 ## 4-byte Reload
	orl	%eax, %esi
	movq	_AR5K_IFS0@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r15, %rdi
	callq	_ath5k_hw_reg_write
	movq	_AR5K_IFS1_CS_EN_S@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	movq	_AR5K_INIT_CARR_SENSE_EN@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	shll	%cl, %esi
	orl	%r13d, %r12d
	orl	%r12d, %esi
	movq	_AR5K_IFS1@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r15, %rdi
	jmp	LBB0_20
LBB0_19:
	movq	_AR5K_DCU_GBL_IFS_SLOT@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r15, %rdi
	callq	_ath5k_hw_reg_write
	movq	_AR5K_DCU_GBL_IFS_EIFS@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r15, %rdi
	movl	%r13d, %esi
	callq	_ath5k_hw_reg_write
	movq	_AR5K_DCU_GBL_IFS_MISC@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_AR5K_DCU_GBL_IFS_MISC_SIFS_DUR_USEC@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r15, %rdi
	movl	%ebx, %ecx
	callq	_AR5K_REG_WRITE_BITS
	movq	_AR5K_DCU_GBL_IFS_SIFS@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r15, %rdi
	movl	-44(%rbp), %esi                 ## 4-byte Reload
LBB0_20:
	callq	_ath5k_hw_reg_write
	jmp	LBB0_21
	.cfi_endproc
                                        ## -- End function
	.comm	_AR5K_SLOT_TIME_MAX,4,2         ## @AR5K_SLOT_TIME_MAX
	.comm	_EINVAL,4,2                     ## @EINVAL
	.comm	_NL80211_BAND_5GHZ,8,3          ## @NL80211_BAND_5GHZ
	.comm	_NL80211_BAND_2GHZ,4,2          ## @NL80211_BAND_2GHZ
	.comm	_IEEE80211_RATE_SUPPORTS_5MHZ,4,2 ## @IEEE80211_RATE_SUPPORTS_5MHZ
	.comm	_IEEE80211_RATE_SUPPORTS_10MHZ,4,2 ## @IEEE80211_RATE_SUPPORTS_10MHZ
	.comm	_AR5K_AR5210,8,3                ## @AR5K_AR5210
	.comm	_AR5K_SLOT_TIME,4,2             ## @AR5K_SLOT_TIME
	.comm	_AR5K_IFS1_EIFS,4,2             ## @AR5K_IFS1_EIFS
	.comm	_AR5K_IFS1_PIFS,4,2             ## @AR5K_IFS1_PIFS
	.comm	_AR5K_IFS0_DIFS_S,4,2           ## @AR5K_IFS0_DIFS_S
	.comm	_AR5K_IFS0,4,2                  ## @AR5K_IFS0
	.comm	_AR5K_INIT_CARR_SENSE_EN,4,2    ## @AR5K_INIT_CARR_SENSE_EN
	.comm	_AR5K_IFS1_CS_EN_S,4,2          ## @AR5K_IFS1_CS_EN_S
	.comm	_AR5K_IFS1,4,2                  ## @AR5K_IFS1
	.comm	_AR5K_DCU_GBL_IFS_SLOT,4,2      ## @AR5K_DCU_GBL_IFS_SLOT
	.comm	_AR5K_DCU_GBL_IFS_EIFS,4,2      ## @AR5K_DCU_GBL_IFS_EIFS
	.comm	_AR5K_DCU_GBL_IFS_MISC,4,2      ## @AR5K_DCU_GBL_IFS_MISC
	.comm	_AR5K_DCU_GBL_IFS_MISC_SIFS_DUR_USEC,4,2 ## @AR5K_DCU_GBL_IFS_MISC_SIFS_DUR_USEC
	.comm	_AR5K_DCU_GBL_IFS_SIFS,4,2      ## @AR5K_DCU_GBL_IFS_SIFS
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_ath5k_hw_set_ifs_intervals     ; -- Begin function ath5k_hw_set_ifs_intervals
	.p2align	2
_ath5k_hw_set_ifs_intervals:            ; @ath5k_hw_set_ifs_intervals
	.cfi_startproc
; %bb.0:
	stp	x26, x25, [sp, #-80]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	mov	x22, x1
	mov	x19, x0
	ldr	x24, [x0, #24]
	bl	_ath5k_hw_htoclock
	cmp	w22, #6
	b.lo	LBB0_14
; %bb.1:
	mov	x23, x0
Lloh0:
	adrp	x8, _AR5K_SLOT_TIME_MAX@GOTPAGE
Lloh1:
	ldr	x8, [x8, _AR5K_SLOT_TIME_MAX@GOTPAGEOFF]
Lloh2:
	ldr	w8, [x8]
	cmp	w0, w8
	b.gt	LBB0_14
; %bb.2:
	mov	x0, x19
	bl	_ath5k_hw_get_default_sifs
	mov	x21, x0
	sub	w1, w0, #2
	mov	x0, x19
	bl	_ath5k_hw_htoclock
	mov	x20, x0
	ldr	x8, [x24]
Lloh3:
	adrp	x9, _NL80211_BAND_5GHZ@GOTPAGE
Lloh4:
	ldr	x9, [x9, _NL80211_BAND_5GHZ@GOTPAGEOFF]
Lloh5:
	adrp	x10, _NL80211_BAND_2GHZ@GOTPAGE
Lloh6:
	ldr	x10, [x10, _NL80211_BAND_2GHZ@GOTPAGEOFF]
Lloh7:
	ldr	x9, [x9]
Lloh8:
	ldr	w10, [x10]
	cmp	x8, x9
	csel	w24, w9, w10, eq
	ldr	w8, [x19]
	cmp	w8, #129
	b.eq	LBB0_5
; %bb.3:
	cmp	w8, #128
	b.ne	LBB0_7
; %bb.4:
Lloh9:
	adrp	x8, _IEEE80211_RATE_SUPPORTS_5MHZ@GOTPAGE
Lloh10:
	ldr	x8, [x8, _IEEE80211_RATE_SUPPORTS_5MHZ@GOTPAGEOFF]
	b	LBB0_6
LBB0_5:
Lloh11:
	adrp	x8, _IEEE80211_RATE_SUPPORTS_10MHZ@GOTPAGE
Lloh12:
	ldr	x8, [x8, _IEEE80211_RATE_SUPPORTS_10MHZ@GOTPAGEOFF]
LBB0_6:
	ldr	w8, [x8]
	b	LBB0_8
LBB0_7:
	mov	w8, #0
LBB0_8:
	ldr	x10, [x19, #16]
	lsl	x9, x24, #4
	ldr	w9, [x10, x9]
	cmp	w9, #1
	b.lt	LBB0_12
; %bb.9:
	add	x10, x10, x24, lsl #4
	ldr	x25, [x10, #8]
LBB0_10:                                ; =>This Inner Loop Header: Depth=1
	ldr	w10, [x25]
	bics	wzr, w8, w10
	b.eq	LBB0_13
; %bb.11:                               ;   in Loop: Header=BB0_10 Depth=1
	add	x25, x25, #4
	subs	x9, x9, #1
	b.ne	LBB0_10
LBB0_12:
	mov	x25, #0
LBB0_13:
	cmp	x25, #0
	cset	w0, eq
	bl	_WARN_ON
	cbz	x0, LBB0_16
LBB0_14:
Lloh13:
	adrp	x8, _EINVAL@GOTPAGE
Lloh14:
	ldr	x8, [x8, _EINVAL@GOTPAGEOFF]
Lloh15:
	ldr	w8, [x8]
	neg	w0, w8
LBB0_15:
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp], #80             ; 16-byte Folded Reload
	ret
LBB0_16:
	mov	x0, x19
	mov	x1, x24
	mov	w2, #10
	mov	x3, x25
	mov	w4, #0
	bl	_ath5k_hw_get_frame_duration
	add	w24, w21, w22, lsl #1
	add	w1, w24, w0
	mov	x0, x19
	bl	_ath5k_hw_htoclock
	mov	x25, x0
	ldr	x8, [x19, #8]
Lloh16:
	adrp	x9, _AR5K_AR5210@GOTPAGE
Lloh17:
	ldr	x9, [x9, _AR5K_AR5210@GOTPAGEOFF]
Lloh18:
	ldr	x9, [x9]
	cmp	x8, x9
	b.ne	LBB0_18
; %bb.17:
Lloh19:
	adrp	x8, _AR5K_SLOT_TIME@GOTPAGE
Lloh20:
	ldr	x8, [x8, _AR5K_SLOT_TIME@GOTPAGEOFF]
Lloh21:
	ldr	w2, [x8]
	mov	x0, x19
	mov	x1, x23
	bl	_ath5k_hw_reg_write
Lloh22:
	adrp	x8, _AR5K_IFS1_EIFS@GOTPAGE
Lloh23:
	ldr	x8, [x8, _AR5K_IFS1_EIFS@GOTPAGEOFF]
Lloh24:
	ldr	w1, [x8]
	mov	x0, x25
	bl	_AR5K_REG_SM
	mov	x23, x0
	add	w1, w21, w22
	mov	x0, x19
	bl	_ath5k_hw_htoclock
Lloh25:
	adrp	x8, _AR5K_IFS1_PIFS@GOTPAGE
Lloh26:
	ldr	x8, [x8, _AR5K_IFS1_PIFS@GOTPAGEOFF]
Lloh27:
	ldr	w1, [x8]
	bl	_AR5K_REG_SM
	mov	x21, x0
	mov	x0, x19
	mov	x1, x24
	bl	_ath5k_hw_htoclock
Lloh28:
	adrp	x8, _AR5K_IFS0_DIFS_S@GOTPAGE
Lloh29:
	ldr	x8, [x8, _AR5K_IFS0_DIFS_S@GOTPAGEOFF]
Lloh30:
	ldr	w8, [x8]
	lsl	w8, w0, w8
	orr	w1, w8, w20
Lloh31:
	adrp	x8, _AR5K_IFS0@GOTPAGE
Lloh32:
	ldr	x8, [x8, _AR5K_IFS0@GOTPAGEOFF]
Lloh33:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_ath5k_hw_reg_write
	orr	w8, w21, w23
Lloh34:
	adrp	x9, _AR5K_INIT_CARR_SENSE_EN@GOTPAGE
Lloh35:
	ldr	x9, [x9, _AR5K_INIT_CARR_SENSE_EN@GOTPAGEOFF]
Lloh36:
	ldr	w9, [x9]
Lloh37:
	adrp	x10, _AR5K_IFS1_CS_EN_S@GOTPAGE
Lloh38:
	ldr	x10, [x10, _AR5K_IFS1_CS_EN_S@GOTPAGEOFF]
Lloh39:
	ldr	w10, [x10]
	lsl	w9, w9, w10
	orr	w1, w8, w9
Lloh40:
	adrp	x8, _AR5K_IFS1@GOTPAGE
Lloh41:
	ldr	x8, [x8, _AR5K_IFS1@GOTPAGEOFF]
Lloh42:
	ldr	w2, [x8]
	mov	x0, x19
	b	LBB0_19
LBB0_18:
Lloh43:
	adrp	x8, _AR5K_DCU_GBL_IFS_SLOT@GOTPAGE
Lloh44:
	ldr	x8, [x8, _AR5K_DCU_GBL_IFS_SLOT@GOTPAGEOFF]
Lloh45:
	ldr	w2, [x8]
	mov	x0, x19
	mov	x1, x23
	bl	_ath5k_hw_reg_write
Lloh46:
	adrp	x8, _AR5K_DCU_GBL_IFS_EIFS@GOTPAGE
Lloh47:
	ldr	x8, [x8, _AR5K_DCU_GBL_IFS_EIFS@GOTPAGEOFF]
Lloh48:
	ldr	w2, [x8]
	mov	x0, x19
	mov	x1, x25
	bl	_ath5k_hw_reg_write
Lloh49:
	adrp	x8, _AR5K_DCU_GBL_IFS_MISC@GOTPAGE
Lloh50:
	ldr	x8, [x8, _AR5K_DCU_GBL_IFS_MISC@GOTPAGEOFF]
Lloh51:
	ldr	w1, [x8]
Lloh52:
	adrp	x8, _AR5K_DCU_GBL_IFS_MISC_SIFS_DUR_USEC@GOTPAGE
Lloh53:
	ldr	x8, [x8, _AR5K_DCU_GBL_IFS_MISC_SIFS_DUR_USEC@GOTPAGEOFF]
Lloh54:
	ldr	w2, [x8]
	mov	x0, x19
	mov	x3, x21
	bl	_AR5K_REG_WRITE_BITS
Lloh55:
	adrp	x8, _AR5K_DCU_GBL_IFS_SIFS@GOTPAGE
Lloh56:
	ldr	x8, [x8, _AR5K_DCU_GBL_IFS_SIFS@GOTPAGEOFF]
Lloh57:
	ldr	w2, [x8]
	mov	x0, x19
	mov	x1, x20
LBB0_19:
	bl	_ath5k_hw_reg_write
	mov	w0, #0
	b	LBB0_15
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh7
	.loh AdrpLdrGot	Lloh9, Lloh10
	.loh AdrpLdrGot	Lloh11, Lloh12
	.loh AdrpLdrGotLdr	Lloh13, Lloh14, Lloh15
	.loh AdrpLdrGotLdr	Lloh16, Lloh17, Lloh18
	.loh AdrpLdrGotLdr	Lloh40, Lloh41, Lloh42
	.loh AdrpLdrGotLdr	Lloh37, Lloh38, Lloh39
	.loh AdrpLdrGotLdr	Lloh34, Lloh35, Lloh36
	.loh AdrpLdrGotLdr	Lloh31, Lloh32, Lloh33
	.loh AdrpLdrGotLdr	Lloh28, Lloh29, Lloh30
	.loh AdrpLdrGotLdr	Lloh25, Lloh26, Lloh27
	.loh AdrpLdrGotLdr	Lloh22, Lloh23, Lloh24
	.loh AdrpLdrGotLdr	Lloh19, Lloh20, Lloh21
	.loh AdrpLdrGotLdr	Lloh55, Lloh56, Lloh57
	.loh AdrpLdrGotLdr	Lloh52, Lloh53, Lloh54
	.loh AdrpLdrGotLdr	Lloh49, Lloh50, Lloh51
	.loh AdrpLdrGotLdr	Lloh46, Lloh47, Lloh48
	.loh AdrpLdrGotLdr	Lloh43, Lloh44, Lloh45
	.cfi_endproc
                                        ; -- End function
	.comm	_AR5K_SLOT_TIME_MAX,4,2         ; @AR5K_SLOT_TIME_MAX
	.comm	_EINVAL,4,2                     ; @EINVAL
	.comm	_NL80211_BAND_5GHZ,8,3          ; @NL80211_BAND_5GHZ
	.comm	_NL80211_BAND_2GHZ,4,2          ; @NL80211_BAND_2GHZ
	.comm	_IEEE80211_RATE_SUPPORTS_5MHZ,4,2 ; @IEEE80211_RATE_SUPPORTS_5MHZ
	.comm	_IEEE80211_RATE_SUPPORTS_10MHZ,4,2 ; @IEEE80211_RATE_SUPPORTS_10MHZ
	.comm	_AR5K_AR5210,8,3                ; @AR5K_AR5210
	.comm	_AR5K_SLOT_TIME,4,2             ; @AR5K_SLOT_TIME
	.comm	_AR5K_IFS1_EIFS,4,2             ; @AR5K_IFS1_EIFS
	.comm	_AR5K_IFS1_PIFS,4,2             ; @AR5K_IFS1_PIFS
	.comm	_AR5K_IFS0_DIFS_S,4,2           ; @AR5K_IFS0_DIFS_S
	.comm	_AR5K_IFS0,4,2                  ; @AR5K_IFS0
	.comm	_AR5K_INIT_CARR_SENSE_EN,4,2    ; @AR5K_INIT_CARR_SENSE_EN
	.comm	_AR5K_IFS1_CS_EN_S,4,2          ; @AR5K_IFS1_CS_EN_S
	.comm	_AR5K_IFS1,4,2                  ; @AR5K_IFS1
	.comm	_AR5K_DCU_GBL_IFS_SLOT,4,2      ; @AR5K_DCU_GBL_IFS_SLOT
	.comm	_AR5K_DCU_GBL_IFS_EIFS,4,2      ; @AR5K_DCU_GBL_IFS_EIFS
	.comm	_AR5K_DCU_GBL_IFS_MISC,4,2      ; @AR5K_DCU_GBL_IFS_MISC
	.comm	_AR5K_DCU_GBL_IFS_MISC_SIFS_DUR_USEC,4,2 ; @AR5K_DCU_GBL_IFS_MISC_SIFS_DUR_USEC
	.comm	_AR5K_DCU_GBL_IFS_SIFS,4,2      ; @AR5K_DCU_GBL_IFS_SIFS
.subsections_via_symbols
