	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_mt76x02_irq_handler            ## -- Begin function mt76x02_irq_handler
	.p2align	4, 0x90
_mt76x02_irq_handler:                   ## @mt76x02_irq_handler
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rsi, %rbx
	movq	_MT_INT_SOURCE_CSR@GOTPCREL(%rip), %r15
	movl	(%r15), %esi
	movq	%rbx, %rdi
	callq	_mt76_rr
	movl	%eax, %r14d
	movl	(%r15), %esi
	movq	%rbx, %rdi
	movl	%eax, %edx
	callq	_mt76_wr
	movq	_MT76_STATE_INITIALIZED@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	leaq	52(%rbx), %rsi
	callq	_test_bit
	testl	%eax, %eax
	je	LBB0_1
## %bb.2:
	movl	48(%rbx), %edx
	movq	%rbx, %rdi
	movl	%r14d, %esi
	callq	_trace_dev_irq
	andl	48(%rbx), %r14d
	xorl	%edi, %edi
	callq	_MT_INT_RX_DONE
	testl	%eax, %r14d
	je	LBB0_4
## %bb.3:
	xorl	%edi, %edi
	callq	_MT_INT_RX_DONE
	movq	%rbx, %rdi
	movl	%eax, %esi
	callq	_mt76x02_irq_disable
	movq	40(%rbx), %rdi
	callq	_napi_schedule
LBB0_4:
	movl	$1, %edi
	callq	_MT_INT_RX_DONE
	testl	%r14d, %eax
	je	LBB0_6
## %bb.5:
	movl	$1, %edi
	callq	_MT_INT_RX_DONE
	movq	%rbx, %rdi
	movl	%eax, %esi
	callq	_mt76x02_irq_disable
	movq	40(%rbx), %rdi
	addq	$4, %rdi
	callq	_napi_schedule
LBB0_6:
	movq	_MT_INT_PRE_TBTT@GOTPCREL(%rip), %rax
	testl	%r14d, (%rax)
	je	LBB0_8
## %bb.7:
	leaq	32(%rbx), %rdi
	callq	_tasklet_schedule
LBB0_8:
	leaq	8(%rbx), %r15
	movq	_MT_INT_TBTT@GOTPCREL(%rip), %rax
	testl	%r14d, (%rax)
	je	LBB0_12
## %bb.9:
	cmpq	$0, 24(%rbx)
	je	LBB0_11
## %bb.10:
	movq	%r15, %rdi
	callq	_mt76_csa_finish
	jmp	LBB0_12
LBB0_1:
	movq	_IRQ_NONE@GOTPCREL(%rip), %r15
	jmp	LBB0_18
LBB0_11:
	movq	16(%rbx), %rax
	movq	_MT_TXQ_PSD@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rcx
	movl	(%rax,%rcx,4), %esi
	movq	%rbx, %rdi
	callq	_mt76_queue_kick
LBB0_12:
	movq	_MT_INT_TX_STAT@GOTPCREL(%rip), %r12
	movl	(%r12), %eax
	testl	%r14d, %eax
	je	LBB0_14
## %bb.13:
	movq	%rbx, %rdi
	movl	$1, %esi
	callq	_mt76x02_mac_poll_tx_status
	movl	(%r12), %eax
LBB0_14:
	movq	_MT_INT_TX_DONE_ALL@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	orl	%esi, %eax
	testl	%r14d, %eax
	je	LBB0_16
## %bb.15:
	movq	%rbx, %rdi
	callq	_mt76x02_irq_disable
	movq	%r15, %rdi
	callq	_napi_schedule
LBB0_16:
	movq	_MT_INT_GPTIMER@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_IRQ_HANDLED@GOTPCREL(%rip), %r15
	testl	%r14d, %esi
	je	LBB0_18
## %bb.17:
	movq	%rbx, %rdi
	callq	_mt76x02_irq_disable
	movq	%rbx, %rdi
	callq	_tasklet_schedule
LBB0_18:
	movl	(%r15), %eax
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_MT_INT_SOURCE_CSR,4,2          ## @MT_INT_SOURCE_CSR
	.comm	_MT76_STATE_INITIALIZED,4,2     ## @MT76_STATE_INITIALIZED
	.comm	_IRQ_NONE,4,2                   ## @IRQ_NONE
	.comm	_MT_INT_PRE_TBTT,4,2            ## @MT_INT_PRE_TBTT
	.comm	_MT_INT_TBTT,4,2                ## @MT_INT_TBTT
	.comm	_MT_TXQ_PSD,8,3                 ## @MT_TXQ_PSD
	.comm	_MT_INT_TX_STAT,4,2             ## @MT_INT_TX_STAT
	.comm	_MT_INT_TX_DONE_ALL,4,2         ## @MT_INT_TX_DONE_ALL
	.comm	_MT_INT_GPTIMER,4,2             ## @MT_INT_GPTIMER
	.comm	_IRQ_HANDLED,4,2                ## @IRQ_HANDLED
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_mt76x02_irq_handler            ; -- Begin function mt76x02_irq_handler
	.p2align	2
_mt76x02_irq_handler:                   ; @mt76x02_irq_handler
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x1
Lloh0:
	adrp	x21, _MT_INT_SOURCE_CSR@GOTPAGE
Lloh1:
	ldr	x21, [x21, _MT_INT_SOURCE_CSR@GOTPAGEOFF]
	ldr	w1, [x21]
	mov	x0, x19
	bl	_mt76_rr
	mov	x20, x0
	ldr	w1, [x21]
	mov	x0, x19
	mov	x2, x20
	bl	_mt76_wr
Lloh2:
	adrp	x8, _MT76_STATE_INITIALIZED@GOTPAGE
Lloh3:
	ldr	x8, [x8, _MT76_STATE_INITIALIZED@GOTPAGEOFF]
Lloh4:
	ldr	w0, [x8]
	add	x1, x19, #52
	bl	_test_bit
	cbz	w0, LBB0_10
; %bb.1:
	ldr	w2, [x19, #48]
	mov	x0, x19
	mov	x1, x20
	bl	_trace_dev_irq
	ldr	w8, [x19, #48]
	and	w21, w8, w20
	mov	w0, #0
	bl	_MT_INT_RX_DONE
	tst	w21, w0
	b.eq	LBB0_3
; %bb.2:
	mov	w0, #0
	bl	_MT_INT_RX_DONE
	mov	x1, x0
	mov	x0, x19
	bl	_mt76x02_irq_disable
	ldr	x0, [x19, #40]
	bl	_napi_schedule
LBB0_3:
	mov	w0, #1
	bl	_MT_INT_RX_DONE
	tst	w0, w21
	b.eq	LBB0_5
; %bb.4:
	mov	w0, #1
	bl	_MT_INT_RX_DONE
	mov	x1, x0
	mov	x0, x19
	bl	_mt76x02_irq_disable
	ldr	x8, [x19, #40]
	add	x0, x8, #4
	bl	_napi_schedule
LBB0_5:
	add	x20, x19, #8
Lloh5:
	adrp	x8, _MT_INT_PRE_TBTT@GOTPAGE
Lloh6:
	ldr	x8, [x8, _MT_INT_PRE_TBTT@GOTPAGEOFF]
Lloh7:
	ldr	w8, [x8]
	tst	w8, w21
	b.eq	LBB0_7
; %bb.6:
	add	x0, x19, #32
	bl	_tasklet_schedule
LBB0_7:
Lloh8:
	adrp	x8, _MT_INT_TBTT@GOTPAGE
Lloh9:
	ldr	x8, [x8, _MT_INT_TBTT@GOTPAGEOFF]
Lloh10:
	ldr	w8, [x8]
	tst	w8, w21
	b.eq	LBB0_12
; %bb.8:
	ldr	x8, [x19, #24]
	cbz	x8, LBB0_11
; %bb.9:
	mov	x0, x20
	bl	_mt76_csa_finish
	b	LBB0_12
LBB0_10:
Lloh11:
	adrp	x8, _IRQ_NONE@GOTPAGE
Lloh12:
	ldr	x8, [x8, _IRQ_NONE@GOTPAGEOFF]
	b	LBB0_19
LBB0_11:
	ldr	x8, [x19, #16]
Lloh13:
	adrp	x9, _MT_TXQ_PSD@GOTPAGE
Lloh14:
	ldr	x9, [x9, _MT_TXQ_PSD@GOTPAGEOFF]
Lloh15:
	ldr	x9, [x9]
	ldr	w1, [x8, x9, lsl #2]
	mov	x0, x19
	bl	_mt76_queue_kick
LBB0_12:
Lloh16:
	adrp	x22, _MT_INT_TX_STAT@GOTPAGE
Lloh17:
	ldr	x22, [x22, _MT_INT_TX_STAT@GOTPAGEOFF]
	ldr	w8, [x22]
	tst	w8, w21
	b.eq	LBB0_14
; %bb.13:
	mov	x0, x19
	mov	w1, #1
	bl	_mt76x02_mac_poll_tx_status
	ldr	w8, [x22]
LBB0_14:
Lloh18:
	adrp	x9, _MT_INT_TX_DONE_ALL@GOTPAGE
Lloh19:
	ldr	x9, [x9, _MT_INT_TX_DONE_ALL@GOTPAGEOFF]
Lloh20:
	ldr	w1, [x9]
	orr	w8, w1, w8
	tst	w8, w21
	b.eq	LBB0_16
; %bb.15:
	mov	x0, x19
	bl	_mt76x02_irq_disable
	mov	x0, x20
	bl	_napi_schedule
LBB0_16:
Lloh21:
	adrp	x8, _MT_INT_GPTIMER@GOTPAGE
Lloh22:
	ldr	x8, [x8, _MT_INT_GPTIMER@GOTPAGEOFF]
Lloh23:
	ldr	w1, [x8]
	tst	w1, w21
	b.eq	LBB0_18
; %bb.17:
	mov	x0, x19
	bl	_mt76x02_irq_disable
	mov	x0, x19
	bl	_tasklet_schedule
LBB0_18:
Lloh24:
	adrp	x8, _IRQ_HANDLED@GOTPAGE
Lloh25:
	ldr	x8, [x8, _IRQ_HANDLED@GOTPAGEOFF]
LBB0_19:
	ldr	w0, [x8]
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGot	Lloh11, Lloh12
	.loh AdrpLdrGotLdr	Lloh13, Lloh14, Lloh15
	.loh AdrpLdrGot	Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGot	Lloh24, Lloh25
	.cfi_endproc
                                        ; -- End function
	.comm	_MT_INT_SOURCE_CSR,4,2          ; @MT_INT_SOURCE_CSR
	.comm	_MT76_STATE_INITIALIZED,4,2     ; @MT76_STATE_INITIALIZED
	.comm	_IRQ_NONE,4,2                   ; @IRQ_NONE
	.comm	_MT_INT_PRE_TBTT,4,2            ; @MT_INT_PRE_TBTT
	.comm	_MT_INT_TBTT,4,2                ; @MT_INT_TBTT
	.comm	_MT_TXQ_PSD,8,3                 ; @MT_TXQ_PSD
	.comm	_MT_INT_TX_STAT,4,2             ; @MT_INT_TX_STAT
	.comm	_MT_INT_TX_DONE_ALL,4,2         ; @MT_INT_TX_DONE_ALL
	.comm	_MT_INT_GPTIMER,4,2             ; @MT_INT_GPTIMER
	.comm	_IRQ_HANDLED,4,2                ; @IRQ_HANDLED
.subsections_via_symbols
