	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function ath5k_hw_nic_reset
_ath5k_hw_nic_reset:                    ## @ath5k_hw_nic_reset
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%esi, %ebx
	xorl	%r15d, %r15d
	cmpl	$1, %esi
	sbbl	%r15d, %r15d
	movq	%rdi, %r14
	orl	%esi, %r15d
	movq	_AR5K_RXDP@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_ath5k_hw_reg_read
	movq	_AR5K_RESET_CTL@GOTPCREL(%rip), %r12
	movl	(%r12), %edx
	movq	%r14, %rdi
	movl	%ebx, %esi
	callq	_ath5k_hw_reg_write
	movl	$15, %edi
	movl	$20, %esi
	callq	_usleep_range
	movq	(%r14), %rax
	movq	_AR5K_AR5210@GOTPCREL(%rip), %rcx
	movq	_AR5K_RESET_CTL_PCU@GOTPCREL(%rip), %r13
	movl	(%r13), %edx
	cmpq	(%rcx), %rax
	jne	LBB0_2
## %bb.1:
	movq	_AR5K_RESET_CTL_DMA@GOTPCREL(%rip), %rax
	orl	(%rax), %edx
	movq	_AR5K_RESET_CTL_MAC@GOTPCREL(%rip), %rcx
	movl	%edx, %eax
	orl	(%rcx), %eax
	movq	_AR5K_RESET_CTL_PHY@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	jmp	LBB0_3
LBB0_2:
	movq	_AR5K_RESET_CTL_BASEBAND@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
LBB0_3:
	orl	%eax, %edx
	andl	%edx, %ebx
	andl	%r15d, %edx
	movl	(%r12), %esi
	movq	%r14, %rdi
	movl	%ebx, %ecx
	xorl	%r8d, %r8d
	callq	_ath5k_hw_register_timeout
	movl	%eax, %r15d
	testl	%ebx, (%r13)
	jne	LBB0_5
## %bb.4:
	movq	_AR5K_INIT_CFG@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_AR5K_CFG@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r14, %rdi
	callq	_ath5k_hw_reg_write
LBB0_5:
	movl	%r15d, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_AR5K_RXDP,4,2                  ## @AR5K_RXDP
	.comm	_AR5K_RESET_CTL,4,2             ## @AR5K_RESET_CTL
	.comm	_AR5K_AR5210,8,3                ## @AR5K_AR5210
	.comm	_AR5K_RESET_CTL_PCU,4,2         ## @AR5K_RESET_CTL_PCU
	.comm	_AR5K_RESET_CTL_DMA,4,2         ## @AR5K_RESET_CTL_DMA
	.comm	_AR5K_RESET_CTL_MAC,4,2         ## @AR5K_RESET_CTL_MAC
	.comm	_AR5K_RESET_CTL_PHY,4,2         ## @AR5K_RESET_CTL_PHY
	.comm	_AR5K_RESET_CTL_BASEBAND,4,2    ## @AR5K_RESET_CTL_BASEBAND
	.comm	_AR5K_INIT_CFG,4,2              ## @AR5K_INIT_CFG
	.comm	_AR5K_CFG,4,2                   ## @AR5K_CFG
	.no_dead_strip	_ath5k_hw_nic_reset
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function ath5k_hw_nic_reset
_ath5k_hw_nic_reset:                    ; @ath5k_hw_nic_reset
	.cfi_startproc
; %bb.0:
	stp	x24, x23, [sp, #-64]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x20, x1
	mov	x19, x0
	cmp	w1, #0
	csinv	w22, w1, wzr, ne
Lloh0:
	adrp	x8, _AR5K_RXDP@GOTPAGE
Lloh1:
	ldr	x8, [x8, _AR5K_RXDP@GOTPAGEOFF]
Lloh2:
	ldr	w1, [x8]
	bl	_ath5k_hw_reg_read
Lloh3:
	adrp	x23, _AR5K_RESET_CTL@GOTPAGE
Lloh4:
	ldr	x23, [x23, _AR5K_RESET_CTL@GOTPAGEOFF]
	ldr	w2, [x23]
	mov	x0, x19
	mov	x1, x20
	bl	_ath5k_hw_reg_write
	mov	w0, #15
	mov	w1, #20
	bl	_usleep_range
Lloh5:
	adrp	x8, _AR5K_AR5210@GOTPAGE
Lloh6:
	ldr	x8, [x8, _AR5K_AR5210@GOTPAGEOFF]
	ldr	x9, [x19]
Lloh7:
	ldr	x10, [x8]
Lloh8:
	adrp	x24, _AR5K_RESET_CTL_PCU@GOTPAGE
Lloh9:
	ldr	x24, [x24, _AR5K_RESET_CTL_PCU@GOTPAGEOFF]
	ldr	w8, [x24]
	cmp	x9, x10
	b.ne	LBB0_2
; %bb.1:
Lloh10:
	adrp	x9, _AR5K_RESET_CTL_DMA@GOTPAGE
Lloh11:
	ldr	x9, [x9, _AR5K_RESET_CTL_DMA@GOTPAGEOFF]
Lloh12:
	ldr	w9, [x9]
Lloh13:
	adrp	x10, _AR5K_RESET_CTL_MAC@GOTPAGE
Lloh14:
	ldr	x10, [x10, _AR5K_RESET_CTL_MAC@GOTPAGEOFF]
	orr	w8, w9, w8
Lloh15:
	ldr	w9, [x10]
	orr	w9, w8, w9
Lloh16:
	adrp	x8, _AR5K_RESET_CTL_PHY@GOTPAGE
Lloh17:
	ldr	x8, [x8, _AR5K_RESET_CTL_PHY@GOTPAGEOFF]
Lloh18:
	ldr	w8, [x8]
	b	LBB0_3
LBB0_2:
Lloh19:
	adrp	x9, _AR5K_RESET_CTL_BASEBAND@GOTPAGE
Lloh20:
	ldr	x9, [x9, _AR5K_RESET_CTL_BASEBAND@GOTPAGEOFF]
Lloh21:
	ldr	w9, [x9]
LBB0_3:
	orr	w8, w9, w8
	and	w21, w8, w20
	and	w2, w8, w22
	ldr	w1, [x23]
	mov	x0, x19
	mov	x3, x21
	mov	w4, #0
	bl	_ath5k_hw_register_timeout
	mov	x20, x0
	ldr	w8, [x24]
	tst	w8, w21
	b.ne	LBB0_5
; %bb.4:
Lloh22:
	adrp	x8, _AR5K_INIT_CFG@GOTPAGE
Lloh23:
	ldr	x8, [x8, _AR5K_INIT_CFG@GOTPAGEOFF]
Lloh24:
	ldr	w1, [x8]
Lloh25:
	adrp	x8, _AR5K_CFG@GOTPAGE
Lloh26:
	ldr	x8, [x8, _AR5K_CFG@GOTPAGEOFF]
Lloh27:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_ath5k_hw_reg_write
LBB0_5:
	mov	x0, x20
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGot	Lloh8, Lloh9
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGot	Lloh3, Lloh4
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh16, Lloh17, Lloh18
	.loh AdrpLdrGotLdr	Lloh13, Lloh14, Lloh15
	.loh AdrpLdrGotLdr	Lloh10, Lloh11, Lloh12
	.loh AdrpLdrGotLdr	Lloh19, Lloh20, Lloh21
	.loh AdrpLdrGotLdr	Lloh25, Lloh26, Lloh27
	.loh AdrpLdrGotLdr	Lloh22, Lloh23, Lloh24
	.cfi_endproc
                                        ; -- End function
	.comm	_AR5K_RXDP,4,2                  ; @AR5K_RXDP
	.comm	_AR5K_RESET_CTL,4,2             ; @AR5K_RESET_CTL
	.comm	_AR5K_AR5210,8,3                ; @AR5K_AR5210
	.comm	_AR5K_RESET_CTL_PCU,4,2         ; @AR5K_RESET_CTL_PCU
	.comm	_AR5K_RESET_CTL_DMA,4,2         ; @AR5K_RESET_CTL_DMA
	.comm	_AR5K_RESET_CTL_MAC,4,2         ; @AR5K_RESET_CTL_MAC
	.comm	_AR5K_RESET_CTL_PHY,4,2         ; @AR5K_RESET_CTL_PHY
	.comm	_AR5K_RESET_CTL_BASEBAND,4,2    ; @AR5K_RESET_CTL_BASEBAND
	.comm	_AR5K_INIT_CFG,4,2              ; @AR5K_INIT_CFG
	.comm	_AR5K_CFG,4,2                   ; @AR5K_CFG
	.no_dead_strip	_ath5k_hw_nic_reset
.subsections_via_symbols
