	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function ar9003_hw_override_ini
_ar9003_hw_override_ini:                ## @ar9003_hw_override_ini
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r14
	movq	_AR_DIAG_SW@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_AR_DIAG_RX_DIS@GOTPCREL(%rip), %rax
	movq	_AR_DIAG_RX_ABORT@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	orl	(%rax), %edx
	callq	_REG_SET_BIT
	movq	_AR_PCU_MISC_MODE2@GOTPCREL(%rip), %rbx
	movl	(%rbx), %esi
	movq	%r14, %rdi
	callq	_REG_READ
	movq	_AR_ADHOC_MCAST_KEYID_ENABLE@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	notl	%edx
	andl	%eax, %edx
	movq	_AR_AGG_WEP_ENABLE_FIX@GOTPCREL(%rip), %rax
	movq	_AR_AGG_WEP_ENABLE@GOTPCREL(%rip), %rcx
	orl	(%rax), %edx
	orl	(%rcx), %edx
	movq	_AR_PCU_MISC_MODE2_CFP_IGNORE@GOTPCREL(%rip), %rax
	orl	(%rax), %edx
	movl	(%rbx), %esi
	movq	%r14, %rdi
	callq	_REG_WRITE
	movq	%r14, %rdi
	callq	_AR_SREV_9462
	testq	%rax, %rax
	jne	LBB0_2
## %bb.1:
	movq	%r14, %rdi
	callq	_AR_SREV_9565
	testq	%rax, %rax
	je	LBB0_5
LBB0_2:
	movq	_AR_GLB_SWREG_DISCONT_MODE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_AR_GLB_SWREG_DISCONT_EN_BT_WLAN@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r14, %rdi
	callq	_REG_WRITE
	movq	_AR_PHY_TX_IQCAL_CONTROL_0@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_AR_PHY_TX_IQCAL_CONTROL_0_ENABLE_TXIQ_CAL@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r14, %rdi
	callq	_REG_READ_FIELD
	movq	_TX_IQ_CAL@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	testq	%rax, %rax
	je	LBB0_4
## %bb.3:
	orl	%ecx, 8(%r14)
	jmp	LBB0_5
LBB0_4:
	notl	%ecx
	andl	%ecx, 8(%r14)
LBB0_5:
	movq	_AR_PHY_CL_CAL_CTL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	callq	_REG_READ
	movq	_AR_PHY_CL_CAL_ENABLE@GOTPCREL(%rip), %rdx
	movq	_TX_CL_CAL@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	testl	%eax, (%rdx)
	je	LBB0_7
## %bb.6:
	orl	%ecx, 8(%r14)
	jmp	LBB0_8
LBB0_7:
	notl	%ecx
	andl	%ecx, 8(%r14)
LBB0_8:
	movq	%r14, %rdi
	callq	_AR_SREV_9340
	testq	%rax, %rax
	jne	LBB0_13
## %bb.9:
	movq	%r14, %rdi
	callq	_AR_SREV_9531
	testq	%rax, %rax
	jne	LBB0_13
## %bb.10:
	movq	%r14, %rdi
	callq	_AR_SREV_9550
	testq	%rax, %rax
	jne	LBB0_13
## %bb.11:
	movq	%r14, %rdi
	callq	_AR_SREV_9561
	testq	%rax, %rax
	je	LBB0_12
LBB0_13:
	cmpq	$0, (%r14)
	movq	_AR_RTC_DERIVED_CLK@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	$1218, %eax                     ## imm = 0x4C2
	movl	$760, %edx                      ## imm = 0x2F8
	cmovel	%eax, %edx
	movl	$1111040, %eax                  ## imm = 0x10F400
	movl	$1110999, %ebx                  ## imm = 0x10F3D7
	cmovel	%eax, %ebx
	movl	$124928, %eax                   ## imm = 0x1E800
	movl	$124846, %r15d                  ## imm = 0x1E7AE
	cmovel	%eax, %r15d
	movq	%r14, %rdi
	callq	_REG_WRITE
	movq	_AR_SLP32_MODE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	movl	%ebx, %edx
	callq	_REG_WRITE
	movq	_AR_SLP32_INC@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	movl	%r15d, %edx
	callq	_REG_WRITE
	movl	$100, %edi
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_udelay                         ## TAILCALL
LBB0_12:
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_AR_DIAG_SW,4,2                 ## @AR_DIAG_SW
	.comm	_AR_DIAG_RX_DIS,4,2             ## @AR_DIAG_RX_DIS
	.comm	_AR_DIAG_RX_ABORT,4,2           ## @AR_DIAG_RX_ABORT
	.comm	_AR_PCU_MISC_MODE2,4,2          ## @AR_PCU_MISC_MODE2
	.comm	_AR_ADHOC_MCAST_KEYID_ENABLE,4,2 ## @AR_ADHOC_MCAST_KEYID_ENABLE
	.comm	_AR_AGG_WEP_ENABLE_FIX,4,2      ## @AR_AGG_WEP_ENABLE_FIX
	.comm	_AR_AGG_WEP_ENABLE,4,2          ## @AR_AGG_WEP_ENABLE
	.comm	_AR_PCU_MISC_MODE2_CFP_IGNORE,4,2 ## @AR_PCU_MISC_MODE2_CFP_IGNORE
	.comm	_AR_GLB_SWREG_DISCONT_MODE,4,2  ## @AR_GLB_SWREG_DISCONT_MODE
	.comm	_AR_GLB_SWREG_DISCONT_EN_BT_WLAN,4,2 ## @AR_GLB_SWREG_DISCONT_EN_BT_WLAN
	.comm	_AR_PHY_TX_IQCAL_CONTROL_0,4,2  ## @AR_PHY_TX_IQCAL_CONTROL_0
	.comm	_AR_PHY_TX_IQCAL_CONTROL_0_ENABLE_TXIQ_CAL,4,2 ## @AR_PHY_TX_IQCAL_CONTROL_0_ENABLE_TXIQ_CAL
	.comm	_TX_IQ_CAL,4,2                  ## @TX_IQ_CAL
	.comm	_AR_PHY_CL_CAL_CTL,4,2          ## @AR_PHY_CL_CAL_CTL
	.comm	_AR_PHY_CL_CAL_ENABLE,4,2       ## @AR_PHY_CL_CAL_ENABLE
	.comm	_TX_CL_CAL,4,2                  ## @TX_CL_CAL
	.comm	_AR_RTC_DERIVED_CLK,4,2         ## @AR_RTC_DERIVED_CLK
	.comm	_AR_SLP32_MODE,4,2              ## @AR_SLP32_MODE
	.comm	_AR_SLP32_INC,4,2               ## @AR_SLP32_INC
	.no_dead_strip	_ar9003_hw_override_ini
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function ar9003_hw_override_ini
_ar9003_hw_override_ini:                ; @ar9003_hw_override_ini
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x0
Lloh0:
	adrp	x8, _AR_DIAG_SW@GOTPAGE
Lloh1:
	ldr	x8, [x8, _AR_DIAG_SW@GOTPAGEOFF]
Lloh2:
	adrp	x9, _AR_DIAG_RX_DIS@GOTPAGE
Lloh3:
	ldr	x9, [x9, _AR_DIAG_RX_DIS@GOTPAGEOFF]
Lloh4:
	ldr	w1, [x8]
Lloh5:
	ldr	w8, [x9]
Lloh6:
	adrp	x9, _AR_DIAG_RX_ABORT@GOTPAGE
Lloh7:
	ldr	x9, [x9, _AR_DIAG_RX_ABORT@GOTPAGEOFF]
Lloh8:
	ldr	w9, [x9]
	orr	w2, w9, w8
	bl	_REG_SET_BIT
Lloh9:
	adrp	x20, _AR_PCU_MISC_MODE2@GOTPAGE
Lloh10:
	ldr	x20, [x20, _AR_PCU_MISC_MODE2@GOTPAGEOFF]
	ldr	w1, [x20]
	mov	x0, x19
	bl	_REG_READ
Lloh11:
	adrp	x8, _AR_ADHOC_MCAST_KEYID_ENABLE@GOTPAGE
Lloh12:
	ldr	x8, [x8, _AR_ADHOC_MCAST_KEYID_ENABLE@GOTPAGEOFF]
Lloh13:
	ldr	w8, [x8]
Lloh14:
	adrp	x9, _AR_AGG_WEP_ENABLE_FIX@GOTPAGE
Lloh15:
	ldr	x9, [x9, _AR_AGG_WEP_ENABLE_FIX@GOTPAGEOFF]
	bic	w8, w0, w8
Lloh16:
	ldr	w9, [x9]
Lloh17:
	adrp	x10, _AR_AGG_WEP_ENABLE@GOTPAGE
Lloh18:
	ldr	x10, [x10, _AR_AGG_WEP_ENABLE@GOTPAGEOFF]
Lloh19:
	adrp	x11, _AR_PCU_MISC_MODE2_CFP_IGNORE@GOTPAGE
Lloh20:
	ldr	x11, [x11, _AR_PCU_MISC_MODE2_CFP_IGNORE@GOTPAGEOFF]
Lloh21:
	ldr	w10, [x10]
Lloh22:
	ldr	w11, [x11]
	orr	w8, w8, w9
	orr	w8, w8, w10
	orr	w2, w8, w11
	ldr	w1, [x20]
	mov	x0, x19
	bl	_REG_WRITE
	mov	x0, x19
	bl	_AR_SREV_9462
	cbnz	x0, LBB0_2
; %bb.1:
	mov	x0, x19
	bl	_AR_SREV_9565
	cbz	x0, LBB0_6
LBB0_2:
Lloh23:
	adrp	x8, _AR_GLB_SWREG_DISCONT_MODE@GOTPAGE
Lloh24:
	ldr	x8, [x8, _AR_GLB_SWREG_DISCONT_MODE@GOTPAGEOFF]
Lloh25:
	ldr	w1, [x8]
Lloh26:
	adrp	x8, _AR_GLB_SWREG_DISCONT_EN_BT_WLAN@GOTPAGE
Lloh27:
	ldr	x8, [x8, _AR_GLB_SWREG_DISCONT_EN_BT_WLAN@GOTPAGEOFF]
Lloh28:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_REG_WRITE
Lloh29:
	adrp	x8, _AR_PHY_TX_IQCAL_CONTROL_0@GOTPAGE
Lloh30:
	ldr	x8, [x8, _AR_PHY_TX_IQCAL_CONTROL_0@GOTPAGEOFF]
Lloh31:
	ldr	w1, [x8]
Lloh32:
	adrp	x8, _AR_PHY_TX_IQCAL_CONTROL_0_ENABLE_TXIQ_CAL@GOTPAGE
Lloh33:
	ldr	x8, [x8, _AR_PHY_TX_IQCAL_CONTROL_0_ENABLE_TXIQ_CAL@GOTPAGEOFF]
Lloh34:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_REG_READ_FIELD
Lloh35:
	adrp	x8, _TX_IQ_CAL@GOTPAGE
Lloh36:
	ldr	x8, [x8, _TX_IQ_CAL@GOTPAGEOFF]
Lloh37:
	ldr	w8, [x8]
	cbz	x0, LBB0_4
; %bb.3:
	ldr	w9, [x19, #8]
	orr	w8, w9, w8
	b	LBB0_5
LBB0_4:
	ldr	w9, [x19, #8]
	bic	w8, w9, w8
LBB0_5:
	str	w8, [x19, #8]
LBB0_6:
Lloh38:
	adrp	x8, _AR_PHY_CL_CAL_CTL@GOTPAGE
Lloh39:
	ldr	x8, [x8, _AR_PHY_CL_CAL_CTL@GOTPAGEOFF]
Lloh40:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_REG_READ
Lloh41:
	adrp	x8, _AR_PHY_CL_CAL_ENABLE@GOTPAGE
Lloh42:
	ldr	x8, [x8, _AR_PHY_CL_CAL_ENABLE@GOTPAGEOFF]
Lloh43:
	ldr	w9, [x8]
Lloh44:
	adrp	x8, _TX_CL_CAL@GOTPAGE
Lloh45:
	ldr	x8, [x8, _TX_CL_CAL@GOTPAGEOFF]
Lloh46:
	ldr	w8, [x8]
	tst	w9, w0
	b.eq	LBB0_8
; %bb.7:
	ldr	w9, [x19, #8]
	orr	w8, w9, w8
	b	LBB0_9
LBB0_8:
	ldr	w9, [x19, #8]
	bic	w8, w9, w8
LBB0_9:
	str	w8, [x19, #8]
	mov	x0, x19
	bl	_AR_SREV_9340
	cbnz	x0, LBB0_13
; %bb.10:
	mov	x0, x19
	bl	_AR_SREV_9531
	cbnz	x0, LBB0_13
; %bb.11:
	mov	x0, x19
	bl	_AR_SREV_9550
	cbnz	x0, LBB0_13
; %bb.12:
	mov	x0, x19
	bl	_AR_SREV_9561
	cbz	x0, LBB0_14
LBB0_13:
Lloh47:
	adrp	x8, _AR_RTC_DERIVED_CLK@GOTPAGE
Lloh48:
	ldr	x8, [x8, _AR_RTC_DERIVED_CLK@GOTPAGEOFF]
	ldr	x9, [x19]
Lloh49:
	ldr	w1, [x8]
	cmp	x9, #0
	mov	w8, #760
	mov	w9, #1218
	csel	w2, w9, w8, eq
	mov	w8, #62423
	movk	w8, #16, lsl #16
	add	w9, w8, #41
	csel	w20, w9, w8, eq
	mov	w8, #59310
	movk	w8, #1, lsl #16
	add	w9, w8, #82
	csel	w21, w9, w8, eq
	mov	x0, x19
	bl	_REG_WRITE
Lloh50:
	adrp	x8, _AR_SLP32_MODE@GOTPAGE
Lloh51:
	ldr	x8, [x8, _AR_SLP32_MODE@GOTPAGEOFF]
Lloh52:
	ldr	w1, [x8]
	mov	x0, x19
	mov	x2, x20
	bl	_REG_WRITE
Lloh53:
	adrp	x8, _AR_SLP32_INC@GOTPAGE
Lloh54:
	ldr	x8, [x8, _AR_SLP32_INC@GOTPAGEOFF]
Lloh55:
	ldr	w1, [x8]
	mov	x0, x19
	mov	x2, x21
	bl	_REG_WRITE
	mov	w0, #100
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	_udelay
LBB0_14:
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh19, Lloh20, Lloh22
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh21
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh16
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpLdrGot	Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh4
	.loh AdrpLdrGotLdr	Lloh35, Lloh36, Lloh37
	.loh AdrpLdrGotLdr	Lloh32, Lloh33, Lloh34
	.loh AdrpLdrGotLdr	Lloh29, Lloh30, Lloh31
	.loh AdrpLdrGotLdr	Lloh26, Lloh27, Lloh28
	.loh AdrpLdrGotLdr	Lloh23, Lloh24, Lloh25
	.loh AdrpLdrGotLdr	Lloh44, Lloh45, Lloh46
	.loh AdrpLdrGotLdr	Lloh41, Lloh42, Lloh43
	.loh AdrpLdrGotLdr	Lloh38, Lloh39, Lloh40
	.loh AdrpLdrGotLdr	Lloh53, Lloh54, Lloh55
	.loh AdrpLdrGotLdr	Lloh50, Lloh51, Lloh52
	.loh AdrpLdrGotLdr	Lloh47, Lloh48, Lloh49
	.cfi_endproc
                                        ; -- End function
	.comm	_AR_DIAG_SW,4,2                 ; @AR_DIAG_SW
	.comm	_AR_DIAG_RX_DIS,4,2             ; @AR_DIAG_RX_DIS
	.comm	_AR_DIAG_RX_ABORT,4,2           ; @AR_DIAG_RX_ABORT
	.comm	_AR_PCU_MISC_MODE2,4,2          ; @AR_PCU_MISC_MODE2
	.comm	_AR_ADHOC_MCAST_KEYID_ENABLE,4,2 ; @AR_ADHOC_MCAST_KEYID_ENABLE
	.comm	_AR_AGG_WEP_ENABLE_FIX,4,2      ; @AR_AGG_WEP_ENABLE_FIX
	.comm	_AR_AGG_WEP_ENABLE,4,2          ; @AR_AGG_WEP_ENABLE
	.comm	_AR_PCU_MISC_MODE2_CFP_IGNORE,4,2 ; @AR_PCU_MISC_MODE2_CFP_IGNORE
	.comm	_AR_GLB_SWREG_DISCONT_MODE,4,2  ; @AR_GLB_SWREG_DISCONT_MODE
	.comm	_AR_GLB_SWREG_DISCONT_EN_BT_WLAN,4,2 ; @AR_GLB_SWREG_DISCONT_EN_BT_WLAN
	.comm	_AR_PHY_TX_IQCAL_CONTROL_0,4,2  ; @AR_PHY_TX_IQCAL_CONTROL_0
	.comm	_AR_PHY_TX_IQCAL_CONTROL_0_ENABLE_TXIQ_CAL,4,2 ; @AR_PHY_TX_IQCAL_CONTROL_0_ENABLE_TXIQ_CAL
	.comm	_TX_IQ_CAL,4,2                  ; @TX_IQ_CAL
	.comm	_AR_PHY_CL_CAL_CTL,4,2          ; @AR_PHY_CL_CAL_CTL
	.comm	_AR_PHY_CL_CAL_ENABLE,4,2       ; @AR_PHY_CL_CAL_ENABLE
	.comm	_TX_CL_CAL,4,2                  ; @TX_CL_CAL
	.comm	_AR_RTC_DERIVED_CLK,4,2         ; @AR_RTC_DERIVED_CLK
	.comm	_AR_SLP32_MODE,4,2              ; @AR_SLP32_MODE
	.comm	_AR_SLP32_INC,4,2               ; @AR_SLP32_INC
	.no_dead_strip	_ar9003_hw_override_ini
.subsections_via_symbols
