	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function hix5hd2_sata_phy_init
_hix5hd2_sata_phy_init:                 ## @hix5hd2_sata_phy_init
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$24, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r15
	movq	___stack_chk_guard@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	movq	%rax, -48(%rbp)
	callq	_phy_get_drvdata
	movq	%rax, %r14
	cmpq	$0, 8(%rax)
	je	LBB0_4
## %bb.1:
	movl	(%r15), %edi
	leaq	L_.str(%rip), %rsi
	leaq	-56(%rbp), %rdx
	movl	$2, %ecx
	callq	_of_property_read_u32_array
	testl	%eax, %eax
	je	LBB0_3
## %bb.2:
	movl	%eax, %ebx
	leaq	L_.str.1(%rip), %rsi
	movq	%r15, %rdi
	callq	_dev_err
	jmp	LBB0_5
LBB0_3:
	movq	8(%r14), %r12
	movl	-56(%rbp), %r15d
	movl	-52(%rbp), %edi
	callq	_BIT
	movl	%eax, %ebx
	movl	-52(%rbp), %edi
	callq	_BIT
	movq	%r12, %rdi
	movl	%r15d, %esi
	movl	%ebx, %edx
	movl	%eax, %ecx
	callq	_regmap_update_bits
LBB0_4:
	movq	_SATA_PHY0_CTLL@GOTPCREL(%rip), %r15
	movq	(%r15), %rdi
	addq	(%r14), %rdi
	callq	_readl_relaxed
	movq	_MPLL_MULTIPLIER_MASK@GOTPCREL(%rip), %rcx
	movq	_REF_USE_PAD@GOTPCREL(%rip), %rdx
	movl	(%rdx), %ebx
	orl	(%rcx), %ebx
	notl	%ebx
	movq	_MPLL_MULTIPLIER_50M@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	movq	_MPLL_MULTIPLIER_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shll	%cl, %edx
	andl	%eax, %ebx
	movq	_REF_SSP_EN@GOTPCREL(%rip), %rax
	orl	(%rax), %ebx
	movq	_PHY_RESET@GOTPCREL(%rip), %r12
	orl	%edx, %ebx
	orl	(%r12), %ebx
	movq	(%r15), %rsi
	addq	(%r14), %rsi
	movl	%ebx, %edi
	callq	_writel_relaxed
	movl	$20, %edi
	callq	_msleep
	movl	(%r12), %edi
	notl	%edi
	andl	%ebx, %edi
	movq	(%r15), %rsi
	addq	(%r14), %rsi
	callq	_writel_relaxed
	movq	_SATA_PORT_PHYCTL1@GOTPCREL(%rip), %rbx
	movq	(%rbx), %rdi
	addq	(%r14), %rdi
	callq	_readl_relaxed
	movq	_AMPLITUDE_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	notl	%edx
	andl	%eax, %edx
	movq	_AMPLITUDE_GEN3@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movq	_AMPLITUDE_GEN3_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shll	%cl, %eax
	orl	%edx, %eax
	movq	_AMPLITUDE_GEN2@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	movq	_AMPLITUDE_GEN2_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shll	%cl, %edx
	movq	_AMPLITUDE_GEN1@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edi
	movq	_AMPLITUDE_GEN1_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shll	%cl, %edi
	orl	%edx, %edi
	orl	%eax, %edi
	movq	(%rbx), %rsi
	addq	(%r14), %rsi
	callq	_writel_relaxed
	movq	_SATA_PORT_PHYCTL2@GOTPCREL(%rip), %rbx
	movq	(%rbx), %rdi
	addq	(%r14), %rdi
	callq	_readl_relaxed
	movq	_PREEMPH_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	notl	%edx
	andl	%eax, %edx
	movq	_PREEMPH_GEN3@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movq	_PREEMPH_GEN3_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shll	%cl, %eax
	orl	%edx, %eax
	movq	_PREEMPH_GEN2@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	movq	_PREEMPH_GEN2_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shll	%cl, %edx
	movq	_PREEMPH_GEN1@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edi
	movq	_PREEMPH_GEN1_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shll	%cl, %edi
	orl	%edx, %edi
	orl	%eax, %edi
	movq	(%rbx), %rsi
	addq	(%r14), %rsi
	callq	_writel_relaxed
	movq	_SATA_PORT_PHYCTL@GOTPCREL(%rip), %r15
	movq	(%r15), %rdi
	addq	(%r14), %rdi
	callq	_readl_relaxed
	movq	_SPEED_MODE_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	notl	%edx
	movq	_SPEED_MODE_GEN1@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ebx
	movq	_HALF_RATE_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	movl	%ebx, %esi
	shll	%cl, %esi
	movq	_PHY_CONFIG_SHIFT@GOTPCREL(%rip), %r12
	movb	(%r12), %cl
	movl	%ebx, %edi
	shll	%cl, %edi
	andl	%eax, %edx
	orl	%edx, %esi
	movq	_GEN2_EN_SHIFT@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	shll	%cl, %ebx
	orl	%edi, %ebx
	orl	%esi, %ebx
	movq	_SPEED_CTRL@GOTPCREL(%rip), %r13
	orl	(%r13), %ebx
	movq	(%r15), %rsi
	addq	(%r14), %rsi
	movl	%ebx, %edi
	callq	_writel_relaxed
	movl	$20, %edi
	callq	_msleep
	movq	_SPEED_MODE_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	notl	%eax
	andl	%ebx, %eax
	movq	_SPEED_MODE_GEN3@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ebx
	movq	_HALF_RATE_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	movl	%ebx, %edx
	shll	%cl, %edx
	movb	(%r12), %cl
	movl	%ebx, %esi
	shll	%cl, %esi
	orl	%edx, %esi
	movq	_GEN2_EN_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shll	%cl, %ebx
	orl	%esi, %ebx
	orl	%eax, %ebx
	orl	(%r13), %ebx
	movq	(%r15), %rsi
	addq	(%r14), %rsi
	movl	%ebx, %edi
	callq	_writel_relaxed
	movl	(%r13), %eax
	movq	_SPEED_MODE_MASK@GOTPCREL(%rip), %rcx
	orl	(%rcx), %eax
	movq	_SPEED_MODE_GEN2@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edi
	movq	_HALF_RATE_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	movl	%edi, %edx
	shll	%cl, %edx
	movb	(%r12), %cl
	movl	%edi, %esi
	shll	%cl, %esi
	notl	%eax
	andl	%ebx, %eax
	orl	%edx, %esi
	movq	_GEN2_EN_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shll	%cl, %edi
	orl	%esi, %edi
	orl	%eax, %edi
	movq	(%r15), %rsi
	addq	(%r14), %rsi
	callq	_writel_relaxed
	xorl	%ebx, %ebx
LBB0_5:
	movq	___stack_chk_guard@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	cmpq	-48(%rbp), %rax
	jne	LBB0_7
## %bb.6:
	movl	%ebx, %eax
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_7:
	callq	___stack_chk_fail
	.cfi_endproc
                                        ## -- End function
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"hisilicon,power-reg"

L_.str.1:                               ## @.str.1
	.asciz	"Fail read hisilicon,power-reg\n"

	.comm	_SATA_PHY0_CTLL,8,3             ## @SATA_PHY0_CTLL
	.comm	_MPLL_MULTIPLIER_MASK,4,2       ## @MPLL_MULTIPLIER_MASK
	.comm	_REF_USE_PAD,4,2                ## @REF_USE_PAD
	.comm	_MPLL_MULTIPLIER_50M,4,2        ## @MPLL_MULTIPLIER_50M
	.comm	_MPLL_MULTIPLIER_SHIFT,4,2      ## @MPLL_MULTIPLIER_SHIFT
	.comm	_REF_SSP_EN,4,2                 ## @REF_SSP_EN
	.comm	_PHY_RESET,4,2                  ## @PHY_RESET
	.comm	_SATA_PORT_PHYCTL1,8,3          ## @SATA_PORT_PHYCTL1
	.comm	_AMPLITUDE_MASK,4,2             ## @AMPLITUDE_MASK
	.comm	_AMPLITUDE_GEN3,4,2             ## @AMPLITUDE_GEN3
	.comm	_AMPLITUDE_GEN3_SHIFT,4,2       ## @AMPLITUDE_GEN3_SHIFT
	.comm	_AMPLITUDE_GEN2,4,2             ## @AMPLITUDE_GEN2
	.comm	_AMPLITUDE_GEN2_SHIFT,4,2       ## @AMPLITUDE_GEN2_SHIFT
	.comm	_AMPLITUDE_GEN1,4,2             ## @AMPLITUDE_GEN1
	.comm	_AMPLITUDE_GEN1_SHIFT,4,2       ## @AMPLITUDE_GEN1_SHIFT
	.comm	_SATA_PORT_PHYCTL2,8,3          ## @SATA_PORT_PHYCTL2
	.comm	_PREEMPH_MASK,4,2               ## @PREEMPH_MASK
	.comm	_PREEMPH_GEN3,4,2               ## @PREEMPH_GEN3
	.comm	_PREEMPH_GEN3_SHIFT,4,2         ## @PREEMPH_GEN3_SHIFT
	.comm	_PREEMPH_GEN2,4,2               ## @PREEMPH_GEN2
	.comm	_PREEMPH_GEN2_SHIFT,4,2         ## @PREEMPH_GEN2_SHIFT
	.comm	_PREEMPH_GEN1,4,2               ## @PREEMPH_GEN1
	.comm	_PREEMPH_GEN1_SHIFT,4,2         ## @PREEMPH_GEN1_SHIFT
	.comm	_SATA_PORT_PHYCTL,8,3           ## @SATA_PORT_PHYCTL
	.comm	_SPEED_MODE_MASK,4,2            ## @SPEED_MODE_MASK
	.comm	_SPEED_MODE_GEN1,4,2            ## @SPEED_MODE_GEN1
	.comm	_HALF_RATE_SHIFT,4,2            ## @HALF_RATE_SHIFT
	.comm	_PHY_CONFIG_SHIFT,4,2           ## @PHY_CONFIG_SHIFT
	.comm	_GEN2_EN_SHIFT,4,2              ## @GEN2_EN_SHIFT
	.comm	_SPEED_CTRL,4,2                 ## @SPEED_CTRL
	.comm	_SPEED_MODE_GEN3,4,2            ## @SPEED_MODE_GEN3
	.comm	_SPEED_MODE_GEN2,4,2            ## @SPEED_MODE_GEN2
	.no_dead_strip	_hix5hd2_sata_phy_init
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function hix5hd2_sata_phy_init
_hix5hd2_sata_phy_init:                 ; @hix5hd2_sata_phy_init
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #96
	.cfi_def_cfa_offset 96
	stp	x26, x25, [sp, #16]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #32]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #48]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #64]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #80]             ; 16-byte Folded Spill
	add	x29, sp, #80
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	mov	x20, x0
Lloh0:
	adrp	x8, ___stack_chk_guard@GOTPAGE
Lloh1:
	ldr	x8, [x8, ___stack_chk_guard@GOTPAGEOFF]
Lloh2:
	ldr	x8, [x8]
	str	x8, [sp, #8]
	bl	_phy_get_drvdata
	mov	x19, x0
	ldr	x8, [x0, #8]
	cbz	x8, LBB0_4
; %bb.1:
	ldr	w0, [x20]
Lloh3:
	adrp	x1, l_.str@PAGE
Lloh4:
	add	x1, x1, l_.str@PAGEOFF
	mov	x2, sp
	mov	w3, #2
	bl	_of_property_read_u32_array
	cbz	w0, LBB0_3
; %bb.2:
	mov	x21, x0
Lloh5:
	adrp	x1, l_.str.1@PAGE
Lloh6:
	add	x1, x1, l_.str.1@PAGEOFF
	mov	x0, x20
	bl	_dev_err
	b	LBB0_5
LBB0_3:
	ldr	x20, [x19, #8]
	ldp	w21, w0, [sp]
	bl	_BIT
	mov	x22, x0
	ldr	w0, [sp, #4]
	bl	_BIT
	mov	x3, x0
	mov	x0, x20
	mov	x1, x21
	mov	x2, x22
	bl	_regmap_update_bits
LBB0_4:
	ldr	x8, [x19]
Lloh7:
	adrp	x21, _SATA_PHY0_CTLL@GOTPAGE
Lloh8:
	ldr	x21, [x21, _SATA_PHY0_CTLL@GOTPAGEOFF]
	ldr	x9, [x21]
	add	x0, x9, x8
	bl	_readl_relaxed
Lloh9:
	adrp	x8, _MPLL_MULTIPLIER_MASK@GOTPAGE
Lloh10:
	ldr	x8, [x8, _MPLL_MULTIPLIER_MASK@GOTPAGEOFF]
Lloh11:
	ldr	w8, [x8]
Lloh12:
	adrp	x9, _REF_USE_PAD@GOTPAGE
Lloh13:
	ldr	x9, [x9, _REF_USE_PAD@GOTPAGEOFF]
Lloh14:
	ldr	w9, [x9]
	orr	w8, w9, w8
Lloh15:
	adrp	x9, _MPLL_MULTIPLIER_50M@GOTPAGE
Lloh16:
	ldr	x9, [x9, _MPLL_MULTIPLIER_50M@GOTPAGEOFF]
	bic	w8, w0, w8
Lloh17:
	ldr	w9, [x9]
Lloh18:
	adrp	x10, _MPLL_MULTIPLIER_SHIFT@GOTPAGE
Lloh19:
	ldr	x10, [x10, _MPLL_MULTIPLIER_SHIFT@GOTPAGEOFF]
Lloh20:
	ldr	w10, [x10]
	lsl	w9, w9, w10
Lloh21:
	adrp	x10, _REF_SSP_EN@GOTPAGE
Lloh22:
	ldr	x10, [x10, _REF_SSP_EN@GOTPAGEOFF]
Lloh23:
	ldr	w10, [x10]
Lloh24:
	adrp	x22, _PHY_RESET@GOTPAGE
Lloh25:
	ldr	x22, [x22, _PHY_RESET@GOTPAGEOFF]
	ldr	w11, [x22]
	orr	w8, w10, w8
	orr	w8, w8, w9
	orr	w20, w8, w11
	ldr	x8, [x19]
	ldr	x9, [x21]
	add	x1, x9, x8
	mov	x0, x20
	bl	_writel_relaxed
	mov	w0, #20
	bl	_msleep
	ldr	w8, [x22]
	bic	w0, w20, w8
	ldr	x8, [x19]
	ldr	x9, [x21]
	add	x1, x9, x8
	bl	_writel_relaxed
	ldr	x8, [x19]
Lloh26:
	adrp	x20, _SATA_PORT_PHYCTL1@GOTPAGE
Lloh27:
	ldr	x20, [x20, _SATA_PORT_PHYCTL1@GOTPAGEOFF]
	ldr	x9, [x20]
	add	x0, x9, x8
	bl	_readl_relaxed
Lloh28:
	adrp	x8, _AMPLITUDE_MASK@GOTPAGE
Lloh29:
	ldr	x8, [x8, _AMPLITUDE_MASK@GOTPAGEOFF]
Lloh30:
	ldr	w8, [x8]
	bic	w8, w0, w8
Lloh31:
	adrp	x9, _AMPLITUDE_GEN3@GOTPAGE
Lloh32:
	ldr	x9, [x9, _AMPLITUDE_GEN3@GOTPAGEOFF]
Lloh33:
	ldr	w9, [x9]
Lloh34:
	adrp	x10, _AMPLITUDE_GEN3_SHIFT@GOTPAGE
Lloh35:
	ldr	x10, [x10, _AMPLITUDE_GEN3_SHIFT@GOTPAGEOFF]
Lloh36:
	ldr	w10, [x10]
	lsl	w9, w9, w10
Lloh37:
	adrp	x10, _AMPLITUDE_GEN2@GOTPAGE
Lloh38:
	ldr	x10, [x10, _AMPLITUDE_GEN2@GOTPAGEOFF]
Lloh39:
	ldr	w10, [x10]
Lloh40:
	adrp	x11, _AMPLITUDE_GEN2_SHIFT@GOTPAGE
Lloh41:
	ldr	x11, [x11, _AMPLITUDE_GEN2_SHIFT@GOTPAGEOFF]
Lloh42:
	ldr	w11, [x11]
Lloh43:
	adrp	x12, _AMPLITUDE_GEN1@GOTPAGE
Lloh44:
	ldr	x12, [x12, _AMPLITUDE_GEN1@GOTPAGEOFF]
	lsl	w10, w10, w11
Lloh45:
	ldr	w11, [x12]
Lloh46:
	adrp	x12, _AMPLITUDE_GEN1_SHIFT@GOTPAGE
Lloh47:
	ldr	x12, [x12, _AMPLITUDE_GEN1_SHIFT@GOTPAGEOFF]
Lloh48:
	ldr	w12, [x12]
	lsl	w11, w11, w12
	orr	w8, w9, w8
	orr	w8, w8, w10
	orr	w0, w8, w11
	ldr	x8, [x19]
	ldr	x9, [x20]
	add	x1, x9, x8
	bl	_writel_relaxed
	ldr	x8, [x19]
Lloh49:
	adrp	x20, _SATA_PORT_PHYCTL2@GOTPAGE
Lloh50:
	ldr	x20, [x20, _SATA_PORT_PHYCTL2@GOTPAGEOFF]
	ldr	x9, [x20]
	add	x0, x9, x8
	bl	_readl_relaxed
Lloh51:
	adrp	x8, _PREEMPH_MASK@GOTPAGE
Lloh52:
	ldr	x8, [x8, _PREEMPH_MASK@GOTPAGEOFF]
Lloh53:
	ldr	w8, [x8]
	bic	w8, w0, w8
Lloh54:
	adrp	x9, _PREEMPH_GEN3@GOTPAGE
Lloh55:
	ldr	x9, [x9, _PREEMPH_GEN3@GOTPAGEOFF]
Lloh56:
	ldr	w9, [x9]
Lloh57:
	adrp	x10, _PREEMPH_GEN3_SHIFT@GOTPAGE
Lloh58:
	ldr	x10, [x10, _PREEMPH_GEN3_SHIFT@GOTPAGEOFF]
Lloh59:
	ldr	w10, [x10]
	lsl	w9, w9, w10
Lloh60:
	adrp	x10, _PREEMPH_GEN2@GOTPAGE
Lloh61:
	ldr	x10, [x10, _PREEMPH_GEN2@GOTPAGEOFF]
Lloh62:
	ldr	w10, [x10]
Lloh63:
	adrp	x11, _PREEMPH_GEN2_SHIFT@GOTPAGE
Lloh64:
	ldr	x11, [x11, _PREEMPH_GEN2_SHIFT@GOTPAGEOFF]
Lloh65:
	ldr	w11, [x11]
Lloh66:
	adrp	x12, _PREEMPH_GEN1@GOTPAGE
Lloh67:
	ldr	x12, [x12, _PREEMPH_GEN1@GOTPAGEOFF]
	lsl	w10, w10, w11
Lloh68:
	ldr	w11, [x12]
Lloh69:
	adrp	x12, _PREEMPH_GEN1_SHIFT@GOTPAGE
Lloh70:
	ldr	x12, [x12, _PREEMPH_GEN1_SHIFT@GOTPAGEOFF]
Lloh71:
	ldr	w12, [x12]
	lsl	w11, w11, w12
	orr	w8, w9, w8
	orr	w8, w8, w10
	orr	w0, w8, w11
	ldr	x8, [x19]
	ldr	x9, [x20]
	add	x1, x9, x8
	bl	_writel_relaxed
	ldr	x8, [x19]
Lloh72:
	adrp	x21, _SATA_PORT_PHYCTL@GOTPAGE
Lloh73:
	ldr	x21, [x21, _SATA_PORT_PHYCTL@GOTPAGEOFF]
	ldr	x9, [x21]
	add	x0, x9, x8
	bl	_readl_relaxed
Lloh74:
	adrp	x23, _SPEED_MODE_MASK@GOTPAGE
Lloh75:
	ldr	x23, [x23, _SPEED_MODE_MASK@GOTPAGEOFF]
	ldr	w8, [x23]
Lloh76:
	adrp	x9, _SPEED_MODE_GEN1@GOTPAGE
Lloh77:
	ldr	x9, [x9, _SPEED_MODE_GEN1@GOTPAGEOFF]
	bic	w8, w0, w8
Lloh78:
	ldr	w9, [x9]
Lloh79:
	adrp	x22, _HALF_RATE_SHIFT@GOTPAGE
Lloh80:
	ldr	x22, [x22, _HALF_RATE_SHIFT@GOTPAGEOFF]
	ldr	w10, [x22]
	lsl	w10, w9, w10
Lloh81:
	adrp	x24, _PHY_CONFIG_SHIFT@GOTPAGE
Lloh82:
	ldr	x24, [x24, _PHY_CONFIG_SHIFT@GOTPAGEOFF]
	ldr	w11, [x24]
	lsl	w11, w9, w11
Lloh83:
	adrp	x25, _GEN2_EN_SHIFT@GOTPAGE
Lloh84:
	ldr	x25, [x25, _GEN2_EN_SHIFT@GOTPAGEOFF]
	ldr	w12, [x25]
	lsl	w9, w9, w12
Lloh85:
	adrp	x26, _SPEED_CTRL@GOTPAGE
Lloh86:
	ldr	x26, [x26, _SPEED_CTRL@GOTPAGEOFF]
	ldr	w12, [x26]
	orr	w8, w10, w8
	orr	w8, w8, w11
	orr	w8, w8, w9
	orr	w20, w8, w12
	ldr	x8, [x19]
	ldr	x9, [x21]
	add	x1, x9, x8
	mov	x0, x20
	bl	_writel_relaxed
	mov	w0, #20
	bl	_msleep
	ldr	w8, [x23]
	bic	w8, w20, w8
Lloh87:
	adrp	x9, _SPEED_MODE_GEN3@GOTPAGE
Lloh88:
	ldr	x9, [x9, _SPEED_MODE_GEN3@GOTPAGEOFF]
Lloh89:
	ldr	w9, [x9]
	ldr	w10, [x22]
	lsl	w10, w9, w10
	ldr	w11, [x24]
	lsl	w11, w9, w11
	ldr	w12, [x25]
	lsl	w9, w9, w12
	ldr	w12, [x26]
	orr	w8, w10, w8
	orr	w8, w8, w11
	orr	w8, w8, w9
	orr	w20, w8, w12
	ldr	x8, [x19]
	ldr	x9, [x21]
	add	x1, x9, x8
	mov	x0, x20
	bl	_writel_relaxed
	ldr	w8, [x23]
	ldr	w9, [x26]
	orr	w8, w9, w8
	bic	w8, w20, w8
Lloh90:
	adrp	x9, _SPEED_MODE_GEN2@GOTPAGE
Lloh91:
	ldr	x9, [x9, _SPEED_MODE_GEN2@GOTPAGEOFF]
Lloh92:
	ldr	w9, [x9]
	ldr	w10, [x22]
	lsl	w10, w9, w10
	ldr	w11, [x24]
	lsl	w11, w9, w11
	ldr	w12, [x25]
	lsl	w9, w9, w12
	orr	w8, w10, w8
	orr	w8, w8, w11
	orr	w0, w8, w9
	ldr	x8, [x19]
	ldr	x9, [x21]
	add	x1, x9, x8
	bl	_writel_relaxed
	mov	w21, #0
LBB0_5:
	ldr	x8, [sp, #8]
Lloh93:
	adrp	x9, ___stack_chk_guard@GOTPAGE
Lloh94:
	ldr	x9, [x9, ___stack_chk_guard@GOTPAGEOFF]
Lloh95:
	ldr	x9, [x9]
	cmp	x9, x8
	b.ne	LBB0_7
; %bb.6:
	mov	x0, x21
	ldp	x29, x30, [sp, #80]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #64]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #48]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #32]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #96
	ret
LBB0_7:
	bl	___stack_chk_fail
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpAdd	Lloh3, Lloh4
	.loh AdrpAdd	Lloh5, Lloh6
	.loh AdrpLdrGotLdr	Lloh90, Lloh91, Lloh92
	.loh AdrpLdrGotLdr	Lloh87, Lloh88, Lloh89
	.loh AdrpLdrGot	Lloh85, Lloh86
	.loh AdrpLdrGot	Lloh83, Lloh84
	.loh AdrpLdrGot	Lloh81, Lloh82
	.loh AdrpLdrGot	Lloh79, Lloh80
	.loh AdrpLdrGotLdr	Lloh76, Lloh77, Lloh78
	.loh AdrpLdrGot	Lloh74, Lloh75
	.loh AdrpLdrGot	Lloh72, Lloh73
	.loh AdrpLdrGotLdr	Lloh69, Lloh70, Lloh71
	.loh AdrpLdrGotLdr	Lloh66, Lloh67, Lloh68
	.loh AdrpLdrGotLdr	Lloh63, Lloh64, Lloh65
	.loh AdrpLdrGotLdr	Lloh60, Lloh61, Lloh62
	.loh AdrpLdrGotLdr	Lloh57, Lloh58, Lloh59
	.loh AdrpLdrGotLdr	Lloh54, Lloh55, Lloh56
	.loh AdrpLdrGotLdr	Lloh51, Lloh52, Lloh53
	.loh AdrpLdrGot	Lloh49, Lloh50
	.loh AdrpLdrGotLdr	Lloh46, Lloh47, Lloh48
	.loh AdrpLdrGotLdr	Lloh43, Lloh44, Lloh45
	.loh AdrpLdrGotLdr	Lloh40, Lloh41, Lloh42
	.loh AdrpLdrGotLdr	Lloh37, Lloh38, Lloh39
	.loh AdrpLdrGotLdr	Lloh34, Lloh35, Lloh36
	.loh AdrpLdrGotLdr	Lloh31, Lloh32, Lloh33
	.loh AdrpLdrGotLdr	Lloh28, Lloh29, Lloh30
	.loh AdrpLdrGot	Lloh26, Lloh27
	.loh AdrpLdrGot	Lloh24, Lloh25
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGot	Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh93, Lloh94, Lloh95
	.cfi_endproc
                                        ; -- End function
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"hisilicon,power-reg"

l_.str.1:                               ; @.str.1
	.asciz	"Fail read hisilicon,power-reg\n"

	.comm	_SATA_PHY0_CTLL,8,3             ; @SATA_PHY0_CTLL
	.comm	_MPLL_MULTIPLIER_MASK,4,2       ; @MPLL_MULTIPLIER_MASK
	.comm	_REF_USE_PAD,4,2                ; @REF_USE_PAD
	.comm	_MPLL_MULTIPLIER_50M,4,2        ; @MPLL_MULTIPLIER_50M
	.comm	_MPLL_MULTIPLIER_SHIFT,4,2      ; @MPLL_MULTIPLIER_SHIFT
	.comm	_REF_SSP_EN,4,2                 ; @REF_SSP_EN
	.comm	_PHY_RESET,4,2                  ; @PHY_RESET
	.comm	_SATA_PORT_PHYCTL1,8,3          ; @SATA_PORT_PHYCTL1
	.comm	_AMPLITUDE_MASK,4,2             ; @AMPLITUDE_MASK
	.comm	_AMPLITUDE_GEN3,4,2             ; @AMPLITUDE_GEN3
	.comm	_AMPLITUDE_GEN3_SHIFT,4,2       ; @AMPLITUDE_GEN3_SHIFT
	.comm	_AMPLITUDE_GEN2,4,2             ; @AMPLITUDE_GEN2
	.comm	_AMPLITUDE_GEN2_SHIFT,4,2       ; @AMPLITUDE_GEN2_SHIFT
	.comm	_AMPLITUDE_GEN1,4,2             ; @AMPLITUDE_GEN1
	.comm	_AMPLITUDE_GEN1_SHIFT,4,2       ; @AMPLITUDE_GEN1_SHIFT
	.comm	_SATA_PORT_PHYCTL2,8,3          ; @SATA_PORT_PHYCTL2
	.comm	_PREEMPH_MASK,4,2               ; @PREEMPH_MASK
	.comm	_PREEMPH_GEN3,4,2               ; @PREEMPH_GEN3
	.comm	_PREEMPH_GEN3_SHIFT,4,2         ; @PREEMPH_GEN3_SHIFT
	.comm	_PREEMPH_GEN2,4,2               ; @PREEMPH_GEN2
	.comm	_PREEMPH_GEN2_SHIFT,4,2         ; @PREEMPH_GEN2_SHIFT
	.comm	_PREEMPH_GEN1,4,2               ; @PREEMPH_GEN1
	.comm	_PREEMPH_GEN1_SHIFT,4,2         ; @PREEMPH_GEN1_SHIFT
	.comm	_SATA_PORT_PHYCTL,8,3           ; @SATA_PORT_PHYCTL
	.comm	_SPEED_MODE_MASK,4,2            ; @SPEED_MODE_MASK
	.comm	_SPEED_MODE_GEN1,4,2            ; @SPEED_MODE_GEN1
	.comm	_HALF_RATE_SHIFT,4,2            ; @HALF_RATE_SHIFT
	.comm	_PHY_CONFIG_SHIFT,4,2           ; @PHY_CONFIG_SHIFT
	.comm	_GEN2_EN_SHIFT,4,2              ; @GEN2_EN_SHIFT
	.comm	_SPEED_CTRL,4,2                 ; @SPEED_CTRL
	.comm	_SPEED_MODE_GEN3,4,2            ; @SPEED_MODE_GEN3
	.comm	_SPEED_MODE_GEN2,4,2            ; @SPEED_MODE_GEN2
	.no_dead_strip	_hix5hd2_sata_phy_init
.subsections_via_symbols
