	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function sky2_power_on
_sky2_power_on:                         ## @sky2_power_on
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r14
	pushq	%rbx
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	movq	%rdi, %rbx
	movq	_PC_VAUX_ENA@GOTPCREL(%rip), %rax
	movq	_PC_VCC_ENA@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	orl	(%rax), %edx
	movq	_B0_POWER_CTRL@GOTPCREL(%rip), %rax
	movq	_PC_VAUX_OFF@GOTPCREL(%rip), %rcx
	orl	(%rcx), %edx
	movl	(%rax), %esi
	movq	_PC_VCC_ON@GOTPCREL(%rip), %rax
	orl	(%rax), %edx
	callq	_sky2_write8
	movq	_B2_Y2_CLK_CTRL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_Y2_CLK_DIV_DIS@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	callq	_sky2_write32
	movq	(%rbx), %rax
	movq	_CHIP_ID_YUKON_XL@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jne	LBB0_3
## %bb.1:
	movq	8(%rbx), %rax
	movq	_CHIP_REV_YU_XL_A1@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jle	LBB0_3
## %bb.2:
	movq	_Y2_PCI_CLK_LNK1_DIS@GOTPCREL(%rip), %rax
	movq	_Y2_COR_CLK_LNK1_DIS@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	orl	(%rax), %edx
	movq	_Y2_CLK_GAT_LNK1_DIS@GOTPCREL(%rip), %rax
	orl	(%rax), %edx
	movq	_Y2_PCI_CLK_LNK2_DIS@GOTPCREL(%rip), %rax
	orl	(%rax), %edx
	movq	_B2_Y2_CLK_GATE@GOTPCREL(%rip), %rax
	movq	_Y2_COR_CLK_LNK2_DIS@GOTPCREL(%rip), %rcx
	orl	(%rcx), %edx
	movl	(%rax), %esi
	movq	_Y2_CLK_GAT_LNK2_DIS@GOTPCREL(%rip), %rax
	orl	(%rax), %edx
	movq	%rbx, %rdi
	jmp	LBB0_4
LBB0_3:
	movq	_B2_Y2_CLK_GATE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	xorl	%edx, %edx
LBB0_4:
	callq	_sky2_write8
	movq	_SKY2_HW_ADV_POWER_CTL@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	testl	%eax, 16(%rbx)
	je	LBB0_6
## %bb.5:
	movq	_PCI_DEV_REG3@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	xorl	%edx, %edx
	callq	_sky2_pci_write32
	movq	_PCI_DEV_REG4@GOTPCREL(%rip), %r14
	movl	(%r14), %esi
	movq	%rbx, %rdi
	callq	_sky2_pci_read32
	movq	_P_ASPM_CONTROL_MSK@GOTPCREL(%rip), %rcx
	andl	(%rcx), %eax
	movl	(%r14), %esi
	movq	%rbx, %rdi
	movl	%eax, %edx
	callq	_sky2_pci_write32
	movq	_PCI_DEV_REG5@GOTPCREL(%rip), %r14
	movl	(%r14), %esi
	movq	%rbx, %rdi
	callq	_sky2_pci_read32
	movq	_P_CTL_TIM_VMAIN_AV_MSK@GOTPCREL(%rip), %rcx
	andl	(%rcx), %eax
	movl	(%r14), %esi
	movq	%rbx, %rdi
	movl	%eax, %edx
	callq	_sky2_pci_write32
	movq	_PCI_CFG_REG_1@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	xorl	%edx, %edx
	callq	_sky2_pci_write32
	movq	_B0_CTST@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_Y2_HW_WOL_ON@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	callq	_sky2_write16
	movq	_B2_GP_IO@GOTPCREL(%rip), %r14
	movl	(%r14), %esi
	movq	%rbx, %rdi
	callq	_sky2_read32
	movq	_GLB_GPIO_STAT_RACE_DIS@GOTPCREL(%rip), %rcx
	orl	(%rcx), %eax
	movl	(%r14), %esi
	movq	%rbx, %rdi
	movl	%eax, %edx
	callq	_sky2_write32
	movl	(%r14), %esi
	movq	%rbx, %rdi
	callq	_sky2_read32
LBB0_6:
	movq	_B0_CTST@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_Y2_LED_STAT_ON@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	popq	%rbx
	popq	%r14
	popq	%rbp
	jmp	_sky2_write16                   ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_B0_POWER_CTRL,4,2              ## @B0_POWER_CTRL
	.comm	_PC_VAUX_ENA,4,2                ## @PC_VAUX_ENA
	.comm	_PC_VCC_ENA,4,2                 ## @PC_VCC_ENA
	.comm	_PC_VAUX_OFF,4,2                ## @PC_VAUX_OFF
	.comm	_PC_VCC_ON,4,2                  ## @PC_VCC_ON
	.comm	_B2_Y2_CLK_CTRL,4,2             ## @B2_Y2_CLK_CTRL
	.comm	_Y2_CLK_DIV_DIS,4,2             ## @Y2_CLK_DIV_DIS
	.comm	_CHIP_ID_YUKON_XL,8,3           ## @CHIP_ID_YUKON_XL
	.comm	_CHIP_REV_YU_XL_A1,8,3          ## @CHIP_REV_YU_XL_A1
	.comm	_B2_Y2_CLK_GATE,4,2             ## @B2_Y2_CLK_GATE
	.comm	_Y2_PCI_CLK_LNK1_DIS,4,2        ## @Y2_PCI_CLK_LNK1_DIS
	.comm	_Y2_COR_CLK_LNK1_DIS,4,2        ## @Y2_COR_CLK_LNK1_DIS
	.comm	_Y2_CLK_GAT_LNK1_DIS,4,2        ## @Y2_CLK_GAT_LNK1_DIS
	.comm	_Y2_PCI_CLK_LNK2_DIS,4,2        ## @Y2_PCI_CLK_LNK2_DIS
	.comm	_Y2_COR_CLK_LNK2_DIS,4,2        ## @Y2_COR_CLK_LNK2_DIS
	.comm	_Y2_CLK_GAT_LNK2_DIS,4,2        ## @Y2_CLK_GAT_LNK2_DIS
	.comm	_SKY2_HW_ADV_POWER_CTL,4,2      ## @SKY2_HW_ADV_POWER_CTL
	.comm	_PCI_DEV_REG3,4,2               ## @PCI_DEV_REG3
	.comm	_PCI_DEV_REG4,4,2               ## @PCI_DEV_REG4
	.comm	_P_ASPM_CONTROL_MSK,4,2         ## @P_ASPM_CONTROL_MSK
	.comm	_PCI_DEV_REG5,4,2               ## @PCI_DEV_REG5
	.comm	_P_CTL_TIM_VMAIN_AV_MSK,4,2     ## @P_CTL_TIM_VMAIN_AV_MSK
	.comm	_PCI_CFG_REG_1,4,2              ## @PCI_CFG_REG_1
	.comm	_B0_CTST,4,2                    ## @B0_CTST
	.comm	_Y2_HW_WOL_ON,4,2               ## @Y2_HW_WOL_ON
	.comm	_B2_GP_IO,4,2                   ## @B2_GP_IO
	.comm	_GLB_GPIO_STAT_RACE_DIS,4,2     ## @GLB_GPIO_STAT_RACE_DIS
	.comm	_Y2_LED_STAT_ON,4,2             ## @Y2_LED_STAT_ON
	.no_dead_strip	_sky2_power_on
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function sky2_power_on
_sky2_power_on:                         ; @sky2_power_on
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x0
Lloh0:
	adrp	x8, _B0_POWER_CTRL@GOTPAGE
Lloh1:
	ldr	x8, [x8, _B0_POWER_CTRL@GOTPAGEOFF]
Lloh2:
	ldr	w1, [x8]
Lloh3:
	adrp	x8, _PC_VAUX_ENA@GOTPAGE
Lloh4:
	ldr	x8, [x8, _PC_VAUX_ENA@GOTPAGEOFF]
Lloh5:
	ldr	w8, [x8]
Lloh6:
	adrp	x9, _PC_VCC_ENA@GOTPAGE
Lloh7:
	ldr	x9, [x9, _PC_VCC_ENA@GOTPAGEOFF]
Lloh8:
	ldr	w9, [x9]
	orr	w8, w9, w8
Lloh9:
	adrp	x9, _PC_VAUX_OFF@GOTPAGE
Lloh10:
	ldr	x9, [x9, _PC_VAUX_OFF@GOTPAGEOFF]
Lloh11:
	ldr	w9, [x9]
	orr	w8, w8, w9
Lloh12:
	adrp	x9, _PC_VCC_ON@GOTPAGE
Lloh13:
	ldr	x9, [x9, _PC_VCC_ON@GOTPAGEOFF]
Lloh14:
	ldr	w9, [x9]
	orr	w2, w8, w9
	bl	_sky2_write8
Lloh15:
	adrp	x8, _B2_Y2_CLK_CTRL@GOTPAGE
Lloh16:
	ldr	x8, [x8, _B2_Y2_CLK_CTRL@GOTPAGEOFF]
Lloh17:
	ldr	w1, [x8]
Lloh18:
	adrp	x8, _Y2_CLK_DIV_DIS@GOTPAGE
Lloh19:
	ldr	x8, [x8, _Y2_CLK_DIV_DIS@GOTPAGEOFF]
Lloh20:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_sky2_write32
	ldr	x8, [x19]
Lloh21:
	adrp	x9, _CHIP_ID_YUKON_XL@GOTPAGE
Lloh22:
	ldr	x9, [x9, _CHIP_ID_YUKON_XL@GOTPAGEOFF]
Lloh23:
	ldr	x9, [x9]
	cmp	x8, x9
	b.ne	LBB0_3
; %bb.1:
	ldr	x8, [x19, #8]
Lloh24:
	adrp	x9, _CHIP_REV_YU_XL_A1@GOTPAGE
Lloh25:
	ldr	x9, [x9, _CHIP_REV_YU_XL_A1@GOTPAGEOFF]
Lloh26:
	ldr	x9, [x9]
	cmp	x8, x9
	b.le	LBB0_3
; %bb.2:
Lloh27:
	adrp	x8, _B2_Y2_CLK_GATE@GOTPAGE
Lloh28:
	ldr	x8, [x8, _B2_Y2_CLK_GATE@GOTPAGEOFF]
Lloh29:
	ldr	w1, [x8]
Lloh30:
	adrp	x8, _Y2_PCI_CLK_LNK1_DIS@GOTPAGE
Lloh31:
	ldr	x8, [x8, _Y2_PCI_CLK_LNK1_DIS@GOTPAGEOFF]
Lloh32:
	ldr	w8, [x8]
Lloh33:
	adrp	x9, _Y2_COR_CLK_LNK1_DIS@GOTPAGE
Lloh34:
	ldr	x9, [x9, _Y2_COR_CLK_LNK1_DIS@GOTPAGEOFF]
Lloh35:
	ldr	w9, [x9]
	orr	w8, w9, w8
Lloh36:
	adrp	x9, _Y2_CLK_GAT_LNK1_DIS@GOTPAGE
Lloh37:
	ldr	x9, [x9, _Y2_CLK_GAT_LNK1_DIS@GOTPAGEOFF]
Lloh38:
	ldr	w9, [x9]
	orr	w8, w8, w9
Lloh39:
	adrp	x9, _Y2_PCI_CLK_LNK2_DIS@GOTPAGE
Lloh40:
	ldr	x9, [x9, _Y2_PCI_CLK_LNK2_DIS@GOTPAGEOFF]
Lloh41:
	ldr	w9, [x9]
	orr	w8, w8, w9
Lloh42:
	adrp	x9, _Y2_COR_CLK_LNK2_DIS@GOTPAGE
Lloh43:
	ldr	x9, [x9, _Y2_COR_CLK_LNK2_DIS@GOTPAGEOFF]
Lloh44:
	ldr	w9, [x9]
	orr	w8, w8, w9
Lloh45:
	adrp	x9, _Y2_CLK_GAT_LNK2_DIS@GOTPAGE
Lloh46:
	ldr	x9, [x9, _Y2_CLK_GAT_LNK2_DIS@GOTPAGEOFF]
Lloh47:
	ldr	w9, [x9]
	orr	w2, w8, w9
	mov	x0, x19
	b	LBB0_4
LBB0_3:
Lloh48:
	adrp	x8, _B2_Y2_CLK_GATE@GOTPAGE
Lloh49:
	ldr	x8, [x8, _B2_Y2_CLK_GATE@GOTPAGEOFF]
Lloh50:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #0
LBB0_4:
	bl	_sky2_write8
	ldr	w8, [x19, #16]
Lloh51:
	adrp	x9, _SKY2_HW_ADV_POWER_CTL@GOTPAGE
Lloh52:
	ldr	x9, [x9, _SKY2_HW_ADV_POWER_CTL@GOTPAGEOFF]
Lloh53:
	ldr	w9, [x9]
Lloh54:
	adrp	x20, _B0_CTST@GOTPAGE
Lloh55:
	ldr	x20, [x20, _B0_CTST@GOTPAGEOFF]
	tst	w9, w8
	b.eq	LBB0_6
; %bb.5:
Lloh56:
	adrp	x8, _PCI_DEV_REG3@GOTPAGE
Lloh57:
	ldr	x8, [x8, _PCI_DEV_REG3@GOTPAGEOFF]
Lloh58:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #0
	bl	_sky2_pci_write32
Lloh59:
	adrp	x21, _PCI_DEV_REG4@GOTPAGE
Lloh60:
	ldr	x21, [x21, _PCI_DEV_REG4@GOTPAGEOFF]
	ldr	w1, [x21]
	mov	x0, x19
	bl	_sky2_pci_read32
Lloh61:
	adrp	x8, _P_ASPM_CONTROL_MSK@GOTPAGE
Lloh62:
	ldr	x8, [x8, _P_ASPM_CONTROL_MSK@GOTPAGEOFF]
Lloh63:
	ldr	w8, [x8]
	and	w2, w8, w0
	ldr	w1, [x21]
	mov	x0, x19
	bl	_sky2_pci_write32
Lloh64:
	adrp	x21, _PCI_DEV_REG5@GOTPAGE
Lloh65:
	ldr	x21, [x21, _PCI_DEV_REG5@GOTPAGEOFF]
	ldr	w1, [x21]
	mov	x0, x19
	bl	_sky2_pci_read32
Lloh66:
	adrp	x8, _P_CTL_TIM_VMAIN_AV_MSK@GOTPAGE
Lloh67:
	ldr	x8, [x8, _P_CTL_TIM_VMAIN_AV_MSK@GOTPAGEOFF]
Lloh68:
	ldr	w8, [x8]
	and	w2, w8, w0
	ldr	w1, [x21]
	mov	x0, x19
	bl	_sky2_pci_write32
Lloh69:
	adrp	x8, _PCI_CFG_REG_1@GOTPAGE
Lloh70:
	ldr	x8, [x8, _PCI_CFG_REG_1@GOTPAGEOFF]
Lloh71:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #0
	bl	_sky2_pci_write32
	ldr	w1, [x20]
Lloh72:
	adrp	x8, _Y2_HW_WOL_ON@GOTPAGE
Lloh73:
	ldr	x8, [x8, _Y2_HW_WOL_ON@GOTPAGEOFF]
Lloh74:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_sky2_write16
Lloh75:
	adrp	x21, _B2_GP_IO@GOTPAGE
Lloh76:
	ldr	x21, [x21, _B2_GP_IO@GOTPAGEOFF]
	ldr	w1, [x21]
	mov	x0, x19
	bl	_sky2_read32
Lloh77:
	adrp	x8, _GLB_GPIO_STAT_RACE_DIS@GOTPAGE
Lloh78:
	ldr	x8, [x8, _GLB_GPIO_STAT_RACE_DIS@GOTPAGEOFF]
Lloh79:
	ldr	w8, [x8]
	orr	w2, w8, w0
	ldr	w1, [x21]
	mov	x0, x19
	bl	_sky2_write32
	ldr	w1, [x21]
	mov	x0, x19
	bl	_sky2_read32
LBB0_6:
	ldr	w1, [x20]
Lloh80:
	adrp	x8, _Y2_LED_STAT_ON@GOTPAGE
Lloh81:
	ldr	x8, [x8, _Y2_LED_STAT_ON@GOTPAGEOFF]
Lloh82:
	ldr	w2, [x8]
	mov	x0, x19
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	_sky2_write16
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.loh AdrpLdrGotLdr	Lloh45, Lloh46, Lloh47
	.loh AdrpLdrGotLdr	Lloh42, Lloh43, Lloh44
	.loh AdrpLdrGotLdr	Lloh39, Lloh40, Lloh41
	.loh AdrpLdrGotLdr	Lloh36, Lloh37, Lloh38
	.loh AdrpLdrGotLdr	Lloh33, Lloh34, Lloh35
	.loh AdrpLdrGotLdr	Lloh30, Lloh31, Lloh32
	.loh AdrpLdrGotLdr	Lloh27, Lloh28, Lloh29
	.loh AdrpLdrGotLdr	Lloh48, Lloh49, Lloh50
	.loh AdrpLdrGot	Lloh54, Lloh55
	.loh AdrpLdrGotLdr	Lloh51, Lloh52, Lloh53
	.loh AdrpLdrGotLdr	Lloh77, Lloh78, Lloh79
	.loh AdrpLdrGot	Lloh75, Lloh76
	.loh AdrpLdrGotLdr	Lloh72, Lloh73, Lloh74
	.loh AdrpLdrGotLdr	Lloh69, Lloh70, Lloh71
	.loh AdrpLdrGotLdr	Lloh66, Lloh67, Lloh68
	.loh AdrpLdrGot	Lloh64, Lloh65
	.loh AdrpLdrGotLdr	Lloh61, Lloh62, Lloh63
	.loh AdrpLdrGot	Lloh59, Lloh60
	.loh AdrpLdrGotLdr	Lloh56, Lloh57, Lloh58
	.loh AdrpLdrGotLdr	Lloh80, Lloh81, Lloh82
	.cfi_endproc
                                        ; -- End function
	.comm	_B0_POWER_CTRL,4,2              ; @B0_POWER_CTRL
	.comm	_PC_VAUX_ENA,4,2                ; @PC_VAUX_ENA
	.comm	_PC_VCC_ENA,4,2                 ; @PC_VCC_ENA
	.comm	_PC_VAUX_OFF,4,2                ; @PC_VAUX_OFF
	.comm	_PC_VCC_ON,4,2                  ; @PC_VCC_ON
	.comm	_B2_Y2_CLK_CTRL,4,2             ; @B2_Y2_CLK_CTRL
	.comm	_Y2_CLK_DIV_DIS,4,2             ; @Y2_CLK_DIV_DIS
	.comm	_CHIP_ID_YUKON_XL,8,3           ; @CHIP_ID_YUKON_XL
	.comm	_CHIP_REV_YU_XL_A1,8,3          ; @CHIP_REV_YU_XL_A1
	.comm	_B2_Y2_CLK_GATE,4,2             ; @B2_Y2_CLK_GATE
	.comm	_Y2_PCI_CLK_LNK1_DIS,4,2        ; @Y2_PCI_CLK_LNK1_DIS
	.comm	_Y2_COR_CLK_LNK1_DIS,4,2        ; @Y2_COR_CLK_LNK1_DIS
	.comm	_Y2_CLK_GAT_LNK1_DIS,4,2        ; @Y2_CLK_GAT_LNK1_DIS
	.comm	_Y2_PCI_CLK_LNK2_DIS,4,2        ; @Y2_PCI_CLK_LNK2_DIS
	.comm	_Y2_COR_CLK_LNK2_DIS,4,2        ; @Y2_COR_CLK_LNK2_DIS
	.comm	_Y2_CLK_GAT_LNK2_DIS,4,2        ; @Y2_CLK_GAT_LNK2_DIS
	.comm	_SKY2_HW_ADV_POWER_CTL,4,2      ; @SKY2_HW_ADV_POWER_CTL
	.comm	_PCI_DEV_REG3,4,2               ; @PCI_DEV_REG3
	.comm	_PCI_DEV_REG4,4,2               ; @PCI_DEV_REG4
	.comm	_P_ASPM_CONTROL_MSK,4,2         ; @P_ASPM_CONTROL_MSK
	.comm	_PCI_DEV_REG5,4,2               ; @PCI_DEV_REG5
	.comm	_P_CTL_TIM_VMAIN_AV_MSK,4,2     ; @P_CTL_TIM_VMAIN_AV_MSK
	.comm	_PCI_CFG_REG_1,4,2              ; @PCI_CFG_REG_1
	.comm	_B0_CTST,4,2                    ; @B0_CTST
	.comm	_Y2_HW_WOL_ON,4,2               ; @Y2_HW_WOL_ON
	.comm	_B2_GP_IO,4,2                   ; @B2_GP_IO
	.comm	_GLB_GPIO_STAT_RACE_DIS,4,2     ; @GLB_GPIO_STAT_RACE_DIS
	.comm	_Y2_LED_STAT_ON,4,2             ; @Y2_LED_STAT_ON
	.no_dead_strip	_sky2_power_on
.subsections_via_symbols
