	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function tegra_pcie_program_ectl_settings
_tegra_pcie_program_ectl_settings:      ## @tegra_pcie_program_ectl_settings
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %rbx
	movq	8(%rdi), %rax
	movq	(%rax), %r14
	movq	_RP_ECTL_2_R1@GOTPCREL(%rip), %r15
	movq	(%r15), %rdi
	addq	(%rbx), %rdi
	callq	_readl
	movq	_RP_ECTL_2_R1_RX_CTLE_1C_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edi
	notl	%edi
	andl	%eax, %edi
	orl	(%r14), %edi
	movq	(%r15), %rsi
	addq	(%rbx), %rsi
	callq	_writel
	movq	_RP_ECTL_4_R1@GOTPCREL(%rip), %r15
	movq	(%r15), %rdi
	addq	(%rbx), %rdi
	callq	_readl
	movq	_RP_ECTL_4_R1_RX_CDR_CTRL_1C_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	notl	%edx
	andl	%eax, %edx
	movl	4(%r14), %edi
	movq	_RP_ECTL_4_R1_RX_CDR_CTRL_1C_SHIFT@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	shll	%cl, %edi
	orl	%edx, %edi
	movq	(%r15), %rsi
	addq	(%rbx), %rsi
	callq	_writel
	movq	_RP_ECTL_5_R1@GOTPCREL(%rip), %r15
	movq	(%r15), %rdi
	addq	(%rbx), %rdi
	callq	_readl
	movq	_RP_ECTL_5_R1_RX_EQ_CTRL_L_1C_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edi
	notl	%edi
	andl	%eax, %edi
	orl	8(%r14), %edi
	movq	(%r15), %rsi
	addq	(%rbx), %rsi
	callq	_writel
	movq	_RP_ECTL_6_R1@GOTPCREL(%rip), %r15
	movq	(%r15), %rdi
	addq	(%rbx), %rdi
	callq	_readl
	movq	_RP_ECTL_6_R1_RX_EQ_CTRL_H_1C_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edi
	notl	%edi
	andl	%eax, %edi
	orl	12(%r14), %edi
	movq	(%r15), %rsi
	addq	(%rbx), %rsi
	callq	_writel
	movq	_RP_ECTL_2_R2@GOTPCREL(%rip), %r15
	movq	(%r15), %rdi
	addq	(%rbx), %rdi
	callq	_readl
	movq	_RP_ECTL_2_R2_RX_CTLE_1C_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edi
	notl	%edi
	andl	%eax, %edi
	orl	16(%r14), %edi
	movq	(%r15), %rsi
	addq	(%rbx), %rsi
	callq	_writel
	movq	_RP_ECTL_4_R2@GOTPCREL(%rip), %r15
	movq	(%r15), %rdi
	addq	(%rbx), %rdi
	callq	_readl
	movq	_RP_ECTL_4_R2_RX_CDR_CTRL_1C_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	notl	%edx
	andl	%eax, %edx
	movl	20(%r14), %edi
	movq	_RP_ECTL_4_R2_RX_CDR_CTRL_1C_SHIFT@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	shll	%cl, %edi
	orl	%edx, %edi
	movq	(%r15), %rsi
	addq	(%rbx), %rsi
	callq	_writel
	movq	_RP_ECTL_5_R2@GOTPCREL(%rip), %r15
	movq	(%r15), %rdi
	addq	(%rbx), %rdi
	callq	_readl
	movq	_RP_ECTL_5_R2_RX_EQ_CTRL_L_1C_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edi
	notl	%edi
	andl	%eax, %edi
	orl	24(%r14), %edi
	movq	(%r15), %rsi
	addq	(%rbx), %rsi
	callq	_writel
	movq	_RP_ECTL_6_R2@GOTPCREL(%rip), %r15
	movq	(%r15), %rdi
	addq	(%rbx), %rdi
	callq	_readl
	movq	_RP_ECTL_6_R2_RX_EQ_CTRL_H_1C_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edi
	notl	%edi
	andl	%eax, %edi
	orl	28(%r14), %edi
	movq	(%r15), %rsi
	addq	(%rbx), %rsi
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_writel                         ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_RP_ECTL_2_R1,8,3               ## @RP_ECTL_2_R1
	.comm	_RP_ECTL_2_R1_RX_CTLE_1C_MASK,4,2 ## @RP_ECTL_2_R1_RX_CTLE_1C_MASK
	.comm	_RP_ECTL_4_R1,8,3               ## @RP_ECTL_4_R1
	.comm	_RP_ECTL_4_R1_RX_CDR_CTRL_1C_MASK,4,2 ## @RP_ECTL_4_R1_RX_CDR_CTRL_1C_MASK
	.comm	_RP_ECTL_4_R1_RX_CDR_CTRL_1C_SHIFT,4,2 ## @RP_ECTL_4_R1_RX_CDR_CTRL_1C_SHIFT
	.comm	_RP_ECTL_5_R1,8,3               ## @RP_ECTL_5_R1
	.comm	_RP_ECTL_5_R1_RX_EQ_CTRL_L_1C_MASK,4,2 ## @RP_ECTL_5_R1_RX_EQ_CTRL_L_1C_MASK
	.comm	_RP_ECTL_6_R1,8,3               ## @RP_ECTL_6_R1
	.comm	_RP_ECTL_6_R1_RX_EQ_CTRL_H_1C_MASK,4,2 ## @RP_ECTL_6_R1_RX_EQ_CTRL_H_1C_MASK
	.comm	_RP_ECTL_2_R2,8,3               ## @RP_ECTL_2_R2
	.comm	_RP_ECTL_2_R2_RX_CTLE_1C_MASK,4,2 ## @RP_ECTL_2_R2_RX_CTLE_1C_MASK
	.comm	_RP_ECTL_4_R2,8,3               ## @RP_ECTL_4_R2
	.comm	_RP_ECTL_4_R2_RX_CDR_CTRL_1C_MASK,4,2 ## @RP_ECTL_4_R2_RX_CDR_CTRL_1C_MASK
	.comm	_RP_ECTL_4_R2_RX_CDR_CTRL_1C_SHIFT,4,2 ## @RP_ECTL_4_R2_RX_CDR_CTRL_1C_SHIFT
	.comm	_RP_ECTL_5_R2,8,3               ## @RP_ECTL_5_R2
	.comm	_RP_ECTL_5_R2_RX_EQ_CTRL_L_1C_MASK,4,2 ## @RP_ECTL_5_R2_RX_EQ_CTRL_L_1C_MASK
	.comm	_RP_ECTL_6_R2,8,3               ## @RP_ECTL_6_R2
	.comm	_RP_ECTL_6_R2_RX_EQ_CTRL_H_1C_MASK,4,2 ## @RP_ECTL_6_R2_RX_EQ_CTRL_H_1C_MASK
	.no_dead_strip	_tegra_pcie_program_ectl_settings
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function tegra_pcie_program_ectl_settings
_tegra_pcie_program_ectl_settings:      ; @tegra_pcie_program_ectl_settings
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x0
	ldp	x9, x8, [x0]
	ldr	x20, [x8]
Lloh0:
	adrp	x21, _RP_ECTL_2_R1@GOTPAGE
Lloh1:
	ldr	x21, [x21, _RP_ECTL_2_R1@GOTPAGEOFF]
	ldr	x8, [x21]
	add	x0, x8, x9
	bl	_readl
Lloh2:
	adrp	x8, _RP_ECTL_2_R1_RX_CTLE_1C_MASK@GOTPAGE
Lloh3:
	ldr	x8, [x8, _RP_ECTL_2_R1_RX_CTLE_1C_MASK@GOTPAGEOFF]
Lloh4:
	ldr	w8, [x8]
	bic	w8, w0, w8
	ldr	w9, [x20]
	orr	w0, w8, w9
	ldr	x8, [x19]
	ldr	x9, [x21]
	add	x1, x9, x8
	bl	_writel
	ldr	x8, [x19]
Lloh5:
	adrp	x21, _RP_ECTL_4_R1@GOTPAGE
Lloh6:
	ldr	x21, [x21, _RP_ECTL_4_R1@GOTPAGEOFF]
	ldr	x9, [x21]
	add	x0, x9, x8
	bl	_readl
Lloh7:
	adrp	x8, _RP_ECTL_4_R1_RX_CDR_CTRL_1C_MASK@GOTPAGE
Lloh8:
	ldr	x8, [x8, _RP_ECTL_4_R1_RX_CDR_CTRL_1C_MASK@GOTPAGEOFF]
Lloh9:
	ldr	w8, [x8]
	bic	w8, w0, w8
	ldr	w9, [x20, #4]
Lloh10:
	adrp	x10, _RP_ECTL_4_R1_RX_CDR_CTRL_1C_SHIFT@GOTPAGE
Lloh11:
	ldr	x10, [x10, _RP_ECTL_4_R1_RX_CDR_CTRL_1C_SHIFT@GOTPAGEOFF]
Lloh12:
	ldr	w10, [x10]
	lsl	w9, w9, w10
	orr	w0, w9, w8
	ldr	x8, [x19]
	ldr	x9, [x21]
	add	x1, x9, x8
	bl	_writel
	ldr	x8, [x19]
Lloh13:
	adrp	x21, _RP_ECTL_5_R1@GOTPAGE
Lloh14:
	ldr	x21, [x21, _RP_ECTL_5_R1@GOTPAGEOFF]
	ldr	x9, [x21]
	add	x0, x9, x8
	bl	_readl
Lloh15:
	adrp	x8, _RP_ECTL_5_R1_RX_EQ_CTRL_L_1C_MASK@GOTPAGE
Lloh16:
	ldr	x8, [x8, _RP_ECTL_5_R1_RX_EQ_CTRL_L_1C_MASK@GOTPAGEOFF]
Lloh17:
	ldr	w8, [x8]
	bic	w8, w0, w8
	ldr	w9, [x20, #8]
	orr	w0, w8, w9
	ldr	x8, [x19]
	ldr	x9, [x21]
	add	x1, x9, x8
	bl	_writel
	ldr	x8, [x19]
Lloh18:
	adrp	x21, _RP_ECTL_6_R1@GOTPAGE
Lloh19:
	ldr	x21, [x21, _RP_ECTL_6_R1@GOTPAGEOFF]
	ldr	x9, [x21]
	add	x0, x9, x8
	bl	_readl
Lloh20:
	adrp	x8, _RP_ECTL_6_R1_RX_EQ_CTRL_H_1C_MASK@GOTPAGE
Lloh21:
	ldr	x8, [x8, _RP_ECTL_6_R1_RX_EQ_CTRL_H_1C_MASK@GOTPAGEOFF]
Lloh22:
	ldr	w8, [x8]
	bic	w8, w0, w8
	ldr	w9, [x20, #12]
	orr	w0, w8, w9
	ldr	x8, [x19]
	ldr	x9, [x21]
	add	x1, x9, x8
	bl	_writel
	ldr	x8, [x19]
Lloh23:
	adrp	x21, _RP_ECTL_2_R2@GOTPAGE
Lloh24:
	ldr	x21, [x21, _RP_ECTL_2_R2@GOTPAGEOFF]
	ldr	x9, [x21]
	add	x0, x9, x8
	bl	_readl
Lloh25:
	adrp	x8, _RP_ECTL_2_R2_RX_CTLE_1C_MASK@GOTPAGE
Lloh26:
	ldr	x8, [x8, _RP_ECTL_2_R2_RX_CTLE_1C_MASK@GOTPAGEOFF]
Lloh27:
	ldr	w8, [x8]
	bic	w8, w0, w8
	ldr	w9, [x20, #16]
	orr	w0, w8, w9
	ldr	x8, [x19]
	ldr	x9, [x21]
	add	x1, x9, x8
	bl	_writel
	ldr	x8, [x19]
Lloh28:
	adrp	x21, _RP_ECTL_4_R2@GOTPAGE
Lloh29:
	ldr	x21, [x21, _RP_ECTL_4_R2@GOTPAGEOFF]
	ldr	x9, [x21]
	add	x0, x9, x8
	bl	_readl
Lloh30:
	adrp	x8, _RP_ECTL_4_R2_RX_CDR_CTRL_1C_MASK@GOTPAGE
Lloh31:
	ldr	x8, [x8, _RP_ECTL_4_R2_RX_CDR_CTRL_1C_MASK@GOTPAGEOFF]
Lloh32:
	ldr	w8, [x8]
	bic	w8, w0, w8
	ldr	w9, [x20, #20]
Lloh33:
	adrp	x10, _RP_ECTL_4_R2_RX_CDR_CTRL_1C_SHIFT@GOTPAGE
Lloh34:
	ldr	x10, [x10, _RP_ECTL_4_R2_RX_CDR_CTRL_1C_SHIFT@GOTPAGEOFF]
Lloh35:
	ldr	w10, [x10]
	lsl	w9, w9, w10
	orr	w0, w9, w8
	ldr	x8, [x19]
	ldr	x9, [x21]
	add	x1, x9, x8
	bl	_writel
	ldr	x8, [x19]
Lloh36:
	adrp	x21, _RP_ECTL_5_R2@GOTPAGE
Lloh37:
	ldr	x21, [x21, _RP_ECTL_5_R2@GOTPAGEOFF]
	ldr	x9, [x21]
	add	x0, x9, x8
	bl	_readl
Lloh38:
	adrp	x8, _RP_ECTL_5_R2_RX_EQ_CTRL_L_1C_MASK@GOTPAGE
Lloh39:
	ldr	x8, [x8, _RP_ECTL_5_R2_RX_EQ_CTRL_L_1C_MASK@GOTPAGEOFF]
Lloh40:
	ldr	w8, [x8]
	bic	w8, w0, w8
	ldr	w9, [x20, #24]
	orr	w0, w8, w9
	ldr	x8, [x19]
	ldr	x9, [x21]
	add	x1, x9, x8
	bl	_writel
	ldr	x8, [x19]
Lloh41:
	adrp	x21, _RP_ECTL_6_R2@GOTPAGE
Lloh42:
	ldr	x21, [x21, _RP_ECTL_6_R2@GOTPAGEOFF]
	ldr	x9, [x21]
	add	x0, x9, x8
	bl	_readl
Lloh43:
	adrp	x8, _RP_ECTL_6_R2_RX_EQ_CTRL_H_1C_MASK@GOTPAGE
Lloh44:
	ldr	x8, [x8, _RP_ECTL_6_R2_RX_EQ_CTRL_H_1C_MASK@GOTPAGEOFF]
Lloh45:
	ldr	w8, [x8]
	bic	w8, w0, w8
	ldr	w9, [x20, #28]
	orr	w0, w8, w9
	ldr	x8, [x19]
	ldr	x9, [x21]
	add	x1, x9, x8
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	_writel
	.loh AdrpLdrGotLdr	Lloh43, Lloh44, Lloh45
	.loh AdrpLdrGot	Lloh41, Lloh42
	.loh AdrpLdrGotLdr	Lloh38, Lloh39, Lloh40
	.loh AdrpLdrGot	Lloh36, Lloh37
	.loh AdrpLdrGotLdr	Lloh33, Lloh34, Lloh35
	.loh AdrpLdrGotLdr	Lloh30, Lloh31, Lloh32
	.loh AdrpLdrGot	Lloh28, Lloh29
	.loh AdrpLdrGotLdr	Lloh25, Lloh26, Lloh27
	.loh AdrpLdrGot	Lloh23, Lloh24
	.loh AdrpLdrGotLdr	Lloh20, Lloh21, Lloh22
	.loh AdrpLdrGot	Lloh18, Lloh19
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGot	Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh10, Lloh11, Lloh12
	.loh AdrpLdrGotLdr	Lloh7, Lloh8, Lloh9
	.loh AdrpLdrGot	Lloh5, Lloh6
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGot	Lloh0, Lloh1
	.cfi_endproc
                                        ; -- End function
	.comm	_RP_ECTL_2_R1,8,3               ; @RP_ECTL_2_R1
	.comm	_RP_ECTL_2_R1_RX_CTLE_1C_MASK,4,2 ; @RP_ECTL_2_R1_RX_CTLE_1C_MASK
	.comm	_RP_ECTL_4_R1,8,3               ; @RP_ECTL_4_R1
	.comm	_RP_ECTL_4_R1_RX_CDR_CTRL_1C_MASK,4,2 ; @RP_ECTL_4_R1_RX_CDR_CTRL_1C_MASK
	.comm	_RP_ECTL_4_R1_RX_CDR_CTRL_1C_SHIFT,4,2 ; @RP_ECTL_4_R1_RX_CDR_CTRL_1C_SHIFT
	.comm	_RP_ECTL_5_R1,8,3               ; @RP_ECTL_5_R1
	.comm	_RP_ECTL_5_R1_RX_EQ_CTRL_L_1C_MASK,4,2 ; @RP_ECTL_5_R1_RX_EQ_CTRL_L_1C_MASK
	.comm	_RP_ECTL_6_R1,8,3               ; @RP_ECTL_6_R1
	.comm	_RP_ECTL_6_R1_RX_EQ_CTRL_H_1C_MASK,4,2 ; @RP_ECTL_6_R1_RX_EQ_CTRL_H_1C_MASK
	.comm	_RP_ECTL_2_R2,8,3               ; @RP_ECTL_2_R2
	.comm	_RP_ECTL_2_R2_RX_CTLE_1C_MASK,4,2 ; @RP_ECTL_2_R2_RX_CTLE_1C_MASK
	.comm	_RP_ECTL_4_R2,8,3               ; @RP_ECTL_4_R2
	.comm	_RP_ECTL_4_R2_RX_CDR_CTRL_1C_MASK,4,2 ; @RP_ECTL_4_R2_RX_CDR_CTRL_1C_MASK
	.comm	_RP_ECTL_4_R2_RX_CDR_CTRL_1C_SHIFT,4,2 ; @RP_ECTL_4_R2_RX_CDR_CTRL_1C_SHIFT
	.comm	_RP_ECTL_5_R2,8,3               ; @RP_ECTL_5_R2
	.comm	_RP_ECTL_5_R2_RX_EQ_CTRL_L_1C_MASK,4,2 ; @RP_ECTL_5_R2_RX_EQ_CTRL_L_1C_MASK
	.comm	_RP_ECTL_6_R2,8,3               ; @RP_ECTL_6_R2
	.comm	_RP_ECTL_6_R2_RX_EQ_CTRL_H_1C_MASK,4,2 ; @RP_ECTL_6_R2_RX_EQ_CTRL_H_1C_MASK
	.no_dead_strip	_tegra_pcie_program_ectl_settings
.subsections_via_symbols
