	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_iwl_trans_pcie_sync_nmi        ## -- Begin function iwl_trans_pcie_sync_nmi
	.p2align	4, 0x90
_iwl_trans_pcie_sync_nmi:               ## @iwl_trans_pcie_sync_nmi
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r14
	callq	_IWL_TRANS_GET_PCIE_TRANS
	movq	%rax, %r15
	movq	_jiffies@GOTPCREL(%rip), %r13
	movq	_IWL_TRANS_NMI_TIMEOUT@GOTPCREL(%rip), %rax
	movq	(%rax), %rbx
	addq	(%r13), %rbx
	movq	_STATUS_INT_ENABLED@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	%r14, %rsi
	callq	_test_bit
	cmpq	$0, (%r15)
	movq	_CSR_MSIX_HW_INT_CAUSES_AD@GOTPCREL(%rip), %rcx
	cmoveq	_CSR_INT@GOTPCREL(%rip), %rcx
	movq	_MSIX_HW_INT_CAUSES_REG_SW_ERR@GOTPCREL(%rip), %rdx
	cmoveq	_CSR_INT_BIT_SW_ERR@GOTPCREL(%rip), %rdx
	movl	(%rcx), %r12d
	movl	(%rdx), %r15d
	movl	%eax, -44(%rbp)                 ## 4-byte Spill
	testl	%eax, %eax
	je	LBB0_2
## %bb.1:
	movq	%r14, %rdi
	callq	_iwl_disable_interrupts
LBB0_2:
	movq	%r14, %rdi
	callq	_iwl_force_nmi
	.p2align	4, 0x90
LBB0_3:                                 ## =>This Inner Loop Header: Depth=1
	movq	(%r13), %rsi
	movq	%rbx, %rdi
	callq	_time_after
	testq	%rax, %rax
	je	LBB0_6
## %bb.4:                               ##   in Loop: Header=BB0_3 Depth=1
	movq	%r14, %rdi
	movl	%r12d, %esi
	callq	_iwl_read32
	andl	%r15d, %eax
	jne	LBB0_5
## %bb.9:                               ##   in Loop: Header=BB0_3 Depth=1
	movl	$1, %edi
	callq	_mdelay
	jmp	LBB0_3
LBB0_5:
	movq	%r14, %rdi
	movl	%r12d, %esi
	movl	%eax, %edx
	callq	_iwl_write32
LBB0_6:
	cmpl	$0, -44(%rbp)                   ## 4-byte Folded Reload
	je	LBB0_8
## %bb.7:
	movq	%r14, %rdi
	callq	_iwl_enable_interrupts
LBB0_8:
	movq	%r14, %rdi
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_iwl_trans_fw_error             ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_jiffies,8,3                    ## @jiffies
	.comm	_IWL_TRANS_NMI_TIMEOUT,8,3      ## @IWL_TRANS_NMI_TIMEOUT
	.comm	_STATUS_INT_ENABLED,4,2         ## @STATUS_INT_ENABLED
	.comm	_CSR_MSIX_HW_INT_CAUSES_AD,4,2  ## @CSR_MSIX_HW_INT_CAUSES_AD
	.comm	_MSIX_HW_INT_CAUSES_REG_SW_ERR,4,2 ## @MSIX_HW_INT_CAUSES_REG_SW_ERR
	.comm	_CSR_INT,4,2                    ## @CSR_INT
	.comm	_CSR_INT_BIT_SW_ERR,4,2         ## @CSR_INT_BIT_SW_ERR
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_iwl_trans_pcie_sync_nmi        ; -- Begin function iwl_trans_pcie_sync_nmi
	.p2align	2
_iwl_trans_pcie_sync_nmi:               ; @iwl_trans_pcie_sync_nmi
	.cfi_startproc
; %bb.0:
	stp	x24, x23, [sp, #-64]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x19, x0
	bl	_IWL_TRANS_GET_PCIE_TRANS
	mov	x22, x0
Lloh0:
	adrp	x23, _jiffies@GOTPAGE
Lloh1:
	ldr	x23, [x23, _jiffies@GOTPAGEOFF]
Lloh2:
	adrp	x8, _IWL_TRANS_NMI_TIMEOUT@GOTPAGE
Lloh3:
	ldr	x8, [x8, _IWL_TRANS_NMI_TIMEOUT@GOTPAGEOFF]
	ldr	x9, [x23]
Lloh4:
	ldr	x8, [x8]
	add	x21, x8, x9
Lloh5:
	adrp	x8, _STATUS_INT_ENABLED@GOTPAGE
Lloh6:
	ldr	x8, [x8, _STATUS_INT_ENABLED@GOTPAGEOFF]
Lloh7:
	ldr	w0, [x8]
	mov	x1, x19
	bl	_test_bit
	mov	x20, x0
Lloh8:
	adrp	x8, _CSR_INT@GOTPAGE
Lloh9:
	ldr	x8, [x8, _CSR_INT@GOTPAGEOFF]
	ldr	x9, [x22]
Lloh10:
	adrp	x10, _CSR_MSIX_HW_INT_CAUSES_AD@GOTPAGE
Lloh11:
	ldr	x10, [x10, _CSR_MSIX_HW_INT_CAUSES_AD@GOTPAGEOFF]
	cmp	x9, #0
	csel	x8, x8, x10, eq
	ldr	w22, [x8]
Lloh12:
	adrp	x8, _CSR_INT_BIT_SW_ERR@GOTPAGE
Lloh13:
	ldr	x8, [x8, _CSR_INT_BIT_SW_ERR@GOTPAGEOFF]
Lloh14:
	adrp	x9, _MSIX_HW_INT_CAUSES_REG_SW_ERR@GOTPAGE
Lloh15:
	ldr	x9, [x9, _MSIX_HW_INT_CAUSES_REG_SW_ERR@GOTPAGEOFF]
	csel	x8, x8, x9, eq
	ldr	w24, [x8]
	cbz	w0, LBB0_2
; %bb.1:
	mov	x0, x19
	bl	_iwl_disable_interrupts
LBB0_2:
	mov	x0, x19
	bl	_iwl_force_nmi
LBB0_3:                                 ; =>This Inner Loop Header: Depth=1
	ldr	x1, [x23]
	mov	x0, x21
	bl	_time_after
	cbz	x0, LBB0_7
; %bb.4:                                ;   in Loop: Header=BB0_3 Depth=1
	mov	x0, x19
	mov	x1, x22
	bl	_iwl_read32
	ands	w2, w0, w24
	b.ne	LBB0_6
; %bb.5:                                ;   in Loop: Header=BB0_3 Depth=1
	mov	w0, #1
	bl	_mdelay
	b	LBB0_3
LBB0_6:
	mov	x0, x19
	mov	x1, x22
	bl	_iwl_write32
LBB0_7:
	cbz	w20, LBB0_9
; %bb.8:
	mov	x0, x19
	bl	_iwl_enable_interrupts
LBB0_9:
	mov	x0, x19
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	b	_iwl_trans_fw_error
	.loh AdrpLdrGot	Lloh14, Lloh15
	.loh AdrpLdrGot	Lloh12, Lloh13
	.loh AdrpLdrGot	Lloh10, Lloh11
	.loh AdrpLdrGot	Lloh8, Lloh9
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGot	Lloh0, Lloh1
	.cfi_endproc
                                        ; -- End function
	.comm	_jiffies,8,3                    ; @jiffies
	.comm	_IWL_TRANS_NMI_TIMEOUT,8,3      ; @IWL_TRANS_NMI_TIMEOUT
	.comm	_STATUS_INT_ENABLED,4,2         ; @STATUS_INT_ENABLED
	.comm	_CSR_MSIX_HW_INT_CAUSES_AD,4,2  ; @CSR_MSIX_HW_INT_CAUSES_AD
	.comm	_MSIX_HW_INT_CAUSES_REG_SW_ERR,4,2 ; @MSIX_HW_INT_CAUSES_REG_SW_ERR
	.comm	_CSR_INT,4,2                    ; @CSR_INT
	.comm	_CSR_INT_BIT_SW_ERR,4,2         ; @CSR_INT_BIT_SW_ERR
.subsections_via_symbols
