	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function __stm32_gpio_set
___stm32_gpio_set:                      ## @__stm32_gpio_set
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%edx, %r12d
	movl	%esi, %r14d
	movq	%rdi, %r15
	callq	_stm32_gpio_backup_value
	xorl	%ebx, %ebx
	testl	%r12d, %r12d
	jne	LBB0_2
## %bb.1:
	movq	_STM32_GPIO_PINS_PER_BANK@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
LBB0_2:
	addl	%r14d, %ebx
	movl	(%r15), %edi
	callq	_clk_enable
	movl	%ebx, %edi
	callq	_BIT
	movq	_STM32_GPIO_BSRR@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rsi
	addq	8(%r15), %rsi
	movl	%eax, %edi
	callq	_writel_relaxed
	movl	(%r15), %edi
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_clk_disable                    ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_STM32_GPIO_PINS_PER_BANK,8,3   ## @STM32_GPIO_PINS_PER_BANK
	.comm	_STM32_GPIO_BSRR,8,3            ## @STM32_GPIO_BSRR
	.no_dead_strip	___stm32_gpio_set
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function __stm32_gpio_set
___stm32_gpio_set:                      ; @__stm32_gpio_set
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x2
	mov	x20, x1
	mov	x21, x0
	bl	_stm32_gpio_backup_value
Lloh0:
	adrp	x8, _STM32_GPIO_PINS_PER_BANK@GOTPAGE
Lloh1:
	ldr	x8, [x8, _STM32_GPIO_PINS_PER_BANK@GOTPAGEOFF]
Lloh2:
	ldr	w8, [x8]
	cmp	w19, #0
	csel	w8, w8, wzr, eq
	add	w19, w8, w20
	ldr	w0, [x21]
	bl	_clk_enable
	mov	x0, x19
	bl	_BIT
	ldr	x8, [x21, #8]
Lloh3:
	adrp	x9, _STM32_GPIO_BSRR@GOTPAGE
Lloh4:
	ldr	x9, [x9, _STM32_GPIO_BSRR@GOTPAGEOFF]
Lloh5:
	ldr	x9, [x9]
	add	x1, x9, x8
	bl	_writel_relaxed
	ldr	w0, [x21]
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	_clk_disable
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_STM32_GPIO_PINS_PER_BANK,8,3   ; @STM32_GPIO_PINS_PER_BANK
	.comm	_STM32_GPIO_BSRR,8,3            ; @STM32_GPIO_BSRR
	.no_dead_strip	___stm32_gpio_set
.subsections_via_symbols
