	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function i40e_intr
_i40e_intr:                             ## @i40e_intr
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rsi, %r12
	leaq	44(%rsi), %r14
	movq	_IRQ_NONE@GOTPCREL(%rip), %rax
	movl	(%rax), %r13d
	movq	_I40E_PFINT_ICR0@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	callq	_rd32
	movl	%eax, %ebx
	movq	_I40E_PFINT_ICR0_ENA@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	callq	_rd32
	movl	%eax, %edx
	movq	_I40E_PFINT_ICR0_INTEVENT_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	testl	%ebx, %eax
	je	LBB0_37
## %bb.1:
	notl	%eax
	testl	%eax, %ebx
	je	LBB0_3
## %bb.2:
	movq	_I40E_PFINT_ICR0_SWINT_MASK@GOTPCREL(%rip), %rax
	testl	%ebx, (%rax)
	je	LBB0_4
LBB0_3:
	incl	56(%r12)
LBB0_4:
	movq	_I40E_FLAG_IWARP_ENABLED@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	testl	%eax, (%r12)
	movl	%edx, %r13d
	je	LBB0_7
## %bb.5:
	movq	_I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	testl	%ebx, %eax
	je	LBB0_7
## %bb.6:
	notl	%eax
	andl	%eax, %r13d
	movq	24(%r12), %rdi
	leaq	L_.str(%rip), %rsi
	callq	_dev_dbg
	movq	___I40E_CORE_RESET_REQUESTED@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	16(%r12), %esi
	callq	_set_bit
LBB0_7:
	movq	_I40E_PFINT_ICR0_QUEUE_0_MASK@GOTPCREL(%rip), %rax
	testl	%ebx, (%rax)
	je	LBB0_10
## %bb.8:
	movq	48(%r12), %rax
	movq	8(%r12), %rcx
	movq	(%rax,%rcx,8), %rax
	movq	(%rax), %rax
	movq	(%rax), %r15
	movq	___I40E_DOWN@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	16(%r12), %esi
	callq	_test_bit
	testq	%rax, %rax
	jne	LBB0_10
## %bb.9:
	movq	%r15, %rdi
	callq	_napi_schedule_irqoff
LBB0_10:
	movq	_I40E_PFINT_ICR0_ADMINQ_MASK@GOTPCREL(%rip), %rax
	testl	%ebx, (%rax)
	je	LBB0_12
## %bb.11:
	movq	_I40E_PFINT_ICR0_ENA_ADMINQ_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	notl	%eax
	andl	%eax, %r13d
	movq	___I40E_ADMINQ_EVENT_PENDING@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	16(%r12), %esi
	callq	_set_bit
	movq	_I40E_DEBUG_NVM@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	leaq	L_.str.1(%rip), %rdx
	movq	%r14, %rdi
	callq	_i40e_debug
LBB0_12:
	movq	_I40E_PFINT_ICR0_MAL_DETECT_MASK@GOTPCREL(%rip), %rax
	testl	%ebx, (%rax)
	je	LBB0_14
## %bb.13:
	movq	_I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	notl	%eax
	andl	%eax, %r13d
	movq	___I40E_MDD_EVENT_PENDING@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	16(%r12), %esi
	callq	_set_bit
LBB0_14:
	movq	_I40E_PFINT_ICR0_VFLR_MASK@GOTPCREL(%rip), %rax
	testl	%ebx, (%rax)
	je	LBB0_16
## %bb.15:
	movq	_I40E_PFINT_ICR0_ENA_VFLR_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	notl	%eax
	andl	%eax, %r13d
	movq	___I40E_VFLR_EVENT_PENDING@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	16(%r12), %esi
	callq	_set_bit
LBB0_16:
	movq	_I40E_PFINT_ICR0_GRST_MASK@GOTPCREL(%rip), %rax
	testl	%ebx, (%rax)
	je	LBB0_25
## %bb.17:
	movq	___I40E_RESET_RECOVERY_PENDING@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	16(%r12), %esi
	callq	_test_bit
	testq	%rax, %rax
	jne	LBB0_19
## %bb.18:
	movq	___I40E_RESET_INTR_RECEIVED@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	16(%r12), %esi
	callq	_set_bit
LBB0_19:
	movq	_I40E_PFINT_ICR0_ENA_GRST_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	notl	%eax
	andl	%eax, %r13d
	movq	_I40E_GLGEN_RSTAT@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	callq	_rd32
	movq	_I40E_GLGEN_RSTAT_RESET_TYPE_MASK@GOTPCREL(%rip), %rcx
	andl	(%rcx), %eax
	movq	_I40E_GLGEN_RSTAT_RESET_TYPE_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	sarl	%cl, %eax
	movq	_I40E_RESET_CORER@GOTPCREL(%rip), %rcx
	cmpl	(%rcx), %eax
	jne	LBB0_21
## %bb.20:
	incl	40(%r12)
	jmp	LBB0_25
LBB0_21:
	movq	_I40E_RESET_GLOBR@GOTPCREL(%rip), %rcx
	cmpl	(%rcx), %eax
	jne	LBB0_23
## %bb.22:
	incl	36(%r12)
	jmp	LBB0_25
LBB0_23:
	movq	_I40E_RESET_EMPR@GOTPCREL(%rip), %rcx
	cmpl	(%rcx), %eax
	jne	LBB0_25
## %bb.24:
	incl	32(%r12)
	movq	___I40E_EMP_RESET_INTR_RECEIVED@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	16(%r12), %esi
	callq	_set_bit
LBB0_25:
	movq	_I40E_PFINT_ICR0_HMC_ERR_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	testl	%ebx, %eax
	je	LBB0_27
## %bb.26:
	notl	%eax
	andl	%eax, %ebx
	movq	24(%r12), %rdi
	leaq	L_.str.2(%rip), %rsi
	xorl	%eax, %eax
	callq	_dev_info
	movl	%r13d, -44(%rbp)                ## 4-byte Spill
	movq	24(%r12), %r13
	movq	_I40E_PFHMC_ERRORINFO@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	callq	_rd32
	movl	%eax, %r15d
	movq	_I40E_PFHMC_ERRORDATA@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	callq	_rd32
	leaq	L_.str.3(%rip), %rsi
	movq	%r13, %rdi
	movl	-44(%rbp), %r13d                ## 4-byte Reload
	movl	%r15d, %edx
	movl	%eax, %ecx
	xorl	%eax, %eax
	callq	_dev_info
LBB0_27:
	movq	_I40E_PFINT_ICR0_TIMESYNC_MASK@GOTPCREL(%rip), %rax
	testl	%ebx, (%rax)
	je	LBB0_30
## %bb.28:
	movq	_I40E_PRTTSYN_STAT_0@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	callq	_rd32
	movq	_I40E_PRTTSYN_STAT_0_TXTIME_MASK@GOTPCREL(%rip), %rcx
	testl	%eax, (%rcx)
	je	LBB0_30
## %bb.29:
	movq	_I40E_PFINT_ICR0_ENA_TIMESYNC_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	notl	%eax
	andl	%eax, %ebx
	movq	%r12, %rdi
	callq	_i40e_ptp_tx_hwtstamp
LBB0_30:
	andl	%r13d, %ebx
	je	LBB0_36
## %bb.31:
	movq	24(%r12), %rdi
	leaq	L_.str.4(%rip), %rsi
	movl	%ebx, %edx
	xorl	%eax, %eax
	callq	_dev_info
	movq	_I40E_PFINT_ICR0_PE_CRITERR_MASK@GOTPCREL(%rip), %rax
	testl	%ebx, (%rax)
	jne	LBB0_34
## %bb.32:
	movq	_I40E_PFINT_ICR0_PCI_EXCEPTION_MASK@GOTPCREL(%rip), %rax
	testl	%ebx, (%rax)
	jne	LBB0_34
## %bb.33:
	movq	_I40E_PFINT_ICR0_ECC_ERR_MASK@GOTPCREL(%rip), %rax
	testl	%ebx, (%rax)
	je	LBB0_35
LBB0_34:
	movq	24(%r12), %rdi
	leaq	L_.str.5(%rip), %rsi
	xorl	%eax, %eax
	callq	_dev_info
	movq	___I40E_PF_RESET_REQUESTED@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	16(%r12), %esi
	callq	_set_bit
	movq	%r12, %rdi
	callq	_i40e_service_event_schedule
LBB0_35:
	xorl	%ebx, %r13d
LBB0_36:
	movl	%r13d, %edx
	movq	_IRQ_HANDLED@GOTPCREL(%rip), %rax
	movl	(%rax), %r13d
LBB0_37:
	movq	_I40E_PFINT_ICR0_ENA@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	callq	_wr32
	movq	___I40E_DOWN@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	16(%r12), %esi
	callq	_test_bit
	testq	%rax, %rax
	je	LBB0_39
## %bb.38:
	movq	___I40E_RECOVERY_MODE@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	16(%r12), %esi
	callq	_test_bit
	testq	%rax, %rax
	je	LBB0_40
LBB0_39:
	movq	%r12, %rdi
	callq	_i40e_service_event_schedule
	movq	%r12, %rdi
	callq	_i40e_irq_dynamic_enable_icr0
LBB0_40:
	movl	%r13d, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_IRQ_NONE,4,2                   ## @IRQ_NONE
	.comm	_I40E_PFINT_ICR0,4,2            ## @I40E_PFINT_ICR0
	.comm	_I40E_PFINT_ICR0_ENA,4,2        ## @I40E_PFINT_ICR0_ENA
	.comm	_I40E_PFINT_ICR0_INTEVENT_MASK,4,2 ## @I40E_PFINT_ICR0_INTEVENT_MASK
	.comm	_I40E_PFINT_ICR0_SWINT_MASK,4,2 ## @I40E_PFINT_ICR0_SWINT_MASK
	.comm	_I40E_FLAG_IWARP_ENABLED,4,2    ## @I40E_FLAG_IWARP_ENABLED
	.comm	_I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK,4,2 ## @I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"cleared PE_CRITERR\n"

	.comm	___I40E_CORE_RESET_REQUESTED,4,2 ## @__I40E_CORE_RESET_REQUESTED
	.comm	_I40E_PFINT_ICR0_QUEUE_0_MASK,4,2 ## @I40E_PFINT_ICR0_QUEUE_0_MASK
	.comm	___I40E_DOWN,4,2                ## @__I40E_DOWN
	.comm	_I40E_PFINT_ICR0_ADMINQ_MASK,4,2 ## @I40E_PFINT_ICR0_ADMINQ_MASK
	.comm	_I40E_PFINT_ICR0_ENA_ADMINQ_MASK,4,2 ## @I40E_PFINT_ICR0_ENA_ADMINQ_MASK
	.comm	___I40E_ADMINQ_EVENT_PENDING,4,2 ## @__I40E_ADMINQ_EVENT_PENDING
	.comm	_I40E_DEBUG_NVM,4,2             ## @I40E_DEBUG_NVM
L_.str.1:                               ## @.str.1
	.asciz	"AdminQ event\n"

	.comm	_I40E_PFINT_ICR0_MAL_DETECT_MASK,4,2 ## @I40E_PFINT_ICR0_MAL_DETECT_MASK
	.comm	_I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK,4,2 ## @I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK
	.comm	___I40E_MDD_EVENT_PENDING,4,2   ## @__I40E_MDD_EVENT_PENDING
	.comm	_I40E_PFINT_ICR0_VFLR_MASK,4,2  ## @I40E_PFINT_ICR0_VFLR_MASK
	.comm	_I40E_PFINT_ICR0_ENA_VFLR_MASK,4,2 ## @I40E_PFINT_ICR0_ENA_VFLR_MASK
	.comm	___I40E_VFLR_EVENT_PENDING,4,2  ## @__I40E_VFLR_EVENT_PENDING
	.comm	_I40E_PFINT_ICR0_GRST_MASK,4,2  ## @I40E_PFINT_ICR0_GRST_MASK
	.comm	___I40E_RESET_RECOVERY_PENDING,4,2 ## @__I40E_RESET_RECOVERY_PENDING
	.comm	___I40E_RESET_INTR_RECEIVED,4,2 ## @__I40E_RESET_INTR_RECEIVED
	.comm	_I40E_PFINT_ICR0_ENA_GRST_MASK,4,2 ## @I40E_PFINT_ICR0_ENA_GRST_MASK
	.comm	_I40E_GLGEN_RSTAT,4,2           ## @I40E_GLGEN_RSTAT
	.comm	_I40E_GLGEN_RSTAT_RESET_TYPE_MASK,4,2 ## @I40E_GLGEN_RSTAT_RESET_TYPE_MASK
	.comm	_I40E_GLGEN_RSTAT_RESET_TYPE_SHIFT,4,2 ## @I40E_GLGEN_RSTAT_RESET_TYPE_SHIFT
	.comm	_I40E_RESET_CORER,4,2           ## @I40E_RESET_CORER
	.comm	_I40E_RESET_GLOBR,4,2           ## @I40E_RESET_GLOBR
	.comm	_I40E_RESET_EMPR,4,2            ## @I40E_RESET_EMPR
	.comm	___I40E_EMP_RESET_INTR_RECEIVED,4,2 ## @__I40E_EMP_RESET_INTR_RECEIVED
	.comm	_I40E_PFINT_ICR0_HMC_ERR_MASK,4,2 ## @I40E_PFINT_ICR0_HMC_ERR_MASK
L_.str.2:                               ## @.str.2
	.asciz	"HMC error interrupt\n"

L_.str.3:                               ## @.str.3
	.asciz	"HMC error info 0x%x, HMC error data 0x%x\n"

	.comm	_I40E_PFHMC_ERRORINFO,4,2       ## @I40E_PFHMC_ERRORINFO
	.comm	_I40E_PFHMC_ERRORDATA,4,2       ## @I40E_PFHMC_ERRORDATA
	.comm	_I40E_PFINT_ICR0_TIMESYNC_MASK,4,2 ## @I40E_PFINT_ICR0_TIMESYNC_MASK
	.comm	_I40E_PRTTSYN_STAT_0,4,2        ## @I40E_PRTTSYN_STAT_0
	.comm	_I40E_PRTTSYN_STAT_0_TXTIME_MASK,4,2 ## @I40E_PRTTSYN_STAT_0_TXTIME_MASK
	.comm	_I40E_PFINT_ICR0_ENA_TIMESYNC_MASK,4,2 ## @I40E_PFINT_ICR0_ENA_TIMESYNC_MASK
L_.str.4:                               ## @.str.4
	.asciz	"unhandled interrupt icr0=0x%08x\n"

	.comm	_I40E_PFINT_ICR0_PE_CRITERR_MASK,4,2 ## @I40E_PFINT_ICR0_PE_CRITERR_MASK
	.comm	_I40E_PFINT_ICR0_PCI_EXCEPTION_MASK,4,2 ## @I40E_PFINT_ICR0_PCI_EXCEPTION_MASK
	.comm	_I40E_PFINT_ICR0_ECC_ERR_MASK,4,2 ## @I40E_PFINT_ICR0_ECC_ERR_MASK
L_.str.5:                               ## @.str.5
	.asciz	"device will be reset\n"

	.comm	___I40E_PF_RESET_REQUESTED,4,2  ## @__I40E_PF_RESET_REQUESTED
	.comm	_IRQ_HANDLED,4,2                ## @IRQ_HANDLED
	.comm	___I40E_RECOVERY_MODE,4,2       ## @__I40E_RECOVERY_MODE
	.no_dead_strip	_i40e_intr
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function i40e_intr
_i40e_intr:                             ; @i40e_intr
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #96
	.cfi_def_cfa_offset 96
	stp	x26, x25, [sp, #16]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #32]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #48]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #64]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #80]             ; 16-byte Folded Spill
	add	x29, sp, #80
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	mov	x19, x1
	add	x20, x1, #44
Lloh0:
	adrp	x8, _IRQ_NONE@GOTPAGE
Lloh1:
	ldr	x8, [x8, _IRQ_NONE@GOTPAGEOFF]
Lloh2:
	ldr	w23, [x8]
Lloh3:
	adrp	x8, _I40E_PFINT_ICR0@GOTPAGE
Lloh4:
	ldr	x8, [x8, _I40E_PFINT_ICR0@GOTPAGEOFF]
Lloh5:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_rd32
	mov	x22, x0
Lloh6:
	adrp	x25, _I40E_PFINT_ICR0_ENA@GOTPAGE
Lloh7:
	ldr	x25, [x25, _I40E_PFINT_ICR0_ENA@GOTPAGEOFF]
	ldr	w1, [x25]
	mov	x0, x20
	bl	_rd32
	mov	x21, x0
Lloh8:
	adrp	x8, _I40E_PFINT_ICR0_INTEVENT_MASK@GOTPAGE
Lloh9:
	ldr	x8, [x8, _I40E_PFINT_ICR0_INTEVENT_MASK@GOTPAGEOFF]
Lloh10:
	ldr	w8, [x8]
Lloh11:
	adrp	x26, ___I40E_DOWN@GOTPAGE
Lloh12:
	ldr	x26, [x26, ___I40E_DOWN@GOTPAGEOFF]
	tst	w8, w22
	b.eq	LBB0_37
; %bb.1:
	bics	wzr, w22, w8
	b.eq	LBB0_3
; %bb.2:
Lloh13:
	adrp	x8, _I40E_PFINT_ICR0_SWINT_MASK@GOTPAGE
Lloh14:
	ldr	x8, [x8, _I40E_PFINT_ICR0_SWINT_MASK@GOTPAGEOFF]
Lloh15:
	ldr	w8, [x8]
	tst	w8, w22
	b.eq	LBB0_4
LBB0_3:
	ldr	w8, [x19, #56]
	add	w8, w8, #1
	str	w8, [x19, #56]
LBB0_4:
	ldr	w8, [x19]
Lloh16:
	adrp	x9, _I40E_FLAG_IWARP_ENABLED@GOTPAGE
Lloh17:
	ldr	x9, [x9, _I40E_FLAG_IWARP_ENABLED@GOTPAGEOFF]
Lloh18:
	ldr	w9, [x9]
	tst	w9, w8
	b.eq	LBB0_7
; %bb.5:
Lloh19:
	adrp	x8, _I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK@GOTPAGE
Lloh20:
	ldr	x8, [x8, _I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK@GOTPAGEOFF]
Lloh21:
	ldr	w8, [x8]
	tst	w8, w22
	b.eq	LBB0_7
; %bb.6:
	bic	w21, w21, w8
	ldr	x0, [x19, #24]
Lloh22:
	adrp	x1, l_.str@PAGE
Lloh23:
	add	x1, x1, l_.str@PAGEOFF
	bl	_dev_dbg
Lloh24:
	adrp	x8, ___I40E_CORE_RESET_REQUESTED@GOTPAGE
Lloh25:
	ldr	x8, [x8, ___I40E_CORE_RESET_REQUESTED@GOTPAGEOFF]
Lloh26:
	ldr	w0, [x8]
	ldr	w1, [x19, #16]
	bl	_set_bit
LBB0_7:
Lloh27:
	adrp	x8, _I40E_PFINT_ICR0_QUEUE_0_MASK@GOTPAGE
Lloh28:
	ldr	x8, [x8, _I40E_PFINT_ICR0_QUEUE_0_MASK@GOTPAGEOFF]
Lloh29:
	ldr	w8, [x8]
	tst	w8, w22
	b.eq	LBB0_10
; %bb.8:
	ldr	x8, [x19, #48]
	ldr	x9, [x19, #8]
	ldr	x8, [x8, x9, lsl #3]
	ldr	x8, [x8]
	ldr	x23, [x8]
	ldr	w0, [x26]
	ldr	w1, [x19, #16]
	bl	_test_bit
	cbnz	x0, LBB0_10
; %bb.9:
	mov	x0, x23
	bl	_napi_schedule_irqoff
LBB0_10:
Lloh30:
	adrp	x8, _I40E_PFINT_ICR0_ADMINQ_MASK@GOTPAGE
Lloh31:
	ldr	x8, [x8, _I40E_PFINT_ICR0_ADMINQ_MASK@GOTPAGEOFF]
Lloh32:
	ldr	w8, [x8]
	tst	w8, w22
	b.eq	LBB0_12
; %bb.11:
Lloh33:
	adrp	x8, _I40E_PFINT_ICR0_ENA_ADMINQ_MASK@GOTPAGE
Lloh34:
	ldr	x8, [x8, _I40E_PFINT_ICR0_ENA_ADMINQ_MASK@GOTPAGEOFF]
Lloh35:
	ldr	w8, [x8]
	bic	w21, w21, w8
Lloh36:
	adrp	x8, ___I40E_ADMINQ_EVENT_PENDING@GOTPAGE
Lloh37:
	ldr	x8, [x8, ___I40E_ADMINQ_EVENT_PENDING@GOTPAGEOFF]
Lloh38:
	ldr	w0, [x8]
	ldr	w1, [x19, #16]
	bl	_set_bit
Lloh39:
	adrp	x8, _I40E_DEBUG_NVM@GOTPAGE
Lloh40:
	ldr	x8, [x8, _I40E_DEBUG_NVM@GOTPAGEOFF]
Lloh41:
	ldr	w1, [x8]
Lloh42:
	adrp	x2, l_.str.1@PAGE
Lloh43:
	add	x2, x2, l_.str.1@PAGEOFF
	mov	x0, x20
	bl	_i40e_debug
LBB0_12:
Lloh44:
	adrp	x8, _I40E_PFINT_ICR0_MAL_DETECT_MASK@GOTPAGE
Lloh45:
	ldr	x8, [x8, _I40E_PFINT_ICR0_MAL_DETECT_MASK@GOTPAGEOFF]
Lloh46:
	ldr	w8, [x8]
	tst	w8, w22
	b.eq	LBB0_14
; %bb.13:
Lloh47:
	adrp	x8, _I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK@GOTPAGE
Lloh48:
	ldr	x8, [x8, _I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK@GOTPAGEOFF]
Lloh49:
	ldr	w8, [x8]
	bic	w21, w21, w8
Lloh50:
	adrp	x8, ___I40E_MDD_EVENT_PENDING@GOTPAGE
Lloh51:
	ldr	x8, [x8, ___I40E_MDD_EVENT_PENDING@GOTPAGEOFF]
Lloh52:
	ldr	w0, [x8]
	ldr	w1, [x19, #16]
	bl	_set_bit
LBB0_14:
Lloh53:
	adrp	x8, _I40E_PFINT_ICR0_VFLR_MASK@GOTPAGE
Lloh54:
	ldr	x8, [x8, _I40E_PFINT_ICR0_VFLR_MASK@GOTPAGEOFF]
Lloh55:
	ldr	w8, [x8]
	tst	w8, w22
	b.eq	LBB0_16
; %bb.15:
Lloh56:
	adrp	x8, _I40E_PFINT_ICR0_ENA_VFLR_MASK@GOTPAGE
Lloh57:
	ldr	x8, [x8, _I40E_PFINT_ICR0_ENA_VFLR_MASK@GOTPAGEOFF]
Lloh58:
	ldr	w8, [x8]
	bic	w21, w21, w8
Lloh59:
	adrp	x8, ___I40E_VFLR_EVENT_PENDING@GOTPAGE
Lloh60:
	ldr	x8, [x8, ___I40E_VFLR_EVENT_PENDING@GOTPAGEOFF]
Lloh61:
	ldr	w0, [x8]
	ldr	w1, [x19, #16]
	bl	_set_bit
LBB0_16:
Lloh62:
	adrp	x8, _I40E_PFINT_ICR0_GRST_MASK@GOTPAGE
Lloh63:
	ldr	x8, [x8, _I40E_PFINT_ICR0_GRST_MASK@GOTPAGEOFF]
Lloh64:
	ldr	w8, [x8]
	tst	w8, w22
	b.eq	LBB0_25
; %bb.17:
Lloh65:
	adrp	x8, ___I40E_RESET_RECOVERY_PENDING@GOTPAGE
Lloh66:
	ldr	x8, [x8, ___I40E_RESET_RECOVERY_PENDING@GOTPAGEOFF]
Lloh67:
	ldr	w0, [x8]
	ldr	w1, [x19, #16]
	bl	_test_bit
	cbnz	x0, LBB0_19
; %bb.18:
Lloh68:
	adrp	x8, ___I40E_RESET_INTR_RECEIVED@GOTPAGE
Lloh69:
	ldr	x8, [x8, ___I40E_RESET_INTR_RECEIVED@GOTPAGEOFF]
Lloh70:
	ldr	w0, [x8]
	ldr	w1, [x19, #16]
	bl	_set_bit
LBB0_19:
Lloh71:
	adrp	x8, _I40E_PFINT_ICR0_ENA_GRST_MASK@GOTPAGE
Lloh72:
	ldr	x8, [x8, _I40E_PFINT_ICR0_ENA_GRST_MASK@GOTPAGEOFF]
Lloh73:
	ldr	w8, [x8]
	bic	w21, w21, w8
Lloh74:
	adrp	x8, _I40E_GLGEN_RSTAT@GOTPAGE
Lloh75:
	ldr	x8, [x8, _I40E_GLGEN_RSTAT@GOTPAGEOFF]
Lloh76:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_rd32
Lloh77:
	adrp	x8, _I40E_GLGEN_RSTAT_RESET_TYPE_MASK@GOTPAGE
Lloh78:
	ldr	x8, [x8, _I40E_GLGEN_RSTAT_RESET_TYPE_MASK@GOTPAGEOFF]
Lloh79:
	ldr	w8, [x8]
	and	w8, w8, w0
Lloh80:
	adrp	x9, _I40E_GLGEN_RSTAT_RESET_TYPE_SHIFT@GOTPAGE
Lloh81:
	ldr	x9, [x9, _I40E_GLGEN_RSTAT_RESET_TYPE_SHIFT@GOTPAGEOFF]
Lloh82:
	ldr	w9, [x9]
	asr	w8, w8, w9
Lloh83:
	adrp	x9, _I40E_RESET_CORER@GOTPAGE
Lloh84:
	ldr	x9, [x9, _I40E_RESET_CORER@GOTPAGEOFF]
Lloh85:
	ldr	w9, [x9]
	cmp	w8, w9
	b.ne	LBB0_21
; %bb.20:
	ldr	w8, [x19, #40]
	add	w8, w8, #1
	str	w8, [x19, #40]
	b	LBB0_25
LBB0_21:
Lloh86:
	adrp	x9, _I40E_RESET_GLOBR@GOTPAGE
Lloh87:
	ldr	x9, [x9, _I40E_RESET_GLOBR@GOTPAGEOFF]
Lloh88:
	ldr	w9, [x9]
	cmp	w8, w9
	b.ne	LBB0_23
; %bb.22:
	ldr	w8, [x19, #36]
	add	w8, w8, #1
	str	w8, [x19, #36]
	b	LBB0_25
LBB0_23:
Lloh89:
	adrp	x9, _I40E_RESET_EMPR@GOTPAGE
Lloh90:
	ldr	x9, [x9, _I40E_RESET_EMPR@GOTPAGEOFF]
Lloh91:
	ldr	w9, [x9]
	cmp	w8, w9
	b.ne	LBB0_25
; %bb.24:
	ldr	w8, [x19, #32]
	add	w8, w8, #1
	str	w8, [x19, #32]
Lloh92:
	adrp	x8, ___I40E_EMP_RESET_INTR_RECEIVED@GOTPAGE
Lloh93:
	ldr	x8, [x8, ___I40E_EMP_RESET_INTR_RECEIVED@GOTPAGEOFF]
Lloh94:
	ldr	w0, [x8]
	ldr	w1, [x19, #16]
	bl	_set_bit
LBB0_25:
Lloh95:
	adrp	x8, _I40E_PFINT_ICR0_HMC_ERR_MASK@GOTPAGE
Lloh96:
	ldr	x8, [x8, _I40E_PFINT_ICR0_HMC_ERR_MASK@GOTPAGEOFF]
Lloh97:
	ldr	w8, [x8]
	tst	w8, w22
	b.eq	LBB0_27
; %bb.26:
	bic	w22, w22, w8
	ldr	x0, [x19, #24]
Lloh98:
	adrp	x1, l_.str.2@PAGE
Lloh99:
	add	x1, x1, l_.str.2@PAGEOFF
	bl	_dev_info
	ldr	x23, [x19, #24]
Lloh100:
	adrp	x8, _I40E_PFHMC_ERRORINFO@GOTPAGE
Lloh101:
	ldr	x8, [x8, _I40E_PFHMC_ERRORINFO@GOTPAGEOFF]
Lloh102:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_rd32
	mov	x24, x0
Lloh103:
	adrp	x8, _I40E_PFHMC_ERRORDATA@GOTPAGE
Lloh104:
	ldr	x8, [x8, _I40E_PFHMC_ERRORDATA@GOTPAGEOFF]
Lloh105:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_rd32
                                        ; kill: def $w0 killed $w0 def $x0
	stp	x24, x0, [sp]
Lloh106:
	adrp	x1, l_.str.3@PAGE
Lloh107:
	add	x1, x1, l_.str.3@PAGEOFF
	mov	x0, x23
	bl	_dev_info
LBB0_27:
Lloh108:
	adrp	x8, _I40E_PFINT_ICR0_TIMESYNC_MASK@GOTPAGE
Lloh109:
	ldr	x8, [x8, _I40E_PFINT_ICR0_TIMESYNC_MASK@GOTPAGEOFF]
Lloh110:
	ldr	w8, [x8]
	tst	w8, w22
	b.eq	LBB0_30
; %bb.28:
Lloh111:
	adrp	x8, _I40E_PRTTSYN_STAT_0@GOTPAGE
Lloh112:
	ldr	x8, [x8, _I40E_PRTTSYN_STAT_0@GOTPAGEOFF]
Lloh113:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_rd32
Lloh114:
	adrp	x8, _I40E_PRTTSYN_STAT_0_TXTIME_MASK@GOTPAGE
Lloh115:
	ldr	x8, [x8, _I40E_PRTTSYN_STAT_0_TXTIME_MASK@GOTPAGEOFF]
Lloh116:
	ldr	w8, [x8]
	tst	w8, w0
	b.eq	LBB0_30
; %bb.29:
Lloh117:
	adrp	x8, _I40E_PFINT_ICR0_ENA_TIMESYNC_MASK@GOTPAGE
Lloh118:
	ldr	x8, [x8, _I40E_PFINT_ICR0_ENA_TIMESYNC_MASK@GOTPAGEOFF]
Lloh119:
	ldr	w8, [x8]
	bic	w22, w22, w8
	mov	x0, x19
	bl	_i40e_ptp_tx_hwtstamp
LBB0_30:
	ands	w22, w22, w21
	b.eq	LBB0_36
; %bb.31:
	ldr	x0, [x19, #24]
	str	x22, [sp]
Lloh120:
	adrp	x1, l_.str.4@PAGE
Lloh121:
	add	x1, x1, l_.str.4@PAGEOFF
	bl	_dev_info
Lloh122:
	adrp	x8, _I40E_PFINT_ICR0_PE_CRITERR_MASK@GOTPAGE
Lloh123:
	ldr	x8, [x8, _I40E_PFINT_ICR0_PE_CRITERR_MASK@GOTPAGEOFF]
Lloh124:
	ldr	w8, [x8]
	tst	w8, w22
	b.ne	LBB0_34
; %bb.32:
Lloh125:
	adrp	x8, _I40E_PFINT_ICR0_PCI_EXCEPTION_MASK@GOTPAGE
Lloh126:
	ldr	x8, [x8, _I40E_PFINT_ICR0_PCI_EXCEPTION_MASK@GOTPAGEOFF]
Lloh127:
	ldr	w8, [x8]
	tst	w8, w22
	b.ne	LBB0_34
; %bb.33:
Lloh128:
	adrp	x8, _I40E_PFINT_ICR0_ECC_ERR_MASK@GOTPAGE
Lloh129:
	ldr	x8, [x8, _I40E_PFINT_ICR0_ECC_ERR_MASK@GOTPAGEOFF]
Lloh130:
	ldr	w8, [x8]
	tst	w8, w22
	b.eq	LBB0_35
LBB0_34:
	ldr	x0, [x19, #24]
Lloh131:
	adrp	x1, l_.str.5@PAGE
Lloh132:
	add	x1, x1, l_.str.5@PAGEOFF
	bl	_dev_info
Lloh133:
	adrp	x8, ___I40E_PF_RESET_REQUESTED@GOTPAGE
Lloh134:
	ldr	x8, [x8, ___I40E_PF_RESET_REQUESTED@GOTPAGEOFF]
Lloh135:
	ldr	w0, [x8]
	ldr	w1, [x19, #16]
	bl	_set_bit
	mov	x0, x19
	bl	_i40e_service_event_schedule
LBB0_35:
	eor	w21, w22, w21
LBB0_36:
Lloh136:
	adrp	x8, _IRQ_HANDLED@GOTPAGE
Lloh137:
	ldr	x8, [x8, _IRQ_HANDLED@GOTPAGEOFF]
Lloh138:
	ldr	w23, [x8]
LBB0_37:
	ldr	w1, [x25]
	mov	x0, x20
	mov	x2, x21
	bl	_wr32
	ldr	w0, [x26]
	ldr	w1, [x19, #16]
	bl	_test_bit
	cbz	x0, LBB0_39
; %bb.38:
Lloh139:
	adrp	x8, ___I40E_RECOVERY_MODE@GOTPAGE
Lloh140:
	ldr	x8, [x8, ___I40E_RECOVERY_MODE@GOTPAGEOFF]
Lloh141:
	ldr	w0, [x8]
	ldr	w1, [x19, #16]
	bl	_test_bit
	cbz	x0, LBB0_40
LBB0_39:
	mov	x0, x19
	bl	_i40e_service_event_schedule
	mov	x0, x19
	bl	_i40e_irq_dynamic_enable_icr0
LBB0_40:
	mov	x0, x23
	ldp	x29, x30, [sp, #80]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #64]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #48]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #32]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #96
	ret
	.loh AdrpLdrGot	Lloh11, Lloh12
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGot	Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh13, Lloh14, Lloh15
	.loh AdrpLdrGotLdr	Lloh16, Lloh17, Lloh18
	.loh AdrpLdrGotLdr	Lloh19, Lloh20, Lloh21
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.loh AdrpAdd	Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh27, Lloh28, Lloh29
	.loh AdrpLdrGotLdr	Lloh30, Lloh31, Lloh32
	.loh AdrpAdd	Lloh42, Lloh43
	.loh AdrpLdrGotLdr	Lloh39, Lloh40, Lloh41
	.loh AdrpLdrGotLdr	Lloh36, Lloh37, Lloh38
	.loh AdrpLdrGotLdr	Lloh33, Lloh34, Lloh35
	.loh AdrpLdrGotLdr	Lloh44, Lloh45, Lloh46
	.loh AdrpLdrGotLdr	Lloh50, Lloh51, Lloh52
	.loh AdrpLdrGotLdr	Lloh47, Lloh48, Lloh49
	.loh AdrpLdrGotLdr	Lloh53, Lloh54, Lloh55
	.loh AdrpLdrGotLdr	Lloh59, Lloh60, Lloh61
	.loh AdrpLdrGotLdr	Lloh56, Lloh57, Lloh58
	.loh AdrpLdrGotLdr	Lloh62, Lloh63, Lloh64
	.loh AdrpLdrGotLdr	Lloh65, Lloh66, Lloh67
	.loh AdrpLdrGotLdr	Lloh68, Lloh69, Lloh70
	.loh AdrpLdrGotLdr	Lloh83, Lloh84, Lloh85
	.loh AdrpLdrGotLdr	Lloh80, Lloh81, Lloh82
	.loh AdrpLdrGotLdr	Lloh77, Lloh78, Lloh79
	.loh AdrpLdrGotLdr	Lloh74, Lloh75, Lloh76
	.loh AdrpLdrGotLdr	Lloh71, Lloh72, Lloh73
	.loh AdrpLdrGotLdr	Lloh86, Lloh87, Lloh88
	.loh AdrpLdrGotLdr	Lloh89, Lloh90, Lloh91
	.loh AdrpLdrGotLdr	Lloh92, Lloh93, Lloh94
	.loh AdrpLdrGotLdr	Lloh95, Lloh96, Lloh97
	.loh AdrpAdd	Lloh106, Lloh107
	.loh AdrpLdrGotLdr	Lloh103, Lloh104, Lloh105
	.loh AdrpLdrGotLdr	Lloh100, Lloh101, Lloh102
	.loh AdrpAdd	Lloh98, Lloh99
	.loh AdrpLdrGotLdr	Lloh108, Lloh109, Lloh110
	.loh AdrpLdrGotLdr	Lloh114, Lloh115, Lloh116
	.loh AdrpLdrGotLdr	Lloh111, Lloh112, Lloh113
	.loh AdrpLdrGotLdr	Lloh117, Lloh118, Lloh119
	.loh AdrpLdrGotLdr	Lloh122, Lloh123, Lloh124
	.loh AdrpAdd	Lloh120, Lloh121
	.loh AdrpLdrGotLdr	Lloh125, Lloh126, Lloh127
	.loh AdrpLdrGotLdr	Lloh128, Lloh129, Lloh130
	.loh AdrpLdrGotLdr	Lloh133, Lloh134, Lloh135
	.loh AdrpAdd	Lloh131, Lloh132
	.loh AdrpLdrGotLdr	Lloh136, Lloh137, Lloh138
	.loh AdrpLdrGotLdr	Lloh139, Lloh140, Lloh141
	.cfi_endproc
                                        ; -- End function
	.comm	_IRQ_NONE,4,2                   ; @IRQ_NONE
	.comm	_I40E_PFINT_ICR0,4,2            ; @I40E_PFINT_ICR0
	.comm	_I40E_PFINT_ICR0_ENA,4,2        ; @I40E_PFINT_ICR0_ENA
	.comm	_I40E_PFINT_ICR0_INTEVENT_MASK,4,2 ; @I40E_PFINT_ICR0_INTEVENT_MASK
	.comm	_I40E_PFINT_ICR0_SWINT_MASK,4,2 ; @I40E_PFINT_ICR0_SWINT_MASK
	.comm	_I40E_FLAG_IWARP_ENABLED,4,2    ; @I40E_FLAG_IWARP_ENABLED
	.comm	_I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK,4,2 ; @I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"cleared PE_CRITERR\n"

	.comm	___I40E_CORE_RESET_REQUESTED,4,2 ; @__I40E_CORE_RESET_REQUESTED
	.comm	_I40E_PFINT_ICR0_QUEUE_0_MASK,4,2 ; @I40E_PFINT_ICR0_QUEUE_0_MASK
	.comm	___I40E_DOWN,4,2                ; @__I40E_DOWN
	.comm	_I40E_PFINT_ICR0_ADMINQ_MASK,4,2 ; @I40E_PFINT_ICR0_ADMINQ_MASK
	.comm	_I40E_PFINT_ICR0_ENA_ADMINQ_MASK,4,2 ; @I40E_PFINT_ICR0_ENA_ADMINQ_MASK
	.comm	___I40E_ADMINQ_EVENT_PENDING,4,2 ; @__I40E_ADMINQ_EVENT_PENDING
	.comm	_I40E_DEBUG_NVM,4,2             ; @I40E_DEBUG_NVM
l_.str.1:                               ; @.str.1
	.asciz	"AdminQ event\n"

	.comm	_I40E_PFINT_ICR0_MAL_DETECT_MASK,4,2 ; @I40E_PFINT_ICR0_MAL_DETECT_MASK
	.comm	_I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK,4,2 ; @I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK
	.comm	___I40E_MDD_EVENT_PENDING,4,2   ; @__I40E_MDD_EVENT_PENDING
	.comm	_I40E_PFINT_ICR0_VFLR_MASK,4,2  ; @I40E_PFINT_ICR0_VFLR_MASK
	.comm	_I40E_PFINT_ICR0_ENA_VFLR_MASK,4,2 ; @I40E_PFINT_ICR0_ENA_VFLR_MASK
	.comm	___I40E_VFLR_EVENT_PENDING,4,2  ; @__I40E_VFLR_EVENT_PENDING
	.comm	_I40E_PFINT_ICR0_GRST_MASK,4,2  ; @I40E_PFINT_ICR0_GRST_MASK
	.comm	___I40E_RESET_RECOVERY_PENDING,4,2 ; @__I40E_RESET_RECOVERY_PENDING
	.comm	___I40E_RESET_INTR_RECEIVED,4,2 ; @__I40E_RESET_INTR_RECEIVED
	.comm	_I40E_PFINT_ICR0_ENA_GRST_MASK,4,2 ; @I40E_PFINT_ICR0_ENA_GRST_MASK
	.comm	_I40E_GLGEN_RSTAT,4,2           ; @I40E_GLGEN_RSTAT
	.comm	_I40E_GLGEN_RSTAT_RESET_TYPE_MASK,4,2 ; @I40E_GLGEN_RSTAT_RESET_TYPE_MASK
	.comm	_I40E_GLGEN_RSTAT_RESET_TYPE_SHIFT,4,2 ; @I40E_GLGEN_RSTAT_RESET_TYPE_SHIFT
	.comm	_I40E_RESET_CORER,4,2           ; @I40E_RESET_CORER
	.comm	_I40E_RESET_GLOBR,4,2           ; @I40E_RESET_GLOBR
	.comm	_I40E_RESET_EMPR,4,2            ; @I40E_RESET_EMPR
	.comm	___I40E_EMP_RESET_INTR_RECEIVED,4,2 ; @__I40E_EMP_RESET_INTR_RECEIVED
	.comm	_I40E_PFINT_ICR0_HMC_ERR_MASK,4,2 ; @I40E_PFINT_ICR0_HMC_ERR_MASK
l_.str.2:                               ; @.str.2
	.asciz	"HMC error interrupt\n"

l_.str.3:                               ; @.str.3
	.asciz	"HMC error info 0x%x, HMC error data 0x%x\n"

	.comm	_I40E_PFHMC_ERRORINFO,4,2       ; @I40E_PFHMC_ERRORINFO
	.comm	_I40E_PFHMC_ERRORDATA,4,2       ; @I40E_PFHMC_ERRORDATA
	.comm	_I40E_PFINT_ICR0_TIMESYNC_MASK,4,2 ; @I40E_PFINT_ICR0_TIMESYNC_MASK
	.comm	_I40E_PRTTSYN_STAT_0,4,2        ; @I40E_PRTTSYN_STAT_0
	.comm	_I40E_PRTTSYN_STAT_0_TXTIME_MASK,4,2 ; @I40E_PRTTSYN_STAT_0_TXTIME_MASK
	.comm	_I40E_PFINT_ICR0_ENA_TIMESYNC_MASK,4,2 ; @I40E_PFINT_ICR0_ENA_TIMESYNC_MASK
l_.str.4:                               ; @.str.4
	.asciz	"unhandled interrupt icr0=0x%08x\n"

	.comm	_I40E_PFINT_ICR0_PE_CRITERR_MASK,4,2 ; @I40E_PFINT_ICR0_PE_CRITERR_MASK
	.comm	_I40E_PFINT_ICR0_PCI_EXCEPTION_MASK,4,2 ; @I40E_PFINT_ICR0_PCI_EXCEPTION_MASK
	.comm	_I40E_PFINT_ICR0_ECC_ERR_MASK,4,2 ; @I40E_PFINT_ICR0_ECC_ERR_MASK
l_.str.5:                               ; @.str.5
	.asciz	"device will be reset\n"

	.comm	___I40E_PF_RESET_REQUESTED,4,2  ; @__I40E_PF_RESET_REQUESTED
	.comm	_IRQ_HANDLED,4,2                ; @IRQ_HANDLED
	.comm	___I40E_RECOVERY_MODE,4,2       ; @__I40E_RECOVERY_MODE
	.no_dead_strip	_i40e_intr
.subsections_via_symbols
