	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_ixgbe_configure_tx_ring        ## -- Begin function ixgbe_configure_tx_ring
	.p2align	4, 0x90
_ixgbe_configure_tx_ring:               ## @ixgbe_configure_tx_ring
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$24, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rsi, %rbx
	movq	%rdi, %r13
	leaq	24(%rdi), %r15
	movl	(%rsi), %r14d
	movl	64(%rsi), %r12d
	movq	_IXGBE_TXDCTL_ENABLE@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, -44(%rbp)                 ## 4-byte Spill
	movq	$0, 56(%rsi)
	movq	%rsi, %rdi
	callq	_ring_is_xdp
	testq	%rax, %rax
	je	LBB0_2
## %bb.1:
	movq	%r13, %rdi
	movq	%rbx, %rsi
	callq	_ixgbe_xsk_umem
	movq	%rax, 56(%rbx)
LBB0_2:
	movl	%r12d, %edi
	callq	_IXGBE_TXDCTL
	movq	%r15, %rdi
	movq	%rax, %rsi
	xorl	%edx, %edx
	callq	_IXGBE_WRITE_REG
	movq	%r15, %rdi
	callq	_IXGBE_WRITE_FLUSH
	movl	%r12d, %edi
	callq	_IXGBE_TDBAL
	movq	%r13, -56(%rbp)                 ## 8-byte Spill
	movl	%r12d, %r13d
	movq	%rax, %r12
	movl	$32, %edi
	callq	_DMA_BIT_MASK
	andl	%eax, %r14d
	movq	%r15, %rdi
	movq	%r12, %rsi
	movl	%r14d, %edx
	callq	_IXGBE_WRITE_REG
	movl	%r13d, %edi
	callq	_IXGBE_TDBAH
	movq	%r15, %rdi
	movq	%rax, %rsi
	callq	_IXGBE_WRITE_REG
	movl	%r13d, %edi
	callq	_IXGBE_TDLEN
	movl	4(%rbx), %edx
	shll	$2, %edx
	movq	%r15, %rdi
	movq	%rax, %rsi
	callq	_IXGBE_WRITE_REG
	movl	%r13d, %edi
	callq	_IXGBE_TDH
	movq	%r15, %rdi
	movq	%rax, %rsi
	xorl	%edx, %edx
	callq	_IXGBE_WRITE_REG
	movl	%r13d, %edi
	callq	_IXGBE_TDT
	movq	%r15, -64(%rbp)                 ## 8-byte Spill
	movq	%r15, %rdi
	movq	%rax, %rsi
	xorl	%edx, %edx
	callq	_IXGBE_WRITE_REG
	movq	-56(%rbp), %rax                 ## 8-byte Reload
	movq	%rax, %r12
	movq	16(%rax), %r14
	movl	%r13d, %r15d
	movl	%r13d, %edi
	callq	_IXGBE_TDT
	addq	%r14, %rax
	movq	%rax, 48(%rbx)
	movq	24(%rbx), %rax
	testq	%rax, %rax
	je	LBB0_3
## %bb.4:
	movq	(%rax), %rax
	movq	_IXGBE_100K_ITR@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	movl	$65536, %ecx                    ## imm = 0x10000
	movl	$524288, %eax                   ## imm = 0x80000
	cmovll	%ecx, %eax
	jmp	LBB0_5
LBB0_3:
	movl	$65536, %eax                    ## imm = 0x10000
LBB0_5:
	movl	-44(%rbp), %r13d                ## 4-byte Reload
	orl	%eax, %r13d
	movq	_IXGBE_FLAG_FDIR_HASH_CAPABLE@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	testl	%eax, (%r12)
	je	LBB0_7
## %bb.6:
	movq	8(%r12), %rax
	movq	%rax, 32(%rbx)
	movq	$0, 40(%rbx)
	movq	___IXGBE_TX_FDIR_INIT_DONE@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	leaq	12(%rbx), %rsi
	callq	_set_bit
	jmp	LBB0_8
LBB0_7:
	movq	$0, 32(%rbx)
LBB0_8:
	movl	%r15d, %r12d
	orl	$288, %r13d                     ## imm = 0x120
	movq	___IXGBE_TX_XPS_INIT_DONE@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	leaq	12(%rbx), %r14
	movq	%r14, %rsi
	callq	_test_and_set_bit
	testl	%eax, %eax
	movq	-64(%rbp), %r15                 ## 8-byte Reload
	jne	LBB0_11
## %bb.9:
	movq	24(%rbx), %rsi
	testq	%rsi, %rsi
	je	LBB0_11
## %bb.10:
	movl	16(%rbx), %edx
	movl	20(%rbx), %edi
	addq	$8, %rsi
	callq	_netif_set_xps_queue
LBB0_11:
	movq	___IXGBE_HANG_CHECK_ARMED@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	%r14, %rsi
	callq	_clear_bit
	movl	4(%rbx), %edx
	movl	8(%rbx), %edi
	shll	$2, %edx
	xorl	%esi, %esi
	callq	_memset
	movl	%r12d, %edi
	callq	_IXGBE_TXDCTL
	movq	%r15, %rdi
	movq	%rax, %rsi
	movl	%r13d, %edx
	callq	_IXGBE_WRITE_REG
	movq	(%r15), %rax
	movq	_ixgbe_mac_82598EB@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	movq	_IXGBE_TXDCTL_ENABLE@GOTPCREL(%rip), %rbx
	jne	LBB0_13
## %bb.12:
	movq	_IXGBE_LINKS@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	movq	%r15, %rdi
	callq	_IXGBE_READ_REG
	movq	_IXGBE_LINKS_UP@GOTPCREL(%rip), %rcx
	testl	%eax, (%rcx)
	je	LBB0_22
LBB0_13:
	movl	$1000, %edi                     ## imm = 0x3E8
	movl	$2000, %esi                     ## imm = 0x7D0
	callq	_usleep_range
	movl	%r12d, %edi
	callq	_IXGBE_TXDCTL
	movq	%r15, %rdi
	movq	%rax, %rsi
	callq	_IXGBE_READ_REG
	testl	%eax, (%rbx)
	jne	LBB0_22
## %bb.14:
	movl	$1000, %edi                     ## imm = 0x3E8
	movl	$2000, %esi                     ## imm = 0x7D0
	callq	_usleep_range
	movl	%r12d, %edi
	callq	_IXGBE_TXDCTL
	movq	%r15, %rdi
	movq	%rax, %rsi
	callq	_IXGBE_READ_REG
	testl	%eax, (%rbx)
	jne	LBB0_22
## %bb.15:
	movl	$1000, %edi                     ## imm = 0x3E8
	movl	$2000, %esi                     ## imm = 0x7D0
	callq	_usleep_range
	movl	%r12d, %edi
	callq	_IXGBE_TXDCTL
	movq	%r15, %rdi
	movq	%rax, %rsi
	callq	_IXGBE_READ_REG
	testl	%eax, (%rbx)
	jne	LBB0_22
## %bb.16:
	movl	$1000, %edi                     ## imm = 0x3E8
	movl	$2000, %esi                     ## imm = 0x7D0
	callq	_usleep_range
	movl	%r12d, %edi
	callq	_IXGBE_TXDCTL
	movq	%r15, %rdi
	movq	%rax, %rsi
	callq	_IXGBE_READ_REG
	testl	%eax, (%rbx)
	jne	LBB0_22
## %bb.17:
	movl	$1000, %edi                     ## imm = 0x3E8
	movl	$2000, %esi                     ## imm = 0x7D0
	callq	_usleep_range
	movl	%r12d, %edi
	callq	_IXGBE_TXDCTL
	movq	%r15, %rdi
	movq	%rax, %rsi
	callq	_IXGBE_READ_REG
	testl	%eax, (%rbx)
	jne	LBB0_22
## %bb.18:
	movl	$1000, %edi                     ## imm = 0x3E8
	movl	$2000, %esi                     ## imm = 0x7D0
	callq	_usleep_range
	movl	%r12d, %edi
	callq	_IXGBE_TXDCTL
	movq	%r15, %rdi
	movq	%rax, %rsi
	callq	_IXGBE_READ_REG
	testl	%eax, (%rbx)
	jne	LBB0_22
## %bb.19:
	movl	$1000, %edi                     ## imm = 0x3E8
	movl	$2000, %esi                     ## imm = 0x7D0
	callq	_usleep_range
	movl	%r12d, %edi
	callq	_IXGBE_TXDCTL
	movq	%r15, %rdi
	movq	%rax, %rsi
	callq	_IXGBE_READ_REG
	testl	%eax, (%rbx)
	jne	LBB0_22
## %bb.20:
	movl	$1000, %edi                     ## imm = 0x3E8
	movl	$2000, %esi                     ## imm = 0x7D0
	callq	_usleep_range
	movl	%r12d, %edi
	callq	_IXGBE_TXDCTL
	movq	%r15, %rdi
	movq	%rax, %rsi
	callq	_IXGBE_READ_REG
	testl	%eax, (%rbx)
	jne	LBB0_22
## %bb.21:
	movl	$1000, %edi                     ## imm = 0x3E8
	movl	$2000, %esi                     ## imm = 0x7D0
	callq	_usleep_range
	movl	%r12d, %edi
	callq	_IXGBE_TXDCTL
	movq	%r15, %rdi
	movq	%rax, %rsi
	callq	_IXGBE_READ_REG
	testl	%eax, (%rbx)
	je	LBB0_23
LBB0_22:
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_23:
	movl	$1000, %edi                     ## imm = 0x3E8
	movl	$2000, %esi                     ## imm = 0x7D0
	callq	_usleep_range
	movl	%r12d, %edi
	callq	_IXGBE_TXDCTL
	movq	%r15, %rdi
	movq	%rax, %rsi
	callq	_IXGBE_READ_REG
	leaq	L_.str(%rip), %rsi
	movq	%r15, %rdi
	movl	%r12d, %edx
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_hw_dbg                         ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_IXGBE_TXDCTL_ENABLE,4,2        ## @IXGBE_TXDCTL_ENABLE
	.comm	_IXGBE_100K_ITR,8,3             ## @IXGBE_100K_ITR
	.comm	_IXGBE_FLAG_FDIR_HASH_CAPABLE,4,2 ## @IXGBE_FLAG_FDIR_HASH_CAPABLE
	.comm	___IXGBE_TX_FDIR_INIT_DONE,4,2  ## @__IXGBE_TX_FDIR_INIT_DONE
	.comm	___IXGBE_TX_XPS_INIT_DONE,4,2   ## @__IXGBE_TX_XPS_INIT_DONE
	.comm	___IXGBE_HANG_CHECK_ARMED,4,2   ## @__IXGBE_HANG_CHECK_ARMED
	.comm	_ixgbe_mac_82598EB,8,3          ## @ixgbe_mac_82598EB
	.comm	_IXGBE_LINKS,8,3                ## @IXGBE_LINKS
	.comm	_IXGBE_LINKS_UP,4,2             ## @IXGBE_LINKS_UP
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"Could not enable Tx Queue %d\n"

.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_ixgbe_configure_tx_ring        ; -- Begin function ixgbe_configure_tx_ring
	.p2align	2
_ixgbe_configure_tx_ring:               ; @ixgbe_configure_tx_ring
	.cfi_startproc
; %bb.0:
	stp	x26, x25, [sp, #-80]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	mov	x21, x1
	mov	x22, x0
	add	x19, x0, #24
	ldr	w26, [x1]
Lloh0:
	adrp	x24, _IXGBE_TXDCTL_ENABLE@GOTPAGE
Lloh1:
	ldr	x24, [x24, _IXGBE_TXDCTL_ENABLE@GOTPAGEOFF]
	ldr	w25, [x24]
	ldr	w20, [x1, #64]
	str	xzr, [x1, #56]
	mov	x0, x1
	bl	_ring_is_xdp
	cbz	x0, LBB0_2
; %bb.1:
	mov	x0, x22
	mov	x1, x21
	bl	_ixgbe_xsk_umem
	str	x0, [x21, #56]
LBB0_2:
	mov	x0, x20
	bl	_IXGBE_TXDCTL
	mov	x1, x0
	mov	x0, x19
	mov	w2, #0
	bl	_IXGBE_WRITE_REG
	mov	x0, x19
	bl	_IXGBE_WRITE_FLUSH
	mov	x0, x20
	bl	_IXGBE_TDBAL
	mov	x23, x0
	mov	w0, #32
	bl	_DMA_BIT_MASK
	and	w2, w0, w26
	mov	x0, x19
	mov	x1, x23
	bl	_IXGBE_WRITE_REG
	mov	x0, x20
	bl	_IXGBE_TDBAH
	mov	x1, x0
	mov	x0, x19
	bl	_IXGBE_WRITE_REG
	mov	x0, x20
	bl	_IXGBE_TDLEN
	mov	x1, x0
	ldr	w8, [x21, #4]
	lsl	w2, w8, #2
	mov	x0, x19
	bl	_IXGBE_WRITE_REG
	mov	x0, x20
	bl	_IXGBE_TDH
	mov	x1, x0
	mov	x0, x19
	mov	w2, #0
	bl	_IXGBE_WRITE_REG
	mov	x0, x20
	bl	_IXGBE_TDT
	mov	x1, x0
	mov	x0, x19
	mov	w2, #0
	bl	_IXGBE_WRITE_REG
	ldr	x23, [x22, #16]
	mov	x0, x20
	bl	_IXGBE_TDT
	add	x8, x0, x23
	str	x8, [x21, #48]
	ldr	x9, [x21, #24]
	mov	w8, #65536
	cbz	x9, LBB0_4
; %bb.3:
	ldr	x9, [x9]
Lloh2:
	adrp	x10, _IXGBE_100K_ITR@GOTPAGE
Lloh3:
	ldr	x10, [x10, _IXGBE_100K_ITR@GOTPAGEOFF]
Lloh4:
	ldr	x10, [x10]
	cmp	x9, x10
	mov	w9, #524288
	csel	w8, w8, w9, lt
LBB0_4:
	orr	w8, w25, w8
	mov	w9, #288
	orr	w23, w8, w9
	ldr	w8, [x22]
Lloh5:
	adrp	x9, _IXGBE_FLAG_FDIR_HASH_CAPABLE@GOTPAGE
Lloh6:
	ldr	x9, [x9, _IXGBE_FLAG_FDIR_HASH_CAPABLE@GOTPAGEOFF]
Lloh7:
	ldr	w9, [x9]
	tst	w9, w8
	b.eq	LBB0_6
; %bb.5:
	ldr	x8, [x22, #8]
	stp	x8, xzr, [x21, #32]
Lloh8:
	adrp	x8, ___IXGBE_TX_FDIR_INIT_DONE@GOTPAGE
Lloh9:
	ldr	x8, [x8, ___IXGBE_TX_FDIR_INIT_DONE@GOTPAGEOFF]
Lloh10:
	ldr	w0, [x8]
	add	x1, x21, #12
	bl	_set_bit
	b	LBB0_7
LBB0_6:
	str	xzr, [x21, #32]
LBB0_7:
Lloh11:
	adrp	x8, ___IXGBE_TX_XPS_INIT_DONE@GOTPAGE
Lloh12:
	ldr	x8, [x8, ___IXGBE_TX_XPS_INIT_DONE@GOTPAGEOFF]
Lloh13:
	ldr	w0, [x8]
	add	x22, x21, #12
	mov	x1, x22
	bl	_test_and_set_bit
	cbnz	w0, LBB0_10
; %bb.8:
	ldr	x8, [x21, #24]
	cbz	x8, LBB0_10
; %bb.9:
	add	x1, x8, #8
	ldp	w2, w0, [x21, #16]
	bl	_netif_set_xps_queue
LBB0_10:
Lloh14:
	adrp	x8, ___IXGBE_HANG_CHECK_ARMED@GOTPAGE
Lloh15:
	ldr	x8, [x8, ___IXGBE_HANG_CHECK_ARMED@GOTPAGEOFF]
Lloh16:
	ldr	w0, [x8]
	mov	x1, x22
	bl	_clear_bit
	ldp	w8, w0, [x21, #4]
	lsl	w2, w8, #2
	mov	w1, #0
	bl	_memset
	mov	x0, x20
	bl	_IXGBE_TXDCTL
	mov	x1, x0
	mov	x0, x19
	mov	x2, x23
	bl	_IXGBE_WRITE_REG
	ldr	x8, [x19]
Lloh17:
	adrp	x9, _ixgbe_mac_82598EB@GOTPAGE
Lloh18:
	ldr	x9, [x9, _ixgbe_mac_82598EB@GOTPAGEOFF]
Lloh19:
	ldr	x9, [x9]
	cmp	x8, x9
	b.ne	LBB0_12
; %bb.11:
Lloh20:
	adrp	x8, _IXGBE_LINKS@GOTPAGE
Lloh21:
	ldr	x8, [x8, _IXGBE_LINKS@GOTPAGEOFF]
Lloh22:
	ldr	x1, [x8]
	mov	x0, x19
	bl	_IXGBE_READ_REG
Lloh23:
	adrp	x8, _IXGBE_LINKS_UP@GOTPAGE
Lloh24:
	ldr	x8, [x8, _IXGBE_LINKS_UP@GOTPAGEOFF]
Lloh25:
	ldr	w8, [x8]
	tst	w8, w0
	b.eq	LBB0_21
LBB0_12:
	mov	w0, #1000
	mov	w1, #2000
	bl	_usleep_range
	mov	x0, x20
	bl	_IXGBE_TXDCTL
	mov	x1, x0
	mov	x0, x19
	bl	_IXGBE_READ_REG
	ldr	w8, [x24]
	tst	w8, w0
	b.ne	LBB0_21
; %bb.13:
	mov	w0, #1000
	mov	w1, #2000
	bl	_usleep_range
	mov	x0, x20
	bl	_IXGBE_TXDCTL
	mov	x1, x0
	mov	x0, x19
	bl	_IXGBE_READ_REG
	ldr	w8, [x24]
	tst	w8, w0
	b.ne	LBB0_21
; %bb.14:
	mov	w0, #1000
	mov	w1, #2000
	bl	_usleep_range
	mov	x0, x20
	bl	_IXGBE_TXDCTL
	mov	x1, x0
	mov	x0, x19
	bl	_IXGBE_READ_REG
	ldr	w8, [x24]
	tst	w8, w0
	b.ne	LBB0_21
; %bb.15:
	mov	w0, #1000
	mov	w1, #2000
	bl	_usleep_range
	mov	x0, x20
	bl	_IXGBE_TXDCTL
	mov	x1, x0
	mov	x0, x19
	bl	_IXGBE_READ_REG
	ldr	w8, [x24]
	tst	w8, w0
	b.ne	LBB0_21
; %bb.16:
	mov	w0, #1000
	mov	w1, #2000
	bl	_usleep_range
	mov	x0, x20
	bl	_IXGBE_TXDCTL
	mov	x1, x0
	mov	x0, x19
	bl	_IXGBE_READ_REG
	ldr	w8, [x24]
	tst	w8, w0
	b.ne	LBB0_21
; %bb.17:
	mov	w0, #1000
	mov	w1, #2000
	bl	_usleep_range
	mov	x0, x20
	bl	_IXGBE_TXDCTL
	mov	x1, x0
	mov	x0, x19
	bl	_IXGBE_READ_REG
	ldr	w8, [x24]
	tst	w8, w0
	b.ne	LBB0_21
; %bb.18:
	mov	w0, #1000
	mov	w1, #2000
	bl	_usleep_range
	mov	x0, x20
	bl	_IXGBE_TXDCTL
	mov	x1, x0
	mov	x0, x19
	bl	_IXGBE_READ_REG
	ldr	w8, [x24]
	tst	w8, w0
	b.ne	LBB0_21
; %bb.19:
	mov	w0, #1000
	mov	w1, #2000
	bl	_usleep_range
	mov	x0, x20
	bl	_IXGBE_TXDCTL
	mov	x1, x0
	mov	x0, x19
	bl	_IXGBE_READ_REG
	ldr	w8, [x24]
	tst	w8, w0
	b.ne	LBB0_21
; %bb.20:
	mov	w0, #1000
	mov	w1, #2000
	bl	_usleep_range
	mov	x0, x20
	bl	_IXGBE_TXDCTL
	mov	x1, x0
	mov	x0, x19
	bl	_IXGBE_READ_REG
	ldr	w8, [x24]
	tst	w8, w0
	b.eq	LBB0_22
LBB0_21:
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp], #80             ; 16-byte Folded Reload
	ret
LBB0_22:
	mov	w0, #1000
	mov	w1, #2000
	bl	_usleep_range
	mov	x0, x20
	bl	_IXGBE_TXDCTL
	mov	x1, x0
	mov	x0, x19
	bl	_IXGBE_READ_REG
Lloh26:
	adrp	x1, l_.str@PAGE
Lloh27:
	add	x1, x1, l_.str@PAGEOFF
	mov	x0, x19
	mov	x2, x20
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp], #80             ; 16-byte Folded Reload
	b	_hw_dbg
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh19
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh16
	.loh AdrpLdrGotLdr	Lloh23, Lloh24, Lloh25
	.loh AdrpLdrGotLdr	Lloh20, Lloh21, Lloh22
	.loh AdrpAdd	Lloh26, Lloh27
	.cfi_endproc
                                        ; -- End function
	.comm	_IXGBE_TXDCTL_ENABLE,4,2        ; @IXGBE_TXDCTL_ENABLE
	.comm	_IXGBE_100K_ITR,8,3             ; @IXGBE_100K_ITR
	.comm	_IXGBE_FLAG_FDIR_HASH_CAPABLE,4,2 ; @IXGBE_FLAG_FDIR_HASH_CAPABLE
	.comm	___IXGBE_TX_FDIR_INIT_DONE,4,2  ; @__IXGBE_TX_FDIR_INIT_DONE
	.comm	___IXGBE_TX_XPS_INIT_DONE,4,2   ; @__IXGBE_TX_XPS_INIT_DONE
	.comm	___IXGBE_HANG_CHECK_ARMED,4,2   ; @__IXGBE_HANG_CHECK_ARMED
	.comm	_ixgbe_mac_82598EB,8,3          ; @ixgbe_mac_82598EB
	.comm	_IXGBE_LINKS,8,3                ; @IXGBE_LINKS
	.comm	_IXGBE_LINKS_UP,4,2             ; @IXGBE_LINKS_UP
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"Could not enable Tx Queue %d\n"

.subsections_via_symbols
