	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function ath9k_hw_4k_set_board_values
_ath9k_hw_4k_set_board_values:          ## @ath9k_hw_4k_set_board_values
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$88, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rsi, -120(%rbp)                ## 8-byte Spill
	movq	%rdi, %r13
	movq	_AR_PHY_SWITCH_COM@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	movl	112(%rdi), %edi
	callq	_le32_to_cpu
	movq	%r13, %rdi
	movl	%ebx, %esi
	movl	%eax, %edx
	callq	_REG_WRITE
	movq	%r13, %rdi
	movq	%r13, %rsi
	movq	%r13, %rdx
	movl	$23, %ecx
	callq	_ath9k_hw_4k_set_gain
	movl	(%r13), %eax
	cmpl	$3, %eax
	jl	LBB0_4
## %bb.1:
	movl	4(%r13), %r14d
	movl	8(%r13), %r12d
	movq	_AR_PHY_MULTICHAIN_GAIN_CTL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r13, %rdi
	callq	_REG_READ
	movq	_AR_PHY_9285_ANT_DIV_CTL_ALL@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ebx
	notl	%ebx
	andl	%eax, %ebx
	movq	_AR_PHY_9285_ANT_DIV_CTL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	%r14d, %edi
	callq	_SM
	movl	%eax, %r15d
	movq	_AR_PHY_9285_ANT_DIV_ALT_LNACONF@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	%r12d, %edi
	callq	_SM
	orl	%eax, %r15d
	orl	%ebx, %r15d
	sarl	$2, %r12d
	movq	_AR_PHY_9285_ANT_DIV_MAIN_LNACONF@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	%r12d, %edi
	movq	_AR_PHY_MULTICHAIN_GAIN_CTL@GOTPCREL(%rip), %r12
	callq	_SM
	movl	%eax, %ebx
	movl	%r14d, %edi
	sarl	%edi
	movq	_AR_PHY_9285_ANT_DIV_ALT_GAINTB@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_SM
	orl	%eax, %ebx
	movl	%r14d, %edi
	sarl	$2, %edi
	movq	_AR_PHY_9285_ANT_DIV_MAIN_GAINTB@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_SM
	orl	%eax, %ebx
	orl	%r15d, %ebx
	movl	(%r12), %esi
	movq	%r13, %rdi
	movl	%ebx, %edx
	callq	_REG_WRITE
	movl	(%r12), %esi
	movq	%r13, %rdi
	callq	_REG_READ
	movq	_AR_PHY_CCK_DETECT@GOTPCREL(%rip), %r15
	movl	(%r15), %esi
	movq	%r13, %rdi
	callq	_REG_READ
	movq	_AR_PHY_CCK_DETECT_BB_ENABLE_ANT_FAST_DIV@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	movl	%esi, %ebx
	notl	%ebx
	andl	%eax, %ebx
	sarl	$3, %r14d
	movl	%r14d, %edi
	callq	_SM
	orl	%eax, %ebx
	movl	(%r15), %esi
	movq	%r13, %rdi
	movl	%ebx, %edx
	callq	_REG_WRITE
	movl	(%r15), %esi
	movq	%r13, %rdi
	callq	_REG_READ
	movq	_ATH9K_HW_CAP_ANT_DIV_COMB@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	testl	%eax, 128(%r13)
	je	LBB0_3
## %bb.2:
	movl	(%r12), %esi
	movq	%r13, %rdi
	callq	_REG_READ
	movq	_AR_PHY_9285_ANT_DIV_ALT_LNACONF@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	movq	_AR_PHY_9285_ANT_DIV_MAIN_LNACONF@GOTPCREL(%rip), %rcx
	orl	(%rcx), %edx
	movq	_ATH_ANT_DIV_COMB_LNA1@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	movq	_AR_PHY_9285_ANT_DIV_MAIN_LNACONF_S@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shll	%cl, %esi
	notl	%edx
	movq	_AR_PHY_9285_ANT_DIV_ALT_LNACONF_S@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	movq	_ATH_ANT_DIV_COMB_LNA2@GOTPCREL(%rip), %rdi
	movl	(%rdi), %edi
	shll	%cl, %edi
	andl	%eax, %edx
	orl	%edx, %esi
	orl	%esi, %edi
	movq	_AR_PHY_9285_FAST_DIV_BIAS@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	notl	%edx
	andl	%edi, %edx
	movl	(%r12), %esi
	movq	%r13, %rdi
	callq	_REG_WRITE
LBB0_3:
	movl	(%r13), %eax
LBB0_4:
	cmpl	$2, %eax
	jl	LBB0_6
## %bb.5:
	movl	12(%r13), %r12d
	movl	16(%r13), %eax
	movl	%eax, -48(%rbp)                 ## 4-byte Spill
	movl	20(%r13), %eax
	movl	%eax, -52(%rbp)                 ## 4-byte Spill
	movl	24(%r13), %eax
	movl	%eax, -80(%rbp)                 ## 4-byte Spill
	movl	28(%r13), %r15d
	movl	32(%r13), %eax
	movl	%eax, -56(%rbp)                 ## 4-byte Spill
	movl	36(%r13), %eax
	movl	%eax, -88(%rbp)                 ## 4-byte Spill
	movl	40(%r13), %eax
	movl	%eax, -96(%rbp)                 ## 4-byte Spill
	movl	44(%r13), %eax
	movl	%eax, -104(%rbp)                ## 4-byte Spill
	movl	48(%r13), %ebx
	movl	52(%r13), %eax
	movl	%eax, -44(%rbp)                 ## 4-byte Spill
	movl	56(%r13), %eax
	movl	%eax, -60(%rbp)                 ## 4-byte Spill
	movl	60(%r13), %eax
	movl	%eax, -64(%rbp)                 ## 4-byte Spill
	movl	64(%r13), %eax
	movl	%eax, -68(%rbp)                 ## 4-byte Spill
	movl	68(%r13), %eax
	movl	%eax, -72(%rbp)                 ## 4-byte Spill
	jmp	LBB0_9
LBB0_6:
	movl	12(%r13), %r12d
	cmpl	$1, %eax
	jne	LBB0_7
## %bb.8:
	movl	16(%r13), %ecx
	movl	32(%r13), %eax
	movl	%eax, -56(%rbp)                 ## 4-byte Spill
	movl	36(%r13), %ebx
	movl	52(%r13), %eax
	movl	%eax, -44(%rbp)                 ## 4-byte Spill
	movl	56(%r13), %eax
	movl	%ecx, -80(%rbp)                 ## 4-byte Spill
	movl	%ecx, -52(%rbp)                 ## 4-byte Spill
	movl	%ecx, %r15d
	movl	%ecx, -48(%rbp)                 ## 4-byte Spill
	movl	%ebx, -104(%rbp)                ## 4-byte Spill
	movl	%ebx, -96(%rbp)                 ## 4-byte Spill
	movl	%ebx, -88(%rbp)                 ## 4-byte Spill
	movl	%eax, -68(%rbp)                 ## 4-byte Spill
	movl	%eax, -64(%rbp)                 ## 4-byte Spill
	movl	%eax, -72(%rbp)                 ## 4-byte Spill
	movl	%eax, -60(%rbp)                 ## 4-byte Spill
	jmp	LBB0_9
LBB0_7:
	movl	32(%r13), %ebx
	movl	%r12d, %r15d
	movl	%r12d, -80(%rbp)                ## 4-byte Spill
	movl	%r12d, -52(%rbp)                ## 4-byte Spill
	movl	%r12d, -48(%rbp)                ## 4-byte Spill
	movl	%ebx, -104(%rbp)                ## 4-byte Spill
	movl	%ebx, -96(%rbp)                 ## 4-byte Spill
	movl	%ebx, -88(%rbp)                 ## 4-byte Spill
	movl	%ebx, -56(%rbp)                 ## 4-byte Spill
	movl	%ebx, -72(%rbp)                 ## 4-byte Spill
	movl	%ebx, -68(%rbp)                 ## 4-byte Spill
	movl	%ebx, -64(%rbp)                 ## 4-byte Spill
	movl	%ebx, -60(%rbp)                 ## 4-byte Spill
	movl	%ebx, -44(%rbp)                 ## 4-byte Spill
LBB0_9:
	movq	%r13, %rdi
	callq	_ENABLE_REG_RMW_BUFFER
	movq	%r13, %rdi
	callq	_AR_SREV_9271
	movq	_AR9285_AN_RF2G3@GOTPCREL(%rip), %r14
	movl	(%r14), %esi
	testq	%rax, %rax
	je	LBB0_11
## %bb.10:
	movq	_AR9271_AN_RF2G3_OB_cck@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	_AR9271_AN_RF2G3_OB_cck_S@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movq	%r13, %rdi
	movl	%r12d, %r8d
	callq	_ath9k_hw_analog_shift_rmw
	movq	_AR9271_AN_RF2G4_DB_2_S@GOTPCREL(%rip), %rax
	movq	%rax, -104(%rbp)                ## 8-byte Spill
	movq	_AR9271_AN_RF2G4_DB_2@GOTPCREL(%rip), %rax
	movq	%rax, -96(%rbp)                 ## 8-byte Spill
	movq	_AR9271_AN_RF2G3_DB_1_S@GOTPCREL(%rip), %rax
	movq	%rax, -88(%rbp)                 ## 8-byte Spill
	movq	_AR9271_AN_RF2G3_DB_1@GOTPCREL(%rip), %rax
	movq	%rax, -80(%rbp)                 ## 8-byte Spill
	movq	_AR9271_AN_RF2G3_OB_qam_S@GOTPCREL(%rip), %rax
	movq	%rax, -112(%rbp)                ## 8-byte Spill
	movq	_AR9271_AN_RF2G3_OB_qam@GOTPCREL(%rip), %r15
	movq	_AR9271_AN_RF2G3_OB_psk_S@GOTPCREL(%rip), %rax
	movq	_AR9271_AN_RF2G3_OB_psk@GOTPCREL(%rip), %rcx
	movl	-56(%rbp), %r12d                ## 4-byte Reload
	movl	-52(%rbp), %ebx                 ## 4-byte Reload
	movl	-48(%rbp), %r8d                 ## 4-byte Reload
	jmp	LBB0_12
LBB0_11:
	movq	_AR9285_AN_RF2G3_OB_0@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	_AR9285_AN_RF2G3_OB_0_S@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movq	%r13, %rdi
	movl	%r12d, %r8d
	callq	_ath9k_hw_analog_shift_rmw
	movq	_AR9285_AN_RF2G3@GOTPCREL(%rip), %r14
	movl	(%r14), %esi
	movq	_AR9285_AN_RF2G3_OB_1@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	_AR9285_AN_RF2G3_OB_1_S@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movq	%r13, %rdi
	movl	-48(%rbp), %r8d                 ## 4-byte Reload
	callq	_ath9k_hw_analog_shift_rmw
	movl	(%r14), %esi
	movq	_AR9285_AN_RF2G3_OB_2@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	_AR9285_AN_RF2G3_OB_2_S@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movq	%r13, %rdi
	movl	-52(%rbp), %r8d                 ## 4-byte Reload
	callq	_ath9k_hw_analog_shift_rmw
	movl	(%r14), %esi
	movq	_AR9285_AN_RF2G3_OB_3@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	_AR9285_AN_RF2G3_OB_3_S@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movq	%r13, %rdi
	movl	-80(%rbp), %r8d                 ## 4-byte Reload
	callq	_ath9k_hw_analog_shift_rmw
	movl	(%r14), %esi
	movq	_AR9285_AN_RF2G3_OB_4@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	_AR9285_AN_RF2G3_OB_4_S@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movq	%r13, %rdi
	movl	%r15d, %r8d
	callq	_ath9k_hw_analog_shift_rmw
	movl	(%r14), %esi
	movq	_AR9285_AN_RF2G3_DB1_0@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	_AR9285_AN_RF2G3_DB1_0_S@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movq	%r13, %rdi
	movl	-56(%rbp), %r8d                 ## 4-byte Reload
	callq	_ath9k_hw_analog_shift_rmw
	movl	(%r14), %esi
	movq	_AR9285_AN_RF2G3_DB1_1@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	_AR9285_AN_RF2G3_DB1_1_S@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movq	%r13, %rdi
	movl	-88(%rbp), %r8d                 ## 4-byte Reload
	callq	_ath9k_hw_analog_shift_rmw
	movl	(%r14), %esi
	movq	_AR9285_AN_RF2G3_DB1_2@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	_AR9285_AN_RF2G3_DB1_2_S@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movq	%r13, %rdi
	movl	-96(%rbp), %r8d                 ## 4-byte Reload
	callq	_ath9k_hw_analog_shift_rmw
	movq	_AR9285_AN_RF2G4@GOTPCREL(%rip), %r14
	movl	(%r14), %esi
	movq	_AR9285_AN_RF2G4_DB1_3@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	_AR9285_AN_RF2G4_DB1_3_S@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movq	%r13, %rdi
	movl	-104(%rbp), %r8d                ## 4-byte Reload
	callq	_ath9k_hw_analog_shift_rmw
	movl	(%r14), %esi
	movq	_AR9285_AN_RF2G4_DB1_4@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	_AR9285_AN_RF2G4_DB1_4_S@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movq	%r13, %rdi
	movl	%ebx, %r8d
	callq	_ath9k_hw_analog_shift_rmw
	movl	(%r14), %esi
	movq	_AR9285_AN_RF2G4_DB2_0@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	_AR9285_AN_RF2G4_DB2_0_S@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movq	%r13, %rdi
	movl	-44(%rbp), %r8d                 ## 4-byte Reload
	callq	_ath9k_hw_analog_shift_rmw
	movq	_AR9285_AN_RF2G4_DB2_4_S@GOTPCREL(%rip), %rax
	movq	%rax, -104(%rbp)                ## 8-byte Spill
	movq	_AR9285_AN_RF2G4_DB2_4@GOTPCREL(%rip), %rax
	movq	%rax, -96(%rbp)                 ## 8-byte Spill
	movq	_AR9285_AN_RF2G4_DB2_3_S@GOTPCREL(%rip), %rax
	movq	%rax, -88(%rbp)                 ## 8-byte Spill
	movq	_AR9285_AN_RF2G4_DB2_3@GOTPCREL(%rip), %rax
	movq	%rax, -80(%rbp)                 ## 8-byte Spill
	movq	_AR9285_AN_RF2G4_DB2_2_S@GOTPCREL(%rip), %rax
	movq	%rax, -112(%rbp)                ## 8-byte Spill
	movq	_AR9285_AN_RF2G4_DB2_2@GOTPCREL(%rip), %r15
	movq	_AR9285_AN_RF2G4_DB2_1_S@GOTPCREL(%rip), %rax
	movq	_AR9285_AN_RF2G4_DB2_1@GOTPCREL(%rip), %rcx
	movl	-60(%rbp), %r8d                 ## 4-byte Reload
	movl	-64(%rbp), %ebx                 ## 4-byte Reload
	movl	-68(%rbp), %r12d                ## 4-byte Reload
	movl	-72(%rbp), %edx                 ## 4-byte Reload
	movl	%edx, -44(%rbp)                 ## 4-byte Spill
LBB0_12:
	movl	(%r14), %esi
	movl	(%rcx), %edx
	movl	(%rax), %ecx
	movq	%r13, %rdi
	callq	_ath9k_hw_analog_shift_rmw
	movl	(%r14), %esi
	movl	(%r15), %edx
	movq	-112(%rbp), %rax                ## 8-byte Reload
	movl	(%rax), %ecx
	movq	%r13, %rdi
	movl	%ebx, %r8d
	callq	_ath9k_hw_analog_shift_rmw
	movl	(%r14), %esi
	movq	-80(%rbp), %rax                 ## 8-byte Reload
	movl	(%rax), %edx
	movq	-88(%rbp), %rax                 ## 8-byte Reload
	movl	(%rax), %ecx
	movq	%r13, %rdi
	movl	%r12d, %r8d
	callq	_ath9k_hw_analog_shift_rmw
	movq	_AR9285_AN_RF2G4@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	-96(%rbp), %rax                 ## 8-byte Reload
	movl	(%rax), %edx
	movq	-104(%rbp), %rax                ## 8-byte Reload
	movl	(%rax), %ecx
	movq	%r13, %rdi
	movl	-44(%rbp), %r8d                 ## 4-byte Reload
	callq	_ath9k_hw_analog_shift_rmw
	movq	%r13, %rdi
	callq	_REG_RMW_BUFFER_FLUSH
	movq	%r13, %rdi
	callq	_ENABLE_REG_RMW_BUFFER
	movq	_AR_PHY_SETTLING@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_AR_PHY_SETTLING_SWITCH@GOTPCREL(%rip), %r12
	movl	(%r12), %edx
	movl	108(%r13), %ecx
	movq	%r13, %rdi
	callq	_REG_RMW_FIELD
	movq	_AR_PHY_DESIRED_SZ@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_AR_PHY_DESIRED_SZ_ADC@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movl	104(%r13), %ecx
	movq	%r13, %rdi
	callq	_REG_RMW_FIELD
	movq	_AR_PHY_RF_CTL4@GOTPCREL(%rip), %rax
	movl	(%rax), %r14d
	movl	72(%r13), %edi
	movq	_AR_PHY_RF_CTL4_TX_END_XPAA_OFF@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_SM
	movl	%eax, %r15d
	movl	72(%r13), %edi
	movq	_AR_PHY_RF_CTL4_TX_END_XPAB_OFF@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_SM
	orl	%eax, %r15d
	movl	76(%r13), %edi
	movq	_AR_PHY_RF_CTL4_FRAME_XPAA_ON@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_SM
	movl	%eax, %ebx
	movl	76(%r13), %edi
	movq	_AR_PHY_RF_CTL4_FRAME_XPAB_ON@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_SM
	orl	%eax, %ebx
	orl	%r15d, %ebx
	movq	%r13, %rdi
	movl	%r14d, %esi
	movl	%ebx, %edx
	xorl	%ecx, %ecx
	callq	_REG_RMW
	movq	_AR_PHY_RF_CTL3@GOTPCREL(%rip), %r14
	movl	(%r14), %esi
	movq	_AR_PHY_TX_END_TO_A2_RX_ON@GOTPCREL(%rip), %rbx
	movl	(%rbx), %edx
	movl	100(%r13), %ecx
	movq	%r13, %rdi
	callq	_REG_RMW_FIELD
	movq	%r13, %rdi
	callq	_AR_SREV_9271_10
	testq	%rax, %rax
	je	LBB0_14
## %bb.13:
	movl	(%r14), %esi
	movl	(%rbx), %edx
	movl	100(%r13), %ecx
	movq	%r13, %rdi
	callq	_REG_RMW_FIELD
LBB0_14:
	movq	_AR_PHY_CCA@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_AR9280_PHY_CCA_THRESH62@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movl	96(%r13), %ecx
	movq	%r13, %rdi
	callq	_REG_RMW_FIELD
	movq	_AR_PHY_EXT_CCA0@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_AR_PHY_EXT_CCA0_THRESH62@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movl	96(%r13), %ecx
	movq	%r13, %rdi
	callq	_REG_RMW_FIELD
	movq	%r13, %rdi
	callq	_ath9k_hw_4k_get_eeprom_rev
	movq	_AR5416_EEP_MINOR_VER_2@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jl	LBB0_16
## %bb.15:
	movq	_AR_PHY_RF_CTL2@GOTPCREL(%rip), %rbx
	movl	(%rbx), %esi
	movq	_AR_PHY_TX_END_DATA_START@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movl	92(%r13), %ecx
	movq	%r13, %rdi
	callq	_REG_RMW_FIELD
	movl	(%rbx), %esi
	movq	_AR_PHY_TX_END_PA_ON@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movl	88(%r13), %ecx
	movq	%r13, %rdi
	callq	_REG_RMW_FIELD
LBB0_16:
	movq	%r13, %rdi
	callq	_ath9k_hw_4k_get_eeprom_rev
	movq	_AR5416_EEP_MINOR_VER_3@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jl	LBB0_19
## %bb.17:
	movq	-120(%rbp), %rdi                ## 8-byte Reload
	callq	_IS_CHAN_HT40
	testq	%rax, %rax
	je	LBB0_19
## %bb.18:
	movq	_AR_PHY_SETTLING@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	(%r12), %edx
	movl	84(%r13), %ecx
	movq	%r13, %rdi
	callq	_REG_RMW_FIELD
LBB0_19:
	movq	%r13, %rdi
	callq	_REG_RMW_BUFFER_FLUSH
	cmpq	$0, 120(%r13)
	jne	LBB0_21
## %bb.20:
	movq	_EEP_4K_BB_DESIRED_SCALE_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %r14d
	andl	80(%r13), %r14d
	je	LBB0_21
## %bb.22:
	xorl	%edi, %edi
	callq	_BIT
	movl	%eax, %r15d
	movl	$5, %edi
	callq	_BIT
	movl	%eax, %r12d
	orl	%r15d, %r12d
	movl	$10, %edi
	callq	_BIT
	movl	%eax, %r15d
	movl	$15, %edi
	callq	_BIT
	movl	%eax, %ebx
	orl	%r15d, %ebx
	orl	%r12d, %ebx
	movl	$20, %edi
	callq	_BIT
	movl	%eax, %r15d
	movl	$25, %edi
	callq	_BIT
	orl	%r15d, %eax
	orl	%ebx, %eax
	movl	%eax, %ebx
	shll	$5, %ebx
	subl	%eax, %ebx
	movl	%eax, %r15d
	imull	%r14d, %r15d
	movq	%r13, %rdi
	callq	_ENABLE_REG_RMW_BUFFER
	movq	_AR_PHY_TX_PWRCTRL8@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r13, %rdi
	movl	%r15d, %edx
	movl	%ebx, %ecx
	callq	_REG_RMW
	movq	_AR_PHY_TX_PWRCTRL10@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r13, %rdi
	movl	%r15d, %edx
	movl	%ebx, %ecx
	callq	_REG_RMW
	movq	_AR_PHY_CH0_TX_PWRCTRL12@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r13, %rdi
	movl	%r15d, %edx
	movl	%ebx, %ecx
	callq	_REG_RMW
	xorl	%edi, %edi
	callq	_BIT
	movl	%eax, %r15d
	movl	$5, %edi
	callq	_BIT
	movl	%eax, %ebx
	orl	%r15d, %ebx
	movl	$15, %edi
	callq	_BIT
	orl	%ebx, %eax
	movl	%eax, %ecx
	shll	$5, %ecx
	subl	%eax, %ecx
	movl	%eax, %edx
	imull	%r14d, %edx
	movq	_AR_PHY_TX_PWRCTRL9@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r13, %rdi
	callq	_REG_RMW
	xorl	%edi, %edi
	callq	_BIT
	movl	%eax, %ebx
	movl	$5, %edi
	callq	_BIT
	orl	%ebx, %eax
	imull	%eax, %r14d
	movl	%eax, %ebx
	shll	$5, %ebx
	subl	%eax, %ebx
	movq	_AR_PHY_CH0_TX_PWRCTRL11@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r13, %rdi
	movl	%r14d, %edx
	movl	%ebx, %ecx
	callq	_REG_RMW
	movq	_AR_PHY_CH0_TX_PWRCTRL13@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r13, %rdi
	movl	%r14d, %edx
	movl	%ebx, %ecx
	callq	_REG_RMW
	movq	%r13, %rdi
	addq	$88, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_REG_RMW_BUFFER_FLUSH           ## TAILCALL
LBB0_21:
	addq	$88, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_AR_PHY_SWITCH_COM,4,2          ## @AR_PHY_SWITCH_COM
	.comm	_AR_PHY_MULTICHAIN_GAIN_CTL,4,2 ## @AR_PHY_MULTICHAIN_GAIN_CTL
	.comm	_AR_PHY_9285_ANT_DIV_CTL_ALL,4,2 ## @AR_PHY_9285_ANT_DIV_CTL_ALL
	.comm	_AR_PHY_9285_ANT_DIV_CTL,4,2    ## @AR_PHY_9285_ANT_DIV_CTL
	.comm	_AR_PHY_9285_ANT_DIV_ALT_LNACONF,4,2 ## @AR_PHY_9285_ANT_DIV_ALT_LNACONF
	.comm	_AR_PHY_9285_ANT_DIV_MAIN_LNACONF,4,2 ## @AR_PHY_9285_ANT_DIV_MAIN_LNACONF
	.comm	_AR_PHY_9285_ANT_DIV_ALT_GAINTB,4,2 ## @AR_PHY_9285_ANT_DIV_ALT_GAINTB
	.comm	_AR_PHY_9285_ANT_DIV_MAIN_GAINTB,4,2 ## @AR_PHY_9285_ANT_DIV_MAIN_GAINTB
	.comm	_AR_PHY_CCK_DETECT,4,2          ## @AR_PHY_CCK_DETECT
	.comm	_AR_PHY_CCK_DETECT_BB_ENABLE_ANT_FAST_DIV,4,2 ## @AR_PHY_CCK_DETECT_BB_ENABLE_ANT_FAST_DIV
	.comm	_ATH9K_HW_CAP_ANT_DIV_COMB,4,2  ## @ATH9K_HW_CAP_ANT_DIV_COMB
	.comm	_ATH_ANT_DIV_COMB_LNA1,4,2      ## @ATH_ANT_DIV_COMB_LNA1
	.comm	_AR_PHY_9285_ANT_DIV_MAIN_LNACONF_S,4,2 ## @AR_PHY_9285_ANT_DIV_MAIN_LNACONF_S
	.comm	_ATH_ANT_DIV_COMB_LNA2,4,2      ## @ATH_ANT_DIV_COMB_LNA2
	.comm	_AR_PHY_9285_ANT_DIV_ALT_LNACONF_S,4,2 ## @AR_PHY_9285_ANT_DIV_ALT_LNACONF_S
	.comm	_AR_PHY_9285_FAST_DIV_BIAS,4,2  ## @AR_PHY_9285_FAST_DIV_BIAS
	.comm	_AR_PHY_9285_FAST_DIV_BIAS_S,4,2 ## @AR_PHY_9285_FAST_DIV_BIAS_S
	.comm	_AR9285_AN_RF2G3,4,2            ## @AR9285_AN_RF2G3
	.comm	_AR9271_AN_RF2G3_OB_cck,4,2     ## @AR9271_AN_RF2G3_OB_cck
	.comm	_AR9271_AN_RF2G3_OB_cck_S,4,2   ## @AR9271_AN_RF2G3_OB_cck_S
	.comm	_AR9271_AN_RF2G3_OB_psk,4,2     ## @AR9271_AN_RF2G3_OB_psk
	.comm	_AR9271_AN_RF2G3_OB_psk_S,4,2   ## @AR9271_AN_RF2G3_OB_psk_S
	.comm	_AR9271_AN_RF2G3_OB_qam,4,2     ## @AR9271_AN_RF2G3_OB_qam
	.comm	_AR9271_AN_RF2G3_OB_qam_S,4,2   ## @AR9271_AN_RF2G3_OB_qam_S
	.comm	_AR9271_AN_RF2G3_DB_1,4,2       ## @AR9271_AN_RF2G3_DB_1
	.comm	_AR9271_AN_RF2G3_DB_1_S,4,2     ## @AR9271_AN_RF2G3_DB_1_S
	.comm	_AR9285_AN_RF2G4,4,2            ## @AR9285_AN_RF2G4
	.comm	_AR9271_AN_RF2G4_DB_2,4,2       ## @AR9271_AN_RF2G4_DB_2
	.comm	_AR9271_AN_RF2G4_DB_2_S,4,2     ## @AR9271_AN_RF2G4_DB_2_S
	.comm	_AR9285_AN_RF2G3_OB_0,4,2       ## @AR9285_AN_RF2G3_OB_0
	.comm	_AR9285_AN_RF2G3_OB_0_S,4,2     ## @AR9285_AN_RF2G3_OB_0_S
	.comm	_AR9285_AN_RF2G3_OB_1,4,2       ## @AR9285_AN_RF2G3_OB_1
	.comm	_AR9285_AN_RF2G3_OB_1_S,4,2     ## @AR9285_AN_RF2G3_OB_1_S
	.comm	_AR9285_AN_RF2G3_OB_2,4,2       ## @AR9285_AN_RF2G3_OB_2
	.comm	_AR9285_AN_RF2G3_OB_2_S,4,2     ## @AR9285_AN_RF2G3_OB_2_S
	.comm	_AR9285_AN_RF2G3_OB_3,4,2       ## @AR9285_AN_RF2G3_OB_3
	.comm	_AR9285_AN_RF2G3_OB_3_S,4,2     ## @AR9285_AN_RF2G3_OB_3_S
	.comm	_AR9285_AN_RF2G3_OB_4,4,2       ## @AR9285_AN_RF2G3_OB_4
	.comm	_AR9285_AN_RF2G3_OB_4_S,4,2     ## @AR9285_AN_RF2G3_OB_4_S
	.comm	_AR9285_AN_RF2G3_DB1_0,4,2      ## @AR9285_AN_RF2G3_DB1_0
	.comm	_AR9285_AN_RF2G3_DB1_0_S,4,2    ## @AR9285_AN_RF2G3_DB1_0_S
	.comm	_AR9285_AN_RF2G3_DB1_1,4,2      ## @AR9285_AN_RF2G3_DB1_1
	.comm	_AR9285_AN_RF2G3_DB1_1_S,4,2    ## @AR9285_AN_RF2G3_DB1_1_S
	.comm	_AR9285_AN_RF2G3_DB1_2,4,2      ## @AR9285_AN_RF2G3_DB1_2
	.comm	_AR9285_AN_RF2G3_DB1_2_S,4,2    ## @AR9285_AN_RF2G3_DB1_2_S
	.comm	_AR9285_AN_RF2G4_DB1_3,4,2      ## @AR9285_AN_RF2G4_DB1_3
	.comm	_AR9285_AN_RF2G4_DB1_3_S,4,2    ## @AR9285_AN_RF2G4_DB1_3_S
	.comm	_AR9285_AN_RF2G4_DB1_4,4,2      ## @AR9285_AN_RF2G4_DB1_4
	.comm	_AR9285_AN_RF2G4_DB1_4_S,4,2    ## @AR9285_AN_RF2G4_DB1_4_S
	.comm	_AR9285_AN_RF2G4_DB2_0,4,2      ## @AR9285_AN_RF2G4_DB2_0
	.comm	_AR9285_AN_RF2G4_DB2_0_S,4,2    ## @AR9285_AN_RF2G4_DB2_0_S
	.comm	_AR9285_AN_RF2G4_DB2_1,4,2      ## @AR9285_AN_RF2G4_DB2_1
	.comm	_AR9285_AN_RF2G4_DB2_1_S,4,2    ## @AR9285_AN_RF2G4_DB2_1_S
	.comm	_AR9285_AN_RF2G4_DB2_2,4,2      ## @AR9285_AN_RF2G4_DB2_2
	.comm	_AR9285_AN_RF2G4_DB2_2_S,4,2    ## @AR9285_AN_RF2G4_DB2_2_S
	.comm	_AR9285_AN_RF2G4_DB2_3,4,2      ## @AR9285_AN_RF2G4_DB2_3
	.comm	_AR9285_AN_RF2G4_DB2_3_S,4,2    ## @AR9285_AN_RF2G4_DB2_3_S
	.comm	_AR9285_AN_RF2G4_DB2_4,4,2      ## @AR9285_AN_RF2G4_DB2_4
	.comm	_AR9285_AN_RF2G4_DB2_4_S,4,2    ## @AR9285_AN_RF2G4_DB2_4_S
	.comm	_AR_PHY_SETTLING,4,2            ## @AR_PHY_SETTLING
	.comm	_AR_PHY_SETTLING_SWITCH,4,2     ## @AR_PHY_SETTLING_SWITCH
	.comm	_AR_PHY_DESIRED_SZ,4,2          ## @AR_PHY_DESIRED_SZ
	.comm	_AR_PHY_DESIRED_SZ_ADC,4,2      ## @AR_PHY_DESIRED_SZ_ADC
	.comm	_AR_PHY_RF_CTL4,4,2             ## @AR_PHY_RF_CTL4
	.comm	_AR_PHY_RF_CTL4_TX_END_XPAA_OFF,4,2 ## @AR_PHY_RF_CTL4_TX_END_XPAA_OFF
	.comm	_AR_PHY_RF_CTL4_TX_END_XPAB_OFF,4,2 ## @AR_PHY_RF_CTL4_TX_END_XPAB_OFF
	.comm	_AR_PHY_RF_CTL4_FRAME_XPAA_ON,4,2 ## @AR_PHY_RF_CTL4_FRAME_XPAA_ON
	.comm	_AR_PHY_RF_CTL4_FRAME_XPAB_ON,4,2 ## @AR_PHY_RF_CTL4_FRAME_XPAB_ON
	.comm	_AR_PHY_RF_CTL3,4,2             ## @AR_PHY_RF_CTL3
	.comm	_AR_PHY_TX_END_TO_A2_RX_ON,4,2  ## @AR_PHY_TX_END_TO_A2_RX_ON
	.comm	_AR_PHY_CCA,4,2                 ## @AR_PHY_CCA
	.comm	_AR9280_PHY_CCA_THRESH62,4,2    ## @AR9280_PHY_CCA_THRESH62
	.comm	_AR_PHY_EXT_CCA0,4,2            ## @AR_PHY_EXT_CCA0
	.comm	_AR_PHY_EXT_CCA0_THRESH62,4,2   ## @AR_PHY_EXT_CCA0_THRESH62
	.comm	_AR5416_EEP_MINOR_VER_2,8,3     ## @AR5416_EEP_MINOR_VER_2
	.comm	_AR_PHY_RF_CTL2,4,2             ## @AR_PHY_RF_CTL2
	.comm	_AR_PHY_TX_END_DATA_START,4,2   ## @AR_PHY_TX_END_DATA_START
	.comm	_AR_PHY_TX_END_PA_ON,4,2        ## @AR_PHY_TX_END_PA_ON
	.comm	_AR5416_EEP_MINOR_VER_3,8,3     ## @AR5416_EEP_MINOR_VER_3
	.comm	_EEP_4K_BB_DESIRED_SCALE_MASK,4,2 ## @EEP_4K_BB_DESIRED_SCALE_MASK
	.comm	_AR_PHY_TX_PWRCTRL8,4,2         ## @AR_PHY_TX_PWRCTRL8
	.comm	_AR_PHY_TX_PWRCTRL10,4,2        ## @AR_PHY_TX_PWRCTRL10
	.comm	_AR_PHY_CH0_TX_PWRCTRL12,4,2    ## @AR_PHY_CH0_TX_PWRCTRL12
	.comm	_AR_PHY_TX_PWRCTRL9,4,2         ## @AR_PHY_TX_PWRCTRL9
	.comm	_AR_PHY_CH0_TX_PWRCTRL11,4,2    ## @AR_PHY_CH0_TX_PWRCTRL11
	.comm	_AR_PHY_CH0_TX_PWRCTRL13,4,2    ## @AR_PHY_CH0_TX_PWRCTRL13
	.no_dead_strip	_ath9k_hw_4k_set_board_values
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function ath9k_hw_4k_set_board_values
_ath9k_hw_4k_set_board_values:          ; @ath9k_hw_4k_set_board_values
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #144
	.cfi_def_cfa_offset 144
	stp	x28, x27, [sp, #48]             ; 16-byte Folded Spill
	stp	x26, x25, [sp, #64]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #80]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #96]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #112]            ; 16-byte Folded Spill
	stp	x29, x30, [sp, #128]            ; 16-byte Folded Spill
	add	x29, sp, #128
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	str	x1, [sp, #16]                   ; 8-byte Folded Spill
	mov	x19, x0
Lloh0:
	adrp	x8, _AR_PHY_SWITCH_COM@GOTPAGE
Lloh1:
	ldr	x8, [x8, _AR_PHY_SWITCH_COM@GOTPAGEOFF]
Lloh2:
	ldr	w20, [x8]
	ldr	w0, [x0, #112]
	bl	_le32_to_cpu
	mov	x2, x0
	mov	x0, x19
	mov	x1, x20
	bl	_REG_WRITE
	mov	x0, x19
	mov	x1, x19
	mov	x2, x19
	mov	w3, #23
	bl	_ath9k_hw_4k_set_gain
	ldr	w8, [x19]
	cmp	w8, #2
	b.le	LBB0_4
; %bb.1:
	ldp	w20, w21, [x19, #4]
Lloh3:
	adrp	x22, _AR_PHY_MULTICHAIN_GAIN_CTL@GOTPAGE
Lloh4:
	ldr	x22, [x22, _AR_PHY_MULTICHAIN_GAIN_CTL@GOTPAGEOFF]
	ldr	w1, [x22]
	mov	x0, x19
	bl	_REG_READ
Lloh5:
	adrp	x8, _AR_PHY_9285_ANT_DIV_CTL_ALL@GOTPAGE
Lloh6:
	ldr	x8, [x8, _AR_PHY_9285_ANT_DIV_CTL_ALL@GOTPAGEOFF]
Lloh7:
	ldr	w8, [x8]
	bic	w23, w0, w8
Lloh8:
	adrp	x8, _AR_PHY_9285_ANT_DIV_CTL@GOTPAGE
Lloh9:
	ldr	x8, [x8, _AR_PHY_9285_ANT_DIV_CTL@GOTPAGEOFF]
Lloh10:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_SM
	orr	w24, w0, w23
Lloh11:
	adrp	x23, _AR_PHY_9285_ANT_DIV_ALT_LNACONF@GOTPAGE
Lloh12:
	ldr	x23, [x23, _AR_PHY_9285_ANT_DIV_ALT_LNACONF@GOTPAGEOFF]
	ldr	w1, [x23]
	mov	x0, x21
	bl	_SM
	orr	w24, w24, w0
	asr	w0, w21, #2
Lloh13:
	adrp	x21, _AR_PHY_9285_ANT_DIV_MAIN_LNACONF@GOTPAGE
Lloh14:
	ldr	x21, [x21, _AR_PHY_9285_ANT_DIV_MAIN_LNACONF@GOTPAGEOFF]
	ldr	w1, [x21]
	bl	_SM
	orr	w24, w24, w0
	asr	w0, w20, #1
Lloh15:
	adrp	x8, _AR_PHY_9285_ANT_DIV_ALT_GAINTB@GOTPAGE
Lloh16:
	ldr	x8, [x8, _AR_PHY_9285_ANT_DIV_ALT_GAINTB@GOTPAGEOFF]
Lloh17:
	ldr	w1, [x8]
	bl	_SM
	orr	w24, w24, w0
	asr	w0, w20, #2
Lloh18:
	adrp	x8, _AR_PHY_9285_ANT_DIV_MAIN_GAINTB@GOTPAGE
Lloh19:
	ldr	x8, [x8, _AR_PHY_9285_ANT_DIV_MAIN_GAINTB@GOTPAGEOFF]
Lloh20:
	ldr	w1, [x8]
	bl	_SM
	orr	w2, w24, w0
	ldr	w1, [x22]
	mov	x0, x19
	bl	_REG_WRITE
	ldr	w1, [x22]
	mov	x0, x19
	bl	_REG_READ
Lloh21:
	adrp	x24, _AR_PHY_CCK_DETECT@GOTPAGE
Lloh22:
	ldr	x24, [x24, _AR_PHY_CCK_DETECT@GOTPAGEOFF]
	ldr	w1, [x24]
	mov	x0, x19
	bl	_REG_READ
Lloh23:
	adrp	x8, _AR_PHY_CCK_DETECT_BB_ENABLE_ANT_FAST_DIV@GOTPAGE
Lloh24:
	ldr	x8, [x8, _AR_PHY_CCK_DETECT_BB_ENABLE_ANT_FAST_DIV@GOTPAGEOFF]
Lloh25:
	ldr	w1, [x8]
	bic	w25, w0, w1
	asr	w0, w20, #3
	bl	_SM
	orr	w2, w25, w0
	ldr	w1, [x24]
	mov	x0, x19
	bl	_REG_WRITE
	ldr	w1, [x24]
	mov	x0, x19
	bl	_REG_READ
	ldr	w8, [x19, #128]
Lloh26:
	adrp	x9, _ATH9K_HW_CAP_ANT_DIV_COMB@GOTPAGE
Lloh27:
	ldr	x9, [x9, _ATH9K_HW_CAP_ANT_DIV_COMB@GOTPAGEOFF]
Lloh28:
	ldr	w9, [x9]
	tst	w9, w8
	b.eq	LBB0_3
; %bb.2:
	ldr	w1, [x22]
	mov	x0, x19
	bl	_REG_READ
	ldr	w8, [x21]
	ldr	w9, [x23]
	orr	w8, w9, w8
	bic	w8, w0, w8
Lloh29:
	adrp	x9, _ATH_ANT_DIV_COMB_LNA1@GOTPAGE
Lloh30:
	ldr	x9, [x9, _ATH_ANT_DIV_COMB_LNA1@GOTPAGEOFF]
Lloh31:
	ldr	w9, [x9]
Lloh32:
	adrp	x10, _AR_PHY_9285_ANT_DIV_MAIN_LNACONF_S@GOTPAGE
Lloh33:
	ldr	x10, [x10, _AR_PHY_9285_ANT_DIV_MAIN_LNACONF_S@GOTPAGEOFF]
Lloh34:
	ldr	w10, [x10]
	lsl	w9, w9, w10
Lloh35:
	adrp	x10, _ATH_ANT_DIV_COMB_LNA2@GOTPAGE
Lloh36:
	ldr	x10, [x10, _ATH_ANT_DIV_COMB_LNA2@GOTPAGEOFF]
	orr	w8, w9, w8
Lloh37:
	ldr	w9, [x10]
Lloh38:
	adrp	x10, _AR_PHY_9285_ANT_DIV_ALT_LNACONF_S@GOTPAGE
Lloh39:
	ldr	x10, [x10, _AR_PHY_9285_ANT_DIV_ALT_LNACONF_S@GOTPAGEOFF]
Lloh40:
	ldr	w10, [x10]
	lsl	w9, w9, w10
	orr	w8, w8, w9
Lloh41:
	adrp	x9, _AR_PHY_9285_FAST_DIV_BIAS@GOTPAGE
Lloh42:
	ldr	x9, [x9, _AR_PHY_9285_FAST_DIV_BIAS@GOTPAGEOFF]
Lloh43:
	ldr	w9, [x9]
	bic	w2, w8, w9
	ldr	w1, [x22]
	mov	x0, x19
	bl	_REG_WRITE
LBB0_3:
	ldr	w8, [x19]
LBB0_4:
	cmp	w8, #2
	b.lt	LBB0_6
; %bb.5:
	ldp	w28, w9, [x19, #12]
	ldr	w8, [x19, #20]
	stp	w9, w8, [sp, #40]               ; 8-byte Folded Spill
	ldp	w9, w26, [x19, #24]
	ldp	w22, w8, [x19, #32]
	stp	w9, w8, [sp]                    ; 8-byte Folded Spill
	ldr	w8, [x19, #40]
	str	w8, [sp, #24]                   ; 4-byte Folded Spill
	ldp	w8, w23, [x19, #44]
	str	w8, [sp, #32]                   ; 4-byte Folded Spill
	ldp	w20, w9, [x19, #52]
	ldp	w8, w25, [x19, #60]
	stp	w9, w8, [sp, #8]                ; 8-byte Folded Spill
	ldr	w24, [x19, #68]
	b	LBB0_9
LBB0_6:
	ldr	w28, [x19, #12]
	cmp	w8, #1
	b.ne	LBB0_8
; %bb.7:
	ldr	w26, [x19, #16]
	ldp	w22, w23, [x19, #32]
	stp	w26, w23, [sp]                  ; 8-byte Folded Spill
	stp	w26, w26, [sp, #40]             ; 8-byte Folded Spill
	str	w23, [sp, #32]                  ; 4-byte Folded Spill
	str	w23, [sp, #24]                  ; 4-byte Folded Spill
	ldp	w20, w24, [x19, #52]
	mov	x25, x24
	stp	w24, w24, [sp, #8]              ; 8-byte Folded Spill
	b	LBB0_9
LBB0_8:
	mov	x26, x28
	ldr	w23, [x19, #32]
	stp	w28, w28, [sp, #40]             ; 8-byte Folded Spill
	str	w23, [sp, #32]                  ; 4-byte Folded Spill
	str	w23, [sp, #24]                  ; 4-byte Folded Spill
	stp	w28, w23, [sp]                  ; 8-byte Folded Spill
	mov	x22, x23
	mov	x24, x23
	mov	x25, x23
	stp	w23, w23, [sp, #8]              ; 8-byte Folded Spill
	mov	x20, x23
LBB0_9:
	mov	x0, x19
	bl	_ENABLE_REG_RMW_BUFFER
	mov	x0, x19
	bl	_AR_SREV_9271
Lloh44:
	adrp	x27, _AR9285_AN_RF2G3@GOTPAGE
Lloh45:
	ldr	x27, [x27, _AR9285_AN_RF2G3@GOTPAGEOFF]
	ldr	w1, [x27]
Lloh46:
	adrp	x21, _AR9285_AN_RF2G4@GOTPAGE
Lloh47:
	ldr	x21, [x21, _AR9285_AN_RF2G4@GOTPAGEOFF]
	cbz	x0, LBB0_11
; %bb.10:
Lloh48:
	adrp	x8, _AR9271_AN_RF2G3_OB_cck@GOTPAGE
Lloh49:
	ldr	x8, [x8, _AR9271_AN_RF2G3_OB_cck@GOTPAGEOFF]
Lloh50:
	ldr	w2, [x8]
Lloh51:
	adrp	x8, _AR9271_AN_RF2G3_OB_cck_S@GOTPAGE
Lloh52:
	ldr	x8, [x8, _AR9271_AN_RF2G3_OB_cck_S@GOTPAGEOFF]
Lloh53:
	ldr	w3, [x8]
	mov	x0, x19
	mov	x4, x28
	bl	_ath9k_hw_analog_shift_rmw
Lloh54:
	adrp	x8, _AR9271_AN_RF2G4_DB_2_S@GOTPAGE
Lloh55:
	ldr	x8, [x8, _AR9271_AN_RF2G4_DB_2_S@GOTPAGEOFF]
	str	x8, [sp, #32]                   ; 8-byte Folded Spill
Lloh56:
	adrp	x8, _AR9271_AN_RF2G4_DB_2@GOTPAGE
Lloh57:
	ldr	x8, [x8, _AR9271_AN_RF2G4_DB_2@GOTPAGEOFF]
	str	x8, [sp, #24]                   ; 8-byte Folded Spill
Lloh58:
	adrp	x27, _AR9271_AN_RF2G3_DB_1_S@GOTPAGE
Lloh59:
	ldr	x27, [x27, _AR9271_AN_RF2G3_DB_1_S@GOTPAGEOFF]
Lloh60:
	adrp	x28, _AR9271_AN_RF2G3_DB_1@GOTPAGE
Lloh61:
	ldr	x28, [x28, _AR9271_AN_RF2G3_DB_1@GOTPAGEOFF]
	mov	x25, x21
Lloh62:
	adrp	x21, _AR9271_AN_RF2G3_OB_qam_S@GOTPAGE
Lloh63:
	ldr	x21, [x21, _AR9271_AN_RF2G3_OB_qam_S@GOTPAGEOFF]
	mov	x23, x22
Lloh64:
	adrp	x22, _AR9271_AN_RF2G3_OB_qam@GOTPAGE
Lloh65:
	ldr	x22, [x22, _AR9271_AN_RF2G3_OB_qam@GOTPAGEOFF]
Lloh66:
	adrp	x8, _AR9271_AN_RF2G3_OB_psk_S@GOTPAGE
Lloh67:
	ldr	x8, [x8, _AR9271_AN_RF2G3_OB_psk_S@GOTPAGEOFF]
Lloh68:
	adrp	x9, _AR9271_AN_RF2G3_OB_psk@GOTPAGE
Lloh69:
	ldr	x9, [x9, _AR9271_AN_RF2G3_OB_psk@GOTPAGEOFF]
	mov	x24, x20
Lloh70:
	adrp	x20, _AR9285_AN_RF2G3@GOTPAGE
Lloh71:
	ldr	x20, [x20, _AR9285_AN_RF2G3@GOTPAGEOFF]
	ldp	w4, w26, [sp, #40]              ; 8-byte Folded Reload
	b	LBB0_12
LBB0_11:
Lloh72:
	adrp	x8, _AR9285_AN_RF2G3_OB_0@GOTPAGE
Lloh73:
	ldr	x8, [x8, _AR9285_AN_RF2G3_OB_0@GOTPAGEOFF]
Lloh74:
	ldr	w2, [x8]
Lloh75:
	adrp	x8, _AR9285_AN_RF2G3_OB_0_S@GOTPAGE
Lloh76:
	ldr	x8, [x8, _AR9285_AN_RF2G3_OB_0_S@GOTPAGEOFF]
Lloh77:
	ldr	w3, [x8]
	mov	x0, x19
	mov	x4, x28
	bl	_ath9k_hw_analog_shift_rmw
	ldr	w1, [x27]
Lloh78:
	adrp	x8, _AR9285_AN_RF2G3_OB_1@GOTPAGE
Lloh79:
	ldr	x8, [x8, _AR9285_AN_RF2G3_OB_1@GOTPAGEOFF]
Lloh80:
	ldr	w2, [x8]
Lloh81:
	adrp	x8, _AR9285_AN_RF2G3_OB_1_S@GOTPAGE
Lloh82:
	ldr	x8, [x8, _AR9285_AN_RF2G3_OB_1_S@GOTPAGEOFF]
Lloh83:
	ldr	w3, [x8]
	mov	x0, x19
	ldr	w4, [sp, #40]                   ; 4-byte Folded Reload
	bl	_ath9k_hw_analog_shift_rmw
	ldr	w1, [x27]
Lloh84:
	adrp	x8, _AR9285_AN_RF2G3_OB_2@GOTPAGE
Lloh85:
	ldr	x8, [x8, _AR9285_AN_RF2G3_OB_2@GOTPAGEOFF]
Lloh86:
	ldr	w2, [x8]
Lloh87:
	adrp	x8, _AR9285_AN_RF2G3_OB_2_S@GOTPAGE
Lloh88:
	ldr	x8, [x8, _AR9285_AN_RF2G3_OB_2_S@GOTPAGEOFF]
Lloh89:
	ldr	w3, [x8]
	mov	x0, x19
	ldr	w4, [sp, #44]                   ; 4-byte Folded Reload
	bl	_ath9k_hw_analog_shift_rmw
	ldr	w1, [x27]
Lloh90:
	adrp	x8, _AR9285_AN_RF2G3_OB_3@GOTPAGE
Lloh91:
	ldr	x8, [x8, _AR9285_AN_RF2G3_OB_3@GOTPAGEOFF]
Lloh92:
	ldr	w2, [x8]
Lloh93:
	adrp	x8, _AR9285_AN_RF2G3_OB_3_S@GOTPAGE
Lloh94:
	ldr	x8, [x8, _AR9285_AN_RF2G3_OB_3_S@GOTPAGEOFF]
Lloh95:
	ldr	w3, [x8]
	mov	x0, x19
	ldr	w4, [sp]                        ; 4-byte Folded Reload
	bl	_ath9k_hw_analog_shift_rmw
	ldr	w1, [x27]
Lloh96:
	adrp	x8, _AR9285_AN_RF2G3_OB_4@GOTPAGE
Lloh97:
	ldr	x8, [x8, _AR9285_AN_RF2G3_OB_4@GOTPAGEOFF]
Lloh98:
	ldr	w2, [x8]
Lloh99:
	adrp	x8, _AR9285_AN_RF2G3_OB_4_S@GOTPAGE
Lloh100:
	ldr	x8, [x8, _AR9285_AN_RF2G3_OB_4_S@GOTPAGEOFF]
Lloh101:
	ldr	w3, [x8]
	mov	x0, x19
	mov	x4, x26
	bl	_ath9k_hw_analog_shift_rmw
	ldr	w1, [x27]
Lloh102:
	adrp	x8, _AR9285_AN_RF2G3_DB1_0@GOTPAGE
Lloh103:
	ldr	x8, [x8, _AR9285_AN_RF2G3_DB1_0@GOTPAGEOFF]
Lloh104:
	ldr	w2, [x8]
Lloh105:
	adrp	x8, _AR9285_AN_RF2G3_DB1_0_S@GOTPAGE
Lloh106:
	ldr	x8, [x8, _AR9285_AN_RF2G3_DB1_0_S@GOTPAGEOFF]
Lloh107:
	ldr	w3, [x8]
	mov	x0, x19
	mov	x4, x22
	bl	_ath9k_hw_analog_shift_rmw
	ldr	w1, [x27]
Lloh108:
	adrp	x8, _AR9285_AN_RF2G3_DB1_1@GOTPAGE
Lloh109:
	ldr	x8, [x8, _AR9285_AN_RF2G3_DB1_1@GOTPAGEOFF]
Lloh110:
	ldr	w2, [x8]
Lloh111:
	adrp	x8, _AR9285_AN_RF2G3_DB1_1_S@GOTPAGE
Lloh112:
	ldr	x8, [x8, _AR9285_AN_RF2G3_DB1_1_S@GOTPAGEOFF]
Lloh113:
	ldr	w3, [x8]
	mov	x0, x19
	ldr	w4, [sp, #4]                    ; 4-byte Folded Reload
	bl	_ath9k_hw_analog_shift_rmw
	ldr	w1, [x27]
Lloh114:
	adrp	x8, _AR9285_AN_RF2G3_DB1_2@GOTPAGE
Lloh115:
	ldr	x8, [x8, _AR9285_AN_RF2G3_DB1_2@GOTPAGEOFF]
Lloh116:
	ldr	w2, [x8]
Lloh117:
	adrp	x8, _AR9285_AN_RF2G3_DB1_2_S@GOTPAGE
Lloh118:
	ldr	x8, [x8, _AR9285_AN_RF2G3_DB1_2_S@GOTPAGEOFF]
Lloh119:
	ldr	w3, [x8]
	mov	x0, x19
	ldr	w4, [sp, #24]                   ; 4-byte Folded Reload
	bl	_ath9k_hw_analog_shift_rmw
	ldr	w1, [x21]
Lloh120:
	adrp	x8, _AR9285_AN_RF2G4_DB1_3@GOTPAGE
Lloh121:
	ldr	x8, [x8, _AR9285_AN_RF2G4_DB1_3@GOTPAGEOFF]
Lloh122:
	ldr	w2, [x8]
Lloh123:
	adrp	x8, _AR9285_AN_RF2G4_DB1_3_S@GOTPAGE
Lloh124:
	ldr	x8, [x8, _AR9285_AN_RF2G4_DB1_3_S@GOTPAGEOFF]
Lloh125:
	ldr	w3, [x8]
	mov	x0, x19
	ldr	w4, [sp, #32]                   ; 4-byte Folded Reload
	bl	_ath9k_hw_analog_shift_rmw
	ldr	w1, [x21]
Lloh126:
	adrp	x8, _AR9285_AN_RF2G4_DB1_4@GOTPAGE
Lloh127:
	ldr	x8, [x8, _AR9285_AN_RF2G4_DB1_4@GOTPAGEOFF]
Lloh128:
	ldr	w2, [x8]
Lloh129:
	adrp	x8, _AR9285_AN_RF2G4_DB1_4_S@GOTPAGE
Lloh130:
	ldr	x8, [x8, _AR9285_AN_RF2G4_DB1_4_S@GOTPAGEOFF]
Lloh131:
	ldr	w3, [x8]
	mov	x0, x19
	mov	x4, x23
	bl	_ath9k_hw_analog_shift_rmw
	ldr	w1, [x21]
Lloh132:
	adrp	x8, _AR9285_AN_RF2G4_DB2_0@GOTPAGE
Lloh133:
	ldr	x8, [x8, _AR9285_AN_RF2G4_DB2_0@GOTPAGEOFF]
Lloh134:
	ldr	w2, [x8]
Lloh135:
	adrp	x8, _AR9285_AN_RF2G4_DB2_0_S@GOTPAGE
Lloh136:
	ldr	x8, [x8, _AR9285_AN_RF2G4_DB2_0_S@GOTPAGEOFF]
Lloh137:
	ldr	w3, [x8]
	mov	x0, x19
	mov	x4, x20
	bl	_ath9k_hw_analog_shift_rmw
Lloh138:
	adrp	x8, _AR9285_AN_RF2G4_DB2_4_S@GOTPAGE
Lloh139:
	ldr	x8, [x8, _AR9285_AN_RF2G4_DB2_4_S@GOTPAGEOFF]
	str	x8, [sp, #32]                   ; 8-byte Folded Spill
Lloh140:
	adrp	x8, _AR9285_AN_RF2G4_DB2_4@GOTPAGE
Lloh141:
	ldr	x8, [x8, _AR9285_AN_RF2G4_DB2_4@GOTPAGEOFF]
	str	x8, [sp, #24]                   ; 8-byte Folded Spill
Lloh142:
	adrp	x27, _AR9285_AN_RF2G4_DB2_3_S@GOTPAGE
Lloh143:
	ldr	x27, [x27, _AR9285_AN_RF2G4_DB2_3_S@GOTPAGEOFF]
	mov	x20, x21
Lloh144:
	adrp	x28, _AR9285_AN_RF2G4_DB2_3@GOTPAGE
Lloh145:
	ldr	x28, [x28, _AR9285_AN_RF2G4_DB2_3@GOTPAGEOFF]
	mov	x23, x25
	mov	x25, x21
Lloh146:
	adrp	x21, _AR9285_AN_RF2G4_DB2_2_S@GOTPAGE
Lloh147:
	ldr	x21, [x21, _AR9285_AN_RF2G4_DB2_2_S@GOTPAGEOFF]
	ldp	w4, w26, [sp, #8]               ; 8-byte Folded Reload
Lloh148:
	adrp	x22, _AR9285_AN_RF2G4_DB2_2@GOTPAGE
Lloh149:
	ldr	x22, [x22, _AR9285_AN_RF2G4_DB2_2@GOTPAGEOFF]
Lloh150:
	adrp	x8, _AR9285_AN_RF2G4_DB2_1_S@GOTPAGE
Lloh151:
	ldr	x8, [x8, _AR9285_AN_RF2G4_DB2_1_S@GOTPAGEOFF]
Lloh152:
	adrp	x9, _AR9285_AN_RF2G4_DB2_1@GOTPAGE
Lloh153:
	ldr	x9, [x9, _AR9285_AN_RF2G4_DB2_1@GOTPAGEOFF]
LBB0_12:
	ldr	w1, [x20]
	ldr	w2, [x9]
	ldr	w3, [x8]
	mov	x0, x19
	bl	_ath9k_hw_analog_shift_rmw
	ldr	w1, [x20]
	ldr	w2, [x22]
	ldr	w3, [x21]
	mov	x0, x19
	mov	x4, x26
	bl	_ath9k_hw_analog_shift_rmw
	ldr	w1, [x20]
	ldr	w2, [x28]
	ldr	w3, [x27]
	mov	x0, x19
	mov	x4, x23
	bl	_ath9k_hw_analog_shift_rmw
	ldr	w1, [x25]
	ldr	x8, [sp, #24]                   ; 8-byte Folded Reload
	ldr	w2, [x8]
	ldr	x8, [sp, #32]                   ; 8-byte Folded Reload
	ldr	w3, [x8]
	mov	x0, x19
	mov	x4, x24
	bl	_ath9k_hw_analog_shift_rmw
	mov	x0, x19
	bl	_REG_RMW_BUFFER_FLUSH
	mov	x0, x19
	bl	_ENABLE_REG_RMW_BUFFER
Lloh154:
	adrp	x22, _AR_PHY_SETTLING@GOTPAGE
Lloh155:
	ldr	x22, [x22, _AR_PHY_SETTLING@GOTPAGEOFF]
	ldr	w1, [x22]
Lloh156:
	adrp	x23, _AR_PHY_SETTLING_SWITCH@GOTPAGE
Lloh157:
	ldr	x23, [x23, _AR_PHY_SETTLING_SWITCH@GOTPAGEOFF]
	ldr	w2, [x23]
	ldr	w3, [x19, #108]
	mov	x0, x19
	bl	_REG_RMW_FIELD
Lloh158:
	adrp	x8, _AR_PHY_DESIRED_SZ@GOTPAGE
Lloh159:
	ldr	x8, [x8, _AR_PHY_DESIRED_SZ@GOTPAGEOFF]
Lloh160:
	ldr	w1, [x8]
Lloh161:
	adrp	x8, _AR_PHY_DESIRED_SZ_ADC@GOTPAGE
Lloh162:
	ldr	x8, [x8, _AR_PHY_DESIRED_SZ_ADC@GOTPAGEOFF]
Lloh163:
	ldr	w2, [x8]
	ldr	w3, [x19, #104]
	mov	x0, x19
	bl	_REG_RMW_FIELD
Lloh164:
	adrp	x8, _AR_PHY_RF_CTL4@GOTPAGE
Lloh165:
	ldr	x8, [x8, _AR_PHY_RF_CTL4@GOTPAGEOFF]
Lloh166:
	ldr	w20, [x8]
	ldr	w0, [x19, #72]
Lloh167:
	adrp	x8, _AR_PHY_RF_CTL4_TX_END_XPAA_OFF@GOTPAGE
Lloh168:
	ldr	x8, [x8, _AR_PHY_RF_CTL4_TX_END_XPAA_OFF@GOTPAGEOFF]
Lloh169:
	ldr	w1, [x8]
	bl	_SM
	mov	x21, x0
	ldr	w0, [x19, #72]
Lloh170:
	adrp	x8, _AR_PHY_RF_CTL4_TX_END_XPAB_OFF@GOTPAGE
Lloh171:
	ldr	x8, [x8, _AR_PHY_RF_CTL4_TX_END_XPAB_OFF@GOTPAGEOFF]
Lloh172:
	ldr	w1, [x8]
	bl	_SM
	orr	w21, w0, w21
	ldr	w0, [x19, #76]
Lloh173:
	adrp	x8, _AR_PHY_RF_CTL4_FRAME_XPAA_ON@GOTPAGE
Lloh174:
	ldr	x8, [x8, _AR_PHY_RF_CTL4_FRAME_XPAA_ON@GOTPAGEOFF]
Lloh175:
	ldr	w1, [x8]
	bl	_SM
	orr	w21, w21, w0
	ldr	w0, [x19, #76]
Lloh176:
	adrp	x8, _AR_PHY_RF_CTL4_FRAME_XPAB_ON@GOTPAGE
Lloh177:
	ldr	x8, [x8, _AR_PHY_RF_CTL4_FRAME_XPAB_ON@GOTPAGEOFF]
Lloh178:
	ldr	w1, [x8]
	bl	_SM
	orr	w2, w21, w0
	mov	x0, x19
	mov	x1, x20
	mov	w3, #0
	bl	_REG_RMW
Lloh179:
	adrp	x20, _AR_PHY_RF_CTL3@GOTPAGE
Lloh180:
	ldr	x20, [x20, _AR_PHY_RF_CTL3@GOTPAGEOFF]
	ldr	w1, [x20]
Lloh181:
	adrp	x21, _AR_PHY_TX_END_TO_A2_RX_ON@GOTPAGE
Lloh182:
	ldr	x21, [x21, _AR_PHY_TX_END_TO_A2_RX_ON@GOTPAGEOFF]
	ldr	w2, [x21]
	ldr	w3, [x19, #100]
	mov	x0, x19
	bl	_REG_RMW_FIELD
	mov	x0, x19
	bl	_AR_SREV_9271_10
	cbz	x0, LBB0_14
; %bb.13:
	ldr	w1, [x20]
	ldr	w2, [x21]
	ldr	w3, [x19, #100]
	mov	x0, x19
	bl	_REG_RMW_FIELD
LBB0_14:
Lloh183:
	adrp	x8, _AR_PHY_CCA@GOTPAGE
Lloh184:
	ldr	x8, [x8, _AR_PHY_CCA@GOTPAGEOFF]
Lloh185:
	ldr	w1, [x8]
Lloh186:
	adrp	x8, _AR9280_PHY_CCA_THRESH62@GOTPAGE
Lloh187:
	ldr	x8, [x8, _AR9280_PHY_CCA_THRESH62@GOTPAGEOFF]
Lloh188:
	ldr	w2, [x8]
	ldr	w3, [x19, #96]
	mov	x0, x19
	bl	_REG_RMW_FIELD
Lloh189:
	adrp	x8, _AR_PHY_EXT_CCA0@GOTPAGE
Lloh190:
	ldr	x8, [x8, _AR_PHY_EXT_CCA0@GOTPAGEOFF]
Lloh191:
	ldr	w1, [x8]
Lloh192:
	adrp	x8, _AR_PHY_EXT_CCA0_THRESH62@GOTPAGE
Lloh193:
	ldr	x8, [x8, _AR_PHY_EXT_CCA0_THRESH62@GOTPAGEOFF]
Lloh194:
	ldr	w2, [x8]
	ldr	w3, [x19, #96]
	mov	x0, x19
	bl	_REG_RMW_FIELD
	mov	x0, x19
	bl	_ath9k_hw_4k_get_eeprom_rev
Lloh195:
	adrp	x8, _AR5416_EEP_MINOR_VER_2@GOTPAGE
Lloh196:
	ldr	x8, [x8, _AR5416_EEP_MINOR_VER_2@GOTPAGEOFF]
Lloh197:
	ldr	x8, [x8]
	cmp	x0, x8
	b.lt	LBB0_16
; %bb.15:
Lloh198:
	adrp	x20, _AR_PHY_RF_CTL2@GOTPAGE
Lloh199:
	ldr	x20, [x20, _AR_PHY_RF_CTL2@GOTPAGEOFF]
	ldr	w1, [x20]
Lloh200:
	adrp	x8, _AR_PHY_TX_END_DATA_START@GOTPAGE
Lloh201:
	ldr	x8, [x8, _AR_PHY_TX_END_DATA_START@GOTPAGEOFF]
Lloh202:
	ldr	w2, [x8]
	ldr	w3, [x19, #92]
	mov	x0, x19
	bl	_REG_RMW_FIELD
	ldr	w1, [x20]
Lloh203:
	adrp	x8, _AR_PHY_TX_END_PA_ON@GOTPAGE
Lloh204:
	ldr	x8, [x8, _AR_PHY_TX_END_PA_ON@GOTPAGEOFF]
Lloh205:
	ldr	w2, [x8]
	ldr	w3, [x19, #88]
	mov	x0, x19
	bl	_REG_RMW_FIELD
LBB0_16:
	mov	x0, x19
	bl	_ath9k_hw_4k_get_eeprom_rev
Lloh206:
	adrp	x8, _AR5416_EEP_MINOR_VER_3@GOTPAGE
Lloh207:
	ldr	x8, [x8, _AR5416_EEP_MINOR_VER_3@GOTPAGEOFF]
Lloh208:
	ldr	x8, [x8]
	cmp	x0, x8
	b.lt	LBB0_19
; %bb.17:
	ldr	x0, [sp, #16]                   ; 8-byte Folded Reload
	bl	_IS_CHAN_HT40
	cbz	x0, LBB0_19
; %bb.18:
	ldr	w1, [x22]
	ldr	w2, [x23]
	ldr	w3, [x19, #84]
	mov	x0, x19
	bl	_REG_RMW_FIELD
LBB0_19:
	mov	x0, x19
	bl	_REG_RMW_BUFFER_FLUSH
	ldr	x8, [x19, #120]
	cbnz	x8, LBB0_22
; %bb.20:
	ldr	w8, [x19, #80]
Lloh209:
	adrp	x9, _EEP_4K_BB_DESIRED_SCALE_MASK@GOTPAGE
Lloh210:
	ldr	x9, [x9, _EEP_4K_BB_DESIRED_SCALE_MASK@GOTPAGEOFF]
Lloh211:
	ldr	w9, [x9]
	and	w22, w9, w8
	cbz	w22, LBB0_22
; %bb.21:
	mov	w0, #0
	bl	_BIT
	mov	x20, x0
	mov	w0, #5
	bl	_BIT
	orr	w20, w0, w20
	mov	w0, #10
	bl	_BIT
	orr	w20, w20, w0
	mov	w0, #15
	bl	_BIT
	orr	w20, w20, w0
	mov	w0, #20
	bl	_BIT
	orr	w20, w20, w0
	mov	w0, #25
	bl	_BIT
	orr	w8, w20, w0
	mul	w20, w8, w22
	lsl	w9, w8, #5
	sub	w21, w9, w8
	mov	x0, x19
	bl	_ENABLE_REG_RMW_BUFFER
Lloh212:
	adrp	x8, _AR_PHY_TX_PWRCTRL8@GOTPAGE
Lloh213:
	ldr	x8, [x8, _AR_PHY_TX_PWRCTRL8@GOTPAGEOFF]
Lloh214:
	ldr	w1, [x8]
	mov	x0, x19
	mov	x2, x20
	mov	x3, x21
	bl	_REG_RMW
Lloh215:
	adrp	x8, _AR_PHY_TX_PWRCTRL10@GOTPAGE
Lloh216:
	ldr	x8, [x8, _AR_PHY_TX_PWRCTRL10@GOTPAGEOFF]
Lloh217:
	ldr	w1, [x8]
	mov	x0, x19
	mov	x2, x20
	mov	x3, x21
	bl	_REG_RMW
Lloh218:
	adrp	x8, _AR_PHY_CH0_TX_PWRCTRL12@GOTPAGE
Lloh219:
	ldr	x8, [x8, _AR_PHY_CH0_TX_PWRCTRL12@GOTPAGEOFF]
Lloh220:
	ldr	w1, [x8]
	mov	x0, x19
	mov	x2, x20
	mov	x3, x21
	bl	_REG_RMW
	mov	w0, #0
	bl	_BIT
	mov	x20, x0
	mov	w0, #5
	bl	_BIT
	orr	w20, w0, w20
	mov	w0, #15
	bl	_BIT
	orr	w8, w20, w0
	mul	w2, w8, w22
	lsl	w9, w8, #5
	sub	w3, w9, w8
Lloh221:
	adrp	x8, _AR_PHY_TX_PWRCTRL9@GOTPAGE
Lloh222:
	ldr	x8, [x8, _AR_PHY_TX_PWRCTRL9@GOTPAGEOFF]
Lloh223:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_REG_RMW
	mov	w0, #0
	bl	_BIT
	mov	x20, x0
	mov	w0, #5
	bl	_BIT
	orr	w8, w0, w20
	mul	w20, w8, w22
	lsl	w9, w8, #5
	sub	w21, w9, w8
Lloh224:
	adrp	x8, _AR_PHY_CH0_TX_PWRCTRL11@GOTPAGE
Lloh225:
	ldr	x8, [x8, _AR_PHY_CH0_TX_PWRCTRL11@GOTPAGEOFF]
Lloh226:
	ldr	w1, [x8]
	mov	x0, x19
	mov	x2, x20
	mov	x3, x21
	bl	_REG_RMW
Lloh227:
	adrp	x8, _AR_PHY_CH0_TX_PWRCTRL13@GOTPAGE
Lloh228:
	ldr	x8, [x8, _AR_PHY_CH0_TX_PWRCTRL13@GOTPAGEOFF]
Lloh229:
	ldr	w1, [x8]
	mov	x0, x19
	mov	x2, x20
	mov	x3, x21
	bl	_REG_RMW
	mov	x0, x19
	ldp	x29, x30, [sp, #128]            ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #112]            ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #96]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #80]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #64]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp, #48]             ; 16-byte Folded Reload
	add	sp, sp, #144
	b	_REG_RMW_BUFFER_FLUSH
LBB0_22:
	ldp	x29, x30, [sp, #128]            ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #112]            ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #96]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #80]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #64]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp, #48]             ; 16-byte Folded Reload
	add	sp, sp, #144
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh26, Lloh27, Lloh28
	.loh AdrpLdrGotLdr	Lloh23, Lloh24, Lloh25
	.loh AdrpLdrGot	Lloh21, Lloh22
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGot	Lloh13, Lloh14
	.loh AdrpLdrGot	Lloh11, Lloh12
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGot	Lloh3, Lloh4
	.loh AdrpLdrGotLdr	Lloh41, Lloh42, Lloh43
	.loh AdrpLdrGotLdr	Lloh38, Lloh39, Lloh40
	.loh AdrpLdrGotLdr	Lloh35, Lloh36, Lloh37
	.loh AdrpLdrGotLdr	Lloh32, Lloh33, Lloh34
	.loh AdrpLdrGotLdr	Lloh29, Lloh30, Lloh31
	.loh AdrpLdrGot	Lloh46, Lloh47
	.loh AdrpLdrGot	Lloh44, Lloh45
	.loh AdrpLdrGot	Lloh70, Lloh71
	.loh AdrpLdrGot	Lloh68, Lloh69
	.loh AdrpLdrGot	Lloh66, Lloh67
	.loh AdrpLdrGot	Lloh64, Lloh65
	.loh AdrpLdrGot	Lloh62, Lloh63
	.loh AdrpLdrGot	Lloh60, Lloh61
	.loh AdrpLdrGot	Lloh58, Lloh59
	.loh AdrpLdrGot	Lloh56, Lloh57
	.loh AdrpLdrGot	Lloh54, Lloh55
	.loh AdrpLdrGotLdr	Lloh51, Lloh52, Lloh53
	.loh AdrpLdrGotLdr	Lloh48, Lloh49, Lloh50
	.loh AdrpLdrGot	Lloh152, Lloh153
	.loh AdrpLdrGot	Lloh150, Lloh151
	.loh AdrpLdrGot	Lloh148, Lloh149
	.loh AdrpLdrGot	Lloh146, Lloh147
	.loh AdrpLdrGot	Lloh144, Lloh145
	.loh AdrpLdrGot	Lloh142, Lloh143
	.loh AdrpLdrGot	Lloh140, Lloh141
	.loh AdrpLdrGot	Lloh138, Lloh139
	.loh AdrpLdrGotLdr	Lloh135, Lloh136, Lloh137
	.loh AdrpLdrGotLdr	Lloh132, Lloh133, Lloh134
	.loh AdrpLdrGotLdr	Lloh129, Lloh130, Lloh131
	.loh AdrpLdrGotLdr	Lloh126, Lloh127, Lloh128
	.loh AdrpLdrGotLdr	Lloh123, Lloh124, Lloh125
	.loh AdrpLdrGotLdr	Lloh120, Lloh121, Lloh122
	.loh AdrpLdrGotLdr	Lloh117, Lloh118, Lloh119
	.loh AdrpLdrGotLdr	Lloh114, Lloh115, Lloh116
	.loh AdrpLdrGotLdr	Lloh111, Lloh112, Lloh113
	.loh AdrpLdrGotLdr	Lloh108, Lloh109, Lloh110
	.loh AdrpLdrGotLdr	Lloh105, Lloh106, Lloh107
	.loh AdrpLdrGotLdr	Lloh102, Lloh103, Lloh104
	.loh AdrpLdrGotLdr	Lloh99, Lloh100, Lloh101
	.loh AdrpLdrGotLdr	Lloh96, Lloh97, Lloh98
	.loh AdrpLdrGotLdr	Lloh93, Lloh94, Lloh95
	.loh AdrpLdrGotLdr	Lloh90, Lloh91, Lloh92
	.loh AdrpLdrGotLdr	Lloh87, Lloh88, Lloh89
	.loh AdrpLdrGotLdr	Lloh84, Lloh85, Lloh86
	.loh AdrpLdrGotLdr	Lloh81, Lloh82, Lloh83
	.loh AdrpLdrGotLdr	Lloh78, Lloh79, Lloh80
	.loh AdrpLdrGotLdr	Lloh75, Lloh76, Lloh77
	.loh AdrpLdrGotLdr	Lloh72, Lloh73, Lloh74
	.loh AdrpLdrGot	Lloh181, Lloh182
	.loh AdrpLdrGot	Lloh179, Lloh180
	.loh AdrpLdrGotLdr	Lloh176, Lloh177, Lloh178
	.loh AdrpLdrGotLdr	Lloh173, Lloh174, Lloh175
	.loh AdrpLdrGotLdr	Lloh170, Lloh171, Lloh172
	.loh AdrpLdrGotLdr	Lloh167, Lloh168, Lloh169
	.loh AdrpLdrGotLdr	Lloh164, Lloh165, Lloh166
	.loh AdrpLdrGotLdr	Lloh161, Lloh162, Lloh163
	.loh AdrpLdrGotLdr	Lloh158, Lloh159, Lloh160
	.loh AdrpLdrGot	Lloh156, Lloh157
	.loh AdrpLdrGot	Lloh154, Lloh155
	.loh AdrpLdrGotLdr	Lloh195, Lloh196, Lloh197
	.loh AdrpLdrGotLdr	Lloh192, Lloh193, Lloh194
	.loh AdrpLdrGotLdr	Lloh189, Lloh190, Lloh191
	.loh AdrpLdrGotLdr	Lloh186, Lloh187, Lloh188
	.loh AdrpLdrGotLdr	Lloh183, Lloh184, Lloh185
	.loh AdrpLdrGotLdr	Lloh203, Lloh204, Lloh205
	.loh AdrpLdrGotLdr	Lloh200, Lloh201, Lloh202
	.loh AdrpLdrGot	Lloh198, Lloh199
	.loh AdrpLdrGotLdr	Lloh206, Lloh207, Lloh208
	.loh AdrpLdrGotLdr	Lloh209, Lloh210, Lloh211
	.loh AdrpLdrGotLdr	Lloh227, Lloh228, Lloh229
	.loh AdrpLdrGotLdr	Lloh224, Lloh225, Lloh226
	.loh AdrpLdrGotLdr	Lloh221, Lloh222, Lloh223
	.loh AdrpLdrGotLdr	Lloh218, Lloh219, Lloh220
	.loh AdrpLdrGotLdr	Lloh215, Lloh216, Lloh217
	.loh AdrpLdrGotLdr	Lloh212, Lloh213, Lloh214
	.cfi_endproc
                                        ; -- End function
	.comm	_AR_PHY_SWITCH_COM,4,2          ; @AR_PHY_SWITCH_COM
	.comm	_AR_PHY_MULTICHAIN_GAIN_CTL,4,2 ; @AR_PHY_MULTICHAIN_GAIN_CTL
	.comm	_AR_PHY_9285_ANT_DIV_CTL_ALL,4,2 ; @AR_PHY_9285_ANT_DIV_CTL_ALL
	.comm	_AR_PHY_9285_ANT_DIV_CTL,4,2    ; @AR_PHY_9285_ANT_DIV_CTL
	.comm	_AR_PHY_9285_ANT_DIV_ALT_LNACONF,4,2 ; @AR_PHY_9285_ANT_DIV_ALT_LNACONF
	.comm	_AR_PHY_9285_ANT_DIV_MAIN_LNACONF,4,2 ; @AR_PHY_9285_ANT_DIV_MAIN_LNACONF
	.comm	_AR_PHY_9285_ANT_DIV_ALT_GAINTB,4,2 ; @AR_PHY_9285_ANT_DIV_ALT_GAINTB
	.comm	_AR_PHY_9285_ANT_DIV_MAIN_GAINTB,4,2 ; @AR_PHY_9285_ANT_DIV_MAIN_GAINTB
	.comm	_AR_PHY_CCK_DETECT,4,2          ; @AR_PHY_CCK_DETECT
	.comm	_AR_PHY_CCK_DETECT_BB_ENABLE_ANT_FAST_DIV,4,2 ; @AR_PHY_CCK_DETECT_BB_ENABLE_ANT_FAST_DIV
	.comm	_ATH9K_HW_CAP_ANT_DIV_COMB,4,2  ; @ATH9K_HW_CAP_ANT_DIV_COMB
	.comm	_ATH_ANT_DIV_COMB_LNA1,4,2      ; @ATH_ANT_DIV_COMB_LNA1
	.comm	_AR_PHY_9285_ANT_DIV_MAIN_LNACONF_S,4,2 ; @AR_PHY_9285_ANT_DIV_MAIN_LNACONF_S
	.comm	_ATH_ANT_DIV_COMB_LNA2,4,2      ; @ATH_ANT_DIV_COMB_LNA2
	.comm	_AR_PHY_9285_ANT_DIV_ALT_LNACONF_S,4,2 ; @AR_PHY_9285_ANT_DIV_ALT_LNACONF_S
	.comm	_AR_PHY_9285_FAST_DIV_BIAS,4,2  ; @AR_PHY_9285_FAST_DIV_BIAS
	.comm	_AR_PHY_9285_FAST_DIV_BIAS_S,4,2 ; @AR_PHY_9285_FAST_DIV_BIAS_S
	.comm	_AR9285_AN_RF2G3,4,2            ; @AR9285_AN_RF2G3
	.comm	_AR9271_AN_RF2G3_OB_cck,4,2     ; @AR9271_AN_RF2G3_OB_cck
	.comm	_AR9271_AN_RF2G3_OB_cck_S,4,2   ; @AR9271_AN_RF2G3_OB_cck_S
	.comm	_AR9271_AN_RF2G3_OB_psk,4,2     ; @AR9271_AN_RF2G3_OB_psk
	.comm	_AR9271_AN_RF2G3_OB_psk_S,4,2   ; @AR9271_AN_RF2G3_OB_psk_S
	.comm	_AR9271_AN_RF2G3_OB_qam,4,2     ; @AR9271_AN_RF2G3_OB_qam
	.comm	_AR9271_AN_RF2G3_OB_qam_S,4,2   ; @AR9271_AN_RF2G3_OB_qam_S
	.comm	_AR9271_AN_RF2G3_DB_1,4,2       ; @AR9271_AN_RF2G3_DB_1
	.comm	_AR9271_AN_RF2G3_DB_1_S,4,2     ; @AR9271_AN_RF2G3_DB_1_S
	.comm	_AR9285_AN_RF2G4,4,2            ; @AR9285_AN_RF2G4
	.comm	_AR9271_AN_RF2G4_DB_2,4,2       ; @AR9271_AN_RF2G4_DB_2
	.comm	_AR9271_AN_RF2G4_DB_2_S,4,2     ; @AR9271_AN_RF2G4_DB_2_S
	.comm	_AR9285_AN_RF2G3_OB_0,4,2       ; @AR9285_AN_RF2G3_OB_0
	.comm	_AR9285_AN_RF2G3_OB_0_S,4,2     ; @AR9285_AN_RF2G3_OB_0_S
	.comm	_AR9285_AN_RF2G3_OB_1,4,2       ; @AR9285_AN_RF2G3_OB_1
	.comm	_AR9285_AN_RF2G3_OB_1_S,4,2     ; @AR9285_AN_RF2G3_OB_1_S
	.comm	_AR9285_AN_RF2G3_OB_2,4,2       ; @AR9285_AN_RF2G3_OB_2
	.comm	_AR9285_AN_RF2G3_OB_2_S,4,2     ; @AR9285_AN_RF2G3_OB_2_S
	.comm	_AR9285_AN_RF2G3_OB_3,4,2       ; @AR9285_AN_RF2G3_OB_3
	.comm	_AR9285_AN_RF2G3_OB_3_S,4,2     ; @AR9285_AN_RF2G3_OB_3_S
	.comm	_AR9285_AN_RF2G3_OB_4,4,2       ; @AR9285_AN_RF2G3_OB_4
	.comm	_AR9285_AN_RF2G3_OB_4_S,4,2     ; @AR9285_AN_RF2G3_OB_4_S
	.comm	_AR9285_AN_RF2G3_DB1_0,4,2      ; @AR9285_AN_RF2G3_DB1_0
	.comm	_AR9285_AN_RF2G3_DB1_0_S,4,2    ; @AR9285_AN_RF2G3_DB1_0_S
	.comm	_AR9285_AN_RF2G3_DB1_1,4,2      ; @AR9285_AN_RF2G3_DB1_1
	.comm	_AR9285_AN_RF2G3_DB1_1_S,4,2    ; @AR9285_AN_RF2G3_DB1_1_S
	.comm	_AR9285_AN_RF2G3_DB1_2,4,2      ; @AR9285_AN_RF2G3_DB1_2
	.comm	_AR9285_AN_RF2G3_DB1_2_S,4,2    ; @AR9285_AN_RF2G3_DB1_2_S
	.comm	_AR9285_AN_RF2G4_DB1_3,4,2      ; @AR9285_AN_RF2G4_DB1_3
	.comm	_AR9285_AN_RF2G4_DB1_3_S,4,2    ; @AR9285_AN_RF2G4_DB1_3_S
	.comm	_AR9285_AN_RF2G4_DB1_4,4,2      ; @AR9285_AN_RF2G4_DB1_4
	.comm	_AR9285_AN_RF2G4_DB1_4_S,4,2    ; @AR9285_AN_RF2G4_DB1_4_S
	.comm	_AR9285_AN_RF2G4_DB2_0,4,2      ; @AR9285_AN_RF2G4_DB2_0
	.comm	_AR9285_AN_RF2G4_DB2_0_S,4,2    ; @AR9285_AN_RF2G4_DB2_0_S
	.comm	_AR9285_AN_RF2G4_DB2_1,4,2      ; @AR9285_AN_RF2G4_DB2_1
	.comm	_AR9285_AN_RF2G4_DB2_1_S,4,2    ; @AR9285_AN_RF2G4_DB2_1_S
	.comm	_AR9285_AN_RF2G4_DB2_2,4,2      ; @AR9285_AN_RF2G4_DB2_2
	.comm	_AR9285_AN_RF2G4_DB2_2_S,4,2    ; @AR9285_AN_RF2G4_DB2_2_S
	.comm	_AR9285_AN_RF2G4_DB2_3,4,2      ; @AR9285_AN_RF2G4_DB2_3
	.comm	_AR9285_AN_RF2G4_DB2_3_S,4,2    ; @AR9285_AN_RF2G4_DB2_3_S
	.comm	_AR9285_AN_RF2G4_DB2_4,4,2      ; @AR9285_AN_RF2G4_DB2_4
	.comm	_AR9285_AN_RF2G4_DB2_4_S,4,2    ; @AR9285_AN_RF2G4_DB2_4_S
	.comm	_AR_PHY_SETTLING,4,2            ; @AR_PHY_SETTLING
	.comm	_AR_PHY_SETTLING_SWITCH,4,2     ; @AR_PHY_SETTLING_SWITCH
	.comm	_AR_PHY_DESIRED_SZ,4,2          ; @AR_PHY_DESIRED_SZ
	.comm	_AR_PHY_DESIRED_SZ_ADC,4,2      ; @AR_PHY_DESIRED_SZ_ADC
	.comm	_AR_PHY_RF_CTL4,4,2             ; @AR_PHY_RF_CTL4
	.comm	_AR_PHY_RF_CTL4_TX_END_XPAA_OFF,4,2 ; @AR_PHY_RF_CTL4_TX_END_XPAA_OFF
	.comm	_AR_PHY_RF_CTL4_TX_END_XPAB_OFF,4,2 ; @AR_PHY_RF_CTL4_TX_END_XPAB_OFF
	.comm	_AR_PHY_RF_CTL4_FRAME_XPAA_ON,4,2 ; @AR_PHY_RF_CTL4_FRAME_XPAA_ON
	.comm	_AR_PHY_RF_CTL4_FRAME_XPAB_ON,4,2 ; @AR_PHY_RF_CTL4_FRAME_XPAB_ON
	.comm	_AR_PHY_RF_CTL3,4,2             ; @AR_PHY_RF_CTL3
	.comm	_AR_PHY_TX_END_TO_A2_RX_ON,4,2  ; @AR_PHY_TX_END_TO_A2_RX_ON
	.comm	_AR_PHY_CCA,4,2                 ; @AR_PHY_CCA
	.comm	_AR9280_PHY_CCA_THRESH62,4,2    ; @AR9280_PHY_CCA_THRESH62
	.comm	_AR_PHY_EXT_CCA0,4,2            ; @AR_PHY_EXT_CCA0
	.comm	_AR_PHY_EXT_CCA0_THRESH62,4,2   ; @AR_PHY_EXT_CCA0_THRESH62
	.comm	_AR5416_EEP_MINOR_VER_2,8,3     ; @AR5416_EEP_MINOR_VER_2
	.comm	_AR_PHY_RF_CTL2,4,2             ; @AR_PHY_RF_CTL2
	.comm	_AR_PHY_TX_END_DATA_START,4,2   ; @AR_PHY_TX_END_DATA_START
	.comm	_AR_PHY_TX_END_PA_ON,4,2        ; @AR_PHY_TX_END_PA_ON
	.comm	_AR5416_EEP_MINOR_VER_3,8,3     ; @AR5416_EEP_MINOR_VER_3
	.comm	_EEP_4K_BB_DESIRED_SCALE_MASK,4,2 ; @EEP_4K_BB_DESIRED_SCALE_MASK
	.comm	_AR_PHY_TX_PWRCTRL8,4,2         ; @AR_PHY_TX_PWRCTRL8
	.comm	_AR_PHY_TX_PWRCTRL10,4,2        ; @AR_PHY_TX_PWRCTRL10
	.comm	_AR_PHY_CH0_TX_PWRCTRL12,4,2    ; @AR_PHY_CH0_TX_PWRCTRL12
	.comm	_AR_PHY_TX_PWRCTRL9,4,2         ; @AR_PHY_TX_PWRCTRL9
	.comm	_AR_PHY_CH0_TX_PWRCTRL11,4,2    ; @AR_PHY_CH0_TX_PWRCTRL11
	.comm	_AR_PHY_CH0_TX_PWRCTRL13,4,2    ; @AR_PHY_CH0_TX_PWRCTRL13
	.no_dead_strip	_ath9k_hw_4k_set_board_values
.subsections_via_symbols
