	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function tegra_pcie_isr
_tegra_pcie_isr:                        ## @tegra_pcie_isr
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$136, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rsi, %r12
	movq	___stack_chk_guard@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	movq	%rax, -48(%rbp)
	movq	l___const.tegra_pcie_isr.err_msg+112(%rip), %rax
	movq	%rax, -64(%rbp)
	movaps	l___const.tegra_pcie_isr.err_msg+96(%rip), %xmm0
	movaps	%xmm0, -80(%rbp)
	movaps	l___const.tegra_pcie_isr.err_msg+80(%rip), %xmm0
	movaps	%xmm0, -96(%rbp)
	movaps	l___const.tegra_pcie_isr.err_msg+64(%rip), %xmm0
	movaps	%xmm0, -112(%rbp)
	movaps	l___const.tegra_pcie_isr.err_msg+48(%rip), %xmm0
	movaps	%xmm0, -128(%rbp)
	movaps	l___const.tegra_pcie_isr.err_msg+32(%rip), %xmm0
	movaps	%xmm0, -144(%rbp)
	movaps	l___const.tegra_pcie_isr.err_msg+16(%rip), %xmm0
	movaps	%xmm0, -160(%rbp)
	movaps	l___const.tegra_pcie_isr.err_msg(%rip), %xmm0
	movaps	%xmm0, -176(%rbp)
	movq	(%rsi), %r14
	movq	_AFI_INTR_CODE@GOTPCREL(%rip), %r13
	movl	(%r13), %esi
	movq	%r12, %rdi
	callq	_afi_readl
	movq	_AFI_INTR_CODE_MASK@GOTPCREL(%rip), %rcx
	andl	(%rcx), %eax
	movslq	%eax, %rbx
	movq	_AFI_INTR_SIGNATURE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r12, %rdi
	callq	_afi_readl
	movl	%eax, %r15d
	movl	(%r13), %edx
	movq	%r12, %rdi
	xorl	%esi, %esi
	callq	_afi_writel
	movq	_AFI_INTR_LEGACY@GOTPCREL(%rip), %rax
	cmpq	%rbx, (%rax)
	jne	LBB0_2
## %bb.1:
	movq	_IRQ_NONE@GOTPCREL(%rip), %r15
	jmp	LBB0_12
LBB0_2:
	movslq	%r15d, %r15
	leaq	-176(%rbp), %rdi
	callq	_ARRAY_SIZE
	xorl	%r13d, %r13d
	cmpq	%rbx, %rax
	cmovaq	%rbx, %r13
	movq	_AFI_INTR_MASTER_ABORT@GOTPCREL(%rip), %rbx
	movq	-176(%rbp,%r13,8), %rdx
	cmpq	(%rbx), %r13
	je	LBB0_4
## %bb.3:
	movq	_AFI_INTR_PE_PRSNT_SENSE@GOTPCREL(%rip), %rax
	cmpq	(%rax), %r13
	je	LBB0_4
## %bb.5:
	leaq	L_.str.15(%rip), %rsi
	movq	%r14, %rdi
	movq	%r15, %rcx
	xorl	%eax, %eax
	callq	_dev_err
	jmp	LBB0_6
LBB0_4:
	leaq	L_.str.15(%rip), %rsi
	movq	%r14, %rdi
	movq	%r15, %rcx
	xorl	%eax, %eax
	callq	_dev_dbg
LBB0_6:
	movq	_AFI_INTR_TARGET_ABORT@GOTPCREL(%rip), %rax
	movq	_IRQ_HANDLED@GOTPCREL(%rip), %r15
	cmpq	(%rax), %r13
	je	LBB0_9
## %bb.7:
	cmpq	(%rbx), %r13
	je	LBB0_9
## %bb.8:
	movq	_AFI_INTR_FPCI_DECODE_ERROR@GOTPCREL(%rip), %rax
	cmpq	(%rax), %r13
	jne	LBB0_12
LBB0_9:
	movq	_AFI_UPPER_FPCI_ADDRESS@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r12, %rdi
	callq	_afi_readl
	cmpq	(%rbx), %r13
	jne	LBB0_11
## %bb.10:
	leaq	L_.str.16(%rip), %rsi
	movq	%r14, %rdi
	xorl	%eax, %eax
	callq	_dev_dbg
	jmp	LBB0_12
LBB0_11:
	leaq	L_.str.16(%rip), %rsi
	movq	%r14, %rdi
	xorl	%eax, %eax
	callq	_dev_err
LBB0_12:
	movl	(%r15), %eax
	movq	___stack_chk_guard@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rcx
	cmpq	-48(%rbp), %rcx
	jne	LBB0_14
## %bb.13:
	addq	$136, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_14:
	callq	___stack_chk_fail
	.cfi_endproc
                                        ## -- End function
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"Unknown"

L_.str.1:                               ## @.str.1
	.asciz	"AXI slave error"

L_.str.2:                               ## @.str.2
	.asciz	"AXI decode error"

L_.str.3:                               ## @.str.3
	.asciz	"Target abort"

L_.str.4:                               ## @.str.4
	.asciz	"Master abort"

L_.str.5:                               ## @.str.5
	.asciz	"Invalid write"

L_.str.6:                               ## @.str.6
	.asciz	"Legacy interrupt"

L_.str.7:                               ## @.str.7
	.asciz	"Response decoding error"

L_.str.8:                               ## @.str.8
	.asciz	"AXI response decoding error"

L_.str.9:                               ## @.str.9
	.asciz	"Transaction timeout"

L_.str.10:                              ## @.str.10
	.asciz	"Slot present pin change"

L_.str.11:                              ## @.str.11
	.asciz	"Slot clock request change"

L_.str.12:                              ## @.str.12
	.asciz	"TMS clock ramp change"

L_.str.13:                              ## @.str.13
	.asciz	"TMS ready for power down"

L_.str.14:                              ## @.str.14
	.asciz	"Peer2Peer error"

	.section	__DATA,__const
	.p2align	4                               ## @__const.tegra_pcie_isr.err_msg
l___const.tegra_pcie_isr.err_msg:
	.quad	L_.str
	.quad	L_.str.1
	.quad	L_.str.2
	.quad	L_.str.3
	.quad	L_.str.4
	.quad	L_.str.5
	.quad	L_.str.6
	.quad	L_.str.7
	.quad	L_.str.8
	.quad	L_.str.9
	.quad	L_.str.10
	.quad	L_.str.11
	.quad	L_.str.12
	.quad	L_.str.13
	.quad	L_.str.14

	.comm	_AFI_INTR_CODE,4,2              ## @AFI_INTR_CODE
	.comm	_AFI_INTR_CODE_MASK,4,2         ## @AFI_INTR_CODE_MASK
	.comm	_AFI_INTR_SIGNATURE,4,2         ## @AFI_INTR_SIGNATURE
	.comm	_AFI_INTR_LEGACY,8,3            ## @AFI_INTR_LEGACY
	.comm	_IRQ_NONE,4,2                   ## @IRQ_NONE
	.comm	_AFI_INTR_MASTER_ABORT,8,3      ## @AFI_INTR_MASTER_ABORT
	.comm	_AFI_INTR_PE_PRSNT_SENSE,8,3    ## @AFI_INTR_PE_PRSNT_SENSE
	.section	__TEXT,__cstring,cstring_literals
L_.str.15:                              ## @.str.15
	.asciz	"%s, signature: %08x\n"

	.comm	_AFI_INTR_TARGET_ABORT,8,3      ## @AFI_INTR_TARGET_ABORT
	.comm	_AFI_INTR_FPCI_DECODE_ERROR,8,3 ## @AFI_INTR_FPCI_DECODE_ERROR
	.comm	_AFI_UPPER_FPCI_ADDRESS,4,2     ## @AFI_UPPER_FPCI_ADDRESS
L_.str.16:                              ## @.str.16
	.asciz	"  FPCI address: %10llx\n"

	.comm	_IRQ_HANDLED,4,2                ## @IRQ_HANDLED
	.no_dead_strip	_tegra_pcie_isr
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function tegra_pcie_isr
_tegra_pcie_isr:                        ; @tegra_pcie_isr
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #208
	.cfi_def_cfa_offset 208
	stp	x24, x23, [sp, #144]            ; 16-byte Folded Spill
	stp	x22, x21, [sp, #160]            ; 16-byte Folded Spill
	stp	x20, x19, [sp, #176]            ; 16-byte Folded Spill
	stp	x29, x30, [sp, #192]            ; 16-byte Folded Spill
	add	x29, sp, #192
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x19, x1
Lloh0:
	adrp	x8, ___stack_chk_guard@GOTPAGE
Lloh1:
	ldr	x8, [x8, ___stack_chk_guard@GOTPAGEOFF]
Lloh2:
	ldr	x8, [x8]
	stur	x8, [x29, #-56]
Lloh3:
	adrp	x8, l___const.tegra_pcie_isr.err_msg@PAGE
Lloh4:
	add	x8, x8, l___const.tegra_pcie_isr.err_msg@PAGEOFF
	ldp	q0, q1, [x8, #64]
	stp	q0, q1, [sp, #80]
	ldr	q0, [x8, #96]
	str	q0, [sp, #112]
	ldr	x9, [x8, #112]
	str	x9, [sp, #128]
	ldp	q0, q1, [x8]
	stp	q0, q1, [sp, #16]
	ldp	q0, q1, [x8, #32]
	stp	q0, q1, [sp, #48]
	ldr	x20, [x1]
Lloh5:
	adrp	x23, _AFI_INTR_CODE@GOTPAGE
Lloh6:
	ldr	x23, [x23, _AFI_INTR_CODE@GOTPAGEOFF]
	ldr	w1, [x23]
	mov	x0, x19
	bl	_afi_readl
Lloh7:
	adrp	x8, _AFI_INTR_CODE_MASK@GOTPAGE
Lloh8:
	ldr	x8, [x8, _AFI_INTR_CODE_MASK@GOTPAGEOFF]
Lloh9:
	ldr	w8, [x8]
	and	w8, w8, w0
	sxtw	x22, w8
Lloh10:
	adrp	x8, _AFI_INTR_SIGNATURE@GOTPAGE
Lloh11:
	ldr	x8, [x8, _AFI_INTR_SIGNATURE@GOTPAGEOFF]
Lloh12:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_afi_readl
	mov	x21, x0
	ldr	w2, [x23]
	mov	x0, x19
	mov	w1, #0
	bl	_afi_writel
Lloh13:
	adrp	x8, _AFI_INTR_LEGACY@GOTPAGE
Lloh14:
	ldr	x8, [x8, _AFI_INTR_LEGACY@GOTPAGEOFF]
Lloh15:
	ldr	x8, [x8]
	cmp	x8, x22
	b.ne	LBB0_2
; %bb.1:
Lloh16:
	adrp	x8, _IRQ_NONE@GOTPAGE
Lloh17:
	ldr	x8, [x8, _IRQ_NONE@GOTPAGEOFF]
	b	LBB0_13
LBB0_2:
	sxtw	x23, w21
	add	x24, sp, #16
	add	x0, sp, #16
	bl	_ARRAY_SIZE
	cmp	x0, x22
	csel	x21, x22, xzr, hi
Lloh18:
	adrp	x22, _AFI_INTR_MASTER_ABORT@GOTPAGE
Lloh19:
	ldr	x22, [x22, _AFI_INTR_MASTER_ABORT@GOTPAGEOFF]
	ldr	x9, [x22]
	ldr	x8, [x24, x21, lsl #3]
	cmp	x21, x9
	b.eq	LBB0_5
; %bb.3:
Lloh20:
	adrp	x9, _AFI_INTR_PE_PRSNT_SENSE@GOTPAGE
Lloh21:
	ldr	x9, [x9, _AFI_INTR_PE_PRSNT_SENSE@GOTPAGEOFF]
Lloh22:
	ldr	x9, [x9]
	cmp	x21, x9
	b.eq	LBB0_5
; %bb.4:
	stp	x8, x23, [sp]
Lloh23:
	adrp	x1, l_.str.15@PAGE
Lloh24:
	add	x1, x1, l_.str.15@PAGEOFF
	mov	x0, x20
	bl	_dev_err
	b	LBB0_6
LBB0_5:
	stp	x8, x23, [sp]
Lloh25:
	adrp	x1, l_.str.15@PAGE
Lloh26:
	add	x1, x1, l_.str.15@PAGEOFF
	mov	x0, x20
	bl	_dev_dbg
LBB0_6:
Lloh27:
	adrp	x8, _AFI_INTR_TARGET_ABORT@GOTPAGE
Lloh28:
	ldr	x8, [x8, _AFI_INTR_TARGET_ABORT@GOTPAGEOFF]
Lloh29:
	ldr	x8, [x8]
	cmp	x21, x8
	b.eq	LBB0_9
; %bb.7:
	ldr	x8, [x22]
	cmp	x21, x8
	b.eq	LBB0_9
; %bb.8:
Lloh30:
	adrp	x8, _AFI_INTR_FPCI_DECODE_ERROR@GOTPAGE
Lloh31:
	ldr	x8, [x8, _AFI_INTR_FPCI_DECODE_ERROR@GOTPAGEOFF]
Lloh32:
	ldr	x8, [x8]
	cmp	x21, x8
	b.ne	LBB0_12
LBB0_9:
Lloh33:
	adrp	x8, _AFI_UPPER_FPCI_ADDRESS@GOTPAGE
Lloh34:
	ldr	x8, [x8, _AFI_UPPER_FPCI_ADDRESS@GOTPAGEOFF]
Lloh35:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_afi_readl
	ldr	x8, [x22]
Lloh36:
	adrp	x1, l_.str.16@PAGE
Lloh37:
	add	x1, x1, l_.str.16@PAGEOFF
	mov	x0, x20
	cmp	x21, x8
	b.ne	LBB0_11
; %bb.10:
	bl	_dev_dbg
	b	LBB0_12
LBB0_11:
	bl	_dev_err
LBB0_12:
Lloh38:
	adrp	x8, _IRQ_HANDLED@GOTPAGE
Lloh39:
	ldr	x8, [x8, _IRQ_HANDLED@GOTPAGEOFF]
LBB0_13:
	ldr	w0, [x8]
	ldur	x8, [x29, #-56]
Lloh40:
	adrp	x9, ___stack_chk_guard@GOTPAGE
Lloh41:
	ldr	x9, [x9, ___stack_chk_guard@GOTPAGEOFF]
Lloh42:
	ldr	x9, [x9]
	cmp	x9, x8
	b.ne	LBB0_15
; %bb.14:
	ldp	x29, x30, [sp, #192]            ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #176]            ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #160]            ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #144]            ; 16-byte Folded Reload
	add	sp, sp, #208
	ret
LBB0_15:
	bl	___stack_chk_fail
	.loh AdrpLdrGotLdr	Lloh13, Lloh14, Lloh15
	.loh AdrpLdrGotLdr	Lloh10, Lloh11, Lloh12
	.loh AdrpLdrGotLdr	Lloh7, Lloh8, Lloh9
	.loh AdrpLdrGot	Lloh5, Lloh6
	.loh AdrpAdd	Lloh3, Lloh4
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGot	Lloh16, Lloh17
	.loh AdrpLdrGot	Lloh18, Lloh19
	.loh AdrpLdrGotLdr	Lloh20, Lloh21, Lloh22
	.loh AdrpAdd	Lloh23, Lloh24
	.loh AdrpAdd	Lloh25, Lloh26
	.loh AdrpLdrGotLdr	Lloh27, Lloh28, Lloh29
	.loh AdrpLdrGotLdr	Lloh30, Lloh31, Lloh32
	.loh AdrpAdd	Lloh36, Lloh37
	.loh AdrpLdrGotLdr	Lloh33, Lloh34, Lloh35
	.loh AdrpLdrGot	Lloh38, Lloh39
	.loh AdrpLdrGotLdr	Lloh40, Lloh41, Lloh42
	.cfi_endproc
                                        ; -- End function
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"Unknown"

l_.str.1:                               ; @.str.1
	.asciz	"AXI slave error"

l_.str.2:                               ; @.str.2
	.asciz	"AXI decode error"

l_.str.3:                               ; @.str.3
	.asciz	"Target abort"

l_.str.4:                               ; @.str.4
	.asciz	"Master abort"

l_.str.5:                               ; @.str.5
	.asciz	"Invalid write"

l_.str.6:                               ; @.str.6
	.asciz	"Legacy interrupt"

l_.str.7:                               ; @.str.7
	.asciz	"Response decoding error"

l_.str.8:                               ; @.str.8
	.asciz	"AXI response decoding error"

l_.str.9:                               ; @.str.9
	.asciz	"Transaction timeout"

l_.str.10:                              ; @.str.10
	.asciz	"Slot present pin change"

l_.str.11:                              ; @.str.11
	.asciz	"Slot clock request change"

l_.str.12:                              ; @.str.12
	.asciz	"TMS clock ramp change"

l_.str.13:                              ; @.str.13
	.asciz	"TMS ready for power down"

l_.str.14:                              ; @.str.14
	.asciz	"Peer2Peer error"

	.section	__DATA,__const
	.p2align	3                               ; @__const.tegra_pcie_isr.err_msg
l___const.tegra_pcie_isr.err_msg:
	.quad	l_.str
	.quad	l_.str.1
	.quad	l_.str.2
	.quad	l_.str.3
	.quad	l_.str.4
	.quad	l_.str.5
	.quad	l_.str.6
	.quad	l_.str.7
	.quad	l_.str.8
	.quad	l_.str.9
	.quad	l_.str.10
	.quad	l_.str.11
	.quad	l_.str.12
	.quad	l_.str.13
	.quad	l_.str.14

	.comm	_AFI_INTR_CODE,4,2              ; @AFI_INTR_CODE
	.comm	_AFI_INTR_CODE_MASK,4,2         ; @AFI_INTR_CODE_MASK
	.comm	_AFI_INTR_SIGNATURE,4,2         ; @AFI_INTR_SIGNATURE
	.comm	_AFI_INTR_LEGACY,8,3            ; @AFI_INTR_LEGACY
	.comm	_IRQ_NONE,4,2                   ; @IRQ_NONE
	.comm	_AFI_INTR_MASTER_ABORT,8,3      ; @AFI_INTR_MASTER_ABORT
	.comm	_AFI_INTR_PE_PRSNT_SENSE,8,3    ; @AFI_INTR_PE_PRSNT_SENSE
	.section	__TEXT,__cstring,cstring_literals
l_.str.15:                              ; @.str.15
	.asciz	"%s, signature: %08x\n"

	.comm	_AFI_INTR_TARGET_ABORT,8,3      ; @AFI_INTR_TARGET_ABORT
	.comm	_AFI_INTR_FPCI_DECODE_ERROR,8,3 ; @AFI_INTR_FPCI_DECODE_ERROR
	.comm	_AFI_UPPER_FPCI_ADDRESS,4,2     ; @AFI_UPPER_FPCI_ADDRESS
l_.str.16:                              ; @.str.16
	.asciz	"  FPCI address: %10llx\n"

	.comm	_IRQ_HANDLED,4,2                ; @IRQ_HANDLED
	.no_dead_strip	_tegra_pcie_isr
.subsections_via_symbols
