	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_qed_int_igu_read_sisr_reg      ## -- Begin function qed_int_igu_read_sisr_reg
	.p2align	4, 0x90
_qed_int_igu_read_sisr_reg:             ## @qed_int_igu_read_sisr_reg
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r14
	movq	_IGU_REG_SISR_MDPC_WMASK_LSB_UPPER@GOTPCREL(%rip), %rax
	movslq	(%rax), %rsi
	movq	_IGU_CMD_INT_ACK_BASE@GOTPCREL(%rip), %rax
	movslq	(%rax), %rax
	subq	%rax, %rsi
	movq	_IGU_REG_SISR_MDPC_WMASK_MSB_UPPER@GOTPCREL(%rip), %rcx
	movslq	(%rcx), %rbx
	subq	%rax, %rbx
	movq	_GTT_BAR0_MAP_REG_IGU_CMD@GOTPCREL(%rip), %r15
	shlq	$3, %rsi
	addq	(%r15), %rsi
	callq	_REG_RD
	shlq	$3, %rbx
	addq	(%r15), %rbx
	movq	%r14, %rdi
	movq	%rbx, %rsi
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_REG_RD                         ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_IGU_REG_SISR_MDPC_WMASK_LSB_UPPER,4,2 ## @IGU_REG_SISR_MDPC_WMASK_LSB_UPPER
	.comm	_IGU_CMD_INT_ACK_BASE,4,2       ## @IGU_CMD_INT_ACK_BASE
	.comm	_IGU_REG_SISR_MDPC_WMASK_MSB_UPPER,4,2 ## @IGU_REG_SISR_MDPC_WMASK_MSB_UPPER
	.comm	_GTT_BAR0_MAP_REG_IGU_CMD,8,3   ## @GTT_BAR0_MAP_REG_IGU_CMD
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_qed_int_igu_read_sisr_reg      ; -- Begin function qed_int_igu_read_sisr_reg
	.p2align	2
_qed_int_igu_read_sisr_reg:             ; @qed_int_igu_read_sisr_reg
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x0
Lloh0:
	adrp	x8, _IGU_REG_SISR_MDPC_WMASK_LSB_UPPER@GOTPAGE
Lloh1:
	ldr	x8, [x8, _IGU_REG_SISR_MDPC_WMASK_LSB_UPPER@GOTPAGEOFF]
Lloh2:
	adrp	x9, _IGU_CMD_INT_ACK_BASE@GOTPAGE
Lloh3:
	ldr	x9, [x9, _IGU_CMD_INT_ACK_BASE@GOTPAGEOFF]
Lloh4:
	ldr	w8, [x8]
Lloh5:
	ldr	w9, [x9]
	sub	w8, w8, w9
Lloh6:
	adrp	x10, _IGU_REG_SISR_MDPC_WMASK_MSB_UPPER@GOTPAGE
Lloh7:
	ldr	x10, [x10, _IGU_REG_SISR_MDPC_WMASK_MSB_UPPER@GOTPAGEOFF]
Lloh8:
	ldr	w10, [x10]
	sub	w20, w10, w9
Lloh9:
	adrp	x21, _GTT_BAR0_MAP_REG_IGU_CMD@GOTPAGE
Lloh10:
	ldr	x21, [x21, _GTT_BAR0_MAP_REG_IGU_CMD@GOTPAGEOFF]
	ldr	x9, [x21]
	lsl	w8, w8, #3
	add	x1, x9, w8, sxtw
	bl	_REG_RD
	ldr	x8, [x21]
	lsl	w9, w20, #3
	add	x1, x8, w9, sxtw
	mov	x0, x19
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	_REG_RD
	.loh AdrpLdrGot	Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh4
	.cfi_endproc
                                        ; -- End function
	.comm	_IGU_REG_SISR_MDPC_WMASK_LSB_UPPER,4,2 ; @IGU_REG_SISR_MDPC_WMASK_LSB_UPPER
	.comm	_IGU_CMD_INT_ACK_BASE,4,2       ; @IGU_CMD_INT_ACK_BASE
	.comm	_IGU_REG_SISR_MDPC_WMASK_MSB_UPPER,4,2 ; @IGU_REG_SISR_MDPC_WMASK_MSB_UPPER
	.comm	_GTT_BAR0_MAP_REG_IGU_CMD,8,3   ; @GTT_BAR0_MAP_REG_IGU_CMD
.subsections_via_symbols
