	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function phy_wr_cfg
_phy_wr_cfg:                            ## @phy_wr_cfg
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%edx, %eax
	movl	%esi, %r14d
	movq	%rdi, %r13
	movl	8(%rdi), %r15d
	movq	(%rdi), %rcx
	movl	(%rcx), %r12d
	movq	_PHY_CFG_DATA_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	movq	_PHY_CFG_DATA_SHIFT@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	movl	%eax, %edi
	callq	_HIWORD_UPDATE
	movl	%eax, %ebx
	movq	_PHY_CFG_ADDR_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_PHY_CFG_ADDR_SHIFT@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movl	%r14d, %edi
	callq	_HIWORD_UPDATE
	orl	%eax, %ebx
	movl	%r15d, %edi
	movl	%r12d, %esi
	movl	%ebx, %edx
	callq	_regmap_write
	movl	$1, %edi
	callq	_udelay
	movl	8(%r13), %r14d
	movq	(%r13), %rax
	movl	(%rax), %ebx
	movq	_PHY_CFG_WR_ENABLE@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_PHY_CFG_WR_MASK@GOTPCREL(%rip), %r15
	movl	(%r15), %esi
	movq	_PHY_CFG_WR_SHIFT@GOTPCREL(%rip), %r12
	movl	(%r12), %edx
	callq	_HIWORD_UPDATE
	movl	%r14d, %edi
	movl	%ebx, %esi
	movl	%eax, %edx
	callq	_regmap_write
	movl	$1, %edi
	callq	_udelay
	movl	8(%r13), %r14d
	movq	(%r13), %rax
	movl	(%rax), %ebx
	movq	_PHY_CFG_WR_DISABLE@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	(%r15), %esi
	movl	(%r12), %edx
	callq	_HIWORD_UPDATE
	movl	%r14d, %edi
	movl	%ebx, %esi
	movl	%eax, %edx
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_regmap_write                   ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_PHY_CFG_DATA_MASK,4,2          ## @PHY_CFG_DATA_MASK
	.comm	_PHY_CFG_DATA_SHIFT,4,2         ## @PHY_CFG_DATA_SHIFT
	.comm	_PHY_CFG_ADDR_MASK,4,2          ## @PHY_CFG_ADDR_MASK
	.comm	_PHY_CFG_ADDR_SHIFT,4,2         ## @PHY_CFG_ADDR_SHIFT
	.comm	_PHY_CFG_WR_ENABLE,4,2          ## @PHY_CFG_WR_ENABLE
	.comm	_PHY_CFG_WR_MASK,4,2            ## @PHY_CFG_WR_MASK
	.comm	_PHY_CFG_WR_SHIFT,4,2           ## @PHY_CFG_WR_SHIFT
	.comm	_PHY_CFG_WR_DISABLE,4,2         ## @PHY_CFG_WR_DISABLE
	.no_dead_strip	_phy_wr_cfg
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function phy_wr_cfg
_phy_wr_cfg:                            ; @phy_wr_cfg
	.cfi_startproc
; %bb.0:
	stp	x24, x23, [sp, #-64]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x8, x2
	mov	x20, x1
	mov	x19, x0
	ldr	w21, [x0, #8]
	ldr	x9, [x0]
	ldr	w22, [x9]
Lloh0:
	adrp	x9, _PHY_CFG_DATA_MASK@GOTPAGE
Lloh1:
	ldr	x9, [x9, _PHY_CFG_DATA_MASK@GOTPAGEOFF]
Lloh2:
	ldr	w1, [x9]
Lloh3:
	adrp	x9, _PHY_CFG_DATA_SHIFT@GOTPAGE
Lloh4:
	ldr	x9, [x9, _PHY_CFG_DATA_SHIFT@GOTPAGEOFF]
Lloh5:
	ldr	w2, [x9]
	mov	x0, x8
	bl	_HIWORD_UPDATE
	mov	x23, x0
Lloh6:
	adrp	x8, _PHY_CFG_ADDR_MASK@GOTPAGE
Lloh7:
	ldr	x8, [x8, _PHY_CFG_ADDR_MASK@GOTPAGEOFF]
Lloh8:
	ldr	w1, [x8]
Lloh9:
	adrp	x8, _PHY_CFG_ADDR_SHIFT@GOTPAGE
Lloh10:
	ldr	x8, [x8, _PHY_CFG_ADDR_SHIFT@GOTPAGEOFF]
Lloh11:
	ldr	w2, [x8]
	mov	x0, x20
	bl	_HIWORD_UPDATE
	orr	w2, w0, w23
	mov	x0, x21
	mov	x1, x22
	bl	_regmap_write
	mov	w0, #1
	bl	_udelay
	ldr	w20, [x19, #8]
	ldr	x8, [x19]
	ldr	w21, [x8]
Lloh12:
	adrp	x8, _PHY_CFG_WR_ENABLE@GOTPAGE
Lloh13:
	ldr	x8, [x8, _PHY_CFG_WR_ENABLE@GOTPAGEOFF]
Lloh14:
	ldr	w0, [x8]
Lloh15:
	adrp	x22, _PHY_CFG_WR_MASK@GOTPAGE
Lloh16:
	ldr	x22, [x22, _PHY_CFG_WR_MASK@GOTPAGEOFF]
	ldr	w1, [x22]
Lloh17:
	adrp	x23, _PHY_CFG_WR_SHIFT@GOTPAGE
Lloh18:
	ldr	x23, [x23, _PHY_CFG_WR_SHIFT@GOTPAGEOFF]
	ldr	w2, [x23]
	bl	_HIWORD_UPDATE
	mov	x2, x0
	mov	x0, x20
	mov	x1, x21
	bl	_regmap_write
	mov	w0, #1
	bl	_udelay
	ldr	w20, [x19, #8]
	ldr	x8, [x19]
	ldr	w19, [x8]
Lloh19:
	adrp	x8, _PHY_CFG_WR_DISABLE@GOTPAGE
Lloh20:
	ldr	x8, [x8, _PHY_CFG_WR_DISABLE@GOTPAGEOFF]
Lloh21:
	ldr	w0, [x8]
	ldr	w1, [x22]
	ldr	w2, [x23]
	bl	_HIWORD_UPDATE
	mov	x2, x0
	mov	x0, x20
	mov	x1, x19
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	b	_regmap_write
	.loh AdrpLdrGotLdr	Lloh19, Lloh20, Lloh21
	.loh AdrpLdrGot	Lloh17, Lloh18
	.loh AdrpLdrGot	Lloh15, Lloh16
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_PHY_CFG_DATA_MASK,4,2          ; @PHY_CFG_DATA_MASK
	.comm	_PHY_CFG_DATA_SHIFT,4,2         ; @PHY_CFG_DATA_SHIFT
	.comm	_PHY_CFG_ADDR_MASK,4,2          ; @PHY_CFG_ADDR_MASK
	.comm	_PHY_CFG_ADDR_SHIFT,4,2         ; @PHY_CFG_ADDR_SHIFT
	.comm	_PHY_CFG_WR_ENABLE,4,2          ; @PHY_CFG_WR_ENABLE
	.comm	_PHY_CFG_WR_MASK,4,2            ; @PHY_CFG_WR_MASK
	.comm	_PHY_CFG_WR_SHIFT,4,2           ; @PHY_CFG_WR_SHIFT
	.comm	_PHY_CFG_WR_DISABLE,4,2         ; @PHY_CFG_WR_DISABLE
	.no_dead_strip	_phy_wr_cfg
.subsections_via_symbols
