	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function mlx5_fpga_conn_post_recv
_mlx5_fpga_conn_post_recv:              ## @mlx5_fpga_conn_post_recv
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rsi, %r15
	movq	%rdi, %rbx
	callq	_mlx5_fpga_conn_map_buf
	movl	%eax, %r14d
	movl	%eax, %edi
	callq	_unlikely
	testq	%rax, %rax
	jne	LBB0_4
## %bb.1:
	movl	(%rbx), %eax
	subl	4(%rbx), %eax
	xorl	%edi, %edi
	cmpl	8(%rbx), %eax
	setge	%dil
	callq	_unlikely
	testq	%rax, %rax
	je	LBB0_3
## %bb.2:
	movq	%rbx, %rdi
	movq	%r15, %rsi
	callq	_mlx5_fpga_conn_unmap_buf
	movq	_EBUSY@GOTPCREL(%rip), %rax
	xorl	%r14d, %r14d
	subl	(%rax), %r14d
	jmp	LBB0_4
LBB0_3:
	movl	8(%rbx), %r12d
	decl	%r12d
	andl	(%rbx), %r12d
	leaq	24(%rbx), %rdi
	movl	%r12d, %esi
	callq	_mlx5_wq_cyc_get_wqe
	movq	%rax, %r13
	movq	(%r15), %rax
	movl	(%rax), %edi
	callq	_cpu_to_be32
	movq	%rax, 16(%r13)
	movq	32(%rbx), %rax
	movl	(%rax), %edi
	callq	_cpu_to_be32
	movq	%rax, 8(%r13)
	movq	(%r15), %rax
	movl	4(%rax), %edi
	callq	_cpu_to_be64
	movl	%eax, (%r13)
	incl	(%rbx)
	movq	16(%rbx), %rax
	movq	%r15, (%rax,%r12,8)
	xorl	%eax, %eax
	callq	_dma_wmb
	movzwl	(%rbx), %edi
	callq	_cpu_to_be32
	movq	24(%rbx), %rcx
	movq	%rax, (%rcx)
LBB0_4:
	movl	%r14d, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_EBUSY,4,2                      ## @EBUSY
	.no_dead_strip	_mlx5_fpga_conn_post_recv
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function mlx5_fpga_conn_post_recv
_mlx5_fpga_conn_post_recv:              ; @mlx5_fpga_conn_post_recv
	.cfi_startproc
; %bb.0:
	stp	x24, x23, [sp, #-64]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x21, x1
	mov	x20, x0
	bl	_mlx5_fpga_conn_map_buf
	mov	x19, x0
	bl	_unlikely
	cbnz	x0, LBB0_4
; %bb.1:
	ldp	w8, w9, [x20]
	ldr	w10, [x20, #8]
	sub	w8, w8, w9
	cmp	w8, w10
	cset	w0, ge
	bl	_unlikely
	cbz	x0, LBB0_3
; %bb.2:
	mov	x0, x20
	mov	x1, x21
	bl	_mlx5_fpga_conn_unmap_buf
Lloh0:
	adrp	x8, _EBUSY@GOTPAGE
Lloh1:
	ldr	x8, [x8, _EBUSY@GOTPAGEOFF]
Lloh2:
	ldr	w8, [x8]
	neg	w19, w8
	b	LBB0_4
LBB0_3:
	ldr	w8, [x20]
	ldr	w9, [x20, #8]
	sub	w9, w9, #1
	and	w22, w9, w8
	add	x0, x20, #24
	mov	x1, x22
	bl	_mlx5_wq_cyc_get_wqe
	mov	x23, x0
	ldr	x8, [x21]
	ldr	w0, [x8]
	bl	_cpu_to_be32
	str	x0, [x23, #16]
	ldr	x8, [x20, #32]
	ldr	w0, [x8]
	bl	_cpu_to_be32
	str	x0, [x23, #8]
	ldr	x8, [x21]
	ldr	w0, [x8, #4]
	bl	_cpu_to_be64
	str	w0, [x23]
	ldr	w8, [x20]
	add	w8, w8, #1
	str	w8, [x20]
	ldr	x8, [x20, #16]
	str	x21, [x8, w22, uxtw #3]
	bl	_dma_wmb
	ldrh	w0, [x20]
	bl	_cpu_to_be32
	ldr	x8, [x20, #24]
	str	x0, [x8]
LBB0_4:
	mov	x0, x19
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_EBUSY,4,2                      ; @EBUSY
	.no_dead_strip	_mlx5_fpga_conn_post_recv
.subsections_via_symbols
