	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function ath10k_pci_wake_target_cpu
_ath10k_pci_wake_target_cpu:            ## @ath10k_pci_wake_target_cpu
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r14
	pushq	%rbx
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	movq	%rdi, %r14
	movq	_SOC_CORE_BASE_ADDRESS@GOTPCREL(%rip), %rax
	movq	_CORE_CTRL_ADDRESS@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rbx
	addq	(%rax), %rbx
	movq	%rbx, %rsi
	callq	_ath10k_pci_read32
	movq	_CORE_CTRL_CPU_INTR_MASK@GOTPCREL(%rip), %rcx
	orq	(%rcx), %rax
	movq	%r14, %rdi
	movq	%rbx, %rsi
	movq	%rax, %rdx
	callq	_ath10k_pci_write32
	xorl	%eax, %eax
	popq	%rbx
	popq	%r14
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_SOC_CORE_BASE_ADDRESS,8,3      ## @SOC_CORE_BASE_ADDRESS
	.comm	_CORE_CTRL_ADDRESS,8,3          ## @CORE_CTRL_ADDRESS
	.comm	_CORE_CTRL_CPU_INTR_MASK,8,3    ## @CORE_CTRL_CPU_INTR_MASK
	.no_dead_strip	_ath10k_pci_wake_target_cpu
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function ath10k_pci_wake_target_cpu
_ath10k_pci_wake_target_cpu:            ; @ath10k_pci_wake_target_cpu
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x19, x0
Lloh0:
	adrp	x8, _SOC_CORE_BASE_ADDRESS@GOTPAGE
Lloh1:
	ldr	x8, [x8, _SOC_CORE_BASE_ADDRESS@GOTPAGEOFF]
Lloh2:
	ldr	x8, [x8]
Lloh3:
	adrp	x9, _CORE_CTRL_ADDRESS@GOTPAGE
Lloh4:
	ldr	x9, [x9, _CORE_CTRL_ADDRESS@GOTPAGEOFF]
Lloh5:
	ldr	x9, [x9]
	add	x20, x9, x8
	mov	x1, x20
	bl	_ath10k_pci_read32
Lloh6:
	adrp	x8, _CORE_CTRL_CPU_INTR_MASK@GOTPAGE
Lloh7:
	ldr	x8, [x8, _CORE_CTRL_CPU_INTR_MASK@GOTPAGEOFF]
Lloh8:
	ldr	x8, [x8]
	orr	x2, x8, x0
	mov	x0, x19
	mov	x1, x20
	bl	_ath10k_pci_write32
	mov	w0, #0
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_SOC_CORE_BASE_ADDRESS,8,3      ; @SOC_CORE_BASE_ADDRESS
	.comm	_CORE_CTRL_ADDRESS,8,3          ; @CORE_CTRL_ADDRESS
	.comm	_CORE_CTRL_CPU_INTR_MASK,8,3    ; @CORE_CTRL_CPU_INTR_MASK
	.no_dead_strip	_ath10k_pci_wake_target_cpu
.subsections_via_symbols
