	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function ar9003_hw_init_cal_soc
_ar9003_hw_init_cal_soc:                ## @ar9003_hw_init_cal_soc
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rsi, %r14
	movq	%rdi, %r12
	movl	16(%rdi), %esi
	movl	20(%rdi), %edx
	callq	_ar9003_hw_set_chain_masks
	movq	_TX_CL_CAL@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	andl	(%r12), %ebx
	je	LBB0_2
## %bb.1:
	movq	_AR_PHY_CL_CAL_CTL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_AR_PHY_CL_CAL_ENABLE@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r12, %rdi
	callq	_REG_SET_BIT
LBB0_2:
	movq	%r14, %rdi
	callq	_IS_CHAN_HALF_RATE
	testq	%rax, %rax
	jne	LBB0_10
## %bb.3:
	movq	%r14, %rdi
	callq	_IS_CHAN_QUARTER_RATE
	testq	%rax, %rax
	je	LBB0_4
LBB0_10:
	xorl	%r15d, %r15d
	testl	%ebx, %ebx
	je	LBB0_11
LBB0_12:
	movq	_AR9300_MAX_CHAINS@GOTPCREL(%rip), %r13
	movl	(%r13), %eax
	testl	%eax, %eax
	jle	LBB0_17
## %bb.13:
	xorl	%ebx, %ebx
	jmp	LBB0_14
	.p2align	4, 0x90
LBB0_16:                                ##   in Loop: Header=BB0_14 Depth=1
	incl	%ebx
	cmpl	%eax, %ebx
	jge	LBB0_17
LBB0_14:                                ## =>This Inner Loop Header: Depth=1
	movl	8(%r12), %ecx
	btl	%ebx, %ecx
	jae	LBB0_16
## %bb.15:                              ##   in Loop: Header=BB0_14 Depth=1
	movq	%r14, %rdi
	callq	_IS_CHAN_2GHZ
	movq	%r12, %rdi
	movl	%ebx, %esi
	movq	%rax, %rdx
	callq	_ar9003_hw_manual_peak_cal
	movl	(%r13), %eax
	jmp	LBB0_16
LBB0_17:
	movq	%r12, %rdi
	callq	_AR_SREV_9550
	testq	%rax, %rax
	je	LBB0_18
## %bb.21:
	testl	%r15d, %r15d
	je	LBB0_27
## %bb.22:
	movq	_MAXIQCAL@GOTPCREL(%rip), %r15
	cmpl	$0, (%r15)
	jle	LBB0_26
## %bb.23:
	xorl	%r14d, %r14d
	xorl	%ebx, %ebx
	.p2align	4, 0x90
LBB0_24:                                ## =>This Inner Loop Header: Depth=1
	movq	%r12, %rdi
	callq	_do_ar9003_agc_cal
	testl	%eax, %eax
	je	LBB0_29
## %bb.25:                              ##   in Loop: Header=BB0_24 Depth=1
	movq	%r12, %rdi
	movl	%ebx, %esi
	xorl	%edx, %edx
	callq	_ar9003_hw_tx_iq_cal_post_proc
	incl	%ebx
	cmpl	(%r15), %ebx
	jl	LBB0_24
	jmp	LBB0_26
LBB0_11:
	movq	_AH_FASTCC@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	testl	%eax, 4(%r12)
	jne	LBB0_26
	jmp	LBB0_12
LBB0_18:
	movq	%r12, %rdi
	callq	_do_ar9003_agc_cal
	testl	%eax, %eax
	je	LBB0_28
## %bb.19:
	testl	%r15d, %r15d
	je	LBB0_26
## %bb.20:
	movq	%r12, %rdi
	xorl	%esi, %esi
	xorl	%edx, %edx
	callq	_ar9003_hw_tx_iq_cal_post_proc
	jmp	LBB0_26
LBB0_27:
	movq	%r12, %rdi
	callq	_do_ar9003_agc_cal
	testl	%eax, %eax
	je	LBB0_28
LBB0_26:
	movl	8(%r12), %esi
	movl	12(%r12), %edx
	movq	%r12, %rdi
	callq	_ar9003_hw_set_chain_masks
	movq	%r12, %rdi
	callq	_ar9003_hw_init_cal_common
	movl	$1, %r14d
	jmp	LBB0_29
LBB0_4:
	movq	_AR_PHY_TX_IQCAL_CONTROL_1@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_AR_PHY_TX_IQCAL_CONTROL_1_IQCORR_I_Q_COFF_DELPT@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	_DELPT@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movq	%r12, %rdi
	callq	_REG_RMW_FIELD
	movq	_TX_IQ_ON_AGC_CAL@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	testl	%eax, (%r12)
	je	LBB0_6
## %bb.5:
	movq	_AR_PHY_TX_IQCAL_CONTROL_0@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_AR_PHY_TX_IQCAL_CONTROL_0_ENABLE_TXIQ_CAL@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r12, %rdi
	callq	_REG_READ_FIELD
	xorl	%r15d, %r15d
	testq	%rax, %rax
	setne	%r15b
	jmp	LBB0_7
LBB0_6:
	movq	%r12, %rdi
	callq	_ar9003_hw_tx_iq_cal_run
	movl	%eax, %r15d
	movq	_AR_PHY_ACTIVE@GOTPCREL(%rip), %rbx
	movl	(%rbx), %esi
	movq	_AR_PHY_ACTIVE_DIS@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r12, %rdi
	callq	_REG_WRITE
	movl	$5, %edi
	callq	_udelay
	movl	(%rbx), %esi
	movq	_AR_PHY_ACTIVE_EN@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r12, %rdi
	callq	_REG_WRITE
LBB0_7:
	movq	%r12, %rdi
	callq	_AR_SREV_9550
	testq	%rax, %rax
	je	LBB0_12
## %bb.8:
	movq	%r14, %rdi
	callq	_IS_CHAN_2GHZ
	testq	%rax, %rax
	je	LBB0_12
## %bb.9:
	movq	%r12, %rdi
	movl	%r15d, %esi
	callq	_ar9003_hw_dynamic_osdac_selection
	testl	%eax, %eax
	jne	LBB0_12
LBB0_28:
	xorl	%r14d, %r14d
LBB0_29:
	movl	%r14d, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_TX_CL_CAL,4,2                  ## @TX_CL_CAL
	.comm	_AR_PHY_CL_CAL_CTL,4,2          ## @AR_PHY_CL_CAL_CTL
	.comm	_AR_PHY_CL_CAL_ENABLE,4,2       ## @AR_PHY_CL_CAL_ENABLE
	.comm	_AR_PHY_TX_IQCAL_CONTROL_1,4,2  ## @AR_PHY_TX_IQCAL_CONTROL_1
	.comm	_AR_PHY_TX_IQCAL_CONTROL_1_IQCORR_I_Q_COFF_DELPT,4,2 ## @AR_PHY_TX_IQCAL_CONTROL_1_IQCORR_I_Q_COFF_DELPT
	.comm	_DELPT,4,2                      ## @DELPT
	.comm	_TX_IQ_ON_AGC_CAL,4,2           ## @TX_IQ_ON_AGC_CAL
	.comm	_AR_PHY_TX_IQCAL_CONTROL_0,4,2  ## @AR_PHY_TX_IQCAL_CONTROL_0
	.comm	_AR_PHY_TX_IQCAL_CONTROL_0_ENABLE_TXIQ_CAL,4,2 ## @AR_PHY_TX_IQCAL_CONTROL_0_ENABLE_TXIQ_CAL
	.comm	_AR_PHY_ACTIVE,4,2              ## @AR_PHY_ACTIVE
	.comm	_AR_PHY_ACTIVE_DIS,4,2          ## @AR_PHY_ACTIVE_DIS
	.comm	_AR_PHY_ACTIVE_EN,4,2           ## @AR_PHY_ACTIVE_EN
	.comm	_AH_FASTCC,4,2                  ## @AH_FASTCC
	.comm	_AR9300_MAX_CHAINS,4,2          ## @AR9300_MAX_CHAINS
	.comm	_MAXIQCAL,4,2                   ## @MAXIQCAL
	.no_dead_strip	_ar9003_hw_init_cal_soc
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function ar9003_hw_init_cal_soc
_ar9003_hw_init_cal_soc:                ; @ar9003_hw_init_cal_soc
	.cfi_startproc
; %bb.0:
	stp	x24, x23, [sp, #-64]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x20, x1
	mov	x19, x0
	ldp	w1, w2, [x0, #16]
	bl	_ar9003_hw_set_chain_masks
	ldr	w8, [x19]
Lloh0:
	adrp	x9, _TX_CL_CAL@GOTPAGE
Lloh1:
	ldr	x9, [x9, _TX_CL_CAL@GOTPAGEOFF]
Lloh2:
	ldr	w9, [x9]
	ands	w21, w9, w8
	b.eq	LBB0_2
; %bb.1:
Lloh3:
	adrp	x8, _AR_PHY_CL_CAL_CTL@GOTPAGE
Lloh4:
	ldr	x8, [x8, _AR_PHY_CL_CAL_CTL@GOTPAGEOFF]
Lloh5:
	ldr	w1, [x8]
Lloh6:
	adrp	x8, _AR_PHY_CL_CAL_ENABLE@GOTPAGE
Lloh7:
	ldr	x8, [x8, _AR_PHY_CL_CAL_ENABLE@GOTPAGEOFF]
Lloh8:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_REG_SET_BIT
LBB0_2:
	mov	x0, x20
	bl	_IS_CHAN_HALF_RATE
	cbnz	x0, LBB0_4
; %bb.3:
	mov	x0, x20
	bl	_IS_CHAN_QUARTER_RATE
	cbz	x0, LBB0_24
LBB0_4:
	cbz	w21, LBB0_17
LBB0_5:
	mov	w21, #0
LBB0_6:
Lloh9:
	adrp	x23, _AR9300_MAX_CHAINS@GOTPAGE
Lloh10:
	ldr	x23, [x23, _AR9300_MAX_CHAINS@GOTPAGEOFF]
	ldr	w8, [x23]
	cmp	w8, #1
	b.lt	LBB0_11
; %bb.7:
	mov	w22, #0
	b	LBB0_9
LBB0_8:                                 ;   in Loop: Header=BB0_9 Depth=1
	add	w22, w22, #1
	cmp	w22, w8
	b.ge	LBB0_11
LBB0_9:                                 ; =>This Inner Loop Header: Depth=1
	ldr	w9, [x19, #8]
	lsr	w9, w9, w22
	tbz	w9, #0, LBB0_8
; %bb.10:                               ;   in Loop: Header=BB0_9 Depth=1
	mov	x0, x20
	bl	_IS_CHAN_2GHZ
	mov	x2, x0
	mov	x0, x19
	mov	x1, x22
	bl	_ar9003_hw_manual_peak_cal
	ldr	w8, [x23]
	b	LBB0_8
LBB0_11:
	mov	x0, x19
	bl	_AR_SREV_9550
	cbz	x0, LBB0_18
; %bb.12:
	cbz	w21, LBB0_21
; %bb.13:
Lloh11:
	adrp	x21, _MAXIQCAL@GOTPAGE
Lloh12:
	ldr	x21, [x21, _MAXIQCAL@GOTPAGEOFF]
	ldr	w8, [x21]
	cmp	w8, #1
	b.lt	LBB0_22
; %bb.14:
	mov	w20, #0
LBB0_15:                                ; =>This Inner Loop Header: Depth=1
	mov	x0, x19
	bl	_do_ar9003_agc_cal
	cbz	w0, LBB0_23
; %bb.16:                               ;   in Loop: Header=BB0_15 Depth=1
	mov	x0, x19
	mov	x1, x20
	mov	w2, #0
	bl	_ar9003_hw_tx_iq_cal_post_proc
	add	w20, w20, #1
	ldr	w8, [x21]
	cmp	w20, w8
	b.lt	LBB0_15
	b	LBB0_22
LBB0_17:
	ldr	w8, [x19, #4]
Lloh13:
	adrp	x9, _AH_FASTCC@GOTPAGE
Lloh14:
	ldr	x9, [x9, _AH_FASTCC@GOTPAGEOFF]
Lloh15:
	ldr	w9, [x9]
	tst	w9, w8
	b.ne	LBB0_22
	b	LBB0_5
LBB0_18:
	mov	x0, x19
	bl	_do_ar9003_agc_cal
	cbz	w0, LBB0_23
; %bb.19:
	cbz	w21, LBB0_22
; %bb.20:
	mov	x0, x19
	mov	w1, #0
	mov	w2, #0
	bl	_ar9003_hw_tx_iq_cal_post_proc
	b	LBB0_22
LBB0_21:
	mov	x0, x19
	bl	_do_ar9003_agc_cal
	cbz	w0, LBB0_23
LBB0_22:
	ldp	w1, w2, [x19, #8]
	mov	x0, x19
	bl	_ar9003_hw_set_chain_masks
	mov	x0, x19
	bl	_ar9003_hw_init_cal_common
	mov	w0, #1
LBB0_23:
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	ret
LBB0_24:
Lloh16:
	adrp	x8, _AR_PHY_TX_IQCAL_CONTROL_1@GOTPAGE
Lloh17:
	ldr	x8, [x8, _AR_PHY_TX_IQCAL_CONTROL_1@GOTPAGEOFF]
Lloh18:
	ldr	w1, [x8]
Lloh19:
	adrp	x8, _AR_PHY_TX_IQCAL_CONTROL_1_IQCORR_I_Q_COFF_DELPT@GOTPAGE
Lloh20:
	ldr	x8, [x8, _AR_PHY_TX_IQCAL_CONTROL_1_IQCORR_I_Q_COFF_DELPT@GOTPAGEOFF]
Lloh21:
	ldr	w2, [x8]
Lloh22:
	adrp	x8, _DELPT@GOTPAGE
Lloh23:
	ldr	x8, [x8, _DELPT@GOTPAGEOFF]
Lloh24:
	ldr	w3, [x8]
	mov	x0, x19
	bl	_REG_RMW_FIELD
	ldr	w8, [x19]
Lloh25:
	adrp	x9, _TX_IQ_ON_AGC_CAL@GOTPAGE
Lloh26:
	ldr	x9, [x9, _TX_IQ_ON_AGC_CAL@GOTPAGEOFF]
Lloh27:
	ldr	w9, [x9]
	tst	w9, w8
	b.eq	LBB0_26
; %bb.25:
Lloh28:
	adrp	x8, _AR_PHY_TX_IQCAL_CONTROL_0@GOTPAGE
Lloh29:
	ldr	x8, [x8, _AR_PHY_TX_IQCAL_CONTROL_0@GOTPAGEOFF]
Lloh30:
	ldr	w1, [x8]
Lloh31:
	adrp	x8, _AR_PHY_TX_IQCAL_CONTROL_0_ENABLE_TXIQ_CAL@GOTPAGE
Lloh32:
	ldr	x8, [x8, _AR_PHY_TX_IQCAL_CONTROL_0_ENABLE_TXIQ_CAL@GOTPAGEOFF]
Lloh33:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_REG_READ_FIELD
	cmp	x0, #0
	cset	w21, ne
	b	LBB0_27
LBB0_26:
	mov	x0, x19
	bl	_ar9003_hw_tx_iq_cal_run
	mov	x21, x0
Lloh34:
	adrp	x22, _AR_PHY_ACTIVE@GOTPAGE
Lloh35:
	ldr	x22, [x22, _AR_PHY_ACTIVE@GOTPAGEOFF]
	ldr	w1, [x22]
Lloh36:
	adrp	x8, _AR_PHY_ACTIVE_DIS@GOTPAGE
Lloh37:
	ldr	x8, [x8, _AR_PHY_ACTIVE_DIS@GOTPAGEOFF]
Lloh38:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_REG_WRITE
	mov	w0, #5
	bl	_udelay
	ldr	w1, [x22]
Lloh39:
	adrp	x8, _AR_PHY_ACTIVE_EN@GOTPAGE
Lloh40:
	ldr	x8, [x8, _AR_PHY_ACTIVE_EN@GOTPAGEOFF]
Lloh41:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_REG_WRITE
LBB0_27:
	mov	x0, x19
	bl	_AR_SREV_9550
	cbz	x0, LBB0_6
; %bb.28:
	mov	x0, x20
	bl	_IS_CHAN_2GHZ
	cbz	x0, LBB0_6
; %bb.29:
	mov	x0, x19
	mov	x1, x21
	bl	_ar9003_hw_dynamic_osdac_selection
	cbnz	w0, LBB0_6
	b	LBB0_23
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGot	Lloh9, Lloh10
	.loh AdrpLdrGot	Lloh11, Lloh12
	.loh AdrpLdrGotLdr	Lloh13, Lloh14, Lloh15
	.loh AdrpLdrGotLdr	Lloh25, Lloh26, Lloh27
	.loh AdrpLdrGotLdr	Lloh22, Lloh23, Lloh24
	.loh AdrpLdrGotLdr	Lloh19, Lloh20, Lloh21
	.loh AdrpLdrGotLdr	Lloh16, Lloh17, Lloh18
	.loh AdrpLdrGotLdr	Lloh31, Lloh32, Lloh33
	.loh AdrpLdrGotLdr	Lloh28, Lloh29, Lloh30
	.loh AdrpLdrGotLdr	Lloh39, Lloh40, Lloh41
	.loh AdrpLdrGotLdr	Lloh36, Lloh37, Lloh38
	.loh AdrpLdrGot	Lloh34, Lloh35
	.cfi_endproc
                                        ; -- End function
	.comm	_TX_CL_CAL,4,2                  ; @TX_CL_CAL
	.comm	_AR_PHY_CL_CAL_CTL,4,2          ; @AR_PHY_CL_CAL_CTL
	.comm	_AR_PHY_CL_CAL_ENABLE,4,2       ; @AR_PHY_CL_CAL_ENABLE
	.comm	_AR_PHY_TX_IQCAL_CONTROL_1,4,2  ; @AR_PHY_TX_IQCAL_CONTROL_1
	.comm	_AR_PHY_TX_IQCAL_CONTROL_1_IQCORR_I_Q_COFF_DELPT,4,2 ; @AR_PHY_TX_IQCAL_CONTROL_1_IQCORR_I_Q_COFF_DELPT
	.comm	_DELPT,4,2                      ; @DELPT
	.comm	_TX_IQ_ON_AGC_CAL,4,2           ; @TX_IQ_ON_AGC_CAL
	.comm	_AR_PHY_TX_IQCAL_CONTROL_0,4,2  ; @AR_PHY_TX_IQCAL_CONTROL_0
	.comm	_AR_PHY_TX_IQCAL_CONTROL_0_ENABLE_TXIQ_CAL,4,2 ; @AR_PHY_TX_IQCAL_CONTROL_0_ENABLE_TXIQ_CAL
	.comm	_AR_PHY_ACTIVE,4,2              ; @AR_PHY_ACTIVE
	.comm	_AR_PHY_ACTIVE_DIS,4,2          ; @AR_PHY_ACTIVE_DIS
	.comm	_AR_PHY_ACTIVE_EN,4,2           ; @AR_PHY_ACTIVE_EN
	.comm	_AH_FASTCC,4,2                  ; @AH_FASTCC
	.comm	_AR9300_MAX_CHAINS,4,2          ; @AR9300_MAX_CHAINS
	.comm	_MAXIQCAL,4,2                   ; @MAXIQCAL
	.no_dead_strip	_ar9003_hw_init_cal_soc
.subsections_via_symbols
