	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function mvpp2_egress_enable
_mvpp2_egress_enable:                   ## @mvpp2_egress_enable
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r14
	pushq	%rbx
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	movq	%rdi, %r14
	callq	_mvpp2_egress_port
	movl	(%r14), %r8d
	testl	%r8d, %r8d
	jle	LBB0_1
## %bb.2:
	movq	8(%r14), %rsi
	cmpl	$1, %r8d
	jne	LBB0_4
## %bb.3:
	xorl	%edx, %edx
	xorl	%ebx, %ebx
LBB0_10:
	testb	$1, %r8b
	je	LBB0_12
## %bb.11:
	movl	$1, %edi
	movl	%edx, %ecx
	shll	%cl, %edi
	movq	(%rsi,%rdx,8), %rcx
	xorl	%edx, %edx
	cmpq	$0, (%rcx)
	cmovnel	%edi, %edx
	orl	%edx, %ebx
	jmp	LBB0_12
LBB0_1:
	xorl	%ebx, %ebx
LBB0_12:
	movl	4(%r14), %edi
	movq	_MVPP2_TXP_SCHED_PORT_INDEX_REG@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	movl	%eax, %edx
	callq	_mvpp2_write
	movl	4(%r14), %edi
	movq	_MVPP2_TXP_SCHED_Q_CMD_REG@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	%ebx, %edx
	popq	%rbx
	popq	%r14
	popq	%rbp
	jmp	_mvpp2_write                    ## TAILCALL
LBB0_4:
	movl	%r8d, %r9d
	andl	$-2, %r9d
	xorl	%edx, %edx
	xorl	%ebx, %ebx
	jmp	LBB0_5
	.p2align	4, 0x90
LBB0_9:                                 ##   in Loop: Header=BB0_5 Depth=1
	orl	%ecx, %ebx
	addq	$2, %rdx
	cmpq	%r9, %rdx
	je	LBB0_10
LBB0_5:                                 ## =>This Inner Loop Header: Depth=1
	movl	$1, %edi
	movl	%edx, %ecx
	shll	%cl, %edi
	movq	(%rsi,%rdx,8), %rcx
	cmpq	$0, (%rcx)
	movl	$0, %ecx
	je	LBB0_7
## %bb.6:                               ##   in Loop: Header=BB0_5 Depth=1
	movl	%edi, %ecx
LBB0_7:                                 ##   in Loop: Header=BB0_5 Depth=1
	orl	%ecx, %ebx
	leal	1(%rdx), %ecx
	movl	$1, %edi
                                        ## kill: def $cl killed $cl killed $ecx
	shll	%cl, %edi
	movq	8(%rsi,%rdx,8), %rcx
	cmpq	$0, (%rcx)
	movl	$0, %ecx
	je	LBB0_9
## %bb.8:                               ##   in Loop: Header=BB0_5 Depth=1
	movl	%edi, %ecx
	jmp	LBB0_9
	.cfi_endproc
                                        ## -- End function
	.comm	_MVPP2_TXP_SCHED_PORT_INDEX_REG,4,2 ## @MVPP2_TXP_SCHED_PORT_INDEX_REG
	.comm	_MVPP2_TXP_SCHED_Q_CMD_REG,4,2  ## @MVPP2_TXP_SCHED_Q_CMD_REG
	.no_dead_strip	_mvpp2_egress_enable
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function mvpp2_egress_enable
_mvpp2_egress_enable:                   ; @mvpp2_egress_enable
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x19, x0
	bl	_mvpp2_egress_port
	mov	x2, x0
	ldr	w8, [x19]
	cmp	w8, #1
	b.lt	LBB0_3
; %bb.1:
	ldr	x9, [x19, #8]
	cmp	w8, #4
	b.hs	LBB0_4
; %bb.2:
	mov	x10, #0
	mov	w20, #0
	b	LBB0_7
LBB0_3:
	mov	w20, #0
	b	LBB0_9
LBB0_4:
	mov	x15, #0
	mov	w13, #0
	mov	w14, #0
	mov	w12, #0
	mov	w11, #0
	and	x10, x8, #0xfffffffc
	add	x16, x9, #16
	mov	w17, #1
LBB0_5:                                 ; =>This Inner Loop Header: Depth=1
	add	w0, w15, #1
	add	w1, w15, #2
	add	w3, w15, #3
	ldp	x4, x5, [x16, #-16]
	ldp	x6, x7, [x16], #32
	ldr	x4, [x4]
	ldr	x5, [x5]
	ldr	x6, [x6]
	ldr	x7, [x7]
	lsl	w20, w17, w15
	lsl	w0, w17, w0
	lsl	w1, w17, w1
	lsl	w3, w17, w3
	cmp	x4, #0
	csel	w4, wzr, w20, eq
	cmp	x5, #0
	csel	w0, wzr, w0, eq
	cmp	x6, #0
	csel	w1, wzr, w1, eq
	cmp	x7, #0
	csel	w3, wzr, w3, eq
	orr	w13, w4, w13
	orr	w14, w0, w14
	orr	w12, w1, w12
	orr	w11, w3, w11
	add	x15, x15, #4
	cmp	x10, x15
	b.ne	LBB0_5
; %bb.6:
	orr	w13, w14, w13
	orr	w12, w12, w13
	orr	w20, w11, w12
	cmp	x10, x8
	b.eq	LBB0_9
LBB0_7:
	mov	w11, #1
LBB0_8:                                 ; =>This Inner Loop Header: Depth=1
	ldr	x12, [x9, x10, lsl #3]
	ldr	x12, [x12]
	lsl	w13, w11, w10
	cmp	x12, #0
	csel	w12, wzr, w13, eq
	orr	w20, w12, w20
	add	x10, x10, #1
	cmp	x8, x10
	b.ne	LBB0_8
LBB0_9:
	ldr	w0, [x19, #4]
Lloh0:
	adrp	x8, _MVPP2_TXP_SCHED_PORT_INDEX_REG@GOTPAGE
Lloh1:
	ldr	x8, [x8, _MVPP2_TXP_SCHED_PORT_INDEX_REG@GOTPAGEOFF]
Lloh2:
	ldr	w1, [x8]
	bl	_mvpp2_write
	ldr	w0, [x19, #4]
Lloh3:
	adrp	x8, _MVPP2_TXP_SCHED_Q_CMD_REG@GOTPAGE
Lloh4:
	ldr	x8, [x8, _MVPP2_TXP_SCHED_Q_CMD_REG@GOTPAGEOFF]
Lloh5:
	ldr	w1, [x8]
	mov	x2, x20
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	b	_mvpp2_write
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_MVPP2_TXP_SCHED_PORT_INDEX_REG,4,2 ; @MVPP2_TXP_SCHED_PORT_INDEX_REG
	.comm	_MVPP2_TXP_SCHED_Q_CMD_REG,4,2  ; @MVPP2_TXP_SCHED_Q_CMD_REG
	.no_dead_strip	_mvpp2_egress_enable
.subsections_via_symbols
