	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function ipw_fw_dma_reset_command_blocks
_ipw_fw_dma_reset_command_blocks:       ## @ipw_fw_dma_reset_command_blocks
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	movq	_IPW_SHARED_SRAM_DMA_CONTROL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_CB_NUMBER_OF_ELEMENTS_SMALL@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	shll	$2, %edx
	popq	%rbp
	jmp	_ipw_zero_memory                ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_IPW_SHARED_SRAM_DMA_CONTROL,4,2 ## @IPW_SHARED_SRAM_DMA_CONTROL
	.comm	_CB_NUMBER_OF_ELEMENTS_SMALL,4,2 ## @CB_NUMBER_OF_ELEMENTS_SMALL
	.no_dead_strip	_ipw_fw_dma_reset_command_blocks
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function ipw_fw_dma_reset_command_blocks
_ipw_fw_dma_reset_command_blocks:       ; @ipw_fw_dma_reset_command_blocks
	.cfi_startproc
; %bb.0:
Lloh0:
	adrp	x8, _IPW_SHARED_SRAM_DMA_CONTROL@GOTPAGE
Lloh1:
	ldr	x8, [x8, _IPW_SHARED_SRAM_DMA_CONTROL@GOTPAGEOFF]
Lloh2:
	adrp	x9, _CB_NUMBER_OF_ELEMENTS_SMALL@GOTPAGE
Lloh3:
	ldr	x9, [x9, _CB_NUMBER_OF_ELEMENTS_SMALL@GOTPAGEOFF]
Lloh4:
	ldr	w1, [x8]
Lloh5:
	ldr	w8, [x9]
	lsl	w2, w8, #2
	b	_ipw_zero_memory
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh4
	.cfi_endproc
                                        ; -- End function
	.comm	_IPW_SHARED_SRAM_DMA_CONTROL,4,2 ; @IPW_SHARED_SRAM_DMA_CONTROL
	.comm	_CB_NUMBER_OF_ELEMENTS_SMALL,4,2 ; @CB_NUMBER_OF_ELEMENTS_SMALL
	.no_dead_strip	_ipw_fw_dma_reset_command_blocks
.subsections_via_symbols
