	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function dw_pcie_prog_outbound_atu_unroll
_dw_pcie_prog_outbound_atu_unroll:      ## @dw_pcie_prog_outbound_atu_unroll
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$24, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%r9, -56(%rbp)                  ## 8-byte Spill
	movq	%r8, %r12
	movq	%rcx, %r15
	movl	%edx, -44(%rbp)                 ## 4-byte Spill
	movl	%esi, %r14d
	movq	%rdi, %rbx
	movq	_PCIE_ATU_UNR_LOWER_BASE@GOTPCREL(%rip), %rax
	movl	(%rax), %r13d
	movq	%rcx, %rdi
	callq	_lower_32_bits
	movq	%rbx, %rdi
	movl	%r14d, %esi
	movl	%r13d, %edx
	movq	%rax, %rcx
	callq	_dw_pcie_writel_ob_unroll
	movq	_PCIE_ATU_UNR_UPPER_BASE@GOTPCREL(%rip), %rax
	movl	(%rax), %r13d
	movq	%r15, %rdi
	callq	_upper_32_bits
	movq	%rbx, %rdi
	movl	%r14d, %esi
	movl	%r13d, %edx
	movq	%rax, %rcx
	callq	_dw_pcie_writel_ob_unroll
	movq	_PCIE_ATU_UNR_LIMIT@GOTPCREL(%rip), %rax
	movl	(%rax), %r13d
	movq	-56(%rbp), %rax                 ## 8-byte Reload
	leaq	(%r15,%rax), %rdi
	decq	%rdi
	callq	_lower_32_bits
	movq	%rbx, %rdi
	movl	%r14d, %esi
	movl	%r13d, %edx
	movq	%rax, %rcx
	callq	_dw_pcie_writel_ob_unroll
	movq	_PCIE_ATU_UNR_LOWER_TARGET@GOTPCREL(%rip), %rax
	movl	(%rax), %r15d
	movq	%r12, %rdi
	callq	_lower_32_bits
	movq	%rbx, %rdi
	movl	%r14d, %esi
	movl	%r15d, %edx
	movq	%rax, %rcx
	callq	_dw_pcie_writel_ob_unroll
	movq	_PCIE_ATU_UNR_UPPER_TARGET@GOTPCREL(%rip), %rax
	movl	(%rax), %r15d
	movq	%r12, %rdi
	callq	_upper_32_bits
	movq	%rbx, %rdi
	movl	%r14d, %esi
	movl	%r15d, %edx
	movq	%rax, %rcx
	callq	_dw_pcie_writel_ob_unroll
	movq	_PCIE_ATU_UNR_REGION_CTRL1@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movslq	-44(%rbp), %rcx                 ## 4-byte Folded Reload
	movq	%rbx, %rdi
	movl	%r14d, %esi
	callq	_dw_pcie_writel_ob_unroll
	movq	_PCIE_ATU_UNR_REGION_CTRL2@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	_PCIE_ATU_ENABLE@GOTPCREL(%rip), %rax
	movq	(%rax), %rcx
	movq	%rbx, %rdi
	movl	%r14d, %esi
	callq	_dw_pcie_writel_ob_unroll
	movq	_LINK_WAIT_MAX_IATU_RETRIES@GOTPCREL(%rip), %r13
	cmpq	$0, (%r13)
	jle	LBB0_4
## %bb.1:
	xorl	%r15d, %r15d
	movq	_LINK_WAIT_IATU@GOTPCREL(%rip), %r12
	.p2align	4, 0x90
LBB0_2:                                 ## =>This Inner Loop Header: Depth=1
	movq	_PCIE_ATU_UNR_REGION_CTRL2@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	movl	%r14d, %esi
	callq	_dw_pcie_readl_ob_unroll
	movq	_PCIE_ATU_ENABLE@GOTPCREL(%rip), %rcx
	testq	%rax, (%rcx)
	jne	LBB0_5
## %bb.3:                               ##   in Loop: Header=BB0_2 Depth=1
	movl	(%r12), %edi
	callq	_mdelay
	incq	%r15
	cmpq	(%r13), %r15
	jl	LBB0_2
LBB0_4:
	movl	(%rbx), %edi
	leaq	L_.str(%rip), %rsi
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_dev_err                        ## TAILCALL
LBB0_5:
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_PCIE_ATU_UNR_LOWER_BASE,4,2    ## @PCIE_ATU_UNR_LOWER_BASE
	.comm	_PCIE_ATU_UNR_UPPER_BASE,4,2    ## @PCIE_ATU_UNR_UPPER_BASE
	.comm	_PCIE_ATU_UNR_LIMIT,4,2         ## @PCIE_ATU_UNR_LIMIT
	.comm	_PCIE_ATU_UNR_LOWER_TARGET,4,2  ## @PCIE_ATU_UNR_LOWER_TARGET
	.comm	_PCIE_ATU_UNR_UPPER_TARGET,4,2  ## @PCIE_ATU_UNR_UPPER_TARGET
	.comm	_PCIE_ATU_UNR_REGION_CTRL1,4,2  ## @PCIE_ATU_UNR_REGION_CTRL1
	.comm	_PCIE_ATU_UNR_REGION_CTRL2,4,2  ## @PCIE_ATU_UNR_REGION_CTRL2
	.comm	_PCIE_ATU_ENABLE,8,3            ## @PCIE_ATU_ENABLE
	.comm	_LINK_WAIT_MAX_IATU_RETRIES,8,3 ## @LINK_WAIT_MAX_IATU_RETRIES
	.comm	_LINK_WAIT_IATU,4,2             ## @LINK_WAIT_IATU
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"Outbound iATU is not being enabled\n"

	.no_dead_strip	_dw_pcie_prog_outbound_atu_unroll
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function dw_pcie_prog_outbound_atu_unroll
_dw_pcie_prog_outbound_atu_unroll:      ; @dw_pcie_prog_outbound_atu_unroll
	.cfi_startproc
; %bb.0:
	stp	x26, x25, [sp, #-80]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	mov	x23, x5
	mov	x22, x4
	mov	x24, x3
	mov	x21, x2
	mov	x20, x1
	mov	x19, x0
Lloh0:
	adrp	x8, _PCIE_ATU_UNR_LOWER_BASE@GOTPAGE
Lloh1:
	ldr	x8, [x8, _PCIE_ATU_UNR_LOWER_BASE@GOTPAGEOFF]
Lloh2:
	ldr	w25, [x8]
	mov	x0, x3
	bl	_lower_32_bits
	mov	x3, x0
	mov	x0, x19
	mov	x1, x20
	mov	x2, x25
	bl	_dw_pcie_writel_ob_unroll
Lloh3:
	adrp	x8, _PCIE_ATU_UNR_UPPER_BASE@GOTPAGE
Lloh4:
	ldr	x8, [x8, _PCIE_ATU_UNR_UPPER_BASE@GOTPAGEOFF]
Lloh5:
	ldr	w25, [x8]
	mov	x0, x24
	bl	_upper_32_bits
	mov	x3, x0
	mov	x0, x19
	mov	x1, x20
	mov	x2, x25
	bl	_dw_pcie_writel_ob_unroll
Lloh6:
	adrp	x8, _PCIE_ATU_UNR_LIMIT@GOTPAGE
Lloh7:
	ldr	x8, [x8, _PCIE_ATU_UNR_LIMIT@GOTPAGEOFF]
Lloh8:
	ldr	w25, [x8]
	add	x8, x24, x23
	sub	x0, x8, #1
	bl	_lower_32_bits
	mov	x3, x0
	mov	x0, x19
	mov	x1, x20
	mov	x2, x25
	bl	_dw_pcie_writel_ob_unroll
Lloh9:
	adrp	x8, _PCIE_ATU_UNR_LOWER_TARGET@GOTPAGE
Lloh10:
	ldr	x8, [x8, _PCIE_ATU_UNR_LOWER_TARGET@GOTPAGEOFF]
Lloh11:
	ldr	w23, [x8]
	mov	x0, x22
	bl	_lower_32_bits
	mov	x3, x0
	mov	x0, x19
	mov	x1, x20
	mov	x2, x23
	bl	_dw_pcie_writel_ob_unroll
Lloh12:
	adrp	x8, _PCIE_ATU_UNR_UPPER_TARGET@GOTPAGE
Lloh13:
	ldr	x8, [x8, _PCIE_ATU_UNR_UPPER_TARGET@GOTPAGEOFF]
Lloh14:
	ldr	w23, [x8]
	mov	x0, x22
	bl	_upper_32_bits
	mov	x3, x0
	mov	x0, x19
	mov	x1, x20
	mov	x2, x23
	bl	_dw_pcie_writel_ob_unroll
Lloh15:
	adrp	x8, _PCIE_ATU_UNR_REGION_CTRL1@GOTPAGE
Lloh16:
	ldr	x8, [x8, _PCIE_ATU_UNR_REGION_CTRL1@GOTPAGEOFF]
Lloh17:
	ldr	w2, [x8]
	sxtw	x3, w21
	mov	x0, x19
	mov	x1, x20
	bl	_dw_pcie_writel_ob_unroll
Lloh18:
	adrp	x21, _PCIE_ATU_UNR_REGION_CTRL2@GOTPAGE
Lloh19:
	ldr	x21, [x21, _PCIE_ATU_UNR_REGION_CTRL2@GOTPAGEOFF]
	ldr	w2, [x21]
Lloh20:
	adrp	x22, _PCIE_ATU_ENABLE@GOTPAGE
Lloh21:
	ldr	x22, [x22, _PCIE_ATU_ENABLE@GOTPAGEOFF]
	ldr	x3, [x22]
	mov	x0, x19
	mov	x1, x20
	bl	_dw_pcie_writel_ob_unroll
Lloh22:
	adrp	x23, _LINK_WAIT_MAX_IATU_RETRIES@GOTPAGE
Lloh23:
	ldr	x23, [x23, _LINK_WAIT_MAX_IATU_RETRIES@GOTPAGEOFF]
	ldr	x8, [x23]
	cmp	x8, #1
	b.lt	LBB0_4
; %bb.1:
	mov	x24, #0
Lloh24:
	adrp	x25, _LINK_WAIT_IATU@GOTPAGE
Lloh25:
	ldr	x25, [x25, _LINK_WAIT_IATU@GOTPAGEOFF]
LBB0_2:                                 ; =>This Inner Loop Header: Depth=1
	ldr	w2, [x21]
	mov	x0, x19
	mov	x1, x20
	bl	_dw_pcie_readl_ob_unroll
	ldr	x8, [x22]
	tst	x8, x0
	b.ne	LBB0_5
; %bb.3:                                ;   in Loop: Header=BB0_2 Depth=1
	ldr	w0, [x25]
	bl	_mdelay
	add	x24, x24, #1
	ldr	x8, [x23]
	cmp	x24, x8
	b.lt	LBB0_2
LBB0_4:
	ldr	w0, [x19]
Lloh26:
	adrp	x1, l_.str@PAGE
Lloh27:
	add	x1, x1, l_.str@PAGEOFF
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp], #80             ; 16-byte Folded Reload
	b	_dev_err
LBB0_5:
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp], #80             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGot	Lloh22, Lloh23
	.loh AdrpLdrGot	Lloh20, Lloh21
	.loh AdrpLdrGot	Lloh18, Lloh19
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGot	Lloh24, Lloh25
	.loh AdrpAdd	Lloh26, Lloh27
	.cfi_endproc
                                        ; -- End function
	.comm	_PCIE_ATU_UNR_LOWER_BASE,4,2    ; @PCIE_ATU_UNR_LOWER_BASE
	.comm	_PCIE_ATU_UNR_UPPER_BASE,4,2    ; @PCIE_ATU_UNR_UPPER_BASE
	.comm	_PCIE_ATU_UNR_LIMIT,4,2         ; @PCIE_ATU_UNR_LIMIT
	.comm	_PCIE_ATU_UNR_LOWER_TARGET,4,2  ; @PCIE_ATU_UNR_LOWER_TARGET
	.comm	_PCIE_ATU_UNR_UPPER_TARGET,4,2  ; @PCIE_ATU_UNR_UPPER_TARGET
	.comm	_PCIE_ATU_UNR_REGION_CTRL1,4,2  ; @PCIE_ATU_UNR_REGION_CTRL1
	.comm	_PCIE_ATU_UNR_REGION_CTRL2,4,2  ; @PCIE_ATU_UNR_REGION_CTRL2
	.comm	_PCIE_ATU_ENABLE,8,3            ; @PCIE_ATU_ENABLE
	.comm	_LINK_WAIT_MAX_IATU_RETRIES,8,3 ; @LINK_WAIT_MAX_IATU_RETRIES
	.comm	_LINK_WAIT_IATU,4,2             ; @LINK_WAIT_IATU
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"Outbound iATU is not being enabled\n"

	.no_dead_strip	_dw_pcie_prog_outbound_atu_unroll
.subsections_via_symbols
