	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_pcie_bus_configure_settings    ## -- Begin function pcie_bus_configure_settings
	.p2align	4, 0x90
_pcie_bus_configure_settings:           ## @pcie_bus_configure_settings
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r14
	pushq	%rbx
	subq	$16, %rsp
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	movq	%rdi, %rbx
	movq	$0, -24(%rbp)
	movq	(%rdi), %rdi
	testq	%rdi, %rdi
	je	LBB0_7
## %bb.1:
	callq	_pci_is_pcie
	testl	%eax, %eax
	je	LBB0_7
## %bb.2:
	movq	_pcie_bus_config@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	movq	_PCIE_BUS_PEER2PEER@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jne	LBB0_4
## %bb.3:
	movq	$0, -24(%rbp)
LBB0_4:
	movq	_PCIE_BUS_SAFE@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jne	LBB0_6
## %bb.5:
	movq	(%rbx), %rdi
	movq	(%rdi), %rax
	movq	%rax, -24(%rbp)
	leaq	-24(%rbp), %r14
	movq	%r14, %rsi
	callq	_pcie_find_smpss
	movq	_pcie_find_smpss@GOTPCREL(%rip), %rsi
	movq	%rbx, %rdi
	movq	%r14, %rdx
	callq	_pci_walk_bus
LBB0_6:
	movq	(%rbx), %rdi
	leaq	-24(%rbp), %r14
	movq	%r14, %rsi
	callq	_pcie_bus_configure_set
	movq	_pcie_bus_configure_set@GOTPCREL(%rip), %rsi
	movq	%rbx, %rdi
	movq	%r14, %rdx
	callq	_pci_walk_bus
LBB0_7:
	addq	$16, %rsp
	popq	%rbx
	popq	%r14
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_pcie_bus_config,8,3            ## @pcie_bus_config
	.comm	_PCIE_BUS_PEER2PEER,8,3         ## @PCIE_BUS_PEER2PEER
	.comm	_PCIE_BUS_SAFE,8,3              ## @PCIE_BUS_SAFE
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_pcie_bus_configure_settings    ; -- Begin function pcie_bus_configure_settings
	.p2align	2
_pcie_bus_configure_settings:           ; @pcie_bus_configure_settings
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #48
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x19, x0
	str	xzr, [sp, #8]
	ldr	x0, [x0]
	cbz	x0, LBB0_7
; %bb.1:
	bl	_pci_is_pcie
	cbz	w0, LBB0_7
; %bb.2:
Lloh0:
	adrp	x8, _pcie_bus_config@GOTPAGE
Lloh1:
	ldr	x8, [x8, _pcie_bus_config@GOTPAGEOFF]
Lloh2:
	ldr	x8, [x8]
Lloh3:
	adrp	x9, _PCIE_BUS_PEER2PEER@GOTPAGE
Lloh4:
	ldr	x9, [x9, _PCIE_BUS_PEER2PEER@GOTPAGEOFF]
Lloh5:
	ldr	x9, [x9]
	cmp	x8, x9
	b.ne	LBB0_4
; %bb.3:
	str	xzr, [sp, #8]
LBB0_4:
Lloh6:
	adrp	x9, _PCIE_BUS_SAFE@GOTPAGE
Lloh7:
	ldr	x9, [x9, _PCIE_BUS_SAFE@GOTPAGEOFF]
Lloh8:
	ldr	x9, [x9]
	cmp	x8, x9
	b.ne	LBB0_6
; %bb.5:
	ldr	x0, [x19]
	ldr	x8, [x0]
	str	x8, [sp, #8]
	add	x1, sp, #8
	bl	_pcie_find_smpss
Lloh9:
	adrp	x1, _pcie_find_smpss@GOTPAGE
Lloh10:
	ldr	x1, [x1, _pcie_find_smpss@GOTPAGEOFF]
	add	x2, sp, #8
	mov	x0, x19
	bl	_pci_walk_bus
LBB0_6:
	ldr	x0, [x19]
	add	x1, sp, #8
	bl	_pcie_bus_configure_set
Lloh11:
	adrp	x1, _pcie_bus_configure_set@GOTPAGE
Lloh12:
	ldr	x1, [x1, _pcie_bus_configure_set@GOTPAGEOFF]
	add	x2, sp, #8
	mov	x0, x19
	bl	_pci_walk_bus
LBB0_7:
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #48
	ret
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGot	Lloh9, Lloh10
	.loh AdrpLdrGot	Lloh11, Lloh12
	.cfi_endproc
                                        ; -- End function
	.comm	_pcie_bus_config,8,3            ; @pcie_bus_config
	.comm	_PCIE_BUS_PEER2PEER,8,3         ; @PCIE_BUS_PEER2PEER
	.comm	_PCIE_BUS_SAFE,8,3              ; @PCIE_BUS_SAFE
.subsections_via_symbols
