	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function mt76x2_phy_tssi_init_cal
_mt76x2_phy_tssi_init_cal:              ## @mt76x2_phy_tssi_init_cal
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r15
	movq	8(%rdi), %r12
	callq	_mt76x2_tssi_enabled
	xorl	%ebx, %ebx
	testl	%eax, %eax
	je	LBB0_7
## %bb.1:
	movq	%r15, %rdi
	callq	_mt76x2_channel_silent
	testq	%rax, %rax
	jne	LBB0_7
## %bb.2:
	movq	(%r12), %rsi
	movq	_NL80211_BAND_5GHZ@GOTPCREL(%rip), %rax
	xorl	%r14d, %r14d
	cmpq	(%rax), %rsi
	jne	LBB0_4
## %bb.3:
	xorl	%edi, %edi
	callq	_BIT
	movl	%eax, %r14d
	movq	(%r12), %rsi
LBB0_4:
	movq	%r15, %rdi
	callq	_mt76x02_ext_pa_enabled
	testq	%rax, %rax
	je	LBB0_6
## %bb.5:
	movl	$8, %edi
	callq	_BIT
	orl	%eax, %r14d
LBB0_6:
	movq	_MCU_CAL_TSSI@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r15, %rdi
	movl	%r14d, %edx
	callq	_mt76x02_mcu_calibrate
	movl	$1, (%r15)
	movl	$1, %ebx
LBB0_7:
	movl	%ebx, %eax
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_NL80211_BAND_5GHZ,8,3          ## @NL80211_BAND_5GHZ
	.comm	_MCU_CAL_TSSI,4,2               ## @MCU_CAL_TSSI
	.no_dead_strip	_mt76x2_phy_tssi_init_cal
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function mt76x2_phy_tssi_init_cal
_mt76x2_phy_tssi_init_cal:              ; @mt76x2_phy_tssi_init_cal
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x0
	ldr	x21, [x0, #8]
	bl	_mt76x2_tssi_enabled
	cbz	w0, LBB0_9
; %bb.1:
	mov	x0, x19
	bl	_mt76x2_channel_silent
	cbz	x0, LBB0_3
; %bb.2:
	mov	w0, #0
	b	LBB0_9
LBB0_3:
	ldr	x1, [x21]
Lloh0:
	adrp	x8, _NL80211_BAND_5GHZ@GOTPAGE
Lloh1:
	ldr	x8, [x8, _NL80211_BAND_5GHZ@GOTPAGEOFF]
Lloh2:
	ldr	x8, [x8]
	cmp	x1, x8
	b.ne	LBB0_5
; %bb.4:
	mov	w0, #0
	bl	_BIT
	mov	x20, x0
	ldr	x1, [x21]
	b	LBB0_6
LBB0_5:
	mov	w20, #0
LBB0_6:
	mov	x0, x19
	bl	_mt76x02_ext_pa_enabled
	cbz	x0, LBB0_8
; %bb.7:
	mov	w0, #8
	bl	_BIT
	orr	w20, w0, w20
LBB0_8:
Lloh3:
	adrp	x8, _MCU_CAL_TSSI@GOTPAGE
Lloh4:
	ldr	x8, [x8, _MCU_CAL_TSSI@GOTPAGEOFF]
Lloh5:
	ldr	w1, [x8]
	mov	x0, x19
	mov	x2, x20
	bl	_mt76x02_mcu_calibrate
	mov	w0, #1
	str	w0, [x19]
LBB0_9:
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.cfi_endproc
                                        ; -- End function
	.comm	_NL80211_BAND_5GHZ,8,3          ; @NL80211_BAND_5GHZ
	.comm	_MCU_CAL_TSSI,4,2               ; @MCU_CAL_TSSI
	.no_dead_strip	_mt76x2_phy_tssi_init_cal
.subsections_via_symbols
