	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function rockchip_pcie_ep_send_legacy_irq
_rockchip_pcie_ep_send_legacy_irq:      ## @rockchip_pcie_ep_send_legacy_irq
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%edx, %r14d
	movl	%esi, %r15d
	movq	%rdi, %r12
	movl	%esi, %edi
	callq	_ROCKCHIP_PCIE_EP_FUNC_BASE
	movq	_ROCKCHIP_PCIE_EP_CMD_STATUS@GOTPCREL(%rip), %rcx
	addq	(%rcx), %rax
	movq	%r12, %rdi
	movq	%rax, %rsi
	callq	_rockchip_pcie_read
	movq	_PCI_COMMAND_INTX_DISABLE@GOTPCREL(%rip), %rcx
	testl	%eax, (%rcx)
	je	LBB0_2
## %bb.1:
	movq	_EINVAL@GOTPCREL(%rip), %rax
	xorl	%ebx, %ebx
	subl	(%rax), %ebx
	jmp	LBB0_3
LBB0_2:
	movq	%r12, %rdi
	movl	%r15d, %esi
	movl	%r14d, %edx
	movl	$1, %ecx
	callq	_rockchip_pcie_ep_assert_intx
	movl	$1, %edi
	callq	_mdelay
	xorl	%ebx, %ebx
	movq	%r12, %rdi
	movl	%r15d, %esi
	movl	%r14d, %edx
	xorl	%ecx, %ecx
	callq	_rockchip_pcie_ep_assert_intx
LBB0_3:
	movl	%ebx, %eax
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_ROCKCHIP_PCIE_EP_CMD_STATUS,8,3 ## @ROCKCHIP_PCIE_EP_CMD_STATUS
	.comm	_PCI_COMMAND_INTX_DISABLE,4,2   ## @PCI_COMMAND_INTX_DISABLE
	.comm	_EINVAL,4,2                     ## @EINVAL
	.no_dead_strip	_rockchip_pcie_ep_send_legacy_irq
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function rockchip_pcie_ep_send_legacy_irq
_rockchip_pcie_ep_send_legacy_irq:      ; @rockchip_pcie_ep_send_legacy_irq
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x2
	mov	x20, x1
	mov	x21, x0
	mov	x0, x1
	bl	_ROCKCHIP_PCIE_EP_FUNC_BASE
Lloh0:
	adrp	x8, _ROCKCHIP_PCIE_EP_CMD_STATUS@GOTPAGE
Lloh1:
	ldr	x8, [x8, _ROCKCHIP_PCIE_EP_CMD_STATUS@GOTPAGEOFF]
Lloh2:
	ldr	x8, [x8]
	add	x1, x8, x0
	mov	x0, x21
	bl	_rockchip_pcie_read
Lloh3:
	adrp	x8, _PCI_COMMAND_INTX_DISABLE@GOTPAGE
Lloh4:
	ldr	x8, [x8, _PCI_COMMAND_INTX_DISABLE@GOTPAGEOFF]
Lloh5:
	ldr	w8, [x8]
	tst	w8, w0
	b.eq	LBB0_2
; %bb.1:
Lloh6:
	adrp	x8, _EINVAL@GOTPAGE
Lloh7:
	ldr	x8, [x8, _EINVAL@GOTPAGEOFF]
Lloh8:
	ldr	w8, [x8]
	neg	w0, w8
	b	LBB0_3
LBB0_2:
	mov	x0, x21
	mov	x1, x20
	mov	x2, x19
	mov	w3, #1
	bl	_rockchip_pcie_ep_assert_intx
	mov	w0, #1
	bl	_mdelay
	mov	x0, x21
	mov	x1, x20
	mov	x2, x19
	mov	w3, #0
	bl	_rockchip_pcie_ep_assert_intx
	mov	w0, #0
LBB0_3:
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.cfi_endproc
                                        ; -- End function
	.comm	_ROCKCHIP_PCIE_EP_CMD_STATUS,8,3 ; @ROCKCHIP_PCIE_EP_CMD_STATUS
	.comm	_PCI_COMMAND_INTX_DISABLE,4,2   ; @PCI_COMMAND_INTX_DISABLE
	.comm	_EINVAL,4,2                     ; @EINVAL
	.no_dead_strip	_rockchip_pcie_ep_send_legacy_irq
.subsections_via_symbols
