	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function mvpp2_prs_vlan_add
_mvpp2_prs_vlan_add:                    ## @mvpp2_prs_vlan_add
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$24, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%ecx, %r15d
	movl	%edx, %r12d
	movl	%esi, %ebx
	movq	%rdi, %r14
	leaq	-48(%rbp), %rdi
	xorl	%esi, %esi
	movl	$4, %edx
	callq	_memset
	movq	%r14, %rdi
	movl	%ebx, %esi
	movl	%r12d, %edx
	callq	_mvpp2_prs_vlan_find
	testl	%eax, %eax
	js	LBB0_1
## %bb.14:
	leaq	-48(%rbp), %rsi
	movq	%r14, %rdi
	movl	%eax, %edx
	callq	_mvpp2_prs_init_from_hw
LBB0_15:
	leaq	-48(%rbp), %rbx
	movq	%rbx, %rdi
	movl	%r15d, %esi
	callq	_mvpp2_prs_tcam_port_map_set
	movq	%r14, %rdi
	movq	%rbx, %rsi
	callq	_mvpp2_prs_hw_write
	xorl	%eax, %eax
LBB0_16:
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_1:
	movl	%ebx, -60(%rbp)                 ## 4-byte Spill
	movl	%r12d, -64(%rbp)                ## 4-byte Spill
	movq	_MVPP2_PE_LAST_FREE_TID@GOTPCREL(%rip), %r12
	movl	(%r12), %esi
	movq	_MVPP2_PE_FIRST_FREE_TID@GOTPCREL(%rip), %rbx
	movl	(%rbx), %edx
	movq	%r14, %rdi
	callq	_mvpp2_prs_tcam_first_free
	testl	%eax, %eax
	js	LBB0_16
## %bb.2:
	movl	(%r12), %ecx
	movl	(%rbx), %esi
	cmpl	%esi, %ecx
	jl	LBB0_11
## %bb.3:
	movq	%rbx, %r12
	movl	%eax, -52(%rbp)                 ## 4-byte Spill
	movl	%r15d, -56(%rbp)                ## 4-byte Spill
	movslq	%ecx, %r15
	movq	%r15, %rbx
	shlq	$4, %rbx
	orq	$8, %rbx
	movq	_MVPP2_PRS_LU_VLAN@GOTPCREL(%rip), %rax
	jmp	LBB0_4
	.p2align	4, 0x90
LBB0_9:                                 ##   in Loop: Header=BB0_4 Depth=1
	leaq	-1(%r15), %rcx
	movslq	%esi, %rdx
	addq	$-16, %rbx
	cmpq	%rdx, %r15
	movq	%rcx, %r15
	jle	LBB0_10
LBB0_4:                                 ## =>This Inner Loop Header: Depth=1
	movq	(%r14), %rcx
	cmpl	$0, (%rcx,%rbx)
	je	LBB0_9
## %bb.5:                               ##   in Loop: Header=BB0_4 Depth=1
	movq	-8(%rcx,%rbx), %rcx
	cmpq	(%rax), %rcx
	jne	LBB0_9
## %bb.6:                               ##   in Loop: Header=BB0_4 Depth=1
	movq	%r14, %r13
	movq	%r14, %rdi
	leaq	-48(%rbp), %r14
	movq	%r14, %rsi
	movl	%r15d, %edx
	callq	_mvpp2_prs_init_from_hw
	movq	%r14, %rdi
	callq	_mvpp2_prs_sram_ri_get
	movq	_MVPP2_PRS_RI_VLAN_MASK@GOTPCREL(%rip), %rcx
	andl	(%rcx), %eax
	movq	_MVPP2_PRS_RI_VLAN_DOUBLE@GOTPCREL(%rip), %rcx
	cmpl	(%rcx), %eax
	je	LBB0_7
## %bb.8:                               ##   in Loop: Header=BB0_4 Depth=1
	movl	(%r12), %esi
	movq	_MVPP2_PRS_LU_VLAN@GOTPCREL(%rip), %rax
	movq	%r13, %r14
	jmp	LBB0_9
LBB0_7:
	movq	%r15, %rcx
	movq	%r13, %r14
LBB0_10:
	movl	-56(%rbp), %r15d                ## 4-byte Reload
	movl	-52(%rbp), %eax                 ## 4-byte Reload
LBB0_11:
	cmpl	%ecx, %eax
	jle	LBB0_12
## %bb.13:
	leaq	-48(%rbp), %r12
	xorl	%ebx, %ebx
	movq	%r12, %rdi
	xorl	%esi, %esi
	movl	%eax, %r13d
	movl	$4, %edx
	callq	_memset
	movl	%r13d, -48(%rbp)
	movl	%r15d, %r13d
	movq	_MVPP2_PRS_LU_VLAN@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	movq	%r12, %rdi
	callq	_mvpp2_prs_tcam_lu_set
	movzwl	-60(%rbp), %edx                 ## 2-byte Folded Reload
	movq	%r12, %rdi
	xorl	%esi, %esi
	callq	_mvpp2_prs_match_etype
	movq	_MVPP2_PRS_LU_VID@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r12, %rdi
	movq	%r12, %r15
	callq	_mvpp2_prs_sram_next_lu_set
	movq	_MVPP2_PRS_SRAM_AI_MASK@GOTPCREL(%rip), %r12
	movl	(%r12), %edx
	movq	%r15, %rdi
	xorl	%esi, %esi
	callq	_mvpp2_prs_sram_ai_update
	movq	_MVPP2_PRS_SINGLE_VLAN_AI@GOTPCREL(%rip), %rax
	movl	-64(%rbp), %ecx                 ## 4-byte Reload
	cmpl	%ecx, (%rax)
	movq	_MVPP2_PRS_DBL_VLAN_AI_BIT@GOTPCREL(%rip), %rax
	cmovnel	(%rax), %ebx
	movq	_MVPP2_PRS_RI_VLAN_TRIPLE@GOTPCREL(%rip), %rax
	cmoveq	_MVPP2_PRS_RI_VLAN_SINGLE@GOTPCREL(%rip), %rax
	orl	%ecx, %ebx
	movl	(%rax), %esi
	movq	_MVPP2_PRS_RI_VLAN_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r15, %rdi
	callq	_mvpp2_prs_sram_ri_update
	movl	(%r12), %edx
	movq	%r15, %rdi
	movl	%ebx, %esi
	callq	_mvpp2_prs_tcam_ai_update
	movl	-48(%rbp), %esi
	movq	_MVPP2_PRS_LU_VLAN@GOTPCREL(%rip), %rax
	movq	(%rax), %rdx
	movl	%r13d, %r15d
	movq	%r14, %rdi
	callq	_mvpp2_prs_shadow_set
	jmp	LBB0_15
LBB0_12:
	movq	_EINVAL@GOTPCREL(%rip), %rcx
	xorl	%eax, %eax
	subl	(%rcx), %eax
	jmp	LBB0_16
	.cfi_endproc
                                        ## -- End function
	.comm	_MVPP2_PE_LAST_FREE_TID,4,2     ## @MVPP2_PE_LAST_FREE_TID
	.comm	_MVPP2_PE_FIRST_FREE_TID,4,2    ## @MVPP2_PE_FIRST_FREE_TID
	.comm	_MVPP2_PRS_LU_VLAN,8,3          ## @MVPP2_PRS_LU_VLAN
	.comm	_MVPP2_PRS_RI_VLAN_MASK,4,2     ## @MVPP2_PRS_RI_VLAN_MASK
	.comm	_MVPP2_PRS_RI_VLAN_DOUBLE,4,2   ## @MVPP2_PRS_RI_VLAN_DOUBLE
	.comm	_EINVAL,4,2                     ## @EINVAL
	.comm	_MVPP2_PRS_LU_VID,4,2           ## @MVPP2_PRS_LU_VID
	.comm	_MVPP2_PRS_SRAM_AI_MASK,4,2     ## @MVPP2_PRS_SRAM_AI_MASK
	.comm	_MVPP2_PRS_SINGLE_VLAN_AI,4,2   ## @MVPP2_PRS_SINGLE_VLAN_AI
	.comm	_MVPP2_PRS_RI_VLAN_SINGLE,4,2   ## @MVPP2_PRS_RI_VLAN_SINGLE
	.comm	_MVPP2_PRS_DBL_VLAN_AI_BIT,4,2  ## @MVPP2_PRS_DBL_VLAN_AI_BIT
	.comm	_MVPP2_PRS_RI_VLAN_TRIPLE,4,2   ## @MVPP2_PRS_RI_VLAN_TRIPLE
	.no_dead_strip	_mvpp2_prs_vlan_add
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function mvpp2_prs_vlan_add
_mvpp2_prs_vlan_add:                    ; @mvpp2_prs_vlan_add
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #112
	.cfi_def_cfa_offset 112
	stp	x28, x27, [sp, #16]             ; 16-byte Folded Spill
	stp	x26, x25, [sp, #32]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #48]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #64]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #80]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #96]             ; 16-byte Folded Spill
	add	x29, sp, #96
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	mov	x20, x3
	mov	x21, x2
	mov	x22, x1
	mov	x19, x0
	add	x0, sp, #8
	mov	w1, #0
	mov	w2, #4
	bl	_memset
	mov	x0, x19
	mov	x1, x22
	mov	x2, x21
	bl	_mvpp2_prs_vlan_find
	tbnz	w0, #31, LBB0_4
; %bb.1:
	mov	x2, x0
	add	x1, sp, #8
	mov	x0, x19
	bl	_mvpp2_prs_init_from_hw
LBB0_2:
	add	x0, sp, #8
	mov	x1, x20
	bl	_mvpp2_prs_tcam_port_map_set
	add	x1, sp, #8
	mov	x0, x19
	bl	_mvpp2_prs_hw_write
	mov	w23, #0
LBB0_3:
	mov	x0, x23
	ldp	x29, x30, [sp, #96]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #80]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #64]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #48]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #32]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #112
	ret
LBB0_4:
Lloh0:
	adrp	x24, _MVPP2_PE_LAST_FREE_TID@GOTPAGE
Lloh1:
	ldr	x24, [x24, _MVPP2_PE_LAST_FREE_TID@GOTPAGEOFF]
	ldr	w1, [x24]
Lloh2:
	adrp	x27, _MVPP2_PE_FIRST_FREE_TID@GOTPAGE
Lloh3:
	ldr	x27, [x27, _MVPP2_PE_FIRST_FREE_TID@GOTPAGEOFF]
	ldr	w2, [x27]
	mov	x0, x19
	bl	_mvpp2_prs_tcam_first_free
	mov	x23, x0
	tbnz	w0, #31, LBB0_3
; %bb.5:
	ldr	w9, [x24]
	ldr	w8, [x27]
Lloh4:
	adrp	x25, _MVPP2_PRS_LU_VLAN@GOTPAGE
Lloh5:
	ldr	x25, [x25, _MVPP2_PRS_LU_VLAN@GOTPAGEOFF]
	cmp	w9, w8
	b.lt	LBB0_13
; %bb.6:
                                        ; kill: def $w9 killed $w9 killed $x9 def $x9
	sxtw	x24, w9
	lsl	x28, x24, #4
Lloh6:
	adrp	x26, _MVPP2_PRS_RI_VLAN_DOUBLE@GOTPAGE
Lloh7:
	ldr	x26, [x26, _MVPP2_PRS_RI_VLAN_DOUBLE@GOTPAGEOFF]
	b	LBB0_8
LBB0_7:                                 ;   in Loop: Header=BB0_8 Depth=1
	sub	x9, x24, #1
	sub	x28, x28, #16
	cmp	x24, w8, sxtw
	mov	x24, x9
	b.le	LBB0_13
LBB0_8:                                 ; =>This Inner Loop Header: Depth=1
	ldr	x9, [x19]
	add	x10, x9, x28
	ldr	w10, [x10, #8]
	cbz	w10, LBB0_7
; %bb.9:                                ;   in Loop: Header=BB0_8 Depth=1
	ldr	x9, [x9, x28]
	ldr	x10, [x25]
	cmp	x9, x10
	b.ne	LBB0_7
; %bb.10:                               ;   in Loop: Header=BB0_8 Depth=1
	add	x1, sp, #8
	mov	x0, x19
	mov	x2, x24
	bl	_mvpp2_prs_init_from_hw
	add	x0, sp, #8
	bl	_mvpp2_prs_sram_ri_get
Lloh8:
	adrp	x8, _MVPP2_PRS_RI_VLAN_MASK@GOTPAGE
Lloh9:
	ldr	x8, [x8, _MVPP2_PRS_RI_VLAN_MASK@GOTPAGEOFF]
Lloh10:
	ldr	w8, [x8]
	and	w8, w8, w0
	ldr	w9, [x26]
	cmp	w8, w9
	b.eq	LBB0_12
; %bb.11:                               ;   in Loop: Header=BB0_8 Depth=1
	ldr	w8, [x27]
	b	LBB0_7
LBB0_12:
	mov	x9, x24
LBB0_13:
	cmp	w23, w9
	b.le	LBB0_15
; %bb.14:
	add	x0, sp, #8
	mov	w1, #0
	mov	w2, #4
	bl	_memset
	str	w23, [sp, #8]
	ldr	x1, [x25]
	add	x0, sp, #8
	bl	_mvpp2_prs_tcam_lu_set
	add	x0, sp, #8
	mov	w1, #0
	mov	x2, x22
	bl	_mvpp2_prs_match_etype
Lloh11:
	adrp	x8, _MVPP2_PRS_LU_VID@GOTPAGE
Lloh12:
	ldr	x8, [x8, _MVPP2_PRS_LU_VID@GOTPAGEOFF]
Lloh13:
	ldr	w1, [x8]
	add	x0, sp, #8
	bl	_mvpp2_prs_sram_next_lu_set
Lloh14:
	adrp	x22, _MVPP2_PRS_SRAM_AI_MASK@GOTPAGE
Lloh15:
	ldr	x22, [x22, _MVPP2_PRS_SRAM_AI_MASK@GOTPAGEOFF]
	ldr	w2, [x22]
	add	x0, sp, #8
	mov	w1, #0
	bl	_mvpp2_prs_sram_ai_update
Lloh16:
	adrp	x8, _MVPP2_PRS_SINGLE_VLAN_AI@GOTPAGE
Lloh17:
	ldr	x8, [x8, _MVPP2_PRS_SINGLE_VLAN_AI@GOTPAGEOFF]
Lloh18:
	adrp	x9, _MVPP2_PRS_DBL_VLAN_AI_BIT@GOTPAGE
Lloh19:
	ldr	x9, [x9, _MVPP2_PRS_DBL_VLAN_AI_BIT@GOTPAGEOFF]
Lloh20:
	ldr	w8, [x8]
Lloh21:
	ldr	w9, [x9]
	cmp	w8, w21
	csel	w8, wzr, w9, eq
Lloh22:
	adrp	x9, _MVPP2_PRS_RI_VLAN_SINGLE@GOTPAGE
Lloh23:
	ldr	x9, [x9, _MVPP2_PRS_RI_VLAN_SINGLE@GOTPAGEOFF]
	orr	w21, w8, w21
Lloh24:
	adrp	x8, _MVPP2_PRS_RI_VLAN_TRIPLE@GOTPAGE
Lloh25:
	ldr	x8, [x8, _MVPP2_PRS_RI_VLAN_TRIPLE@GOTPAGEOFF]
	csel	x8, x9, x8, eq
	ldr	w1, [x8]
Lloh26:
	adrp	x8, _MVPP2_PRS_RI_VLAN_MASK@GOTPAGE
Lloh27:
	ldr	x8, [x8, _MVPP2_PRS_RI_VLAN_MASK@GOTPAGEOFF]
Lloh28:
	ldr	w2, [x8]
	add	x0, sp, #8
	bl	_mvpp2_prs_sram_ri_update
	ldr	w2, [x22]
	add	x0, sp, #8
	mov	x1, x21
	bl	_mvpp2_prs_tcam_ai_update
	ldr	w1, [sp, #8]
	ldr	x2, [x25]
	mov	x0, x19
	bl	_mvpp2_prs_shadow_set
	b	LBB0_2
LBB0_15:
Lloh29:
	adrp	x8, _EINVAL@GOTPAGE
Lloh30:
	ldr	x8, [x8, _EINVAL@GOTPAGEOFF]
Lloh31:
	ldr	w8, [x8]
	neg	w23, w8
	b	LBB0_3
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGot	Lloh4, Lloh5
	.loh AdrpLdrGot	Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh26, Lloh27, Lloh28
	.loh AdrpLdrGot	Lloh24, Lloh25
	.loh AdrpLdrGot	Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh21
	.loh AdrpLdrGotLdr	Lloh16, Lloh17, Lloh20
	.loh AdrpLdrGot	Lloh14, Lloh15
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh29, Lloh30, Lloh31
	.cfi_endproc
                                        ; -- End function
	.comm	_MVPP2_PE_LAST_FREE_TID,4,2     ; @MVPP2_PE_LAST_FREE_TID
	.comm	_MVPP2_PE_FIRST_FREE_TID,4,2    ; @MVPP2_PE_FIRST_FREE_TID
	.comm	_MVPP2_PRS_LU_VLAN,8,3          ; @MVPP2_PRS_LU_VLAN
	.comm	_MVPP2_PRS_RI_VLAN_MASK,4,2     ; @MVPP2_PRS_RI_VLAN_MASK
	.comm	_MVPP2_PRS_RI_VLAN_DOUBLE,4,2   ; @MVPP2_PRS_RI_VLAN_DOUBLE
	.comm	_EINVAL,4,2                     ; @EINVAL
	.comm	_MVPP2_PRS_LU_VID,4,2           ; @MVPP2_PRS_LU_VID
	.comm	_MVPP2_PRS_SRAM_AI_MASK,4,2     ; @MVPP2_PRS_SRAM_AI_MASK
	.comm	_MVPP2_PRS_SINGLE_VLAN_AI,4,2   ; @MVPP2_PRS_SINGLE_VLAN_AI
	.comm	_MVPP2_PRS_RI_VLAN_SINGLE,4,2   ; @MVPP2_PRS_RI_VLAN_SINGLE
	.comm	_MVPP2_PRS_DBL_VLAN_AI_BIT,4,2  ; @MVPP2_PRS_DBL_VLAN_AI_BIT
	.comm	_MVPP2_PRS_RI_VLAN_TRIPLE,4,2   ; @MVPP2_PRS_RI_VLAN_TRIPLE
	.no_dead_strip	_mvpp2_prs_vlan_add
.subsections_via_symbols
