	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function pci_configure_mps
_pci_configure_mps:                     ## @pci_configure_mps
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %rbx
	callq	_pci_upstream_bridge
	movq	%rax, %r15
	movq	%rbx, %rdi
	callq	_pci_is_pcie
	testl	%eax, %eax
	je	LBB0_12
## %bb.1:
	testq	%r15, %r15
	je	LBB0_12
## %bb.2:
	movq	%r15, %rdi
	callq	_pci_is_pcie
	testl	%eax, %eax
	je	LBB0_12
## %bb.3:
	cmpq	$0, 8(%rbx)
	jne	LBB0_12
## %bb.4:
	movq	%rbx, %rdi
	callq	_pcie_get_mps
	movl	%eax, %r14d
	movq	%r15, %rdi
	callq	_pcie_get_mps
	cmpl	%eax, %r14d
	je	LBB0_12
## %bb.5:
	movl	%eax, %r12d
	movq	_pcie_bus_config@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	movq	_PCIE_BUS_TUNE_OFF@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jne	LBB0_6
## %bb.13:
	movq	%r15, %rdi
	callq	_pci_name
	leaq	L_.str(%rip), %rsi
	movq	%rbx, %rdi
	movl	%r14d, %edx
	movl	%eax, %ecx
	movl	%r12d, %r8d
	xorl	%eax, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_pci_warn                       ## TAILCALL
LBB0_6:
	movq	_PCIE_BUS_DEFAULT@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jne	LBB0_12
## %bb.7:
	movb	(%rbx), %cl
	movl	$128, %r13d
	shll	%cl, %r13d
	cmpl	%r12d, %r13d
	jge	LBB0_10
## %bb.8:
	movq	%r15, %rdi
	callq	_pci_pcie_type
	movq	_PCI_EXP_TYPE_ROOT_PORT@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jne	LBB0_10
## %bb.9:
	movq	%r15, %rdi
	movl	%r13d, %esi
	callq	_pcie_set_mps
	movb	(%r15), %cl
	movl	$128, %r8d
	shll	%cl, %r8d
	leaq	L_.str.1(%rip), %rsi
	movq	%rbx, %rdi
	movl	%r13d, %edx
	movl	%r12d, %ecx
	callq	_pci_info
	movq	%r15, %rdi
	callq	_pcie_get_mps
	movl	%eax, %r12d
LBB0_10:
	movq	%rbx, %rdi
	movl	%r12d, %esi
	callq	_pcie_set_mps
	testl	%eax, %eax
	je	LBB0_11
## %bb.14:
	leaq	L_.str.2(%rip), %rsi
	movq	%rbx, %rdi
	movl	%r12d, %edx
	xorl	%eax, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_pci_warn                       ## TAILCALL
LBB0_12:
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_11:
	leaq	L_.str.3(%rip), %rsi
	movq	%rbx, %rdi
	movl	%r12d, %edx
	movl	%r14d, %ecx
	movl	%r13d, %r8d
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_pci_info                       ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_pcie_bus_config,8,3            ## @pcie_bus_config
	.comm	_PCIE_BUS_TUNE_OFF,8,3          ## @PCIE_BUS_TUNE_OFF
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"Max Payload Size %d, but upstream %s set to %d; if necessary, use \"pci=pcie_bus_safe\" and report a bug\n"

	.comm	_PCIE_BUS_DEFAULT,8,3           ## @PCIE_BUS_DEFAULT
	.comm	_PCI_EXP_TYPE_ROOT_PORT,8,3     ## @PCI_EXP_TYPE_ROOT_PORT
L_.str.1:                               ## @.str.1
	.asciz	"Upstream bridge's Max Payload Size set to %d (was %d, max %d)\n"

L_.str.2:                               ## @.str.2
	.asciz	"can't set Max Payload Size to %d; if necessary, use \"pci=pcie_bus_safe\" and report a bug\n"

L_.str.3:                               ## @.str.3
	.asciz	"Max Payload Size set to %d (was %d, max %d)\n"

	.no_dead_strip	_pci_configure_mps
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function pci_configure_mps
_pci_configure_mps:                     ; @pci_configure_mps
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #80
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x19, x0
	bl	_pci_upstream_bridge
	mov	x21, x0
	mov	x0, x19
	bl	_pci_is_pcie
	cbz	w0, LBB0_13
; %bb.1:
	cbz	x21, LBB0_13
; %bb.2:
	mov	x0, x21
	bl	_pci_is_pcie
	cbz	w0, LBB0_13
; %bb.3:
	ldr	x8, [x19, #8]
	cbnz	x8, LBB0_13
; %bb.4:
	mov	x0, x19
	bl	_pcie_get_mps
	mov	x20, x0
	mov	x0, x21
	bl	_pcie_get_mps
	cmp	w20, w0
	b.eq	LBB0_13
; %bb.5:
	mov	x22, x0
Lloh0:
	adrp	x8, _pcie_bus_config@GOTPAGE
Lloh1:
	ldr	x8, [x8, _pcie_bus_config@GOTPAGEOFF]
Lloh2:
	ldr	x8, [x8]
Lloh3:
	adrp	x9, _PCIE_BUS_TUNE_OFF@GOTPAGE
Lloh4:
	ldr	x9, [x9, _PCIE_BUS_TUNE_OFF@GOTPAGEOFF]
Lloh5:
	ldr	x9, [x9]
	cmp	x8, x9
	b.ne	LBB0_7
; %bb.6:
	mov	x0, x21
	bl	_pci_name
                                        ; kill: def $w0 killed $w0 def $x0
	stp	x0, x22, [sp]
Lloh6:
	adrp	x1, l_.str@PAGE
Lloh7:
	add	x1, x1, l_.str@PAGEOFF
	mov	x0, x19
	mov	x2, x20
	bl	_pci_warn
	b	LBB0_13
LBB0_7:
Lloh8:
	adrp	x9, _PCIE_BUS_DEFAULT@GOTPAGE
Lloh9:
	ldr	x9, [x9, _PCIE_BUS_DEFAULT@GOTPAGEOFF]
Lloh10:
	ldr	x9, [x9]
	cmp	x8, x9
	b.ne	LBB0_13
; %bb.8:
	ldr	w8, [x19]
	mov	w9, #128
	lsl	w23, w9, w8
	cmp	w23, w22
	b.ge	LBB0_11
; %bb.9:
	mov	x0, x21
	bl	_pci_pcie_type
Lloh11:
	adrp	x8, _PCI_EXP_TYPE_ROOT_PORT@GOTPAGE
Lloh12:
	ldr	x8, [x8, _PCI_EXP_TYPE_ROOT_PORT@GOTPAGEOFF]
Lloh13:
	ldr	x8, [x8]
	cmp	x0, x8
	b.ne	LBB0_11
; %bb.10:
	mov	x0, x21
	mov	x1, x23
	bl	_pcie_set_mps
	ldr	w8, [x21]
	mov	w9, #128
	lsl	w4, w9, w8
Lloh14:
	adrp	x1, l_.str.1@PAGE
Lloh15:
	add	x1, x1, l_.str.1@PAGEOFF
	mov	x0, x19
	mov	x2, x23
	mov	x3, x22
	bl	_pci_info
	mov	x0, x21
	bl	_pcie_get_mps
	mov	x22, x0
LBB0_11:
	mov	x0, x19
	mov	x1, x22
	bl	_pcie_set_mps
	cbz	w0, LBB0_14
; %bb.12:
Lloh16:
	adrp	x1, l_.str.2@PAGE
Lloh17:
	add	x1, x1, l_.str.2@PAGEOFF
	mov	x0, x19
	mov	x2, x22
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #80
	b	_pci_warn
LBB0_13:
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #80
	ret
LBB0_14:
Lloh18:
	adrp	x1, l_.str.3@PAGE
Lloh19:
	add	x1, x1, l_.str.3@PAGEOFF
	mov	x0, x19
	mov	x2, x22
	mov	x3, x20
	mov	x4, x23
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #80
	b	_pci_info
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpAdd	Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpAdd	Lloh14, Lloh15
	.loh AdrpAdd	Lloh16, Lloh17
	.loh AdrpAdd	Lloh18, Lloh19
	.cfi_endproc
                                        ; -- End function
	.comm	_pcie_bus_config,8,3            ; @pcie_bus_config
	.comm	_PCIE_BUS_TUNE_OFF,8,3          ; @PCIE_BUS_TUNE_OFF
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"Max Payload Size %d, but upstream %s set to %d; if necessary, use \"pci=pcie_bus_safe\" and report a bug\n"

	.comm	_PCIE_BUS_DEFAULT,8,3           ; @PCIE_BUS_DEFAULT
	.comm	_PCI_EXP_TYPE_ROOT_PORT,8,3     ; @PCI_EXP_TYPE_ROOT_PORT
l_.str.1:                               ; @.str.1
	.asciz	"Upstream bridge's Max Payload Size set to %d (was %d, max %d)\n"

l_.str.2:                               ; @.str.2
	.asciz	"can't set Max Payload Size to %d; if necessary, use \"pci=pcie_bus_safe\" and report a bug\n"

l_.str.3:                               ; @.str.3
	.asciz	"Max Payload Size set to %d (was %d, max %d)\n"

	.no_dead_strip	_pci_configure_mps
.subsections_via_symbols
