	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function dw_plat_pcie_probe
_dw_plat_pcie_probe:                    ## @dw_plat_pcie_probe
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %rbx
	movq	_dw_plat_pcie_of_match@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	%rbx, %rsi
	callq	_of_match_device
	testq	%rax, %rax
	je	LBB0_1
## %bb.3:
	movq	(%rax), %rax
	movl	(%rax), %r12d
	movq	_GFP_KERNEL@GOTPCREL(%rip), %r15
	movl	(%r15), %edx
	movq	%rbx, %rdi
	movl	$16, %esi
	callq	_devm_kzalloc
	testq	%rax, %rax
	je	LBB0_4
## %bb.5:
	movq	%rax, %r14
	movl	(%r15), %edx
	movq	%rbx, %rdi
	movl	$24, %esi
	callq	_devm_kzalloc
	testq	%rax, %rax
	je	LBB0_4
## %bb.6:
	movq	%rax, %r15
	movq	%rbx, 16(%rax)
	movq	_dw_pcie_ops@GOTPCREL(%rip), %rax
	movq	%rax, 8(%r15)
	movq	%r15, 8(%r14)
	movl	%r12d, (%r14)
	movq	_IORESOURCE_MEM@GOTPCREL(%rip), %r12
	movl	(%r12), %esi
	leaq	L_.str(%rip), %rdx
	movq	%rbx, %rdi
	callq	_platform_get_resource_byname
	testq	%rax, %rax
	jne	LBB0_8
## %bb.7:
	movl	(%r12), %esi
	movq	%rbx, %rdi
	xorl	%edx, %edx
	callq	_platform_get_resource
LBB0_8:
	movq	%rbx, %rdi
	movq	%rax, %rsi
	callq	_devm_ioremap_resource
	movl	%eax, (%r15)
	movl	%eax, %edi
	callq	_IS_ERR
	testq	%rax, %rax
	je	LBB0_9
## %bb.20:
	movl	(%r15), %edi
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_PTR_ERR                        ## TAILCALL
LBB0_4:
	movq	_ENOMEM@GOTPCREL(%rip), %rcx
	jmp	LBB0_2
LBB0_1:
	movq	_EINVAL@GOTPCREL(%rip), %rcx
LBB0_2:
	xorl	%eax, %eax
	subl	(%rcx), %eax
LBB0_19:
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_9:
	movq	%rbx, %rdi
	movq	%r14, %rsi
	callq	_platform_set_drvdata
	movl	(%r14), %edx
	cmpl	$129, %edx
	je	LBB0_15
## %bb.10:
	cmpl	$128, %edx
	jne	LBB0_17
## %bb.11:
	movq	_CONFIG_PCIE_DW_PLAT_HOST@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_IS_ENABLED
	testl	%eax, %eax
	je	LBB0_12
## %bb.13:
	movq	%r14, %rdi
	movq	%rbx, %rsi
	callq	_dw_plat_add_pcie_port
	jmp	LBB0_14
LBB0_15:
	movq	_CONFIG_PCIE_DW_PLAT_EP@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_IS_ENABLED
	testl	%eax, %eax
	je	LBB0_12
## %bb.16:
	movq	%r14, %rdi
	movq	%rbx, %rsi
	callq	_dw_plat_add_pcie_ep
LBB0_14:
	testl	%eax, %eax
	jns	LBB0_18
	jmp	LBB0_19
LBB0_17:
	leaq	L_.str.1(%rip), %rsi
	movq	%rbx, %rdi
	callq	_dev_err
LBB0_18:
	xorl	%eax, %eax
	jmp	LBB0_19
LBB0_12:
	movq	_ENODEV@GOTPCREL(%rip), %rcx
	jmp	LBB0_2
	.cfi_endproc
                                        ## -- End function
	.comm	_dw_plat_pcie_of_match,4,2      ## @dw_plat_pcie_of_match
	.comm	_EINVAL,4,2                     ## @EINVAL
	.comm	_GFP_KERNEL,4,2                 ## @GFP_KERNEL
	.comm	_ENOMEM,4,2                     ## @ENOMEM
	.comm	_dw_pcie_ops,4,2                ## @dw_pcie_ops
	.comm	_IORESOURCE_MEM,4,2             ## @IORESOURCE_MEM
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"dbi"

	.comm	_CONFIG_PCIE_DW_PLAT_HOST,4,2   ## @CONFIG_PCIE_DW_PLAT_HOST
	.comm	_ENODEV,4,2                     ## @ENODEV
	.comm	_CONFIG_PCIE_DW_PLAT_EP,4,2     ## @CONFIG_PCIE_DW_PLAT_EP
L_.str.1:                               ## @.str.1
	.asciz	"INVALID device type %d\n"

	.no_dead_strip	_dw_plat_pcie_probe
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function dw_plat_pcie_probe
_dw_plat_pcie_probe:                    ; @dw_plat_pcie_probe
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x0
Lloh0:
	adrp	x8, _dw_plat_pcie_of_match@GOTPAGE
Lloh1:
	ldr	x8, [x8, _dw_plat_pcie_of_match@GOTPAGEOFF]
Lloh2:
	ldr	w0, [x8]
	mov	x1, x19
	bl	_of_match_device
	cbz	x0, LBB0_8
; %bb.1:
	ldr	x8, [x0]
	ldr	w22, [x8]
Lloh3:
	adrp	x21, _GFP_KERNEL@GOTPAGE
Lloh4:
	ldr	x21, [x21, _GFP_KERNEL@GOTPAGEOFF]
	ldr	w2, [x21]
	mov	x0, x19
	mov	w1, #16
	bl	_devm_kzalloc
	cbz	x0, LBB0_7
; %bb.2:
	mov	x20, x0
	ldr	w2, [x21]
	mov	x0, x19
	mov	w1, #24
	bl	_devm_kzalloc
	cbz	x0, LBB0_7
; %bb.3:
	mov	x21, x0
Lloh5:
	adrp	x8, _dw_pcie_ops@GOTPAGE
Lloh6:
	ldr	x8, [x8, _dw_pcie_ops@GOTPAGEOFF]
	stp	x8, x19, [x0, #8]
	str	x0, [x20, #8]
	str	w22, [x20]
Lloh7:
	adrp	x22, _IORESOURCE_MEM@GOTPAGE
Lloh8:
	ldr	x22, [x22, _IORESOURCE_MEM@GOTPAGEOFF]
	ldr	w1, [x22]
Lloh9:
	adrp	x2, l_.str@PAGE
Lloh10:
	add	x2, x2, l_.str@PAGEOFF
	mov	x0, x19
	bl	_platform_get_resource_byname
	mov	x1, x0
	cbnz	x0, LBB0_5
; %bb.4:
	ldr	w1, [x22]
	mov	x0, x19
	mov	w2, #0
	bl	_platform_get_resource
	mov	x1, x0
LBB0_5:
	mov	x0, x19
	bl	_devm_ioremap_resource
	str	w0, [x21]
	bl	_IS_ERR
	cbz	x0, LBB0_11
; %bb.6:
	ldr	w0, [x21]
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	_PTR_ERR
LBB0_7:
Lloh11:
	adrp	x8, _ENOMEM@GOTPAGE
Lloh12:
	ldr	x8, [x8, _ENOMEM@GOTPAGEOFF]
	b	LBB0_9
LBB0_8:
Lloh13:
	adrp	x8, _EINVAL@GOTPAGE
Lloh14:
	ldr	x8, [x8, _EINVAL@GOTPAGEOFF]
LBB0_9:
	ldr	w8, [x8]
	neg	w0, w8
LBB0_10:
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
LBB0_11:
	mov	x0, x19
	mov	x1, x20
	bl	_platform_set_drvdata
	ldr	w2, [x20]
	cmp	w2, #129
	b.eq	LBB0_15
; %bb.12:
	cmp	w2, #128
	b.ne	LBB0_17
; %bb.13:
Lloh15:
	adrp	x8, _CONFIG_PCIE_DW_PLAT_HOST@GOTPAGE
Lloh16:
	ldr	x8, [x8, _CONFIG_PCIE_DW_PLAT_HOST@GOTPAGEOFF]
Lloh17:
	ldr	w0, [x8]
	bl	_IS_ENABLED
	cbz	w0, LBB0_19
; %bb.14:
	mov	x0, x20
	mov	x1, x19
	bl	_dw_plat_add_pcie_port
	tbz	w0, #31, LBB0_18
	b	LBB0_10
LBB0_15:
Lloh18:
	adrp	x8, _CONFIG_PCIE_DW_PLAT_EP@GOTPAGE
Lloh19:
	ldr	x8, [x8, _CONFIG_PCIE_DW_PLAT_EP@GOTPAGEOFF]
Lloh20:
	ldr	w0, [x8]
	bl	_IS_ENABLED
	cbz	w0, LBB0_19
; %bb.16:
	mov	x0, x20
	mov	x1, x19
	bl	_dw_plat_add_pcie_ep
	tbz	w0, #31, LBB0_18
	b	LBB0_10
LBB0_17:
Lloh21:
	adrp	x1, l_.str.1@PAGE
Lloh22:
	add	x1, x1, l_.str.1@PAGEOFF
	mov	x0, x19
	bl	_dev_err
LBB0_18:
	mov	w0, #0
	b	LBB0_10
LBB0_19:
Lloh23:
	adrp	x8, _ENODEV@GOTPAGE
Lloh24:
	ldr	x8, [x8, _ENODEV@GOTPAGEOFF]
	b	LBB0_9
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGot	Lloh3, Lloh4
	.loh AdrpAdd	Lloh9, Lloh10
	.loh AdrpLdrGot	Lloh7, Lloh8
	.loh AdrpLdrGot	Lloh5, Lloh6
	.loh AdrpLdrGot	Lloh11, Lloh12
	.loh AdrpLdrGot	Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpAdd	Lloh21, Lloh22
	.loh AdrpLdrGot	Lloh23, Lloh24
	.cfi_endproc
                                        ; -- End function
	.comm	_dw_plat_pcie_of_match,4,2      ; @dw_plat_pcie_of_match
	.comm	_EINVAL,4,2                     ; @EINVAL
	.comm	_GFP_KERNEL,4,2                 ; @GFP_KERNEL
	.comm	_ENOMEM,4,2                     ; @ENOMEM
	.comm	_dw_pcie_ops,4,2                ; @dw_pcie_ops
	.comm	_IORESOURCE_MEM,4,2             ; @IORESOURCE_MEM
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"dbi"

	.comm	_CONFIG_PCIE_DW_PLAT_HOST,4,2   ; @CONFIG_PCIE_DW_PLAT_HOST
	.comm	_ENODEV,4,2                     ; @ENODEV
	.comm	_CONFIG_PCIE_DW_PLAT_EP,4,2     ; @CONFIG_PCIE_DW_PLAT_EP
l_.str.1:                               ; @.str.1
	.asciz	"INVALID device type %d\n"

	.no_dead_strip	_dw_plat_pcie_probe
.subsections_via_symbols
