	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function vsc8574_is_serdes_init
_vsc8574_is_serdes_init:                ## @vsc8574_is_serdes_init
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %rbx
	movq	_MSCC_EXT_PAGE_ACCESS@GOTPCREL(%rip), %r12
	movl	(%r12), %esi
	movq	_MSCC_PHY_PAGE_EXTENDED_GPIO@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	callq	_phy_base_write
	movl	$1, %edi
	callq	_MSCC_TRAP_ROM_ADDR
	movq	%rbx, %rdi
	movl	%eax, %esi
	callq	_phy_base_read
	xorl	%r14d, %r14d
	cmpl	$16055, %eax                    ## imm = 0x3EB7
	jne	LBB0_4
## %bb.1:
	movl	$1, %edi
	callq	_MSCC_PATCH_RAM_ADDR
	movq	%rbx, %rdi
	movl	%eax, %esi
	callq	_phy_base_read
	cmpl	$16402, %eax                    ## imm = 0x4012
	jne	LBB0_4
## %bb.2:
	movq	_MSCC_INT_MEM_CNTL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_phy_base_read
	movl	%eax, %r15d
	movl	$1, %edi
	callq	_EN_PATCH_RAM_TRAP_ADDR
	cmpl	%eax, %r15d
	jne	LBB0_4
## %bb.3:
	movq	_MSCC_DW8051_CNTL_STATUS@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_phy_base_read
	movq	_MICRO_NSOFT_RESET@GOTPCREL(%rip), %rcx
	movq	_RUN_FROM_INT_ROM@GOTPCREL(%rip), %rdx
	movl	(%rdx), %edx
	orl	(%rcx), %edx
	movq	_DW8051_CLK_EN@GOTPCREL(%rip), %rcx
	orl	(%rcx), %edx
	movq	_MICRO_CLK_EN@GOTPCREL(%rip), %rcx
	orl	(%rcx), %edx
	movq	_MSCC_DW8051_VLD_MASK@GOTPCREL(%rip), %rcx
	andl	(%rcx), %eax
	xorl	%r14d, %r14d
	cmpl	%eax, %edx
	sete	%r14b
LBB0_4:
	movl	(%r12), %esi
	movq	_MSCC_PHY_PAGE_STANDARD@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	callq	_phy_base_write
	movl	%r14d, %eax
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_MSCC_EXT_PAGE_ACCESS,4,2       ## @MSCC_EXT_PAGE_ACCESS
	.comm	_MSCC_PHY_PAGE_EXTENDED_GPIO,4,2 ## @MSCC_PHY_PAGE_EXTENDED_GPIO
	.comm	_MSCC_INT_MEM_CNTL,4,2          ## @MSCC_INT_MEM_CNTL
	.comm	_MSCC_DW8051_CNTL_STATUS,4,2    ## @MSCC_DW8051_CNTL_STATUS
	.comm	_MICRO_NSOFT_RESET,4,2          ## @MICRO_NSOFT_RESET
	.comm	_RUN_FROM_INT_ROM,4,2           ## @RUN_FROM_INT_ROM
	.comm	_DW8051_CLK_EN,4,2              ## @DW8051_CLK_EN
	.comm	_MICRO_CLK_EN,4,2               ## @MICRO_CLK_EN
	.comm	_MSCC_DW8051_VLD_MASK,4,2       ## @MSCC_DW8051_VLD_MASK
	.comm	_MSCC_PHY_PAGE_STANDARD,4,2     ## @MSCC_PHY_PAGE_STANDARD
	.no_dead_strip	_vsc8574_is_serdes_init
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function vsc8574_is_serdes_init
_vsc8574_is_serdes_init:                ; @vsc8574_is_serdes_init
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x0
Lloh0:
	adrp	x21, _MSCC_EXT_PAGE_ACCESS@GOTPAGE
Lloh1:
	ldr	x21, [x21, _MSCC_EXT_PAGE_ACCESS@GOTPAGEOFF]
	ldr	w1, [x21]
Lloh2:
	adrp	x8, _MSCC_PHY_PAGE_EXTENDED_GPIO@GOTPAGE
Lloh3:
	ldr	x8, [x8, _MSCC_PHY_PAGE_EXTENDED_GPIO@GOTPAGEOFF]
Lloh4:
	ldr	w2, [x8]
	bl	_phy_base_write
	mov	w0, #1
	bl	_MSCC_TRAP_ROM_ADDR
	mov	x1, x0
	mov	x0, x19
	bl	_phy_base_read
	mov	w8, #16055
	cmp	w0, w8
	b.ne	LBB0_4
; %bb.1:
	mov	w0, #1
	bl	_MSCC_PATCH_RAM_ADDR
	mov	x1, x0
	mov	x0, x19
	bl	_phy_base_read
	mov	w8, #16402
	cmp	w0, w8
	b.ne	LBB0_4
; %bb.2:
Lloh5:
	adrp	x8, _MSCC_INT_MEM_CNTL@GOTPAGE
Lloh6:
	ldr	x8, [x8, _MSCC_INT_MEM_CNTL@GOTPAGEOFF]
Lloh7:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_phy_base_read
	mov	x20, x0
	mov	w0, #1
	bl	_EN_PATCH_RAM_TRAP_ADDR
	cmp	w20, w0
	b.ne	LBB0_4
; %bb.3:
Lloh8:
	adrp	x8, _MSCC_DW8051_CNTL_STATUS@GOTPAGE
Lloh9:
	ldr	x8, [x8, _MSCC_DW8051_CNTL_STATUS@GOTPAGEOFF]
Lloh10:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_phy_base_read
Lloh11:
	adrp	x8, _MICRO_NSOFT_RESET@GOTPAGE
Lloh12:
	ldr	x8, [x8, _MICRO_NSOFT_RESET@GOTPAGEOFF]
Lloh13:
	ldr	w8, [x8]
Lloh14:
	adrp	x9, _RUN_FROM_INT_ROM@GOTPAGE
Lloh15:
	ldr	x9, [x9, _RUN_FROM_INT_ROM@GOTPAGEOFF]
Lloh16:
	ldr	w9, [x9]
	orr	w8, w9, w8
Lloh17:
	adrp	x9, _DW8051_CLK_EN@GOTPAGE
Lloh18:
	ldr	x9, [x9, _DW8051_CLK_EN@GOTPAGEOFF]
Lloh19:
	ldr	w9, [x9]
	orr	w8, w8, w9
Lloh20:
	adrp	x9, _MICRO_CLK_EN@GOTPAGE
Lloh21:
	ldr	x9, [x9, _MICRO_CLK_EN@GOTPAGEOFF]
Lloh22:
	ldr	w9, [x9]
	orr	w8, w8, w9
Lloh23:
	adrp	x9, _MSCC_DW8051_VLD_MASK@GOTPAGE
Lloh24:
	ldr	x9, [x9, _MSCC_DW8051_VLD_MASK@GOTPAGEOFF]
Lloh25:
	ldr	w9, [x9]
	and	w9, w9, w0
	cmp	w8, w9
	cset	w20, eq
	b	LBB0_5
LBB0_4:
	mov	w20, #0
LBB0_5:
	ldr	w1, [x21]
Lloh26:
	adrp	x8, _MSCC_PHY_PAGE_STANDARD@GOTPAGE
Lloh27:
	ldr	x8, [x8, _MSCC_PHY_PAGE_STANDARD@GOTPAGEOFF]
Lloh28:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_phy_base_write
	mov	x0, x20
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh23, Lloh24, Lloh25
	.loh AdrpLdrGotLdr	Lloh20, Lloh21, Lloh22
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh19
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh16
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh26, Lloh27, Lloh28
	.cfi_endproc
                                        ; -- End function
	.comm	_MSCC_EXT_PAGE_ACCESS,4,2       ; @MSCC_EXT_PAGE_ACCESS
	.comm	_MSCC_PHY_PAGE_EXTENDED_GPIO,4,2 ; @MSCC_PHY_PAGE_EXTENDED_GPIO
	.comm	_MSCC_INT_MEM_CNTL,4,2          ; @MSCC_INT_MEM_CNTL
	.comm	_MSCC_DW8051_CNTL_STATUS,4,2    ; @MSCC_DW8051_CNTL_STATUS
	.comm	_MICRO_NSOFT_RESET,4,2          ; @MICRO_NSOFT_RESET
	.comm	_RUN_FROM_INT_ROM,4,2           ; @RUN_FROM_INT_ROM
	.comm	_DW8051_CLK_EN,4,2              ; @DW8051_CLK_EN
	.comm	_MICRO_CLK_EN,4,2               ; @MICRO_CLK_EN
	.comm	_MSCC_DW8051_VLD_MASK,4,2       ; @MSCC_DW8051_VLD_MASK
	.comm	_MSCC_PHY_PAGE_STANDARD,4,2     ; @MSCC_PHY_PAGE_STANDARD
	.no_dead_strip	_vsc8574_is_serdes_init
.subsections_via_symbols
