	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function exynos4x12_phy_pwr
_exynos4x12_phy_pwr:                    ## @exynos4x12_phy_pwr
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%esi, %r14d
	movq	(%rdi), %rax
	movq	8(%rdi), %r15
	movl	(%rax), %eax
	addl	$-128, %eax
	cmpl	$3, %eax
	ja	LBB0_1
## %bb.2:
	leaq	LJTI0_0(%rip), %rcx
	movslq	(%rcx,%rax,4), %rax
	addq	%rcx, %rax
	jmpq	*%rax
LBB0_6:
	movq	_EXYNOS_4x12_UPHYPWR_HSIC1@GOTPCREL(%rip), %rax
	movl	(%rax), %r12d
	movq	_EXYNOS_4x12_URSTCON_HSIC1@GOTPCREL(%rip), %rax
	jmp	LBB0_7
LBB0_1:
	xorl	%r12d, %r12d
	xorl	%ebx, %ebx
	jmp	LBB0_9
LBB0_5:
	movq	_EXYNOS_4x12_UPHYPWR_HSIC0@GOTPCREL(%rip), %rax
	movl	(%rax), %r12d
	movq	_EXYNOS_4x12_URSTCON_HSIC0@GOTPCREL(%rip), %rax
LBB0_7:
	movq	_EXYNOS_4x12_URSTCON_HOST_LINK_P1@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ebx
	jmp	LBB0_8
LBB0_4:
	movq	_EXYNOS_4x12_UPHYPWR_PHY1@GOTPCREL(%rip), %rax
	movq	_EXYNOS_4x12_URSTCON_HOST_PHY@GOTPCREL(%rip), %rcx
	movq	_EXYNOS_4x12_URSTCON_PHY1@GOTPCREL(%rip), %rdx
	movl	(%rdx), %ebx
	orl	(%rcx), %ebx
	movl	(%rax), %r12d
	movq	_EXYNOS_4x12_URSTCON_HOST_LINK_P0@GOTPCREL(%rip), %rax
LBB0_8:
	orl	(%rax), %ebx
	jmp	LBB0_9
LBB0_3:
	movq	_EXYNOS_4x12_UPHYPWR_PHY0@GOTPCREL(%rip), %rax
	movl	(%rax), %r12d
	movq	_EXYNOS_4x12_URSTCON_PHY0@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
LBB0_9:
	movq	_EXYNOS_4x12_UPHYPWR@GOTPCREL(%rip), %r13
	movq	(%r13), %rdi
	addq	(%r15), %rdi
	callq	_readl
	testl	%r14d, %r14d
	je	LBB0_11
## %bb.10:
	notl	%r12d
	andl	%r12d, %eax
	movq	(%r13), %rsi
	addq	(%r15), %rsi
	movl	%eax, %edi
	callq	_writel
	movq	_EXYNOS_4x12_UPHYRST@GOTPCREL(%rip), %r12
	movq	(%r12), %rdi
	addq	(%r15), %rdi
	callq	_readl
	movl	%eax, %r14d
	movl	%eax, %edi
	orl	%ebx, %edi
	movq	(%r12), %rsi
	addq	(%r15), %rsi
	callq	_writel
	movl	$10, %edi
	callq	_udelay
	notl	%ebx
	andl	%r14d, %ebx
	movq	(%r12), %rsi
	addq	(%r15), %rsi
	movl	%ebx, %edi
	callq	_writel
	movl	$80, %edi
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_udelay                         ## TAILCALL
LBB0_11:
	orl	%r12d, %eax
	movq	(%r13), %rsi
	addq	(%r15), %rsi
	movl	%eax, %edi
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_writel                         ## TAILCALL
	.cfi_endproc
	.p2align	2, 0x90
	.data_region jt32
.set L0_0_set_6, LBB0_6-LJTI0_0
.set L0_0_set_5, LBB0_5-LJTI0_0
.set L0_0_set_4, LBB0_4-LJTI0_0
.set L0_0_set_3, LBB0_3-LJTI0_0
LJTI0_0:
	.long	L0_0_set_6
	.long	L0_0_set_5
	.long	L0_0_set_4
	.long	L0_0_set_3
	.end_data_region
                                        ## -- End function
	.comm	_EXYNOS_4x12_UPHYPWR_PHY0,4,2   ## @EXYNOS_4x12_UPHYPWR_PHY0
	.comm	_EXYNOS_4x12_URSTCON_PHY0,4,2   ## @EXYNOS_4x12_URSTCON_PHY0
	.comm	_EXYNOS_4x12_UPHYPWR_PHY1,4,2   ## @EXYNOS_4x12_UPHYPWR_PHY1
	.comm	_EXYNOS_4x12_URSTCON_HOST_PHY,4,2 ## @EXYNOS_4x12_URSTCON_HOST_PHY
	.comm	_EXYNOS_4x12_URSTCON_PHY1,4,2   ## @EXYNOS_4x12_URSTCON_PHY1
	.comm	_EXYNOS_4x12_URSTCON_HOST_LINK_P0,4,2 ## @EXYNOS_4x12_URSTCON_HOST_LINK_P0
	.comm	_EXYNOS_4x12_UPHYPWR_HSIC0,4,2  ## @EXYNOS_4x12_UPHYPWR_HSIC0
	.comm	_EXYNOS_4x12_URSTCON_HSIC0,4,2  ## @EXYNOS_4x12_URSTCON_HSIC0
	.comm	_EXYNOS_4x12_URSTCON_HOST_LINK_P1,4,2 ## @EXYNOS_4x12_URSTCON_HOST_LINK_P1
	.comm	_EXYNOS_4x12_UPHYPWR_HSIC1,4,2  ## @EXYNOS_4x12_UPHYPWR_HSIC1
	.comm	_EXYNOS_4x12_URSTCON_HSIC1,4,2  ## @EXYNOS_4x12_URSTCON_HSIC1
	.comm	_EXYNOS_4x12_UPHYPWR,8,3        ## @EXYNOS_4x12_UPHYPWR
	.comm	_EXYNOS_4x12_UPHYRST,8,3        ## @EXYNOS_4x12_UPHYRST
	.no_dead_strip	_exynos4x12_phy_pwr
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function exynos4x12_phy_pwr
_exynos4x12_phy_pwr:                    ; @exynos4x12_phy_pwr
	.cfi_startproc
; %bb.0:
	stp	x24, x23, [sp, #-64]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x19, x1
	ldp	x8, x20, [x0]
	ldr	w8, [x8]
	sub	w8, w8, #128
	cmp	w8, #3
	b.hi	LBB0_3
; %bb.1:
Lloh0:
	adrp	x9, lJTI0_0@PAGE
Lloh1:
	add	x9, x9, lJTI0_0@PAGEOFF
	adr	x10, LBB0_2
	ldrb	w11, [x9, x8]
	add	x10, x10, x11, lsl #2
	br	x10
LBB0_2:
Lloh2:
	adrp	x8, _EXYNOS_4x12_UPHYPWR_HSIC1@GOTPAGE
Lloh3:
	ldr	x8, [x8, _EXYNOS_4x12_UPHYPWR_HSIC1@GOTPAGEOFF]
Lloh4:
	adrp	x9, _EXYNOS_4x12_URSTCON_HSIC1@GOTPAGE
Lloh5:
	ldr	x9, [x9, _EXYNOS_4x12_URSTCON_HSIC1@GOTPAGEOFF]
	b	LBB0_5
LBB0_3:
	mov	w22, #0
	mov	w21, #0
	b	LBB0_8
LBB0_4:
Lloh6:
	adrp	x8, _EXYNOS_4x12_UPHYPWR_HSIC0@GOTPAGE
Lloh7:
	ldr	x8, [x8, _EXYNOS_4x12_UPHYPWR_HSIC0@GOTPAGEOFF]
Lloh8:
	adrp	x9, _EXYNOS_4x12_URSTCON_HSIC0@GOTPAGE
Lloh9:
	ldr	x9, [x9, _EXYNOS_4x12_URSTCON_HSIC0@GOTPAGEOFF]
LBB0_5:
	ldr	w22, [x8]
	ldr	w8, [x9]
Lloh10:
	adrp	x9, _EXYNOS_4x12_URSTCON_HOST_LINK_P1@GOTPAGE
Lloh11:
	ldr	x9, [x9, _EXYNOS_4x12_URSTCON_HOST_LINK_P1@GOTPAGEOFF]
Lloh12:
	ldr	w9, [x9]
	orr	w21, w9, w8
	b	LBB0_8
LBB0_6:
Lloh13:
	adrp	x8, _EXYNOS_4x12_UPHYPWR_PHY1@GOTPAGE
Lloh14:
	ldr	x8, [x8, _EXYNOS_4x12_UPHYPWR_PHY1@GOTPAGEOFF]
Lloh15:
	ldr	w22, [x8]
Lloh16:
	adrp	x8, _EXYNOS_4x12_URSTCON_HOST_PHY@GOTPAGE
Lloh17:
	ldr	x8, [x8, _EXYNOS_4x12_URSTCON_HOST_PHY@GOTPAGEOFF]
Lloh18:
	ldr	w8, [x8]
Lloh19:
	adrp	x9, _EXYNOS_4x12_URSTCON_PHY1@GOTPAGE
Lloh20:
	ldr	x9, [x9, _EXYNOS_4x12_URSTCON_PHY1@GOTPAGEOFF]
Lloh21:
	ldr	w9, [x9]
	orr	w8, w9, w8
Lloh22:
	adrp	x9, _EXYNOS_4x12_URSTCON_HOST_LINK_P0@GOTPAGE
Lloh23:
	ldr	x9, [x9, _EXYNOS_4x12_URSTCON_HOST_LINK_P0@GOTPAGEOFF]
Lloh24:
	ldr	w9, [x9]
	orr	w21, w8, w9
	b	LBB0_8
LBB0_7:
Lloh25:
	adrp	x8, _EXYNOS_4x12_UPHYPWR_PHY0@GOTPAGE
Lloh26:
	ldr	x8, [x8, _EXYNOS_4x12_UPHYPWR_PHY0@GOTPAGEOFF]
Lloh27:
	ldr	w22, [x8]
Lloh28:
	adrp	x8, _EXYNOS_4x12_URSTCON_PHY0@GOTPAGE
Lloh29:
	ldr	x8, [x8, _EXYNOS_4x12_URSTCON_PHY0@GOTPAGEOFF]
Lloh30:
	ldr	w21, [x8]
LBB0_8:
	ldr	x8, [x20]
Lloh31:
	adrp	x23, _EXYNOS_4x12_UPHYPWR@GOTPAGE
Lloh32:
	ldr	x23, [x23, _EXYNOS_4x12_UPHYPWR@GOTPAGEOFF]
	ldr	x9, [x23]
	add	x0, x9, x8
	bl	_readl
	cbz	w19, LBB0_10
; %bb.9:
	bic	w0, w0, w22
	ldr	x8, [x20]
	ldr	x9, [x23]
	add	x1, x9, x8
	bl	_writel
	ldr	x8, [x20]
Lloh33:
	adrp	x22, _EXYNOS_4x12_UPHYRST@GOTPAGE
Lloh34:
	ldr	x22, [x22, _EXYNOS_4x12_UPHYRST@GOTPAGEOFF]
	ldr	x9, [x22]
	add	x0, x9, x8
	bl	_readl
	mov	x19, x0
	orr	w0, w0, w21
	ldr	x8, [x20]
	ldr	x9, [x22]
	add	x1, x9, x8
	bl	_writel
	mov	w0, #10
	bl	_udelay
	bic	w0, w19, w21
	ldr	x8, [x20]
	ldr	x9, [x22]
	add	x1, x9, x8
	bl	_writel
	mov	w0, #80
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	b	_udelay
LBB0_10:
	orr	w0, w0, w22
	ldr	x8, [x20]
	ldr	x9, [x23]
	add	x1, x9, x8
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	b	_writel
	.loh AdrpAdd	Lloh0, Lloh1
	.loh AdrpLdrGot	Lloh4, Lloh5
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpLdrGot	Lloh8, Lloh9
	.loh AdrpLdrGot	Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh10, Lloh11, Lloh12
	.loh AdrpLdrGotLdr	Lloh22, Lloh23, Lloh24
	.loh AdrpLdrGotLdr	Lloh19, Lloh20, Lloh21
	.loh AdrpLdrGotLdr	Lloh16, Lloh17, Lloh18
	.loh AdrpLdrGotLdr	Lloh13, Lloh14, Lloh15
	.loh AdrpLdrGotLdr	Lloh28, Lloh29, Lloh30
	.loh AdrpLdrGotLdr	Lloh25, Lloh26, Lloh27
	.loh AdrpLdrGot	Lloh31, Lloh32
	.loh AdrpLdrGot	Lloh33, Lloh34
	.cfi_endproc
	.section	__TEXT,__const
lJTI0_0:
	.byte	(LBB0_2-LBB0_2)>>2
	.byte	(LBB0_4-LBB0_2)>>2
	.byte	(LBB0_6-LBB0_2)>>2
	.byte	(LBB0_7-LBB0_2)>>2
                                        ; -- End function
	.comm	_EXYNOS_4x12_UPHYPWR_PHY0,4,2   ; @EXYNOS_4x12_UPHYPWR_PHY0
	.comm	_EXYNOS_4x12_URSTCON_PHY0,4,2   ; @EXYNOS_4x12_URSTCON_PHY0
	.comm	_EXYNOS_4x12_UPHYPWR_PHY1,4,2   ; @EXYNOS_4x12_UPHYPWR_PHY1
	.comm	_EXYNOS_4x12_URSTCON_HOST_PHY,4,2 ; @EXYNOS_4x12_URSTCON_HOST_PHY
	.comm	_EXYNOS_4x12_URSTCON_PHY1,4,2   ; @EXYNOS_4x12_URSTCON_PHY1
	.comm	_EXYNOS_4x12_URSTCON_HOST_LINK_P0,4,2 ; @EXYNOS_4x12_URSTCON_HOST_LINK_P0
	.comm	_EXYNOS_4x12_UPHYPWR_HSIC0,4,2  ; @EXYNOS_4x12_UPHYPWR_HSIC0
	.comm	_EXYNOS_4x12_URSTCON_HSIC0,4,2  ; @EXYNOS_4x12_URSTCON_HSIC0
	.comm	_EXYNOS_4x12_URSTCON_HOST_LINK_P1,4,2 ; @EXYNOS_4x12_URSTCON_HOST_LINK_P1
	.comm	_EXYNOS_4x12_UPHYPWR_HSIC1,4,2  ; @EXYNOS_4x12_UPHYPWR_HSIC1
	.comm	_EXYNOS_4x12_URSTCON_HSIC1,4,2  ; @EXYNOS_4x12_URSTCON_HSIC1
	.comm	_EXYNOS_4x12_UPHYPWR,8,3        ; @EXYNOS_4x12_UPHYPWR
	.comm	_EXYNOS_4x12_UPHYRST,8,3        ; @EXYNOS_4x12_UPHYRST
	.no_dead_strip	_exynos4x12_phy_pwr
.subsections_via_symbols
