	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function ti_pipe3_init
_ti_pipe3_init:                         ## @ti_pipe3_init
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r14
	pushq	%rbx
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	callq	_phy_get_drvdata
	movq	%rax, %rbx
	movq	%rax, %rdi
	callq	_ti_pipe3_enable_clocks
	movq	(%rbx), %rax
	movq	_PIPE3_MODE_PCIE@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jne	LBB0_4
## %bb.1:
	movl	16(%rbx), %edi
	testl	%edi, %edi
	je	LBB0_2
## %bb.3:
	movq	_OMAP_CTRL_PCIE_PCS_DELAY_COUNT_SHIFT@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	movl	$150, %eax
	shll	%cl, %eax
	movl	12(%rbx), %esi
	movq	_PCIE_PCS_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	movl	%eax, %ecx
	popq	%rbx
	popq	%r14
	popq	%rbp
	jmp	_regmap_update_bits             ## TAILCALL
LBB0_4:
	movl	8(%rbx), %edi
	movq	_PLL_CONFIGURATION2@GOTPCREL(%rip), %r14
	movl	(%r14), %esi
	callq	_ti_pipe3_readl
	movq	_PLL_IDLE@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	testl	%eax, %ecx
	je	LBB0_5
## %bb.6:
	notl	%ecx
	andl	%ecx, %eax
	movl	8(%rbx), %edi
	movl	(%r14), %esi
	movl	%eax, %edx
	callq	_ti_pipe3_writel
	movq	%rbx, %rdi
	callq	_ti_pipe3_dpll_wait_lock
	movl	%eax, %r14d
	jmp	LBB0_7
LBB0_2:
	movl	20(%rbx), %edi
	movl	$150, %esi
	callq	_omap_control_pcie_pcs
	jmp	LBB0_12
LBB0_5:
	xorl	%r14d, %r14d
LBB0_7:
	movl	8(%rbx), %edi
	movq	_PLL_STATUS@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_ti_pipe3_readl
	movq	_PLL_LOCK@GOTPCREL(%rip), %rcx
	testl	%eax, (%rcx)
	je	LBB0_9
## %bb.8:
	movq	(%rbx), %rax
	movq	_PIPE3_MODE_SATA@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	je	LBB0_13
LBB0_9:
	movq	%rbx, %rdi
	callq	_ti_pipe3_dpll_program
	movq	%rbx, %rdi
	testl	%eax, %eax
	je	LBB0_11
## %bb.10:
	callq	_ti_pipe3_disable_clocks
	movq	_EINVAL@GOTPCREL(%rip), %rax
	xorl	%r14d, %r14d
	subl	(%rax), %r14d
	jmp	LBB0_13
LBB0_11:
	callq	_ti_pipe3_calibrate
LBB0_12:
	xorl	%r14d, %r14d
LBB0_13:
	movl	%r14d, %eax
	popq	%rbx
	popq	%r14
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_PIPE3_MODE_PCIE,8,3            ## @PIPE3_MODE_PCIE
	.comm	_OMAP_CTRL_PCIE_PCS_DELAY_COUNT_SHIFT,4,2 ## @OMAP_CTRL_PCIE_PCS_DELAY_COUNT_SHIFT
	.comm	_PCIE_PCS_MASK,4,2              ## @PCIE_PCS_MASK
	.comm	_PLL_CONFIGURATION2,4,2         ## @PLL_CONFIGURATION2
	.comm	_PLL_IDLE,4,2                   ## @PLL_IDLE
	.comm	_PLL_STATUS,4,2                 ## @PLL_STATUS
	.comm	_PLL_LOCK,4,2                   ## @PLL_LOCK
	.comm	_PIPE3_MODE_SATA,8,3            ## @PIPE3_MODE_SATA
	.comm	_EINVAL,4,2                     ## @EINVAL
	.no_dead_strip	_ti_pipe3_init
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function ti_pipe3_init
_ti_pipe3_init:                         ; @ti_pipe3_init
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	bl	_phy_get_drvdata
	mov	x19, x0
	bl	_ti_pipe3_enable_clocks
	ldr	x8, [x19]
Lloh0:
	adrp	x9, _PIPE3_MODE_PCIE@GOTPAGE
Lloh1:
	ldr	x9, [x9, _PIPE3_MODE_PCIE@GOTPAGEOFF]
Lloh2:
	ldr	x9, [x9]
	cmp	x8, x9
	b.ne	LBB0_3
; %bb.1:
	ldr	w0, [x19, #16]
	cbz	w0, LBB0_5
; %bb.2:
Lloh3:
	adrp	x8, _OMAP_CTRL_PCIE_PCS_DELAY_COUNT_SHIFT@GOTPAGE
Lloh4:
	ldr	x8, [x8, _OMAP_CTRL_PCIE_PCS_DELAY_COUNT_SHIFT@GOTPAGEOFF]
Lloh5:
	ldr	w8, [x8]
	mov	w9, #150
	lsl	w3, w9, w8
Lloh6:
	adrp	x8, _PCIE_PCS_MASK@GOTPAGE
Lloh7:
	ldr	x8, [x8, _PCIE_PCS_MASK@GOTPAGEOFF]
	ldr	w1, [x19, #12]
Lloh8:
	ldr	w2, [x8]
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	b	_regmap_update_bits
LBB0_3:
	ldr	w0, [x19, #8]
Lloh9:
	adrp	x20, _PLL_CONFIGURATION2@GOTPAGE
Lloh10:
	ldr	x20, [x20, _PLL_CONFIGURATION2@GOTPAGEOFF]
	ldr	w1, [x20]
	bl	_ti_pipe3_readl
Lloh11:
	adrp	x8, _PLL_IDLE@GOTPAGE
Lloh12:
	ldr	x8, [x8, _PLL_IDLE@GOTPAGEOFF]
Lloh13:
	ldr	w8, [x8]
	tst	w8, w0
	b.eq	LBB0_6
; %bb.4:
	bic	w2, w0, w8
	ldr	w0, [x19, #8]
	ldr	w1, [x20]
	bl	_ti_pipe3_writel
	mov	x0, x19
	bl	_ti_pipe3_dpll_wait_lock
	mov	x20, x0
	b	LBB0_7
LBB0_5:
	ldr	w0, [x19, #20]
	mov	w1, #150
	bl	_omap_control_pcie_pcs
	b	LBB0_12
LBB0_6:
	mov	w20, #0
LBB0_7:
	ldr	w0, [x19, #8]
Lloh14:
	adrp	x8, _PLL_STATUS@GOTPAGE
Lloh15:
	ldr	x8, [x8, _PLL_STATUS@GOTPAGEOFF]
Lloh16:
	ldr	w1, [x8]
	bl	_ti_pipe3_readl
Lloh17:
	adrp	x8, _PLL_LOCK@GOTPAGE
Lloh18:
	ldr	x8, [x8, _PLL_LOCK@GOTPAGEOFF]
Lloh19:
	ldr	w8, [x8]
	tst	w8, w0
	b.eq	LBB0_9
; %bb.8:
	ldr	x8, [x19]
Lloh20:
	adrp	x9, _PIPE3_MODE_SATA@GOTPAGE
Lloh21:
	ldr	x9, [x9, _PIPE3_MODE_SATA@GOTPAGEOFF]
Lloh22:
	ldr	x9, [x9]
	cmp	x8, x9
	b.eq	LBB0_13
LBB0_9:
	mov	x0, x19
	bl	_ti_pipe3_dpll_program
	cbz	w0, LBB0_11
; %bb.10:
	mov	x0, x19
	bl	_ti_pipe3_disable_clocks
Lloh23:
	adrp	x8, _EINVAL@GOTPAGE
Lloh24:
	ldr	x8, [x8, _EINVAL@GOTPAGEOFF]
Lloh25:
	ldr	w8, [x8]
	neg	w20, w8
	b	LBB0_13
LBB0_11:
	mov	x0, x19
	bl	_ti_pipe3_calibrate
LBB0_12:
	mov	w20, #0
LBB0_13:
	mov	x0, x20
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpLdrGot	Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh19
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh16
	.loh AdrpLdrGotLdr	Lloh20, Lloh21, Lloh22
	.loh AdrpLdrGotLdr	Lloh23, Lloh24, Lloh25
	.cfi_endproc
                                        ; -- End function
	.comm	_PIPE3_MODE_PCIE,8,3            ; @PIPE3_MODE_PCIE
	.comm	_OMAP_CTRL_PCIE_PCS_DELAY_COUNT_SHIFT,4,2 ; @OMAP_CTRL_PCIE_PCS_DELAY_COUNT_SHIFT
	.comm	_PCIE_PCS_MASK,4,2              ; @PCIE_PCS_MASK
	.comm	_PLL_CONFIGURATION2,4,2         ; @PLL_CONFIGURATION2
	.comm	_PLL_IDLE,4,2                   ; @PLL_IDLE
	.comm	_PLL_STATUS,4,2                 ; @PLL_STATUS
	.comm	_PLL_LOCK,4,2                   ; @PLL_LOCK
	.comm	_PIPE3_MODE_SATA,8,3            ; @PIPE3_MODE_SATA
	.comm	_EINVAL,4,2                     ; @EINVAL
	.no_dead_strip	_ti_pipe3_init
.subsections_via_symbols
