	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function rvu_enable_sriov
_rvu_enable_sriov:                      ## @rvu_enable_sriov
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r15
	movq	8(%rdi), %r14
	callq	_rvu_afvf_msix_vectors_num_ok
	testl	%eax, %eax
	je	LBB0_1
## %bb.2:
	xorl	%eax, %eax
	callq	_lbk_get_num_chans
	movl	%eax, %ebx
	testl	%eax, %eax
	js	LBB0_3
## %bb.4:
	movq	%r14, %rdi
	callq	_pci_sriov_get_totalvfs
	cmpl	%ebx, %eax
	cmovll	%eax, %ebx
	testb	$1, %bl
	je	LBB0_6
## %bb.5:
	leal	-1(%rbx), %r12d
	leaq	L_.str.1(%rip), %rsi
	movq	%r14, %rdi
	movl	%r12d, %edx
	movl	%ebx, %ecx
	xorl	%eax, %eax
	callq	_dev_warn
	movl	%r12d, %ebx
LBB0_6:
	testl	%ebx, %ebx
	je	LBB0_7
## %bb.8:
	movl	%ebx, (%r15)
	leaq	4(%r15), %r12
	movq	_TYPE_AFVF@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	_rvu_afvf_mbox_handler@GOTPCREL(%rip), %rax
	movl	(%rax), %r8d
	movq	_rvu_afvf_mbox_up_handler@GOTPCREL(%rip), %rax
	movl	(%rax), %r9d
	movq	%r15, %rdi
	movq	%r12, %rsi
	movl	%ebx, %ecx
	callq	_rvu_mbox_init
	movl	%eax, %r13d
	testl	%eax, %eax
	jne	LBB0_11
## %bb.9:
	movq	%r15, %rdi
	callq	_rvu_enable_afvf_intr
	xorl	%r13d, %r13d
	xorl	%eax, %eax
	callq	_mb
	movq	%r14, %rdi
	movl	%ebx, %esi
	callq	_pci_enable_sriov
	testl	%eax, %eax
	je	LBB0_11
## %bb.10:
	movl	%eax, %ebx
	movq	%r15, %rdi
	callq	_rvu_disable_afvf_intr
	movq	%r12, %rdi
	callq	_rvu_mbox_destroy
	movl	%ebx, %r13d
	jmp	LBB0_11
LBB0_1:
	leaq	L_.str(%rip), %rsi
	xorl	%r13d, %r13d
	movq	%r14, %rdi
	xorl	%eax, %eax
	callq	_dev_warn
	jmp	LBB0_11
LBB0_3:
	movl	%ebx, %r13d
	jmp	LBB0_11
LBB0_7:
	xorl	%r13d, %r13d
LBB0_11:
	movl	%r13d, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"Skipping SRIOV enablement since not enough IRQs are available\n"

L_.str.1:                               ## @.str.1
	.asciz	"Number of VFs should be even. Enabling %d out of %d.\n"

	.comm	_TYPE_AFVF,4,2                  ## @TYPE_AFVF
	.comm	_rvu_afvf_mbox_handler,4,2      ## @rvu_afvf_mbox_handler
	.comm	_rvu_afvf_mbox_up_handler,4,2   ## @rvu_afvf_mbox_up_handler
	.no_dead_strip	_rvu_enable_sriov
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function rvu_enable_sriov
_rvu_enable_sriov:                      ; @rvu_enable_sriov
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #80
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x19, x0
	ldr	x20, [x0, #8]
	bl	_rvu_afvf_msix_vectors_num_ok
	cbz	w0, LBB0_8
; %bb.1:
	bl	_lbk_get_num_chans
	mov	x23, x0
	tbnz	w0, #31, LBB0_10
; %bb.2:
	mov	x0, x20
	bl	_pci_sriov_get_totalvfs
	cmp	w0, w23
	csel	w21, w0, w23, lt
	tbz	w21, #0, LBB0_4
; %bb.3:
	sub	w22, w21, #1
	stp	x22, x21, [sp]
Lloh0:
	adrp	x1, l_.str.1@PAGE
Lloh1:
	add	x1, x1, l_.str.1@PAGEOFF
	mov	x0, x20
	bl	_dev_warn
	mov	x21, x22
LBB0_4:
	cbz	w21, LBB0_9
; %bb.5:
	mov	x22, x19
	str	w21, [x22], #4
Lloh2:
	adrp	x8, _TYPE_AFVF@GOTPAGE
Lloh3:
	ldr	x8, [x8, _TYPE_AFVF@GOTPAGEOFF]
Lloh4:
	ldr	w2, [x8]
Lloh5:
	adrp	x8, _rvu_afvf_mbox_handler@GOTPAGE
Lloh6:
	ldr	x8, [x8, _rvu_afvf_mbox_handler@GOTPAGEOFF]
Lloh7:
	ldr	w4, [x8]
Lloh8:
	adrp	x8, _rvu_afvf_mbox_up_handler@GOTPAGE
Lloh9:
	ldr	x8, [x8, _rvu_afvf_mbox_up_handler@GOTPAGEOFF]
Lloh10:
	ldr	w5, [x8]
	mov	x0, x19
	mov	x1, x22
	mov	x3, x21
	bl	_rvu_mbox_init
	mov	x23, x0
	cbnz	w0, LBB0_10
; %bb.6:
	mov	x0, x19
	bl	_rvu_enable_afvf_intr
	bl	_mb
	mov	x0, x20
	mov	x1, x21
	bl	_pci_enable_sriov
	mov	x23, x0
	cbz	w0, LBB0_10
; %bb.7:
	mov	x0, x19
	bl	_rvu_disable_afvf_intr
	mov	x0, x22
	bl	_rvu_mbox_destroy
	b	LBB0_10
LBB0_8:
Lloh11:
	adrp	x1, l_.str@PAGE
Lloh12:
	add	x1, x1, l_.str@PAGEOFF
	mov	x0, x20
	bl	_dev_warn
LBB0_9:
	mov	w23, #0
LBB0_10:
	mov	x0, x23
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #80
	ret
	.loh AdrpAdd	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpAdd	Lloh11, Lloh12
	.cfi_endproc
                                        ; -- End function
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"Skipping SRIOV enablement since not enough IRQs are available\n"

l_.str.1:                               ; @.str.1
	.asciz	"Number of VFs should be even. Enabling %d out of %d.\n"

	.comm	_TYPE_AFVF,4,2                  ; @TYPE_AFVF
	.comm	_rvu_afvf_mbox_handler,4,2      ; @rvu_afvf_mbox_handler
	.comm	_rvu_afvf_mbox_up_handler,4,2   ; @rvu_afvf_mbox_up_handler
	.no_dead_strip	_rvu_enable_sriov
.subsections_via_symbols
