	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function __arm_spe_pmu_dev_probe
___arm_spe_pmu_dev_probe:               ## @__arm_spe_pmu_dev_probe
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r12
	movq	24(%rdi), %r14
	movq	_ID_AA64DFR0_EL1@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_read_cpuid
	movq	_ID_AA64DFR0_PMSVER_SHIFT@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	movl	%eax, %edi
	callq	_cpuid_feature_extract_unsigned_field
	testl	%eax, %eax
	je	LBB0_1
## %bb.2:
	movq	_SYS_PMBIDR_EL1@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_read_sysreg_s
	movl	%eax, %ebx
	movq	_SYS_PMBIDR_EL1_P_SHIFT@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_BIT
	testl	%ebx, %eax
	je	LBB0_3
## %bb.29:
	leaq	L_.str.1(%rip), %rsi
	movq	%r14, %rdi
	xorl	%eax, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_dev_err                        ## TAILCALL
LBB0_1:
	xorl	%eax, %eax
	callq	_smp_processor_id
	leaq	L_.str(%rip), %rsi
	movq	%r14, %rdi
	xorl	%edx, %edx
	jmp	LBB0_6
LBB0_3:
	movq	_SYS_PMBIDR_EL1_ALIGN_SHIFT@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	sarl	%cl, %ebx
	movq	_SYS_PMBIDR_EL1_ALIGN_MASK@GOTPCREL(%rip), %rax
	andl	(%rax), %ebx
	movl	$1, %eax
	movl	%ebx, %ecx
	shll	%cl, %eax
	movl	%eax, (%r12)
	movq	_SZ_2K@GOTPCREL(%rip), %r13
	cmpl	(%r13), %eax
	jle	LBB0_7
## %bb.4:
	xorl	%eax, %eax
	callq	_smp_processor_id
	leaq	L_.str.2(%rip), %rsi
	jmp	LBB0_5
LBB0_7:
	movq	_SYS_PMSIDR_EL1@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_read_sysreg_s
	movl	%eax, %r15d
	movq	_SYS_PMSIDR_EL1_FE_SHIFT@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_BIT
	testl	%r15d, %eax
	je	LBB0_9
## %bb.8:
	movq	_SPE_PMU_FEAT_FILT_EVT@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	orl	%eax, 16(%r12)
LBB0_9:
	movq	_SYS_PMSIDR_EL1_FT_SHIFT@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_BIT
	testl	%r15d, %eax
	je	LBB0_11
## %bb.10:
	movq	_SPE_PMU_FEAT_FILT_TYP@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	orl	%eax, 16(%r12)
LBB0_11:
	movq	_SYS_PMSIDR_EL1_FL_SHIFT@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_BIT
	testl	%r15d, %eax
	je	LBB0_13
## %bb.12:
	movq	_SPE_PMU_FEAT_FILT_LAT@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	orl	%eax, 16(%r12)
LBB0_13:
	movq	_SYS_PMSIDR_EL1_ARCHINST_SHIFT@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_BIT
	testl	%r15d, %eax
	je	LBB0_15
## %bb.14:
	movq	_SPE_PMU_FEAT_ARCH_INST@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	orl	%eax, 16(%r12)
LBB0_15:
	movq	_SYS_PMSIDR_EL1_LDS_SHIFT@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_BIT
	testl	%r15d, %eax
	je	LBB0_17
## %bb.16:
	movq	_SPE_PMU_FEAT_LDS@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	orl	%eax, 16(%r12)
LBB0_17:
	movq	_SYS_PMSIDR_EL1_ERND_SHIFT@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_BIT
	testl	%r15d, %eax
	je	LBB0_19
## %bb.18:
	movq	_SPE_PMU_FEAT_ERND@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	orl	%eax, 16(%r12)
LBB0_19:
	movq	_SYS_PMSIDR_EL1_INTERVAL_SHIFT@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	movl	%r15d, %edx
	sarl	%cl, %edx
	movq	_SYS_PMSIDR_EL1_INTERVAL_MASK@GOTPCREL(%rip), %rax
	andl	(%rax), %edx
	cmpl	$9, %edx
	jae	LBB0_20
## %bb.21:
	movl	$509, %eax                      ## imm = 0x1FD
	btl	%edx, %eax
	jb	LBB0_22
LBB0_20:
	leaq	L_.str.3(%rip), %rsi
	movq	%r14, %rdi
	callq	_dev_warn
	movl	$4096, %eax                     ## imm = 0x1000
	jmp	LBB0_23
LBB0_22:
	movslq	%edx, %rax
	leaq	l_switch.table.__arm_spe_pmu_dev_probe(%rip), %rcx
	movl	(%rcx,%rax,4), %eax
LBB0_23:
	movl	%eax, 4(%r12)
	movq	_SYS_PMSIDR_EL1_MAXSIZE_SHIFT@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	movl	%r15d, %ebx
	sarl	%cl, %ebx
	movq	_SYS_PMSIDR_EL1_MAXSIZE_MASK@GOTPCREL(%rip), %rax
	andl	(%rax), %ebx
	movl	$1, %eax
	movl	%ebx, %ecx
	shll	%cl, %eax
	movl	%eax, 8(%r12)
	cmpl	(%r13), %eax
	jg	LBB0_25
## %bb.24:
	cmpl	$15, %eax
	jle	LBB0_25
## %bb.26:
	movq	_SYS_PMSIDR_EL1_COUNTSIZE_SHIFT@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	sarl	%cl, %r15d
	movq	_SYS_PMSIDR_EL1_COUNTSIZE_MASK@GOTPCREL(%rip), %rax
	andl	(%rax), %r15d
	cmpl	$2, %r15d
	je	LBB0_28
## %bb.27:
	leaq	L_.str.5(%rip), %rsi
	movq	%r14, %rdi
	movl	%r15d, %edx
	callq	_dev_warn
LBB0_28:
	movl	$12, 12(%r12)
	leaq	20(%r12), %rdi
	callq	_cpumask_pr_args
	movl	(%r12), %r8d
	movl	8(%r12), %ecx
	movl	16(%r12), %r9d
	leaq	L_.str.6(%rip), %rsi
	movq	%r14, %rdi
	movl	%eax, %edx
	callq	_dev_info
	movq	_SPE_PMU_FEAT_DEV_PROBED@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	orl	%eax, 16(%r12)
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_25:
	xorl	%eax, %eax
	callq	_smp_processor_id
	leaq	L_.str.4(%rip), %rsi
LBB0_5:
	movq	%r14, %rdi
	movl	%ebx, %edx
LBB0_6:
	movl	%eax, %ecx
	xorl	%eax, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_dev_err                        ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_ID_AA64DFR0_EL1,4,2            ## @ID_AA64DFR0_EL1
	.comm	_ID_AA64DFR0_PMSVER_SHIFT,4,2   ## @ID_AA64DFR0_PMSVER_SHIFT
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"unsupported ID_AA64DFR0_EL1.PMSVer [%d] on CPU %d\n"

	.comm	_SYS_PMBIDR_EL1,4,2             ## @SYS_PMBIDR_EL1
	.comm	_SYS_PMBIDR_EL1_P_SHIFT,4,2     ## @SYS_PMBIDR_EL1_P_SHIFT
L_.str.1:                               ## @.str.1
	.asciz	"profiling buffer owned by higher exception level\n"

	.comm	_SYS_PMBIDR_EL1_ALIGN_SHIFT,4,2 ## @SYS_PMBIDR_EL1_ALIGN_SHIFT
	.comm	_SYS_PMBIDR_EL1_ALIGN_MASK,4,2  ## @SYS_PMBIDR_EL1_ALIGN_MASK
	.comm	_SZ_2K,4,2                      ## @SZ_2K
L_.str.2:                               ## @.str.2
	.asciz	"unsupported PMBIDR.Align [%d] on CPU %d\n"

	.comm	_SYS_PMSIDR_EL1,4,2             ## @SYS_PMSIDR_EL1
	.comm	_SYS_PMSIDR_EL1_FE_SHIFT,4,2    ## @SYS_PMSIDR_EL1_FE_SHIFT
	.comm	_SPE_PMU_FEAT_FILT_EVT,4,2      ## @SPE_PMU_FEAT_FILT_EVT
	.comm	_SYS_PMSIDR_EL1_FT_SHIFT,4,2    ## @SYS_PMSIDR_EL1_FT_SHIFT
	.comm	_SPE_PMU_FEAT_FILT_TYP,4,2      ## @SPE_PMU_FEAT_FILT_TYP
	.comm	_SYS_PMSIDR_EL1_FL_SHIFT,4,2    ## @SYS_PMSIDR_EL1_FL_SHIFT
	.comm	_SPE_PMU_FEAT_FILT_LAT,4,2      ## @SPE_PMU_FEAT_FILT_LAT
	.comm	_SYS_PMSIDR_EL1_ARCHINST_SHIFT,4,2 ## @SYS_PMSIDR_EL1_ARCHINST_SHIFT
	.comm	_SPE_PMU_FEAT_ARCH_INST,4,2     ## @SPE_PMU_FEAT_ARCH_INST
	.comm	_SYS_PMSIDR_EL1_LDS_SHIFT,4,2   ## @SYS_PMSIDR_EL1_LDS_SHIFT
	.comm	_SPE_PMU_FEAT_LDS,4,2           ## @SPE_PMU_FEAT_LDS
	.comm	_SYS_PMSIDR_EL1_ERND_SHIFT,4,2  ## @SYS_PMSIDR_EL1_ERND_SHIFT
	.comm	_SPE_PMU_FEAT_ERND,4,2          ## @SPE_PMU_FEAT_ERND
	.comm	_SYS_PMSIDR_EL1_INTERVAL_SHIFT,4,2 ## @SYS_PMSIDR_EL1_INTERVAL_SHIFT
	.comm	_SYS_PMSIDR_EL1_INTERVAL_MASK,4,2 ## @SYS_PMSIDR_EL1_INTERVAL_MASK
L_.str.3:                               ## @.str.3
	.asciz	"unknown PMSIDR_EL1.Interval [%d]; assuming 8\n"

	.comm	_SYS_PMSIDR_EL1_MAXSIZE_SHIFT,4,2 ## @SYS_PMSIDR_EL1_MAXSIZE_SHIFT
	.comm	_SYS_PMSIDR_EL1_MAXSIZE_MASK,4,2 ## @SYS_PMSIDR_EL1_MAXSIZE_MASK
L_.str.4:                               ## @.str.4
	.asciz	"unsupported PMSIDR_EL1.MaxSize [%d] on CPU %d\n"

	.comm	_SYS_PMSIDR_EL1_COUNTSIZE_SHIFT,4,2 ## @SYS_PMSIDR_EL1_COUNTSIZE_SHIFT
	.comm	_SYS_PMSIDR_EL1_COUNTSIZE_MASK,4,2 ## @SYS_PMSIDR_EL1_COUNTSIZE_MASK
L_.str.5:                               ## @.str.5
	.asciz	"unknown PMSIDR_EL1.CountSize [%d]; assuming 2\n"

L_.str.6:                               ## @.str.6
	.asciz	"probed for CPUs %*pbl [max_record_sz %u, align %u, features 0x%llx]\n"

	.comm	_SPE_PMU_FEAT_DEV_PROBED,4,2    ## @SPE_PMU_FEAT_DEV_PROBED
	.no_dead_strip	___arm_spe_pmu_dev_probe
	.section	__TEXT,__const
	.p2align	2                               ## @switch.table.__arm_spe_pmu_dev_probe
l_switch.table.__arm_spe_pmu_dev_probe:
	.long	256                             ## 0x100
	.long	256                             ## 0x100
	.long	512                             ## 0x200
	.long	768                             ## 0x300
	.long	1024                            ## 0x400
	.long	1536                            ## 0x600
	.long	2048                            ## 0x800
	.long	3072                            ## 0xc00
	.long	4096                            ## 0x1000

.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function __arm_spe_pmu_dev_probe
___arm_spe_pmu_dev_probe:               ; @__arm_spe_pmu_dev_probe
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #80
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x20, x0
	ldr	x19, [x0, #24]
Lloh0:
	adrp	x8, _ID_AA64DFR0_EL1@GOTPAGE
Lloh1:
	ldr	x8, [x8, _ID_AA64DFR0_EL1@GOTPAGEOFF]
Lloh2:
	ldr	w0, [x8]
	bl	_read_cpuid
Lloh3:
	adrp	x8, _ID_AA64DFR0_PMSVER_SHIFT@GOTPAGE
Lloh4:
	ldr	x8, [x8, _ID_AA64DFR0_PMSVER_SHIFT@GOTPAGEOFF]
Lloh5:
	ldr	w1, [x8]
	bl	_cpuid_feature_extract_unsigned_field
	cbz	w0, LBB0_3
; %bb.1:
Lloh6:
	adrp	x8, _SYS_PMBIDR_EL1@GOTPAGE
Lloh7:
	ldr	x8, [x8, _SYS_PMBIDR_EL1@GOTPAGEOFF]
Lloh8:
	ldr	w0, [x8]
	bl	_read_sysreg_s
	mov	x21, x0
Lloh9:
	adrp	x8, _SYS_PMBIDR_EL1_P_SHIFT@GOTPAGE
Lloh10:
	ldr	x8, [x8, _SYS_PMBIDR_EL1_P_SHIFT@GOTPAGEOFF]
Lloh11:
	ldr	w0, [x8]
	bl	_BIT
	tst	w0, w21
	b.eq	LBB0_4
; %bb.2:
Lloh12:
	adrp	x1, l_.str.1@PAGE
Lloh13:
	add	x1, x1, l_.str.1@PAGEOFF
	mov	x0, x19
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #80
	b	_dev_err
LBB0_3:
	bl	_smp_processor_id
                                        ; kill: def $w0 killed $w0 def $x0
	stp	xzr, x0, [sp]
Lloh14:
	adrp	x1, l_.str@PAGE
Lloh15:
	add	x1, x1, l_.str@PAGEOFF
	b	LBB0_28
LBB0_4:
Lloh16:
	adrp	x8, _SYS_PMBIDR_EL1_ALIGN_SHIFT@GOTPAGE
Lloh17:
	ldr	x8, [x8, _SYS_PMBIDR_EL1_ALIGN_SHIFT@GOTPAGEOFF]
Lloh18:
	ldr	w8, [x8]
	asr	w8, w21, w8
Lloh19:
	adrp	x9, _SYS_PMBIDR_EL1_ALIGN_MASK@GOTPAGE
Lloh20:
	ldr	x9, [x9, _SYS_PMBIDR_EL1_ALIGN_MASK@GOTPAGEOFF]
Lloh21:
	ldr	w9, [x9]
	and	w21, w8, w9
	mov	w8, #1
	lsl	w8, w8, w21
	str	w8, [x20]
Lloh22:
	adrp	x22, _SZ_2K@GOTPAGE
Lloh23:
	ldr	x22, [x22, _SZ_2K@GOTPAGEOFF]
	ldr	w9, [x22]
	cmp	w8, w9
	b.le	LBB0_6
; %bb.5:
	bl	_smp_processor_id
                                        ; kill: def $w0 killed $w0 def $x0
	stp	x21, x0, [sp]
Lloh24:
	adrp	x1, l_.str.2@PAGE
Lloh25:
	add	x1, x1, l_.str.2@PAGEOFF
	b	LBB0_28
LBB0_6:
Lloh26:
	adrp	x8, _SYS_PMSIDR_EL1@GOTPAGE
Lloh27:
	ldr	x8, [x8, _SYS_PMSIDR_EL1@GOTPAGEOFF]
Lloh28:
	ldr	w0, [x8]
	bl	_read_sysreg_s
	mov	x21, x0
Lloh29:
	adrp	x8, _SYS_PMSIDR_EL1_FE_SHIFT@GOTPAGE
Lloh30:
	ldr	x8, [x8, _SYS_PMSIDR_EL1_FE_SHIFT@GOTPAGEOFF]
Lloh31:
	ldr	w0, [x8]
	bl	_BIT
	tst	w0, w21
	b.eq	LBB0_8
; %bb.7:
Lloh32:
	adrp	x8, _SPE_PMU_FEAT_FILT_EVT@GOTPAGE
Lloh33:
	ldr	x8, [x8, _SPE_PMU_FEAT_FILT_EVT@GOTPAGEOFF]
Lloh34:
	ldr	w8, [x8]
	ldr	w9, [x20, #16]
	orr	w8, w9, w8
	str	w8, [x20, #16]
LBB0_8:
Lloh35:
	adrp	x8, _SYS_PMSIDR_EL1_FT_SHIFT@GOTPAGE
Lloh36:
	ldr	x8, [x8, _SYS_PMSIDR_EL1_FT_SHIFT@GOTPAGEOFF]
Lloh37:
	ldr	w0, [x8]
	bl	_BIT
	tst	w0, w21
	b.eq	LBB0_10
; %bb.9:
Lloh38:
	adrp	x8, _SPE_PMU_FEAT_FILT_TYP@GOTPAGE
Lloh39:
	ldr	x8, [x8, _SPE_PMU_FEAT_FILT_TYP@GOTPAGEOFF]
Lloh40:
	ldr	w8, [x8]
	ldr	w9, [x20, #16]
	orr	w8, w9, w8
	str	w8, [x20, #16]
LBB0_10:
Lloh41:
	adrp	x8, _SYS_PMSIDR_EL1_FL_SHIFT@GOTPAGE
Lloh42:
	ldr	x8, [x8, _SYS_PMSIDR_EL1_FL_SHIFT@GOTPAGEOFF]
Lloh43:
	ldr	w0, [x8]
	bl	_BIT
	tst	w0, w21
	b.eq	LBB0_12
; %bb.11:
Lloh44:
	adrp	x8, _SPE_PMU_FEAT_FILT_LAT@GOTPAGE
Lloh45:
	ldr	x8, [x8, _SPE_PMU_FEAT_FILT_LAT@GOTPAGEOFF]
Lloh46:
	ldr	w8, [x8]
	ldr	w9, [x20, #16]
	orr	w8, w9, w8
	str	w8, [x20, #16]
LBB0_12:
Lloh47:
	adrp	x8, _SYS_PMSIDR_EL1_ARCHINST_SHIFT@GOTPAGE
Lloh48:
	ldr	x8, [x8, _SYS_PMSIDR_EL1_ARCHINST_SHIFT@GOTPAGEOFF]
Lloh49:
	ldr	w0, [x8]
	bl	_BIT
	tst	w0, w21
	b.eq	LBB0_14
; %bb.13:
Lloh50:
	adrp	x8, _SPE_PMU_FEAT_ARCH_INST@GOTPAGE
Lloh51:
	ldr	x8, [x8, _SPE_PMU_FEAT_ARCH_INST@GOTPAGEOFF]
Lloh52:
	ldr	w8, [x8]
	ldr	w9, [x20, #16]
	orr	w8, w9, w8
	str	w8, [x20, #16]
LBB0_14:
Lloh53:
	adrp	x8, _SYS_PMSIDR_EL1_LDS_SHIFT@GOTPAGE
Lloh54:
	ldr	x8, [x8, _SYS_PMSIDR_EL1_LDS_SHIFT@GOTPAGEOFF]
Lloh55:
	ldr	w0, [x8]
	bl	_BIT
	tst	w0, w21
	b.eq	LBB0_16
; %bb.15:
Lloh56:
	adrp	x8, _SPE_PMU_FEAT_LDS@GOTPAGE
Lloh57:
	ldr	x8, [x8, _SPE_PMU_FEAT_LDS@GOTPAGEOFF]
Lloh58:
	ldr	w8, [x8]
	ldr	w9, [x20, #16]
	orr	w8, w9, w8
	str	w8, [x20, #16]
LBB0_16:
Lloh59:
	adrp	x8, _SYS_PMSIDR_EL1_ERND_SHIFT@GOTPAGE
Lloh60:
	ldr	x8, [x8, _SYS_PMSIDR_EL1_ERND_SHIFT@GOTPAGEOFF]
Lloh61:
	ldr	w0, [x8]
	bl	_BIT
	tst	w0, w21
	b.eq	LBB0_18
; %bb.17:
Lloh62:
	adrp	x8, _SPE_PMU_FEAT_ERND@GOTPAGE
Lloh63:
	ldr	x8, [x8, _SPE_PMU_FEAT_ERND@GOTPAGEOFF]
Lloh64:
	ldr	w8, [x8]
	ldr	w9, [x20, #16]
	orr	w8, w9, w8
	str	w8, [x20, #16]
LBB0_18:
Lloh65:
	adrp	x8, _SYS_PMSIDR_EL1_INTERVAL_SHIFT@GOTPAGE
Lloh66:
	ldr	x8, [x8, _SYS_PMSIDR_EL1_INTERVAL_SHIFT@GOTPAGEOFF]
Lloh67:
	ldr	w8, [x8]
	asr	w8, w21, w8
Lloh68:
	adrp	x9, _SYS_PMSIDR_EL1_INTERVAL_MASK@GOTPAGE
Lloh69:
	ldr	x9, [x9, _SYS_PMSIDR_EL1_INTERVAL_MASK@GOTPAGEOFF]
Lloh70:
	ldr	w9, [x9]
	and	w2, w8, w9
	cmp	w2, #9
	b.hs	LBB0_20
; %bb.19:
	mov	w8, #509
	lsr	w8, w8, w2
	tbnz	w8, #0, LBB0_21
LBB0_20:
Lloh71:
	adrp	x1, l_.str.3@PAGE
Lloh72:
	add	x1, x1, l_.str.3@PAGEOFF
	mov	x0, x19
                                        ; kill: def $w2 killed $w2 killed $x2
	bl	_dev_warn
	mov	w8, #4096
	b	LBB0_22
LBB0_21:
Lloh73:
	adrp	x8, l_switch.table.__arm_spe_pmu_dev_probe@PAGE
Lloh74:
	add	x8, x8, l_switch.table.__arm_spe_pmu_dev_probe@PAGEOFF
	ldr	w8, [x8, w2, sxtw #2]
LBB0_22:
Lloh75:
	adrp	x9, _SYS_PMSIDR_EL1_MAXSIZE_SHIFT@GOTPAGE
Lloh76:
	ldr	x9, [x9, _SYS_PMSIDR_EL1_MAXSIZE_SHIFT@GOTPAGEOFF]
Lloh77:
	ldr	w9, [x9]
	asr	w9, w21, w9
Lloh78:
	adrp	x10, _SYS_PMSIDR_EL1_MAXSIZE_MASK@GOTPAGE
Lloh79:
	ldr	x10, [x10, _SYS_PMSIDR_EL1_MAXSIZE_MASK@GOTPAGEOFF]
Lloh80:
	ldr	w10, [x10]
	and	w23, w9, w10
	mov	w9, #1
	lsl	w9, w9, w23
	stp	w8, w9, [x20, #4]
	ldr	w8, [x22]
	cmp	w9, w8
	b.gt	LBB0_27
; %bb.23:
	cmp	w9, #15
	b.le	LBB0_27
; %bb.24:
Lloh81:
	adrp	x8, _SYS_PMSIDR_EL1_COUNTSIZE_SHIFT@GOTPAGE
Lloh82:
	ldr	x8, [x8, _SYS_PMSIDR_EL1_COUNTSIZE_SHIFT@GOTPAGEOFF]
Lloh83:
	ldr	w8, [x8]
	asr	w8, w21, w8
Lloh84:
	adrp	x9, _SYS_PMSIDR_EL1_COUNTSIZE_MASK@GOTPAGE
Lloh85:
	ldr	x9, [x9, _SYS_PMSIDR_EL1_COUNTSIZE_MASK@GOTPAGEOFF]
Lloh86:
	ldr	w9, [x9]
	and	w2, w8, w9
	cmp	w2, #2
	b.eq	LBB0_26
; %bb.25:
Lloh87:
	adrp	x1, l_.str.5@PAGE
Lloh88:
	add	x1, x1, l_.str.5@PAGEOFF
	mov	x0, x19
	bl	_dev_warn
LBB0_26:
	mov	w8, #12
	str	w8, [x20, #12]
	add	x0, x20, #20
	bl	_cpumask_pr_args
	mov	x2, x0
	ldr	w3, [x20, #8]
	ldr	w4, [x20]
	ldr	w5, [x20, #16]
Lloh89:
	adrp	x1, l_.str.6@PAGE
Lloh90:
	add	x1, x1, l_.str.6@PAGEOFF
	mov	x0, x19
	bl	_dev_info
Lloh91:
	adrp	x8, _SPE_PMU_FEAT_DEV_PROBED@GOTPAGE
Lloh92:
	ldr	x8, [x8, _SPE_PMU_FEAT_DEV_PROBED@GOTPAGEOFF]
Lloh93:
	ldr	w8, [x8]
	ldr	w9, [x20, #16]
	orr	w8, w9, w8
	str	w8, [x20, #16]
	b	LBB0_29
LBB0_27:
	bl	_smp_processor_id
                                        ; kill: def $w0 killed $w0 def $x0
	stp	x23, x0, [sp]
Lloh94:
	adrp	x1, l_.str.4@PAGE
Lloh95:
	add	x1, x1, l_.str.4@PAGEOFF
LBB0_28:
	mov	x0, x19
	bl	_dev_err
LBB0_29:
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #80
	ret
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpAdd	Lloh12, Lloh13
	.loh AdrpAdd	Lloh14, Lloh15
	.loh AdrpLdrGot	Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh19, Lloh20, Lloh21
	.loh AdrpLdrGotLdr	Lloh16, Lloh17, Lloh18
	.loh AdrpAdd	Lloh24, Lloh25
	.loh AdrpLdrGotLdr	Lloh29, Lloh30, Lloh31
	.loh AdrpLdrGotLdr	Lloh26, Lloh27, Lloh28
	.loh AdrpLdrGotLdr	Lloh32, Lloh33, Lloh34
	.loh AdrpLdrGotLdr	Lloh35, Lloh36, Lloh37
	.loh AdrpLdrGotLdr	Lloh38, Lloh39, Lloh40
	.loh AdrpLdrGotLdr	Lloh41, Lloh42, Lloh43
	.loh AdrpLdrGotLdr	Lloh44, Lloh45, Lloh46
	.loh AdrpLdrGotLdr	Lloh47, Lloh48, Lloh49
	.loh AdrpLdrGotLdr	Lloh50, Lloh51, Lloh52
	.loh AdrpLdrGotLdr	Lloh53, Lloh54, Lloh55
	.loh AdrpLdrGotLdr	Lloh56, Lloh57, Lloh58
	.loh AdrpLdrGotLdr	Lloh59, Lloh60, Lloh61
	.loh AdrpLdrGotLdr	Lloh62, Lloh63, Lloh64
	.loh AdrpLdrGotLdr	Lloh68, Lloh69, Lloh70
	.loh AdrpLdrGotLdr	Lloh65, Lloh66, Lloh67
	.loh AdrpAdd	Lloh71, Lloh72
	.loh AdrpAdd	Lloh73, Lloh74
	.loh AdrpLdrGotLdr	Lloh78, Lloh79, Lloh80
	.loh AdrpLdrGotLdr	Lloh75, Lloh76, Lloh77
	.loh AdrpLdrGotLdr	Lloh84, Lloh85, Lloh86
	.loh AdrpLdrGotLdr	Lloh81, Lloh82, Lloh83
	.loh AdrpAdd	Lloh87, Lloh88
	.loh AdrpLdrGotLdr	Lloh91, Lloh92, Lloh93
	.loh AdrpAdd	Lloh89, Lloh90
	.loh AdrpAdd	Lloh94, Lloh95
	.cfi_endproc
                                        ; -- End function
	.comm	_ID_AA64DFR0_EL1,4,2            ; @ID_AA64DFR0_EL1
	.comm	_ID_AA64DFR0_PMSVER_SHIFT,4,2   ; @ID_AA64DFR0_PMSVER_SHIFT
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"unsupported ID_AA64DFR0_EL1.PMSVer [%d] on CPU %d\n"

	.comm	_SYS_PMBIDR_EL1,4,2             ; @SYS_PMBIDR_EL1
	.comm	_SYS_PMBIDR_EL1_P_SHIFT,4,2     ; @SYS_PMBIDR_EL1_P_SHIFT
l_.str.1:                               ; @.str.1
	.asciz	"profiling buffer owned by higher exception level\n"

	.comm	_SYS_PMBIDR_EL1_ALIGN_SHIFT,4,2 ; @SYS_PMBIDR_EL1_ALIGN_SHIFT
	.comm	_SYS_PMBIDR_EL1_ALIGN_MASK,4,2  ; @SYS_PMBIDR_EL1_ALIGN_MASK
	.comm	_SZ_2K,4,2                      ; @SZ_2K
l_.str.2:                               ; @.str.2
	.asciz	"unsupported PMBIDR.Align [%d] on CPU %d\n"

	.comm	_SYS_PMSIDR_EL1,4,2             ; @SYS_PMSIDR_EL1
	.comm	_SYS_PMSIDR_EL1_FE_SHIFT,4,2    ; @SYS_PMSIDR_EL1_FE_SHIFT
	.comm	_SPE_PMU_FEAT_FILT_EVT,4,2      ; @SPE_PMU_FEAT_FILT_EVT
	.comm	_SYS_PMSIDR_EL1_FT_SHIFT,4,2    ; @SYS_PMSIDR_EL1_FT_SHIFT
	.comm	_SPE_PMU_FEAT_FILT_TYP,4,2      ; @SPE_PMU_FEAT_FILT_TYP
	.comm	_SYS_PMSIDR_EL1_FL_SHIFT,4,2    ; @SYS_PMSIDR_EL1_FL_SHIFT
	.comm	_SPE_PMU_FEAT_FILT_LAT,4,2      ; @SPE_PMU_FEAT_FILT_LAT
	.comm	_SYS_PMSIDR_EL1_ARCHINST_SHIFT,4,2 ; @SYS_PMSIDR_EL1_ARCHINST_SHIFT
	.comm	_SPE_PMU_FEAT_ARCH_INST,4,2     ; @SPE_PMU_FEAT_ARCH_INST
	.comm	_SYS_PMSIDR_EL1_LDS_SHIFT,4,2   ; @SYS_PMSIDR_EL1_LDS_SHIFT
	.comm	_SPE_PMU_FEAT_LDS,4,2           ; @SPE_PMU_FEAT_LDS
	.comm	_SYS_PMSIDR_EL1_ERND_SHIFT,4,2  ; @SYS_PMSIDR_EL1_ERND_SHIFT
	.comm	_SPE_PMU_FEAT_ERND,4,2          ; @SPE_PMU_FEAT_ERND
	.comm	_SYS_PMSIDR_EL1_INTERVAL_SHIFT,4,2 ; @SYS_PMSIDR_EL1_INTERVAL_SHIFT
	.comm	_SYS_PMSIDR_EL1_INTERVAL_MASK,4,2 ; @SYS_PMSIDR_EL1_INTERVAL_MASK
l_.str.3:                               ; @.str.3
	.asciz	"unknown PMSIDR_EL1.Interval [%d]; assuming 8\n"

	.comm	_SYS_PMSIDR_EL1_MAXSIZE_SHIFT,4,2 ; @SYS_PMSIDR_EL1_MAXSIZE_SHIFT
	.comm	_SYS_PMSIDR_EL1_MAXSIZE_MASK,4,2 ; @SYS_PMSIDR_EL1_MAXSIZE_MASK
l_.str.4:                               ; @.str.4
	.asciz	"unsupported PMSIDR_EL1.MaxSize [%d] on CPU %d\n"

	.comm	_SYS_PMSIDR_EL1_COUNTSIZE_SHIFT,4,2 ; @SYS_PMSIDR_EL1_COUNTSIZE_SHIFT
	.comm	_SYS_PMSIDR_EL1_COUNTSIZE_MASK,4,2 ; @SYS_PMSIDR_EL1_COUNTSIZE_MASK
l_.str.5:                               ; @.str.5
	.asciz	"unknown PMSIDR_EL1.CountSize [%d]; assuming 2\n"

l_.str.6:                               ; @.str.6
	.asciz	"probed for CPUs %*pbl [max_record_sz %u, align %u, features 0x%llx]\n"

	.comm	_SPE_PMU_FEAT_DEV_PROBED,4,2    ; @SPE_PMU_FEAT_DEV_PROBED
	.no_dead_strip	___arm_spe_pmu_dev_probe
	.section	__TEXT,__const
	.p2align	2                               ; @switch.table.__arm_spe_pmu_dev_probe
l_switch.table.__arm_spe_pmu_dev_probe:
	.long	256                             ; 0x100
	.long	256                             ; 0x100
	.long	512                             ; 0x200
	.long	768                             ; 0x300
	.long	1024                            ; 0x400
	.long	1536                            ; 0x600
	.long	2048                            ; 0x800
	.long	3072                            ; 0xc00
	.long	4096                            ; 0x1000

.subsections_via_symbols
