	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function nwl_pcie_bridge_init
_nwl_pcie_bridge_init:                  ## @nwl_pcie_bridge_init
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r12
	movq	32(%rdi), %r14
	movq	%r14, %rdi
	callq	_to_platform_device
	movq	%rax, %r15
	movq	_E_BREG_CAPABILITIES@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r12, %rdi
	callq	_nwl_bridge_readl
	movq	_BREG_PRESENT@GOTPCREL(%rip), %rcx
	testl	%eax, (%rcx)
	je	LBB0_1
## %bb.3:
	movl	28(%r12), %edi
	callq	_lower_32_bits
	movq	_E_BREG_BASE_LO@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	movq	%r12, %rdi
	movl	%eax, %esi
	callq	_nwl_bridge_writel
	movl	28(%r12), %edi
	callq	_upper_32_bits
	movq	_E_BREG_BASE_HI@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	movq	%r12, %rdi
	movl	%eax, %esi
	callq	_nwl_bridge_writel
	movq	_BREG_ENABLE_FORCE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	notl	%esi
	movq	_BREG_ENABLE@GOTPCREL(%rip), %rax
	andl	(%rax), %esi
	movq	_E_BREG_CONTROL@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r12, %rdi
	callq	_nwl_bridge_writel
	movq	_BRCFG_PCIE_RX0@GOTPCREL(%rip), %rbx
	movl	(%rbx), %esi
	movq	%r12, %rdi
	callq	_nwl_bridge_readl
	movq	_CFG_DMA_REG_BAR@GOTPCREL(%rip), %rcx
	orl	(%rcx), %eax
	movl	(%rbx), %edx
	movq	%r12, %rdi
	movl	%eax, %esi
	callq	_nwl_bridge_writel
	movq	_SET_ISUB_CONTROL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_I_ISUB_CONTROL@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r12, %rdi
	callq	_nwl_bridge_writel
	movq	_CFG_ENABLE_MSG_FILTER_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_BRCFG_PCIE_RX_MSG_FILTER@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r12, %rdi
	callq	_nwl_bridge_writel
	movq	%r12, %rdi
	callq	_nwl_wait_for_link
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	LBB0_11
## %bb.4:
	movq	_E_ECAM_CAPABILITIES@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r12, %rdi
	callq	_nwl_bridge_readl
	movq	_E_ECAM_PRESENT@GOTPCREL(%rip), %rcx
	testl	%eax, (%rcx)
	je	LBB0_5
## %bb.6:
	movq	_E_ECAM_CONTROL@GOTPCREL(%rip), %rbx
	movl	(%rbx), %esi
	movq	%r12, %rdi
	callq	_nwl_bridge_readl
	movq	_E_ECAM_CR_ENABLE@GOTPCREL(%rip), %rcx
	orl	(%rcx), %eax
	movl	(%rbx), %edx
	movq	%r12, %rdi
	movl	%eax, %esi
	callq	_nwl_bridge_writel
	movl	(%rbx), %esi
	movq	%r12, %rdi
	callq	_nwl_bridge_readl
	movl	(%r12), %esi
	movq	_E_ECAM_SIZE_SHIFT@GOTPCREL(%rip), %r13
	movb	(%r13), %cl
	shll	%cl, %esi
	orl	%eax, %esi
	movl	(%rbx), %edx
	movq	%r12, %rdi
	callq	_nwl_bridge_writel
	movl	24(%r12), %edi
	callq	_lower_32_bits
	movq	_E_ECAM_BASE_LO@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	movq	%r12, %rdi
	movl	%eax, %esi
	callq	_nwl_bridge_writel
	movl	24(%r12), %edi
	callq	_upper_32_bits
	movq	_E_ECAM_BASE_HI@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	movq	%r12, %rdi
	movl	%eax, %esi
	callq	_nwl_bridge_writel
	movl	(%rbx), %esi
	movq	%r12, %rdi
	callq	_nwl_bridge_readl
	movq	_E_ECAM_SIZE_LOC@GOTPCREL(%rip), %rcx
	andl	(%rcx), %eax
	movb	(%r13), %cl
	sarl	%cl, %eax
	movl	%eax, 4(%r12)
	shll	%cl, %eax
	orl	$256, %eax                      ## imm = 0x100
	movq	_PCI_PRIMARY_BUS@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rsi
	addq	16(%r12), %rsi
	movl	%eax, %edi
	callq	_writel
	movq	%r12, %rdi
	callq	_nwl_pcie_link_up
	testq	%rax, %rax
	leaq	L_.str.3(%rip), %rax
	leaq	L_.str.2(%rip), %rsi
	cmoveq	%rax, %rsi
	movq	%r14, %rdi
	callq	_dev_info
	leaq	L_.str.4(%rip), %rsi
	movq	%r15, %rdi
	callq	_platform_get_irq_byname
	movl	%eax, 8(%r12)
	testl	%eax, %eax
	js	LBB0_7
## %bb.8:
	movq	_nwl_pcie_misc_handler@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	movq	_IRQF_SHARED@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	leaq	L_.str.6(%rip), %r8
	movq	%r14, %rdi
	movl	%eax, %esi
	movq	%r12, %r9
	callq	_devm_request_irq
	testl	%eax, %eax
	je	LBB0_10
## %bb.9:
	movl	%eax, %ebx
	movl	8(%r12), %edx
	leaq	L_.str.7(%rip), %rsi
	movq	%r14, %rdi
	xorl	%eax, %eax
	callq	_dev_err
	jmp	LBB0_11
LBB0_1:
	leaq	L_.str(%rip), %rsi
LBB0_2:
	xorl	%ebx, %ebx
	movq	%r14, %rdi
	xorl	%eax, %eax
	callq	_dev_err
LBB0_11:
	movl	%ebx, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_5:
	leaq	L_.str.1(%rip), %rsi
	jmp	LBB0_2
LBB0_7:
	leaq	L_.str.5(%rip), %rsi
	xorl	%ebx, %ebx
	movq	%r14, %rdi
	movl	%eax, %edx
	xorl	%eax, %eax
	callq	_dev_err
	movq	_EINVAL@GOTPCREL(%rip), %rax
	subl	(%rax), %ebx
	jmp	LBB0_11
LBB0_10:
	movq	_MSGF_MISC_SR_MASKALL@GOTPCREL(%rip), %r15
	movl	(%r15), %esi
	notl	%esi
	movq	_MSGF_MISC_MASK@GOTPCREL(%rip), %r14
	movl	(%r14), %edx
	movq	%r12, %rdi
	callq	_nwl_bridge_writel
	movq	_MSGF_MISC_STATUS@GOTPCREL(%rip), %rbx
	movl	(%rbx), %esi
	movq	%r12, %rdi
	callq	_nwl_bridge_readl
	andl	(%r15), %eax
	movl	(%rbx), %edx
	movq	%r12, %rdi
	movl	%eax, %esi
	callq	_nwl_bridge_writel
	movl	(%r15), %esi
	movl	(%r14), %edx
	movq	%r12, %rdi
	callq	_nwl_bridge_writel
	movq	_MSGF_LEG_SR_MASKALL@GOTPCREL(%rip), %r15
	movl	(%r15), %esi
	notl	%esi
	movq	_MSGF_LEG_MASK@GOTPCREL(%rip), %r14
	movl	(%r14), %edx
	movq	%r12, %rdi
	callq	_nwl_bridge_writel
	movq	_MSGF_LEG_STATUS@GOTPCREL(%rip), %rbx
	movl	(%rbx), %esi
	movq	%r12, %rdi
	callq	_nwl_bridge_readl
	andl	(%r15), %eax
	movl	(%rbx), %edx
	movq	%r12, %rdi
	movl	%eax, %esi
	callq	_nwl_bridge_writel
	movl	(%r15), %esi
	movl	(%r14), %edx
	movq	%r12, %rdi
	callq	_nwl_bridge_writel
	movq	_BRCFG_INTERRUPT@GOTPCREL(%rip), %rbx
	movl	(%rbx), %esi
	movq	%r12, %rdi
	callq	_nwl_bridge_readl
	movq	_BRCFG_INTERRUPT_MASK@GOTPCREL(%rip), %rcx
	orl	(%rcx), %eax
	movl	(%rbx), %edx
	movq	%r12, %rdi
	movl	%eax, %esi
	callq	_nwl_bridge_writel
	xorl	%ebx, %ebx
	jmp	LBB0_11
	.cfi_endproc
                                        ## -- End function
	.comm	_E_BREG_CAPABILITIES,4,2        ## @E_BREG_CAPABILITIES
	.comm	_BREG_PRESENT,4,2               ## @BREG_PRESENT
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"BREG is not present\n"

	.comm	_E_BREG_BASE_LO,4,2             ## @E_BREG_BASE_LO
	.comm	_E_BREG_BASE_HI,4,2             ## @E_BREG_BASE_HI
	.comm	_BREG_ENABLE_FORCE,4,2          ## @BREG_ENABLE_FORCE
	.comm	_BREG_ENABLE,4,2                ## @BREG_ENABLE
	.comm	_E_BREG_CONTROL,4,2             ## @E_BREG_CONTROL
	.comm	_BRCFG_PCIE_RX0,4,2             ## @BRCFG_PCIE_RX0
	.comm	_CFG_DMA_REG_BAR,4,2            ## @CFG_DMA_REG_BAR
	.comm	_SET_ISUB_CONTROL,4,2           ## @SET_ISUB_CONTROL
	.comm	_I_ISUB_CONTROL,4,2             ## @I_ISUB_CONTROL
	.comm	_CFG_ENABLE_MSG_FILTER_MASK,4,2 ## @CFG_ENABLE_MSG_FILTER_MASK
	.comm	_BRCFG_PCIE_RX_MSG_FILTER,4,2   ## @BRCFG_PCIE_RX_MSG_FILTER
	.comm	_E_ECAM_CAPABILITIES,4,2        ## @E_ECAM_CAPABILITIES
	.comm	_E_ECAM_PRESENT,4,2             ## @E_ECAM_PRESENT
L_.str.1:                               ## @.str.1
	.asciz	"ECAM is not present\n"

	.comm	_E_ECAM_CONTROL,4,2             ## @E_ECAM_CONTROL
	.comm	_E_ECAM_CR_ENABLE,4,2           ## @E_ECAM_CR_ENABLE
	.comm	_E_ECAM_SIZE_SHIFT,4,2          ## @E_ECAM_SIZE_SHIFT
	.comm	_E_ECAM_BASE_LO,4,2             ## @E_ECAM_BASE_LO
	.comm	_E_ECAM_BASE_HI,4,2             ## @E_ECAM_BASE_HI
	.comm	_E_ECAM_SIZE_LOC,4,2            ## @E_ECAM_SIZE_LOC
	.comm	_PCI_PRIMARY_BUS,8,3            ## @PCI_PRIMARY_BUS
L_.str.2:                               ## @.str.2
	.asciz	"Link is UP\n"

L_.str.3:                               ## @.str.3
	.asciz	"Link is DOWN\n"

L_.str.4:                               ## @.str.4
	.asciz	"misc"

L_.str.5:                               ## @.str.5
	.asciz	"failed to get misc IRQ %d\n"

	.comm	_EINVAL,4,2                     ## @EINVAL
	.comm	_nwl_pcie_misc_handler,4,2      ## @nwl_pcie_misc_handler
	.comm	_IRQF_SHARED,4,2                ## @IRQF_SHARED
L_.str.6:                               ## @.str.6
	.asciz	"nwl_pcie:misc"

L_.str.7:                               ## @.str.7
	.asciz	"fail to register misc IRQ#%d\n"

	.comm	_MSGF_MISC_SR_MASKALL,4,2       ## @MSGF_MISC_SR_MASKALL
	.comm	_MSGF_MISC_MASK,4,2             ## @MSGF_MISC_MASK
	.comm	_MSGF_MISC_STATUS,4,2           ## @MSGF_MISC_STATUS
	.comm	_MSGF_LEG_SR_MASKALL,4,2        ## @MSGF_LEG_SR_MASKALL
	.comm	_MSGF_LEG_MASK,4,2              ## @MSGF_LEG_MASK
	.comm	_MSGF_LEG_STATUS,4,2            ## @MSGF_LEG_STATUS
	.comm	_BRCFG_INTERRUPT,4,2            ## @BRCFG_INTERRUPT
	.comm	_BRCFG_INTERRUPT_MASK,4,2       ## @BRCFG_INTERRUPT_MASK
	.no_dead_strip	_nwl_pcie_bridge_init
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function nwl_pcie_bridge_init
_nwl_pcie_bridge_init:                  ; @nwl_pcie_bridge_init
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #80
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x19, x0
	ldr	x20, [x0, #32]
	mov	x0, x20
	bl	_to_platform_device
	mov	x21, x0
Lloh0:
	adrp	x8, _E_BREG_CAPABILITIES@GOTPAGE
Lloh1:
	ldr	x8, [x8, _E_BREG_CAPABILITIES@GOTPAGEOFF]
Lloh2:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_nwl_bridge_readl
Lloh3:
	adrp	x8, _BREG_PRESENT@GOTPAGE
Lloh4:
	ldr	x8, [x8, _BREG_PRESENT@GOTPAGEOFF]
Lloh5:
	ldr	w8, [x8]
	tst	w8, w0
	b.eq	LBB0_6
; %bb.1:
	ldr	w0, [x19, #28]
	bl	_lower_32_bits
	mov	x1, x0
Lloh6:
	adrp	x8, _E_BREG_BASE_LO@GOTPAGE
Lloh7:
	ldr	x8, [x8, _E_BREG_BASE_LO@GOTPAGEOFF]
Lloh8:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_nwl_bridge_writel
	ldr	w0, [x19, #28]
	bl	_upper_32_bits
	mov	x1, x0
Lloh9:
	adrp	x8, _E_BREG_BASE_HI@GOTPAGE
Lloh10:
	ldr	x8, [x8, _E_BREG_BASE_HI@GOTPAGEOFF]
Lloh11:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_nwl_bridge_writel
Lloh12:
	adrp	x8, _BREG_ENABLE_FORCE@GOTPAGE
Lloh13:
	ldr	x8, [x8, _BREG_ENABLE_FORCE@GOTPAGEOFF]
Lloh14:
	adrp	x9, _BREG_ENABLE@GOTPAGE
Lloh15:
	ldr	x9, [x9, _BREG_ENABLE@GOTPAGEOFF]
Lloh16:
	ldr	w8, [x8]
Lloh17:
	ldr	w9, [x9]
	bic	w1, w9, w8
Lloh18:
	adrp	x8, _E_BREG_CONTROL@GOTPAGE
Lloh19:
	ldr	x8, [x8, _E_BREG_CONTROL@GOTPAGEOFF]
Lloh20:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_nwl_bridge_writel
Lloh21:
	adrp	x22, _BRCFG_PCIE_RX0@GOTPAGE
Lloh22:
	ldr	x22, [x22, _BRCFG_PCIE_RX0@GOTPAGEOFF]
	ldr	w1, [x22]
	mov	x0, x19
	bl	_nwl_bridge_readl
Lloh23:
	adrp	x8, _CFG_DMA_REG_BAR@GOTPAGE
Lloh24:
	ldr	x8, [x8, _CFG_DMA_REG_BAR@GOTPAGEOFF]
Lloh25:
	ldr	w8, [x8]
	orr	w1, w8, w0
	ldr	w2, [x22]
	mov	x0, x19
	bl	_nwl_bridge_writel
Lloh26:
	adrp	x8, _SET_ISUB_CONTROL@GOTPAGE
Lloh27:
	ldr	x8, [x8, _SET_ISUB_CONTROL@GOTPAGEOFF]
Lloh28:
	ldr	w1, [x8]
Lloh29:
	adrp	x8, _I_ISUB_CONTROL@GOTPAGE
Lloh30:
	ldr	x8, [x8, _I_ISUB_CONTROL@GOTPAGEOFF]
Lloh31:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_nwl_bridge_writel
Lloh32:
	adrp	x8, _CFG_ENABLE_MSG_FILTER_MASK@GOTPAGE
Lloh33:
	ldr	x8, [x8, _CFG_ENABLE_MSG_FILTER_MASK@GOTPAGEOFF]
Lloh34:
	ldr	w1, [x8]
Lloh35:
	adrp	x8, _BRCFG_PCIE_RX_MSG_FILTER@GOTPAGE
Lloh36:
	ldr	x8, [x8, _BRCFG_PCIE_RX_MSG_FILTER@GOTPAGEOFF]
Lloh37:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_nwl_bridge_writel
	mov	x0, x19
	bl	_nwl_wait_for_link
	mov	x22, x0
	cbnz	w0, LBB0_9
; %bb.2:
Lloh38:
	adrp	x8, _E_ECAM_CAPABILITIES@GOTPAGE
Lloh39:
	ldr	x8, [x8, _E_ECAM_CAPABILITIES@GOTPAGEOFF]
Lloh40:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_nwl_bridge_readl
Lloh41:
	adrp	x8, _E_ECAM_PRESENT@GOTPAGE
Lloh42:
	ldr	x8, [x8, _E_ECAM_PRESENT@GOTPAGEOFF]
Lloh43:
	ldr	w8, [x8]
	tst	w8, w0
	b.eq	LBB0_10
; %bb.3:
Lloh44:
	adrp	x22, _E_ECAM_CONTROL@GOTPAGE
Lloh45:
	ldr	x22, [x22, _E_ECAM_CONTROL@GOTPAGEOFF]
	ldr	w1, [x22]
	mov	x0, x19
	bl	_nwl_bridge_readl
Lloh46:
	adrp	x8, _E_ECAM_CR_ENABLE@GOTPAGE
Lloh47:
	ldr	x8, [x8, _E_ECAM_CR_ENABLE@GOTPAGEOFF]
Lloh48:
	ldr	w8, [x8]
	orr	w1, w8, w0
	ldr	w2, [x22]
	mov	x0, x19
	bl	_nwl_bridge_writel
	ldr	w1, [x22]
	mov	x0, x19
	bl	_nwl_bridge_readl
	ldr	w8, [x19]
Lloh49:
	adrp	x23, _E_ECAM_SIZE_SHIFT@GOTPAGE
Lloh50:
	ldr	x23, [x23, _E_ECAM_SIZE_SHIFT@GOTPAGEOFF]
	ldr	w9, [x23]
	lsl	w8, w8, w9
	orr	w1, w8, w0
	ldr	w2, [x22]
	mov	x0, x19
	bl	_nwl_bridge_writel
	ldr	w0, [x19, #24]
	bl	_lower_32_bits
	mov	x1, x0
Lloh51:
	adrp	x8, _E_ECAM_BASE_LO@GOTPAGE
Lloh52:
	ldr	x8, [x8, _E_ECAM_BASE_LO@GOTPAGEOFF]
Lloh53:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_nwl_bridge_writel
	ldr	w0, [x19, #24]
	bl	_upper_32_bits
	mov	x1, x0
Lloh54:
	adrp	x8, _E_ECAM_BASE_HI@GOTPAGE
Lloh55:
	ldr	x8, [x8, _E_ECAM_BASE_HI@GOTPAGEOFF]
Lloh56:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_nwl_bridge_writel
	ldr	w1, [x22]
	mov	x0, x19
	bl	_nwl_bridge_readl
Lloh57:
	adrp	x8, _E_ECAM_SIZE_LOC@GOTPAGE
Lloh58:
	ldr	x8, [x8, _E_ECAM_SIZE_LOC@GOTPAGEOFF]
Lloh59:
	ldr	w8, [x8]
	and	w8, w8, w0
	ldr	w9, [x23]
	asr	w8, w8, w9
	str	w8, [x19, #4]
	lsl	w8, w8, w9
	orr	w0, w8, #0x100
	ldr	x8, [x19, #16]
Lloh60:
	adrp	x9, _PCI_PRIMARY_BUS@GOTPAGE
Lloh61:
	ldr	x9, [x9, _PCI_PRIMARY_BUS@GOTPAGEOFF]
Lloh62:
	ldr	x9, [x9]
	add	x1, x9, x8
	bl	_writel
	mov	x0, x19
	bl	_nwl_pcie_link_up
Lloh63:
	adrp	x8, l_.str.2@PAGE
Lloh64:
	add	x8, x8, l_.str.2@PAGEOFF
Lloh65:
	adrp	x9, l_.str.3@PAGE
Lloh66:
	add	x9, x9, l_.str.3@PAGEOFF
	cmp	x0, #0
	csel	x1, x9, x8, eq
	mov	x0, x20
	bl	_dev_info
Lloh67:
	adrp	x1, l_.str.4@PAGE
Lloh68:
	add	x1, x1, l_.str.4@PAGEOFF
	mov	x0, x21
	bl	_platform_get_irq_byname
	mov	x1, x0
	str	w0, [x19, #8]
	tbnz	w0, #31, LBB0_11
; %bb.4:
Lloh69:
	adrp	x8, _nwl_pcie_misc_handler@GOTPAGE
Lloh70:
	ldr	x8, [x8, _nwl_pcie_misc_handler@GOTPAGEOFF]
Lloh71:
	ldr	w2, [x8]
Lloh72:
	adrp	x8, _IRQF_SHARED@GOTPAGE
Lloh73:
	ldr	x8, [x8, _IRQF_SHARED@GOTPAGEOFF]
Lloh74:
	ldr	w3, [x8]
Lloh75:
	adrp	x4, l_.str.6@PAGE
Lloh76:
	add	x4, x4, l_.str.6@PAGEOFF
	mov	x0, x20
                                        ; kill: def $w1 killed $w1 killed $x1
	mov	x5, x19
	bl	_devm_request_irq
	cbz	w0, LBB0_12
; %bb.5:
	mov	x22, x0
	ldr	w8, [x19, #8]
	str	x8, [sp]
Lloh77:
	adrp	x1, l_.str.7@PAGE
Lloh78:
	add	x1, x1, l_.str.7@PAGEOFF
	mov	x0, x20
	bl	_dev_err
	b	LBB0_9
LBB0_6:
Lloh79:
	adrp	x1, l_.str@PAGE
Lloh80:
	add	x1, x1, l_.str@PAGEOFF
LBB0_7:
	mov	x0, x20
	bl	_dev_err
LBB0_8:
	mov	w22, #0
LBB0_9:
	mov	x0, x22
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #80
	ret
LBB0_10:
Lloh81:
	adrp	x1, l_.str.1@PAGE
Lloh82:
	add	x1, x1, l_.str.1@PAGEOFF
	b	LBB0_7
LBB0_11:
	str	x1, [sp]
Lloh83:
	adrp	x1, l_.str.5@PAGE
Lloh84:
	add	x1, x1, l_.str.5@PAGEOFF
	mov	x0, x20
	bl	_dev_err
Lloh85:
	adrp	x8, _EINVAL@GOTPAGE
Lloh86:
	ldr	x8, [x8, _EINVAL@GOTPAGEOFF]
Lloh87:
	ldr	w8, [x8]
	neg	w22, w8
	b	LBB0_9
LBB0_12:
Lloh88:
	adrp	x20, _MSGF_MISC_SR_MASKALL@GOTPAGE
Lloh89:
	ldr	x20, [x20, _MSGF_MISC_SR_MASKALL@GOTPAGEOFF]
	ldr	w8, [x20]
	mvn	w1, w8
Lloh90:
	adrp	x21, _MSGF_MISC_MASK@GOTPAGE
Lloh91:
	ldr	x21, [x21, _MSGF_MISC_MASK@GOTPAGEOFF]
	ldr	w2, [x21]
	mov	x0, x19
	bl	_nwl_bridge_writel
Lloh92:
	adrp	x22, _MSGF_MISC_STATUS@GOTPAGE
Lloh93:
	ldr	x22, [x22, _MSGF_MISC_STATUS@GOTPAGEOFF]
	ldr	w1, [x22]
	mov	x0, x19
	bl	_nwl_bridge_readl
	ldr	w8, [x20]
	and	w1, w8, w0
	ldr	w2, [x22]
	mov	x0, x19
	bl	_nwl_bridge_writel
	ldr	w1, [x20]
	ldr	w2, [x21]
	mov	x0, x19
	bl	_nwl_bridge_writel
Lloh94:
	adrp	x20, _MSGF_LEG_SR_MASKALL@GOTPAGE
Lloh95:
	ldr	x20, [x20, _MSGF_LEG_SR_MASKALL@GOTPAGEOFF]
	ldr	w8, [x20]
	mvn	w1, w8
Lloh96:
	adrp	x21, _MSGF_LEG_MASK@GOTPAGE
Lloh97:
	ldr	x21, [x21, _MSGF_LEG_MASK@GOTPAGEOFF]
	ldr	w2, [x21]
	mov	x0, x19
	bl	_nwl_bridge_writel
Lloh98:
	adrp	x22, _MSGF_LEG_STATUS@GOTPAGE
Lloh99:
	ldr	x22, [x22, _MSGF_LEG_STATUS@GOTPAGEOFF]
	ldr	w1, [x22]
	mov	x0, x19
	bl	_nwl_bridge_readl
	ldr	w8, [x20]
	and	w1, w8, w0
	ldr	w2, [x22]
	mov	x0, x19
	bl	_nwl_bridge_writel
	ldr	w1, [x20]
	ldr	w2, [x21]
	mov	x0, x19
	bl	_nwl_bridge_writel
Lloh100:
	adrp	x20, _BRCFG_INTERRUPT@GOTPAGE
Lloh101:
	ldr	x20, [x20, _BRCFG_INTERRUPT@GOTPAGEOFF]
	ldr	w1, [x20]
	mov	x0, x19
	bl	_nwl_bridge_readl
Lloh102:
	adrp	x8, _BRCFG_INTERRUPT_MASK@GOTPAGE
Lloh103:
	ldr	x8, [x8, _BRCFG_INTERRUPT_MASK@GOTPAGEOFF]
Lloh104:
	ldr	w8, [x8]
	orr	w1, w8, w0
	ldr	w2, [x20]
	mov	x0, x19
	bl	_nwl_bridge_writel
	b	LBB0_8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh35, Lloh36, Lloh37
	.loh AdrpLdrGotLdr	Lloh32, Lloh33, Lloh34
	.loh AdrpLdrGotLdr	Lloh29, Lloh30, Lloh31
	.loh AdrpLdrGotLdr	Lloh26, Lloh27, Lloh28
	.loh AdrpLdrGotLdr	Lloh23, Lloh24, Lloh25
	.loh AdrpLdrGot	Lloh21, Lloh22
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh17
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh16
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh41, Lloh42, Lloh43
	.loh AdrpLdrGotLdr	Lloh38, Lloh39, Lloh40
	.loh AdrpAdd	Lloh67, Lloh68
	.loh AdrpAdd	Lloh65, Lloh66
	.loh AdrpAdd	Lloh63, Lloh64
	.loh AdrpLdrGotLdr	Lloh60, Lloh61, Lloh62
	.loh AdrpLdrGotLdr	Lloh57, Lloh58, Lloh59
	.loh AdrpLdrGotLdr	Lloh54, Lloh55, Lloh56
	.loh AdrpLdrGotLdr	Lloh51, Lloh52, Lloh53
	.loh AdrpLdrGot	Lloh49, Lloh50
	.loh AdrpLdrGotLdr	Lloh46, Lloh47, Lloh48
	.loh AdrpLdrGot	Lloh44, Lloh45
	.loh AdrpAdd	Lloh75, Lloh76
	.loh AdrpLdrGotLdr	Lloh72, Lloh73, Lloh74
	.loh AdrpLdrGotLdr	Lloh69, Lloh70, Lloh71
	.loh AdrpAdd	Lloh77, Lloh78
	.loh AdrpAdd	Lloh79, Lloh80
	.loh AdrpAdd	Lloh81, Lloh82
	.loh AdrpLdrGotLdr	Lloh85, Lloh86, Lloh87
	.loh AdrpAdd	Lloh83, Lloh84
	.loh AdrpLdrGotLdr	Lloh102, Lloh103, Lloh104
	.loh AdrpLdrGot	Lloh100, Lloh101
	.loh AdrpLdrGot	Lloh98, Lloh99
	.loh AdrpLdrGot	Lloh96, Lloh97
	.loh AdrpLdrGot	Lloh94, Lloh95
	.loh AdrpLdrGot	Lloh92, Lloh93
	.loh AdrpLdrGot	Lloh90, Lloh91
	.loh AdrpLdrGot	Lloh88, Lloh89
	.cfi_endproc
                                        ; -- End function
	.comm	_E_BREG_CAPABILITIES,4,2        ; @E_BREG_CAPABILITIES
	.comm	_BREG_PRESENT,4,2               ; @BREG_PRESENT
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"BREG is not present\n"

	.comm	_E_BREG_BASE_LO,4,2             ; @E_BREG_BASE_LO
	.comm	_E_BREG_BASE_HI,4,2             ; @E_BREG_BASE_HI
	.comm	_BREG_ENABLE_FORCE,4,2          ; @BREG_ENABLE_FORCE
	.comm	_BREG_ENABLE,4,2                ; @BREG_ENABLE
	.comm	_E_BREG_CONTROL,4,2             ; @E_BREG_CONTROL
	.comm	_BRCFG_PCIE_RX0,4,2             ; @BRCFG_PCIE_RX0
	.comm	_CFG_DMA_REG_BAR,4,2            ; @CFG_DMA_REG_BAR
	.comm	_SET_ISUB_CONTROL,4,2           ; @SET_ISUB_CONTROL
	.comm	_I_ISUB_CONTROL,4,2             ; @I_ISUB_CONTROL
	.comm	_CFG_ENABLE_MSG_FILTER_MASK,4,2 ; @CFG_ENABLE_MSG_FILTER_MASK
	.comm	_BRCFG_PCIE_RX_MSG_FILTER,4,2   ; @BRCFG_PCIE_RX_MSG_FILTER
	.comm	_E_ECAM_CAPABILITIES,4,2        ; @E_ECAM_CAPABILITIES
	.comm	_E_ECAM_PRESENT,4,2             ; @E_ECAM_PRESENT
l_.str.1:                               ; @.str.1
	.asciz	"ECAM is not present\n"

	.comm	_E_ECAM_CONTROL,4,2             ; @E_ECAM_CONTROL
	.comm	_E_ECAM_CR_ENABLE,4,2           ; @E_ECAM_CR_ENABLE
	.comm	_E_ECAM_SIZE_SHIFT,4,2          ; @E_ECAM_SIZE_SHIFT
	.comm	_E_ECAM_BASE_LO,4,2             ; @E_ECAM_BASE_LO
	.comm	_E_ECAM_BASE_HI,4,2             ; @E_ECAM_BASE_HI
	.comm	_E_ECAM_SIZE_LOC,4,2            ; @E_ECAM_SIZE_LOC
	.comm	_PCI_PRIMARY_BUS,8,3            ; @PCI_PRIMARY_BUS
l_.str.2:                               ; @.str.2
	.asciz	"Link is UP\n"

l_.str.3:                               ; @.str.3
	.asciz	"Link is DOWN\n"

l_.str.4:                               ; @.str.4
	.asciz	"misc"

l_.str.5:                               ; @.str.5
	.asciz	"failed to get misc IRQ %d\n"

	.comm	_EINVAL,4,2                     ; @EINVAL
	.comm	_nwl_pcie_misc_handler,4,2      ; @nwl_pcie_misc_handler
	.comm	_IRQF_SHARED,4,2                ; @IRQF_SHARED
l_.str.6:                               ; @.str.6
	.asciz	"nwl_pcie:misc"

l_.str.7:                               ; @.str.7
	.asciz	"fail to register misc IRQ#%d\n"

	.comm	_MSGF_MISC_SR_MASKALL,4,2       ; @MSGF_MISC_SR_MASKALL
	.comm	_MSGF_MISC_MASK,4,2             ; @MSGF_MISC_MASK
	.comm	_MSGF_MISC_STATUS,4,2           ; @MSGF_MISC_STATUS
	.comm	_MSGF_LEG_SR_MASKALL,4,2        ; @MSGF_LEG_SR_MASKALL
	.comm	_MSGF_LEG_MASK,4,2              ; @MSGF_LEG_MASK
	.comm	_MSGF_LEG_STATUS,4,2            ; @MSGF_LEG_STATUS
	.comm	_BRCFG_INTERRUPT,4,2            ; @BRCFG_INTERRUPT
	.comm	_BRCFG_INTERRUPT_MASK,4,2       ; @BRCFG_INTERRUPT_MASK
	.no_dead_strip	_nwl_pcie_bridge_init
.subsections_via_symbols
