	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function amd_gpio_irq_enable
_amd_gpio_irq_enable:                   ## @amd_gpio_irq_enable
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r14
	callq	_irq_data_get_irq_chip_data
	movq	%rax, %rdi
	callq	_gpiochip_get_data
	movq	%rax, %r12
	movq	%rax, %rdi
	callq	_raw_spin_lock_irqsave
	movslq	(%r14), %rdi
	shlq	$2, %rdi
	addq	8(%r12), %rdi
	callq	_readl
	movl	%eax, %r15d
	movq	_INTERRUPT_ENABLE_OFF@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_BIT
	movl	%eax, %ebx
	movq	_INTERRUPT_MASK_OFF@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_BIT
	orl	%eax, %ebx
	orl	%r15d, %ebx
	movslq	(%r14), %rsi
	shlq	$2, %rsi
	addq	8(%r12), %rsi
	movl	%ebx, %edi
	callq	_writel
	movq	%r12, %rdi
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_raw_spin_unlock_irqrestore     ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_INTERRUPT_ENABLE_OFF,4,2       ## @INTERRUPT_ENABLE_OFF
	.comm	_INTERRUPT_MASK_OFF,4,2         ## @INTERRUPT_MASK_OFF
	.no_dead_strip	_amd_gpio_irq_enable
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function amd_gpio_irq_enable
_amd_gpio_irq_enable:                   ; @amd_gpio_irq_enable
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x0
	bl	_irq_data_get_irq_chip_data
	bl	_gpiochip_get_data
	mov	x20, x0
	bl	_raw_spin_lock_irqsave
	ldr	x8, [x20, #8]
	ldrsw	x9, [x19]
	add	x0, x8, x9, lsl #2
	bl	_readl
	mov	x21, x0
Lloh0:
	adrp	x8, _INTERRUPT_ENABLE_OFF@GOTPAGE
Lloh1:
	ldr	x8, [x8, _INTERRUPT_ENABLE_OFF@GOTPAGEOFF]
Lloh2:
	ldr	w0, [x8]
	bl	_BIT
	orr	w21, w0, w21
Lloh3:
	adrp	x8, _INTERRUPT_MASK_OFF@GOTPAGE
Lloh4:
	ldr	x8, [x8, _INTERRUPT_MASK_OFF@GOTPAGEOFF]
Lloh5:
	ldr	w0, [x8]
	bl	_BIT
	orr	w0, w21, w0
	ldr	x8, [x20, #8]
	ldrsw	x9, [x19]
	add	x1, x8, x9, lsl #2
	bl	_writel
	mov	x0, x20
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	_raw_spin_unlock_irqrestore
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_INTERRUPT_ENABLE_OFF,4,2       ; @INTERRUPT_ENABLE_OFF
	.comm	_INTERRUPT_MASK_OFF,4,2         ; @INTERRUPT_MASK_OFF
	.no_dead_strip	_amd_gpio_irq_enable
.subsections_via_symbols
