	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function dp83640_config_intr
_dp83640_config_intr:                   ## @dp83640_config_intr
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r14
	pushq	%rbx
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	movq	%rdi, %rbx
	movq	(%rdi), %rax
	movq	_PHY_INTERRUPT_ENABLED@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jne	LBB0_5
## %bb.1:
	movq	_MII_DP83640_MISR@GOTPCREL(%rip), %r14
	movl	(%r14), %esi
	movq	%rbx, %rdi
	callq	_phy_read
	testl	%eax, %eax
	js	LBB0_10
## %bb.2:
	movq	_MII_DP83640_MISR_ANC_INT_EN@GOTPCREL(%rip), %rcx
	movq	_MII_DP83640_MISR_DUP_INT_EN@GOTPCREL(%rip), %rsi
	movq	_MII_DP83640_MISR_SPD_INT_EN@GOTPCREL(%rip), %rdi
	movl	(%rcx), %edx
	orl	%eax, %edx
	orl	(%rsi), %edx
	orl	(%rdi), %edx
	movq	_MII_DP83640_MISR_LINK_INT_EN@GOTPCREL(%rip), %rax
	orl	(%rax), %edx
	movl	(%r14), %esi
	movq	%rbx, %rdi
	callq	_phy_write
	testl	%eax, %eax
	js	LBB0_10
## %bb.3:
	movq	_MII_DP83640_MICR@GOTPCREL(%rip), %r14
	movl	(%r14), %esi
	movq	%rbx, %rdi
	callq	_phy_read
	testl	%eax, %eax
	js	LBB0_10
## %bb.4:
	movq	_MII_DP83640_MICR_OE@GOTPCREL(%rip), %rcx
	movq	_MII_DP83640_MICR_IE@GOTPCREL(%rip), %rsi
	movl	(%rcx), %edx
	orl	%eax, %edx
	orl	(%rsi), %edx
	jmp	LBB0_9
LBB0_5:
	movq	_MII_DP83640_MICR@GOTPCREL(%rip), %r14
	movl	(%r14), %esi
	movq	%rbx, %rdi
	callq	_phy_read
	testl	%eax, %eax
	js	LBB0_10
## %bb.6:
	movq	_MII_DP83640_MICR_OE@GOTPCREL(%rip), %rcx
	movq	_MII_DP83640_MICR_IE@GOTPCREL(%rip), %rdx
	movl	(%rdx), %edx
	orl	(%rcx), %edx
	notl	%edx
	andl	%edx, %eax
	movl	(%r14), %esi
	movq	%rbx, %rdi
	movl	%eax, %edx
	callq	_phy_write
	testl	%eax, %eax
	js	LBB0_10
## %bb.7:
	movq	_MII_DP83640_MISR@GOTPCREL(%rip), %r14
	movl	(%r14), %esi
	movq	%rbx, %rdi
	callq	_phy_read
	testl	%eax, %eax
	js	LBB0_10
## %bb.8:
	movq	_MII_DP83640_MISR_ANC_INT_EN@GOTPCREL(%rip), %rcx
	movq	_MII_DP83640_MISR_DUP_INT_EN@GOTPCREL(%rip), %rdx
	movl	(%rdx), %edx
	orl	(%rcx), %edx
	movq	_MII_DP83640_MISR_SPD_INT_EN@GOTPCREL(%rip), %rcx
	orl	(%rcx), %edx
	movq	_MII_DP83640_MISR_LINK_INT_EN@GOTPCREL(%rip), %rcx
	orl	(%rcx), %edx
	notl	%edx
	andl	%edx, %eax
	movl	%eax, %edx
LBB0_9:
	movl	(%r14), %esi
	movq	%rbx, %rdi
	popq	%rbx
	popq	%r14
	popq	%rbp
	jmp	_phy_write                      ## TAILCALL
LBB0_10:
	popq	%rbx
	popq	%r14
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_PHY_INTERRUPT_ENABLED,8,3      ## @PHY_INTERRUPT_ENABLED
	.comm	_MII_DP83640_MISR,4,2           ## @MII_DP83640_MISR
	.comm	_MII_DP83640_MISR_ANC_INT_EN,4,2 ## @MII_DP83640_MISR_ANC_INT_EN
	.comm	_MII_DP83640_MISR_DUP_INT_EN,4,2 ## @MII_DP83640_MISR_DUP_INT_EN
	.comm	_MII_DP83640_MISR_SPD_INT_EN,4,2 ## @MII_DP83640_MISR_SPD_INT_EN
	.comm	_MII_DP83640_MISR_LINK_INT_EN,4,2 ## @MII_DP83640_MISR_LINK_INT_EN
	.comm	_MII_DP83640_MICR,4,2           ## @MII_DP83640_MICR
	.comm	_MII_DP83640_MICR_OE,4,2        ## @MII_DP83640_MICR_OE
	.comm	_MII_DP83640_MICR_IE,4,2        ## @MII_DP83640_MICR_IE
	.no_dead_strip	_dp83640_config_intr
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function dp83640_config_intr
_dp83640_config_intr:                   ; @dp83640_config_intr
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x19, x0
	ldr	x8, [x0]
Lloh0:
	adrp	x9, _PHY_INTERRUPT_ENABLED@GOTPAGE
Lloh1:
	ldr	x9, [x9, _PHY_INTERRUPT_ENABLED@GOTPAGEOFF]
Lloh2:
	ldr	x9, [x9]
	cmp	x8, x9
	b.ne	LBB0_5
; %bb.1:
Lloh3:
	adrp	x20, _MII_DP83640_MISR@GOTPAGE
Lloh4:
	ldr	x20, [x20, _MII_DP83640_MISR@GOTPAGEOFF]
	ldr	w1, [x20]
	mov	x0, x19
	bl	_phy_read
	tbnz	w0, #31, LBB0_10
; %bb.2:
Lloh5:
	adrp	x8, _MII_DP83640_MISR_ANC_INT_EN@GOTPAGE
Lloh6:
	ldr	x8, [x8, _MII_DP83640_MISR_ANC_INT_EN@GOTPAGEOFF]
Lloh7:
	ldr	w8, [x8]
Lloh8:
	adrp	x9, _MII_DP83640_MISR_DUP_INT_EN@GOTPAGE
Lloh9:
	ldr	x9, [x9, _MII_DP83640_MISR_DUP_INT_EN@GOTPAGEOFF]
Lloh10:
	ldr	w9, [x9]
Lloh11:
	adrp	x10, _MII_DP83640_MISR_SPD_INT_EN@GOTPAGE
Lloh12:
	ldr	x10, [x10, _MII_DP83640_MISR_SPD_INT_EN@GOTPAGEOFF]
Lloh13:
	ldr	w10, [x10]
Lloh14:
	adrp	x11, _MII_DP83640_MISR_LINK_INT_EN@GOTPAGE
Lloh15:
	ldr	x11, [x11, _MII_DP83640_MISR_LINK_INT_EN@GOTPAGEOFF]
Lloh16:
	ldr	w11, [x11]
	orr	w8, w8, w0
	orr	w8, w8, w9
	orr	w8, w8, w10
	orr	w2, w8, w11
	ldr	w1, [x20]
	mov	x0, x19
	bl	_phy_write
	tbnz	w0, #31, LBB0_10
; %bb.3:
Lloh17:
	adrp	x8, _MII_DP83640_MICR@GOTPAGE
Lloh18:
	ldr	x8, [x8, _MII_DP83640_MICR@GOTPAGEOFF]
Lloh19:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_phy_read
	tbnz	w0, #31, LBB0_10
; %bb.4:
Lloh20:
	adrp	x8, _MII_DP83640_MICR_OE@GOTPAGE
Lloh21:
	ldr	x8, [x8, _MII_DP83640_MICR_OE@GOTPAGEOFF]
Lloh22:
	adrp	x9, _MII_DP83640_MICR_IE@GOTPAGE
Lloh23:
	ldr	x9, [x9, _MII_DP83640_MICR_IE@GOTPAGEOFF]
Lloh24:
	ldr	w8, [x8]
Lloh25:
	ldr	w9, [x9]
	orr	w8, w8, w0
	orr	w2, w8, w9
Lloh26:
	adrp	x8, _MII_DP83640_MICR@GOTPAGE
Lloh27:
	ldr	x8, [x8, _MII_DP83640_MICR@GOTPAGEOFF]
	b	LBB0_9
LBB0_5:
Lloh28:
	adrp	x20, _MII_DP83640_MICR@GOTPAGE
Lloh29:
	ldr	x20, [x20, _MII_DP83640_MICR@GOTPAGEOFF]
	ldr	w1, [x20]
	mov	x0, x19
	bl	_phy_read
	tbnz	w0, #31, LBB0_10
; %bb.6:
Lloh30:
	adrp	x8, _MII_DP83640_MICR_OE@GOTPAGE
Lloh31:
	ldr	x8, [x8, _MII_DP83640_MICR_OE@GOTPAGEOFF]
Lloh32:
	ldr	w8, [x8]
Lloh33:
	adrp	x9, _MII_DP83640_MICR_IE@GOTPAGE
Lloh34:
	ldr	x9, [x9, _MII_DP83640_MICR_IE@GOTPAGEOFF]
Lloh35:
	ldr	w9, [x9]
	orr	w8, w9, w8
	bic	w2, w0, w8
	ldr	w1, [x20]
	mov	x0, x19
	bl	_phy_write
	tbnz	w0, #31, LBB0_10
; %bb.7:
Lloh36:
	adrp	x8, _MII_DP83640_MISR@GOTPAGE
Lloh37:
	ldr	x8, [x8, _MII_DP83640_MISR@GOTPAGEOFF]
Lloh38:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_phy_read
	tbnz	w0, #31, LBB0_10
; %bb.8:
Lloh39:
	adrp	x8, _MII_DP83640_MISR_ANC_INT_EN@GOTPAGE
Lloh40:
	ldr	x8, [x8, _MII_DP83640_MISR_ANC_INT_EN@GOTPAGEOFF]
Lloh41:
	ldr	w8, [x8]
Lloh42:
	adrp	x9, _MII_DP83640_MISR_DUP_INT_EN@GOTPAGE
Lloh43:
	ldr	x9, [x9, _MII_DP83640_MISR_DUP_INT_EN@GOTPAGEOFF]
Lloh44:
	ldr	w9, [x9]
	orr	w8, w9, w8
Lloh45:
	adrp	x9, _MII_DP83640_MISR_SPD_INT_EN@GOTPAGE
Lloh46:
	ldr	x9, [x9, _MII_DP83640_MISR_SPD_INT_EN@GOTPAGEOFF]
Lloh47:
	ldr	w9, [x9]
Lloh48:
	adrp	x10, _MII_DP83640_MISR_LINK_INT_EN@GOTPAGE
Lloh49:
	ldr	x10, [x10, _MII_DP83640_MISR_LINK_INT_EN@GOTPAGEOFF]
	orr	w8, w8, w9
Lloh50:
	ldr	w9, [x10]
	orr	w8, w8, w9
	bic	w2, w0, w8
Lloh51:
	adrp	x8, _MII_DP83640_MISR@GOTPAGE
Lloh52:
	ldr	x8, [x8, _MII_DP83640_MISR@GOTPAGEOFF]
LBB0_9:
	ldr	w1, [x8]
	mov	x0, x19
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	b	_phy_write
LBB0_10:
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGot	Lloh3, Lloh4
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh16
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh19
	.loh AdrpLdrGot	Lloh26, Lloh27
	.loh AdrpLdrGotLdr	Lloh22, Lloh23, Lloh25
	.loh AdrpLdrGotLdr	Lloh20, Lloh21, Lloh24
	.loh AdrpLdrGot	Lloh28, Lloh29
	.loh AdrpLdrGotLdr	Lloh33, Lloh34, Lloh35
	.loh AdrpLdrGotLdr	Lloh30, Lloh31, Lloh32
	.loh AdrpLdrGotLdr	Lloh36, Lloh37, Lloh38
	.loh AdrpLdrGot	Lloh51, Lloh52
	.loh AdrpLdrGotLdr	Lloh48, Lloh49, Lloh50
	.loh AdrpLdrGotLdr	Lloh45, Lloh46, Lloh47
	.loh AdrpLdrGotLdr	Lloh42, Lloh43, Lloh44
	.loh AdrpLdrGotLdr	Lloh39, Lloh40, Lloh41
	.cfi_endproc
                                        ; -- End function
	.comm	_PHY_INTERRUPT_ENABLED,8,3      ; @PHY_INTERRUPT_ENABLED
	.comm	_MII_DP83640_MISR,4,2           ; @MII_DP83640_MISR
	.comm	_MII_DP83640_MISR_ANC_INT_EN,4,2 ; @MII_DP83640_MISR_ANC_INT_EN
	.comm	_MII_DP83640_MISR_DUP_INT_EN,4,2 ; @MII_DP83640_MISR_DUP_INT_EN
	.comm	_MII_DP83640_MISR_SPD_INT_EN,4,2 ; @MII_DP83640_MISR_SPD_INT_EN
	.comm	_MII_DP83640_MISR_LINK_INT_EN,4,2 ; @MII_DP83640_MISR_LINK_INT_EN
	.comm	_MII_DP83640_MICR,4,2           ; @MII_DP83640_MICR
	.comm	_MII_DP83640_MICR_OE,4,2        ; @MII_DP83640_MICR_OE
	.comm	_MII_DP83640_MICR_IE,4,2        ; @MII_DP83640_MICR_IE
	.no_dead_strip	_dp83640_config_intr
.subsections_via_symbols
