	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function ipw_load_ucode
_ipw_load_ucode:                        ## @ipw_load_ucode
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$40, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdx, %r14
	movq	%rsi, %rbx
	movq	%rdi, %r13
	movq	___stack_chk_guard@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	movq	%rax, -48(%rbp)
	leaq	L_.str(%rip), %rdi
	callq	_IPW_DEBUG_TRACE
	movq	%r13, %rdi
	callq	_ipw_stop_master
	testl	%eax, %eax
	js	LBB0_1
## %bb.2:
	movq	%rbx, %r12
	movq	_IPW_SHARED_LOWER_BOUND@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	movq	_IPW_REGISTER_DOMAIN1_END@GOTPCREL(%rip), %r15
	cmpl	(%r15), %ebx
	jge	LBB0_5
	.p2align	4, 0x90
LBB0_3:                                 ## =>This Inner Loop Header: Depth=1
	movq	%r13, %rdi
	movl	%ebx, %esi
	xorl	%edx, %edx
	callq	_ipw_write32
	addl	$4, %ebx
	cmpl	(%r15), %ebx
	jl	LBB0_3
LBB0_5:
	movq	%r13, %rdi
	xorl	%esi, %esi
	movl	$24, %edx
	callq	_memset
	movq	_IPW_MEM_HALT_AND_RESET@GOTPCREL(%rip), %rbx
	movl	(%rbx), %esi
	movq	_IPW_BIT_HALT_RESET_ON@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r13, %rdi
	callq	_ipw_write_reg32
	movq	%r13, %rdi
	callq	_ipw_arc_release
	movl	(%rbx), %esi
	movq	_IPW_BIT_HALT_RESET_OFF@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r13, %rdi
	callq	_ipw_write_reg32
	movl	$1, %edi
	callq	_mdelay
	movq	_IPW_INTERNAL_CMD_EVENT@GOTPCREL(%rip), %rbx
	movl	(%rbx), %esi
	movq	_IPW_BASEBAND_POWER_DOWN@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r13, %rdi
	callq	_ipw_write_reg32
	movl	$1, %edi
	callq	_mdelay
	movl	(%rbx), %esi
	movq	%r13, %rdi
	xorl	%edx, %edx
	callq	_ipw_write_reg32
	movl	$1, %edi
	callq	_mdelay
	movq	_IPW_BASEBAND_CONTROL_STATUS@GOTPCREL(%rip), %rbx
	movl	(%rbx), %esi
	movq	%r13, %rdi
	xorl	%edx, %edx
	callq	_ipw_write_reg8
	movl	(%rbx), %esi
	movq	_DINO_ENABLE_CS@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r13, %rdi
	callq	_ipw_write_reg8
	movl	$1, %edi
	callq	_mdelay
	cmpq	$2, %r14
	jb	LBB0_8
## %bb.6:
	movq	%r12, %r15
	shrq	%r14
	xorl	%ebx, %ebx
	.p2align	4, 0x90
LBB0_7:                                 ## =>This Inner Loop Header: Depth=1
	movq	_IPW_BASEBAND_CONTROL_STORE@GOTPCREL(%rip), %rax
	movl	(%rax), %r12d
	movl	(%r15,%rbx,4), %edi
	callq	_le16_to_cpu
	movq	%r13, %rdi
	movl	%r12d, %esi
	movl	%eax, %edx
	callq	_ipw_write_reg16
	incq	%rbx
	cmpq	%rbx, %r14
	jne	LBB0_7
LBB0_8:
	movq	_IPW_BASEBAND_CONTROL_STATUS@GOTPCREL(%rip), %r12
	movl	(%r12), %esi
	movq	%r13, %rdi
	xorl	%edx, %edx
	callq	_ipw_write_reg8
	movl	(%r12), %esi
	movq	_DINO_ENABLE_SYSTEM@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r13, %rdi
	callq	_ipw_write_reg8
	movl	$100, %ebx
	movq	_DINO_RXFIFO_DATA@GOTPCREL(%rip), %r14
	.p2align	4, 0x90
LBB0_9:                                 ## =>This Inner Loop Header: Depth=1
	movl	(%r12), %esi
	movq	%r13, %rdi
	callq	_ipw_read_reg8
	movl	%eax, %r15d
	movl	(%r14), %eax
	testl	%r15d, %eax
	jne	LBB0_12
## %bb.10:                              ##   in Loop: Header=BB0_9 Depth=1
	movl	$1, %edi
	callq	_mdelay
	decl	%ebx
	jne	LBB0_9
## %bb.11:
	movl	(%r14), %eax
LBB0_12:
	testl	%r15d, %eax
	je	LBB0_20
## %bb.13:
	leaq	-80(%rbp), %rdi
	callq	_ARRAY_SIZE
	testl	%eax, %eax
	jle	LBB0_16
## %bb.14:
	xorl	%ebx, %ebx
	movq	_IPW_BASEBAND_RX_FIFO_READ@GOTPCREL(%rip), %r15
	leaq	-80(%rbp), %r14
	.p2align	4, 0x90
LBB0_15:                                ## =>This Inner Loop Header: Depth=1
	movl	(%r15), %esi
	movq	%r13, %rdi
	callq	_ipw_read_reg32
	movl	%eax, %edi
	callq	_cpu_to_le32
	movl	%eax, -80(%rbp,%rbx,4)
	incq	%rbx
	movq	%r14, %rdi
	callq	_ARRAY_SIZE
	cltq
	cmpq	%rax, %rbx
	jl	LBB0_15
LBB0_16:
	leaq	-80(%rbp), %rsi
	movq	%r13, %rdi
	movl	$24, %edx
	callq	_memcpy
	cmpl	$1, (%r13)
	jne	LBB0_19
## %bb.17:
	cmpl	$1, 4(%r13)
	jne	LBB0_19
## %bb.18:
	movl	20(%r13), %edx
	movl	16(%r13), %ecx
	movq	8(%r13), %rax
	movl	(%rax), %r9d
	movl	4(%rax), %r10d
	movl	8(%rax), %r11d
	movl	12(%rax), %r14d
	movl	16(%rax), %ebx
	leaq	L_.str.1(%rip), %rdi
	xorl	%r12d, %r12d
	movl	%edx, %esi
	movl	%ecx, %r8d
	xorl	%eax, %eax
	pushq	%rbx
	pushq	%r14
	pushq	%r11
	pushq	%r10
	callq	_IPW_DEBUG_INFO
	addq	$32, %rsp
	jmp	LBB0_22
LBB0_1:
	movl	%eax, %r12d
	jmp	LBB0_23
LBB0_19:
	leaq	L_.str.2(%rip), %rdi
	xorl	%r12d, %r12d
	xorl	%eax, %eax
	callq	_IPW_DEBUG_INFO
	movq	_EINVAL@GOTPCREL(%rip), %rax
	jmp	LBB0_21
LBB0_20:
	leaq	L_.str.3(%rip), %rdi
	xorl	%r12d, %r12d
	xorl	%eax, %eax
	callq	_IPW_DEBUG_INFO
	movq	_ETIME@GOTPCREL(%rip), %rax
LBB0_21:
	subl	(%rax), %r12d
LBB0_22:
	movq	_IPW_BASEBAND_CONTROL_STATUS@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r13, %rdi
	xorl	%edx, %edx
	callq	_ipw_write_reg8
LBB0_23:
	movq	___stack_chk_guard@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	cmpq	-48(%rbp), %rax
	jne	LBB0_25
## %bb.24:
	movl	%r12d, %eax
	addq	$40, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_25:
	callq	___stack_chk_fail
	.cfi_endproc
                                        ## -- End function
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	">>\n"

	.comm	_IPW_SHARED_LOWER_BOUND,4,2     ## @IPW_SHARED_LOWER_BOUND
	.comm	_IPW_REGISTER_DOMAIN1_END,4,2   ## @IPW_REGISTER_DOMAIN1_END
	.comm	_IPW_MEM_HALT_AND_RESET,4,2     ## @IPW_MEM_HALT_AND_RESET
	.comm	_IPW_BIT_HALT_RESET_ON,4,2      ## @IPW_BIT_HALT_RESET_ON
	.comm	_IPW_BIT_HALT_RESET_OFF,4,2     ## @IPW_BIT_HALT_RESET_OFF
	.comm	_IPW_INTERNAL_CMD_EVENT,4,2     ## @IPW_INTERNAL_CMD_EVENT
	.comm	_IPW_BASEBAND_POWER_DOWN,4,2    ## @IPW_BASEBAND_POWER_DOWN
	.comm	_IPW_BASEBAND_CONTROL_STATUS,4,2 ## @IPW_BASEBAND_CONTROL_STATUS
	.comm	_DINO_ENABLE_CS,4,2             ## @DINO_ENABLE_CS
	.comm	_IPW_BASEBAND_CONTROL_STORE,4,2 ## @IPW_BASEBAND_CONTROL_STORE
	.comm	_DINO_ENABLE_SYSTEM,4,2         ## @DINO_ENABLE_SYSTEM
	.comm	_DINO_RXFIFO_DATA,4,2           ## @DINO_RXFIFO_DATA
	.comm	_IPW_BASEBAND_RX_FIFO_READ,4,2  ## @IPW_BASEBAND_RX_FIFO_READ
L_.str.1:                               ## @.str.1
	.asciz	"Microcode OK, rev. %d (0x%x) dev. %d (0x%x) of %02d/%02d/%02d %02d:%02d\n"

L_.str.2:                               ## @.str.2
	.asciz	"Microcode is not alive\n"

	.comm	_EINVAL,4,2                     ## @EINVAL
L_.str.3:                               ## @.str.3
	.asciz	"No alive response from DINO\n"

	.comm	_ETIME,4,2                      ## @ETIME
	.no_dead_strip	_ipw_load_ucode
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function ipw_load_ucode
_ipw_load_ucode:                        ; @ipw_load_ucode
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #176
	.cfi_def_cfa_offset 176
	stp	x24, x23, [sp, #112]            ; 16-byte Folded Spill
	stp	x22, x21, [sp, #128]            ; 16-byte Folded Spill
	stp	x20, x19, [sp, #144]            ; 16-byte Folded Spill
	stp	x29, x30, [sp, #160]            ; 16-byte Folded Spill
	add	x29, sp, #160
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x21, x2
	mov	x20, x1
	mov	x19, x0
Lloh0:
	adrp	x8, ___stack_chk_guard@GOTPAGE
Lloh1:
	ldr	x8, [x8, ___stack_chk_guard@GOTPAGEOFF]
Lloh2:
	ldr	x8, [x8]
	stur	x8, [x29, #-56]
Lloh3:
	adrp	x0, l_.str@PAGE
Lloh4:
	add	x0, x0, l_.str@PAGEOFF
	bl	_IPW_DEBUG_TRACE
	mov	x0, x19
	bl	_ipw_stop_master
	tbnz	w0, #31, LBB0_18
; %bb.1:
Lloh5:
	adrp	x8, _IPW_SHARED_LOWER_BOUND@GOTPAGE
Lloh6:
	ldr	x8, [x8, _IPW_SHARED_LOWER_BOUND@GOTPAGEOFF]
Lloh7:
	ldr	w22, [x8]
Lloh8:
	adrp	x23, _IPW_REGISTER_DOMAIN1_END@GOTPAGE
Lloh9:
	ldr	x23, [x23, _IPW_REGISTER_DOMAIN1_END@GOTPAGEOFF]
LBB0_2:                                 ; =>This Inner Loop Header: Depth=1
	ldr	w8, [x23]
	mov	x0, x19
	cmp	w22, w8
	b.ge	LBB0_4
; %bb.3:                                ;   in Loop: Header=BB0_2 Depth=1
	mov	x1, x22
	mov	w2, #0
	bl	_ipw_write32
	add	w22, w22, #4
	b	LBB0_2
LBB0_4:
	mov	w1, #0
	mov	w2, #24
	bl	_memset
Lloh10:
	adrp	x22, _IPW_MEM_HALT_AND_RESET@GOTPAGE
Lloh11:
	ldr	x22, [x22, _IPW_MEM_HALT_AND_RESET@GOTPAGEOFF]
	ldr	w1, [x22]
Lloh12:
	adrp	x8, _IPW_BIT_HALT_RESET_ON@GOTPAGE
Lloh13:
	ldr	x8, [x8, _IPW_BIT_HALT_RESET_ON@GOTPAGEOFF]
Lloh14:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_ipw_write_reg32
	mov	x0, x19
	bl	_ipw_arc_release
	ldr	w1, [x22]
Lloh15:
	adrp	x8, _IPW_BIT_HALT_RESET_OFF@GOTPAGE
Lloh16:
	ldr	x8, [x8, _IPW_BIT_HALT_RESET_OFF@GOTPAGEOFF]
Lloh17:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_ipw_write_reg32
	mov	w0, #1
	bl	_mdelay
Lloh18:
	adrp	x22, _IPW_INTERNAL_CMD_EVENT@GOTPAGE
Lloh19:
	ldr	x22, [x22, _IPW_INTERNAL_CMD_EVENT@GOTPAGEOFF]
	ldr	w1, [x22]
Lloh20:
	adrp	x8, _IPW_BASEBAND_POWER_DOWN@GOTPAGE
Lloh21:
	ldr	x8, [x8, _IPW_BASEBAND_POWER_DOWN@GOTPAGEOFF]
Lloh22:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_ipw_write_reg32
	mov	w0, #1
	bl	_mdelay
	ldr	w1, [x22]
	mov	x0, x19
	mov	w2, #0
	bl	_ipw_write_reg32
	mov	w0, #1
	bl	_mdelay
Lloh23:
	adrp	x23, _IPW_BASEBAND_CONTROL_STATUS@GOTPAGE
Lloh24:
	ldr	x23, [x23, _IPW_BASEBAND_CONTROL_STATUS@GOTPAGEOFF]
	ldr	w1, [x23]
	mov	x0, x19
	mov	w2, #0
	bl	_ipw_write_reg8
	ldr	w1, [x23]
Lloh25:
	adrp	x8, _DINO_ENABLE_CS@GOTPAGE
Lloh26:
	ldr	x8, [x8, _DINO_ENABLE_CS@GOTPAGEOFF]
Lloh27:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_ipw_write_reg8
	mov	w0, #1
	bl	_mdelay
	cmp	x21, #2
	b.lo	LBB0_7
; %bb.5:
	lsr	x22, x21, #1
Lloh28:
	adrp	x24, _IPW_BASEBAND_CONTROL_STORE@GOTPAGE
Lloh29:
	ldr	x24, [x24, _IPW_BASEBAND_CONTROL_STORE@GOTPAGEOFF]
LBB0_6:                                 ; =>This Inner Loop Header: Depth=1
	ldr	w21, [x24]
	ldr	w0, [x20], #4
	bl	_le16_to_cpu
	mov	x2, x0
	mov	x0, x19
	mov	x1, x21
	bl	_ipw_write_reg16
	subs	x22, x22, #1
	b.ne	LBB0_6
LBB0_7:
	ldr	w1, [x23]
	mov	x0, x19
	mov	w2, #0
	bl	_ipw_write_reg8
	ldr	w1, [x23]
Lloh30:
	adrp	x8, _DINO_ENABLE_SYSTEM@GOTPAGE
Lloh31:
	ldr	x8, [x8, _DINO_ENABLE_SYSTEM@GOTPAGEOFF]
Lloh32:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_ipw_write_reg8
	mov	w21, #100
Lloh33:
	adrp	x22, _DINO_RXFIFO_DATA@GOTPAGE
Lloh34:
	ldr	x22, [x22, _DINO_RXFIFO_DATA@GOTPAGEOFF]
LBB0_8:                                 ; =>This Inner Loop Header: Depth=1
	ldr	w1, [x23]
	mov	x0, x19
	bl	_ipw_read_reg8
	mov	x20, x0
	ldr	w8, [x22]
	tst	w8, w0
	b.ne	LBB0_11
; %bb.9:                                ;   in Loop: Header=BB0_8 Depth=1
	mov	w0, #1
	bl	_mdelay
	subs	w21, w21, #1
	b.ne	LBB0_8
; %bb.10:
	ldr	w8, [x22]
LBB0_11:
	tst	w8, w20
	b.eq	LBB0_20
; %bb.12:
	add	x20, sp, #80
	add	x0, sp, #80
	bl	_ARRAY_SIZE
	cmp	w0, #1
	b.lt	LBB0_15
; %bb.13:
	mov	x21, #0
Lloh35:
	adrp	x22, _IPW_BASEBAND_RX_FIFO_READ@GOTPAGE
Lloh36:
	ldr	x22, [x22, _IPW_BASEBAND_RX_FIFO_READ@GOTPAGEOFF]
LBB0_14:                                ; =>This Inner Loop Header: Depth=1
	ldr	w1, [x22]
	mov	x0, x19
	bl	_ipw_read_reg32
	bl	_cpu_to_le32
	str	w0, [x20, x21, lsl #2]
	add	x21, x21, #1
	add	x0, sp, #80
	bl	_ARRAY_SIZE
	cmp	x21, w0, sxtw
	b.lt	LBB0_14
LBB0_15:
	add	x1, sp, #80
	mov	x0, x19
	mov	w2, #24
	bl	_memcpy
	ldr	w8, [x19]
	cmp	w8, #1
	b.ne	LBB0_19
; %bb.16:
	ldr	w8, [x19, #4]
	cmp	w8, #1
	b.ne	LBB0_19
; %bb.17:
	ldr	x8, [x19, #8]
	ldp	w10, w9, [x19, #16]
	ldp	w11, w12, [x8]
	ldp	w13, w14, [x8, #8]
	ldr	w8, [x8, #16]
	stp	x14, x8, [sp, #56]
	stp	x12, x13, [sp, #40]
	stp	x10, x11, [sp, #24]
	stp	x9, x10, [sp, #8]
Lloh37:
	adrp	x0, l_.str.1@PAGE
Lloh38:
	add	x0, x0, l_.str.1@PAGEOFF
	str	x9, [sp]
	bl	_IPW_DEBUG_INFO
	mov	w22, #0
	b	LBB0_22
LBB0_18:
	mov	x22, x0
	b	LBB0_23
LBB0_19:
Lloh39:
	adrp	x0, l_.str.2@PAGE
Lloh40:
	add	x0, x0, l_.str.2@PAGEOFF
	bl	_IPW_DEBUG_INFO
Lloh41:
	adrp	x8, _EINVAL@GOTPAGE
Lloh42:
	ldr	x8, [x8, _EINVAL@GOTPAGEOFF]
	b	LBB0_21
LBB0_20:
Lloh43:
	adrp	x0, l_.str.3@PAGE
Lloh44:
	add	x0, x0, l_.str.3@PAGEOFF
	bl	_IPW_DEBUG_INFO
Lloh45:
	adrp	x8, _ETIME@GOTPAGE
Lloh46:
	ldr	x8, [x8, _ETIME@GOTPAGEOFF]
LBB0_21:
	ldr	w8, [x8]
	neg	w22, w8
LBB0_22:
	ldr	w1, [x23]
	mov	x0, x19
	mov	w2, #0
	bl	_ipw_write_reg8
LBB0_23:
	ldur	x8, [x29, #-56]
Lloh47:
	adrp	x9, ___stack_chk_guard@GOTPAGE
Lloh48:
	ldr	x9, [x9, ___stack_chk_guard@GOTPAGEOFF]
Lloh49:
	ldr	x9, [x9]
	cmp	x9, x8
	b.ne	LBB0_25
; %bb.24:
	mov	x0, x22
	ldp	x29, x30, [sp, #160]            ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #144]            ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #128]            ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #112]            ; 16-byte Folded Reload
	add	sp, sp, #176
	ret
LBB0_25:
	bl	___stack_chk_fail
	.loh AdrpAdd	Lloh3, Lloh4
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGot	Lloh8, Lloh9
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh25, Lloh26, Lloh27
	.loh AdrpLdrGot	Lloh23, Lloh24
	.loh AdrpLdrGotLdr	Lloh20, Lloh21, Lloh22
	.loh AdrpLdrGot	Lloh18, Lloh19
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGot	Lloh10, Lloh11
	.loh AdrpLdrGot	Lloh28, Lloh29
	.loh AdrpLdrGot	Lloh33, Lloh34
	.loh AdrpLdrGotLdr	Lloh30, Lloh31, Lloh32
	.loh AdrpLdrGot	Lloh35, Lloh36
	.loh AdrpAdd	Lloh37, Lloh38
	.loh AdrpLdrGot	Lloh41, Lloh42
	.loh AdrpAdd	Lloh39, Lloh40
	.loh AdrpLdrGot	Lloh45, Lloh46
	.loh AdrpAdd	Lloh43, Lloh44
	.loh AdrpLdrGotLdr	Lloh47, Lloh48, Lloh49
	.cfi_endproc
                                        ; -- End function
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	">>\n"

	.comm	_IPW_SHARED_LOWER_BOUND,4,2     ; @IPW_SHARED_LOWER_BOUND
	.comm	_IPW_REGISTER_DOMAIN1_END,4,2   ; @IPW_REGISTER_DOMAIN1_END
	.comm	_IPW_MEM_HALT_AND_RESET,4,2     ; @IPW_MEM_HALT_AND_RESET
	.comm	_IPW_BIT_HALT_RESET_ON,4,2      ; @IPW_BIT_HALT_RESET_ON
	.comm	_IPW_BIT_HALT_RESET_OFF,4,2     ; @IPW_BIT_HALT_RESET_OFF
	.comm	_IPW_INTERNAL_CMD_EVENT,4,2     ; @IPW_INTERNAL_CMD_EVENT
	.comm	_IPW_BASEBAND_POWER_DOWN,4,2    ; @IPW_BASEBAND_POWER_DOWN
	.comm	_IPW_BASEBAND_CONTROL_STATUS,4,2 ; @IPW_BASEBAND_CONTROL_STATUS
	.comm	_DINO_ENABLE_CS,4,2             ; @DINO_ENABLE_CS
	.comm	_IPW_BASEBAND_CONTROL_STORE,4,2 ; @IPW_BASEBAND_CONTROL_STORE
	.comm	_DINO_ENABLE_SYSTEM,4,2         ; @DINO_ENABLE_SYSTEM
	.comm	_DINO_RXFIFO_DATA,4,2           ; @DINO_RXFIFO_DATA
	.comm	_IPW_BASEBAND_RX_FIFO_READ,4,2  ; @IPW_BASEBAND_RX_FIFO_READ
l_.str.1:                               ; @.str.1
	.asciz	"Microcode OK, rev. %d (0x%x) dev. %d (0x%x) of %02d/%02d/%02d %02d:%02d\n"

l_.str.2:                               ; @.str.2
	.asciz	"Microcode is not alive\n"

	.comm	_EINVAL,4,2                     ; @EINVAL
l_.str.3:                               ; @.str.3
	.asciz	"No alive response from DINO\n"

	.comm	_ETIME,4,2                      ; @ETIME
	.no_dead_strip	_ipw_load_ucode
.subsections_via_symbols
