	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function rt2800_iq_calibrate
_rt2800_iq_calibrate:                   ## @rt2800_iq_calibrate
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%esi, %r14d
	movq	%rdi, %r15
	movl	$158, %esi
	movl	$44, %edx
	callq	_rt2800_bbp_write
	cmpl	$15, %r14d
	jge	LBB0_2
## %bb.1:
	movq	_EEPROM_IQ_GAIN_CAL_TX0_2G@GOTPCREL(%rip), %rax
	jmp	LBB0_8
LBB0_2:
	leal	-36(%r14), %eax
	cmpl	$29, %eax
	jae	LBB0_4
## %bb.3:
	movq	_EEPROM_IQ_GAIN_CAL_TX0_CH36_TO_CH64_5G@GOTPCREL(%rip), %rax
	jmp	LBB0_8
LBB0_4:
	leal	-100(%r14), %eax
	cmpl	$39, %eax
	jae	LBB0_6
## %bb.5:
	movq	_EEPROM_IQ_GAIN_CAL_TX0_CH100_TO_CH138_5G@GOTPCREL(%rip), %rax
	jmp	LBB0_8
LBB0_6:
	leal	-140(%r14), %eax
	xorl	%edx, %edx
	cmpl	$25, %eax
	ja	LBB0_9
## %bb.7:
	movq	_EEPROM_IQ_GAIN_CAL_TX0_CH140_TO_CH165_5G@GOTPCREL(%rip), %rax
LBB0_8:
	movl	(%rax), %esi
	movq	%r15, %rdi
	callq	_rt2x00_eeprom_byte
	movl	%eax, %edx
LBB0_9:
	movq	%r15, %rdi
	movl	$159, %esi
	callq	_rt2800_bbp_write
	movq	%r15, %rdi
	movl	$158, %esi
	movl	$45, %edx
	callq	_rt2800_bbp_write
	cmpl	$15, %r14d
	jge	LBB0_11
## %bb.10:
	movq	_EEPROM_IQ_PHASE_CAL_TX0_2G@GOTPCREL(%rip), %rax
	jmp	LBB0_17
LBB0_11:
	leal	-36(%r14), %eax
	cmpl	$29, %eax
	jae	LBB0_13
## %bb.12:
	movq	_EEPROM_IQ_PHASE_CAL_TX0_CH36_TO_CH64_5G@GOTPCREL(%rip), %rax
	jmp	LBB0_17
LBB0_13:
	leal	-100(%r14), %eax
	cmpl	$39, %eax
	jae	LBB0_15
## %bb.14:
	movq	_EEPROM_IQ_PHASE_CAL_TX0_CH100_TO_CH138_5G@GOTPCREL(%rip), %rax
	jmp	LBB0_17
LBB0_15:
	leal	-140(%r14), %eax
	xorl	%edx, %edx
	cmpl	$25, %eax
	ja	LBB0_18
## %bb.16:
	movq	_EEPROM_IQ_PHASE_CAL_TX0_CH140_TO_CH165_5G@GOTPCREL(%rip), %rax
LBB0_17:
	movl	(%rax), %esi
	movq	%r15, %rdi
	callq	_rt2x00_eeprom_byte
	movl	%eax, %edx
LBB0_18:
	movq	%r15, %rdi
	movl	$159, %esi
	callq	_rt2800_bbp_write
	movq	%r15, %rdi
	movl	$158, %esi
	movl	$74, %edx
	callq	_rt2800_bbp_write
	cmpl	$15, %r14d
	jge	LBB0_20
## %bb.19:
	movq	_EEPROM_IQ_GAIN_CAL_TX1_2G@GOTPCREL(%rip), %rax
	jmp	LBB0_26
LBB0_20:
	leal	-36(%r14), %eax
	cmpl	$29, %eax
	jae	LBB0_22
## %bb.21:
	movq	_EEPROM_IQ_GAIN_CAL_TX1_CH36_TO_CH64_5G@GOTPCREL(%rip), %rax
	jmp	LBB0_26
LBB0_22:
	leal	-100(%r14), %eax
	cmpl	$39, %eax
	jae	LBB0_24
## %bb.23:
	movq	_EEPROM_IQ_GAIN_CAL_TX1_CH100_TO_CH138_5G@GOTPCREL(%rip), %rax
	jmp	LBB0_26
LBB0_24:
	leal	-140(%r14), %eax
	xorl	%edx, %edx
	cmpl	$25, %eax
	ja	LBB0_27
## %bb.25:
	movq	_EEPROM_IQ_GAIN_CAL_TX1_CH140_TO_CH165_5G@GOTPCREL(%rip), %rax
LBB0_26:
	movl	(%rax), %esi
	movq	%r15, %rdi
	callq	_rt2x00_eeprom_byte
	movl	%eax, %edx
LBB0_27:
	movq	%r15, %rdi
	movl	$159, %esi
	callq	_rt2800_bbp_write
	movq	%r15, %rdi
	movl	$158, %esi
	movl	$75, %edx
	callq	_rt2800_bbp_write
	cmpl	$15, %r14d
	jge	LBB0_29
## %bb.28:
	movq	_EEPROM_IQ_PHASE_CAL_TX1_2G@GOTPCREL(%rip), %rax
	jmp	LBB0_35
LBB0_29:
	leal	-36(%r14), %eax
	cmpl	$29, %eax
	jae	LBB0_31
## %bb.30:
	movq	_EEPROM_IQ_PHASE_CAL_TX1_CH36_TO_CH64_5G@GOTPCREL(%rip), %rax
	jmp	LBB0_35
LBB0_31:
	leal	-100(%r14), %eax
	cmpl	$39, %eax
	jae	LBB0_33
## %bb.32:
	movq	_EEPROM_IQ_PHASE_CAL_TX1_CH100_TO_CH138_5G@GOTPCREL(%rip), %rax
	jmp	LBB0_35
LBB0_33:
	addl	$-140, %r14d
	xorl	%edx, %edx
	cmpl	$25, %r14d
	ja	LBB0_36
## %bb.34:
	movq	_EEPROM_IQ_PHASE_CAL_TX1_CH140_TO_CH165_5G@GOTPCREL(%rip), %rax
LBB0_35:
	movl	(%rax), %esi
	movq	%r15, %rdi
	callq	_rt2x00_eeprom_byte
	movl	%eax, %edx
LBB0_36:
	movq	%r15, %rdi
	movl	$159, %esi
	callq	_rt2800_bbp_write
	movq	%r15, %rdi
	movl	$158, %esi
	movl	$4, %edx
	callq	_rt2800_bbp_write
	movq	_EEPROM_RF_IQ_COMPENSATION_CONTROL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r15, %rdi
	callq	_rt2x00_eeprom_byte
	xorl	%ebx, %ebx
	cmpl	$255, %eax
	cmovel	%ebx, %eax
	movq	%r15, %rdi
	movl	$159, %esi
	movl	%eax, %edx
	callq	_rt2800_bbp_write
	movq	%r15, %rdi
	movl	$158, %esi
	movl	$3, %edx
	callq	_rt2800_bbp_write
	movq	_EEPROM_RF_IQ_IMBALANCE_COMPENSATION_CONTROL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r15, %rdi
	callq	_rt2x00_eeprom_byte
	cmpl	$255, %eax
	cmovnel	%eax, %ebx
	movq	%r15, %rdi
	movl	$159, %esi
	movl	%ebx, %edx
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_rt2800_bbp_write               ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_EEPROM_IQ_GAIN_CAL_TX0_2G,4,2  ## @EEPROM_IQ_GAIN_CAL_TX0_2G
	.comm	_EEPROM_IQ_GAIN_CAL_TX0_CH36_TO_CH64_5G,4,2 ## @EEPROM_IQ_GAIN_CAL_TX0_CH36_TO_CH64_5G
	.comm	_EEPROM_IQ_GAIN_CAL_TX0_CH100_TO_CH138_5G,4,2 ## @EEPROM_IQ_GAIN_CAL_TX0_CH100_TO_CH138_5G
	.comm	_EEPROM_IQ_GAIN_CAL_TX0_CH140_TO_CH165_5G,4,2 ## @EEPROM_IQ_GAIN_CAL_TX0_CH140_TO_CH165_5G
	.comm	_EEPROM_IQ_PHASE_CAL_TX0_2G,4,2 ## @EEPROM_IQ_PHASE_CAL_TX0_2G
	.comm	_EEPROM_IQ_PHASE_CAL_TX0_CH36_TO_CH64_5G,4,2 ## @EEPROM_IQ_PHASE_CAL_TX0_CH36_TO_CH64_5G
	.comm	_EEPROM_IQ_PHASE_CAL_TX0_CH100_TO_CH138_5G,4,2 ## @EEPROM_IQ_PHASE_CAL_TX0_CH100_TO_CH138_5G
	.comm	_EEPROM_IQ_PHASE_CAL_TX0_CH140_TO_CH165_5G,4,2 ## @EEPROM_IQ_PHASE_CAL_TX0_CH140_TO_CH165_5G
	.comm	_EEPROM_IQ_GAIN_CAL_TX1_2G,4,2  ## @EEPROM_IQ_GAIN_CAL_TX1_2G
	.comm	_EEPROM_IQ_GAIN_CAL_TX1_CH36_TO_CH64_5G,4,2 ## @EEPROM_IQ_GAIN_CAL_TX1_CH36_TO_CH64_5G
	.comm	_EEPROM_IQ_GAIN_CAL_TX1_CH100_TO_CH138_5G,4,2 ## @EEPROM_IQ_GAIN_CAL_TX1_CH100_TO_CH138_5G
	.comm	_EEPROM_IQ_GAIN_CAL_TX1_CH140_TO_CH165_5G,4,2 ## @EEPROM_IQ_GAIN_CAL_TX1_CH140_TO_CH165_5G
	.comm	_EEPROM_IQ_PHASE_CAL_TX1_2G,4,2 ## @EEPROM_IQ_PHASE_CAL_TX1_2G
	.comm	_EEPROM_IQ_PHASE_CAL_TX1_CH36_TO_CH64_5G,4,2 ## @EEPROM_IQ_PHASE_CAL_TX1_CH36_TO_CH64_5G
	.comm	_EEPROM_IQ_PHASE_CAL_TX1_CH100_TO_CH138_5G,4,2 ## @EEPROM_IQ_PHASE_CAL_TX1_CH100_TO_CH138_5G
	.comm	_EEPROM_IQ_PHASE_CAL_TX1_CH140_TO_CH165_5G,4,2 ## @EEPROM_IQ_PHASE_CAL_TX1_CH140_TO_CH165_5G
	.comm	_EEPROM_RF_IQ_COMPENSATION_CONTROL,4,2 ## @EEPROM_RF_IQ_COMPENSATION_CONTROL
	.comm	_EEPROM_RF_IQ_IMBALANCE_COMPENSATION_CONTROL,4,2 ## @EEPROM_RF_IQ_IMBALANCE_COMPENSATION_CONTROL
	.no_dead_strip	_rt2800_iq_calibrate
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function rt2800_iq_calibrate
_rt2800_iq_calibrate:                   ; @rt2800_iq_calibrate
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x20, x1
	mov	x19, x0
	mov	w1, #158
	mov	w2, #44
	bl	_rt2800_bbp_write
	cmp	w20, #15
	b.ge	LBB0_2
; %bb.1:
Lloh0:
	adrp	x8, _EEPROM_IQ_GAIN_CAL_TX0_2G@GOTPAGE
Lloh1:
	ldr	x8, [x8, _EEPROM_IQ_GAIN_CAL_TX0_2G@GOTPAGEOFF]
	b	LBB0_8
LBB0_2:
	sub	w8, w20, #36
	cmp	w8, #29
	b.hs	LBB0_4
; %bb.3:
Lloh2:
	adrp	x8, _EEPROM_IQ_GAIN_CAL_TX0_CH36_TO_CH64_5G@GOTPAGE
Lloh3:
	ldr	x8, [x8, _EEPROM_IQ_GAIN_CAL_TX0_CH36_TO_CH64_5G@GOTPAGEOFF]
	b	LBB0_8
LBB0_4:
	sub	w8, w20, #100
	cmp	w8, #39
	b.hs	LBB0_6
; %bb.5:
Lloh4:
	adrp	x8, _EEPROM_IQ_GAIN_CAL_TX0_CH100_TO_CH138_5G@GOTPAGE
Lloh5:
	ldr	x8, [x8, _EEPROM_IQ_GAIN_CAL_TX0_CH100_TO_CH138_5G@GOTPAGEOFF]
	b	LBB0_8
LBB0_6:
	sub	w8, w20, #140
	cmp	w8, #25
	b.hi	LBB0_37
; %bb.7:
Lloh6:
	adrp	x8, _EEPROM_IQ_GAIN_CAL_TX0_CH140_TO_CH165_5G@GOTPAGE
Lloh7:
	ldr	x8, [x8, _EEPROM_IQ_GAIN_CAL_TX0_CH140_TO_CH165_5G@GOTPAGEOFF]
LBB0_8:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_rt2x00_eeprom_byte
	mov	x2, x0
LBB0_9:
	mov	x0, x19
	mov	w1, #159
	bl	_rt2800_bbp_write
	mov	x0, x19
	mov	w1, #158
	mov	w2, #45
	bl	_rt2800_bbp_write
	cmp	w20, #15
	b.ge	LBB0_11
; %bb.10:
Lloh8:
	adrp	x8, _EEPROM_IQ_PHASE_CAL_TX0_2G@GOTPAGE
Lloh9:
	ldr	x8, [x8, _EEPROM_IQ_PHASE_CAL_TX0_2G@GOTPAGEOFF]
	b	LBB0_17
LBB0_11:
	sub	w8, w20, #36
	cmp	w8, #29
	b.hs	LBB0_13
; %bb.12:
Lloh10:
	adrp	x8, _EEPROM_IQ_PHASE_CAL_TX0_CH36_TO_CH64_5G@GOTPAGE
Lloh11:
	ldr	x8, [x8, _EEPROM_IQ_PHASE_CAL_TX0_CH36_TO_CH64_5G@GOTPAGEOFF]
	b	LBB0_17
LBB0_13:
	sub	w8, w20, #100
	cmp	w8, #39
	b.hs	LBB0_15
; %bb.14:
Lloh12:
	adrp	x8, _EEPROM_IQ_PHASE_CAL_TX0_CH100_TO_CH138_5G@GOTPAGE
Lloh13:
	ldr	x8, [x8, _EEPROM_IQ_PHASE_CAL_TX0_CH100_TO_CH138_5G@GOTPAGEOFF]
	b	LBB0_17
LBB0_15:
	sub	w8, w20, #140
	cmp	w8, #25
	b.hi	LBB0_38
; %bb.16:
Lloh14:
	adrp	x8, _EEPROM_IQ_PHASE_CAL_TX0_CH140_TO_CH165_5G@GOTPAGE
Lloh15:
	ldr	x8, [x8, _EEPROM_IQ_PHASE_CAL_TX0_CH140_TO_CH165_5G@GOTPAGEOFF]
LBB0_17:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_rt2x00_eeprom_byte
	mov	x2, x0
LBB0_18:
	mov	x0, x19
	mov	w1, #159
	bl	_rt2800_bbp_write
	mov	x0, x19
	mov	w1, #158
	mov	w2, #74
	bl	_rt2800_bbp_write
	cmp	w20, #15
	b.ge	LBB0_20
; %bb.19:
Lloh16:
	adrp	x8, _EEPROM_IQ_GAIN_CAL_TX1_2G@GOTPAGE
Lloh17:
	ldr	x8, [x8, _EEPROM_IQ_GAIN_CAL_TX1_2G@GOTPAGEOFF]
	b	LBB0_26
LBB0_20:
	sub	w8, w20, #36
	cmp	w8, #29
	b.hs	LBB0_22
; %bb.21:
Lloh18:
	adrp	x8, _EEPROM_IQ_GAIN_CAL_TX1_CH36_TO_CH64_5G@GOTPAGE
Lloh19:
	ldr	x8, [x8, _EEPROM_IQ_GAIN_CAL_TX1_CH36_TO_CH64_5G@GOTPAGEOFF]
	b	LBB0_26
LBB0_22:
	sub	w8, w20, #100
	cmp	w8, #39
	b.hs	LBB0_24
; %bb.23:
Lloh20:
	adrp	x8, _EEPROM_IQ_GAIN_CAL_TX1_CH100_TO_CH138_5G@GOTPAGE
Lloh21:
	ldr	x8, [x8, _EEPROM_IQ_GAIN_CAL_TX1_CH100_TO_CH138_5G@GOTPAGEOFF]
	b	LBB0_26
LBB0_24:
	sub	w8, w20, #140
	cmp	w8, #25
	b.hi	LBB0_39
; %bb.25:
Lloh22:
	adrp	x8, _EEPROM_IQ_GAIN_CAL_TX1_CH140_TO_CH165_5G@GOTPAGE
Lloh23:
	ldr	x8, [x8, _EEPROM_IQ_GAIN_CAL_TX1_CH140_TO_CH165_5G@GOTPAGEOFF]
LBB0_26:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_rt2x00_eeprom_byte
	mov	x2, x0
LBB0_27:
	mov	x0, x19
	mov	w1, #159
	bl	_rt2800_bbp_write
	mov	x0, x19
	mov	w1, #158
	mov	w2, #75
	bl	_rt2800_bbp_write
	cmp	w20, #15
	b.ge	LBB0_29
; %bb.28:
Lloh24:
	adrp	x8, _EEPROM_IQ_PHASE_CAL_TX1_2G@GOTPAGE
Lloh25:
	ldr	x8, [x8, _EEPROM_IQ_PHASE_CAL_TX1_2G@GOTPAGEOFF]
	b	LBB0_35
LBB0_29:
	sub	w8, w20, #36
	cmp	w8, #29
	b.hs	LBB0_31
; %bb.30:
Lloh26:
	adrp	x8, _EEPROM_IQ_PHASE_CAL_TX1_CH36_TO_CH64_5G@GOTPAGE
Lloh27:
	ldr	x8, [x8, _EEPROM_IQ_PHASE_CAL_TX1_CH36_TO_CH64_5G@GOTPAGEOFF]
	b	LBB0_35
LBB0_31:
	sub	w8, w20, #100
	cmp	w8, #39
	b.hs	LBB0_33
; %bb.32:
Lloh28:
	adrp	x8, _EEPROM_IQ_PHASE_CAL_TX1_CH100_TO_CH138_5G@GOTPAGE
Lloh29:
	ldr	x8, [x8, _EEPROM_IQ_PHASE_CAL_TX1_CH100_TO_CH138_5G@GOTPAGEOFF]
	b	LBB0_35
LBB0_33:
	sub	w8, w20, #140
	cmp	w8, #25
	b.hi	LBB0_40
; %bb.34:
Lloh30:
	adrp	x8, _EEPROM_IQ_PHASE_CAL_TX1_CH140_TO_CH165_5G@GOTPAGE
Lloh31:
	ldr	x8, [x8, _EEPROM_IQ_PHASE_CAL_TX1_CH140_TO_CH165_5G@GOTPAGEOFF]
LBB0_35:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_rt2x00_eeprom_byte
	mov	x2, x0
LBB0_36:
	mov	x0, x19
	mov	w1, #159
	bl	_rt2800_bbp_write
	mov	x0, x19
	mov	w1, #158
	mov	w2, #4
	bl	_rt2800_bbp_write
Lloh32:
	adrp	x8, _EEPROM_RF_IQ_COMPENSATION_CONTROL@GOTPAGE
Lloh33:
	ldr	x8, [x8, _EEPROM_RF_IQ_COMPENSATION_CONTROL@GOTPAGEOFF]
Lloh34:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_rt2x00_eeprom_byte
	cmp	w0, #255
	csel	w2, wzr, w0, eq
	mov	x0, x19
	mov	w1, #159
	bl	_rt2800_bbp_write
	mov	x0, x19
	mov	w1, #158
	mov	w2, #3
	bl	_rt2800_bbp_write
Lloh35:
	adrp	x8, _EEPROM_RF_IQ_IMBALANCE_COMPENSATION_CONTROL@GOTPAGE
Lloh36:
	ldr	x8, [x8, _EEPROM_RF_IQ_IMBALANCE_COMPENSATION_CONTROL@GOTPAGEOFF]
Lloh37:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_rt2x00_eeprom_byte
	cmp	w0, #255
	csel	w2, wzr, w0, eq
	mov	x0, x19
	mov	w1, #159
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	b	_rt2800_bbp_write
LBB0_37:
	mov	w2, #0
	b	LBB0_9
LBB0_38:
	mov	w2, #0
	b	LBB0_18
LBB0_39:
	mov	w2, #0
	b	LBB0_27
LBB0_40:
	mov	w2, #0
	b	LBB0_36
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpLdrGot	Lloh4, Lloh5
	.loh AdrpLdrGot	Lloh6, Lloh7
	.loh AdrpLdrGot	Lloh8, Lloh9
	.loh AdrpLdrGot	Lloh10, Lloh11
	.loh AdrpLdrGot	Lloh12, Lloh13
	.loh AdrpLdrGot	Lloh14, Lloh15
	.loh AdrpLdrGot	Lloh16, Lloh17
	.loh AdrpLdrGot	Lloh18, Lloh19
	.loh AdrpLdrGot	Lloh20, Lloh21
	.loh AdrpLdrGot	Lloh22, Lloh23
	.loh AdrpLdrGot	Lloh24, Lloh25
	.loh AdrpLdrGot	Lloh26, Lloh27
	.loh AdrpLdrGot	Lloh28, Lloh29
	.loh AdrpLdrGot	Lloh30, Lloh31
	.loh AdrpLdrGotLdr	Lloh35, Lloh36, Lloh37
	.loh AdrpLdrGotLdr	Lloh32, Lloh33, Lloh34
	.cfi_endproc
                                        ; -- End function
	.comm	_EEPROM_IQ_GAIN_CAL_TX0_2G,4,2  ; @EEPROM_IQ_GAIN_CAL_TX0_2G
	.comm	_EEPROM_IQ_GAIN_CAL_TX0_CH36_TO_CH64_5G,4,2 ; @EEPROM_IQ_GAIN_CAL_TX0_CH36_TO_CH64_5G
	.comm	_EEPROM_IQ_GAIN_CAL_TX0_CH100_TO_CH138_5G,4,2 ; @EEPROM_IQ_GAIN_CAL_TX0_CH100_TO_CH138_5G
	.comm	_EEPROM_IQ_GAIN_CAL_TX0_CH140_TO_CH165_5G,4,2 ; @EEPROM_IQ_GAIN_CAL_TX0_CH140_TO_CH165_5G
	.comm	_EEPROM_IQ_PHASE_CAL_TX0_2G,4,2 ; @EEPROM_IQ_PHASE_CAL_TX0_2G
	.comm	_EEPROM_IQ_PHASE_CAL_TX0_CH36_TO_CH64_5G,4,2 ; @EEPROM_IQ_PHASE_CAL_TX0_CH36_TO_CH64_5G
	.comm	_EEPROM_IQ_PHASE_CAL_TX0_CH100_TO_CH138_5G,4,2 ; @EEPROM_IQ_PHASE_CAL_TX0_CH100_TO_CH138_5G
	.comm	_EEPROM_IQ_PHASE_CAL_TX0_CH140_TO_CH165_5G,4,2 ; @EEPROM_IQ_PHASE_CAL_TX0_CH140_TO_CH165_5G
	.comm	_EEPROM_IQ_GAIN_CAL_TX1_2G,4,2  ; @EEPROM_IQ_GAIN_CAL_TX1_2G
	.comm	_EEPROM_IQ_GAIN_CAL_TX1_CH36_TO_CH64_5G,4,2 ; @EEPROM_IQ_GAIN_CAL_TX1_CH36_TO_CH64_5G
	.comm	_EEPROM_IQ_GAIN_CAL_TX1_CH100_TO_CH138_5G,4,2 ; @EEPROM_IQ_GAIN_CAL_TX1_CH100_TO_CH138_5G
	.comm	_EEPROM_IQ_GAIN_CAL_TX1_CH140_TO_CH165_5G,4,2 ; @EEPROM_IQ_GAIN_CAL_TX1_CH140_TO_CH165_5G
	.comm	_EEPROM_IQ_PHASE_CAL_TX1_2G,4,2 ; @EEPROM_IQ_PHASE_CAL_TX1_2G
	.comm	_EEPROM_IQ_PHASE_CAL_TX1_CH36_TO_CH64_5G,4,2 ; @EEPROM_IQ_PHASE_CAL_TX1_CH36_TO_CH64_5G
	.comm	_EEPROM_IQ_PHASE_CAL_TX1_CH100_TO_CH138_5G,4,2 ; @EEPROM_IQ_PHASE_CAL_TX1_CH100_TO_CH138_5G
	.comm	_EEPROM_IQ_PHASE_CAL_TX1_CH140_TO_CH165_5G,4,2 ; @EEPROM_IQ_PHASE_CAL_TX1_CH140_TO_CH165_5G
	.comm	_EEPROM_RF_IQ_COMPENSATION_CONTROL,4,2 ; @EEPROM_RF_IQ_COMPENSATION_CONTROL
	.comm	_EEPROM_RF_IQ_IMBALANCE_COMPENSATION_CONTROL,4,2 ; @EEPROM_RF_IQ_IMBALANCE_COMPENSATION_CONTROL
	.no_dead_strip	_rt2800_iq_calibrate
.subsections_via_symbols
