	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function mvpp2_txq_alloc_reserved_desc
_mvpp2_txq_alloc_reserved_desc:         ## @mvpp2_txq_alloc_reserved_desc
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%edx, %r14d
	movq	%rsi, %r15
	movq	%rdi, %rbx
	movq	(%rdi), %r12
	xorl	%eax, %eax
	callq	_smp_processor_id
	movq	%r12, %rdi
	movl	%eax, %esi
	callq	_mvpp2_cpu_to_thread
	movl	%eax, %r12d
	movl	(%r15), %eax
	movq	_MVPP2_TXQ_RSVD_REQ_Q_OFFSET@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shll	%cl, %eax
	movq	(%rbx), %rbx
	orl	%r14d, %eax
	movq	_MVPP2_TXQ_RSVD_REQ_REG@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	movq	%rbx, %rdi
	movl	%r12d, %esi
	movl	%eax, %ecx
	callq	_mvpp2_thread_write_relaxed
	movq	_MVPP2_TXQ_RSVD_RSLT_REG@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	movl	%r12d, %esi
	callq	_mvpp2_thread_read_relaxed
	movq	_MVPP2_TXQ_RSVD_RSLT_MASK@GOTPCREL(%rip), %rcx
	andl	(%rcx), %eax
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_MVPP2_TXQ_RSVD_REQ_Q_OFFSET,4,2 ## @MVPP2_TXQ_RSVD_REQ_Q_OFFSET
	.comm	_MVPP2_TXQ_RSVD_REQ_REG,4,2     ## @MVPP2_TXQ_RSVD_REQ_REG
	.comm	_MVPP2_TXQ_RSVD_RSLT_REG,4,2    ## @MVPP2_TXQ_RSVD_RSLT_REG
	.comm	_MVPP2_TXQ_RSVD_RSLT_MASK,4,2   ## @MVPP2_TXQ_RSVD_RSLT_MASK
	.no_dead_strip	_mvpp2_txq_alloc_reserved_desc
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function mvpp2_txq_alloc_reserved_desc
_mvpp2_txq_alloc_reserved_desc:         ; @mvpp2_txq_alloc_reserved_desc
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x2
	mov	x20, x1
	mov	x21, x0
	ldr	x22, [x0]
	bl	_smp_processor_id
	mov	x1, x0
	mov	x0, x22
	bl	_mvpp2_cpu_to_thread
	mov	x22, x0
	ldr	x21, [x21]
	ldr	w8, [x20]
Lloh0:
	adrp	x9, _MVPP2_TXQ_RSVD_REQ_Q_OFFSET@GOTPAGE
Lloh1:
	ldr	x9, [x9, _MVPP2_TXQ_RSVD_REQ_Q_OFFSET@GOTPAGEOFF]
Lloh2:
	ldr	w9, [x9]
	lsl	w8, w8, w9
	orr	w3, w8, w19
Lloh3:
	adrp	x8, _MVPP2_TXQ_RSVD_REQ_REG@GOTPAGE
Lloh4:
	ldr	x8, [x8, _MVPP2_TXQ_RSVD_REQ_REG@GOTPAGEOFF]
Lloh5:
	ldr	w2, [x8]
	mov	x0, x21
	mov	x1, x22
	bl	_mvpp2_thread_write_relaxed
Lloh6:
	adrp	x8, _MVPP2_TXQ_RSVD_RSLT_REG@GOTPAGE
Lloh7:
	ldr	x8, [x8, _MVPP2_TXQ_RSVD_RSLT_REG@GOTPAGEOFF]
Lloh8:
	ldr	w2, [x8]
	mov	x0, x21
	mov	x1, x22
	bl	_mvpp2_thread_read_relaxed
Lloh9:
	adrp	x8, _MVPP2_TXQ_RSVD_RSLT_MASK@GOTPAGE
Lloh10:
	ldr	x8, [x8, _MVPP2_TXQ_RSVD_RSLT_MASK@GOTPAGEOFF]
Lloh11:
	ldr	w8, [x8]
	and	w0, w8, w0
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_MVPP2_TXQ_RSVD_REQ_Q_OFFSET,4,2 ; @MVPP2_TXQ_RSVD_REQ_Q_OFFSET
	.comm	_MVPP2_TXQ_RSVD_REQ_REG,4,2     ; @MVPP2_TXQ_RSVD_REQ_REG
	.comm	_MVPP2_TXQ_RSVD_RSLT_REG,4,2    ; @MVPP2_TXQ_RSVD_RSLT_REG
	.comm	_MVPP2_TXQ_RSVD_RSLT_MASK,4,2   ; @MVPP2_TXQ_RSVD_RSLT_MASK
	.no_dead_strip	_mvpp2_txq_alloc_reserved_desc
.subsections_via_symbols
