	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function smb347_set_temp_limits
_smb347_set_temp_limits:                ## @smb347_set_temp_limits
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %rbx
	movq	8(%rdi), %rdx
	movl	(%rdx), %edi
	xorl	%r15d, %r15d
	movl	$0, %eax
	testl	%edi, %edi
	je	LBB0_3
## %bb.1:
	movl	$100, %esi
	movl	$130, %edx
	callq	_clamp_val
	addl	$-100, %eax
	cltq
	imulq	$1717986919, %rax, %rax         ## imm = 0x66666667
	movq	%rax, %rcx
	shrq	$63, %rcx
	sarq	$34, %rax
	addl	%ecx, %eax
	movl	(%rbx), %edi
	movq	_CFG_OTG@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	movq	_CFG_OTG_TEMP_THRESHOLD_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	movq	_CFG_OTG_TEMP_THRESHOLD_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shll	%cl, %eax
	movl	%eax, %ecx
	callq	_regmap_update_bits
	testl	%eax, %eax
	js	LBB0_26
## %bb.2:
	movq	8(%rbx), %rdx
LBB0_3:
	movl	4(%rdx), %edi
	movq	_SMB347_TEMP_USE_DEFAULT@GOTPCREL(%rip), %r14
	cmpl	(%r14), %edi
	je	LBB0_6
## %bb.4:
	xorl	%esi, %esi
	movl	$15, %edx
	callq	_clamp_val
	cltq
	imulq	$1717986919, %rax, %rax         ## imm = 0x66666667
	movq	%rax, %rcx
	shrq	$63, %rcx
	shrq	$33, %rax
	addl	%ecx, %eax
	notl	%eax
	andl	$3, %eax
	movl	(%rbx), %edi
	movq	_CFG_TEMP_LIMIT@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	movq	_CFG_TEMP_LIMIT_SOFT_COLD_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	movq	_CFG_TEMP_LIMIT_SOFT_COLD_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shll	%cl, %eax
	movl	%eax, %ecx
	callq	_regmap_update_bits
	testl	%eax, %eax
	js	LBB0_26
## %bb.5:
	movq	8(%rbx), %rdx
	movl	(%r14), %edi
	movl	$1, %r15d
LBB0_6:
	movl	8(%rdx), %ecx
	cmpl	%edi, %ecx
	je	LBB0_9
## %bb.7:
	movl	%ecx, %edi
	movl	$40, %esi
	movl	$55, %edx
	callq	_clamp_val
	addl	$-40, %eax
	cltq
	imulq	$1717986919, %rax, %rax         ## imm = 0x66666667
	movq	%rax, %rcx
	shrq	$63, %rcx
	sarq	$33, %rax
	addl	%ecx, %eax
	movl	(%rbx), %edi
	movq	_CFG_TEMP_LIMIT@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	movq	_CFG_TEMP_LIMIT_SOFT_HOT_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	movq	_CFG_TEMP_LIMIT_SOFT_HOT_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shll	%cl, %eax
	movl	%eax, %ecx
	callq	_regmap_update_bits
	testl	%eax, %eax
	js	LBB0_26
## %bb.8:
	movq	8(%rbx), %rdx
	movl	(%r14), %edi
	movl	$1, %r15d
LBB0_9:
	movl	12(%rdx), %ecx
	cmpl	%edi, %ecx
	jne	LBB0_10
## %bb.13:
	movl	16(%rdx), %ecx
	cmpl	%edi, %ecx
	jne	LBB0_12
## %bb.14:
	testl	%r15d, %r15d
	jne	LBB0_15
## %bb.17:
	cmpq	$0, 32(%rdx)
	jne	LBB0_18
	jmp	LBB0_20
LBB0_10:
	movl	%ecx, %edi
	movl	$-5, %esi
	movl	$10, %edx
	callq	_clamp_val
	addl	$5, %eax
	cltq
	imulq	$1717986919, %rax, %rax         ## imm = 0x66666667
	movq	%rax, %rcx
	shrq	$63, %rcx
	shrq	$33, %rax
	addl	%ecx, %eax
	notl	%eax
	andl	$3, %eax
	movl	(%rbx), %edi
	movq	_CFG_TEMP_LIMIT@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	movq	_CFG_TEMP_LIMIT_HARD_COLD_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	movq	_CFG_TEMP_LIMIT_HARD_COLD_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shll	%cl, %eax
	movl	%eax, %ecx
	callq	_regmap_update_bits
	testl	%eax, %eax
	js	LBB0_26
## %bb.11:
	movq	8(%rbx), %rax
	movl	16(%rax), %ecx
	cmpl	(%r14), %ecx
	je	LBB0_15
LBB0_12:
	movl	%ecx, %edi
	movl	$50, %esi
	movl	$65, %edx
	callq	_clamp_val
	addl	$-50, %eax
	cltq
	imulq	$1717986919, %rax, %rax         ## imm = 0x66666667
	movq	%rax, %rcx
	shrq	$63, %rcx
	sarq	$33, %rax
	addl	%ecx, %eax
	movl	(%rbx), %edi
	movq	_CFG_TEMP_LIMIT@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	movq	_CFG_TEMP_LIMIT_HARD_HOT_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	movq	_CFG_TEMP_LIMIT_HARD_HOT_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shll	%cl, %eax
	movl	%eax, %ecx
	callq	_regmap_update_bits
	testl	%eax, %eax
	js	LBB0_26
LBB0_15:
	movl	(%rbx), %edi
	movq	_CFG_THERM@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_CFG_THERM_MONITOR_DISABLED@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	xorl	%ecx, %ecx
	callq	_regmap_update_bits
	testl	%eax, %eax
	js	LBB0_26
## %bb.16:
	movq	8(%rbx), %rdx
	cmpq	$0, 32(%rdx)
	je	LBB0_20
LBB0_18:
	movl	(%rbx), %edi
	movq	_CFG_SYSOK@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_CFG_SYSOK_SUSPEND_HARD_LIMIT_DISABLED@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	xorl	%ecx, %ecx
	callq	_regmap_update_bits
	testl	%eax, %eax
	js	LBB0_26
## %bb.19:
	movq	8(%rbx), %rdx
LBB0_20:
	movl	20(%rdx), %r14d
	movq	_SMB347_SOFT_TEMP_COMPENSATE_DEFAULT@GOTPCREL(%rip), %rcx
	cmpl	(%rcx), %r14d
	je	LBB0_24
## %bb.21:
	andl	$3, %r14d
	movl	(%rbx), %edi
	movq	_CFG_THERM@GOTPCREL(%rip), %r15
	movl	(%r15), %esi
	movq	_CFG_THERM_SOFT_HOT_COMPENSATION_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	_CFG_THERM_SOFT_HOT_COMPENSATION_SHIFT@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	movl	%r14d, %eax
	shll	%cl, %eax
	movl	%eax, %ecx
	callq	_regmap_update_bits
	testl	%eax, %eax
	js	LBB0_26
## %bb.22:
	movl	(%rbx), %edi
	movl	(%r15), %esi
	movq	_CFG_THERM_SOFT_COLD_COMPENSATION_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	_CFG_THERM_SOFT_COLD_COMPENSATION_SHIFT@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	shll	%cl, %r14d
	movl	%r14d, %ecx
	callq	_regmap_update_bits
	testl	%eax, %eax
	js	LBB0_26
## %bb.23:
	movq	8(%rbx), %rdx
LBB0_24:
	cmpq	$0, 24(%rdx)
	je	LBB0_26
## %bb.25:
	movq	_ccc_tbl@GOTPCREL(%rip), %rax
	movl	(%rax), %r14d
	movl	%r14d, %edi
	callq	_ARRAY_SIZE
	movq	8(%rbx), %rcx
	movq	24(%rcx), %rdx
	movl	%r14d, %edi
	movl	%eax, %esi
	callq	_current_to_hw
	testl	%eax, %eax
	js	LBB0_26
## %bb.27:
	movl	(%rbx), %edi
	movq	_CFG_OTG@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	movq	_CFG_OTG_CC_COMPENSATION_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	andl	$3, %eax
	movq	_CFG_OTG_CC_COMPENSATION_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shll	%cl, %eax
	movl	%eax, %ecx
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_regmap_update_bits             ## TAILCALL
LBB0_26:
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_CFG_OTG,4,2                    ## @CFG_OTG
	.comm	_CFG_OTG_TEMP_THRESHOLD_MASK,4,2 ## @CFG_OTG_TEMP_THRESHOLD_MASK
	.comm	_CFG_OTG_TEMP_THRESHOLD_SHIFT,4,2 ## @CFG_OTG_TEMP_THRESHOLD_SHIFT
	.comm	_SMB347_TEMP_USE_DEFAULT,4,2    ## @SMB347_TEMP_USE_DEFAULT
	.comm	_CFG_TEMP_LIMIT,4,2             ## @CFG_TEMP_LIMIT
	.comm	_CFG_TEMP_LIMIT_SOFT_COLD_MASK,4,2 ## @CFG_TEMP_LIMIT_SOFT_COLD_MASK
	.comm	_CFG_TEMP_LIMIT_SOFT_COLD_SHIFT,4,2 ## @CFG_TEMP_LIMIT_SOFT_COLD_SHIFT
	.comm	_CFG_TEMP_LIMIT_SOFT_HOT_MASK,4,2 ## @CFG_TEMP_LIMIT_SOFT_HOT_MASK
	.comm	_CFG_TEMP_LIMIT_SOFT_HOT_SHIFT,4,2 ## @CFG_TEMP_LIMIT_SOFT_HOT_SHIFT
	.comm	_CFG_TEMP_LIMIT_HARD_COLD_MASK,4,2 ## @CFG_TEMP_LIMIT_HARD_COLD_MASK
	.comm	_CFG_TEMP_LIMIT_HARD_COLD_SHIFT,4,2 ## @CFG_TEMP_LIMIT_HARD_COLD_SHIFT
	.comm	_CFG_TEMP_LIMIT_HARD_HOT_MASK,4,2 ## @CFG_TEMP_LIMIT_HARD_HOT_MASK
	.comm	_CFG_TEMP_LIMIT_HARD_HOT_SHIFT,4,2 ## @CFG_TEMP_LIMIT_HARD_HOT_SHIFT
	.comm	_CFG_THERM,4,2                  ## @CFG_THERM
	.comm	_CFG_THERM_MONITOR_DISABLED,4,2 ## @CFG_THERM_MONITOR_DISABLED
	.comm	_CFG_SYSOK,4,2                  ## @CFG_SYSOK
	.comm	_CFG_SYSOK_SUSPEND_HARD_LIMIT_DISABLED,4,2 ## @CFG_SYSOK_SUSPEND_HARD_LIMIT_DISABLED
	.comm	_SMB347_SOFT_TEMP_COMPENSATE_DEFAULT,4,2 ## @SMB347_SOFT_TEMP_COMPENSATE_DEFAULT
	.comm	_CFG_THERM_SOFT_HOT_COMPENSATION_MASK,4,2 ## @CFG_THERM_SOFT_HOT_COMPENSATION_MASK
	.comm	_CFG_THERM_SOFT_HOT_COMPENSATION_SHIFT,4,2 ## @CFG_THERM_SOFT_HOT_COMPENSATION_SHIFT
	.comm	_CFG_THERM_SOFT_COLD_COMPENSATION_MASK,4,2 ## @CFG_THERM_SOFT_COLD_COMPENSATION_MASK
	.comm	_CFG_THERM_SOFT_COLD_COMPENSATION_SHIFT,4,2 ## @CFG_THERM_SOFT_COLD_COMPENSATION_SHIFT
	.comm	_ccc_tbl,4,2                    ## @ccc_tbl
	.comm	_CFG_OTG_CC_COMPENSATION_MASK,4,2 ## @CFG_OTG_CC_COMPENSATION_MASK
	.comm	_CFG_OTG_CC_COMPENSATION_SHIFT,4,2 ## @CFG_OTG_CC_COMPENSATION_SHIFT
	.no_dead_strip	_smb347_set_temp_limits
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function smb347_set_temp_limits
_smb347_set_temp_limits:                ; @smb347_set_temp_limits
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x0
	ldr	x10, [x0, #8]
	ldr	w0, [x10]
	cbz	w0, LBB0_3
; %bb.1:
	mov	w1, #100
	mov	w2, #130
	bl	_clamp_val
	sub	w8, w0, #100
	mov	w9, #26215
	movk	w9, #26214, lsl #16
	smull	x8, w8, w9
	lsr	x9, x8, #63
	asr	x8, x8, #34
	add	w8, w8, w9
	ldr	w0, [x19]
Lloh0:
	adrp	x9, _CFG_OTG@GOTPAGE
Lloh1:
	ldr	x9, [x9, _CFG_OTG@GOTPAGEOFF]
Lloh2:
	adrp	x10, _CFG_OTG_TEMP_THRESHOLD_MASK@GOTPAGE
Lloh3:
	ldr	x10, [x10, _CFG_OTG_TEMP_THRESHOLD_MASK@GOTPAGEOFF]
Lloh4:
	ldr	w1, [x9]
Lloh5:
	ldr	w2, [x10]
Lloh6:
	adrp	x9, _CFG_OTG_TEMP_THRESHOLD_SHIFT@GOTPAGE
Lloh7:
	ldr	x9, [x9, _CFG_OTG_TEMP_THRESHOLD_SHIFT@GOTPAGEOFF]
Lloh8:
	ldr	w9, [x9]
	lsl	w3, w8, w9
	bl	_regmap_update_bits
	tbnz	w0, #31, LBB0_28
; %bb.2:
	ldr	x10, [x19, #8]
LBB0_3:
	ldr	w8, [x10, #4]
Lloh9:
	adrp	x20, _SMB347_TEMP_USE_DEFAULT@GOTPAGE
Lloh10:
	ldr	x20, [x20, _SMB347_TEMP_USE_DEFAULT@GOTPAGEOFF]
	ldr	w9, [x20]
	cmp	w8, w9
	b.ne	LBB0_5
; %bb.4:
	mov	w11, #0
	b	LBB0_7
LBB0_5:
	mov	x0, x8
	mov	w1, #0
	mov	w2, #15
	bl	_clamp_val
	mov	w8, #26215
	movk	w8, #26214, lsl #16
	smull	x8, w0, w8
	lsr	x9, x8, #63
	lsr	x8, x8, #33
	add	w8, w8, w9
	mvn	w8, w8
	and	w8, w8, #0x3
	ldr	w0, [x19]
Lloh11:
	adrp	x9, _CFG_TEMP_LIMIT@GOTPAGE
Lloh12:
	ldr	x9, [x9, _CFG_TEMP_LIMIT@GOTPAGEOFF]
Lloh13:
	adrp	x10, _CFG_TEMP_LIMIT_SOFT_COLD_MASK@GOTPAGE
Lloh14:
	ldr	x10, [x10, _CFG_TEMP_LIMIT_SOFT_COLD_MASK@GOTPAGEOFF]
Lloh15:
	ldr	w1, [x9]
Lloh16:
	ldr	w2, [x10]
Lloh17:
	adrp	x9, _CFG_TEMP_LIMIT_SOFT_COLD_SHIFT@GOTPAGE
Lloh18:
	ldr	x9, [x9, _CFG_TEMP_LIMIT_SOFT_COLD_SHIFT@GOTPAGEOFF]
Lloh19:
	ldr	w9, [x9]
	lsl	w3, w8, w9
	bl	_regmap_update_bits
	tbnz	w0, #31, LBB0_28
; %bb.6:
	ldr	x10, [x19, #8]
	ldr	w8, [x20]
	mov	w11, #1
LBB0_7:
	ldr	w9, [x10, #8]
	cmp	w9, w8
	b.eq	LBB0_10
; %bb.8:
	mov	x0, x9
	mov	w1, #40
	mov	w2, #55
	bl	_clamp_val
	sub	w8, w0, #40
	mov	w9, #26215
	movk	w9, #26214, lsl #16
	smull	x8, w8, w9
	lsr	x9, x8, #63
	asr	x8, x8, #33
	add	w8, w8, w9
	ldr	w0, [x19]
Lloh20:
	adrp	x9, _CFG_TEMP_LIMIT@GOTPAGE
Lloh21:
	ldr	x9, [x9, _CFG_TEMP_LIMIT@GOTPAGEOFF]
Lloh22:
	adrp	x10, _CFG_TEMP_LIMIT_SOFT_HOT_MASK@GOTPAGE
Lloh23:
	ldr	x10, [x10, _CFG_TEMP_LIMIT_SOFT_HOT_MASK@GOTPAGEOFF]
Lloh24:
	ldr	w1, [x9]
Lloh25:
	ldr	w2, [x10]
Lloh26:
	adrp	x9, _CFG_TEMP_LIMIT_SOFT_HOT_SHIFT@GOTPAGE
Lloh27:
	ldr	x9, [x9, _CFG_TEMP_LIMIT_SOFT_HOT_SHIFT@GOTPAGEOFF]
Lloh28:
	ldr	w9, [x9]
	lsl	w3, w8, w9
	bl	_regmap_update_bits
	tbnz	w0, #31, LBB0_28
; %bb.9:
	ldr	x10, [x19, #8]
	ldr	w8, [x20]
	mov	w11, #1
LBB0_10:
	ldr	w9, [x10, #12]
	cmp	w9, w8
	b.ne	LBB0_14
; %bb.11:
	ldr	w9, [x10, #16]
	cmp	w9, w8
	b.ne	LBB0_16
; %bb.12:
	cbnz	w11, LBB0_17
; %bb.13:
	ldr	x8, [x10, #32]
	cbnz	x8, LBB0_19
	b	LBB0_21
LBB0_14:
	mov	x0, x9
	mov	w1, #-5
	mov	w2, #10
	bl	_clamp_val
	add	w8, w0, #5
	mov	w9, #26215
	movk	w9, #26214, lsl #16
	smull	x8, w8, w9
	lsr	x9, x8, #63
	lsr	x8, x8, #33
	add	w8, w8, w9
	mvn	w8, w8
	and	w8, w8, #0x3
	ldr	w0, [x19]
Lloh29:
	adrp	x9, _CFG_TEMP_LIMIT@GOTPAGE
Lloh30:
	ldr	x9, [x9, _CFG_TEMP_LIMIT@GOTPAGEOFF]
Lloh31:
	adrp	x10, _CFG_TEMP_LIMIT_HARD_COLD_MASK@GOTPAGE
Lloh32:
	ldr	x10, [x10, _CFG_TEMP_LIMIT_HARD_COLD_MASK@GOTPAGEOFF]
Lloh33:
	ldr	w1, [x9]
Lloh34:
	ldr	w2, [x10]
Lloh35:
	adrp	x9, _CFG_TEMP_LIMIT_HARD_COLD_SHIFT@GOTPAGE
Lloh36:
	ldr	x9, [x9, _CFG_TEMP_LIMIT_HARD_COLD_SHIFT@GOTPAGEOFF]
Lloh37:
	ldr	w9, [x9]
	lsl	w3, w8, w9
	bl	_regmap_update_bits
	tbnz	w0, #31, LBB0_28
; %bb.15:
	ldr	x8, [x19, #8]
	ldr	w10, [x20]
	ldr	w9, [x8, #16]
	cmp	w9, w10
	b.eq	LBB0_17
LBB0_16:
	mov	x0, x9
	mov	w1, #50
	mov	w2, #65
	bl	_clamp_val
	sub	w8, w0, #50
	mov	w9, #26215
	movk	w9, #26214, lsl #16
	smull	x8, w8, w9
	lsr	x9, x8, #63
	asr	x8, x8, #33
	add	w8, w8, w9
	ldr	w0, [x19]
Lloh38:
	adrp	x9, _CFG_TEMP_LIMIT@GOTPAGE
Lloh39:
	ldr	x9, [x9, _CFG_TEMP_LIMIT@GOTPAGEOFF]
Lloh40:
	adrp	x10, _CFG_TEMP_LIMIT_HARD_HOT_MASK@GOTPAGE
Lloh41:
	ldr	x10, [x10, _CFG_TEMP_LIMIT_HARD_HOT_MASK@GOTPAGEOFF]
Lloh42:
	ldr	w1, [x9]
Lloh43:
	ldr	w2, [x10]
Lloh44:
	adrp	x9, _CFG_TEMP_LIMIT_HARD_HOT_SHIFT@GOTPAGE
Lloh45:
	ldr	x9, [x9, _CFG_TEMP_LIMIT_HARD_HOT_SHIFT@GOTPAGEOFF]
Lloh46:
	ldr	w9, [x9]
	lsl	w3, w8, w9
	bl	_regmap_update_bits
	tbnz	w0, #31, LBB0_28
LBB0_17:
	ldr	w0, [x19]
Lloh47:
	adrp	x8, _CFG_THERM@GOTPAGE
Lloh48:
	ldr	x8, [x8, _CFG_THERM@GOTPAGEOFF]
Lloh49:
	ldr	w1, [x8]
Lloh50:
	adrp	x8, _CFG_THERM_MONITOR_DISABLED@GOTPAGE
Lloh51:
	ldr	x8, [x8, _CFG_THERM_MONITOR_DISABLED@GOTPAGEOFF]
Lloh52:
	ldr	w2, [x8]
	mov	w3, #0
	bl	_regmap_update_bits
	tbnz	w0, #31, LBB0_28
; %bb.18:
	ldr	x10, [x19, #8]
	ldr	x8, [x10, #32]
	cbz	x8, LBB0_21
LBB0_19:
	ldr	w0, [x19]
Lloh53:
	adrp	x8, _CFG_SYSOK@GOTPAGE
Lloh54:
	ldr	x8, [x8, _CFG_SYSOK@GOTPAGEOFF]
Lloh55:
	ldr	w1, [x8]
Lloh56:
	adrp	x8, _CFG_SYSOK_SUSPEND_HARD_LIMIT_DISABLED@GOTPAGE
Lloh57:
	ldr	x8, [x8, _CFG_SYSOK_SUSPEND_HARD_LIMIT_DISABLED@GOTPAGEOFF]
Lloh58:
	ldr	w2, [x8]
	mov	w3, #0
	bl	_regmap_update_bits
	tbnz	w0, #31, LBB0_28
; %bb.20:
	ldr	x10, [x19, #8]
LBB0_21:
	ldr	w8, [x10, #20]
Lloh59:
	adrp	x9, _SMB347_SOFT_TEMP_COMPENSATE_DEFAULT@GOTPAGE
Lloh60:
	ldr	x9, [x9, _SMB347_SOFT_TEMP_COMPENSATE_DEFAULT@GOTPAGEOFF]
Lloh61:
	ldr	w9, [x9]
	cmp	w8, w9
	b.eq	LBB0_25
; %bb.22:
	and	w20, w8, #0x3
	ldr	w0, [x19]
Lloh62:
	adrp	x21, _CFG_THERM@GOTPAGE
Lloh63:
	ldr	x21, [x21, _CFG_THERM@GOTPAGEOFF]
Lloh64:
	adrp	x8, _CFG_THERM_SOFT_HOT_COMPENSATION_MASK@GOTPAGE
Lloh65:
	ldr	x8, [x8, _CFG_THERM_SOFT_HOT_COMPENSATION_MASK@GOTPAGEOFF]
	ldr	w1, [x21]
Lloh66:
	ldr	w2, [x8]
Lloh67:
	adrp	x8, _CFG_THERM_SOFT_HOT_COMPENSATION_SHIFT@GOTPAGE
Lloh68:
	ldr	x8, [x8, _CFG_THERM_SOFT_HOT_COMPENSATION_SHIFT@GOTPAGEOFF]
Lloh69:
	ldr	w8, [x8]
	lsl	w3, w20, w8
	bl	_regmap_update_bits
	tbnz	w0, #31, LBB0_28
; %bb.23:
	ldr	w0, [x19]
Lloh70:
	adrp	x8, _CFG_THERM_SOFT_COLD_COMPENSATION_MASK@GOTPAGE
Lloh71:
	ldr	x8, [x8, _CFG_THERM_SOFT_COLD_COMPENSATION_MASK@GOTPAGEOFF]
	ldr	w1, [x21]
Lloh72:
	ldr	w2, [x8]
Lloh73:
	adrp	x8, _CFG_THERM_SOFT_COLD_COMPENSATION_SHIFT@GOTPAGE
Lloh74:
	ldr	x8, [x8, _CFG_THERM_SOFT_COLD_COMPENSATION_SHIFT@GOTPAGEOFF]
Lloh75:
	ldr	w8, [x8]
	lsl	w3, w20, w8
	bl	_regmap_update_bits
	tbnz	w0, #31, LBB0_28
; %bb.24:
	ldr	x10, [x19, #8]
LBB0_25:
	ldr	x8, [x10, #24]
	cbz	x8, LBB0_28
; %bb.26:
Lloh76:
	adrp	x8, _ccc_tbl@GOTPAGE
Lloh77:
	ldr	x8, [x8, _ccc_tbl@GOTPAGEOFF]
Lloh78:
	ldr	w20, [x8]
	mov	x0, x20
	bl	_ARRAY_SIZE
	mov	x1, x0
	ldr	x8, [x19, #8]
	ldr	x2, [x8, #24]
	mov	x0, x20
	bl	_current_to_hw
	tbnz	w0, #31, LBB0_28
; %bb.27:
	ldr	w8, [x19]
Lloh79:
	adrp	x9, _CFG_OTG@GOTPAGE
Lloh80:
	ldr	x9, [x9, _CFG_OTG@GOTPAGEOFF]
Lloh81:
	ldr	w1, [x9]
Lloh82:
	adrp	x9, _CFG_OTG_CC_COMPENSATION_MASK@GOTPAGE
Lloh83:
	ldr	x9, [x9, _CFG_OTG_CC_COMPENSATION_MASK@GOTPAGEOFF]
Lloh84:
	ldr	w2, [x9]
	and	w9, w0, #0x3
Lloh85:
	adrp	x10, _CFG_OTG_CC_COMPENSATION_SHIFT@GOTPAGE
Lloh86:
	ldr	x10, [x10, _CFG_OTG_CC_COMPENSATION_SHIFT@GOTPAGEOFF]
Lloh87:
	ldr	w10, [x10]
	lsl	w3, w9, w10
	mov	x0, x8
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	_regmap_update_bits
LBB0_28:
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh4
	.loh AdrpLdrGot	Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh19
	.loh AdrpLdrGotLdr	Lloh13, Lloh14, Lloh16
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh15
	.loh AdrpLdrGotLdr	Lloh26, Lloh27, Lloh28
	.loh AdrpLdrGotLdr	Lloh22, Lloh23, Lloh25
	.loh AdrpLdrGotLdr	Lloh20, Lloh21, Lloh24
	.loh AdrpLdrGotLdr	Lloh35, Lloh36, Lloh37
	.loh AdrpLdrGotLdr	Lloh31, Lloh32, Lloh34
	.loh AdrpLdrGotLdr	Lloh29, Lloh30, Lloh33
	.loh AdrpLdrGotLdr	Lloh44, Lloh45, Lloh46
	.loh AdrpLdrGotLdr	Lloh40, Lloh41, Lloh43
	.loh AdrpLdrGotLdr	Lloh38, Lloh39, Lloh42
	.loh AdrpLdrGotLdr	Lloh50, Lloh51, Lloh52
	.loh AdrpLdrGotLdr	Lloh47, Lloh48, Lloh49
	.loh AdrpLdrGotLdr	Lloh56, Lloh57, Lloh58
	.loh AdrpLdrGotLdr	Lloh53, Lloh54, Lloh55
	.loh AdrpLdrGotLdr	Lloh59, Lloh60, Lloh61
	.loh AdrpLdrGotLdr	Lloh67, Lloh68, Lloh69
	.loh AdrpLdrGotLdr	Lloh64, Lloh65, Lloh66
	.loh AdrpLdrGot	Lloh62, Lloh63
	.loh AdrpLdrGotLdr	Lloh73, Lloh74, Lloh75
	.loh AdrpLdrGotLdr	Lloh70, Lloh71, Lloh72
	.loh AdrpLdrGotLdr	Lloh76, Lloh77, Lloh78
	.loh AdrpLdrGotLdr	Lloh85, Lloh86, Lloh87
	.loh AdrpLdrGotLdr	Lloh82, Lloh83, Lloh84
	.loh AdrpLdrGotLdr	Lloh79, Lloh80, Lloh81
	.cfi_endproc
                                        ; -- End function
	.comm	_CFG_OTG,4,2                    ; @CFG_OTG
	.comm	_CFG_OTG_TEMP_THRESHOLD_MASK,4,2 ; @CFG_OTG_TEMP_THRESHOLD_MASK
	.comm	_CFG_OTG_TEMP_THRESHOLD_SHIFT,4,2 ; @CFG_OTG_TEMP_THRESHOLD_SHIFT
	.comm	_SMB347_TEMP_USE_DEFAULT,4,2    ; @SMB347_TEMP_USE_DEFAULT
	.comm	_CFG_TEMP_LIMIT,4,2             ; @CFG_TEMP_LIMIT
	.comm	_CFG_TEMP_LIMIT_SOFT_COLD_MASK,4,2 ; @CFG_TEMP_LIMIT_SOFT_COLD_MASK
	.comm	_CFG_TEMP_LIMIT_SOFT_COLD_SHIFT,4,2 ; @CFG_TEMP_LIMIT_SOFT_COLD_SHIFT
	.comm	_CFG_TEMP_LIMIT_SOFT_HOT_MASK,4,2 ; @CFG_TEMP_LIMIT_SOFT_HOT_MASK
	.comm	_CFG_TEMP_LIMIT_SOFT_HOT_SHIFT,4,2 ; @CFG_TEMP_LIMIT_SOFT_HOT_SHIFT
	.comm	_CFG_TEMP_LIMIT_HARD_COLD_MASK,4,2 ; @CFG_TEMP_LIMIT_HARD_COLD_MASK
	.comm	_CFG_TEMP_LIMIT_HARD_COLD_SHIFT,4,2 ; @CFG_TEMP_LIMIT_HARD_COLD_SHIFT
	.comm	_CFG_TEMP_LIMIT_HARD_HOT_MASK,4,2 ; @CFG_TEMP_LIMIT_HARD_HOT_MASK
	.comm	_CFG_TEMP_LIMIT_HARD_HOT_SHIFT,4,2 ; @CFG_TEMP_LIMIT_HARD_HOT_SHIFT
	.comm	_CFG_THERM,4,2                  ; @CFG_THERM
	.comm	_CFG_THERM_MONITOR_DISABLED,4,2 ; @CFG_THERM_MONITOR_DISABLED
	.comm	_CFG_SYSOK,4,2                  ; @CFG_SYSOK
	.comm	_CFG_SYSOK_SUSPEND_HARD_LIMIT_DISABLED,4,2 ; @CFG_SYSOK_SUSPEND_HARD_LIMIT_DISABLED
	.comm	_SMB347_SOFT_TEMP_COMPENSATE_DEFAULT,4,2 ; @SMB347_SOFT_TEMP_COMPENSATE_DEFAULT
	.comm	_CFG_THERM_SOFT_HOT_COMPENSATION_MASK,4,2 ; @CFG_THERM_SOFT_HOT_COMPENSATION_MASK
	.comm	_CFG_THERM_SOFT_HOT_COMPENSATION_SHIFT,4,2 ; @CFG_THERM_SOFT_HOT_COMPENSATION_SHIFT
	.comm	_CFG_THERM_SOFT_COLD_COMPENSATION_MASK,4,2 ; @CFG_THERM_SOFT_COLD_COMPENSATION_MASK
	.comm	_CFG_THERM_SOFT_COLD_COMPENSATION_SHIFT,4,2 ; @CFG_THERM_SOFT_COLD_COMPENSATION_SHIFT
	.comm	_ccc_tbl,4,2                    ; @ccc_tbl
	.comm	_CFG_OTG_CC_COMPENSATION_MASK,4,2 ; @CFG_OTG_CC_COMPENSATION_MASK
	.comm	_CFG_OTG_CC_COMPENSATION_SHIFT,4,2 ; @CFG_OTG_CC_COMPENSATION_SHIFT
	.no_dead_strip	_smb347_set_temp_limits
.subsections_via_symbols
