	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_ath5k_hw_nic_wakeup            ## -- Begin function ath5k_hw_nic_wakeup
	.p2align	4, 0x90
_ath5k_hw_nic_wakeup:                   ## @ath5k_hw_nic_wakeup
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rsi, %r15
	movq	%rdi, %r13
	movq	24(%rdi), %rbx
	callq	_ath5k_get_bus_type
	movq	_ATH_AHB@GOTPCREL(%rip), %r12
	testq	%r15, %r15
	jne	LBB0_2
## %bb.1:
	cmpq	(%r12), %rax
	je	LBB0_5
LBB0_2:
	movq	_AR5K_PM_AWAKE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r13, %rdi
	movl	$1, %edx
	xorl	%ecx, %ecx
	callq	_ath5k_hw_set_power_mode
	testl	%eax, %eax
	je	LBB0_5
## %bb.3:
	movl	%eax, %r14d
	leaq	L_.str(%rip), %rsi
	jmp	LBB0_4
LBB0_5:
	testq	%rbx, %rbx
	je	LBB0_7
## %bb.6:
	movq	%rbx, %rdi
	callq	_pci_is_pcie
	xorl	%ebx, %ebx
	testq	%rax, %rax
	jne	LBB0_8
LBB0_7:
	movq	_AR5K_RESET_CTL_PCI@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
LBB0_8:
	movq	(%r13), %rax
	movq	_AR5K_AR5210@GOTPCREL(%rip), %r14
	cmpq	(%r14), %rax
	jne	LBB0_10
## %bb.9:
	movq	_AR5K_RESET_CTL_PCU@GOTPCREL(%rip), %rax
	movq	_AR5K_RESET_CTL_MAC@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	orl	(%rax), %esi
	movq	_AR5K_RESET_CTL_DMA@GOTPCREL(%rip), %rax
	orl	(%rax), %esi
	movq	_AR5K_RESET_CTL_PHY@GOTPCREL(%rip), %rax
	orl	(%rax), %esi
	movq	_AR5K_RESET_CTL_PCI@GOTPCREL(%rip), %rax
	orl	(%rax), %esi
	movq	%r13, %rdi
	callq	_ath5k_hw_nic_reset
	movl	%eax, %ebx
	movl	$2000, %edi                     ## imm = 0x7D0
	movl	$2500, %esi                     ## imm = 0x9C4
	callq	_usleep_range
	testl	%ebx, %ebx
	je	LBB0_18
LBB0_15:
	leaq	L_.str.1(%rip), %rsi
LBB0_16:
	movq	%r13, %rdi
	callq	_ATH5K_ERR
	movq	_EIO@GOTPCREL(%rip), %rax
LBB0_17:
	xorl	%r14d, %r14d
	subl	(%rax), %r14d
	jmp	LBB0_59
LBB0_10:
	movq	%r13, %rdi
	callq	_ath5k_get_bus_type
	movq	_AR5K_RESET_CTL_PCU@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	movq	_AR5K_RESET_CTL_BASEBAND@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	cmpq	(%r12), %rax
	jne	LBB0_12
## %bb.11:
	orl	%esi, %ecx
	movq	%r13, %rdi
	movl	%ecx, %esi
	callq	_ath5k_hw_wisoc_reset
	jmp	LBB0_13
LBB0_12:
	orl	%ebx, %esi
	orl	%ecx, %esi
	movq	%r13, %rdi
	callq	_ath5k_hw_nic_reset
LBB0_13:
	movl	%eax, %ebx
	testl	%ebx, %ebx
	jne	LBB0_15
LBB0_18:
	movq	%r14, %rbx
	movq	_AR5K_PM_AWAKE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r13, %rdi
	movl	$1, %edx
	xorl	%ecx, %ecx
	callq	_ath5k_hw_set_power_mode
	testl	%eax, %eax
	je	LBB0_20
## %bb.19:
	movl	%eax, %r14d
	leaq	L_.str.2(%rip), %rsi
LBB0_4:
	movq	%r13, %rdi
	callq	_ATH5K_ERR
LBB0_59:
	movl	%r14d, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_20:
	movq	%r13, %rdi
	callq	_ath5k_get_bus_type
	cmpq	(%r12), %rax
	jne	LBB0_22
## %bb.21:
	movq	%r13, %rdi
	xorl	%esi, %esi
	callq	_ath5k_hw_wisoc_reset
	testl	%eax, %eax
	je	LBB0_25
LBB0_24:
	leaq	L_.str.3(%rip), %rsi
	jmp	LBB0_16
LBB0_22:
	movq	%r13, %rdi
	xorl	%esi, %esi
	callq	_ath5k_hw_nic_reset
	testl	%eax, %eax
	jne	LBB0_24
LBB0_25:
	xorl	%r14d, %r14d
	testq	%r15, %r15
	je	LBB0_59
## %bb.26:
	movq	(%r13), %rax
	movq	(%rbx), %rcx
	cmpq	%rcx, %rax
	jne	LBB0_27
## %bb.53:
	movq	16(%r13), %rax
	movq	_AR5K_BWMODE_40MHZ@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jne	LBB0_59
## %bb.54:
	movq	_AR5K_PHY_TURBO_MODE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_AR5K_PHY_TURBO@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r13, %rdi
	callq	_ath5k_hw_reg_write
	movq	(%r13), %rax
	movq	(%rbx), %rcx
	xorl	%ebx, %ebx
	xorl	%r12d, %r12d
	xorl	%r8d, %r8d
	jmp	LBB0_55
LBB0_27:
	movq	8(%r13), %rdx
	movq	_AR5K_RF5112@GOTPCREL(%rip), %rsi
	cmpq	(%rsi), %rdx
	movq	_AR5K_PHY_PLL_RF5112@GOTPCREL(%rip), %rsi
	cmovlq	_AR5K_PHY_PLL_RF5111@GOTPCREL(%rip), %rsi
	movl	(%rsi), %r8d
	movq	_AR5K_PHY_MODE_RAD_RF5112@GOTPCREL(%rip), %rsi
	cmovlq	_AR5K_PHY_MODE_RAD_RF5111@GOTPCREL(%rip), %rsi
	movl	(%rsi), %r12d
	movq	(%r15), %rsi
	movq	_NL80211_BAND_2GHZ@GOTPCREL(%rip), %rdi
	cmpq	(%rdi), %rsi
	jne	LBB0_32
## %bb.28:
	movq	_AR5K_PHY_MODE_FREQ_2GHZ@GOTPCREL(%rip), %rsi
	orl	(%rsi), %r12d
	movq	_AR5K_PHY_PLL_44MHZ@GOTPCREL(%rip), %rsi
	orl	(%rsi), %r8d
	movq	8(%r15), %rsi
	movq	_AR5K_MODE_11B@GOTPCREL(%rip), %rdi
	cmpq	(%rdi), %rsi
	jne	LBB0_30
## %bb.29:
	movq	_AR5K_PHY_MODE_MOD_CCK@GOTPCREL(%rip), %rsi
	jmp	LBB0_38
LBB0_32:
	movq	_NL80211_BAND_5GHZ@GOTPCREL(%rip), %rdi
	cmpq	(%rdi), %rsi
	jne	LBB0_36
## %bb.33:
	movq	_AR5K_PHY_MODE_FREQ_5GHZ@GOTPCREL(%rip), %rsi
	movq	_AR5K_PHY_MODE_MOD_OFDM@GOTPCREL(%rip), %rdi
	orl	(%rsi), %r12d
	orl	(%rdi), %r12d
	movq	_AR5K_RF5413@GOTPCREL(%rip), %rsi
	cmpq	(%rsi), %rdx
	jne	LBB0_35
## %bb.34:
	movq	_AR5K_PHY_PLL_40MHZ_5413@GOTPCREL(%rip), %rsi
	movl	(%rsi), %r8d
	jmp	LBB0_39
LBB0_30:
	movq	_AR5K_AR5211@GOTPCREL(%rip), %rsi
	cmpq	(%rsi), %rax
	jne	LBB0_37
## %bb.31:
	movq	_AR5K_PHY_MODE_MOD_OFDM@GOTPCREL(%rip), %rsi
	jmp	LBB0_38
LBB0_36:
	leaq	L_.str.4(%rip), %rsi
	movq	%r13, %rdi
	callq	_ATH5K_ERR
	movq	_EINVAL@GOTPCREL(%rip), %rax
	jmp	LBB0_17
LBB0_35:
	movq	_AR5K_PHY_PLL_40MHZ@GOTPCREL(%rip), %rsi
	orl	(%rsi), %r8d
	jmp	LBB0_39
LBB0_37:
	movq	_AR5K_PHY_MODE_MOD_DYN@GOTPCREL(%rip), %rsi
LBB0_38:
	orl	(%rsi), %r12d
LBB0_39:
	movq	16(%r13), %rsi
	movq	_AR5K_BWMODE_40MHZ@GOTPCREL(%rip), %rdi
	cmpq	(%rdi), %rsi
	jne	LBB0_42
## %bb.40:
	movq	_AR5K_PHY_TURBO_MODE@GOTPCREL(%rip), %rsi
	movl	(%rsi), %ebx
	movq	_AR5K_RF2425@GOTPCREL(%rip), %rsi
	cmpq	(%rsi), %rdx
	je	LBB0_55
## %bb.41:
	movq	_AR5K_PHY_TURBO_SHORT@GOTPCREL(%rip), %rdx
	orl	(%rdx), %ebx
	jmp	LBB0_55
LBB0_42:
	movq	_AR5K_BWMODE_DEFAULT@GOTPCREL(%rip), %rdi
	xorl	%ebx, %ebx
	cmpq	(%rdi), %rsi
	jne	LBB0_43
LBB0_55:
	cmpq	%rcx, %rax
	je	LBB0_59
## %bb.56:
	movl	%ebx, -44(%rbp)                 ## 4-byte Spill
	movq	_AR5K_PHY_PLL@GOTPCREL(%rip), %r15
	movl	(%r15), %esi
	movq	%r13, %rdi
	movl	%r8d, %ebx
	callq	_ath5k_hw_reg_read
	cmpl	%ebx, %eax
	je	LBB0_58
## %bb.57:
	movl	(%r15), %edx
	movq	%r13, %rdi
	movl	%ebx, %esi
	callq	_ath5k_hw_reg_write
	movl	$300, %edi                      ## imm = 0x12C
	movl	$350, %esi                      ## imm = 0x15E
	callq	_usleep_range
LBB0_58:
	movq	_AR5K_PHY_MODE@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r13, %rdi
	movl	%r12d, %esi
	callq	_ath5k_hw_reg_write
	movq	_AR5K_PHY_TURBO@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r13, %rdi
	movl	-44(%rbp), %esi                 ## 4-byte Reload
	callq	_ath5k_hw_reg_write
	jmp	LBB0_59
LBB0_43:
	movq	_AR5K_RF5413@GOTPCREL(%rip), %rdi
	cmpq	(%rdi), %rdx
	jne	LBB0_48
## %bb.44:
	movq	_AR5K_BWMODE_10MHZ@GOTPCREL(%rip), %rdx
	cmpq	(%rdx), %rsi
	jne	LBB0_45
## %bb.46:
	movq	_AR5K_PHY_MODE_HALF_RATE@GOTPCREL(%rip), %rdx
	orl	(%rdx), %r12d
	jmp	LBB0_55
LBB0_48:
	movq	_AR5K_AR5212@GOTPCREL(%rip), %rdx
	cmpq	(%rdx), %rax
	jne	LBB0_55
## %bb.49:
	movq	_AR5K_BWMODE_10MHZ@GOTPCREL(%rip), %rdx
	cmpq	(%rdx), %rsi
	jne	LBB0_50
## %bb.51:
	movq	_AR5K_PHY_PLL_HALF_RATE@GOTPCREL(%rip), %rdx
	orl	(%rdx), %r8d
	jmp	LBB0_55
LBB0_45:
	movq	_AR5K_PHY_MODE_QUARTER_RATE@GOTPCREL(%rip), %rdx
	orl	(%rdx), %r12d
	jmp	LBB0_55
LBB0_50:
	movq	_AR5K_PHY_PLL_QUARTER_RATE@GOTPCREL(%rip), %rdx
	orl	(%rdx), %r8d
	jmp	LBB0_55
	.cfi_endproc
                                        ## -- End function
	.comm	_ATH_AHB,8,3                    ## @ATH_AHB
	.comm	_AR5K_PM_AWAKE,4,2              ## @AR5K_PM_AWAKE
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"failed to wakeup the MAC Chip\n"

	.comm	_AR5K_RESET_CTL_PCI,4,2         ## @AR5K_RESET_CTL_PCI
	.comm	_AR5K_AR5210,8,3                ## @AR5K_AR5210
	.comm	_AR5K_RESET_CTL_PCU,4,2         ## @AR5K_RESET_CTL_PCU
	.comm	_AR5K_RESET_CTL_MAC,4,2         ## @AR5K_RESET_CTL_MAC
	.comm	_AR5K_RESET_CTL_DMA,4,2         ## @AR5K_RESET_CTL_DMA
	.comm	_AR5K_RESET_CTL_PHY,4,2         ## @AR5K_RESET_CTL_PHY
	.comm	_AR5K_RESET_CTL_BASEBAND,4,2    ## @AR5K_RESET_CTL_BASEBAND
L_.str.1:                               ## @.str.1
	.asciz	"failed to reset the MAC Chip\n"

	.comm	_EIO,4,2                        ## @EIO
L_.str.2:                               ## @.str.2
	.asciz	"failed to resume the MAC Chip\n"

L_.str.3:                               ## @.str.3
	.asciz	"failed to warm reset the MAC Chip\n"

	.comm	_AR5K_RF5112,8,3                ## @AR5K_RF5112
	.comm	_AR5K_PHY_MODE_RAD_RF5112,4,2   ## @AR5K_PHY_MODE_RAD_RF5112
	.comm	_AR5K_PHY_PLL_RF5112,4,2        ## @AR5K_PHY_PLL_RF5112
	.comm	_AR5K_PHY_MODE_RAD_RF5111,4,2   ## @AR5K_PHY_MODE_RAD_RF5111
	.comm	_AR5K_PHY_PLL_RF5111,4,2        ## @AR5K_PHY_PLL_RF5111
	.comm	_NL80211_BAND_2GHZ,8,3          ## @NL80211_BAND_2GHZ
	.comm	_AR5K_PHY_MODE_FREQ_2GHZ,4,2    ## @AR5K_PHY_MODE_FREQ_2GHZ
	.comm	_AR5K_PHY_PLL_44MHZ,4,2         ## @AR5K_PHY_PLL_44MHZ
	.comm	_AR5K_MODE_11B,8,3              ## @AR5K_MODE_11B
	.comm	_AR5K_PHY_MODE_MOD_CCK,4,2      ## @AR5K_PHY_MODE_MOD_CCK
	.comm	_AR5K_AR5211,8,3                ## @AR5K_AR5211
	.comm	_AR5K_PHY_MODE_MOD_OFDM,4,2     ## @AR5K_PHY_MODE_MOD_OFDM
	.comm	_AR5K_PHY_MODE_MOD_DYN,4,2      ## @AR5K_PHY_MODE_MOD_DYN
	.comm	_NL80211_BAND_5GHZ,8,3          ## @NL80211_BAND_5GHZ
	.comm	_AR5K_PHY_MODE_FREQ_5GHZ,4,2    ## @AR5K_PHY_MODE_FREQ_5GHZ
	.comm	_AR5K_RF5413,8,3                ## @AR5K_RF5413
	.comm	_AR5K_PHY_PLL_40MHZ_5413,4,2    ## @AR5K_PHY_PLL_40MHZ_5413
	.comm	_AR5K_PHY_PLL_40MHZ,4,2         ## @AR5K_PHY_PLL_40MHZ
L_.str.4:                               ## @.str.4
	.asciz	"invalid radio frequency mode\n"

	.comm	_EINVAL,4,2                     ## @EINVAL
	.comm	_AR5K_BWMODE_40MHZ,8,3          ## @AR5K_BWMODE_40MHZ
	.comm	_AR5K_PHY_TURBO_MODE,4,2        ## @AR5K_PHY_TURBO_MODE
	.comm	_AR5K_RF2425,8,3                ## @AR5K_RF2425
	.comm	_AR5K_PHY_TURBO_SHORT,4,2       ## @AR5K_PHY_TURBO_SHORT
	.comm	_AR5K_BWMODE_DEFAULT,8,3        ## @AR5K_BWMODE_DEFAULT
	.comm	_AR5K_BWMODE_10MHZ,8,3          ## @AR5K_BWMODE_10MHZ
	.comm	_AR5K_PHY_MODE_HALF_RATE,4,2    ## @AR5K_PHY_MODE_HALF_RATE
	.comm	_AR5K_PHY_MODE_QUARTER_RATE,4,2 ## @AR5K_PHY_MODE_QUARTER_RATE
	.comm	_AR5K_AR5212,8,3                ## @AR5K_AR5212
	.comm	_AR5K_PHY_PLL_HALF_RATE,4,2     ## @AR5K_PHY_PLL_HALF_RATE
	.comm	_AR5K_PHY_PLL_QUARTER_RATE,4,2  ## @AR5K_PHY_PLL_QUARTER_RATE
	.comm	_AR5K_PHY_TURBO,4,2             ## @AR5K_PHY_TURBO
	.comm	_AR5K_PHY_PLL,4,2               ## @AR5K_PHY_PLL
	.comm	_AR5K_PHY_MODE,4,2              ## @AR5K_PHY_MODE
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_ath5k_hw_nic_wakeup            ; -- Begin function ath5k_hw_nic_wakeup
	.p2align	2
_ath5k_hw_nic_wakeup:                   ; @ath5k_hw_nic_wakeup
	.cfi_startproc
; %bb.0:
	stp	x26, x25, [sp, #-80]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	mov	x20, x1
	mov	x19, x0
	ldr	x22, [x0, #24]
	bl	_ath5k_get_bus_type
Lloh0:
	adrp	x24, _ATH_AHB@GOTPAGE
Lloh1:
	ldr	x24, [x24, _ATH_AHB@GOTPAGEOFF]
	cbnz	x20, LBB0_2
; %bb.1:
	ldr	x8, [x24]
	cmp	x0, x8
	b.eq	LBB0_4
LBB0_2:
Lloh2:
	adrp	x8, _AR5K_PM_AWAKE@GOTPAGE
Lloh3:
	ldr	x8, [x8, _AR5K_PM_AWAKE@GOTPAGEOFF]
Lloh4:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #1
	mov	w3, #0
	bl	_ath5k_hw_set_power_mode
	cbz	w0, LBB0_4
; %bb.3:
	mov	x21, x0
Lloh5:
	adrp	x1, l_.str@PAGE
Lloh6:
	add	x1, x1, l_.str@PAGEOFF
	b	LBB0_18
LBB0_4:
Lloh7:
	adrp	x21, _AR5K_RESET_CTL_PCI@GOTPAGE
Lloh8:
	ldr	x21, [x21, _AR5K_RESET_CTL_PCI@GOTPAGEOFF]
	cbz	x22, LBB0_7
; %bb.5:
	mov	x0, x22
	bl	_pci_is_pcie
	cbz	x0, LBB0_7
; %bb.6:
	mov	w22, #0
	b	LBB0_8
LBB0_7:
	ldr	w22, [x21]
LBB0_8:
	ldr	x8, [x19]
Lloh9:
	adrp	x23, _AR5K_AR5210@GOTPAGE
Lloh10:
	ldr	x23, [x23, _AR5K_AR5210@GOTPAGEOFF]
	ldr	x9, [x23]
Lloh11:
	adrp	x25, _AR5K_RESET_CTL_PCU@GOTPAGE
Lloh12:
	ldr	x25, [x25, _AR5K_RESET_CTL_PCU@GOTPAGEOFF]
	cmp	x8, x9
	b.ne	LBB0_13
; %bb.9:
	ldr	w8, [x25]
Lloh13:
	adrp	x9, _AR5K_RESET_CTL_MAC@GOTPAGE
Lloh14:
	ldr	x9, [x9, _AR5K_RESET_CTL_MAC@GOTPAGEOFF]
Lloh15:
	ldr	w9, [x9]
	orr	w8, w9, w8
Lloh16:
	adrp	x9, _AR5K_RESET_CTL_DMA@GOTPAGE
Lloh17:
	ldr	x9, [x9, _AR5K_RESET_CTL_DMA@GOTPAGEOFF]
Lloh18:
	ldr	w9, [x9]
	orr	w8, w8, w9
Lloh19:
	adrp	x9, _AR5K_RESET_CTL_PHY@GOTPAGE
Lloh20:
	ldr	x9, [x9, _AR5K_RESET_CTL_PHY@GOTPAGEOFF]
Lloh21:
	ldr	w9, [x9]
	orr	w8, w8, w9
	ldr	w9, [x21]
	orr	w1, w8, w9
	mov	x0, x19
	bl	_ath5k_hw_nic_reset
	mov	x21, x0
	mov	w0, #2000
	mov	w1, #2500
	bl	_usleep_range
	cbz	w21, LBB0_16
LBB0_10:
Lloh22:
	adrp	x1, l_.str.1@PAGE
Lloh23:
	add	x1, x1, l_.str.1@PAGEOFF
LBB0_11:
	mov	x0, x19
	bl	_ATH5K_ERR
Lloh24:
	adrp	x8, _EIO@GOTPAGE
Lloh25:
	ldr	x8, [x8, _EIO@GOTPAGEOFF]
LBB0_12:
	ldr	w8, [x8]
	neg	w21, w8
	b	LBB0_19
LBB0_13:
	mov	x0, x19
	bl	_ath5k_get_bus_type
	ldr	x10, [x24]
	ldr	w8, [x25]
Lloh26:
	adrp	x9, _AR5K_RESET_CTL_BASEBAND@GOTPAGE
Lloh27:
	ldr	x9, [x9, _AR5K_RESET_CTL_BASEBAND@GOTPAGEOFF]
Lloh28:
	ldr	w9, [x9]
	cmp	x0, x10
	b.ne	LBB0_15
; %bb.14:
	orr	w1, w9, w8
	mov	x0, x19
	bl	_ath5k_hw_wisoc_reset
	mov	x21, x0
	cbnz	w21, LBB0_10
	b	LBB0_16
LBB0_15:
	orr	w8, w8, w22
	orr	w1, w8, w9
	mov	x0, x19
	bl	_ath5k_hw_nic_reset
	mov	x21, x0
	cbnz	w21, LBB0_10
LBB0_16:
Lloh29:
	adrp	x8, _AR5K_PM_AWAKE@GOTPAGE
Lloh30:
	ldr	x8, [x8, _AR5K_PM_AWAKE@GOTPAGEOFF]
Lloh31:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #1
	mov	w3, #0
	bl	_ath5k_hw_set_power_mode
	cbz	w0, LBB0_20
; %bb.17:
	mov	x21, x0
Lloh32:
	adrp	x1, l_.str.2@PAGE
Lloh33:
	add	x1, x1, l_.str.2@PAGEOFF
LBB0_18:
	mov	x0, x19
	bl	_ATH5K_ERR
LBB0_19:
	mov	x0, x21
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp], #80             ; 16-byte Folded Reload
	ret
LBB0_20:
	mov	x0, x19
	bl	_ath5k_get_bus_type
	ldr	x8, [x24]
	cmp	x0, x8
	b.ne	LBB0_23
; %bb.21:
	mov	x0, x19
	mov	w1, #0
	bl	_ath5k_hw_wisoc_reset
	cbz	w0, LBB0_24
LBB0_22:
Lloh34:
	adrp	x1, l_.str.3@PAGE
Lloh35:
	add	x1, x1, l_.str.3@PAGEOFF
	b	LBB0_11
LBB0_23:
	mov	x0, x19
	mov	w1, #0
	bl	_ath5k_hw_nic_reset
	cbnz	w0, LBB0_22
LBB0_24:
	cbz	x20, LBB0_53
; %bb.25:
	ldr	x8, [x19]
	ldr	x9, [x23]
	cmp	x8, x9
	b.ne	LBB0_28
; %bb.26:
	ldr	x8, [x19, #16]
Lloh36:
	adrp	x9, _AR5K_BWMODE_40MHZ@GOTPAGE
Lloh37:
	ldr	x9, [x9, _AR5K_BWMODE_40MHZ@GOTPAGEOFF]
Lloh38:
	ldr	x9, [x9]
	cmp	x8, x9
	b.ne	LBB0_53
; %bb.27:
Lloh39:
	adrp	x8, _AR5K_PHY_TURBO_MODE@GOTPAGE
Lloh40:
	ldr	x8, [x8, _AR5K_PHY_TURBO_MODE@GOTPAGEOFF]
Lloh41:
	ldr	w1, [x8]
Lloh42:
	adrp	x8, _AR5K_PHY_TURBO@GOTPAGE
Lloh43:
	ldr	x8, [x8, _AR5K_PHY_TURBO@GOTPAGEOFF]
Lloh44:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_ath5k_hw_reg_write
	mov	w22, #0
	mov	w20, #0
	mov	w21, #0
	ldr	x8, [x19]
	ldr	x9, [x23]
	b	LBB0_49
LBB0_28:
	ldr	x10, [x19, #8]
Lloh45:
	adrp	x11, _AR5K_RF5112@GOTPAGE
Lloh46:
	ldr	x11, [x11, _AR5K_RF5112@GOTPAGEOFF]
Lloh47:
	ldr	x11, [x11]
Lloh48:
	adrp	x12, _AR5K_PHY_PLL_RF5111@GOTPAGE
Lloh49:
	ldr	x12, [x12, _AR5K_PHY_PLL_RF5111@GOTPAGEOFF]
Lloh50:
	adrp	x13, _AR5K_PHY_PLL_RF5112@GOTPAGE
Lloh51:
	ldr	x13, [x13, _AR5K_PHY_PLL_RF5112@GOTPAGEOFF]
	cmp	x10, x11
	csel	x11, x12, x13, lt
	ldr	w11, [x11]
Lloh52:
	adrp	x12, _AR5K_PHY_MODE_RAD_RF5111@GOTPAGE
Lloh53:
	ldr	x12, [x12, _AR5K_PHY_MODE_RAD_RF5111@GOTPAGEOFF]
Lloh54:
	adrp	x13, _AR5K_PHY_MODE_RAD_RF5112@GOTPAGE
Lloh55:
	ldr	x13, [x13, _AR5K_PHY_MODE_RAD_RF5112@GOTPAGEOFF]
	csel	x12, x12, x13, lt
	ldr	w12, [x12]
	ldr	x13, [x20]
Lloh56:
	adrp	x14, _NL80211_BAND_2GHZ@GOTPAGE
Lloh57:
	ldr	x14, [x14, _NL80211_BAND_2GHZ@GOTPAGEOFF]
Lloh58:
	ldr	x14, [x14]
	cmp	x13, x14
	b.ne	LBB0_31
; %bb.29:
Lloh59:
	adrp	x13, _AR5K_PHY_MODE_FREQ_2GHZ@GOTPAGE
Lloh60:
	ldr	x13, [x13, _AR5K_PHY_MODE_FREQ_2GHZ@GOTPAGEOFF]
Lloh61:
	ldr	w13, [x13]
	orr	w12, w13, w12
Lloh62:
	adrp	x13, _AR5K_PHY_PLL_44MHZ@GOTPAGE
Lloh63:
	ldr	x13, [x13, _AR5K_PHY_PLL_44MHZ@GOTPAGEOFF]
Lloh64:
	ldr	w13, [x13]
	orr	w21, w13, w11
	ldr	x11, [x20, #8]
Lloh65:
	adrp	x13, _AR5K_MODE_11B@GOTPAGE
Lloh66:
	ldr	x13, [x13, _AR5K_MODE_11B@GOTPAGEOFF]
Lloh67:
	ldr	x13, [x13]
	cmp	x11, x13
	b.ne	LBB0_34
; %bb.30:
Lloh68:
	adrp	x11, _AR5K_PHY_MODE_MOD_CCK@GOTPAGE
Lloh69:
	ldr	x11, [x11, _AR5K_PHY_MODE_MOD_CCK@GOTPAGEOFF]
	b	LBB0_39
LBB0_31:
Lloh70:
	adrp	x14, _NL80211_BAND_5GHZ@GOTPAGE
Lloh71:
	ldr	x14, [x14, _NL80211_BAND_5GHZ@GOTPAGEOFF]
Lloh72:
	ldr	x14, [x14]
	cmp	x13, x14
	b.ne	LBB0_36
; %bb.32:
Lloh73:
	adrp	x13, _AR5K_PHY_MODE_FREQ_5GHZ@GOTPAGE
Lloh74:
	ldr	x13, [x13, _AR5K_PHY_MODE_FREQ_5GHZ@GOTPAGEOFF]
Lloh75:
	ldr	w13, [x13]
Lloh76:
	adrp	x14, _AR5K_PHY_MODE_MOD_OFDM@GOTPAGE
Lloh77:
	ldr	x14, [x14, _AR5K_PHY_MODE_MOD_OFDM@GOTPAGEOFF]
Lloh78:
	ldr	w14, [x14]
	orr	w12, w13, w12
	orr	w20, w12, w14
Lloh79:
	adrp	x12, _AR5K_RF5413@GOTPAGE
Lloh80:
	ldr	x12, [x12, _AR5K_RF5413@GOTPAGEOFF]
Lloh81:
	ldr	x12, [x12]
	cmp	x10, x12
	b.ne	LBB0_37
; %bb.33:
Lloh82:
	adrp	x11, _AR5K_PHY_PLL_40MHZ_5413@GOTPAGE
Lloh83:
	ldr	x11, [x11, _AR5K_PHY_PLL_40MHZ_5413@GOTPAGEOFF]
Lloh84:
	ldr	w21, [x11]
	b	LBB0_40
LBB0_34:
Lloh85:
	adrp	x11, _AR5K_AR5211@GOTPAGE
Lloh86:
	ldr	x11, [x11, _AR5K_AR5211@GOTPAGEOFF]
Lloh87:
	ldr	x11, [x11]
	cmp	x8, x11
	b.ne	LBB0_38
; %bb.35:
Lloh88:
	adrp	x11, _AR5K_PHY_MODE_MOD_OFDM@GOTPAGE
Lloh89:
	ldr	x11, [x11, _AR5K_PHY_MODE_MOD_OFDM@GOTPAGEOFF]
	b	LBB0_39
LBB0_36:
Lloh90:
	adrp	x1, l_.str.4@PAGE
Lloh91:
	add	x1, x1, l_.str.4@PAGEOFF
	mov	x0, x19
	bl	_ATH5K_ERR
Lloh92:
	adrp	x8, _EINVAL@GOTPAGE
Lloh93:
	ldr	x8, [x8, _EINVAL@GOTPAGEOFF]
	b	LBB0_12
LBB0_37:
Lloh94:
	adrp	x12, _AR5K_PHY_PLL_40MHZ@GOTPAGE
Lloh95:
	ldr	x12, [x12, _AR5K_PHY_PLL_40MHZ@GOTPAGEOFF]
Lloh96:
	ldr	w12, [x12]
	orr	w21, w12, w11
	b	LBB0_40
LBB0_38:
Lloh97:
	adrp	x11, _AR5K_PHY_MODE_MOD_DYN@GOTPAGE
Lloh98:
	ldr	x11, [x11, _AR5K_PHY_MODE_MOD_DYN@GOTPAGEOFF]
LBB0_39:
	ldr	w11, [x11]
	orr	w20, w11, w12
LBB0_40:
	ldr	x11, [x19, #16]
Lloh99:
	adrp	x12, _AR5K_BWMODE_40MHZ@GOTPAGE
Lloh100:
	ldr	x12, [x12, _AR5K_BWMODE_40MHZ@GOTPAGEOFF]
Lloh101:
	ldr	x12, [x12]
	cmp	x11, x12
	b.ne	LBB0_43
; %bb.41:
Lloh102:
	adrp	x11, _AR5K_PHY_TURBO_MODE@GOTPAGE
Lloh103:
	ldr	x11, [x11, _AR5K_PHY_TURBO_MODE@GOTPAGEOFF]
Lloh104:
	ldr	w22, [x11]
Lloh105:
	adrp	x11, _AR5K_RF2425@GOTPAGE
Lloh106:
	ldr	x11, [x11, _AR5K_RF2425@GOTPAGEOFF]
Lloh107:
	ldr	x11, [x11]
	cmp	x10, x11
	b.eq	LBB0_49
; %bb.42:
Lloh108:
	adrp	x10, _AR5K_PHY_TURBO_SHORT@GOTPAGE
Lloh109:
	ldr	x10, [x10, _AR5K_PHY_TURBO_SHORT@GOTPAGEOFF]
Lloh110:
	ldr	w10, [x10]
	orr	w22, w10, w22
	b	LBB0_49
LBB0_43:
Lloh111:
	adrp	x12, _AR5K_BWMODE_DEFAULT@GOTPAGE
Lloh112:
	ldr	x12, [x12, _AR5K_BWMODE_DEFAULT@GOTPAGEOFF]
Lloh113:
	ldr	x12, [x12]
	cmp	x11, x12
	b.ne	LBB0_45
LBB0_44:
	mov	w22, #0
	b	LBB0_49
LBB0_45:
Lloh114:
	adrp	x12, _AR5K_RF5413@GOTPAGE
Lloh115:
	ldr	x12, [x12, _AR5K_RF5413@GOTPAGEOFF]
Lloh116:
	ldr	x12, [x12]
	cmp	x10, x12
	b.ne	LBB0_47
; %bb.46:
	mov	w22, #0
Lloh117:
	adrp	x10, _AR5K_BWMODE_10MHZ@GOTPAGE
Lloh118:
	ldr	x10, [x10, _AR5K_BWMODE_10MHZ@GOTPAGEOFF]
Lloh119:
	ldr	x10, [x10]
Lloh120:
	adrp	x12, _AR5K_PHY_MODE_HALF_RATE@GOTPAGE
Lloh121:
	ldr	x12, [x12, _AR5K_PHY_MODE_HALF_RATE@GOTPAGEOFF]
Lloh122:
	adrp	x13, _AR5K_PHY_MODE_QUARTER_RATE@GOTPAGE
Lloh123:
	ldr	x13, [x13, _AR5K_PHY_MODE_QUARTER_RATE@GOTPAGEOFF]
	cmp	x11, x10
	csel	x10, x12, x13, eq
	ldr	w10, [x10]
	orr	w20, w10, w20
	b	LBB0_49
LBB0_47:
Lloh124:
	adrp	x10, _AR5K_AR5212@GOTPAGE
Lloh125:
	ldr	x10, [x10, _AR5K_AR5212@GOTPAGEOFF]
Lloh126:
	ldr	x10, [x10]
	cmp	x8, x10
	b.ne	LBB0_44
; %bb.48:
	mov	w22, #0
Lloh127:
	adrp	x10, _AR5K_BWMODE_10MHZ@GOTPAGE
Lloh128:
	ldr	x10, [x10, _AR5K_BWMODE_10MHZ@GOTPAGEOFF]
Lloh129:
	ldr	x10, [x10]
Lloh130:
	adrp	x12, _AR5K_PHY_PLL_HALF_RATE@GOTPAGE
Lloh131:
	ldr	x12, [x12, _AR5K_PHY_PLL_HALF_RATE@GOTPAGEOFF]
Lloh132:
	adrp	x13, _AR5K_PHY_PLL_QUARTER_RATE@GOTPAGE
Lloh133:
	ldr	x13, [x13, _AR5K_PHY_PLL_QUARTER_RATE@GOTPAGEOFF]
	cmp	x11, x10
	csel	x10, x12, x13, eq
	ldr	w10, [x10]
	orr	w21, w10, w21
LBB0_49:
	cmp	x8, x9
	b.eq	LBB0_53
; %bb.50:
Lloh134:
	adrp	x23, _AR5K_PHY_PLL@GOTPAGE
Lloh135:
	ldr	x23, [x23, _AR5K_PHY_PLL@GOTPAGEOFF]
	ldr	w1, [x23]
	mov	x0, x19
	bl	_ath5k_hw_reg_read
	cmp	w0, w21
	b.eq	LBB0_52
; %bb.51:
	ldr	w2, [x23]
	mov	x0, x19
	mov	x1, x21
	bl	_ath5k_hw_reg_write
	mov	w0, #300
	mov	w1, #350
	bl	_usleep_range
LBB0_52:
Lloh136:
	adrp	x8, _AR5K_PHY_MODE@GOTPAGE
Lloh137:
	ldr	x8, [x8, _AR5K_PHY_MODE@GOTPAGEOFF]
Lloh138:
	ldr	w2, [x8]
	mov	x0, x19
	mov	x1, x20
	bl	_ath5k_hw_reg_write
Lloh139:
	adrp	x8, _AR5K_PHY_TURBO@GOTPAGE
Lloh140:
	ldr	x8, [x8, _AR5K_PHY_TURBO@GOTPAGEOFF]
Lloh141:
	ldr	w2, [x8]
	mov	x0, x19
	mov	x1, x22
	bl	_ath5k_hw_reg_write
LBB0_53:
	mov	w21, #0
	b	LBB0_19
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpAdd	Lloh5, Lloh6
	.loh AdrpLdrGot	Lloh7, Lloh8
	.loh AdrpLdrGot	Lloh11, Lloh12
	.loh AdrpLdrGot	Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh19, Lloh20, Lloh21
	.loh AdrpLdrGotLdr	Lloh16, Lloh17, Lloh18
	.loh AdrpLdrGotLdr	Lloh13, Lloh14, Lloh15
	.loh AdrpAdd	Lloh22, Lloh23
	.loh AdrpLdrGot	Lloh24, Lloh25
	.loh AdrpLdrGotLdr	Lloh26, Lloh27, Lloh28
	.loh AdrpLdrGotLdr	Lloh29, Lloh30, Lloh31
	.loh AdrpAdd	Lloh32, Lloh33
	.loh AdrpAdd	Lloh34, Lloh35
	.loh AdrpLdrGotLdr	Lloh36, Lloh37, Lloh38
	.loh AdrpLdrGotLdr	Lloh42, Lloh43, Lloh44
	.loh AdrpLdrGotLdr	Lloh39, Lloh40, Lloh41
	.loh AdrpLdrGotLdr	Lloh56, Lloh57, Lloh58
	.loh AdrpLdrGot	Lloh54, Lloh55
	.loh AdrpLdrGot	Lloh52, Lloh53
	.loh AdrpLdrGot	Lloh50, Lloh51
	.loh AdrpLdrGot	Lloh48, Lloh49
	.loh AdrpLdrGotLdr	Lloh45, Lloh46, Lloh47
	.loh AdrpLdrGotLdr	Lloh65, Lloh66, Lloh67
	.loh AdrpLdrGotLdr	Lloh62, Lloh63, Lloh64
	.loh AdrpLdrGotLdr	Lloh59, Lloh60, Lloh61
	.loh AdrpLdrGot	Lloh68, Lloh69
	.loh AdrpLdrGotLdr	Lloh70, Lloh71, Lloh72
	.loh AdrpLdrGotLdr	Lloh79, Lloh80, Lloh81
	.loh AdrpLdrGotLdr	Lloh76, Lloh77, Lloh78
	.loh AdrpLdrGotLdr	Lloh73, Lloh74, Lloh75
	.loh AdrpLdrGotLdr	Lloh82, Lloh83, Lloh84
	.loh AdrpLdrGotLdr	Lloh85, Lloh86, Lloh87
	.loh AdrpLdrGot	Lloh88, Lloh89
	.loh AdrpLdrGot	Lloh92, Lloh93
	.loh AdrpAdd	Lloh90, Lloh91
	.loh AdrpLdrGotLdr	Lloh94, Lloh95, Lloh96
	.loh AdrpLdrGot	Lloh97, Lloh98
	.loh AdrpLdrGotLdr	Lloh99, Lloh100, Lloh101
	.loh AdrpLdrGotLdr	Lloh105, Lloh106, Lloh107
	.loh AdrpLdrGotLdr	Lloh102, Lloh103, Lloh104
	.loh AdrpLdrGotLdr	Lloh108, Lloh109, Lloh110
	.loh AdrpLdrGotLdr	Lloh111, Lloh112, Lloh113
	.loh AdrpLdrGotLdr	Lloh114, Lloh115, Lloh116
	.loh AdrpLdrGot	Lloh122, Lloh123
	.loh AdrpLdrGot	Lloh120, Lloh121
	.loh AdrpLdrGotLdr	Lloh117, Lloh118, Lloh119
	.loh AdrpLdrGotLdr	Lloh124, Lloh125, Lloh126
	.loh AdrpLdrGot	Lloh132, Lloh133
	.loh AdrpLdrGot	Lloh130, Lloh131
	.loh AdrpLdrGotLdr	Lloh127, Lloh128, Lloh129
	.loh AdrpLdrGot	Lloh134, Lloh135
	.loh AdrpLdrGotLdr	Lloh139, Lloh140, Lloh141
	.loh AdrpLdrGotLdr	Lloh136, Lloh137, Lloh138
	.cfi_endproc
                                        ; -- End function
	.comm	_ATH_AHB,8,3                    ; @ATH_AHB
	.comm	_AR5K_PM_AWAKE,4,2              ; @AR5K_PM_AWAKE
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"failed to wakeup the MAC Chip\n"

	.comm	_AR5K_RESET_CTL_PCI,4,2         ; @AR5K_RESET_CTL_PCI
	.comm	_AR5K_AR5210,8,3                ; @AR5K_AR5210
	.comm	_AR5K_RESET_CTL_PCU,4,2         ; @AR5K_RESET_CTL_PCU
	.comm	_AR5K_RESET_CTL_MAC,4,2         ; @AR5K_RESET_CTL_MAC
	.comm	_AR5K_RESET_CTL_DMA,4,2         ; @AR5K_RESET_CTL_DMA
	.comm	_AR5K_RESET_CTL_PHY,4,2         ; @AR5K_RESET_CTL_PHY
	.comm	_AR5K_RESET_CTL_BASEBAND,4,2    ; @AR5K_RESET_CTL_BASEBAND
l_.str.1:                               ; @.str.1
	.asciz	"failed to reset the MAC Chip\n"

	.comm	_EIO,4,2                        ; @EIO
l_.str.2:                               ; @.str.2
	.asciz	"failed to resume the MAC Chip\n"

l_.str.3:                               ; @.str.3
	.asciz	"failed to warm reset the MAC Chip\n"

	.comm	_AR5K_RF5112,8,3                ; @AR5K_RF5112
	.comm	_AR5K_PHY_MODE_RAD_RF5112,4,2   ; @AR5K_PHY_MODE_RAD_RF5112
	.comm	_AR5K_PHY_PLL_RF5112,4,2        ; @AR5K_PHY_PLL_RF5112
	.comm	_AR5K_PHY_MODE_RAD_RF5111,4,2   ; @AR5K_PHY_MODE_RAD_RF5111
	.comm	_AR5K_PHY_PLL_RF5111,4,2        ; @AR5K_PHY_PLL_RF5111
	.comm	_NL80211_BAND_2GHZ,8,3          ; @NL80211_BAND_2GHZ
	.comm	_AR5K_PHY_MODE_FREQ_2GHZ,4,2    ; @AR5K_PHY_MODE_FREQ_2GHZ
	.comm	_AR5K_PHY_PLL_44MHZ,4,2         ; @AR5K_PHY_PLL_44MHZ
	.comm	_AR5K_MODE_11B,8,3              ; @AR5K_MODE_11B
	.comm	_AR5K_PHY_MODE_MOD_CCK,4,2      ; @AR5K_PHY_MODE_MOD_CCK
	.comm	_AR5K_AR5211,8,3                ; @AR5K_AR5211
	.comm	_AR5K_PHY_MODE_MOD_OFDM,4,2     ; @AR5K_PHY_MODE_MOD_OFDM
	.comm	_AR5K_PHY_MODE_MOD_DYN,4,2      ; @AR5K_PHY_MODE_MOD_DYN
	.comm	_NL80211_BAND_5GHZ,8,3          ; @NL80211_BAND_5GHZ
	.comm	_AR5K_PHY_MODE_FREQ_5GHZ,4,2    ; @AR5K_PHY_MODE_FREQ_5GHZ
	.comm	_AR5K_RF5413,8,3                ; @AR5K_RF5413
	.comm	_AR5K_PHY_PLL_40MHZ_5413,4,2    ; @AR5K_PHY_PLL_40MHZ_5413
	.comm	_AR5K_PHY_PLL_40MHZ,4,2         ; @AR5K_PHY_PLL_40MHZ
l_.str.4:                               ; @.str.4
	.asciz	"invalid radio frequency mode\n"

	.comm	_EINVAL,4,2                     ; @EINVAL
	.comm	_AR5K_BWMODE_40MHZ,8,3          ; @AR5K_BWMODE_40MHZ
	.comm	_AR5K_PHY_TURBO_MODE,4,2        ; @AR5K_PHY_TURBO_MODE
	.comm	_AR5K_RF2425,8,3                ; @AR5K_RF2425
	.comm	_AR5K_PHY_TURBO_SHORT,4,2       ; @AR5K_PHY_TURBO_SHORT
	.comm	_AR5K_BWMODE_DEFAULT,8,3        ; @AR5K_BWMODE_DEFAULT
	.comm	_AR5K_BWMODE_10MHZ,8,3          ; @AR5K_BWMODE_10MHZ
	.comm	_AR5K_PHY_MODE_HALF_RATE,4,2    ; @AR5K_PHY_MODE_HALF_RATE
	.comm	_AR5K_PHY_MODE_QUARTER_RATE,4,2 ; @AR5K_PHY_MODE_QUARTER_RATE
	.comm	_AR5K_AR5212,8,3                ; @AR5K_AR5212
	.comm	_AR5K_PHY_PLL_HALF_RATE,4,2     ; @AR5K_PHY_PLL_HALF_RATE
	.comm	_AR5K_PHY_PLL_QUARTER_RATE,4,2  ; @AR5K_PHY_PLL_QUARTER_RATE
	.comm	_AR5K_PHY_TURBO,4,2             ; @AR5K_PHY_TURBO
	.comm	_AR5K_PHY_PLL,4,2               ; @AR5K_PHY_PLL
	.comm	_AR5K_PHY_MODE,4,2              ; @AR5K_PHY_MODE
.subsections_via_symbols
