	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_pcie_cap_has_lnkctl            ## -- Begin function pcie_cap_has_lnkctl
	.p2align	4, 0x90
_pcie_cap_has_lnkctl:                   ## @pcie_cap_has_lnkctl
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	callq	_pci_pcie_type
	movq	_PCI_EXP_TYPE_ENDPOINT@GOTPCREL(%rip), %rcx
	cmpl	(%rcx), %eax
	sete	%cl
	movq	_PCI_EXP_TYPE_LEG_END@GOTPCREL(%rip), %rdx
	cmpl	(%rdx), %eax
	sete	%dl
	orb	%cl, %dl
	movq	_PCI_EXP_TYPE_ROOT_PORT@GOTPCREL(%rip), %rcx
	cmpl	(%rcx), %eax
	sete	%dil
	movq	_PCI_EXP_TYPE_UPSTREAM@GOTPCREL(%rip), %rsi
	cmpl	(%rsi), %eax
	sete	%cl
	orb	%dil, %cl
	orb	%dl, %cl
	movq	_PCI_EXP_TYPE_DOWNSTREAM@GOTPCREL(%rip), %rdx
	cmpl	(%rdx), %eax
	sete	%dil
	movq	_PCI_EXP_TYPE_PCI_BRIDGE@GOTPCREL(%rip), %rsi
	cmpl	(%rsi), %eax
	sete	%dl
	orb	%dil, %dl
	movq	_PCI_EXP_TYPE_PCIE_BRIDGE@GOTPCREL(%rip), %rsi
	cmpl	(%rsi), %eax
	sete	%al
	orb	%dl, %al
	orb	%cl, %al
	movzbl	%al, %eax
	andl	$1, %eax
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_PCI_EXP_TYPE_ENDPOINT,4,2      ## @PCI_EXP_TYPE_ENDPOINT
	.comm	_PCI_EXP_TYPE_LEG_END,4,2       ## @PCI_EXP_TYPE_LEG_END
	.comm	_PCI_EXP_TYPE_ROOT_PORT,4,2     ## @PCI_EXP_TYPE_ROOT_PORT
	.comm	_PCI_EXP_TYPE_UPSTREAM,4,2      ## @PCI_EXP_TYPE_UPSTREAM
	.comm	_PCI_EXP_TYPE_DOWNSTREAM,4,2    ## @PCI_EXP_TYPE_DOWNSTREAM
	.comm	_PCI_EXP_TYPE_PCI_BRIDGE,4,2    ## @PCI_EXP_TYPE_PCI_BRIDGE
	.comm	_PCI_EXP_TYPE_PCIE_BRIDGE,4,2   ## @PCI_EXP_TYPE_PCIE_BRIDGE
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_pcie_cap_has_lnkctl            ; -- Begin function pcie_cap_has_lnkctl
	.p2align	2
_pcie_cap_has_lnkctl:                   ; @pcie_cap_has_lnkctl
	.cfi_startproc
; %bb.0:
	stp	x29, x30, [sp, #-16]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 16
	mov	x29, sp
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	bl	_pci_pcie_type
Lloh0:
	adrp	x8, _PCI_EXP_TYPE_ENDPOINT@GOTPAGE
Lloh1:
	ldr	x8, [x8, _PCI_EXP_TYPE_ENDPOINT@GOTPAGEOFF]
Lloh2:
	ldr	w8, [x8]
	cmp	w0, w8
Lloh3:
	adrp	x8, _PCI_EXP_TYPE_LEG_END@GOTPAGE
Lloh4:
	ldr	x8, [x8, _PCI_EXP_TYPE_LEG_END@GOTPAGEOFF]
Lloh5:
	ldr	w8, [x8]
	ccmp	w0, w8, #4, ne
Lloh6:
	adrp	x8, _PCI_EXP_TYPE_ROOT_PORT@GOTPAGE
Lloh7:
	ldr	x8, [x8, _PCI_EXP_TYPE_ROOT_PORT@GOTPAGEOFF]
Lloh8:
	ldr	w8, [x8]
	ccmp	w0, w8, #4, ne
Lloh9:
	adrp	x8, _PCI_EXP_TYPE_UPSTREAM@GOTPAGE
Lloh10:
	ldr	x8, [x8, _PCI_EXP_TYPE_UPSTREAM@GOTPAGEOFF]
Lloh11:
	ldr	w8, [x8]
	ccmp	w0, w8, #4, ne
Lloh12:
	adrp	x8, _PCI_EXP_TYPE_DOWNSTREAM@GOTPAGE
Lloh13:
	ldr	x8, [x8, _PCI_EXP_TYPE_DOWNSTREAM@GOTPAGEOFF]
Lloh14:
	ldr	w8, [x8]
	ccmp	w0, w8, #4, ne
Lloh15:
	adrp	x8, _PCI_EXP_TYPE_PCI_BRIDGE@GOTPAGE
Lloh16:
	ldr	x8, [x8, _PCI_EXP_TYPE_PCI_BRIDGE@GOTPAGEOFF]
Lloh17:
	ldr	w8, [x8]
	ccmp	w0, w8, #4, ne
Lloh18:
	adrp	x8, _PCI_EXP_TYPE_PCIE_BRIDGE@GOTPAGE
Lloh19:
	ldr	x8, [x8, _PCI_EXP_TYPE_PCIE_BRIDGE@GOTPAGEOFF]
Lloh20:
	ldr	w8, [x8]
	ccmp	w0, w8, #4, ne
	cset	w0, eq
	ldp	x29, x30, [sp], #16             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_PCI_EXP_TYPE_ENDPOINT,4,2      ; @PCI_EXP_TYPE_ENDPOINT
	.comm	_PCI_EXP_TYPE_LEG_END,4,2       ; @PCI_EXP_TYPE_LEG_END
	.comm	_PCI_EXP_TYPE_ROOT_PORT,4,2     ; @PCI_EXP_TYPE_ROOT_PORT
	.comm	_PCI_EXP_TYPE_UPSTREAM,4,2      ; @PCI_EXP_TYPE_UPSTREAM
	.comm	_PCI_EXP_TYPE_DOWNSTREAM,4,2    ; @PCI_EXP_TYPE_DOWNSTREAM
	.comm	_PCI_EXP_TYPE_PCI_BRIDGE,4,2    ; @PCI_EXP_TYPE_PCI_BRIDGE
	.comm	_PCI_EXP_TYPE_PCIE_BRIDGE,4,2   ; @PCI_EXP_TYPE_PCIE_BRIDGE
.subsections_via_symbols
