	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function e1000_hv_phy_workarounds_ich8lan
_e1000_hv_phy_workarounds_ich8lan:      ## @e1000_hv_phy_workarounds_ich8lan
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	32(%rdi), %rax
	movq	_e1000_pchlan@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jne	LBB0_1
## %bb.2:
	movq	%rdi, %r14
	movq	(%rdi), %rax
	movq	_e1000_phy_82577@GOTPCREL(%rip), %r15
	movq	(%r15), %rcx
	cmpq	%rcx, %rax
	jne	LBB0_5
## %bb.3:
	movq	%r14, %rdi
	callq	_e1000_set_mdio_slow_mode_hv
	movq	%rax, %rbx
	testq	%rax, %rax
	jne	LBB0_23
## %bb.4:
	movq	(%r14), %rax
	movq	(%r15), %rcx
LBB0_5:
	cmpq	%rcx, %rax
	jne	LBB0_7
## %bb.6:
	movl	8(%r14), %ecx
	decl	%ecx
	cmpl	$2, %ecx
	jb	LBB0_9
LBB0_7:
	movq	_e1000_phy_82578@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rcx
	cmpq	%rcx, %rax
	jne	LBB0_12
## %bb.8:
	cmpl	$1, 8(%r14)
	jne	LBB0_13
LBB0_9:
	movl	$769, %edi                      ## imm = 0x301
	movl	$25, %esi
	callq	_PHY_REG
	movq	%r14, %rdi
	movl	%eax, %esi
	movl	$17457, %edx                    ## imm = 0x4431
	callq	_e1e_wphy
	movq	%rax, %rbx
	testq	%rax, %rax
	jne	LBB0_23
## %bb.10:
	movq	_HV_KMRN_FIFO_CTRLSTA@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	movl	$41476, %edx                    ## imm = 0xA204
	callq	_e1e_wphy
	movq	%rax, %rbx
	testq	%rax, %rax
	jne	LBB0_23
## %bb.11:
	movq	(%r14), %rax
	movq	_e1000_phy_82578@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rcx
LBB0_12:
	cmpq	%rcx, %rax
	jne	LBB0_15
LBB0_13:
	cmpl	$1, 8(%r14)
	jg	LBB0_15
## %bb.14:
	movq	%r14, %rdi
	callq	_e1000e_phy_sw_reset
	movq	_MII_BMCR@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	movl	$12608, %edx                    ## imm = 0x3140
	callq	_e1e_wphy
	movq	%rax, %rbx
	testq	%rax, %rax
	jne	LBB0_23
LBB0_15:
	movq	%r14, %rdi
	callq	*24(%r14)
	movq	%rax, %rbx
	testq	%rax, %rax
	jne	LBB0_23
## %bb.16:
	movl	$1, 12(%r14)
	movq	_IGP01E1000_PHY_PAGE_SELECT@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	xorl	%edx, %edx
	callq	_e1000e_write_phy_reg_mdic
	movq	%rax, %rbx
	movq	%r14, %rdi
	callq	*16(%r14)
	testq	%rbx, %rbx
	jne	LBB0_23
## %bb.17:
	movq	%r14, %rdi
	movl	$1, %esi
	callq	_e1000_k1_gig_workaround_hv
	movq	%rax, %rbx
	testq	%rax, %rax
	jne	LBB0_23
## %bb.18:
	movq	%r14, %rdi
	callq	*24(%r14)
	movq	%rax, %rbx
	testq	%rax, %rax
	jne	LBB0_23
## %bb.19:
	movq	_BM_PORT_GEN_CFG@GOTPCREL(%rip), %r15
	movl	(%r15), %esi
	leaq	-28(%rbp), %rdx
	movq	%r14, %rdi
	callq	_e1e_rphy_locked
	movq	%rax, %rbx
	testq	%rax, %rax
	jne	LBB0_22
## %bb.20:
	movl	(%r15), %esi
	movzbl	-28(%rbp), %edx
	movq	%r14, %rdi
	callq	_e1e_wphy_locked
	movq	%rax, %rbx
	testq	%rax, %rax
	jne	LBB0_22
## %bb.21:
	movq	_I82577_MSE_THRESHOLD@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	movl	$52, %edx
	callq	_e1000_write_emi_reg_locked
	movq	%rax, %rbx
LBB0_22:
	movq	%r14, %rdi
	callq	*16(%r14)
	jmp	LBB0_23
LBB0_1:
	xorl	%ebx, %ebx
LBB0_23:
	movq	%rbx, %rax
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_e1000_pchlan,8,3               ## @e1000_pchlan
	.comm	_e1000_phy_82577,8,3            ## @e1000_phy_82577
	.comm	_e1000_phy_82578,8,3            ## @e1000_phy_82578
	.comm	_HV_KMRN_FIFO_CTRLSTA,4,2       ## @HV_KMRN_FIFO_CTRLSTA
	.comm	_MII_BMCR,4,2                   ## @MII_BMCR
	.comm	_IGP01E1000_PHY_PAGE_SELECT,4,2 ## @IGP01E1000_PHY_PAGE_SELECT
	.comm	_BM_PORT_GEN_CFG,4,2            ## @BM_PORT_GEN_CFG
	.comm	_I82577_MSE_THRESHOLD,4,2       ## @I82577_MSE_THRESHOLD
	.no_dead_strip	_e1000_hv_phy_workarounds_ich8lan
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function e1000_hv_phy_workarounds_ich8lan
_e1000_hv_phy_workarounds_ich8lan:      ; @e1000_hv_phy_workarounds_ich8lan
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #64
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	ldr	x8, [x0, #32]
Lloh0:
	adrp	x9, _e1000_pchlan@GOTPAGE
Lloh1:
	ldr	x9, [x9, _e1000_pchlan@GOTPAGEOFF]
Lloh2:
	ldr	x9, [x9]
	cmp	x8, x9
	b.ne	LBB0_22
; %bb.1:
	mov	x19, x0
	ldr	x8, [x0]
Lloh3:
	adrp	x21, _e1000_phy_82577@GOTPAGE
Lloh4:
	ldr	x21, [x21, _e1000_phy_82577@GOTPAGEOFF]
	ldr	x9, [x21]
	cmp	x8, x9
	b.ne	LBB0_4
; %bb.2:
	mov	x0, x19
	bl	_e1000_set_mdio_slow_mode_hv
	mov	x20, x0
	cbnz	x0, LBB0_23
; %bb.3:
	ldr	x8, [x19]
	ldr	x9, [x21]
LBB0_4:
	cmp	x8, x9
	b.ne	LBB0_6
; %bb.5:
	ldr	w9, [x19, #8]
	sub	w9, w9, #1
	cmp	w9, #2
	b.lo	LBB0_8
LBB0_6:
Lloh5:
	adrp	x9, _e1000_phy_82578@GOTPAGE
Lloh6:
	ldr	x9, [x9, _e1000_phy_82578@GOTPAGEOFF]
Lloh7:
	ldr	x9, [x9]
	cmp	x8, x9
	b.ne	LBB0_11
; %bb.7:
	ldr	w8, [x19, #8]
	cmp	w8, #1
	b.ne	LBB0_12
LBB0_8:
	mov	w0, #769
	mov	w1, #25
	bl	_PHY_REG
	mov	x1, x0
	mov	x0, x19
	mov	w2, #17457
	bl	_e1e_wphy
	mov	x20, x0
	cbnz	x0, LBB0_23
; %bb.9:
Lloh8:
	adrp	x8, _HV_KMRN_FIFO_CTRLSTA@GOTPAGE
Lloh9:
	ldr	x8, [x8, _HV_KMRN_FIFO_CTRLSTA@GOTPAGEOFF]
Lloh10:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #41476
	bl	_e1e_wphy
	mov	x20, x0
	cbnz	x0, LBB0_23
; %bb.10:
	ldr	x8, [x19]
Lloh11:
	adrp	x9, _e1000_phy_82578@GOTPAGE
Lloh12:
	ldr	x9, [x9, _e1000_phy_82578@GOTPAGEOFF]
Lloh13:
	ldr	x9, [x9]
LBB0_11:
	cmp	x8, x9
	b.ne	LBB0_14
LBB0_12:
	ldr	w8, [x19, #8]
	cmp	w8, #1
	b.gt	LBB0_14
; %bb.13:
	mov	x0, x19
	bl	_e1000e_phy_sw_reset
Lloh14:
	adrp	x8, _MII_BMCR@GOTPAGE
Lloh15:
	ldr	x8, [x8, _MII_BMCR@GOTPAGEOFF]
Lloh16:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #12608
	bl	_e1e_wphy
	mov	x20, x0
	cbnz	x0, LBB0_23
LBB0_14:
	ldr	x8, [x19, #24]
	mov	x0, x19
	blr	x8
	mov	x20, x0
	cbnz	x0, LBB0_23
; %bb.15:
	mov	w8, #1
	str	w8, [x19, #12]
Lloh17:
	adrp	x8, _IGP01E1000_PHY_PAGE_SELECT@GOTPAGE
Lloh18:
	ldr	x8, [x8, _IGP01E1000_PHY_PAGE_SELECT@GOTPAGEOFF]
Lloh19:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #0
	bl	_e1000e_write_phy_reg_mdic
	mov	x20, x0
	ldr	x8, [x19, #16]
	mov	x0, x19
	blr	x8
	cbnz	x20, LBB0_23
; %bb.16:
	mov	x0, x19
	mov	w1, #1
	bl	_e1000_k1_gig_workaround_hv
	mov	x20, x0
	cbnz	x0, LBB0_23
; %bb.17:
	ldr	x8, [x19, #24]
	mov	x0, x19
	blr	x8
	mov	x20, x0
	cbnz	x0, LBB0_23
; %bb.18:
Lloh20:
	adrp	x21, _BM_PORT_GEN_CFG@GOTPAGE
Lloh21:
	ldr	x21, [x21, _BM_PORT_GEN_CFG@GOTPAGEOFF]
	ldr	w1, [x21]
	add	x2, sp, #12
	mov	x0, x19
	bl	_e1e_rphy_locked
	mov	x20, x0
	cbnz	x0, LBB0_21
; %bb.19:
	ldr	w1, [x21]
	ldrb	w2, [sp, #12]
	mov	x0, x19
	bl	_e1e_wphy_locked
	mov	x20, x0
	cbnz	x0, LBB0_21
; %bb.20:
Lloh22:
	adrp	x8, _I82577_MSE_THRESHOLD@GOTPAGE
Lloh23:
	ldr	x8, [x8, _I82577_MSE_THRESHOLD@GOTPAGEOFF]
Lloh24:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #52
	bl	_e1000_write_emi_reg_locked
	mov	x20, x0
LBB0_21:
	ldr	x8, [x19, #16]
	mov	x0, x19
	blr	x8
	b	LBB0_23
LBB0_22:
	mov	x20, #0
LBB0_23:
	mov	x0, x20
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #64
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGot	Lloh3, Lloh4
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh16
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh19
	.loh AdrpLdrGot	Lloh20, Lloh21
	.loh AdrpLdrGotLdr	Lloh22, Lloh23, Lloh24
	.cfi_endproc
                                        ; -- End function
	.comm	_e1000_pchlan,8,3               ; @e1000_pchlan
	.comm	_e1000_phy_82577,8,3            ; @e1000_phy_82577
	.comm	_e1000_phy_82578,8,3            ; @e1000_phy_82578
	.comm	_HV_KMRN_FIFO_CTRLSTA,4,2       ; @HV_KMRN_FIFO_CTRLSTA
	.comm	_MII_BMCR,4,2                   ; @MII_BMCR
	.comm	_IGP01E1000_PHY_PAGE_SELECT,4,2 ; @IGP01E1000_PHY_PAGE_SELECT
	.comm	_BM_PORT_GEN_CFG,4,2            ; @BM_PORT_GEN_CFG
	.comm	_I82577_MSE_THRESHOLD,4,2       ; @I82577_MSE_THRESHOLD
	.no_dead_strip	_e1000_hv_phy_workarounds_ich8lan
.subsections_via_symbols
