	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function pci_read_bridge_mmio_pref
_pci_read_bridge_mmio_pref:             ## @pci_read_bridge_mmio_pref
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$40, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	8(%rdi), %r15
	movq	(%rdi), %rax
	movq	16(%rax), %r14
	movq	_PCI_PREF_MEMORY_BASE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	leaq	-44(%rbp), %rdx
	movq	%r15, %rdi
	callq	_pci_read_config_word
	movq	_PCI_PREF_MEMORY_LIMIT@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	leaq	-60(%rbp), %rdx
	movq	%r15, %rdi
	callq	_pci_read_config_word
	movl	-44(%rbp), %eax
	movq	_PCI_PREF_RANGE_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ebx
	movl	%ebx, %r12d
	andl	%eax, %r12d
	andl	-60(%rbp), %ebx
	shll	$16, %r12d
	movq	_PCI_PREF_RANGE_TYPE_MASK@GOTPCREL(%rip), %r13
	andl	(%r13), %eax
	shll	$16, %ebx
	movq	_PCI_PREF_RANGE_TYPE_64@GOTPCREL(%rip), %rdx
	cmpl	(%rdx), %eax
	jne	LBB0_2
## %bb.1:
	movq	_PCI_PREF_BASE_UPPER32@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	leaq	-56(%rbp), %rdx
	movq	%r15, %rdi
	callq	_pci_read_config_dword
	movq	_PCI_PREF_LIMIT_UPPER32@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	leaq	-72(%rbp), %rdx
	movq	%r15, %rdi
	callq	_pci_read_config_dword
	movq	_PCI_PREF_RANGE_TYPE_64@GOTPCREL(%rip), %rdx
LBB0_2:
	cmpl	%ebx, %r12d
	jg	LBB0_6
## %bb.3:
	movl	(%r13), %eax
	andl	-44(%rbp), %eax
	movq	_IORESOURCE_MEM@GOTPCREL(%rip), %rcx
	orl	(%rcx), %eax
	movq	_IORESOURCE_PREFETCH@GOTPCREL(%rip), %rcx
	orl	(%rcx), %eax
	movl	%eax, (%r14)
	testl	%eax, (%rdx)
	je	LBB0_5
## %bb.4:
	movq	_IORESOURCE_MEM_64@GOTPCREL(%rip), %rcx
	orl	(%rcx), %eax
	movl	%eax, (%r14)
LBB0_5:
	movl	%r12d, -56(%rbp)
	addl	$1048575, %ebx                  ## imm = 0xFFFFF
	movl	%ebx, -52(%rbp)
	movl	(%r15), %edi
	leaq	-56(%rbp), %rdx
	movq	%r14, %rsi
	callq	_pcibios_bus_to_resource
	leaq	L_.str.1(%rip), %rsi
	movq	%r15, %rdi
	movq	%r14, %rdx
	callq	_pci_info
LBB0_6:
	addq	$40, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_PCI_PREF_MEMORY_BASE,4,2       ## @PCI_PREF_MEMORY_BASE
	.comm	_PCI_PREF_MEMORY_LIMIT,4,2      ## @PCI_PREF_MEMORY_LIMIT
	.comm	_PCI_PREF_RANGE_MASK,4,2        ## @PCI_PREF_RANGE_MASK
	.comm	_PCI_PREF_RANGE_TYPE_MASK,4,2   ## @PCI_PREF_RANGE_TYPE_MASK
	.comm	_PCI_PREF_RANGE_TYPE_64,4,2     ## @PCI_PREF_RANGE_TYPE_64
	.comm	_PCI_PREF_BASE_UPPER32,4,2      ## @PCI_PREF_BASE_UPPER32
	.comm	_PCI_PREF_LIMIT_UPPER32,4,2     ## @PCI_PREF_LIMIT_UPPER32
	.comm	_IORESOURCE_MEM,4,2             ## @IORESOURCE_MEM
	.comm	_IORESOURCE_PREFETCH,4,2        ## @IORESOURCE_PREFETCH
	.comm	_IORESOURCE_MEM_64,4,2          ## @IORESOURCE_MEM_64
	.section	__TEXT,__cstring,cstring_literals
L_.str.1:                               ## @.str.1
	.asciz	"  bridge window %pR\n"

	.no_dead_strip	_pci_read_bridge_mmio_pref
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function pci_read_bridge_mmio_pref
_pci_read_bridge_mmio_pref:             ; @pci_read_bridge_mmio_pref
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #96
	.cfi_def_cfa_offset 96
	stp	x24, x23, [sp, #32]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #48]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #64]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #80]             ; 16-byte Folded Spill
	add	x29, sp, #80
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	ldp	x8, x19, [x0]
	ldr	x20, [x8, #16]
Lloh0:
	adrp	x8, _PCI_PREF_MEMORY_BASE@GOTPAGE
Lloh1:
	ldr	x8, [x8, _PCI_PREF_MEMORY_BASE@GOTPAGEOFF]
Lloh2:
	ldr	w1, [x8]
	add	x2, sp, #28
	mov	x0, x19
	bl	_pci_read_config_word
Lloh3:
	adrp	x8, _PCI_PREF_MEMORY_LIMIT@GOTPAGE
Lloh4:
	ldr	x8, [x8, _PCI_PREF_MEMORY_LIMIT@GOTPAGEOFF]
Lloh5:
	ldr	w1, [x8]
	add	x2, sp, #24
	mov	x0, x19
	bl	_pci_read_config_word
	ldr	w8, [sp, #28]
Lloh6:
	adrp	x9, _PCI_PREF_RANGE_MASK@GOTPAGE
Lloh7:
	ldr	x9, [x9, _PCI_PREF_RANGE_MASK@GOTPAGEOFF]
Lloh8:
	ldr	w9, [x9]
	and	w10, w9, w8
	lsl	w21, w10, #16
	ldr	w10, [sp, #24]
	and	w9, w10, w9
	lsl	w22, w9, #16
Lloh9:
	adrp	x24, _PCI_PREF_RANGE_TYPE_MASK@GOTPAGE
Lloh10:
	ldr	x24, [x24, _PCI_PREF_RANGE_TYPE_MASK@GOTPAGEOFF]
	ldr	w9, [x24]
	and	w8, w9, w8
Lloh11:
	adrp	x23, _PCI_PREF_RANGE_TYPE_64@GOTPAGE
Lloh12:
	ldr	x23, [x23, _PCI_PREF_RANGE_TYPE_64@GOTPAGEOFF]
	ldr	w9, [x23]
	cmp	w8, w9
	b.ne	LBB0_2
; %bb.1:
Lloh13:
	adrp	x8, _PCI_PREF_BASE_UPPER32@GOTPAGE
Lloh14:
	ldr	x8, [x8, _PCI_PREF_BASE_UPPER32@GOTPAGEOFF]
Lloh15:
	ldr	w1, [x8]
	add	x2, sp, #16
	mov	x0, x19
	bl	_pci_read_config_dword
Lloh16:
	adrp	x8, _PCI_PREF_LIMIT_UPPER32@GOTPAGE
Lloh17:
	ldr	x8, [x8, _PCI_PREF_LIMIT_UPPER32@GOTPAGEOFF]
Lloh18:
	ldr	w1, [x8]
	add	x2, sp, #8
	mov	x0, x19
	bl	_pci_read_config_dword
LBB0_2:
	cmp	w21, w22
	b.gt	LBB0_6
; %bb.3:
	ldr	w8, [sp, #28]
	ldr	w9, [x24]
	and	w8, w9, w8
Lloh19:
	adrp	x9, _IORESOURCE_MEM@GOTPAGE
Lloh20:
	ldr	x9, [x9, _IORESOURCE_MEM@GOTPAGEOFF]
Lloh21:
	ldr	w9, [x9]
Lloh22:
	adrp	x10, _IORESOURCE_PREFETCH@GOTPAGE
Lloh23:
	ldr	x10, [x10, _IORESOURCE_PREFETCH@GOTPAGEOFF]
	orr	w8, w8, w9
Lloh24:
	ldr	w9, [x10]
	orr	w8, w8, w9
	str	w8, [x20]
	ldr	w9, [x23]
	tst	w9, w8
	b.eq	LBB0_5
; %bb.4:
Lloh25:
	adrp	x9, _IORESOURCE_MEM_64@GOTPAGE
Lloh26:
	ldr	x9, [x9, _IORESOURCE_MEM_64@GOTPAGEOFF]
Lloh27:
	ldr	w9, [x9]
	orr	w8, w9, w8
	str	w8, [x20]
LBB0_5:
	mov	w8, #1048575
	add	w8, w22, w8
	stp	w21, w8, [sp, #16]
	ldr	w0, [x19]
	add	x2, sp, #16
	mov	x1, x20
	bl	_pcibios_bus_to_resource
Lloh28:
	adrp	x1, l_.str.1@PAGE
Lloh29:
	add	x1, x1, l_.str.1@PAGEOFF
	mov	x0, x19
	mov	x2, x20
	bl	_pci_info
LBB0_6:
	ldp	x29, x30, [sp, #80]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #64]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #48]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #32]             ; 16-byte Folded Reload
	add	sp, sp, #96
	ret
	.loh AdrpLdrGot	Lloh11, Lloh12
	.loh AdrpLdrGot	Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh16, Lloh17, Lloh18
	.loh AdrpLdrGotLdr	Lloh13, Lloh14, Lloh15
	.loh AdrpLdrGotLdr	Lloh22, Lloh23, Lloh24
	.loh AdrpLdrGotLdr	Lloh19, Lloh20, Lloh21
	.loh AdrpLdrGotLdr	Lloh25, Lloh26, Lloh27
	.loh AdrpAdd	Lloh28, Lloh29
	.cfi_endproc
                                        ; -- End function
	.comm	_PCI_PREF_MEMORY_BASE,4,2       ; @PCI_PREF_MEMORY_BASE
	.comm	_PCI_PREF_MEMORY_LIMIT,4,2      ; @PCI_PREF_MEMORY_LIMIT
	.comm	_PCI_PREF_RANGE_MASK,4,2        ; @PCI_PREF_RANGE_MASK
	.comm	_PCI_PREF_RANGE_TYPE_MASK,4,2   ; @PCI_PREF_RANGE_TYPE_MASK
	.comm	_PCI_PREF_RANGE_TYPE_64,4,2     ; @PCI_PREF_RANGE_TYPE_64
	.comm	_PCI_PREF_BASE_UPPER32,4,2      ; @PCI_PREF_BASE_UPPER32
	.comm	_PCI_PREF_LIMIT_UPPER32,4,2     ; @PCI_PREF_LIMIT_UPPER32
	.comm	_IORESOURCE_MEM,4,2             ; @IORESOURCE_MEM
	.comm	_IORESOURCE_PREFETCH,4,2        ; @IORESOURCE_PREFETCH
	.comm	_IORESOURCE_MEM_64,4,2          ; @IORESOURCE_MEM_64
	.section	__TEXT,__cstring,cstring_literals
l_.str.1:                               ; @.str.1
	.asciz	"  bridge window %pR\n"

	.no_dead_strip	_pci_read_bridge_mmio_pref
.subsections_via_symbols
