	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_cw1200_indirect_read           ## -- Begin function cw1200_indirect_read
	.p2align	4, 0x90
_cw1200_indirect_read:                  ## @cw1200_indirect_read
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$24, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	$0, -44(%rbp)
	cmpq	$8192, %rcx                     ## imm = 0x2000
	jb	LBB0_2
## %bb.1:
	leaq	L_.str(%rip), %rdi
	callq	_pr_err
	movq	_EINVAL@GOTPCREL(%rip), %rax
	xorl	%ebx, %ebx
	subl	(%rax), %ebx
	jmp	LBB0_19
LBB0_2:
	movl	%r9d, %r13d
	movl	%r8d, %r12d
	movq	%rcx, %r15
	movl	%esi, %ebx
	movq	%rdi, %r14
	movq	%rdx, -56(%rbp)                 ## 8-byte Spill
	movq	8(%rdi), %rax
	movl	(%rdi), %edi
	callq	*8(%rax)
	movq	_ST90TDS_SRAM_BASE_ADDR_REG_ID@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	movl	%ebx, %edx
	callq	___cw1200_reg_write_32
	testl	%eax, %eax
	js	LBB0_3
## %bb.4:
	movq	_ST90TDS_CONFIG_REG_ID@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	leaq	-44(%rbp), %rdx
	movq	%r14, %rdi
	callq	___cw1200_reg_read_32
	testl	%eax, %eax
	js	LBB0_5
## %bb.6:
	movq	_ST90TDS_CONFIG_REG_ID@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	-44(%rbp), %edx
	orl	%r12d, %edx
	movq	%r14, %rdi
	callq	___cw1200_reg_write_32
	testl	%eax, %eax
	js	LBB0_20
## %bb.7:
	movl	%r13d, -48(%rbp)                ## 4-byte Spill
	xorl	%r13d, %r13d
	.p2align	4, 0x90
LBB0_8:                                 ## =>This Inner Loop Header: Depth=1
	movq	_ST90TDS_CONFIG_REG_ID@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	leaq	-44(%rbp), %rdx
	callq	___cw1200_reg_read_32
	movl	%eax, %ebx
	testl	%eax, %eax
	js	LBB0_9
## %bb.10:                              ##   in Loop: Header=BB0_8 Depth=1
	movl	-44(%rbp), %eax
	testl	%r12d, %eax
	je	LBB0_13
## %bb.11:                              ##   in Loop: Header=BB0_8 Depth=1
	movl	%r13d, %edi
	callq	_mdelay
	incl	%r13d
	cmpl	$20, %r13d
	jne	LBB0_8
## %bb.12:
	movl	-44(%rbp), %eax
LBB0_13:
	testl	%r12d, %eax
	je	LBB0_15
## %bb.14:
	leaq	L_.str.5(%rip), %rdi
	jmp	LBB0_17
LBB0_3:
	movl	%eax, %ebx
	leaq	L_.str.1(%rip), %rdi
	jmp	LBB0_17
LBB0_5:
	movl	%eax, %ebx
	leaq	L_.str.2(%rip), %rdi
	jmp	LBB0_17
LBB0_20:
	movl	%eax, %ebx
	leaq	L_.str.3(%rip), %rdi
	jmp	LBB0_17
LBB0_9:
	leaq	L_.str.4(%rip), %rdi
	jmp	LBB0_17
LBB0_15:
	movq	%r14, %rdi
	movl	-48(%rbp), %esi                 ## 4-byte Reload
	movq	-56(%rbp), %rdx                 ## 8-byte Reload
	movq	%r15, %rcx
	xorl	%r8d, %r8d
	callq	___cw1200_reg_read
	movl	%eax, %ebx
	testl	%eax, %eax
	jns	LBB0_18
## %bb.16:
	leaq	L_.str.6(%rip), %rdi
LBB0_17:
	callq	_pr_err
LBB0_18:
	movq	8(%r14), %rax
	movl	(%r14), %edi
	callq	*(%rax)
LBB0_19:
	movl	%ebx, %eax
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"Can't read more than 0xfff words.\n"

	.comm	_EINVAL,4,2                     ## @EINVAL
	.comm	_ST90TDS_SRAM_BASE_ADDR_REG_ID,4,2 ## @ST90TDS_SRAM_BASE_ADDR_REG_ID
L_.str.1:                               ## @.str.1
	.asciz	"Can't write address register.\n"

	.comm	_ST90TDS_CONFIG_REG_ID,4,2      ## @ST90TDS_CONFIG_REG_ID
L_.str.2:                               ## @.str.2
	.asciz	"Can't read config register.\n"

L_.str.3:                               ## @.str.3
	.asciz	"Can't write prefetch bit.\n"

L_.str.4:                               ## @.str.4
	.asciz	"Can't check prefetch bit.\n"

L_.str.5:                               ## @.str.5
	.asciz	"Prefetch bit is not cleared.\n"

L_.str.6:                               ## @.str.6
	.asciz	"Can't read data port.\n"

.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_cw1200_indirect_read           ; -- Begin function cw1200_indirect_read
	.p2align	2
_cw1200_indirect_read:                  ; @cw1200_indirect_read
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #96
	.cfi_def_cfa_offset 96
	stp	x26, x25, [sp, #16]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #32]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #48]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #64]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #80]             ; 16-byte Folded Spill
	add	x29, sp, #80
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	str	wzr, [sp, #12]
	cmp	x3, #2, lsl #12                 ; =8192
	b.lo	LBB0_2
; %bb.1:
Lloh0:
	adrp	x0, l_.str@PAGE
Lloh1:
	add	x0, x0, l_.str@PAGEOFF
	bl	_pr_err
Lloh2:
	adrp	x8, _EINVAL@GOTPAGE
Lloh3:
	ldr	x8, [x8, _EINVAL@GOTPAGEOFF]
Lloh4:
	ldr	w8, [x8]
	neg	w20, w8
	b	LBB0_20
LBB0_2:
	mov	x22, x5
	mov	x24, x4
	mov	x21, x3
	mov	x23, x2
	mov	x20, x1
	mov	x19, x0
	ldr	x8, [x0, #8]
	ldr	x8, [x8, #8]
	ldr	w0, [x0]
	blr	x8
Lloh5:
	adrp	x8, _ST90TDS_SRAM_BASE_ADDR_REG_ID@GOTPAGE
Lloh6:
	ldr	x8, [x8, _ST90TDS_SRAM_BASE_ADDR_REG_ID@GOTPAGEOFF]
Lloh7:
	ldr	w1, [x8]
	mov	x0, x19
	mov	x2, x20
	bl	___cw1200_reg_write_32
	tbnz	w0, #31, LBB0_12
; %bb.3:
Lloh8:
	adrp	x26, _ST90TDS_CONFIG_REG_ID@GOTPAGE
Lloh9:
	ldr	x26, [x26, _ST90TDS_CONFIG_REG_ID@GOTPAGEOFF]
	ldr	w1, [x26]
	add	x2, sp, #12
	mov	x0, x19
	bl	___cw1200_reg_read_32
	tbnz	w0, #31, LBB0_13
; %bb.4:
	ldr	w1, [x26]
	ldr	w8, [sp, #12]
	orr	w2, w8, w24
	mov	x0, x19
	bl	___cw1200_reg_write_32
	tbnz	w0, #31, LBB0_14
; %bb.5:
	mov	w25, #0
LBB0_6:                                 ; =>This Inner Loop Header: Depth=1
	ldr	w1, [x26]
	add	x2, sp, #12
	mov	x0, x19
	bl	___cw1200_reg_read_32
	mov	x20, x0
	tbnz	w0, #31, LBB0_15
; %bb.7:                                ;   in Loop: Header=BB0_6 Depth=1
	ldr	w8, [sp, #12]
	tst	w8, w24
	b.eq	LBB0_10
; %bb.8:                                ;   in Loop: Header=BB0_6 Depth=1
	mov	x0, x25
	bl	_mdelay
	add	w25, w25, #1
	cmp	w25, #20
	b.ne	LBB0_6
; %bb.9:
	ldr	w8, [sp, #12]
LBB0_10:
	tst	w8, w24
	b.eq	LBB0_16
; %bb.11:
Lloh10:
	adrp	x0, l_.str.5@PAGE
Lloh11:
	add	x0, x0, l_.str.5@PAGEOFF
	b	LBB0_18
LBB0_12:
	mov	x20, x0
Lloh12:
	adrp	x0, l_.str.1@PAGE
Lloh13:
	add	x0, x0, l_.str.1@PAGEOFF
	b	LBB0_18
LBB0_13:
	mov	x20, x0
Lloh14:
	adrp	x0, l_.str.2@PAGE
Lloh15:
	add	x0, x0, l_.str.2@PAGEOFF
	b	LBB0_18
LBB0_14:
	mov	x20, x0
Lloh16:
	adrp	x0, l_.str.3@PAGE
Lloh17:
	add	x0, x0, l_.str.3@PAGEOFF
	b	LBB0_18
LBB0_15:
Lloh18:
	adrp	x0, l_.str.4@PAGE
Lloh19:
	add	x0, x0, l_.str.4@PAGEOFF
	b	LBB0_18
LBB0_16:
	mov	x0, x19
	mov	x1, x22
	mov	x2, x23
	mov	x3, x21
	mov	w4, #0
	bl	___cw1200_reg_read
	mov	x20, x0
	tbz	w0, #31, LBB0_19
; %bb.17:
Lloh20:
	adrp	x0, l_.str.6@PAGE
Lloh21:
	add	x0, x0, l_.str.6@PAGEOFF
LBB0_18:
	bl	_pr_err
LBB0_19:
	ldr	x8, [x19, #8]
	ldr	x8, [x8]
	ldr	w0, [x19]
	blr	x8
LBB0_20:
	mov	x0, x20
	ldp	x29, x30, [sp, #80]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #64]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #48]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #32]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #96
	ret
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpAdd	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGot	Lloh8, Lloh9
	.loh AdrpAdd	Lloh10, Lloh11
	.loh AdrpAdd	Lloh12, Lloh13
	.loh AdrpAdd	Lloh14, Lloh15
	.loh AdrpAdd	Lloh16, Lloh17
	.loh AdrpAdd	Lloh18, Lloh19
	.loh AdrpAdd	Lloh20, Lloh21
	.cfi_endproc
                                        ; -- End function
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"Can't read more than 0xfff words.\n"

	.comm	_EINVAL,4,2                     ; @EINVAL
	.comm	_ST90TDS_SRAM_BASE_ADDR_REG_ID,4,2 ; @ST90TDS_SRAM_BASE_ADDR_REG_ID
l_.str.1:                               ; @.str.1
	.asciz	"Can't write address register.\n"

	.comm	_ST90TDS_CONFIG_REG_ID,4,2      ; @ST90TDS_CONFIG_REG_ID
l_.str.2:                               ; @.str.2
	.asciz	"Can't read config register.\n"

l_.str.3:                               ; @.str.3
	.asciz	"Can't write prefetch bit.\n"

l_.str.4:                               ; @.str.4
	.asciz	"Can't check prefetch bit.\n"

l_.str.5:                               ; @.str.5
	.asciz	"Prefetch bit is not cleared.\n"

l_.str.6:                               ; @.str.6
	.asciz	"Can't read data port.\n"

.subsections_via_symbols
