	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function wil_tx_desc_offload_setup_tso_edma
_wil_tx_desc_offload_setup_tso_edma:    ## @wil_tx_desc_offload_setup_tso_edma
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%r8d, -44(%rbp)                 ## 4-byte Spill
	movl	%ecx, %ebx
	movl	%edx, %r14d
	movl	%esi, %r12d
	movq	%rdi, %r13
	movq	24(%rdi), %rax
	orl	$1, 8(%rax)
	sarl	$2, %r9d
	movl	%r9d, %edi
	callq	_cpu_to_le16
	orl	%eax, 32(%r13)
	movq	_DMA_CFG_DESC_TX_0_L4_LENGTH_MSK@GOTPCREL(%rip), %rax
	andl	(%rax), %ebx
	orl	%ebx, (%r13)
	movq	_WIL_EDMA_DESC_TX_CFG_EOP_POS@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_BIT
	movq	_WIL_EDMA_DESC_TX_CFG_TSO_DESC_TYPE_POS@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shll	%cl, %r12d
	movl	%eax, %ebx
	movq	_WIL_EDMA_DESC_TX_CFG_SEG_EN_POS@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_BIT
	movl	%eax, %r15d
	orl	%ebx, %r15d
	movq	_WIL_EDMA_DESC_TX_CFG_INSERT_IP_CHKSUM_POS@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_BIT
	movl	%eax, %ebx
	orl	%r15d, %ebx
	orl	%r12d, %ebx
	movq	_WIL_EDMA_DESC_TX_CFG_INSERT_TCP_CHKSUM_POS@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_BIT
	orl	%ebx, %eax
	orl	%eax, 4(%r13)
	movq	_WIL_EDMA_DESC_TX_CFG_PSEUDO_HEADER_CALC_EN_POS@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_BIT
	movl	%eax, %ebx
	movq	_WIL_EDMA_DESC_TX_CFG_L4_TYPE_POS@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_BIT
	orl	%ebx, %eax
	orl	%eax, 8(%r13)
	movl	-44(%rbp), %eax                 ## 4-byte Reload
	orl	%eax, 12(%r13)
	movq	_DMA_CFG_DESC_TX_OFFLOAD_CFG_L3T_IPV4_POS@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	shll	%cl, %r14d
	movq	_ETH_HLEN@GOTPCREL(%rip), %rax
	orl	(%rax), %r14d
	orl	%r14d, 16(%r13)
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_DMA_CFG_DESC_TX_0_L4_LENGTH_MSK,4,2 ## @DMA_CFG_DESC_TX_0_L4_LENGTH_MSK
	.comm	_WIL_EDMA_DESC_TX_CFG_EOP_POS,4,2 ## @WIL_EDMA_DESC_TX_CFG_EOP_POS
	.comm	_WIL_EDMA_DESC_TX_CFG_TSO_DESC_TYPE_POS,4,2 ## @WIL_EDMA_DESC_TX_CFG_TSO_DESC_TYPE_POS
	.comm	_WIL_EDMA_DESC_TX_CFG_SEG_EN_POS,4,2 ## @WIL_EDMA_DESC_TX_CFG_SEG_EN_POS
	.comm	_WIL_EDMA_DESC_TX_CFG_INSERT_IP_CHKSUM_POS,4,2 ## @WIL_EDMA_DESC_TX_CFG_INSERT_IP_CHKSUM_POS
	.comm	_WIL_EDMA_DESC_TX_CFG_INSERT_TCP_CHKSUM_POS,4,2 ## @WIL_EDMA_DESC_TX_CFG_INSERT_TCP_CHKSUM_POS
	.comm	_WIL_EDMA_DESC_TX_CFG_PSEUDO_HEADER_CALC_EN_POS,4,2 ## @WIL_EDMA_DESC_TX_CFG_PSEUDO_HEADER_CALC_EN_POS
	.comm	_WIL_EDMA_DESC_TX_CFG_L4_TYPE_POS,4,2 ## @WIL_EDMA_DESC_TX_CFG_L4_TYPE_POS
	.comm	_ETH_HLEN,4,2                   ## @ETH_HLEN
	.comm	_DMA_CFG_DESC_TX_OFFLOAD_CFG_L3T_IPV4_POS,4,2 ## @DMA_CFG_DESC_TX_OFFLOAD_CFG_L3T_IPV4_POS
	.no_dead_strip	_wil_tx_desc_offload_setup_tso_edma
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function wil_tx_desc_offload_setup_tso_edma
_wil_tx_desc_offload_setup_tso_edma:    ; @wil_tx_desc_offload_setup_tso_edma
	.cfi_startproc
; %bb.0:
	stp	x24, x23, [sp, #-64]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x21, x4
	mov	x22, x3
	mov	x20, x2
	mov	x23, x1
	mov	x19, x0
	ldr	x8, [x0, #24]
	ldr	w9, [x8, #8]
	orr	w9, w9, #0x1
	str	w9, [x8, #8]
	asr	w0, w5, #2
	bl	_cpu_to_le16
	ldr	w8, [x19, #32]
	orr	w8, w8, w0
	str	w8, [x19, #32]
Lloh0:
	adrp	x8, _DMA_CFG_DESC_TX_0_L4_LENGTH_MSK@GOTPAGE
Lloh1:
	ldr	x8, [x8, _DMA_CFG_DESC_TX_0_L4_LENGTH_MSK@GOTPAGEOFF]
Lloh2:
	ldr	w8, [x8]
	and	w8, w8, w22
	ldr	w9, [x19]
	orr	w8, w9, w8
	str	w8, [x19]
Lloh3:
	adrp	x8, _WIL_EDMA_DESC_TX_CFG_EOP_POS@GOTPAGE
Lloh4:
	ldr	x8, [x8, _WIL_EDMA_DESC_TX_CFG_EOP_POS@GOTPAGEOFF]
Lloh5:
	ldr	w0, [x8]
	bl	_BIT
Lloh6:
	adrp	x8, _WIL_EDMA_DESC_TX_CFG_TSO_DESC_TYPE_POS@GOTPAGE
Lloh7:
	ldr	x8, [x8, _WIL_EDMA_DESC_TX_CFG_TSO_DESC_TYPE_POS@GOTPAGEOFF]
Lloh8:
	ldr	w8, [x8]
	lsl	w8, w23, w8
	orr	w22, w8, w0
Lloh9:
	adrp	x8, _WIL_EDMA_DESC_TX_CFG_SEG_EN_POS@GOTPAGE
Lloh10:
	ldr	x8, [x8, _WIL_EDMA_DESC_TX_CFG_SEG_EN_POS@GOTPAGEOFF]
Lloh11:
	ldr	w0, [x8]
	bl	_BIT
	orr	w22, w22, w0
Lloh12:
	adrp	x8, _WIL_EDMA_DESC_TX_CFG_INSERT_IP_CHKSUM_POS@GOTPAGE
Lloh13:
	ldr	x8, [x8, _WIL_EDMA_DESC_TX_CFG_INSERT_IP_CHKSUM_POS@GOTPAGEOFF]
Lloh14:
	ldr	w0, [x8]
	bl	_BIT
	orr	w22, w22, w0
Lloh15:
	adrp	x8, _WIL_EDMA_DESC_TX_CFG_INSERT_TCP_CHKSUM_POS@GOTPAGE
Lloh16:
	ldr	x8, [x8, _WIL_EDMA_DESC_TX_CFG_INSERT_TCP_CHKSUM_POS@GOTPAGEOFF]
Lloh17:
	ldr	w0, [x8]
	bl	_BIT
	orr	w8, w22, w0
	ldr	w9, [x19, #4]
	orr	w8, w8, w9
	str	w8, [x19, #4]
Lloh18:
	adrp	x8, _WIL_EDMA_DESC_TX_CFG_PSEUDO_HEADER_CALC_EN_POS@GOTPAGE
Lloh19:
	ldr	x8, [x8, _WIL_EDMA_DESC_TX_CFG_PSEUDO_HEADER_CALC_EN_POS@GOTPAGEOFF]
Lloh20:
	ldr	w0, [x8]
	bl	_BIT
	mov	x22, x0
Lloh21:
	adrp	x8, _WIL_EDMA_DESC_TX_CFG_L4_TYPE_POS@GOTPAGE
Lloh22:
	ldr	x8, [x8, _WIL_EDMA_DESC_TX_CFG_L4_TYPE_POS@GOTPAGEOFF]
Lloh23:
	ldr	w0, [x8]
	bl	_BIT
	orr	w8, w0, w22
	ldp	w9, w10, [x19, #8]
	orr	w8, w8, w9
	orr	w9, w10, w21
	stp	w8, w9, [x19, #8]
Lloh24:
	adrp	x8, _ETH_HLEN@GOTPAGE
Lloh25:
	ldr	x8, [x8, _ETH_HLEN@GOTPAGEOFF]
Lloh26:
	ldr	w8, [x8]
Lloh27:
	adrp	x9, _DMA_CFG_DESC_TX_OFFLOAD_CFG_L3T_IPV4_POS@GOTPAGE
Lloh28:
	ldr	x9, [x9, _DMA_CFG_DESC_TX_OFFLOAD_CFG_L3T_IPV4_POS@GOTPAGEOFF]
Lloh29:
	ldr	w9, [x9]
	lsl	w9, w20, w9
	orr	w8, w9, w8
	ldr	w9, [x19, #16]
	orr	w8, w8, w9
	str	w8, [x19, #16]
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh27, Lloh28, Lloh29
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_DMA_CFG_DESC_TX_0_L4_LENGTH_MSK,4,2 ; @DMA_CFG_DESC_TX_0_L4_LENGTH_MSK
	.comm	_WIL_EDMA_DESC_TX_CFG_EOP_POS,4,2 ; @WIL_EDMA_DESC_TX_CFG_EOP_POS
	.comm	_WIL_EDMA_DESC_TX_CFG_TSO_DESC_TYPE_POS,4,2 ; @WIL_EDMA_DESC_TX_CFG_TSO_DESC_TYPE_POS
	.comm	_WIL_EDMA_DESC_TX_CFG_SEG_EN_POS,4,2 ; @WIL_EDMA_DESC_TX_CFG_SEG_EN_POS
	.comm	_WIL_EDMA_DESC_TX_CFG_INSERT_IP_CHKSUM_POS,4,2 ; @WIL_EDMA_DESC_TX_CFG_INSERT_IP_CHKSUM_POS
	.comm	_WIL_EDMA_DESC_TX_CFG_INSERT_TCP_CHKSUM_POS,4,2 ; @WIL_EDMA_DESC_TX_CFG_INSERT_TCP_CHKSUM_POS
	.comm	_WIL_EDMA_DESC_TX_CFG_PSEUDO_HEADER_CALC_EN_POS,4,2 ; @WIL_EDMA_DESC_TX_CFG_PSEUDO_HEADER_CALC_EN_POS
	.comm	_WIL_EDMA_DESC_TX_CFG_L4_TYPE_POS,4,2 ; @WIL_EDMA_DESC_TX_CFG_L4_TYPE_POS
	.comm	_ETH_HLEN,4,2                   ; @ETH_HLEN
	.comm	_DMA_CFG_DESC_TX_OFFLOAD_CFG_L3T_IPV4_POS,4,2 ; @DMA_CFG_DESC_TX_OFFLOAD_CFG_L3T_IPV4_POS
	.no_dead_strip	_wil_tx_desc_offload_setup_tso_edma
.subsections_via_symbols
