	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_mlx5_fpga_ipsec_device_caps    ## -- Begin function mlx5_fpga_ipsec_device_caps
	.p2align	4, 0x90
_mlx5_fpga_ipsec_device_caps:           ## @mlx5_fpga_ipsec_device_caps
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	(%rdi), %r14
	callq	_mlx5_fpga_is_ipsec_device
	testq	%rax, %rax
	je	LBB0_1
## %bb.2:
	movq	_MLX5_ACCEL_IPSEC_CAP_DEVICE@GOTPCREL(%rip), %rax
	movq	_MLX5_ACCEL_IPSEC_CAP_REQUIRED_METADATA@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ebx
	orl	(%rax), %ebx
	movq	(%r14), %rax
	testq	%rax, %rax
	je	LBB0_12
## %bb.3:
	movq	_ipsec_extended_cap@GOTPCREL(%rip), %r12
	movl	(%r12), %edi
	movl	(%rax), %esi
	movq	_esp@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	callq	_MLX5_GET
	movl	$0, %r15d
	testq	%rax, %rax
	je	LBB0_5
## %bb.4:
	movq	_MLX5_ACCEL_IPSEC_CAP_ESP@GOTPCREL(%rip), %rax
	movl	(%rax), %r15d
LBB0_5:
	movl	(%r12), %edi
	movq	(%r14), %rax
	movl	(%rax), %esi
	movq	_ipv6@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	callq	_MLX5_GET
	movl	$0, %r13d
	testq	%rax, %rax
	je	LBB0_7
## %bb.6:
	movq	_MLX5_ACCEL_IPSEC_CAP_IPV6@GOTPCREL(%rip), %rax
	movl	(%rax), %r13d
LBB0_7:
	orl	%ebx, %r15d
	movl	(%r12), %edi
	movq	(%r14), %rax
	movl	(%rax), %esi
	movq	_lso@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	callq	_MLX5_GET
	movl	$0, %ecx
	testq	%rax, %rax
	je	LBB0_9
## %bb.8:
	movq	_MLX5_ACCEL_IPSEC_CAP_LSO@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
LBB0_9:
	orl	%ecx, %r13d
	orl	%r13d, %r15d
	movl	(%r12), %edi
	movq	(%r14), %rax
	movl	(%rax), %esi
	movq	_rx_no_trailer@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	callq	_MLX5_GET
	testq	%rax, %rax
	movl	$0, %eax
	je	LBB0_11
## %bb.10:
	movq	_MLX5_ACCEL_IPSEC_CAP_RX_NO_TRAILER@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
LBB0_11:
	orl	%eax, %r15d
	movl	(%r12), %edi
	movq	(%r14), %rax
	movl	(%rax), %esi
	movq	_esn@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	callq	_MLX5_GET
	movq	_MLX5_ACCEL_IPSEC_CAP_ESN@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ebx
	orl	%r15d, %ebx
	movq	_MLX5_ACCEL_IPSEC_CAP_TX_IV_IS_ESN@GOTPCREL(%rip), %rcx
	orl	(%rcx), %ebx
	testq	%rax, %rax
	cmovel	%r15d, %ebx
	jmp	LBB0_12
LBB0_1:
	xorl	%ebx, %ebx
LBB0_12:
	movl	%ebx, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_MLX5_ACCEL_IPSEC_CAP_DEVICE,4,2 ## @MLX5_ACCEL_IPSEC_CAP_DEVICE
	.comm	_MLX5_ACCEL_IPSEC_CAP_REQUIRED_METADATA,4,2 ## @MLX5_ACCEL_IPSEC_CAP_REQUIRED_METADATA
	.comm	_ipsec_extended_cap,4,2         ## @ipsec_extended_cap
	.comm	_esp,4,2                        ## @esp
	.comm	_MLX5_ACCEL_IPSEC_CAP_ESP,4,2   ## @MLX5_ACCEL_IPSEC_CAP_ESP
	.comm	_ipv6,4,2                       ## @ipv6
	.comm	_MLX5_ACCEL_IPSEC_CAP_IPV6,4,2  ## @MLX5_ACCEL_IPSEC_CAP_IPV6
	.comm	_lso,4,2                        ## @lso
	.comm	_MLX5_ACCEL_IPSEC_CAP_LSO,4,2   ## @MLX5_ACCEL_IPSEC_CAP_LSO
	.comm	_rx_no_trailer,4,2              ## @rx_no_trailer
	.comm	_MLX5_ACCEL_IPSEC_CAP_RX_NO_TRAILER,4,2 ## @MLX5_ACCEL_IPSEC_CAP_RX_NO_TRAILER
	.comm	_esn,4,2                        ## @esn
	.comm	_MLX5_ACCEL_IPSEC_CAP_ESN,4,2   ## @MLX5_ACCEL_IPSEC_CAP_ESN
	.comm	_MLX5_ACCEL_IPSEC_CAP_TX_IV_IS_ESN,4,2 ## @MLX5_ACCEL_IPSEC_CAP_TX_IV_IS_ESN
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_mlx5_fpga_ipsec_device_caps    ; -- Begin function mlx5_fpga_ipsec_device_caps
	.p2align	2
_mlx5_fpga_ipsec_device_caps:           ; @mlx5_fpga_ipsec_device_caps
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	ldr	x20, [x0]
	bl	_mlx5_fpga_is_ipsec_device
	cbz	x0, LBB0_3
; %bb.1:
Lloh0:
	adrp	x8, _MLX5_ACCEL_IPSEC_CAP_DEVICE@GOTPAGE
Lloh1:
	ldr	x8, [x8, _MLX5_ACCEL_IPSEC_CAP_DEVICE@GOTPAGEOFF]
Lloh2:
	ldr	w8, [x8]
Lloh3:
	adrp	x9, _MLX5_ACCEL_IPSEC_CAP_REQUIRED_METADATA@GOTPAGE
Lloh4:
	ldr	x9, [x9, _MLX5_ACCEL_IPSEC_CAP_REQUIRED_METADATA@GOTPAGEOFF]
Lloh5:
	ldr	w9, [x9]
	orr	w19, w9, w8
	ldr	x8, [x20]
	cbz	x8, LBB0_4
; %bb.2:
Lloh6:
	adrp	x21, _ipsec_extended_cap@GOTPAGE
Lloh7:
	ldr	x21, [x21, _ipsec_extended_cap@GOTPAGEOFF]
	ldr	w0, [x21]
	ldr	w1, [x8]
Lloh8:
	adrp	x8, _esp@GOTPAGE
Lloh9:
	ldr	x8, [x8, _esp@GOTPAGEOFF]
Lloh10:
	ldr	w2, [x8]
	bl	_MLX5_GET
Lloh11:
	adrp	x8, _MLX5_ACCEL_IPSEC_CAP_ESP@GOTPAGE
Lloh12:
	ldr	x8, [x8, _MLX5_ACCEL_IPSEC_CAP_ESP@GOTPAGEOFF]
Lloh13:
	ldr	w8, [x8]
	cmp	x0, #0
	csel	w8, wzr, w8, eq
	orr	w19, w8, w19
	ldr	w0, [x21]
	ldr	x8, [x20]
	ldr	w1, [x8]
Lloh14:
	adrp	x8, _ipv6@GOTPAGE
Lloh15:
	ldr	x8, [x8, _ipv6@GOTPAGEOFF]
Lloh16:
	ldr	w2, [x8]
	bl	_MLX5_GET
Lloh17:
	adrp	x8, _MLX5_ACCEL_IPSEC_CAP_IPV6@GOTPAGE
Lloh18:
	ldr	x8, [x8, _MLX5_ACCEL_IPSEC_CAP_IPV6@GOTPAGEOFF]
Lloh19:
	ldr	w8, [x8]
	cmp	x0, #0
	csel	w8, wzr, w8, eq
	orr	w19, w19, w8
	ldr	w0, [x21]
	ldr	x8, [x20]
	ldr	w1, [x8]
Lloh20:
	adrp	x8, _lso@GOTPAGE
Lloh21:
	ldr	x8, [x8, _lso@GOTPAGEOFF]
Lloh22:
	ldr	w2, [x8]
	bl	_MLX5_GET
Lloh23:
	adrp	x8, _MLX5_ACCEL_IPSEC_CAP_LSO@GOTPAGE
Lloh24:
	ldr	x8, [x8, _MLX5_ACCEL_IPSEC_CAP_LSO@GOTPAGEOFF]
Lloh25:
	ldr	w8, [x8]
	cmp	x0, #0
	csel	w8, wzr, w8, eq
	orr	w19, w19, w8
	ldr	w0, [x21]
	ldr	x8, [x20]
	ldr	w1, [x8]
Lloh26:
	adrp	x8, _rx_no_trailer@GOTPAGE
Lloh27:
	ldr	x8, [x8, _rx_no_trailer@GOTPAGEOFF]
Lloh28:
	ldr	w2, [x8]
	bl	_MLX5_GET
Lloh29:
	adrp	x8, _MLX5_ACCEL_IPSEC_CAP_RX_NO_TRAILER@GOTPAGE
Lloh30:
	ldr	x8, [x8, _MLX5_ACCEL_IPSEC_CAP_RX_NO_TRAILER@GOTPAGEOFF]
Lloh31:
	ldr	w8, [x8]
	cmp	x0, #0
	csel	w8, wzr, w8, eq
	orr	w19, w19, w8
	ldr	w0, [x21]
	ldr	x8, [x20]
	ldr	w1, [x8]
Lloh32:
	adrp	x8, _esn@GOTPAGE
Lloh33:
	ldr	x8, [x8, _esn@GOTPAGEOFF]
Lloh34:
	ldr	w2, [x8]
	bl	_MLX5_GET
Lloh35:
	adrp	x8, _MLX5_ACCEL_IPSEC_CAP_ESN@GOTPAGE
Lloh36:
	ldr	x8, [x8, _MLX5_ACCEL_IPSEC_CAP_ESN@GOTPAGEOFF]
Lloh37:
	ldr	w8, [x8]
	orr	w8, w8, w19
Lloh38:
	adrp	x9, _MLX5_ACCEL_IPSEC_CAP_TX_IV_IS_ESN@GOTPAGE
Lloh39:
	ldr	x9, [x9, _MLX5_ACCEL_IPSEC_CAP_TX_IV_IS_ESN@GOTPAGEOFF]
Lloh40:
	ldr	w9, [x9]
	orr	w8, w8, w9
	cmp	x0, #0
	csel	w19, w19, w8, eq
	b	LBB0_4
LBB0_3:
	mov	w19, #0
LBB0_4:
	mov	x0, x19
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh38, Lloh39, Lloh40
	.loh AdrpLdrGotLdr	Lloh35, Lloh36, Lloh37
	.loh AdrpLdrGotLdr	Lloh32, Lloh33, Lloh34
	.loh AdrpLdrGotLdr	Lloh29, Lloh30, Lloh31
	.loh AdrpLdrGotLdr	Lloh26, Lloh27, Lloh28
	.loh AdrpLdrGotLdr	Lloh23, Lloh24, Lloh25
	.loh AdrpLdrGotLdr	Lloh20, Lloh21, Lloh22
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh19
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh16
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGot	Lloh6, Lloh7
	.cfi_endproc
                                        ; -- End function
	.comm	_MLX5_ACCEL_IPSEC_CAP_DEVICE,4,2 ; @MLX5_ACCEL_IPSEC_CAP_DEVICE
	.comm	_MLX5_ACCEL_IPSEC_CAP_REQUIRED_METADATA,4,2 ; @MLX5_ACCEL_IPSEC_CAP_REQUIRED_METADATA
	.comm	_ipsec_extended_cap,4,2         ; @ipsec_extended_cap
	.comm	_esp,4,2                        ; @esp
	.comm	_MLX5_ACCEL_IPSEC_CAP_ESP,4,2   ; @MLX5_ACCEL_IPSEC_CAP_ESP
	.comm	_ipv6,4,2                       ; @ipv6
	.comm	_MLX5_ACCEL_IPSEC_CAP_IPV6,4,2  ; @MLX5_ACCEL_IPSEC_CAP_IPV6
	.comm	_lso,4,2                        ; @lso
	.comm	_MLX5_ACCEL_IPSEC_CAP_LSO,4,2   ; @MLX5_ACCEL_IPSEC_CAP_LSO
	.comm	_rx_no_trailer,4,2              ; @rx_no_trailer
	.comm	_MLX5_ACCEL_IPSEC_CAP_RX_NO_TRAILER,4,2 ; @MLX5_ACCEL_IPSEC_CAP_RX_NO_TRAILER
	.comm	_esn,4,2                        ; @esn
	.comm	_MLX5_ACCEL_IPSEC_CAP_ESN,4,2   ; @MLX5_ACCEL_IPSEC_CAP_ESN
	.comm	_MLX5_ACCEL_IPSEC_CAP_TX_IV_IS_ESN,4,2 ; @MLX5_ACCEL_IPSEC_CAP_TX_IV_IS_ESN
.subsections_via_symbols
