	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function bcm7xxx_28nm_ephy_apd_enable
_bcm7xxx_28nm_ephy_apd_enable:          ## @bcm7xxx_28nm_ephy_apd_enable
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %rbx
	movq	_MII_BRCM_FET_BRCMTEST@GOTPCREL(%rip), %r14
	movl	(%r14), %esi
	movq	_MII_BRCM_FET_BT_SRE@GOTPCREL(%rip), %r15
	movl	(%r15), %edx
	xorl	%ecx, %ecx
	callq	_phy_set_clr_bits
	testl	%eax, %eax
	js	LBB0_3
## %bb.1:
	movq	_MII_BRCM_FET_SHDW_AUXSTAT2@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_MII_BRCM_FET_SHDW_AS2_APDE@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	xorl	%ecx, %ecx
	callq	_phy_set_clr_bits
	testl	%eax, %eax
	js	LBB0_3
## %bb.2:
	movl	(%r14), %esi
	movl	(%r15), %ecx
	movq	%rbx, %rdi
	xorl	%edx, %edx
	callq	_phy_set_clr_bits
	movl	%eax, %ecx
	sarl	$31, %ecx
	andl	%ecx, %eax
LBB0_3:
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_MII_BRCM_FET_BRCMTEST,4,2      ## @MII_BRCM_FET_BRCMTEST
	.comm	_MII_BRCM_FET_BT_SRE,4,2        ## @MII_BRCM_FET_BT_SRE
	.comm	_MII_BRCM_FET_SHDW_AUXSTAT2,4,2 ## @MII_BRCM_FET_SHDW_AUXSTAT2
	.comm	_MII_BRCM_FET_SHDW_AS2_APDE,4,2 ## @MII_BRCM_FET_SHDW_AS2_APDE
	.no_dead_strip	_bcm7xxx_28nm_ephy_apd_enable
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function bcm7xxx_28nm_ephy_apd_enable
_bcm7xxx_28nm_ephy_apd_enable:          ; @bcm7xxx_28nm_ephy_apd_enable
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x0
Lloh0:
	adrp	x20, _MII_BRCM_FET_BRCMTEST@GOTPAGE
Lloh1:
	ldr	x20, [x20, _MII_BRCM_FET_BRCMTEST@GOTPAGEOFF]
	ldr	w1, [x20]
Lloh2:
	adrp	x21, _MII_BRCM_FET_BT_SRE@GOTPAGE
Lloh3:
	ldr	x21, [x21, _MII_BRCM_FET_BT_SRE@GOTPAGEOFF]
	ldr	w2, [x21]
	mov	w3, #0
	bl	_phy_set_clr_bits
	tbnz	w0, #31, LBB0_3
; %bb.1:
Lloh4:
	adrp	x8, _MII_BRCM_FET_SHDW_AUXSTAT2@GOTPAGE
Lloh5:
	ldr	x8, [x8, _MII_BRCM_FET_SHDW_AUXSTAT2@GOTPAGEOFF]
Lloh6:
	ldr	w1, [x8]
Lloh7:
	adrp	x8, _MII_BRCM_FET_SHDW_AS2_APDE@GOTPAGE
Lloh8:
	ldr	x8, [x8, _MII_BRCM_FET_SHDW_AS2_APDE@GOTPAGEOFF]
Lloh9:
	ldr	w2, [x8]
	mov	x0, x19
	mov	w3, #0
	bl	_phy_set_clr_bits
	tbnz	w0, #31, LBB0_3
; %bb.2:
	ldr	w1, [x20]
	ldr	w3, [x21]
	mov	x0, x19
	mov	w2, #0
	bl	_phy_set_clr_bits
	cmp	w0, #0
	csel	w0, w0, wzr, lt
LBB0_3:
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh7, Lloh8, Lloh9
	.loh AdrpLdrGotLdr	Lloh4, Lloh5, Lloh6
	.cfi_endproc
                                        ; -- End function
	.comm	_MII_BRCM_FET_BRCMTEST,4,2      ; @MII_BRCM_FET_BRCMTEST
	.comm	_MII_BRCM_FET_BT_SRE,4,2        ; @MII_BRCM_FET_BT_SRE
	.comm	_MII_BRCM_FET_SHDW_AUXSTAT2,4,2 ; @MII_BRCM_FET_SHDW_AUXSTAT2
	.comm	_MII_BRCM_FET_SHDW_AS2_APDE,4,2 ; @MII_BRCM_FET_SHDW_AS2_APDE
	.no_dead_strip	_bcm7xxx_28nm_ephy_apd_enable
.subsections_via_symbols
