	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_i40e_force_wb                  ## -- Begin function i40e_force_wb
	.p2align	4, 0x90
_i40e_force_wb:                         ## @i40e_force_wb
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r14
	pushq	%rbx
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	movq	(%rdi), %r14
	movq	_I40E_FLAG_MSIX_ENABLED@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	testl	%eax, (%r14)
	je	LBB0_2
## %bb.1:
	movq	_I40E_PFINT_DYN_CTLN_INTENA_MASK@GOTPCREL(%rip), %rax
	movq	_I40E_PFINT_DYN_CTLN_ITR_INDX_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ebx
	orl	(%rax), %ebx
	movq	_I40E_PFINT_DYN_CTLN_SWINT_TRIG_MASK@GOTPCREL(%rip), %rax
	orl	(%rax), %ebx
	movq	_I40E_PFINT_DYN_CTLN_SW_ITR_INDX_ENA_MASK@GOTPCREL(%rip), %rax
	orl	(%rax), %ebx
	addq	$4, %r14
	movl	(%rsi), %edi
	callq	_I40E_PFINT_DYN_CTLN
	movq	%r14, %rdi
	movl	%eax, %esi
	movl	%ebx, %edx
	jmp	LBB0_3
LBB0_2:
	movq	_I40E_PFINT_DYN_CTL0_INTENA_MASK@GOTPCREL(%rip), %rax
	movq	_I40E_PFINT_DYN_CTL0_ITR_INDX_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	orl	(%rax), %edx
	movq	_I40E_PFINT_DYN_CTL0_SWINT_TRIG_MASK@GOTPCREL(%rip), %rax
	orl	(%rax), %edx
	movq	_I40E_PFINT_DYN_CTL0_SW_ITR_INDX_ENA_MASK@GOTPCREL(%rip), %rax
	orl	(%rax), %edx
	addq	$4, %r14
	movq	_I40E_PFINT_DYN_CTL0@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
LBB0_3:
	popq	%rbx
	popq	%r14
	popq	%rbp
	jmp	_wr32                           ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_I40E_FLAG_MSIX_ENABLED,4,2     ## @I40E_FLAG_MSIX_ENABLED
	.comm	_I40E_PFINT_DYN_CTLN_INTENA_MASK,4,2 ## @I40E_PFINT_DYN_CTLN_INTENA_MASK
	.comm	_I40E_PFINT_DYN_CTLN_ITR_INDX_MASK,4,2 ## @I40E_PFINT_DYN_CTLN_ITR_INDX_MASK
	.comm	_I40E_PFINT_DYN_CTLN_SWINT_TRIG_MASK,4,2 ## @I40E_PFINT_DYN_CTLN_SWINT_TRIG_MASK
	.comm	_I40E_PFINT_DYN_CTLN_SW_ITR_INDX_ENA_MASK,4,2 ## @I40E_PFINT_DYN_CTLN_SW_ITR_INDX_ENA_MASK
	.comm	_I40E_PFINT_DYN_CTL0_INTENA_MASK,4,2 ## @I40E_PFINT_DYN_CTL0_INTENA_MASK
	.comm	_I40E_PFINT_DYN_CTL0_ITR_INDX_MASK,4,2 ## @I40E_PFINT_DYN_CTL0_ITR_INDX_MASK
	.comm	_I40E_PFINT_DYN_CTL0_SWINT_TRIG_MASK,4,2 ## @I40E_PFINT_DYN_CTL0_SWINT_TRIG_MASK
	.comm	_I40E_PFINT_DYN_CTL0_SW_ITR_INDX_ENA_MASK,4,2 ## @I40E_PFINT_DYN_CTL0_SW_ITR_INDX_ENA_MASK
	.comm	_I40E_PFINT_DYN_CTL0,4,2        ## @I40E_PFINT_DYN_CTL0
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_i40e_force_wb                  ; -- Begin function i40e_force_wb
	.p2align	2
_i40e_force_wb:                         ; @i40e_force_wb
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	ldr	x8, [x0]
	ldr	w9, [x8]
Lloh0:
	adrp	x10, _I40E_FLAG_MSIX_ENABLED@GOTPAGE
Lloh1:
	ldr	x10, [x10, _I40E_FLAG_MSIX_ENABLED@GOTPAGEOFF]
Lloh2:
	ldr	w10, [x10]
	tst	w10, w9
	b.eq	LBB0_2
; %bb.1:
Lloh3:
	adrp	x9, _I40E_PFINT_DYN_CTLN_INTENA_MASK@GOTPAGE
Lloh4:
	ldr	x9, [x9, _I40E_PFINT_DYN_CTLN_INTENA_MASK@GOTPAGEOFF]
Lloh5:
	ldr	w9, [x9]
Lloh6:
	adrp	x10, _I40E_PFINT_DYN_CTLN_ITR_INDX_MASK@GOTPAGE
Lloh7:
	ldr	x10, [x10, _I40E_PFINT_DYN_CTLN_ITR_INDX_MASK@GOTPAGEOFF]
Lloh8:
	ldr	w10, [x10]
	orr	w9, w10, w9
Lloh9:
	adrp	x10, _I40E_PFINT_DYN_CTLN_SWINT_TRIG_MASK@GOTPAGE
Lloh10:
	ldr	x10, [x10, _I40E_PFINT_DYN_CTLN_SWINT_TRIG_MASK@GOTPAGEOFF]
Lloh11:
	ldr	w10, [x10]
	orr	w9, w9, w10
Lloh12:
	adrp	x10, _I40E_PFINT_DYN_CTLN_SW_ITR_INDX_ENA_MASK@GOTPAGE
Lloh13:
	ldr	x10, [x10, _I40E_PFINT_DYN_CTLN_SW_ITR_INDX_ENA_MASK@GOTPAGEOFF]
Lloh14:
	ldr	w10, [x10]
	orr	w19, w9, w10
	add	x20, x8, #4
	ldr	w0, [x1]
	bl	_I40E_PFINT_DYN_CTLN
	mov	x1, x0
	mov	x0, x20
	mov	x2, x19
	b	LBB0_3
LBB0_2:
Lloh15:
	adrp	x9, _I40E_PFINT_DYN_CTL0_INTENA_MASK@GOTPAGE
Lloh16:
	ldr	x9, [x9, _I40E_PFINT_DYN_CTL0_INTENA_MASK@GOTPAGEOFF]
Lloh17:
	adrp	x10, _I40E_PFINT_DYN_CTL0_ITR_INDX_MASK@GOTPAGE
Lloh18:
	ldr	x10, [x10, _I40E_PFINT_DYN_CTL0_ITR_INDX_MASK@GOTPAGEOFF]
Lloh19:
	ldr	w9, [x9]
Lloh20:
	ldr	w10, [x10]
	orr	w9, w10, w9
Lloh21:
	adrp	x10, _I40E_PFINT_DYN_CTL0_SWINT_TRIG_MASK@GOTPAGE
Lloh22:
	ldr	x10, [x10, _I40E_PFINT_DYN_CTL0_SWINT_TRIG_MASK@GOTPAGEOFF]
Lloh23:
	ldr	w10, [x10]
	orr	w9, w9, w10
Lloh24:
	adrp	x10, _I40E_PFINT_DYN_CTL0_SW_ITR_INDX_ENA_MASK@GOTPAGE
Lloh25:
	ldr	x10, [x10, _I40E_PFINT_DYN_CTL0_SW_ITR_INDX_ENA_MASK@GOTPAGEOFF]
Lloh26:
	ldr	w10, [x10]
	orr	w2, w9, w10
	add	x0, x8, #4
Lloh27:
	adrp	x8, _I40E_PFINT_DYN_CTL0@GOTPAGE
Lloh28:
	ldr	x8, [x8, _I40E_PFINT_DYN_CTL0@GOTPAGEOFF]
Lloh29:
	ldr	w1, [x8]
LBB0_3:
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	b	_wr32
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh27, Lloh28, Lloh29
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh20
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh19
	.cfi_endproc
                                        ; -- End function
	.comm	_I40E_FLAG_MSIX_ENABLED,4,2     ; @I40E_FLAG_MSIX_ENABLED
	.comm	_I40E_PFINT_DYN_CTLN_INTENA_MASK,4,2 ; @I40E_PFINT_DYN_CTLN_INTENA_MASK
	.comm	_I40E_PFINT_DYN_CTLN_ITR_INDX_MASK,4,2 ; @I40E_PFINT_DYN_CTLN_ITR_INDX_MASK
	.comm	_I40E_PFINT_DYN_CTLN_SWINT_TRIG_MASK,4,2 ; @I40E_PFINT_DYN_CTLN_SWINT_TRIG_MASK
	.comm	_I40E_PFINT_DYN_CTLN_SW_ITR_INDX_ENA_MASK,4,2 ; @I40E_PFINT_DYN_CTLN_SW_ITR_INDX_ENA_MASK
	.comm	_I40E_PFINT_DYN_CTL0_INTENA_MASK,4,2 ; @I40E_PFINT_DYN_CTL0_INTENA_MASK
	.comm	_I40E_PFINT_DYN_CTL0_ITR_INDX_MASK,4,2 ; @I40E_PFINT_DYN_CTL0_ITR_INDX_MASK
	.comm	_I40E_PFINT_DYN_CTL0_SWINT_TRIG_MASK,4,2 ; @I40E_PFINT_DYN_CTL0_SWINT_TRIG_MASK
	.comm	_I40E_PFINT_DYN_CTL0_SW_ITR_INDX_ENA_MASK,4,2 ; @I40E_PFINT_DYN_CTL0_SW_ITR_INDX_ENA_MASK
	.comm	_I40E_PFINT_DYN_CTL0,4,2        ; @I40E_PFINT_DYN_CTL0
.subsections_via_symbols
