	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function rockchip_pcie_wait_l2
_rockchip_pcie_wait_l2:                 ## @rockchip_pcie_wait_l2
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r14
	movq	_PCIE_RC_SEND_PME_OFF@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	addq	16(%rdi), %rsi
	xorl	%edi, %edi
	callq	_writel
	movq	_PCIE_CLIENT_DEBUG_OUT_0@GOTPCREL(%rip), %rax
	movq	(%rax), %rbx
	addq	8(%r14), %rbx
	callq	_PCIE_LINK_IS_L2
	movl	%eax, %r15d
	movq	_HZ@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	leal	(%rax,%rax,4), %edi
	callq	_jiffies_to_usecs
	movq	%rbx, %rdi
	movl	%r15d, %edx
	movl	$20, %ecx
	movl	%eax, %r8d
	callq	_readl_poll_timeout
	movl	%eax, %ebx
	testl	%eax, %eax
	je	LBB0_2
## %bb.1:
	movl	(%r14), %edi
	leaq	L_.str(%rip), %rsi
	callq	_dev_err
LBB0_2:
	movl	%ebx, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_PCIE_RC_SEND_PME_OFF,8,3       ## @PCIE_RC_SEND_PME_OFF
	.comm	_PCIE_CLIENT_DEBUG_OUT_0,8,3    ## @PCIE_CLIENT_DEBUG_OUT_0
	.comm	_HZ,4,2                         ## @HZ
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"PCIe link enter L2 timeout!\n"

	.no_dead_strip	_rockchip_pcie_wait_l2
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function rockchip_pcie_wait_l2
_rockchip_pcie_wait_l2:                 ; @rockchip_pcie_wait_l2
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x0
	ldr	x8, [x0, #16]
Lloh0:
	adrp	x9, _PCIE_RC_SEND_PME_OFF@GOTPAGE
Lloh1:
	ldr	x9, [x9, _PCIE_RC_SEND_PME_OFF@GOTPAGEOFF]
Lloh2:
	ldr	x9, [x9]
	add	x1, x9, x8
	mov	w0, #0
	bl	_writel
	ldr	x8, [x19, #8]
Lloh3:
	adrp	x9, _PCIE_CLIENT_DEBUG_OUT_0@GOTPAGE
Lloh4:
	ldr	x9, [x9, _PCIE_CLIENT_DEBUG_OUT_0@GOTPAGEOFF]
Lloh5:
	ldr	x9, [x9]
	add	x20, x9, x8
	bl	_PCIE_LINK_IS_L2
	mov	x21, x0
Lloh6:
	adrp	x8, _HZ@GOTPAGE
Lloh7:
	ldr	x8, [x8, _HZ@GOTPAGEOFF]
Lloh8:
	ldr	w8, [x8]
	add	w0, w8, w8, lsl #2
	bl	_jiffies_to_usecs
	mov	x4, x0
	mov	x0, x20
	mov	x2, x21
	mov	w3, #20
	bl	_readl_poll_timeout
	mov	x20, x0
	cbz	w0, LBB0_2
; %bb.1:
	ldr	w0, [x19]
Lloh9:
	adrp	x1, l_.str@PAGE
Lloh10:
	add	x1, x1, l_.str@PAGEOFF
	bl	_dev_err
LBB0_2:
	mov	x0, x20
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpAdd	Lloh9, Lloh10
	.cfi_endproc
                                        ; -- End function
	.comm	_PCIE_RC_SEND_PME_OFF,8,3       ; @PCIE_RC_SEND_PME_OFF
	.comm	_PCIE_CLIENT_DEBUG_OUT_0,8,3    ; @PCIE_CLIENT_DEBUG_OUT_0
	.comm	_HZ,4,2                         ; @HZ
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"PCIe link enter L2 timeout!\n"

	.no_dead_strip	_rockchip_pcie_wait_l2
.subsections_via_symbols
