	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function ath5k_hw_set_fast_div
_ath5k_hw_set_fast_div:                 ## @ath5k_hw_set_fast_div
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r14
	pushq	%rbx
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	movl	%edx, %ebx
	movq	%rdi, %r14
	cmpl	$130, %esi
	je	LBB0_3
## %bb.1:
	cmpl	$129, %esi
	je	LBB0_5
## %bb.2:
	cmpl	$128, %esi
	jne	LBB0_9
LBB0_3:
	movq	_AR5K_PHY_AGCCTL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_AR5K_PHY_AGCCTL_OFDM_DIV_DIS@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r14, %rdi
	testl	%ebx, %ebx
	je	LBB0_7
## %bb.4:
	callq	_AR5K_REG_DISABLE_BITS
	jmp	LBB0_6
LBB0_5:
	movq	_AR5K_PHY_AGCCTL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_AR5K_PHY_AGCCTL_OFDM_DIV_DIS@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r14, %rdi
	callq	_AR5K_REG_ENABLE_BITS
	testl	%ebx, %ebx
	je	LBB0_8
LBB0_6:
	movq	_AR5K_PHY_RESTART@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_AR5K_PHY_RESTART_DIV_GC@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r14, %rdi
	movl	$4, %ecx
	callq	_AR5K_REG_WRITE_BITS
	movq	_AR5K_PHY_FAST_ANT_DIV@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_AR5K_PHY_FAST_ANT_DIV_EN@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r14, %rdi
	popq	%rbx
	popq	%r14
	popq	%rbp
	jmp	_AR5K_REG_ENABLE_BITS           ## TAILCALL
LBB0_9:
	popq	%rbx
	popq	%r14
	popq	%rbp
	retq
LBB0_7:
	callq	_AR5K_REG_ENABLE_BITS
LBB0_8:
	movq	_AR5K_PHY_RESTART@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_AR5K_PHY_RESTART_DIV_GC@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r14, %rdi
	xorl	%ecx, %ecx
	callq	_AR5K_REG_WRITE_BITS
	movq	_AR5K_PHY_FAST_ANT_DIV@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_AR5K_PHY_FAST_ANT_DIV_EN@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r14, %rdi
	popq	%rbx
	popq	%r14
	popq	%rbp
	jmp	_AR5K_REG_DISABLE_BITS          ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_AR5K_PHY_AGCCTL,4,2            ## @AR5K_PHY_AGCCTL
	.comm	_AR5K_PHY_AGCCTL_OFDM_DIV_DIS,4,2 ## @AR5K_PHY_AGCCTL_OFDM_DIV_DIS
	.comm	_AR5K_PHY_RESTART,4,2           ## @AR5K_PHY_RESTART
	.comm	_AR5K_PHY_RESTART_DIV_GC,4,2    ## @AR5K_PHY_RESTART_DIV_GC
	.comm	_AR5K_PHY_FAST_ANT_DIV,4,2      ## @AR5K_PHY_FAST_ANT_DIV
	.comm	_AR5K_PHY_FAST_ANT_DIV_EN,4,2   ## @AR5K_PHY_FAST_ANT_DIV_EN
	.no_dead_strip	_ath5k_hw_set_fast_div
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function ath5k_hw_set_fast_div
_ath5k_hw_set_fast_div:                 ; @ath5k_hw_set_fast_div
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x20, x2
	mov	x19, x0
	cmp	w1, #130
	b.eq	LBB0_3
; %bb.1:
	cmp	w1, #129
	b.eq	LBB0_5
; %bb.2:
	cmp	w1, #128
	b.ne	LBB0_7
LBB0_3:
Lloh0:
	adrp	x8, _AR5K_PHY_AGCCTL@GOTPAGE
Lloh1:
	ldr	x8, [x8, _AR5K_PHY_AGCCTL@GOTPAGEOFF]
Lloh2:
	ldr	w1, [x8]
Lloh3:
	adrp	x8, _AR5K_PHY_AGCCTL_OFDM_DIV_DIS@GOTPAGE
Lloh4:
	ldr	x8, [x8, _AR5K_PHY_AGCCTL_OFDM_DIV_DIS@GOTPAGEOFF]
Lloh5:
	ldr	w2, [x8]
	mov	x0, x19
	cbz	w20, LBB0_8
; %bb.4:
	bl	_AR5K_REG_DISABLE_BITS
	b	LBB0_6
LBB0_5:
Lloh6:
	adrp	x8, _AR5K_PHY_AGCCTL@GOTPAGE
Lloh7:
	ldr	x8, [x8, _AR5K_PHY_AGCCTL@GOTPAGEOFF]
Lloh8:
	ldr	w1, [x8]
Lloh9:
	adrp	x8, _AR5K_PHY_AGCCTL_OFDM_DIV_DIS@GOTPAGE
Lloh10:
	ldr	x8, [x8, _AR5K_PHY_AGCCTL_OFDM_DIV_DIS@GOTPAGEOFF]
Lloh11:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_AR5K_REG_ENABLE_BITS
	cbz	w20, LBB0_9
LBB0_6:
Lloh12:
	adrp	x8, _AR5K_PHY_RESTART@GOTPAGE
Lloh13:
	ldr	x8, [x8, _AR5K_PHY_RESTART@GOTPAGEOFF]
Lloh14:
	ldr	w1, [x8]
Lloh15:
	adrp	x8, _AR5K_PHY_RESTART_DIV_GC@GOTPAGE
Lloh16:
	ldr	x8, [x8, _AR5K_PHY_RESTART_DIV_GC@GOTPAGEOFF]
Lloh17:
	ldr	w2, [x8]
	mov	x0, x19
	mov	w3, #4
	bl	_AR5K_REG_WRITE_BITS
Lloh18:
	adrp	x8, _AR5K_PHY_FAST_ANT_DIV@GOTPAGE
Lloh19:
	ldr	x8, [x8, _AR5K_PHY_FAST_ANT_DIV@GOTPAGEOFF]
Lloh20:
	ldr	w1, [x8]
Lloh21:
	adrp	x8, _AR5K_PHY_FAST_ANT_DIV_EN@GOTPAGE
Lloh22:
	ldr	x8, [x8, _AR5K_PHY_FAST_ANT_DIV_EN@GOTPAGEOFF]
Lloh23:
	ldr	w2, [x8]
	mov	x0, x19
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	b	_AR5K_REG_ENABLE_BITS
LBB0_7:
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	ret
LBB0_8:
	bl	_AR5K_REG_ENABLE_BITS
LBB0_9:
Lloh24:
	adrp	x8, _AR5K_PHY_RESTART@GOTPAGE
Lloh25:
	ldr	x8, [x8, _AR5K_PHY_RESTART@GOTPAGEOFF]
Lloh26:
	ldr	w1, [x8]
Lloh27:
	adrp	x8, _AR5K_PHY_RESTART_DIV_GC@GOTPAGE
Lloh28:
	ldr	x8, [x8, _AR5K_PHY_RESTART_DIV_GC@GOTPAGEOFF]
Lloh29:
	ldr	w2, [x8]
	mov	x0, x19
	mov	w3, #0
	bl	_AR5K_REG_WRITE_BITS
Lloh30:
	adrp	x8, _AR5K_PHY_FAST_ANT_DIV@GOTPAGE
Lloh31:
	ldr	x8, [x8, _AR5K_PHY_FAST_ANT_DIV@GOTPAGEOFF]
Lloh32:
	ldr	w1, [x8]
Lloh33:
	adrp	x8, _AR5K_PHY_FAST_ANT_DIV_EN@GOTPAGE
Lloh34:
	ldr	x8, [x8, _AR5K_PHY_FAST_ANT_DIV_EN@GOTPAGEOFF]
Lloh35:
	ldr	w2, [x8]
	mov	x0, x19
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	b	_AR5K_REG_DISABLE_BITS
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh33, Lloh34, Lloh35
	.loh AdrpLdrGotLdr	Lloh30, Lloh31, Lloh32
	.loh AdrpLdrGotLdr	Lloh27, Lloh28, Lloh29
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.cfi_endproc
                                        ; -- End function
	.comm	_AR5K_PHY_AGCCTL,4,2            ; @AR5K_PHY_AGCCTL
	.comm	_AR5K_PHY_AGCCTL_OFDM_DIV_DIS,4,2 ; @AR5K_PHY_AGCCTL_OFDM_DIV_DIS
	.comm	_AR5K_PHY_RESTART,4,2           ; @AR5K_PHY_RESTART
	.comm	_AR5K_PHY_RESTART_DIV_GC,4,2    ; @AR5K_PHY_RESTART_DIV_GC
	.comm	_AR5K_PHY_FAST_ANT_DIV,4,2      ; @AR5K_PHY_FAST_ANT_DIV
	.comm	_AR5K_PHY_FAST_ANT_DIV_EN,4,2   ; @AR5K_PHY_FAST_ANT_DIV_EN
	.no_dead_strip	_ath5k_hw_set_fast_div
.subsections_via_symbols
