	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function qed_iov_vf_igu_set_int
_qed_iov_vf_igu_set_int:                ## @qed_iov_vf_igu_set_int
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%ecx, %r15d
	movq	%rsi, %r14
	movq	%rdi, %rbx
	movl	(%rdx), %edx
	callq	_qed_fid_pretend
	movq	_IGU_REG_VF_CONFIGURATION@GOTPCREL(%rip), %r12
	movl	(%r12), %edx
	movq	%rbx, %rdi
	movq	%r14, %rsi
	callq	_qed_rd
	movq	_IGU_VF_CONF_MSI_MSIX_EN@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	movl	%ecx, %edx
	orl	%eax, %edx
	notl	%ecx
	andl	%eax, %ecx
	testl	%r15d, %r15d
	cmovnel	%edx, %ecx
	movl	(%r12), %edx
	movq	%rbx, %rdi
	movq	%r14, %rsi
	callq	_qed_wr
	movl	(%rbx), %edx
	movq	%rbx, %rdi
	movq	%r14, %rsi
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_qed_fid_pretend                ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_IGU_REG_VF_CONFIGURATION,4,2   ## @IGU_REG_VF_CONFIGURATION
	.comm	_IGU_VF_CONF_MSI_MSIX_EN,4,2    ## @IGU_VF_CONF_MSI_MSIX_EN
	.no_dead_strip	_qed_iov_vf_igu_set_int
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function qed_iov_vf_igu_set_int
_qed_iov_vf_igu_set_int:                ; @qed_iov_vf_igu_set_int
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x3
	mov	x20, x1
	mov	x21, x0
	ldr	w2, [x2]
	bl	_qed_fid_pretend
Lloh0:
	adrp	x22, _IGU_REG_VF_CONFIGURATION@GOTPAGE
Lloh1:
	ldr	x22, [x22, _IGU_REG_VF_CONFIGURATION@GOTPAGEOFF]
	ldr	w2, [x22]
	mov	x0, x21
	mov	x1, x20
	bl	_qed_rd
Lloh2:
	adrp	x8, _IGU_VF_CONF_MSI_MSIX_EN@GOTPAGE
Lloh3:
	ldr	x8, [x8, _IGU_VF_CONF_MSI_MSIX_EN@GOTPAGEOFF]
Lloh4:
	ldr	w8, [x8]
	orr	w9, w8, w0
	bic	w8, w0, w8
	cmp	w19, #0
	csel	w3, w8, w9, eq
	ldr	w2, [x22]
	mov	x0, x21
	mov	x1, x20
	bl	_qed_wr
	ldr	w2, [x21]
	mov	x0, x21
	mov	x1, x20
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	_qed_fid_pretend
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGot	Lloh0, Lloh1
	.cfi_endproc
                                        ; -- End function
	.comm	_IGU_REG_VF_CONFIGURATION,4,2   ; @IGU_REG_VF_CONFIGURATION
	.comm	_IGU_VF_CONF_MSI_MSIX_EN,4,2    ; @IGU_VF_CONF_MSI_MSIX_EN
	.no_dead_strip	_qed_iov_vf_igu_set_int
.subsections_via_symbols
