	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function ar8327_get_pad_cfg
_ar8327_get_pad_cfg:                    ## @ar8327_get_pad_cfg
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	xorl	%eax, %eax
	testq	%rdi, %rdi
	je	LBB0_7
## %bb.1:
	movl	(%rdi), %ecx
	addl	$-128, %ecx
	cmpl	$9, %ecx
	ja	LBB0_7
## %bb.2:
	leaq	LJTI0_0(%rip), %rdx
	movslq	(%rdx,%rcx,4), %rcx
	addq	%rdx, %rcx
	jmpq	*%rcx
LBB0_3:
	movq	_AR8327_PAD_PHYX_RGMII_EN@GOTPCREL(%rip), %rax
	jmp	LBB0_6
LBB0_4:
	movq	_AR8327_PAD_PHYX_MII_EN@GOTPCREL(%rip), %rax
	jmp	LBB0_6
LBB0_5:
	movq	_AR8327_PAD_PHYX_GMII_EN@GOTPCREL(%rip), %rax
LBB0_6:
	movl	(%rax), %eax
LBB0_7:
	popq	%rbp
	retq
LBB0_8:
	movq	_AR8327_PAD_RGMII_TXCLK_DELAY_SEL_S@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	movl	4(%rdi), %eax
	movl	8(%rdi), %edx
	shll	%cl, %eax
	movq	_AR8327_PAD_RGMII_RXCLK_DELAY_SEL_S@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shll	%cl, %edx
	movq	_AR8327_PAD_SGMII_EN@GOTPCREL(%rip), %rcx
	movl	16(%rdi), %esi
	testl	%esi, %esi
	je	LBB0_10
## %bb.9:
	movq	_AR8327_PAD_RGMII_RXCLK_DELAY_EN@GOTPCREL(%rip), %rsi
	movl	(%rsi), %esi
LBB0_10:
	orl	%esi, %edx
	orl	(%rcx), %eax
	movl	12(%rdi), %ecx
	testl	%ecx, %ecx
	je	LBB0_12
## %bb.11:
	movq	_AR8327_PAD_RGMII_TXCLK_DELAY_EN@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
LBB0_12:
	orl	%ecx, %edx
	orl	%edx, %eax
	cmpl	$0, 32(%rdi)
	je	LBB0_7
## %bb.13:
	movq	_AR8327_PAD_SGMII_DELAY_EN@GOTPCREL(%rip), %rcx
	jmp	LBB0_32
LBB0_14:
	movq	_AR8327_PAD_RGMII_TXCLK_DELAY_SEL_S@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	movl	4(%rdi), %eax
	shll	%cl, %eax
	movq	_AR8327_PAD_RGMII_EN@GOTPCREL(%rip), %rsi
	movq	_AR8327_PAD_RGMII_RXCLK_DELAY_SEL_S@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	movl	8(%rdi), %edx
	shll	%cl, %edx
	orl	(%rsi), %eax
	movl	16(%rdi), %ecx
	testl	%ecx, %ecx
	je	LBB0_16
## %bb.15:
	movq	_AR8327_PAD_RGMII_RXCLK_DELAY_EN@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
LBB0_16:
	orl	%ecx, %edx
	orl	%edx, %eax
	cmpl	$0, 12(%rdi)
	je	LBB0_7
## %bb.17:
	movq	_AR8327_PAD_RGMII_TXCLK_DELAY_EN@GOTPCREL(%rip), %rcx
	jmp	LBB0_32
LBB0_18:
	movq	_AR8327_PAD_PHY_MII_EN@GOTPCREL(%rip), %rcx
	movl	24(%rdi), %eax
	testl	%eax, %eax
	je	LBB0_20
## %bb.19:
	movq	_AR8327_PAD_PHY_MII_RXCLK_SEL@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
LBB0_20:
	orl	(%rcx), %eax
	cmpl	$0, 20(%rdi)
	je	LBB0_7
## %bb.21:
	movq	_AR8327_PAD_PHY_MII_TXCLK_SEL@GOTPCREL(%rip), %rcx
	jmp	LBB0_32
LBB0_22:
	movq	_AR8327_PAD_PHY_GMII_EN@GOTPCREL(%rip), %rdx
	movl	24(%rdi), %ecx
	movl	28(%rdi), %eax
	testl	%eax, %eax
	je	LBB0_24
## %bb.23:
	movq	_AR8327_PAD_PHY_GMII_PIPE_RXCLK_SEL@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
LBB0_24:
	orl	(%rdx), %eax
	testl	%ecx, %ecx
	je	LBB0_26
## %bb.25:
	movq	_AR8327_PAD_PHY_GMII_RXCLK_SEL@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
LBB0_26:
	orl	%ecx, %eax
	cmpl	$0, 20(%rdi)
	je	LBB0_7
## %bb.27:
	movq	_AR8327_PAD_PHY_GMII_TXCLK_SEL@GOTPCREL(%rip), %rcx
	jmp	LBB0_32
LBB0_28:
	movq	_AR8327_PAD_MAC_MII_EN@GOTPCREL(%rip), %rcx
	movl	24(%rdi), %eax
	testl	%eax, %eax
	je	LBB0_30
## %bb.29:
	movq	_AR8327_PAD_MAC_MII_RXCLK_SEL@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
LBB0_30:
	orl	(%rcx), %eax
	cmpl	$0, 20(%rdi)
	je	LBB0_7
## %bb.31:
	movq	_AR8327_PAD_MAC_MII_TXCLK_SEL@GOTPCREL(%rip), %rcx
	jmp	LBB0_32
LBB0_33:
	movq	_AR8327_PAD_MAC_GMII_EN@GOTPCREL(%rip), %rcx
	movl	24(%rdi), %eax
	testl	%eax, %eax
	je	LBB0_35
## %bb.34:
	movq	_AR8327_PAD_MAC_GMII_RXCLK_SEL@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
LBB0_35:
	orl	(%rcx), %eax
	cmpl	$0, 20(%rdi)
	je	LBB0_7
## %bb.36:
	movq	_AR8327_PAD_MAC_GMII_TXCLK_SEL@GOTPCREL(%rip), %rcx
LBB0_32:
	orl	(%rcx), %eax
	popq	%rbp
	retq
	.cfi_endproc
	.p2align	2, 0x90
	.data_region jt32
.set L0_0_set_3, LBB0_3-LJTI0_0
.set L0_0_set_4, LBB0_4-LJTI0_0
.set L0_0_set_5, LBB0_5-LJTI0_0
.set L0_0_set_7, LBB0_7-LJTI0_0
.set L0_0_set_8, LBB0_8-LJTI0_0
.set L0_0_set_14, LBB0_14-LJTI0_0
.set L0_0_set_18, LBB0_18-LJTI0_0
.set L0_0_set_22, LBB0_22-LJTI0_0
.set L0_0_set_28, LBB0_28-LJTI0_0
.set L0_0_set_33, LBB0_33-LJTI0_0
LJTI0_0:
	.long	L0_0_set_3
	.long	L0_0_set_4
	.long	L0_0_set_5
	.long	L0_0_set_7
	.long	L0_0_set_8
	.long	L0_0_set_14
	.long	L0_0_set_18
	.long	L0_0_set_22
	.long	L0_0_set_28
	.long	L0_0_set_33
	.end_data_region
                                        ## -- End function
	.comm	_AR8327_PAD_MAC_MII_EN,4,2      ## @AR8327_PAD_MAC_MII_EN
	.comm	_AR8327_PAD_MAC_MII_RXCLK_SEL,4,2 ## @AR8327_PAD_MAC_MII_RXCLK_SEL
	.comm	_AR8327_PAD_MAC_MII_TXCLK_SEL,4,2 ## @AR8327_PAD_MAC_MII_TXCLK_SEL
	.comm	_AR8327_PAD_MAC_GMII_EN,4,2     ## @AR8327_PAD_MAC_GMII_EN
	.comm	_AR8327_PAD_MAC_GMII_RXCLK_SEL,4,2 ## @AR8327_PAD_MAC_GMII_RXCLK_SEL
	.comm	_AR8327_PAD_MAC_GMII_TXCLK_SEL,4,2 ## @AR8327_PAD_MAC_GMII_TXCLK_SEL
	.comm	_AR8327_PAD_SGMII_EN,4,2        ## @AR8327_PAD_SGMII_EN
	.comm	_AR8327_PAD_RGMII_TXCLK_DELAY_SEL_S,4,2 ## @AR8327_PAD_RGMII_TXCLK_DELAY_SEL_S
	.comm	_AR8327_PAD_RGMII_RXCLK_DELAY_SEL_S,4,2 ## @AR8327_PAD_RGMII_RXCLK_DELAY_SEL_S
	.comm	_AR8327_PAD_RGMII_RXCLK_DELAY_EN,4,2 ## @AR8327_PAD_RGMII_RXCLK_DELAY_EN
	.comm	_AR8327_PAD_RGMII_TXCLK_DELAY_EN,4,2 ## @AR8327_PAD_RGMII_TXCLK_DELAY_EN
	.comm	_AR8327_PAD_SGMII_DELAY_EN,4,2  ## @AR8327_PAD_SGMII_DELAY_EN
	.comm	_AR8327_PAD_PHY_MII_EN,4,2      ## @AR8327_PAD_PHY_MII_EN
	.comm	_AR8327_PAD_PHY_MII_RXCLK_SEL,4,2 ## @AR8327_PAD_PHY_MII_RXCLK_SEL
	.comm	_AR8327_PAD_PHY_MII_TXCLK_SEL,4,2 ## @AR8327_PAD_PHY_MII_TXCLK_SEL
	.comm	_AR8327_PAD_PHY_GMII_EN,4,2     ## @AR8327_PAD_PHY_GMII_EN
	.comm	_AR8327_PAD_PHY_GMII_PIPE_RXCLK_SEL,4,2 ## @AR8327_PAD_PHY_GMII_PIPE_RXCLK_SEL
	.comm	_AR8327_PAD_PHY_GMII_RXCLK_SEL,4,2 ## @AR8327_PAD_PHY_GMII_RXCLK_SEL
	.comm	_AR8327_PAD_PHY_GMII_TXCLK_SEL,4,2 ## @AR8327_PAD_PHY_GMII_TXCLK_SEL
	.comm	_AR8327_PAD_RGMII_EN,4,2        ## @AR8327_PAD_RGMII_EN
	.comm	_AR8327_PAD_PHYX_GMII_EN,4,2    ## @AR8327_PAD_PHYX_GMII_EN
	.comm	_AR8327_PAD_PHYX_RGMII_EN,4,2   ## @AR8327_PAD_PHYX_RGMII_EN
	.comm	_AR8327_PAD_PHYX_MII_EN,4,2     ## @AR8327_PAD_PHYX_MII_EN
	.no_dead_strip	_ar8327_get_pad_cfg
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function ar8327_get_pad_cfg
_ar8327_get_pad_cfg:                    ; @ar8327_get_pad_cfg
	.cfi_startproc
; %bb.0:
	mov	w8, #0
	cbz	x0, LBB0_7
; %bb.1:
	ldr	w9, [x0]
	sub	w9, w9, #128
	cmp	w9, #9
	b.hi	LBB0_7
; %bb.2:
Lloh0:
	adrp	x10, lJTI0_0@PAGE
Lloh1:
	add	x10, x10, lJTI0_0@PAGEOFF
	adr	x11, LBB0_3
	ldrb	w12, [x10, x9]
	add	x11, x11, x12, lsl #2
	br	x11
LBB0_3:
Lloh2:
	adrp	x8, _AR8327_PAD_PHYX_RGMII_EN@GOTPAGE
Lloh3:
	ldr	x8, [x8, _AR8327_PAD_PHYX_RGMII_EN@GOTPAGEOFF]
	b	LBB0_6
LBB0_4:
Lloh4:
	adrp	x8, _AR8327_PAD_PHYX_MII_EN@GOTPAGE
Lloh5:
	ldr	x8, [x8, _AR8327_PAD_PHYX_MII_EN@GOTPAGEOFF]
	b	LBB0_6
LBB0_5:
Lloh6:
	adrp	x8, _AR8327_PAD_PHYX_GMII_EN@GOTPAGE
Lloh7:
	ldr	x8, [x8, _AR8327_PAD_PHYX_GMII_EN@GOTPAGEOFF]
LBB0_6:
	ldr	w8, [x8]
LBB0_7:
	mov	x0, x8
	ret
LBB0_8:
Lloh8:
	adrp	x8, _AR8327_PAD_SGMII_EN@GOTPAGE
Lloh9:
	ldr	x8, [x8, _AR8327_PAD_SGMII_EN@GOTPAGEOFF]
Lloh10:
	ldr	w8, [x8]
Lloh11:
	adrp	x9, _AR8327_PAD_RGMII_TXCLK_DELAY_SEL_S@GOTPAGE
Lloh12:
	ldr	x9, [x9, _AR8327_PAD_RGMII_TXCLK_DELAY_SEL_S@GOTPAGEOFF]
Lloh13:
	ldr	w9, [x9]
	ldp	w10, w11, [x0, #4]
	lsl	w9, w10, w9
	orr	w8, w9, w8
Lloh14:
	adrp	x9, _AR8327_PAD_RGMII_RXCLK_DELAY_SEL_S@GOTPAGE
Lloh15:
	ldr	x9, [x9, _AR8327_PAD_RGMII_RXCLK_DELAY_SEL_S@GOTPAGEOFF]
Lloh16:
	ldr	w9, [x9]
	lsl	w9, w11, w9
	orr	w8, w8, w9
Lloh17:
	adrp	x9, _AR8327_PAD_RGMII_RXCLK_DELAY_EN@GOTPAGE
Lloh18:
	ldr	x9, [x9, _AR8327_PAD_RGMII_RXCLK_DELAY_EN@GOTPAGEOFF]
Lloh19:
	ldr	w9, [x9]
	ldp	w11, w10, [x0, #12]
	cmp	w10, #0
	csel	w9, wzr, w9, eq
Lloh20:
	adrp	x10, _AR8327_PAD_RGMII_TXCLK_DELAY_EN@GOTPAGE
Lloh21:
	ldr	x10, [x10, _AR8327_PAD_RGMII_TXCLK_DELAY_EN@GOTPAGEOFF]
	orr	w8, w8, w9
Lloh22:
	ldr	w9, [x10]
	cmp	w11, #0
	csel	w9, wzr, w9, eq
	orr	w8, w8, w9
	ldr	w9, [x0, #32]
	cbz	w9, LBB0_7
; %bb.9:
Lloh23:
	adrp	x9, _AR8327_PAD_SGMII_DELAY_EN@GOTPAGE
Lloh24:
	ldr	x9, [x9, _AR8327_PAD_SGMII_DELAY_EN@GOTPAGEOFF]
	b	LBB0_20
LBB0_10:
Lloh25:
	adrp	x8, _AR8327_PAD_RGMII_EN@GOTPAGE
Lloh26:
	ldr	x8, [x8, _AR8327_PAD_RGMII_EN@GOTPAGEOFF]
Lloh27:
	ldr	w8, [x8]
Lloh28:
	adrp	x9, _AR8327_PAD_RGMII_TXCLK_DELAY_SEL_S@GOTPAGE
Lloh29:
	ldr	x9, [x9, _AR8327_PAD_RGMII_TXCLK_DELAY_SEL_S@GOTPAGEOFF]
Lloh30:
	ldr	w9, [x9]
	ldp	w10, w11, [x0, #4]
	lsl	w9, w10, w9
Lloh31:
	adrp	x10, _AR8327_PAD_RGMII_RXCLK_DELAY_SEL_S@GOTPAGE
Lloh32:
	ldr	x10, [x10, _AR8327_PAD_RGMII_RXCLK_DELAY_SEL_S@GOTPAGEOFF]
	orr	w8, w9, w8
Lloh33:
	ldr	w9, [x10]
	lsl	w9, w11, w9
	orr	w8, w8, w9
Lloh34:
	adrp	x9, _AR8327_PAD_RGMII_RXCLK_DELAY_EN@GOTPAGE
Lloh35:
	ldr	x9, [x9, _AR8327_PAD_RGMII_RXCLK_DELAY_EN@GOTPAGEOFF]
Lloh36:
	ldr	w9, [x9]
	ldp	w11, w10, [x0, #12]
	cmp	w10, #0
	csel	w9, wzr, w9, eq
	orr	w8, w8, w9
	cbz	w11, LBB0_7
; %bb.11:
Lloh37:
	adrp	x9, _AR8327_PAD_RGMII_TXCLK_DELAY_EN@GOTPAGE
Lloh38:
	ldr	x9, [x9, _AR8327_PAD_RGMII_TXCLK_DELAY_EN@GOTPAGEOFF]
	b	LBB0_20
LBB0_12:
Lloh39:
	adrp	x8, _AR8327_PAD_PHY_MII_EN@GOTPAGE
Lloh40:
	ldr	x8, [x8, _AR8327_PAD_PHY_MII_EN@GOTPAGEOFF]
Lloh41:
	ldr	w8, [x8]
Lloh42:
	adrp	x9, _AR8327_PAD_PHY_MII_RXCLK_SEL@GOTPAGE
Lloh43:
	ldr	x9, [x9, _AR8327_PAD_PHY_MII_RXCLK_SEL@GOTPAGEOFF]
Lloh44:
	ldr	w9, [x9]
	ldp	w11, w10, [x0, #20]
	cmp	w10, #0
	csel	w9, wzr, w9, eq
	orr	w8, w9, w8
	cbz	w11, LBB0_7
; %bb.13:
Lloh45:
	adrp	x9, _AR8327_PAD_PHY_MII_TXCLK_SEL@GOTPAGE
Lloh46:
	ldr	x9, [x9, _AR8327_PAD_PHY_MII_TXCLK_SEL@GOTPAGEOFF]
	b	LBB0_20
LBB0_14:
Lloh47:
	adrp	x8, _AR8327_PAD_PHY_GMII_EN@GOTPAGE
Lloh48:
	ldr	x8, [x8, _AR8327_PAD_PHY_GMII_EN@GOTPAGEOFF]
Lloh49:
	ldr	w8, [x8]
	ldr	w9, [x0, #28]
Lloh50:
	adrp	x10, _AR8327_PAD_PHY_GMII_PIPE_RXCLK_SEL@GOTPAGE
Lloh51:
	ldr	x10, [x10, _AR8327_PAD_PHY_GMII_PIPE_RXCLK_SEL@GOTPAGEOFF]
Lloh52:
	ldr	w10, [x10]
	cmp	w9, #0
	csel	w9, wzr, w10, eq
	orr	w8, w9, w8
Lloh53:
	adrp	x9, _AR8327_PAD_PHY_GMII_RXCLK_SEL@GOTPAGE
Lloh54:
	ldr	x9, [x9, _AR8327_PAD_PHY_GMII_RXCLK_SEL@GOTPAGEOFF]
Lloh55:
	ldr	w9, [x9]
	ldp	w11, w10, [x0, #20]
	cmp	w10, #0
	csel	w9, wzr, w9, eq
	orr	w8, w8, w9
	cbz	w11, LBB0_7
; %bb.15:
Lloh56:
	adrp	x9, _AR8327_PAD_PHY_GMII_TXCLK_SEL@GOTPAGE
Lloh57:
	ldr	x9, [x9, _AR8327_PAD_PHY_GMII_TXCLK_SEL@GOTPAGEOFF]
	b	LBB0_20
LBB0_16:
Lloh58:
	adrp	x8, _AR8327_PAD_MAC_MII_EN@GOTPAGE
Lloh59:
	ldr	x8, [x8, _AR8327_PAD_MAC_MII_EN@GOTPAGEOFF]
Lloh60:
	ldr	w8, [x8]
Lloh61:
	adrp	x9, _AR8327_PAD_MAC_MII_RXCLK_SEL@GOTPAGE
Lloh62:
	ldr	x9, [x9, _AR8327_PAD_MAC_MII_RXCLK_SEL@GOTPAGEOFF]
Lloh63:
	ldr	w9, [x9]
	ldp	w11, w10, [x0, #20]
	cmp	w10, #0
	csel	w9, wzr, w9, eq
	orr	w8, w9, w8
	cbz	w11, LBB0_7
; %bb.17:
Lloh64:
	adrp	x9, _AR8327_PAD_MAC_MII_TXCLK_SEL@GOTPAGE
Lloh65:
	ldr	x9, [x9, _AR8327_PAD_MAC_MII_TXCLK_SEL@GOTPAGEOFF]
	b	LBB0_20
LBB0_18:
Lloh66:
	adrp	x8, _AR8327_PAD_MAC_GMII_EN@GOTPAGE
Lloh67:
	ldr	x8, [x8, _AR8327_PAD_MAC_GMII_EN@GOTPAGEOFF]
Lloh68:
	ldr	w8, [x8]
Lloh69:
	adrp	x9, _AR8327_PAD_MAC_GMII_RXCLK_SEL@GOTPAGE
Lloh70:
	ldr	x9, [x9, _AR8327_PAD_MAC_GMII_RXCLK_SEL@GOTPAGEOFF]
Lloh71:
	ldr	w9, [x9]
	ldp	w11, w10, [x0, #20]
	cmp	w10, #0
	csel	w9, wzr, w9, eq
	orr	w8, w9, w8
	cbz	w11, LBB0_7
; %bb.19:
Lloh72:
	adrp	x9, _AR8327_PAD_MAC_GMII_TXCLK_SEL@GOTPAGE
Lloh73:
	ldr	x9, [x9, _AR8327_PAD_MAC_GMII_TXCLK_SEL@GOTPAGEOFF]
LBB0_20:
	ldr	w9, [x9]
	orr	w0, w9, w8
	ret
	.loh AdrpAdd	Lloh0, Lloh1
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpLdrGot	Lloh4, Lloh5
	.loh AdrpLdrGot	Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh20, Lloh21, Lloh22
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh19
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh16
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGot	Lloh23, Lloh24
	.loh AdrpLdrGotLdr	Lloh34, Lloh35, Lloh36
	.loh AdrpLdrGotLdr	Lloh31, Lloh32, Lloh33
	.loh AdrpLdrGotLdr	Lloh28, Lloh29, Lloh30
	.loh AdrpLdrGotLdr	Lloh25, Lloh26, Lloh27
	.loh AdrpLdrGot	Lloh37, Lloh38
	.loh AdrpLdrGotLdr	Lloh42, Lloh43, Lloh44
	.loh AdrpLdrGotLdr	Lloh39, Lloh40, Lloh41
	.loh AdrpLdrGot	Lloh45, Lloh46
	.loh AdrpLdrGotLdr	Lloh53, Lloh54, Lloh55
	.loh AdrpLdrGotLdr	Lloh50, Lloh51, Lloh52
	.loh AdrpLdrGotLdr	Lloh47, Lloh48, Lloh49
	.loh AdrpLdrGot	Lloh56, Lloh57
	.loh AdrpLdrGotLdr	Lloh61, Lloh62, Lloh63
	.loh AdrpLdrGotLdr	Lloh58, Lloh59, Lloh60
	.loh AdrpLdrGot	Lloh64, Lloh65
	.loh AdrpLdrGotLdr	Lloh69, Lloh70, Lloh71
	.loh AdrpLdrGotLdr	Lloh66, Lloh67, Lloh68
	.loh AdrpLdrGot	Lloh72, Lloh73
	.cfi_endproc
	.section	__TEXT,__const
lJTI0_0:
	.byte	(LBB0_3-LBB0_3)>>2
	.byte	(LBB0_4-LBB0_3)>>2
	.byte	(LBB0_5-LBB0_3)>>2
	.byte	(LBB0_7-LBB0_3)>>2
	.byte	(LBB0_8-LBB0_3)>>2
	.byte	(LBB0_10-LBB0_3)>>2
	.byte	(LBB0_12-LBB0_3)>>2
	.byte	(LBB0_14-LBB0_3)>>2
	.byte	(LBB0_16-LBB0_3)>>2
	.byte	(LBB0_18-LBB0_3)>>2
                                        ; -- End function
	.comm	_AR8327_PAD_MAC_MII_EN,4,2      ; @AR8327_PAD_MAC_MII_EN
	.comm	_AR8327_PAD_MAC_MII_RXCLK_SEL,4,2 ; @AR8327_PAD_MAC_MII_RXCLK_SEL
	.comm	_AR8327_PAD_MAC_MII_TXCLK_SEL,4,2 ; @AR8327_PAD_MAC_MII_TXCLK_SEL
	.comm	_AR8327_PAD_MAC_GMII_EN,4,2     ; @AR8327_PAD_MAC_GMII_EN
	.comm	_AR8327_PAD_MAC_GMII_RXCLK_SEL,4,2 ; @AR8327_PAD_MAC_GMII_RXCLK_SEL
	.comm	_AR8327_PAD_MAC_GMII_TXCLK_SEL,4,2 ; @AR8327_PAD_MAC_GMII_TXCLK_SEL
	.comm	_AR8327_PAD_SGMII_EN,4,2        ; @AR8327_PAD_SGMII_EN
	.comm	_AR8327_PAD_RGMII_TXCLK_DELAY_SEL_S,4,2 ; @AR8327_PAD_RGMII_TXCLK_DELAY_SEL_S
	.comm	_AR8327_PAD_RGMII_RXCLK_DELAY_SEL_S,4,2 ; @AR8327_PAD_RGMII_RXCLK_DELAY_SEL_S
	.comm	_AR8327_PAD_RGMII_RXCLK_DELAY_EN,4,2 ; @AR8327_PAD_RGMII_RXCLK_DELAY_EN
	.comm	_AR8327_PAD_RGMII_TXCLK_DELAY_EN,4,2 ; @AR8327_PAD_RGMII_TXCLK_DELAY_EN
	.comm	_AR8327_PAD_SGMII_DELAY_EN,4,2  ; @AR8327_PAD_SGMII_DELAY_EN
	.comm	_AR8327_PAD_PHY_MII_EN,4,2      ; @AR8327_PAD_PHY_MII_EN
	.comm	_AR8327_PAD_PHY_MII_RXCLK_SEL,4,2 ; @AR8327_PAD_PHY_MII_RXCLK_SEL
	.comm	_AR8327_PAD_PHY_MII_TXCLK_SEL,4,2 ; @AR8327_PAD_PHY_MII_TXCLK_SEL
	.comm	_AR8327_PAD_PHY_GMII_EN,4,2     ; @AR8327_PAD_PHY_GMII_EN
	.comm	_AR8327_PAD_PHY_GMII_PIPE_RXCLK_SEL,4,2 ; @AR8327_PAD_PHY_GMII_PIPE_RXCLK_SEL
	.comm	_AR8327_PAD_PHY_GMII_RXCLK_SEL,4,2 ; @AR8327_PAD_PHY_GMII_RXCLK_SEL
	.comm	_AR8327_PAD_PHY_GMII_TXCLK_SEL,4,2 ; @AR8327_PAD_PHY_GMII_TXCLK_SEL
	.comm	_AR8327_PAD_RGMII_EN,4,2        ; @AR8327_PAD_RGMII_EN
	.comm	_AR8327_PAD_PHYX_GMII_EN,4,2    ; @AR8327_PAD_PHYX_GMII_EN
	.comm	_AR8327_PAD_PHYX_RGMII_EN,4,2   ; @AR8327_PAD_PHYX_RGMII_EN
	.comm	_AR8327_PAD_PHYX_MII_EN,4,2     ; @AR8327_PAD_PHYX_MII_EN
	.no_dead_strip	_ar8327_get_pad_cfg
.subsections_via_symbols
