	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function mt7530_sw_init
_mt7530_sw_init:                        ## @mt7530_sw_init
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r15
	movq	40(%rdi), %rax
	movl	(%rax), %edi
	callq	_get_phy_access_mode
	movq	%rax, 32(%r15)
	movq	_HWSTRAP@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r15, %rdi
	callq	_mt753x_reg_read
	movl	%eax, %r14d
	movq	_CHG_TRAP@GOTPCREL(%rip), %rax
	orl	(%rax), %r14d
	movq	_C_MDIO_BPS_S@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, %ecx
	notl	%ecx
	andl	%r14d, %ecx
	orl	%eax, %r14d
	cmpq	$0, 32(%r15)
	cmovnel	%ecx, %r14d
	movq	_MHWSTRAP@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r15, %rdi
	movl	%r14d, %edx
	callq	_mt753x_reg_write
	movq	_SMI_ADDR_M@GOTPCREL(%rip), %rax
	andl	(%rax), %r14d
	movq	_SMI_ADDR_S@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	sarl	%cl, %r14d
	leal	8(,%r14,8), %eax
	movl	%eax, (%r15)
	movq	_MT753X_SMI_ADDR_MASK@GOTPCREL(%rip), %rcx
	andl	(%rcx), %eax
	movl	%eax, (%r15)
	cmpq	$0, 32(%r15)
	je	LBB0_2
## %bb.1:
	movq	_mt7530_mmd_write@GOTPCREL(%rip), %rax
	movq	_mt7530_mmd_read@GOTPCREL(%rip), %rsi
	movq	_mt7530_mii_write@GOTPCREL(%rip), %rdx
	movq	_mt7530_mii_read@GOTPCREL(%rip), %rcx
	jmp	LBB0_3
LBB0_2:
	movq	_mt753x_mmd_ind_write@GOTPCREL(%rip), %rax
	movq	_mt753x_mmd_ind_read@GOTPCREL(%rip), %rsi
	movq	_mt753x_mii_write@GOTPCREL(%rip), %rdx
	movq	_mt753x_mii_read@GOTPCREL(%rip), %rcx
LBB0_3:
	movl	(%rax), %eax
	movl	(%rsi), %esi
	movq	%rcx, 8(%r15)
	movq	%rdx, 16(%r15)
	movl	%esi, 28(%r15)
	movl	%eax, 24(%r15)
	movq	_MT753X_NUM_PHYS@GOTPCREL(%rip), %rax
	cmpl	$0, (%rax)
	jle	LBB0_7
## %bb.4:
	movl	$1, %r12d
	movq	_MII_BMCR@GOTPCREL(%rip), %r13
	movq	_BMCR_PDOWN@GOTPCREL(%rip), %r14
	.p2align	4, 0x90
LBB0_5:                                 ## =>This Inner Loop Header: Depth=1
	leal	-1(%r12), %ebx
	movl	(%r13), %edx
	movq	%r15, %rdi
	movl	%ebx, %esi
	callq	*%rcx
	orl	(%r14), %eax
	movl	(%r13), %edx
	movq	%r15, %rdi
	movl	%ebx, %esi
	movl	%eax, %ecx
	callq	*16(%r15)
	movq	_MT753X_NUM_PHYS@GOTPCREL(%rip), %rax
	cmpl	(%rax), %r12d
	jge	LBB0_7
## %bb.6:                               ##   in Loop: Header=BB0_5 Depth=1
	movq	8(%r15), %rcx
	incl	%r12d
	jmp	LBB0_5
LBB0_7:
	movl	$5, %edi
	callq	_PMCR
	movq	_FORCE_MODE@GOTPCREL(%rip), %rbx
	movl	(%rbx), %edx
	movq	%r15, %rdi
	movl	%eax, %esi
	callq	_mt753x_reg_write
	movl	$6, %edi
	callq	_PMCR
	movl	(%rbx), %edx
	movq	%r15, %rdi
	movl	%eax, %esi
	callq	_mt753x_reg_write
	movq	_SYS_CTRL@GOTPCREL(%rip), %rax
	movq	_SW_PHY_RST@GOTPCREL(%rip), %rcx
	movq	_SW_SYS_RST@GOTPCREL(%rip), %rdx
	movl	(%rdx), %edx
	orl	(%rcx), %edx
	movl	(%rax), %esi
	movq	_SW_REG_RST@GOTPCREL(%rip), %rax
	orl	(%rax), %edx
	movq	%r15, %rdi
	callq	_mt753x_reg_write
	movl	$10, %edi
	movl	$20, %esi
	callq	_usleep_range
	movq	_GMACCR@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_LATE_COL_DROP@GOTPCREL(%rip), %rax
	movq	_MTCC_LMT_S@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	movl	$15, %edi
	shll	%cl, %edi
	orl	(%rax), %edi
	movq	_MAX_RX_JUMBO_S@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	movl	$2, %edx
	shll	%cl, %edx
	orl	%edi, %edx
	movq	_RX_PKT_LEN_MAX_JUMBO@GOTPCREL(%rip), %rax
	orl	(%rax), %edx
	movq	%r15, %rdi
	callq	_mt753x_reg_write
	movq	%r15, %rdi
	callq	_mt7530_core_pll_setup
	movq	%r15, %rdi
	callq	_mt7530_mac_port_setup
	xorl	%eax, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_HWSTRAP,4,2                    ## @HWSTRAP
	.comm	_CHG_TRAP,4,2                   ## @CHG_TRAP
	.comm	_C_MDIO_BPS_S,4,2               ## @C_MDIO_BPS_S
	.comm	_MHWSTRAP,4,2                   ## @MHWSTRAP
	.comm	_SMI_ADDR_M,4,2                 ## @SMI_ADDR_M
	.comm	_SMI_ADDR_S,4,2                 ## @SMI_ADDR_S
	.comm	_MT753X_SMI_ADDR_MASK,4,2       ## @MT753X_SMI_ADDR_MASK
	.comm	_mt7530_mmd_read,4,2            ## @mt7530_mmd_read
	.comm	_mt7530_mmd_write,4,2           ## @mt7530_mmd_write
	.comm	_mt753x_mmd_ind_read,4,2        ## @mt753x_mmd_ind_read
	.comm	_mt753x_mmd_ind_write,4,2       ## @mt753x_mmd_ind_write
	.comm	_MT753X_NUM_PHYS,4,2            ## @MT753X_NUM_PHYS
	.comm	_MII_BMCR,4,2                   ## @MII_BMCR
	.comm	_BMCR_PDOWN,4,2                 ## @BMCR_PDOWN
	.comm	_FORCE_MODE,4,2                 ## @FORCE_MODE
	.comm	_SYS_CTRL,4,2                   ## @SYS_CTRL
	.comm	_SW_PHY_RST,4,2                 ## @SW_PHY_RST
	.comm	_SW_SYS_RST,4,2                 ## @SW_SYS_RST
	.comm	_SW_REG_RST,4,2                 ## @SW_REG_RST
	.comm	_GMACCR,4,2                     ## @GMACCR
	.comm	_LATE_COL_DROP,4,2              ## @LATE_COL_DROP
	.comm	_MTCC_LMT_S,4,2                 ## @MTCC_LMT_S
	.comm	_MAX_RX_JUMBO_S,4,2             ## @MAX_RX_JUMBO_S
	.comm	_RX_PKT_LEN_MAX_JUMBO,4,2       ## @RX_PKT_LEN_MAX_JUMBO
	.no_dead_strip	_mt7530_sw_init
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function mt7530_sw_init
_mt7530_sw_init:                        ; @mt7530_sw_init
	.cfi_startproc
; %bb.0:
	stp	x24, x23, [sp, #-64]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x19, x0
	ldr	x8, [x0, #40]
	ldr	w0, [x8]
	bl	_get_phy_access_mode
	str	x0, [x19, #32]
Lloh0:
	adrp	x8, _HWSTRAP@GOTPAGE
Lloh1:
	ldr	x8, [x8, _HWSTRAP@GOTPAGEOFF]
Lloh2:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_mt753x_reg_read
Lloh3:
	adrp	x8, _CHG_TRAP@GOTPAGE
Lloh4:
	ldr	x8, [x8, _CHG_TRAP@GOTPAGEOFF]
Lloh5:
	ldr	w8, [x8]
	orr	w8, w8, w0
	ldr	x9, [x19, #32]
Lloh6:
	adrp	x10, _C_MDIO_BPS_S@GOTPAGE
Lloh7:
	ldr	x10, [x10, _C_MDIO_BPS_S@GOTPAGEOFF]
Lloh8:
	ldr	w10, [x10]
	bic	w11, w8, w10
	orr	w8, w10, w8
	cmp	x9, #0
	csel	w20, w8, w11, eq
Lloh9:
	adrp	x8, _MHWSTRAP@GOTPAGE
Lloh10:
	ldr	x8, [x8, _MHWSTRAP@GOTPAGEOFF]
Lloh11:
	ldr	w1, [x8]
	mov	x0, x19
	mov	x2, x20
	bl	_mt753x_reg_write
Lloh12:
	adrp	x8, _SMI_ADDR_M@GOTPAGE
Lloh13:
	ldr	x8, [x8, _SMI_ADDR_M@GOTPAGEOFF]
Lloh14:
	ldr	w8, [x8]
Lloh15:
	adrp	x9, _SMI_ADDR_S@GOTPAGE
Lloh16:
	ldr	x9, [x9, _SMI_ADDR_S@GOTPAGEOFF]
	and	w8, w8, w20
Lloh17:
	ldr	w9, [x9]
	asr	w8, w8, w9
	lsl	w8, w8, #3
	add	w8, w8, #8
	str	w8, [x19]
Lloh18:
	adrp	x9, _MT753X_SMI_ADDR_MASK@GOTPAGE
Lloh19:
	ldr	x9, [x9, _MT753X_SMI_ADDR_MASK@GOTPAGEOFF]
Lloh20:
	ldr	w9, [x9]
	and	w8, w8, w9
	str	w8, [x19]
	ldr	x8, [x19, #32]
	cbz	x8, LBB0_2
; %bb.1:
Lloh21:
	adrp	x9, _mt7530_mmd_write@GOTPAGE
Lloh22:
	ldr	x9, [x9, _mt7530_mmd_write@GOTPAGEOFF]
Lloh23:
	adrp	x10, _mt7530_mmd_read@GOTPAGE
Lloh24:
	ldr	x10, [x10, _mt7530_mmd_read@GOTPAGEOFF]
Lloh25:
	adrp	x11, _mt7530_mii_write@GOTPAGE
Lloh26:
	ldr	x11, [x11, _mt7530_mii_write@GOTPAGEOFF]
Lloh27:
	adrp	x8, _mt7530_mii_read@GOTPAGE
Lloh28:
	ldr	x8, [x8, _mt7530_mii_read@GOTPAGEOFF]
	b	LBB0_3
LBB0_2:
Lloh29:
	adrp	x9, _mt753x_mmd_ind_write@GOTPAGE
Lloh30:
	ldr	x9, [x9, _mt753x_mmd_ind_write@GOTPAGEOFF]
Lloh31:
	adrp	x10, _mt753x_mmd_ind_read@GOTPAGE
Lloh32:
	ldr	x10, [x10, _mt753x_mmd_ind_read@GOTPAGEOFF]
Lloh33:
	adrp	x11, _mt753x_mii_write@GOTPAGE
Lloh34:
	ldr	x11, [x11, _mt753x_mii_write@GOTPAGEOFF]
Lloh35:
	adrp	x8, _mt753x_mii_read@GOTPAGE
Lloh36:
	ldr	x8, [x8, _mt753x_mii_read@GOTPAGEOFF]
LBB0_3:
	ldr	w9, [x9]
	ldr	w10, [x10]
	stp	x8, x11, [x19, #8]
	stp	w9, w10, [x19, #24]
Lloh37:
	adrp	x21, _MT753X_NUM_PHYS@GOTPAGE
Lloh38:
	ldr	x21, [x21, _MT753X_NUM_PHYS@GOTPAGEOFF]
	ldr	w9, [x21]
	cmp	w9, #1
	b.lt	LBB0_7
; %bb.4:
	mov	w22, #1
Lloh39:
	adrp	x23, _MII_BMCR@GOTPAGE
Lloh40:
	ldr	x23, [x23, _MII_BMCR@GOTPAGEOFF]
Lloh41:
	adrp	x24, _BMCR_PDOWN@GOTPAGE
Lloh42:
	ldr	x24, [x24, _BMCR_PDOWN@GOTPAGEOFF]
LBB0_5:                                 ; =>This Inner Loop Header: Depth=1
	sub	w20, w22, #1
	ldr	w2, [x23]
	mov	x0, x19
	mov	x1, x20
	blr	x8
	ldr	w8, [x24]
	orr	w3, w8, w0
	ldr	x8, [x19, #16]
	ldr	w2, [x23]
	mov	x0, x19
	mov	x1, x20
	blr	x8
	ldr	w8, [x21]
	cmp	w22, w8
	b.ge	LBB0_7
; %bb.6:                                ;   in Loop: Header=BB0_5 Depth=1
	ldr	x8, [x19, #8]
	add	w22, w22, #1
	b	LBB0_5
LBB0_7:
	mov	w0, #5
	bl	_PMCR
	mov	x1, x0
Lloh43:
	adrp	x20, _FORCE_MODE@GOTPAGE
Lloh44:
	ldr	x20, [x20, _FORCE_MODE@GOTPAGEOFF]
	ldr	w2, [x20]
	mov	x0, x19
	bl	_mt753x_reg_write
	mov	w0, #6
	bl	_PMCR
	mov	x1, x0
	ldr	w2, [x20]
	mov	x0, x19
	bl	_mt753x_reg_write
Lloh45:
	adrp	x8, _SYS_CTRL@GOTPAGE
Lloh46:
	ldr	x8, [x8, _SYS_CTRL@GOTPAGEOFF]
Lloh47:
	ldr	w1, [x8]
Lloh48:
	adrp	x8, _SW_PHY_RST@GOTPAGE
Lloh49:
	ldr	x8, [x8, _SW_PHY_RST@GOTPAGEOFF]
Lloh50:
	ldr	w8, [x8]
Lloh51:
	adrp	x9, _SW_SYS_RST@GOTPAGE
Lloh52:
	ldr	x9, [x9, _SW_SYS_RST@GOTPAGEOFF]
Lloh53:
	ldr	w9, [x9]
	orr	w8, w9, w8
Lloh54:
	adrp	x9, _SW_REG_RST@GOTPAGE
Lloh55:
	ldr	x9, [x9, _SW_REG_RST@GOTPAGEOFF]
Lloh56:
	ldr	w9, [x9]
	orr	w2, w8, w9
	mov	x0, x19
	bl	_mt753x_reg_write
	mov	w0, #10
	mov	w1, #20
	bl	_usleep_range
Lloh57:
	adrp	x8, _GMACCR@GOTPAGE
Lloh58:
	ldr	x8, [x8, _GMACCR@GOTPAGEOFF]
Lloh59:
	adrp	x9, _LATE_COL_DROP@GOTPAGE
Lloh60:
	ldr	x9, [x9, _LATE_COL_DROP@GOTPAGEOFF]
Lloh61:
	ldr	w1, [x8]
Lloh62:
	ldr	w8, [x9]
Lloh63:
	adrp	x9, _MTCC_LMT_S@GOTPAGE
Lloh64:
	ldr	x9, [x9, _MTCC_LMT_S@GOTPAGEOFF]
Lloh65:
	ldr	w9, [x9]
	mov	w10, #15
	lsl	w9, w10, w9
	orr	w8, w9, w8
Lloh66:
	adrp	x9, _MAX_RX_JUMBO_S@GOTPAGE
Lloh67:
	ldr	x9, [x9, _MAX_RX_JUMBO_S@GOTPAGEOFF]
Lloh68:
	ldr	w9, [x9]
	mov	w10, #2
	lsl	w9, w10, w9
	orr	w8, w8, w9
Lloh69:
	adrp	x9, _RX_PKT_LEN_MAX_JUMBO@GOTPAGE
Lloh70:
	ldr	x9, [x9, _RX_PKT_LEN_MAX_JUMBO@GOTPAGEOFF]
Lloh71:
	ldr	w9, [x9]
	orr	w2, w8, w9
	mov	x0, x19
	bl	_mt753x_reg_write
	mov	x0, x19
	bl	_mt7530_core_pll_setup
	mov	x0, x19
	bl	_mt7530_mac_port_setup
	mov	w0, #0
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGot	Lloh27, Lloh28
	.loh AdrpLdrGot	Lloh25, Lloh26
	.loh AdrpLdrGot	Lloh23, Lloh24
	.loh AdrpLdrGot	Lloh21, Lloh22
	.loh AdrpLdrGot	Lloh35, Lloh36
	.loh AdrpLdrGot	Lloh33, Lloh34
	.loh AdrpLdrGot	Lloh31, Lloh32
	.loh AdrpLdrGot	Lloh29, Lloh30
	.loh AdrpLdrGot	Lloh37, Lloh38
	.loh AdrpLdrGot	Lloh41, Lloh42
	.loh AdrpLdrGot	Lloh39, Lloh40
	.loh AdrpLdrGotLdr	Lloh69, Lloh70, Lloh71
	.loh AdrpLdrGotLdr	Lloh66, Lloh67, Lloh68
	.loh AdrpLdrGotLdr	Lloh63, Lloh64, Lloh65
	.loh AdrpLdrGotLdr	Lloh59, Lloh60, Lloh62
	.loh AdrpLdrGotLdr	Lloh57, Lloh58, Lloh61
	.loh AdrpLdrGotLdr	Lloh54, Lloh55, Lloh56
	.loh AdrpLdrGotLdr	Lloh51, Lloh52, Lloh53
	.loh AdrpLdrGotLdr	Lloh48, Lloh49, Lloh50
	.loh AdrpLdrGotLdr	Lloh45, Lloh46, Lloh47
	.loh AdrpLdrGot	Lloh43, Lloh44
	.cfi_endproc
                                        ; -- End function
	.comm	_HWSTRAP,4,2                    ; @HWSTRAP
	.comm	_CHG_TRAP,4,2                   ; @CHG_TRAP
	.comm	_C_MDIO_BPS_S,4,2               ; @C_MDIO_BPS_S
	.comm	_MHWSTRAP,4,2                   ; @MHWSTRAP
	.comm	_SMI_ADDR_M,4,2                 ; @SMI_ADDR_M
	.comm	_SMI_ADDR_S,4,2                 ; @SMI_ADDR_S
	.comm	_MT753X_SMI_ADDR_MASK,4,2       ; @MT753X_SMI_ADDR_MASK
	.comm	_mt7530_mmd_read,4,2            ; @mt7530_mmd_read
	.comm	_mt7530_mmd_write,4,2           ; @mt7530_mmd_write
	.comm	_mt753x_mmd_ind_read,4,2        ; @mt753x_mmd_ind_read
	.comm	_mt753x_mmd_ind_write,4,2       ; @mt753x_mmd_ind_write
	.comm	_MT753X_NUM_PHYS,4,2            ; @MT753X_NUM_PHYS
	.comm	_MII_BMCR,4,2                   ; @MII_BMCR
	.comm	_BMCR_PDOWN,4,2                 ; @BMCR_PDOWN
	.comm	_FORCE_MODE,4,2                 ; @FORCE_MODE
	.comm	_SYS_CTRL,4,2                   ; @SYS_CTRL
	.comm	_SW_PHY_RST,4,2                 ; @SW_PHY_RST
	.comm	_SW_SYS_RST,4,2                 ; @SW_SYS_RST
	.comm	_SW_REG_RST,4,2                 ; @SW_REG_RST
	.comm	_GMACCR,4,2                     ; @GMACCR
	.comm	_LATE_COL_DROP,4,2              ; @LATE_COL_DROP
	.comm	_MTCC_LMT_S,4,2                 ; @MTCC_LMT_S
	.comm	_MAX_RX_JUMBO_S,4,2             ; @MAX_RX_JUMBO_S
	.comm	_RX_PKT_LEN_MAX_JUMBO,4,2       ; @RX_PKT_LEN_MAX_JUMBO
	.no_dead_strip	_mt7530_sw_init
.subsections_via_symbols
