	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function oxnas_pcie_init_hw
_oxnas_pcie_init_hw:                    ## @oxnas_pcie_init_hw
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rsi, %r15
	movq	%rdi, %r14
	movl	40(%rsi), %edi
	callq	_clk_prepare_enable
	movq	(%r15), %rdi
	testq	%rdi, %rdi
	js	LBB0_3
## %bb.1:
	xorl	%esi, %esi
	callq	_gpio_direction_output
	testl	%eax, %eax
	jne	LBB0_3
## %bb.2:
	xorl	%eax, %eax
	callq	_wmb
	movl	$10, %edi
	callq	_mdelay
	movq	(%r15), %rdi
	callq	_gpio_direction_input
	xorl	%eax, %eax
	callq	_wmb
	movl	$100, %edi
	callq	_mdelay
LBB0_3:
	movq	_SYS_CTRL_HCSL_CTRL_REGOFFSET@GOTPCREL(%rip), %rax
	movl	(%rax), %r12d
	movl	12(%r15), %r13d
	movl	36(%r15), %edi
	callq	_BIT
	movl	%eax, %ebx
	movl	36(%r15), %edi
	callq	_BIT
	movl	%r13d, %edi
	movl	%r12d, %esi
	movl	%ebx, %edx
	movl	%eax, %ecx
	callq	_regmap_update_bits
	movq	%r14, %rdi
	callq	_device_reset
	testl	%eax, %eax
	je	LBB0_4
## %bb.6:
	leaq	L_.str(%rip), %rsi
	movq	%r14, %rdi
	movl	%eax, %edx
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_dev_err                        ## TAILCALL
LBB0_4:
	movl	32(%r15), %edi
	callq	_clk_prepare_enable
	movq	_PCI_CONFIG_VERSION_DEVICEID@GOTPCREL(%rip), %rax
	movq	(%rax), %rdi
	addq	24(%r15), %rdi
	callq	_readl_relaxed
	movq	%rax, %rbx
	leaq	L_.str.1(%rip), %rsi
	movq	%r14, %rdi
	movq	%rax, %rdx
	xorl	%eax, %eax
	callq	_dev_info
	movq	_VERSION_ID_MAGIC@GOTPCREL(%rip), %rax
	cmpq	(%rax), %rbx
	jne	LBB0_7
## %bb.5:
	movl	8(%r15), %esi
	movl	12(%r15), %edi
	movq	_PCIE_READY_ENTR_L23@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movl	%ecx, %edx
	callq	_regmap_write_bits
	movl	8(%r15), %esi
	movl	12(%r15), %edi
	movq	_PCIE_DEVICE_TYPE_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	_PCIE_DEVICE_TYPE_ROOT@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	callq	_regmap_write_bits
	xorl	%eax, %eax
	callq	_wmb
	movl	8(%r15), %esi
	movl	12(%r15), %edi
	movq	_PCIE_LTSSM@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movl	%ecx, %edx
	callq	_regmap_write_bits
	xorl	%eax, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_wmb                            ## TAILCALL
LBB0_7:
	leaq	L_.str.2(%rip), %rsi
	movq	%r14, %rdi
	xorl	%eax, %eax
	callq	_dev_info
	movq	$0, 16(%r15)
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_SYS_CTRL_HCSL_CTRL_REGOFFSET,4,2 ## @SYS_CTRL_HCSL_CTRL_REGOFFSET
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"core reset failed %d\n"

	.comm	_PCI_CONFIG_VERSION_DEVICEID,8,3 ## @PCI_CONFIG_VERSION_DEVICEID
L_.str.1:                               ## @.str.1
	.asciz	"PCIe version/deviceID 0x%x\n"

	.comm	_VERSION_ID_MAGIC,8,3           ## @VERSION_ID_MAGIC
L_.str.2:                               ## @.str.2
	.asciz	"PCIe controller not found\n"

	.comm	_PCIE_READY_ENTR_L23,4,2        ## @PCIE_READY_ENTR_L23
	.comm	_PCIE_DEVICE_TYPE_MASK,4,2      ## @PCIE_DEVICE_TYPE_MASK
	.comm	_PCIE_DEVICE_TYPE_ROOT,4,2      ## @PCIE_DEVICE_TYPE_ROOT
	.comm	_PCIE_LTSSM,4,2                 ## @PCIE_LTSSM
	.no_dead_strip	_oxnas_pcie_init_hw
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function oxnas_pcie_init_hw
_oxnas_pcie_init_hw:                    ; @oxnas_pcie_init_hw
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #80
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x19, x1
	mov	x20, x0
	ldr	w0, [x1, #40]
	bl	_clk_prepare_enable
	ldr	x0, [x19]
	tbnz	x0, #63, LBB0_3
; %bb.1:
	mov	w1, #0
	bl	_gpio_direction_output
	cbnz	w0, LBB0_3
; %bb.2:
	bl	_wmb
	mov	w0, #10
	bl	_mdelay
	ldr	x0, [x19]
	bl	_gpio_direction_input
	bl	_wmb
	mov	w0, #100
	bl	_mdelay
LBB0_3:
	ldr	w21, [x19, #12]
Lloh0:
	adrp	x8, _SYS_CTRL_HCSL_CTRL_REGOFFSET@GOTPAGE
Lloh1:
	ldr	x8, [x8, _SYS_CTRL_HCSL_CTRL_REGOFFSET@GOTPAGEOFF]
Lloh2:
	ldr	w22, [x8]
	ldr	w0, [x19, #36]
	bl	_BIT
	mov	x23, x0
	ldr	w0, [x19, #36]
	bl	_BIT
	mov	x3, x0
	mov	x0, x21
	mov	x1, x22
	mov	x2, x23
	bl	_regmap_update_bits
	mov	x0, x20
	bl	_device_reset
	cbz	w0, LBB0_5
; %bb.4:
	mov	x2, x0
Lloh3:
	adrp	x1, l_.str@PAGE
Lloh4:
	add	x1, x1, l_.str@PAGEOFF
	mov	x0, x20
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #80
	b	_dev_err
LBB0_5:
	ldr	w0, [x19, #32]
	bl	_clk_prepare_enable
	ldr	x8, [x19, #24]
Lloh5:
	adrp	x9, _PCI_CONFIG_VERSION_DEVICEID@GOTPAGE
Lloh6:
	ldr	x9, [x9, _PCI_CONFIG_VERSION_DEVICEID@GOTPAGEOFF]
Lloh7:
	ldr	x9, [x9]
	add	x0, x9, x8
	bl	_readl_relaxed
	mov	x21, x0
	str	x0, [sp]
Lloh8:
	adrp	x1, l_.str.1@PAGE
Lloh9:
	add	x1, x1, l_.str.1@PAGEOFF
	mov	x0, x20
	bl	_dev_info
Lloh10:
	adrp	x8, _VERSION_ID_MAGIC@GOTPAGE
Lloh11:
	ldr	x8, [x8, _VERSION_ID_MAGIC@GOTPAGEOFF]
Lloh12:
	ldr	x8, [x8]
	cmp	x21, x8
	b.ne	LBB0_7
; %bb.6:
	ldp	w1, w0, [x19, #8]
Lloh13:
	adrp	x8, _PCIE_READY_ENTR_L23@GOTPAGE
Lloh14:
	ldr	x8, [x8, _PCIE_READY_ENTR_L23@GOTPAGEOFF]
Lloh15:
	ldr	w2, [x8]
	mov	x3, x2
	bl	_regmap_write_bits
	ldp	w1, w0, [x19, #8]
Lloh16:
	adrp	x8, _PCIE_DEVICE_TYPE_MASK@GOTPAGE
Lloh17:
	ldr	x8, [x8, _PCIE_DEVICE_TYPE_MASK@GOTPAGEOFF]
Lloh18:
	ldr	w2, [x8]
Lloh19:
	adrp	x8, _PCIE_DEVICE_TYPE_ROOT@GOTPAGE
Lloh20:
	ldr	x8, [x8, _PCIE_DEVICE_TYPE_ROOT@GOTPAGEOFF]
Lloh21:
	ldr	w3, [x8]
	bl	_regmap_write_bits
	bl	_wmb
	ldp	w1, w0, [x19, #8]
Lloh22:
	adrp	x8, _PCIE_LTSSM@GOTPAGE
Lloh23:
	ldr	x8, [x8, _PCIE_LTSSM@GOTPAGEOFF]
Lloh24:
	ldr	w2, [x8]
	mov	x3, x2
	bl	_regmap_write_bits
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #80
	b	_wmb
LBB0_7:
Lloh25:
	adrp	x1, l_.str.2@PAGE
Lloh26:
	add	x1, x1, l_.str.2@PAGEOFF
	mov	x0, x20
	bl	_dev_info
	str	xzr, [x19, #16]
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #80
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpAdd	Lloh3, Lloh4
	.loh AdrpLdrGotLdr	Lloh10, Lloh11, Lloh12
	.loh AdrpAdd	Lloh8, Lloh9
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh22, Lloh23, Lloh24
	.loh AdrpLdrGotLdr	Lloh19, Lloh20, Lloh21
	.loh AdrpLdrGotLdr	Lloh16, Lloh17, Lloh18
	.loh AdrpLdrGotLdr	Lloh13, Lloh14, Lloh15
	.loh AdrpAdd	Lloh25, Lloh26
	.cfi_endproc
                                        ; -- End function
	.comm	_SYS_CTRL_HCSL_CTRL_REGOFFSET,4,2 ; @SYS_CTRL_HCSL_CTRL_REGOFFSET
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"core reset failed %d\n"

	.comm	_PCI_CONFIG_VERSION_DEVICEID,8,3 ; @PCI_CONFIG_VERSION_DEVICEID
l_.str.1:                               ; @.str.1
	.asciz	"PCIe version/deviceID 0x%x\n"

	.comm	_VERSION_ID_MAGIC,8,3           ; @VERSION_ID_MAGIC
l_.str.2:                               ; @.str.2
	.asciz	"PCIe controller not found\n"

	.comm	_PCIE_READY_ENTR_L23,4,2        ; @PCIE_READY_ENTR_L23
	.comm	_PCIE_DEVICE_TYPE_MASK,4,2      ; @PCIE_DEVICE_TYPE_MASK
	.comm	_PCIE_DEVICE_TYPE_ROOT,4,2      ; @PCIE_DEVICE_TYPE_ROOT
	.comm	_PCIE_LTSSM,4,2                 ; @PCIE_LTSSM
	.no_dead_strip	_oxnas_pcie_init_hw
.subsections_via_symbols
