	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function oxnas_pcie_phy_power_on
_oxnas_pcie_phy_power_on:               ## @oxnas_pcie_phy_power_on
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	callq	_phy_get_drvdata
	movq	%rax, %rbx
	movl	$20, %edi
	callq	_ADDR_VAL
	movq	_PHY_ADDR@GOTPCREL(%rip), %r15
	movq	(%r15), %rsi
	addq	(%rbx), %rsi
	movl	%eax, %edi
	callq	_writel
	movl	$52752, %edi                    ## imm = 0xCE10
	callq	_DATA_VAL
	movq	_CAP_DATA@GOTPCREL(%rip), %r12
	orl	(%r12), %eax
	movq	_PHY_DATA@GOTPCREL(%rip), %r14
	movq	(%r14), %rsi
	addq	(%rbx), %rsi
	movl	%eax, %edi
	callq	_writel
	movl	$52752, %edi                    ## imm = 0xCE10
	callq	_DATA_VAL
	movq	_WRITE_EN@GOTPCREL(%rip), %r13
	orl	(%r13), %eax
	movq	(%r14), %rsi
	addq	(%rbx), %rsi
	movl	%eax, %edi
	callq	_writel
	movl	$8196, %edi                     ## imm = 0x2004
	callq	_ADDR_VAL
	movq	(%r15), %rsi
	addq	(%rbx), %rsi
	movl	%eax, %edi
	callq	_writel
	movl	$33479, %edi                    ## imm = 0x82C7
	callq	_DATA_VAL
	orl	(%r12), %eax
	movq	(%r14), %rsi
	addq	(%rbx), %rsi
	movl	%eax, %edi
	callq	_writel
	movl	$33479, %edi                    ## imm = 0x82C7
	callq	_DATA_VAL
	orl	(%r13), %eax
	movq	(%r14), %rsi
	addq	(%rbx), %rsi
	movl	%eax, %edi
	callq	_writel
	xorl	%eax, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_PHY_ADDR,8,3                   ## @PHY_ADDR
	.comm	_CAP_DATA,4,2                   ## @CAP_DATA
	.comm	_PHY_DATA,8,3                   ## @PHY_DATA
	.comm	_WRITE_EN,4,2                   ## @WRITE_EN
	.no_dead_strip	_oxnas_pcie_phy_power_on
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function oxnas_pcie_phy_power_on
_oxnas_pcie_phy_power_on:               ; @oxnas_pcie_phy_power_on
	.cfi_startproc
; %bb.0:
	stp	x24, x23, [sp, #-64]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	bl	_phy_get_drvdata
	mov	x19, x0
	mov	w0, #20
	bl	_ADDR_VAL
	ldr	x8, [x19]
Lloh0:
	adrp	x21, _PHY_ADDR@GOTPAGE
Lloh1:
	ldr	x21, [x21, _PHY_ADDR@GOTPAGEOFF]
	ldr	x9, [x21]
	add	x1, x9, x8
	bl	_writel
	mov	w0, #52752
	bl	_DATA_VAL
Lloh2:
	adrp	x22, _CAP_DATA@GOTPAGE
Lloh3:
	ldr	x22, [x22, _CAP_DATA@GOTPAGEOFF]
	ldr	w8, [x22]
	orr	w0, w8, w0
	ldr	x8, [x19]
Lloh4:
	adrp	x20, _PHY_DATA@GOTPAGE
Lloh5:
	ldr	x20, [x20, _PHY_DATA@GOTPAGEOFF]
	ldr	x9, [x20]
	add	x1, x9, x8
	bl	_writel
	mov	w0, #52752
	bl	_DATA_VAL
Lloh6:
	adrp	x23, _WRITE_EN@GOTPAGE
Lloh7:
	ldr	x23, [x23, _WRITE_EN@GOTPAGEOFF]
	ldr	w8, [x23]
	orr	w0, w8, w0
	ldr	x8, [x19]
	ldr	x9, [x20]
	add	x1, x9, x8
	bl	_writel
	mov	w0, #8196
	bl	_ADDR_VAL
	ldr	x8, [x19]
	ldr	x9, [x21]
	add	x1, x9, x8
	bl	_writel
	mov	w0, #33479
	bl	_DATA_VAL
	ldr	w8, [x22]
	orr	w0, w8, w0
	ldr	x8, [x19]
	ldr	x9, [x20]
	add	x1, x9, x8
	bl	_writel
	mov	w0, #33479
	bl	_DATA_VAL
	ldr	w8, [x23]
	orr	w0, w8, w0
	ldr	x8, [x19]
	ldr	x9, [x20]
	add	x1, x9, x8
	bl	_writel
	mov	w0, #0
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGot	Lloh6, Lloh7
	.loh AdrpLdrGot	Lloh4, Lloh5
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpLdrGot	Lloh0, Lloh1
	.cfi_endproc
                                        ; -- End function
	.comm	_PHY_ADDR,8,3                   ; @PHY_ADDR
	.comm	_CAP_DATA,4,2                   ; @CAP_DATA
	.comm	_PHY_DATA,8,3                   ; @PHY_DATA
	.comm	_WRITE_EN,4,2                   ; @WRITE_EN
	.no_dead_strip	_oxnas_pcie_phy_power_on
.subsections_via_symbols
