	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function oxnas_pcie_enable
_oxnas_pcie_enable:                     ## @oxnas_pcie_enable
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r14
	pushq	%rbx
	subq	$32, %rsp
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	movq	%rsi, %rbx
	movq	%rdi, %r14
	leaq	-48(%rbp), %rdi
	xorl	%esi, %esi
	movl	$32, %edx
	callq	_memset
	movq	_NUM_CONTROLLERS@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	testl	%eax, %eax
	jle	LBB0_7
## %bb.1:
	leaq	-1(%rax), %rdx
	movl	%eax, %ecx
	andl	$3, %ecx
	cmpq	$3, %rdx
	jae	LBB0_3
## %bb.2:
	xorl	%edx, %edx
	jmp	LBB0_5
LBB0_3:
	movl	%eax, %esi
	andl	$-4, %esi
	xorl	%edx, %edx
	.p2align	4, 0x90
LBB0_4:                                 ## =>This Inner Loop Header: Depth=1
	movq	(%rbx), %rdi
	movq	%rbx, (%rdi,%rdx,8)
	movq	(%rbx), %rdi
	movq	%rbx, 8(%rdi,%rdx,8)
	movq	(%rbx), %rdi
	movq	%rbx, 16(%rdi,%rdx,8)
	movq	(%rbx), %rdi
	movq	%rbx, 24(%rdi,%rdx,8)
	addq	$4, %rdx
	cmpq	%rdx, %rsi
	jne	LBB0_4
LBB0_5:
	testq	%rcx, %rcx
	je	LBB0_7
	.p2align	4, 0x90
LBB0_6:                                 ## =>This Inner Loop Header: Depth=1
	movq	(%rbx), %rsi
	movq	%rbx, (%rsi,%rdx,8)
	incq	%rdx
	decq	%rcx
	jne	LBB0_6
LBB0_7:
	movl	%eax, -48(%rbp)
	movq	(%rbx), %rax
	movq	%rax, -24(%rbp)
	movq	_oxnas_pcie_setup@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, -28(%rbp)
	movq	_of_irq_parse_and_map_pci@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, -32(%rbp)
	movq	_oxnas_pcie_ops@GOTPCREL(%rip), %rax
	movq	%rax, -40(%rbp)
	leaq	-48(%rbp), %rsi
	movq	%r14, %rdi
	callq	_pci_common_init_dev
	addq	$32, %rsp
	popq	%rbx
	popq	%r14
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_NUM_CONTROLLERS,4,2            ## @NUM_CONTROLLERS
	.comm	_oxnas_pcie_setup,4,2           ## @oxnas_pcie_setup
	.comm	_of_irq_parse_and_map_pci,4,2   ## @of_irq_parse_and_map_pci
	.comm	_oxnas_pcie_ops,4,2             ## @oxnas_pcie_ops
	.no_dead_strip	_oxnas_pcie_enable
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function oxnas_pcie_enable
_oxnas_pcie_enable:                     ; @oxnas_pcie_enable
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #64
	.cfi_def_cfa_offset 64
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x20, x1
	mov	x19, x0
	mov	x0, sp
	mov	w1, #0
	mov	w2, #32
	bl	_memset
Lloh0:
	adrp	x8, _NUM_CONTROLLERS@GOTPAGE
Lloh1:
	ldr	x8, [x8, _NUM_CONTROLLERS@GOTPAGEOFF]
Lloh2:
	ldr	w8, [x8]
	cmp	w8, #1
	b.lt	LBB0_3
; %bb.1:
	mov	x9, #0
	lsl	x10, x8, #3
LBB0_2:                                 ; =>This Inner Loop Header: Depth=1
	ldr	x11, [x20]
	str	x20, [x11, x9]
	add	x9, x9, #8
	cmp	x10, x9
	b.ne	LBB0_2
LBB0_3:
	str	w8, [sp]
	ldr	x8, [x20]
	str	x8, [sp, #24]
Lloh3:
	adrp	x8, _oxnas_pcie_setup@GOTPAGE
Lloh4:
	ldr	x8, [x8, _oxnas_pcie_setup@GOTPAGEOFF]
Lloh5:
	ldr	w8, [x8]
Lloh6:
	adrp	x9, _of_irq_parse_and_map_pci@GOTPAGE
Lloh7:
	ldr	x9, [x9, _of_irq_parse_and_map_pci@GOTPAGEOFF]
Lloh8:
	ldr	w9, [x9]
	stp	w9, w8, [sp, #16]
Lloh9:
	adrp	x8, _oxnas_pcie_ops@GOTPAGE
Lloh10:
	ldr	x8, [x8, _oxnas_pcie_ops@GOTPAGEOFF]
	str	x8, [sp, #8]
	mov	x1, sp
	mov	x0, x19
	bl	_pci_common_init_dev
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	add	sp, sp, #64
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGot	Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.cfi_endproc
                                        ; -- End function
	.comm	_NUM_CONTROLLERS,4,2            ; @NUM_CONTROLLERS
	.comm	_oxnas_pcie_setup,4,2           ; @oxnas_pcie_setup
	.comm	_of_irq_parse_and_map_pci,4,2   ; @of_irq_parse_and_map_pci
	.comm	_oxnas_pcie_ops,4,2             ; @oxnas_pcie_ops
	.no_dead_strip	_oxnas_pcie_enable
.subsections_via_symbols
