	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function ar7240_probe
_ar7240_probe:                          ## @ar7240_probe
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$24, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r15
	callq	_ag71xx_get_pdata
	movq	%rax, %r12
	movq	8(%r15), %rbx
	movq	_MII_PHYSID1@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	_ar7240sw_phy_read
	movq	%rax, %r14
	movq	_MII_PHYSID2@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	_ar7240sw_phy_read
	movq	%rax, %r13
	movq	_AR7240_PHY_ID1@GOTPCREL(%rip), %rax
	cmpq	(%rax), %r14
	jne	LBB0_2
## %bb.1:
	movq	_AR7240_PHY_ID2@GOTPCREL(%rip), %rax
	cmpq	(%rax), %r13
	je	LBB0_5
LBB0_2:
	movq	_AR934X_PHY_ID1@GOTPCREL(%rip), %rax
	cmpq	(%rax), %r14
	jne	LBB0_4
## %bb.3:
	movq	_AR934X_PHY_ID2@GOTPCREL(%rip), %rax
	cmpq	(%rax), %r13
	jne	LBB0_4
LBB0_5:
	movq	%rbx, %r14
	movq	%r15, -56(%rbp)                 ## 8-byte Spill
	movq	%r12, %rbx
	movq	_GFP_KERNEL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	$80, %edi
	callq	_kzalloc
	testq	%rax, %rax
	je	LBB0_25
## %bb.6:
	movq	%rax, %r15
	movq	%r14, %rdi
	movq	%r14, 72(%rax)
	movq	8(%rbx), %rax
	movq	%rax, 64(%r15)
	movq	%r15, %r12
	addq	$24, %r12
	movq	_AR7240_REG_MASK_CTRL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_ar7240sw_reg_read
	movl	%eax, %r13d
	movq	_AR7240_MASK_CTRL_VERSION_S@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	movl	%r13d, %eax
	sarl	%cl, %eax
	movq	_AR7240_MASK_CTRL_VERSION_M@GOTPCREL(%rip), %rcx
	andl	(%rcx), %eax
	movl	%eax, (%r15)
	movq	%r15, %rdi
	callq	_sw_is_ar7240
	testq	%rax, %rax
	je	LBB0_9
## %bb.7:
	leaq	L_.str.1(%rip), %rax
	movq	%rax, (%r12)
LBB0_8:
	movq	_AR7240_NUM_PORTS@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	decq	%rax
LBB0_18:
	movq	%rax, 56(%r15)
	movq	_AR7240_PORT_CPU@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 48(%r15)
	movq	_AR7240_MAX_VLANS@GOTPCREL(%rip), %rbx
	movl	(%rbx), %eax
	movl	%eax, 32(%r15)
	movq	_ar7240_ops@GOTPCREL(%rip), %rax
	movq	%rax, 40(%r15)
	movq	-56(%rbp), %rax                 ## 8-byte Reload
	movl	(%rax), %esi
	movq	%r12, %rdi
	callq	_register_switch
	testq	%rax, %rax
	js	LBB0_24
## %bb.19:
	movq	%r14, %rdi
	callq	_dev_name
	movq	(%r12), %rdx
	leaq	L_.str.5(%rip), %rdi
	movl	%eax, %esi
	callq	_pr_info
	cmpl	$0, (%rbx)
	jle	LBB0_22
## %bb.20:
	movq	8(%r15), %rax
	xorl	%ecx, %ecx
	.p2align	4, 0x90
LBB0_21:                                ## =>This Inner Loop Header: Depth=1
	movl	%ecx, (%rax,%rcx,4)
	incq	%rcx
	movslq	(%rbx), %rdx
	cmpq	%rdx, %rcx
	jl	LBB0_21
LBB0_22:
	movq	%r15, %rdi
	callq	_ar7240sw_port_mask_all
	movq	16(%r15), %rcx
	movl	%eax, (%rcx)
	jmp	LBB0_26
LBB0_4:
	movq	%rbx, %rdi
	callq	_dev_name
	leaq	L_.str(%rip), %rdi
	xorl	%r15d, %r15d
	movl	%eax, %esi
	movq	%r14, %rdx
	movq	%r13, %rcx
	xorl	%eax, %eax
	callq	_pr_err
	jmp	LBB0_26
LBB0_9:
	movl	%r13d, -44(%rbp)                ## 4-byte Spill
	movq	%r15, %rdi
	callq	_sw_is_ar934x
	testq	%rax, %rax
	je	LBB0_16
## %bb.10:
	leaq	L_.str.2(%rip), %rax
	movq	%rax, (%r12)
	movq	(%rbx), %rax
	movq	_PHY_INTERFACE_MODE_GMII@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jne	LBB0_12
## %bb.11:
	movq	_AR934X_OPER_MODE0_MAC_GMII_EN@GOTPCREL(%rip), %rax
	jmp	LBB0_14
LBB0_16:
	movq	%r14, %rdi
	callq	_dev_name
	leaq	L_.str.4(%rip), %rdi
	movl	%eax, %esi
	movl	-44(%rbp), %edx                 ## 4-byte Reload
	xorl	%eax, %eax
	callq	_pr_err
	jmp	LBB0_24
LBB0_12:
	movq	_PHY_INTERFACE_MODE_MII@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jne	LBB0_23
## %bb.13:
	movq	_AR934X_OPER_MODE0_PHY_MII_EN@GOTPCREL(%rip), %rax
LBB0_14:
	movq	_AR934X_REG_OPER_MODE0@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	movl	(%rax), %edx
	movq	%r14, %rbx
	movq	%r14, %rdi
	callq	_ar7240sw_reg_set
	movq	64(%r15), %rax
	cmpq	$0, (%rax)
	je	LBB0_17
## %bb.15:
	movq	_AR934X_REG_OPER_MODE1@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_AR934X_REG_OPER_MODE1_PHY4_MII_EN@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	callq	_ar7240sw_reg_set
	jmp	LBB0_8
LBB0_23:
	movq	%r14, %rdi
	callq	_dev_name
	leaq	L_.str.3(%rip), %rdi
	movl	%eax, %esi
	xorl	%eax, %eax
	callq	_pr_err
LBB0_24:
	movq	%r15, %rdi
	callq	_kfree
LBB0_25:
	xorl	%r15d, %r15d
LBB0_26:
	movq	%r15, %rax
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_17:
	movq	_AR7240_NUM_PORTS@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	jmp	LBB0_18
	.cfi_endproc
                                        ## -- End function
	.comm	_MII_PHYSID1,4,2                ## @MII_PHYSID1
	.comm	_MII_PHYSID2,4,2                ## @MII_PHYSID2
	.comm	_AR7240_PHY_ID1,8,3             ## @AR7240_PHY_ID1
	.comm	_AR7240_PHY_ID2,8,3             ## @AR7240_PHY_ID2
	.comm	_AR934X_PHY_ID1,8,3             ## @AR934X_PHY_ID1
	.comm	_AR934X_PHY_ID2,8,3             ## @AR934X_PHY_ID2
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"%s: unknown phy id '%04x:%04x'\n"

	.comm	_GFP_KERNEL,4,2                 ## @GFP_KERNEL
	.comm	_AR7240_REG_MASK_CTRL,4,2       ## @AR7240_REG_MASK_CTRL
	.comm	_AR7240_MASK_CTRL_VERSION_S,4,2 ## @AR7240_MASK_CTRL_VERSION_S
	.comm	_AR7240_MASK_CTRL_VERSION_M,4,2 ## @AR7240_MASK_CTRL_VERSION_M
L_.str.1:                               ## @.str.1
	.asciz	"AR7240/AR9330 built-in switch"

	.comm	_AR7240_NUM_PORTS,8,3           ## @AR7240_NUM_PORTS
L_.str.2:                               ## @.str.2
	.asciz	"AR934X built-in switch"

	.comm	_PHY_INTERFACE_MODE_GMII,8,3    ## @PHY_INTERFACE_MODE_GMII
	.comm	_AR934X_REG_OPER_MODE0,4,2      ## @AR934X_REG_OPER_MODE0
	.comm	_AR934X_OPER_MODE0_MAC_GMII_EN,4,2 ## @AR934X_OPER_MODE0_MAC_GMII_EN
	.comm	_PHY_INTERFACE_MODE_MII,8,3     ## @PHY_INTERFACE_MODE_MII
	.comm	_AR934X_OPER_MODE0_PHY_MII_EN,4,2 ## @AR934X_OPER_MODE0_PHY_MII_EN
L_.str.3:                               ## @.str.3
	.asciz	"%s: invalid PHY interface mode\n"

	.comm	_AR934X_REG_OPER_MODE1,4,2      ## @AR934X_REG_OPER_MODE1
	.comm	_AR934X_REG_OPER_MODE1_PHY4_MII_EN,4,2 ## @AR934X_REG_OPER_MODE1_PHY4_MII_EN
L_.str.4:                               ## @.str.4
	.asciz	"%s: unsupported chip, ctrl=%08x\n"

	.comm	_AR7240_PORT_CPU,4,2            ## @AR7240_PORT_CPU
	.comm	_AR7240_MAX_VLANS,4,2           ## @AR7240_MAX_VLANS
	.comm	_ar7240_ops,4,2                 ## @ar7240_ops
L_.str.5:                               ## @.str.5
	.asciz	"%s: Found an %s\n"

	.no_dead_strip	_ar7240_probe
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function ar7240_probe
_ar7240_probe:                          ; @ar7240_probe
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #80
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x21, x0
	bl	_ag71xx_get_pdata
	mov	x23, x0
	ldr	x20, [x21, #8]
Lloh0:
	adrp	x8, _MII_PHYSID1@GOTPAGE
Lloh1:
	ldr	x8, [x8, _MII_PHYSID1@GOTPAGEOFF]
Lloh2:
	ldr	w2, [x8]
	mov	x0, x20
	mov	w1, #0
	bl	_ar7240sw_phy_read
	mov	x19, x0
Lloh3:
	adrp	x8, _MII_PHYSID2@GOTPAGE
Lloh4:
	ldr	x8, [x8, _MII_PHYSID2@GOTPAGEOFF]
Lloh5:
	ldr	w2, [x8]
	mov	x0, x20
	mov	w1, #0
	bl	_ar7240sw_phy_read
Lloh6:
	adrp	x8, _AR7240_PHY_ID1@GOTPAGE
Lloh7:
	ldr	x8, [x8, _AR7240_PHY_ID1@GOTPAGEOFF]
Lloh8:
	ldr	x8, [x8]
Lloh9:
	adrp	x9, _AR7240_PHY_ID2@GOTPAGE
Lloh10:
	ldr	x9, [x9, _AR7240_PHY_ID2@GOTPAGEOFF]
Lloh11:
	ldr	x9, [x9]
	cmp	x19, x8
	ccmp	x0, x9, #0, eq
	b.eq	LBB0_3
; %bb.1:
	mov	x22, x0
Lloh12:
	adrp	x8, _AR934X_PHY_ID1@GOTPAGE
Lloh13:
	ldr	x8, [x8, _AR934X_PHY_ID1@GOTPAGEOFF]
Lloh14:
	ldr	x8, [x8]
Lloh15:
	adrp	x9, _AR934X_PHY_ID2@GOTPAGE
Lloh16:
	ldr	x9, [x9, _AR934X_PHY_ID2@GOTPAGEOFF]
Lloh17:
	ldr	x9, [x9]
	cmp	x19, x8
	ccmp	x0, x9, #0, eq
	b.eq	LBB0_3
; %bb.2:
	mov	x0, x20
	bl	_dev_name
	mov	x1, x0
	stp	x19, x22, [sp]
Lloh18:
	adrp	x0, l_.str@PAGE
Lloh19:
	add	x0, x0, l_.str@PAGEOFF
	bl	_pr_err
	b	LBB0_24
LBB0_3:
Lloh20:
	adrp	x8, _GFP_KERNEL@GOTPAGE
Lloh21:
	ldr	x8, [x8, _GFP_KERNEL@GOTPAGEOFF]
Lloh22:
	ldr	w1, [x8]
	mov	w0, #80
	bl	_kzalloc
	mov	x19, x0
	cbz	x0, LBB0_25
; %bb.4:
	ldr	x8, [x23, #8]
	stp	x8, x20, [x19, #64]
	add	x22, x19, #24
Lloh23:
	adrp	x8, _AR7240_REG_MASK_CTRL@GOTPAGE
Lloh24:
	ldr	x8, [x8, _AR7240_REG_MASK_CTRL@GOTPAGEOFF]
Lloh25:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_ar7240sw_reg_read
	mov	x24, x0
Lloh26:
	adrp	x8, _AR7240_MASK_CTRL_VERSION_S@GOTPAGE
Lloh27:
	ldr	x8, [x8, _AR7240_MASK_CTRL_VERSION_S@GOTPAGEOFF]
Lloh28:
	ldr	w8, [x8]
	asr	w8, w0, w8
Lloh29:
	adrp	x9, _AR7240_MASK_CTRL_VERSION_M@GOTPAGE
Lloh30:
	ldr	x9, [x9, _AR7240_MASK_CTRL_VERSION_M@GOTPAGEOFF]
Lloh31:
	ldr	w9, [x9]
	and	w8, w8, w9
	str	w8, [x19]
	mov	x0, x19
	bl	_sw_is_ar7240
	cbz	x0, LBB0_12
; %bb.5:
Lloh32:
	adrp	x8, l_.str.1@PAGE
Lloh33:
	add	x8, x8, l_.str.1@PAGEOFF
	str	x8, [x22]
LBB0_6:
Lloh34:
	adrp	x8, _AR7240_NUM_PORTS@GOTPAGE
Lloh35:
	ldr	x8, [x8, _AR7240_NUM_PORTS@GOTPAGEOFF]
Lloh36:
	ldr	x8, [x8]
	sub	x8, x8, #1
LBB0_7:
	str	x8, [x19, #56]
Lloh37:
	adrp	x8, _AR7240_PORT_CPU@GOTPAGE
Lloh38:
	ldr	x8, [x8, _AR7240_PORT_CPU@GOTPAGEOFF]
Lloh39:
	ldr	w8, [x8]
	str	w8, [x19, #48]
Lloh40:
	adrp	x23, _AR7240_MAX_VLANS@GOTPAGE
Lloh41:
	ldr	x23, [x23, _AR7240_MAX_VLANS@GOTPAGEOFF]
	ldr	w8, [x23]
	str	w8, [x19, #32]
Lloh42:
	adrp	x8, _ar7240_ops@GOTPAGE
Lloh43:
	ldr	x8, [x8, _ar7240_ops@GOTPAGEOFF]
	str	x8, [x19, #40]
	ldr	w1, [x21]
	mov	x0, x22
	bl	_register_switch
	tbnz	x0, #63, LBB0_23
; %bb.8:
	mov	x0, x20
	bl	_dev_name
	mov	x1, x0
	ldr	x2, [x22]
Lloh44:
	adrp	x0, l_.str.5@PAGE
Lloh45:
	add	x0, x0, l_.str.5@PAGEOFF
	bl	_pr_info
	ldr	w8, [x23]
	cmp	w8, #1
	b.lt	LBB0_11
; %bb.9:
	mov	x8, #0
	ldr	x9, [x19, #8]
LBB0_10:                                ; =>This Inner Loop Header: Depth=1
	str	w8, [x9, x8, lsl #2]
	add	x8, x8, #1
	ldrsw	x10, [x23]
	cmp	x8, x10
	b.lt	LBB0_10
LBB0_11:
	mov	x0, x19
	bl	_ar7240sw_port_mask_all
	ldr	x8, [x19, #16]
	str	w0, [x8]
	b	LBB0_25
LBB0_12:
	mov	x0, x19
	bl	_sw_is_ar934x
	cbz	x0, LBB0_15
; %bb.13:
Lloh46:
	adrp	x8, l_.str.2@PAGE
Lloh47:
	add	x8, x8, l_.str.2@PAGEOFF
	str	x8, [x22]
	ldr	x8, [x23]
Lloh48:
	adrp	x9, _PHY_INTERFACE_MODE_GMII@GOTPAGE
Lloh49:
	ldr	x9, [x9, _PHY_INTERFACE_MODE_GMII@GOTPAGEOFF]
Lloh50:
	ldr	x9, [x9]
	cmp	x8, x9
	b.ne	LBB0_16
; %bb.14:
Lloh51:
	adrp	x8, _AR934X_OPER_MODE0_MAC_GMII_EN@GOTPAGE
Lloh52:
	ldr	x8, [x8, _AR934X_OPER_MODE0_MAC_GMII_EN@GOTPAGEOFF]
	b	LBB0_18
LBB0_15:
	mov	x0, x20
	bl	_dev_name
	mov	x1, x0
	str	x24, [sp]
Lloh53:
	adrp	x0, l_.str.4@PAGE
Lloh54:
	add	x0, x0, l_.str.4@PAGEOFF
	b	LBB0_22
LBB0_16:
Lloh55:
	adrp	x9, _PHY_INTERFACE_MODE_MII@GOTPAGE
Lloh56:
	ldr	x9, [x9, _PHY_INTERFACE_MODE_MII@GOTPAGEOFF]
Lloh57:
	ldr	x9, [x9]
	cmp	x8, x9
	b.ne	LBB0_21
; %bb.17:
Lloh58:
	adrp	x8, _AR934X_OPER_MODE0_PHY_MII_EN@GOTPAGE
Lloh59:
	ldr	x8, [x8, _AR934X_OPER_MODE0_PHY_MII_EN@GOTPAGEOFF]
LBB0_18:
Lloh60:
	adrp	x9, _AR934X_REG_OPER_MODE0@GOTPAGE
Lloh61:
	ldr	x9, [x9, _AR934X_REG_OPER_MODE0@GOTPAGEOFF]
Lloh62:
	ldr	w1, [x9]
	ldr	w2, [x8]
	mov	x0, x20
	bl	_ar7240sw_reg_set
	ldr	x8, [x19, #64]
	ldr	x8, [x8]
	cbz	x8, LBB0_20
; %bb.19:
Lloh63:
	adrp	x8, _AR934X_REG_OPER_MODE1@GOTPAGE
Lloh64:
	ldr	x8, [x8, _AR934X_REG_OPER_MODE1@GOTPAGEOFF]
Lloh65:
	ldr	w1, [x8]
Lloh66:
	adrp	x8, _AR934X_REG_OPER_MODE1_PHY4_MII_EN@GOTPAGE
Lloh67:
	ldr	x8, [x8, _AR934X_REG_OPER_MODE1_PHY4_MII_EN@GOTPAGEOFF]
Lloh68:
	ldr	w2, [x8]
	mov	x0, x20
	bl	_ar7240sw_reg_set
	b	LBB0_6
LBB0_20:
Lloh69:
	adrp	x8, _AR7240_NUM_PORTS@GOTPAGE
Lloh70:
	ldr	x8, [x8, _AR7240_NUM_PORTS@GOTPAGEOFF]
Lloh71:
	ldr	x8, [x8]
	b	LBB0_7
LBB0_21:
	mov	x0, x20
	bl	_dev_name
	mov	x1, x0
Lloh72:
	adrp	x0, l_.str.3@PAGE
Lloh73:
	add	x0, x0, l_.str.3@PAGEOFF
LBB0_22:
	bl	_pr_err
LBB0_23:
	mov	x0, x19
	bl	_kfree
LBB0_24:
	mov	x19, #0
LBB0_25:
	mov	x0, x19
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #80
	ret
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpAdd	Lloh18, Lloh19
	.loh AdrpLdrGotLdr	Lloh20, Lloh21, Lloh22
	.loh AdrpLdrGotLdr	Lloh29, Lloh30, Lloh31
	.loh AdrpLdrGotLdr	Lloh26, Lloh27, Lloh28
	.loh AdrpLdrGotLdr	Lloh23, Lloh24, Lloh25
	.loh AdrpAdd	Lloh32, Lloh33
	.loh AdrpLdrGotLdr	Lloh34, Lloh35, Lloh36
	.loh AdrpLdrGot	Lloh42, Lloh43
	.loh AdrpLdrGot	Lloh40, Lloh41
	.loh AdrpLdrGotLdr	Lloh37, Lloh38, Lloh39
	.loh AdrpAdd	Lloh44, Lloh45
	.loh AdrpLdrGotLdr	Lloh48, Lloh49, Lloh50
	.loh AdrpAdd	Lloh46, Lloh47
	.loh AdrpLdrGot	Lloh51, Lloh52
	.loh AdrpAdd	Lloh53, Lloh54
	.loh AdrpLdrGotLdr	Lloh55, Lloh56, Lloh57
	.loh AdrpLdrGot	Lloh58, Lloh59
	.loh AdrpLdrGotLdr	Lloh60, Lloh61, Lloh62
	.loh AdrpLdrGotLdr	Lloh66, Lloh67, Lloh68
	.loh AdrpLdrGotLdr	Lloh63, Lloh64, Lloh65
	.loh AdrpLdrGotLdr	Lloh69, Lloh70, Lloh71
	.loh AdrpAdd	Lloh72, Lloh73
	.cfi_endproc
                                        ; -- End function
	.comm	_MII_PHYSID1,4,2                ; @MII_PHYSID1
	.comm	_MII_PHYSID2,4,2                ; @MII_PHYSID2
	.comm	_AR7240_PHY_ID1,8,3             ; @AR7240_PHY_ID1
	.comm	_AR7240_PHY_ID2,8,3             ; @AR7240_PHY_ID2
	.comm	_AR934X_PHY_ID1,8,3             ; @AR934X_PHY_ID1
	.comm	_AR934X_PHY_ID2,8,3             ; @AR934X_PHY_ID2
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"%s: unknown phy id '%04x:%04x'\n"

	.comm	_GFP_KERNEL,4,2                 ; @GFP_KERNEL
	.comm	_AR7240_REG_MASK_CTRL,4,2       ; @AR7240_REG_MASK_CTRL
	.comm	_AR7240_MASK_CTRL_VERSION_S,4,2 ; @AR7240_MASK_CTRL_VERSION_S
	.comm	_AR7240_MASK_CTRL_VERSION_M,4,2 ; @AR7240_MASK_CTRL_VERSION_M
l_.str.1:                               ; @.str.1
	.asciz	"AR7240/AR9330 built-in switch"

	.comm	_AR7240_NUM_PORTS,8,3           ; @AR7240_NUM_PORTS
l_.str.2:                               ; @.str.2
	.asciz	"AR934X built-in switch"

	.comm	_PHY_INTERFACE_MODE_GMII,8,3    ; @PHY_INTERFACE_MODE_GMII
	.comm	_AR934X_REG_OPER_MODE0,4,2      ; @AR934X_REG_OPER_MODE0
	.comm	_AR934X_OPER_MODE0_MAC_GMII_EN,4,2 ; @AR934X_OPER_MODE0_MAC_GMII_EN
	.comm	_PHY_INTERFACE_MODE_MII,8,3     ; @PHY_INTERFACE_MODE_MII
	.comm	_AR934X_OPER_MODE0_PHY_MII_EN,4,2 ; @AR934X_OPER_MODE0_PHY_MII_EN
l_.str.3:                               ; @.str.3
	.asciz	"%s: invalid PHY interface mode\n"

	.comm	_AR934X_REG_OPER_MODE1,4,2      ; @AR934X_REG_OPER_MODE1
	.comm	_AR934X_REG_OPER_MODE1_PHY4_MII_EN,4,2 ; @AR934X_REG_OPER_MODE1_PHY4_MII_EN
l_.str.4:                               ; @.str.4
	.asciz	"%s: unsupported chip, ctrl=%08x\n"

	.comm	_AR7240_PORT_CPU,4,2            ; @AR7240_PORT_CPU
	.comm	_AR7240_MAX_VLANS,4,2           ; @AR7240_MAX_VLANS
	.comm	_ar7240_ops,4,2                 ; @ar7240_ops
l_.str.5:                               ; @.str.5
	.asciz	"%s: Found an %s\n"

	.no_dead_strip	_ar7240_probe
.subsections_via_symbols
