	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function mtk_ppe_start
_mtk_ppe_start:                         ## @mtk_ppe_start
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %rbx
	callq	_mtk_init_foe_table
	movl	%eax, %r14d
	testl	%eax, %eax
	jne	LBB0_2
## %bb.1:
	movl	(%rbx), %esi
	movq	_MTK_REG_PPE_TB_BASE@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	callq	_mtk_w32
	movl	8(%rbx), %edi
	movq	_MTK_PPE_TBL_SZ@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	xorl	%esi, %esi
	callq	_memset
	movq	_MTK_PPE_TB_CFG_HASH_MODE_MASK@GOTPCREL(%rip), %rax
	movq	_MTK_PPE_TB_CFG_TBL_SZ_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	orl	(%rax), %esi
	movq	_MTK_PPE_TB_CFG_HASH_MODE1@GOTPCREL(%rip), %rax
	movq	_MTK_PPE_TB_CFG_TBL_SZ_4K@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	orl	(%rax), %edx
	movq	_MTK_REG_PPE_TB_CFG@GOTPCREL(%rip), %r15
	movl	(%r15), %ecx
	movq	%rbx, %rdi
	callq	_mtk_m32
	movq	_MTK_PPE_HASH_SEED@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_MTK_REG_PPE_HASH_SEED@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	callq	_mtk_w32
	movq	_MTK_PPE_CAH_CTRL_X_MODE@GOTPCREL(%rip), %r12
	movq	_MTK_PPE_TB_CFG_ENTRY_SZ_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	orl	(%r12), %esi
	movq	_MTK_PPE_TB_CFG_SMA_MASK@GOTPCREL(%rip), %rax
	orl	(%rax), %esi
	movq	_MTK_PPE_TB_CFG_ENTRY_SZ_64B@GOTPCREL(%rip), %rax
	movq	_MTK_PPE_TB_CFG_SMA_FWD_CPU@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	orl	(%rax), %edx
	movl	(%r15), %ecx
	movq	%rbx, %rdi
	callq	_mtk_m32
	movq	_MTK_REG_PPE_IP_PROT_CHK@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	movl	$-1, %esi
	callq	_mtk_w32
	movl	(%r12), %edx
	movq	_MTK_REG_PPE_CAH_CTRL@GOTPCREL(%rip), %r13
	movl	(%r13), %ecx
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	_mtk_m32
	movl	(%r12), %esi
	movq	_MTK_PPE_CAH_CTRL_EN@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movl	(%r13), %ecx
	movq	%rbx, %rdi
	callq	_mtk_m32
	movq	_MTK_PPE_FLOW_CFG_IPV4_NAT_FRAG_EN@GOTPCREL(%rip), %rax
	movq	_MTK_PPE_FLOW_CFG_IPV4_NAPT_EN@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	orl	(%rax), %edx
	movq	_MTK_PPE_FLOW_CFG_IPV4_NAT_EN@GOTPCREL(%rip), %rax
	orl	(%rax), %edx
	movq	_MTK_PPE_FLOW_CFG_IPV4_GREK_EN@GOTPCREL(%rip), %rax
	orl	(%rax), %edx
	movq	_MTK_REG_PPE_FLOW_CFG@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	_mtk_m32
	movq	_MTK_PPE_TB_CFG_UNBD_AGE@GOTPCREL(%rip), %rax
	movq	_MTK_PPE_TB_CFG_NTU_AGE@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	orl	(%rax), %edx
	movq	_MTK_PPE_TB_CFG_FIN_AGE@GOTPCREL(%rip), %rax
	orl	(%rax), %edx
	movq	_MTK_PPE_TB_CFG_UDP_AGE@GOTPCREL(%rip), %rax
	orl	(%rax), %edx
	movq	_MTK_PPE_TB_CFG_TCP_AGE@GOTPCREL(%rip), %rax
	orl	(%rax), %edx
	movl	(%r15), %ecx
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	_mtk_m32
	movq	_MTK_PPE_UNB_AGE_MNP_MASK@GOTPCREL(%rip), %rax
	movq	_MTK_PPE_UNB_AGE_DLTA_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	orl	(%rax), %esi
	movq	_MTK_PPE_UNB_AGE_MNP@GOTPCREL(%rip), %rax
	movq	_MTK_PPE_UNB_AGE_DLTA@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	orl	(%rax), %edx
	movq	_MTK_REG_PPE_UNB_AGE@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movq	%rbx, %rdi
	callq	_mtk_m32
	movq	_MTK_PPE_BND_AGE0_NTU_DLTA_MASK@GOTPCREL(%rip), %rax
	movq	_MTK_PPE_BND_AGE0_UDP_DLTA_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	orl	(%rax), %esi
	movq	_MTK_PPE_BND_AGE0_NTU_DLTA@GOTPCREL(%rip), %rax
	movq	_MTK_PPE_BND_AGE0_UDP_DLTA@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	orl	(%rax), %edx
	movq	_MTK_REG_PPE_BND_AGE0@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movq	%rbx, %rdi
	callq	_mtk_m32
	movq	_MTK_PPE_BND_AGE1_FIN_DLTA_MASK@GOTPCREL(%rip), %rax
	movq	_MTK_PPE_BND_AGE1_TCP_DLTA_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	orl	(%rax), %esi
	movq	_MTK_PPE_BND_AGE1_FIN_DLTA@GOTPCREL(%rip), %rax
	movq	_MTK_PPE_BND_AGE1_TCP_DLTA@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	orl	(%rax), %edx
	movq	_MTK_REG_PPE_BND_AGE1@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movq	%rbx, %rdi
	callq	_mtk_m32
	movq	_MTK_PPE_TB_CFG_KA_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_MTK_PPE_TB_CFG_KA@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movl	(%r15), %ecx
	movq	%rbx, %rdi
	callq	_mtk_m32
	movq	_MTK_PPE_KA_UDP@GOTPCREL(%rip), %rax
	movq	_MTK_PPE_KA_TCP@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	orl	(%rax), %esi
	movq	_MTK_PPE_KA_T@GOTPCREL(%rip), %rax
	orl	(%rax), %esi
	movq	_MTK_REG_PPE_KA@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	callq	_mtk_w32
	movq	_MTK_REG_PPE_BIND_LMT_0@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	movl	$1073692671, %esi               ## imm = 0x3FFF3FFF
	callq	_mtk_w32
	movq	_MTK_PPE_NTU_KA@GOTPCREL(%rip), %rax
	movl	$16383, %esi                    ## imm = 0x3FFF
	orl	(%rax), %esi
	movq	_MTK_REG_PPE_BIND_LMT_1@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	callq	_mtk_w32
	movq	_MTK_PPE_BNDR_RATE_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_MTK_REG_PPE_BNDR@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movq	%rbx, %rdi
	movl	$1, %edx
	callq	_mtk_m32
	movq	_MTK_PPE_GLO_CFG_EN@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	_MTK_REG_PPE_GLO_CFG@GOTPCREL(%rip), %r15
	movl	(%r15), %ecx
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	_mtk_m32
	movq	_MTK_REG_PPE_DFT_CPORT@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	movl	$1431655765, %esi               ## imm = 0x55555555
	callq	_mtk_w32
	movq	_MTK_PPE_GLO_CFG_TTL0_DROP@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	(%r15), %ecx
	movq	%rbx, %rdi
	xorl	%edx, %edx
	callq	_mtk_m32
	xorl	%edi, %edi
	callq	_MTK_GDMA_FWD_CFG
	movq	%rbx, %rdi
	movl	$65535, %esi                    ## imm = 0xFFFF
	movl	$17476, %edx                    ## imm = 0x4444
	movl	%eax, %ecx
	callq	_mtk_m32
	movl	$1, %edi
	callq	_MTK_GDMA_FWD_CFG
	movq	%rbx, %rdi
	movl	$65535, %esi                    ## imm = 0xFFFF
	movl	$17476, %edx                    ## imm = 0x4444
	movl	%eax, %ecx
	callq	_mtk_m32
	movl	4(%rbx), %edi
	leaq	L_.str(%rip), %rsi
	callq	_dev_info
LBB0_2:
	movl	%r14d, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_MTK_REG_PPE_TB_BASE,4,2        ## @MTK_REG_PPE_TB_BASE
	.comm	_MTK_PPE_TBL_SZ,4,2             ## @MTK_PPE_TBL_SZ
	.comm	_MTK_PPE_TB_CFG_HASH_MODE_MASK,4,2 ## @MTK_PPE_TB_CFG_HASH_MODE_MASK
	.comm	_MTK_PPE_TB_CFG_TBL_SZ_MASK,4,2 ## @MTK_PPE_TB_CFG_TBL_SZ_MASK
	.comm	_MTK_PPE_TB_CFG_HASH_MODE1,4,2  ## @MTK_PPE_TB_CFG_HASH_MODE1
	.comm	_MTK_PPE_TB_CFG_TBL_SZ_4K,4,2   ## @MTK_PPE_TB_CFG_TBL_SZ_4K
	.comm	_MTK_REG_PPE_TB_CFG,4,2         ## @MTK_REG_PPE_TB_CFG
	.comm	_MTK_PPE_HASH_SEED,4,2          ## @MTK_PPE_HASH_SEED
	.comm	_MTK_REG_PPE_HASH_SEED,4,2      ## @MTK_REG_PPE_HASH_SEED
	.comm	_MTK_PPE_CAH_CTRL_X_MODE,4,2    ## @MTK_PPE_CAH_CTRL_X_MODE
	.comm	_MTK_PPE_TB_CFG_ENTRY_SZ_MASK,4,2 ## @MTK_PPE_TB_CFG_ENTRY_SZ_MASK
	.comm	_MTK_PPE_TB_CFG_SMA_MASK,4,2    ## @MTK_PPE_TB_CFG_SMA_MASK
	.comm	_MTK_PPE_TB_CFG_ENTRY_SZ_64B,4,2 ## @MTK_PPE_TB_CFG_ENTRY_SZ_64B
	.comm	_MTK_PPE_TB_CFG_SMA_FWD_CPU,4,2 ## @MTK_PPE_TB_CFG_SMA_FWD_CPU
	.comm	_MTK_REG_PPE_IP_PROT_CHK,4,2    ## @MTK_REG_PPE_IP_PROT_CHK
	.comm	_MTK_REG_PPE_CAH_CTRL,4,2       ## @MTK_REG_PPE_CAH_CTRL
	.comm	_MTK_PPE_CAH_CTRL_EN,4,2        ## @MTK_PPE_CAH_CTRL_EN
	.comm	_MTK_PPE_FLOW_CFG_IPV4_NAT_FRAG_EN,4,2 ## @MTK_PPE_FLOW_CFG_IPV4_NAT_FRAG_EN
	.comm	_MTK_PPE_FLOW_CFG_IPV4_NAPT_EN,4,2 ## @MTK_PPE_FLOW_CFG_IPV4_NAPT_EN
	.comm	_MTK_PPE_FLOW_CFG_IPV4_NAT_EN,4,2 ## @MTK_PPE_FLOW_CFG_IPV4_NAT_EN
	.comm	_MTK_PPE_FLOW_CFG_IPV4_GREK_EN,4,2 ## @MTK_PPE_FLOW_CFG_IPV4_GREK_EN
	.comm	_MTK_REG_PPE_FLOW_CFG,4,2       ## @MTK_REG_PPE_FLOW_CFG
	.comm	_MTK_PPE_TB_CFG_UNBD_AGE,4,2    ## @MTK_PPE_TB_CFG_UNBD_AGE
	.comm	_MTK_PPE_TB_CFG_NTU_AGE,4,2     ## @MTK_PPE_TB_CFG_NTU_AGE
	.comm	_MTK_PPE_TB_CFG_FIN_AGE,4,2     ## @MTK_PPE_TB_CFG_FIN_AGE
	.comm	_MTK_PPE_TB_CFG_UDP_AGE,4,2     ## @MTK_PPE_TB_CFG_UDP_AGE
	.comm	_MTK_PPE_TB_CFG_TCP_AGE,4,2     ## @MTK_PPE_TB_CFG_TCP_AGE
	.comm	_MTK_PPE_UNB_AGE_MNP_MASK,4,2   ## @MTK_PPE_UNB_AGE_MNP_MASK
	.comm	_MTK_PPE_UNB_AGE_DLTA_MASK,4,2  ## @MTK_PPE_UNB_AGE_DLTA_MASK
	.comm	_MTK_PPE_UNB_AGE_MNP,4,2        ## @MTK_PPE_UNB_AGE_MNP
	.comm	_MTK_PPE_UNB_AGE_DLTA,4,2       ## @MTK_PPE_UNB_AGE_DLTA
	.comm	_MTK_REG_PPE_UNB_AGE,4,2        ## @MTK_REG_PPE_UNB_AGE
	.comm	_MTK_PPE_BND_AGE0_NTU_DLTA_MASK,4,2 ## @MTK_PPE_BND_AGE0_NTU_DLTA_MASK
	.comm	_MTK_PPE_BND_AGE0_UDP_DLTA_MASK,4,2 ## @MTK_PPE_BND_AGE0_UDP_DLTA_MASK
	.comm	_MTK_PPE_BND_AGE0_NTU_DLTA,4,2  ## @MTK_PPE_BND_AGE0_NTU_DLTA
	.comm	_MTK_PPE_BND_AGE0_UDP_DLTA,4,2  ## @MTK_PPE_BND_AGE0_UDP_DLTA
	.comm	_MTK_REG_PPE_BND_AGE0,4,2       ## @MTK_REG_PPE_BND_AGE0
	.comm	_MTK_PPE_BND_AGE1_FIN_DLTA_MASK,4,2 ## @MTK_PPE_BND_AGE1_FIN_DLTA_MASK
	.comm	_MTK_PPE_BND_AGE1_TCP_DLTA_MASK,4,2 ## @MTK_PPE_BND_AGE1_TCP_DLTA_MASK
	.comm	_MTK_PPE_BND_AGE1_FIN_DLTA,4,2  ## @MTK_PPE_BND_AGE1_FIN_DLTA
	.comm	_MTK_PPE_BND_AGE1_TCP_DLTA,4,2  ## @MTK_PPE_BND_AGE1_TCP_DLTA
	.comm	_MTK_REG_PPE_BND_AGE1,4,2       ## @MTK_REG_PPE_BND_AGE1
	.comm	_MTK_PPE_TB_CFG_KA_MASK,4,2     ## @MTK_PPE_TB_CFG_KA_MASK
	.comm	_MTK_PPE_TB_CFG_KA,4,2          ## @MTK_PPE_TB_CFG_KA
	.comm	_MTK_PPE_KA_UDP,4,2             ## @MTK_PPE_KA_UDP
	.comm	_MTK_PPE_KA_TCP,4,2             ## @MTK_PPE_KA_TCP
	.comm	_MTK_PPE_KA_T,4,2               ## @MTK_PPE_KA_T
	.comm	_MTK_REG_PPE_KA,4,2             ## @MTK_REG_PPE_KA
	.comm	_MTK_REG_PPE_BIND_LMT_0,4,2     ## @MTK_REG_PPE_BIND_LMT_0
	.comm	_MTK_PPE_NTU_KA,4,2             ## @MTK_PPE_NTU_KA
	.comm	_MTK_REG_PPE_BIND_LMT_1,4,2     ## @MTK_REG_PPE_BIND_LMT_1
	.comm	_MTK_PPE_BNDR_RATE_MASK,4,2     ## @MTK_PPE_BNDR_RATE_MASK
	.comm	_MTK_REG_PPE_BNDR,4,2           ## @MTK_REG_PPE_BNDR
	.comm	_MTK_PPE_GLO_CFG_EN,4,2         ## @MTK_PPE_GLO_CFG_EN
	.comm	_MTK_REG_PPE_GLO_CFG,4,2        ## @MTK_REG_PPE_GLO_CFG
	.comm	_MTK_REG_PPE_DFT_CPORT,4,2      ## @MTK_REG_PPE_DFT_CPORT
	.comm	_MTK_PPE_GLO_CFG_TTL0_DROP,4,2  ## @MTK_PPE_GLO_CFG_TTL0_DROP
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"PPE started\n"

	.no_dead_strip	_mtk_ppe_start
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function mtk_ppe_start
_mtk_ppe_start:                         ; @mtk_ppe_start
	.cfi_startproc
; %bb.0:
	stp	x24, x23, [sp, #-64]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x20, x0
	bl	_mtk_init_foe_table
	mov	x19, x0
	cbnz	w0, LBB0_2
; %bb.1:
	ldr	w1, [x20]
Lloh0:
	adrp	x8, _MTK_REG_PPE_TB_BASE@GOTPAGE
Lloh1:
	ldr	x8, [x8, _MTK_REG_PPE_TB_BASE@GOTPAGEOFF]
Lloh2:
	ldr	w2, [x8]
	mov	x0, x20
	bl	_mtk_w32
	ldr	w0, [x20, #8]
Lloh3:
	adrp	x8, _MTK_PPE_TBL_SZ@GOTPAGE
Lloh4:
	ldr	x8, [x8, _MTK_PPE_TBL_SZ@GOTPAGEOFF]
Lloh5:
	ldr	w2, [x8]
	mov	w1, #0
	bl	_memset
Lloh6:
	adrp	x8, _MTK_PPE_TB_CFG_HASH_MODE_MASK@GOTPAGE
Lloh7:
	ldr	x8, [x8, _MTK_PPE_TB_CFG_HASH_MODE_MASK@GOTPAGEOFF]
Lloh8:
	ldr	w8, [x8]
Lloh9:
	adrp	x9, _MTK_PPE_TB_CFG_TBL_SZ_MASK@GOTPAGE
Lloh10:
	ldr	x9, [x9, _MTK_PPE_TB_CFG_TBL_SZ_MASK@GOTPAGEOFF]
Lloh11:
	ldr	w9, [x9]
	orr	w1, w9, w8
Lloh12:
	adrp	x8, _MTK_PPE_TB_CFG_HASH_MODE1@GOTPAGE
Lloh13:
	ldr	x8, [x8, _MTK_PPE_TB_CFG_HASH_MODE1@GOTPAGEOFF]
Lloh14:
	adrp	x9, _MTK_PPE_TB_CFG_TBL_SZ_4K@GOTPAGE
Lloh15:
	ldr	x9, [x9, _MTK_PPE_TB_CFG_TBL_SZ_4K@GOTPAGEOFF]
Lloh16:
	ldr	w8, [x8]
Lloh17:
	ldr	w9, [x9]
	orr	w2, w9, w8
Lloh18:
	adrp	x21, _MTK_REG_PPE_TB_CFG@GOTPAGE
Lloh19:
	ldr	x21, [x21, _MTK_REG_PPE_TB_CFG@GOTPAGEOFF]
	ldr	w3, [x21]
	mov	x0, x20
	bl	_mtk_m32
Lloh20:
	adrp	x8, _MTK_PPE_HASH_SEED@GOTPAGE
Lloh21:
	ldr	x8, [x8, _MTK_PPE_HASH_SEED@GOTPAGEOFF]
Lloh22:
	ldr	w1, [x8]
Lloh23:
	adrp	x8, _MTK_REG_PPE_HASH_SEED@GOTPAGE
Lloh24:
	ldr	x8, [x8, _MTK_REG_PPE_HASH_SEED@GOTPAGEOFF]
Lloh25:
	ldr	w2, [x8]
	mov	x0, x20
	bl	_mtk_w32
Lloh26:
	adrp	x22, _MTK_PPE_CAH_CTRL_X_MODE@GOTPAGE
Lloh27:
	ldr	x22, [x22, _MTK_PPE_CAH_CTRL_X_MODE@GOTPAGEOFF]
	ldr	w8, [x22]
Lloh28:
	adrp	x9, _MTK_PPE_TB_CFG_ENTRY_SZ_MASK@GOTPAGE
Lloh29:
	ldr	x9, [x9, _MTK_PPE_TB_CFG_ENTRY_SZ_MASK@GOTPAGEOFF]
Lloh30:
	ldr	w9, [x9]
	orr	w8, w9, w8
Lloh31:
	adrp	x9, _MTK_PPE_TB_CFG_SMA_MASK@GOTPAGE
Lloh32:
	ldr	x9, [x9, _MTK_PPE_TB_CFG_SMA_MASK@GOTPAGEOFF]
Lloh33:
	ldr	w9, [x9]
	orr	w1, w8, w9
Lloh34:
	adrp	x8, _MTK_PPE_TB_CFG_ENTRY_SZ_64B@GOTPAGE
Lloh35:
	ldr	x8, [x8, _MTK_PPE_TB_CFG_ENTRY_SZ_64B@GOTPAGEOFF]
Lloh36:
	ldr	w8, [x8]
Lloh37:
	adrp	x9, _MTK_PPE_TB_CFG_SMA_FWD_CPU@GOTPAGE
Lloh38:
	ldr	x9, [x9, _MTK_PPE_TB_CFG_SMA_FWD_CPU@GOTPAGEOFF]
Lloh39:
	ldr	w9, [x9]
	orr	w2, w9, w8
	ldr	w3, [x21]
	mov	x0, x20
	bl	_mtk_m32
Lloh40:
	adrp	x8, _MTK_REG_PPE_IP_PROT_CHK@GOTPAGE
Lloh41:
	ldr	x8, [x8, _MTK_REG_PPE_IP_PROT_CHK@GOTPAGEOFF]
Lloh42:
	ldr	w2, [x8]
	mov	x0, x20
	mov	w1, #-1
	bl	_mtk_w32
	ldr	w2, [x22]
Lloh43:
	adrp	x23, _MTK_REG_PPE_CAH_CTRL@GOTPAGE
Lloh44:
	ldr	x23, [x23, _MTK_REG_PPE_CAH_CTRL@GOTPAGEOFF]
	ldr	w3, [x23]
	mov	x0, x20
	mov	w1, #0
	bl	_mtk_m32
	ldr	w1, [x22]
Lloh45:
	adrp	x8, _MTK_PPE_CAH_CTRL_EN@GOTPAGE
Lloh46:
	ldr	x8, [x8, _MTK_PPE_CAH_CTRL_EN@GOTPAGEOFF]
Lloh47:
	ldr	w2, [x8]
	ldr	w3, [x23]
	mov	x0, x20
	bl	_mtk_m32
Lloh48:
	adrp	x8, _MTK_PPE_FLOW_CFG_IPV4_NAT_FRAG_EN@GOTPAGE
Lloh49:
	ldr	x8, [x8, _MTK_PPE_FLOW_CFG_IPV4_NAT_FRAG_EN@GOTPAGEOFF]
Lloh50:
	ldr	w8, [x8]
Lloh51:
	adrp	x9, _MTK_PPE_FLOW_CFG_IPV4_NAPT_EN@GOTPAGE
Lloh52:
	ldr	x9, [x9, _MTK_PPE_FLOW_CFG_IPV4_NAPT_EN@GOTPAGEOFF]
Lloh53:
	ldr	w9, [x9]
	orr	w8, w9, w8
Lloh54:
	adrp	x9, _MTK_PPE_FLOW_CFG_IPV4_NAT_EN@GOTPAGE
Lloh55:
	ldr	x9, [x9, _MTK_PPE_FLOW_CFG_IPV4_NAT_EN@GOTPAGEOFF]
Lloh56:
	ldr	w9, [x9]
Lloh57:
	adrp	x10, _MTK_PPE_FLOW_CFG_IPV4_GREK_EN@GOTPAGE
Lloh58:
	ldr	x10, [x10, _MTK_PPE_FLOW_CFG_IPV4_GREK_EN@GOTPAGEOFF]
	orr	w8, w8, w9
Lloh59:
	ldr	w9, [x10]
	orr	w2, w8, w9
Lloh60:
	adrp	x8, _MTK_REG_PPE_FLOW_CFG@GOTPAGE
Lloh61:
	ldr	x8, [x8, _MTK_REG_PPE_FLOW_CFG@GOTPAGEOFF]
Lloh62:
	ldr	w3, [x8]
	mov	x0, x20
	mov	w1, #0
	bl	_mtk_m32
Lloh63:
	adrp	x8, _MTK_PPE_TB_CFG_UNBD_AGE@GOTPAGE
Lloh64:
	ldr	x8, [x8, _MTK_PPE_TB_CFG_UNBD_AGE@GOTPAGEOFF]
Lloh65:
	ldr	w8, [x8]
Lloh66:
	adrp	x9, _MTK_PPE_TB_CFG_NTU_AGE@GOTPAGE
Lloh67:
	ldr	x9, [x9, _MTK_PPE_TB_CFG_NTU_AGE@GOTPAGEOFF]
Lloh68:
	ldr	w9, [x9]
Lloh69:
	adrp	x10, _MTK_PPE_TB_CFG_FIN_AGE@GOTPAGE
Lloh70:
	ldr	x10, [x10, _MTK_PPE_TB_CFG_FIN_AGE@GOTPAGEOFF]
	orr	w8, w9, w8
Lloh71:
	ldr	w9, [x10]
	orr	w8, w8, w9
Lloh72:
	adrp	x9, _MTK_PPE_TB_CFG_UDP_AGE@GOTPAGE
Lloh73:
	ldr	x9, [x9, _MTK_PPE_TB_CFG_UDP_AGE@GOTPAGEOFF]
Lloh74:
	ldr	w9, [x9]
	orr	w8, w8, w9
Lloh75:
	adrp	x9, _MTK_PPE_TB_CFG_TCP_AGE@GOTPAGE
Lloh76:
	ldr	x9, [x9, _MTK_PPE_TB_CFG_TCP_AGE@GOTPAGEOFF]
Lloh77:
	ldr	w9, [x9]
	orr	w2, w8, w9
	ldr	w3, [x21]
	mov	x0, x20
	mov	w1, #0
	bl	_mtk_m32
Lloh78:
	adrp	x8, _MTK_PPE_UNB_AGE_MNP_MASK@GOTPAGE
Lloh79:
	ldr	x8, [x8, _MTK_PPE_UNB_AGE_MNP_MASK@GOTPAGEOFF]
Lloh80:
	ldr	w8, [x8]
Lloh81:
	adrp	x9, _MTK_PPE_UNB_AGE_DLTA_MASK@GOTPAGE
Lloh82:
	ldr	x9, [x9, _MTK_PPE_UNB_AGE_DLTA_MASK@GOTPAGEOFF]
Lloh83:
	ldr	w9, [x9]
	orr	w1, w9, w8
Lloh84:
	adrp	x8, _MTK_PPE_UNB_AGE_MNP@GOTPAGE
Lloh85:
	ldr	x8, [x8, _MTK_PPE_UNB_AGE_MNP@GOTPAGEOFF]
Lloh86:
	adrp	x9, _MTK_PPE_UNB_AGE_DLTA@GOTPAGE
Lloh87:
	ldr	x9, [x9, _MTK_PPE_UNB_AGE_DLTA@GOTPAGEOFF]
Lloh88:
	ldr	w8, [x8]
Lloh89:
	ldr	w9, [x9]
	orr	w2, w9, w8
Lloh90:
	adrp	x8, _MTK_REG_PPE_UNB_AGE@GOTPAGE
Lloh91:
	ldr	x8, [x8, _MTK_REG_PPE_UNB_AGE@GOTPAGEOFF]
Lloh92:
	ldr	w3, [x8]
	mov	x0, x20
	bl	_mtk_m32
Lloh93:
	adrp	x8, _MTK_PPE_BND_AGE0_NTU_DLTA_MASK@GOTPAGE
Lloh94:
	ldr	x8, [x8, _MTK_PPE_BND_AGE0_NTU_DLTA_MASK@GOTPAGEOFF]
Lloh95:
	ldr	w8, [x8]
Lloh96:
	adrp	x9, _MTK_PPE_BND_AGE0_UDP_DLTA_MASK@GOTPAGE
Lloh97:
	ldr	x9, [x9, _MTK_PPE_BND_AGE0_UDP_DLTA_MASK@GOTPAGEOFF]
Lloh98:
	ldr	w9, [x9]
	orr	w1, w9, w8
Lloh99:
	adrp	x8, _MTK_PPE_BND_AGE0_NTU_DLTA@GOTPAGE
Lloh100:
	ldr	x8, [x8, _MTK_PPE_BND_AGE0_NTU_DLTA@GOTPAGEOFF]
Lloh101:
	adrp	x9, _MTK_PPE_BND_AGE0_UDP_DLTA@GOTPAGE
Lloh102:
	ldr	x9, [x9, _MTK_PPE_BND_AGE0_UDP_DLTA@GOTPAGEOFF]
Lloh103:
	ldr	w8, [x8]
Lloh104:
	ldr	w9, [x9]
	orr	w2, w9, w8
Lloh105:
	adrp	x8, _MTK_REG_PPE_BND_AGE0@GOTPAGE
Lloh106:
	ldr	x8, [x8, _MTK_REG_PPE_BND_AGE0@GOTPAGEOFF]
Lloh107:
	ldr	w3, [x8]
	mov	x0, x20
	bl	_mtk_m32
Lloh108:
	adrp	x8, _MTK_PPE_BND_AGE1_FIN_DLTA_MASK@GOTPAGE
Lloh109:
	ldr	x8, [x8, _MTK_PPE_BND_AGE1_FIN_DLTA_MASK@GOTPAGEOFF]
Lloh110:
	ldr	w8, [x8]
Lloh111:
	adrp	x9, _MTK_PPE_BND_AGE1_TCP_DLTA_MASK@GOTPAGE
Lloh112:
	ldr	x9, [x9, _MTK_PPE_BND_AGE1_TCP_DLTA_MASK@GOTPAGEOFF]
Lloh113:
	ldr	w9, [x9]
	orr	w1, w9, w8
Lloh114:
	adrp	x8, _MTK_PPE_BND_AGE1_FIN_DLTA@GOTPAGE
Lloh115:
	ldr	x8, [x8, _MTK_PPE_BND_AGE1_FIN_DLTA@GOTPAGEOFF]
Lloh116:
	adrp	x9, _MTK_PPE_BND_AGE1_TCP_DLTA@GOTPAGE
Lloh117:
	ldr	x9, [x9, _MTK_PPE_BND_AGE1_TCP_DLTA@GOTPAGEOFF]
Lloh118:
	ldr	w8, [x8]
Lloh119:
	ldr	w9, [x9]
	orr	w2, w9, w8
Lloh120:
	adrp	x8, _MTK_REG_PPE_BND_AGE1@GOTPAGE
Lloh121:
	ldr	x8, [x8, _MTK_REG_PPE_BND_AGE1@GOTPAGEOFF]
Lloh122:
	ldr	w3, [x8]
	mov	x0, x20
	bl	_mtk_m32
Lloh123:
	adrp	x8, _MTK_PPE_TB_CFG_KA_MASK@GOTPAGE
Lloh124:
	ldr	x8, [x8, _MTK_PPE_TB_CFG_KA_MASK@GOTPAGEOFF]
Lloh125:
	ldr	w1, [x8]
Lloh126:
	adrp	x8, _MTK_PPE_TB_CFG_KA@GOTPAGE
Lloh127:
	ldr	x8, [x8, _MTK_PPE_TB_CFG_KA@GOTPAGEOFF]
Lloh128:
	ldr	w2, [x8]
	ldr	w3, [x21]
	mov	x0, x20
	bl	_mtk_m32
Lloh129:
	adrp	x8, _MTK_PPE_KA_UDP@GOTPAGE
Lloh130:
	ldr	x8, [x8, _MTK_PPE_KA_UDP@GOTPAGEOFF]
Lloh131:
	ldr	w8, [x8]
Lloh132:
	adrp	x9, _MTK_PPE_KA_TCP@GOTPAGE
Lloh133:
	ldr	x9, [x9, _MTK_PPE_KA_TCP@GOTPAGEOFF]
Lloh134:
	ldr	w9, [x9]
Lloh135:
	adrp	x10, _MTK_PPE_KA_T@GOTPAGE
Lloh136:
	ldr	x10, [x10, _MTK_PPE_KA_T@GOTPAGEOFF]
	orr	w8, w9, w8
Lloh137:
	ldr	w9, [x10]
	orr	w1, w8, w9
Lloh138:
	adrp	x8, _MTK_REG_PPE_KA@GOTPAGE
Lloh139:
	ldr	x8, [x8, _MTK_REG_PPE_KA@GOTPAGEOFF]
Lloh140:
	ldr	w2, [x8]
	mov	x0, x20
	bl	_mtk_w32
Lloh141:
	adrp	x8, _MTK_REG_PPE_BIND_LMT_0@GOTPAGE
Lloh142:
	ldr	x8, [x8, _MTK_REG_PPE_BIND_LMT_0@GOTPAGEOFF]
Lloh143:
	ldr	w2, [x8]
	mov	x0, x20
	mov	w1, #1073692671
	bl	_mtk_w32
Lloh144:
	adrp	x8, _MTK_PPE_NTU_KA@GOTPAGE
Lloh145:
	ldr	x8, [x8, _MTK_PPE_NTU_KA@GOTPAGEOFF]
Lloh146:
	ldr	w8, [x8]
	orr	w1, w8, #0x3fff
Lloh147:
	adrp	x8, _MTK_REG_PPE_BIND_LMT_1@GOTPAGE
Lloh148:
	ldr	x8, [x8, _MTK_REG_PPE_BIND_LMT_1@GOTPAGEOFF]
Lloh149:
	ldr	w2, [x8]
	mov	x0, x20
	bl	_mtk_w32
Lloh150:
	adrp	x8, _MTK_PPE_BNDR_RATE_MASK@GOTPAGE
Lloh151:
	ldr	x8, [x8, _MTK_PPE_BNDR_RATE_MASK@GOTPAGEOFF]
Lloh152:
	ldr	w1, [x8]
Lloh153:
	adrp	x8, _MTK_REG_PPE_BNDR@GOTPAGE
Lloh154:
	ldr	x8, [x8, _MTK_REG_PPE_BNDR@GOTPAGEOFF]
Lloh155:
	ldr	w3, [x8]
	mov	x0, x20
	mov	w2, #1
	bl	_mtk_m32
Lloh156:
	adrp	x8, _MTK_PPE_GLO_CFG_EN@GOTPAGE
Lloh157:
	ldr	x8, [x8, _MTK_PPE_GLO_CFG_EN@GOTPAGEOFF]
Lloh158:
	ldr	w2, [x8]
Lloh159:
	adrp	x21, _MTK_REG_PPE_GLO_CFG@GOTPAGE
Lloh160:
	ldr	x21, [x21, _MTK_REG_PPE_GLO_CFG@GOTPAGEOFF]
	ldr	w3, [x21]
	mov	x0, x20
	mov	w1, #0
	bl	_mtk_m32
Lloh161:
	adrp	x8, _MTK_REG_PPE_DFT_CPORT@GOTPAGE
Lloh162:
	ldr	x8, [x8, _MTK_REG_PPE_DFT_CPORT@GOTPAGEOFF]
Lloh163:
	ldr	w2, [x8]
	mov	x0, x20
	mov	w1, #1431655765
	bl	_mtk_w32
Lloh164:
	adrp	x8, _MTK_PPE_GLO_CFG_TTL0_DROP@GOTPAGE
Lloh165:
	ldr	x8, [x8, _MTK_PPE_GLO_CFG_TTL0_DROP@GOTPAGEOFF]
Lloh166:
	ldr	w1, [x8]
	ldr	w3, [x21]
	mov	x0, x20
	mov	w2, #0
	bl	_mtk_m32
	mov	w0, #0
	bl	_MTK_GDMA_FWD_CFG
	mov	x3, x0
	mov	x0, x20
	mov	w1, #65535
	mov	w2, #17476
	bl	_mtk_m32
	mov	w0, #1
	bl	_MTK_GDMA_FWD_CFG
	mov	x3, x0
	mov	x0, x20
	mov	w1, #65535
	mov	w2, #17476
	bl	_mtk_m32
	ldr	w0, [x20, #4]
Lloh167:
	adrp	x1, l_.str@PAGE
Lloh168:
	add	x1, x1, l_.str@PAGEOFF
	bl	_dev_info
LBB0_2:
	mov	x0, x19
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	ret
	.loh AdrpAdd	Lloh167, Lloh168
	.loh AdrpLdrGotLdr	Lloh164, Lloh165, Lloh166
	.loh AdrpLdrGotLdr	Lloh161, Lloh162, Lloh163
	.loh AdrpLdrGot	Lloh159, Lloh160
	.loh AdrpLdrGotLdr	Lloh156, Lloh157, Lloh158
	.loh AdrpLdrGotLdr	Lloh153, Lloh154, Lloh155
	.loh AdrpLdrGotLdr	Lloh150, Lloh151, Lloh152
	.loh AdrpLdrGotLdr	Lloh147, Lloh148, Lloh149
	.loh AdrpLdrGotLdr	Lloh144, Lloh145, Lloh146
	.loh AdrpLdrGotLdr	Lloh141, Lloh142, Lloh143
	.loh AdrpLdrGotLdr	Lloh138, Lloh139, Lloh140
	.loh AdrpLdrGotLdr	Lloh135, Lloh136, Lloh137
	.loh AdrpLdrGotLdr	Lloh132, Lloh133, Lloh134
	.loh AdrpLdrGotLdr	Lloh129, Lloh130, Lloh131
	.loh AdrpLdrGotLdr	Lloh126, Lloh127, Lloh128
	.loh AdrpLdrGotLdr	Lloh123, Lloh124, Lloh125
	.loh AdrpLdrGotLdr	Lloh120, Lloh121, Lloh122
	.loh AdrpLdrGotLdr	Lloh116, Lloh117, Lloh119
	.loh AdrpLdrGotLdr	Lloh114, Lloh115, Lloh118
	.loh AdrpLdrGotLdr	Lloh111, Lloh112, Lloh113
	.loh AdrpLdrGotLdr	Lloh108, Lloh109, Lloh110
	.loh AdrpLdrGotLdr	Lloh105, Lloh106, Lloh107
	.loh AdrpLdrGotLdr	Lloh101, Lloh102, Lloh104
	.loh AdrpLdrGotLdr	Lloh99, Lloh100, Lloh103
	.loh AdrpLdrGotLdr	Lloh96, Lloh97, Lloh98
	.loh AdrpLdrGotLdr	Lloh93, Lloh94, Lloh95
	.loh AdrpLdrGotLdr	Lloh90, Lloh91, Lloh92
	.loh AdrpLdrGotLdr	Lloh86, Lloh87, Lloh89
	.loh AdrpLdrGotLdr	Lloh84, Lloh85, Lloh88
	.loh AdrpLdrGotLdr	Lloh81, Lloh82, Lloh83
	.loh AdrpLdrGotLdr	Lloh78, Lloh79, Lloh80
	.loh AdrpLdrGotLdr	Lloh75, Lloh76, Lloh77
	.loh AdrpLdrGotLdr	Lloh72, Lloh73, Lloh74
	.loh AdrpLdrGotLdr	Lloh69, Lloh70, Lloh71
	.loh AdrpLdrGotLdr	Lloh66, Lloh67, Lloh68
	.loh AdrpLdrGotLdr	Lloh63, Lloh64, Lloh65
	.loh AdrpLdrGotLdr	Lloh60, Lloh61, Lloh62
	.loh AdrpLdrGotLdr	Lloh57, Lloh58, Lloh59
	.loh AdrpLdrGotLdr	Lloh54, Lloh55, Lloh56
	.loh AdrpLdrGotLdr	Lloh51, Lloh52, Lloh53
	.loh AdrpLdrGotLdr	Lloh48, Lloh49, Lloh50
	.loh AdrpLdrGotLdr	Lloh45, Lloh46, Lloh47
	.loh AdrpLdrGot	Lloh43, Lloh44
	.loh AdrpLdrGotLdr	Lloh40, Lloh41, Lloh42
	.loh AdrpLdrGotLdr	Lloh37, Lloh38, Lloh39
	.loh AdrpLdrGotLdr	Lloh34, Lloh35, Lloh36
	.loh AdrpLdrGotLdr	Lloh31, Lloh32, Lloh33
	.loh AdrpLdrGotLdr	Lloh28, Lloh29, Lloh30
	.loh AdrpLdrGot	Lloh26, Lloh27
	.loh AdrpLdrGotLdr	Lloh23, Lloh24, Lloh25
	.loh AdrpLdrGotLdr	Lloh20, Lloh21, Lloh22
	.loh AdrpLdrGot	Lloh18, Lloh19
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh17
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh16
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_MTK_REG_PPE_TB_BASE,4,2        ; @MTK_REG_PPE_TB_BASE
	.comm	_MTK_PPE_TBL_SZ,4,2             ; @MTK_PPE_TBL_SZ
	.comm	_MTK_PPE_TB_CFG_HASH_MODE_MASK,4,2 ; @MTK_PPE_TB_CFG_HASH_MODE_MASK
	.comm	_MTK_PPE_TB_CFG_TBL_SZ_MASK,4,2 ; @MTK_PPE_TB_CFG_TBL_SZ_MASK
	.comm	_MTK_PPE_TB_CFG_HASH_MODE1,4,2  ; @MTK_PPE_TB_CFG_HASH_MODE1
	.comm	_MTK_PPE_TB_CFG_TBL_SZ_4K,4,2   ; @MTK_PPE_TB_CFG_TBL_SZ_4K
	.comm	_MTK_REG_PPE_TB_CFG,4,2         ; @MTK_REG_PPE_TB_CFG
	.comm	_MTK_PPE_HASH_SEED,4,2          ; @MTK_PPE_HASH_SEED
	.comm	_MTK_REG_PPE_HASH_SEED,4,2      ; @MTK_REG_PPE_HASH_SEED
	.comm	_MTK_PPE_CAH_CTRL_X_MODE,4,2    ; @MTK_PPE_CAH_CTRL_X_MODE
	.comm	_MTK_PPE_TB_CFG_ENTRY_SZ_MASK,4,2 ; @MTK_PPE_TB_CFG_ENTRY_SZ_MASK
	.comm	_MTK_PPE_TB_CFG_SMA_MASK,4,2    ; @MTK_PPE_TB_CFG_SMA_MASK
	.comm	_MTK_PPE_TB_CFG_ENTRY_SZ_64B,4,2 ; @MTK_PPE_TB_CFG_ENTRY_SZ_64B
	.comm	_MTK_PPE_TB_CFG_SMA_FWD_CPU,4,2 ; @MTK_PPE_TB_CFG_SMA_FWD_CPU
	.comm	_MTK_REG_PPE_IP_PROT_CHK,4,2    ; @MTK_REG_PPE_IP_PROT_CHK
	.comm	_MTK_REG_PPE_CAH_CTRL,4,2       ; @MTK_REG_PPE_CAH_CTRL
	.comm	_MTK_PPE_CAH_CTRL_EN,4,2        ; @MTK_PPE_CAH_CTRL_EN
	.comm	_MTK_PPE_FLOW_CFG_IPV4_NAT_FRAG_EN,4,2 ; @MTK_PPE_FLOW_CFG_IPV4_NAT_FRAG_EN
	.comm	_MTK_PPE_FLOW_CFG_IPV4_NAPT_EN,4,2 ; @MTK_PPE_FLOW_CFG_IPV4_NAPT_EN
	.comm	_MTK_PPE_FLOW_CFG_IPV4_NAT_EN,4,2 ; @MTK_PPE_FLOW_CFG_IPV4_NAT_EN
	.comm	_MTK_PPE_FLOW_CFG_IPV4_GREK_EN,4,2 ; @MTK_PPE_FLOW_CFG_IPV4_GREK_EN
	.comm	_MTK_REG_PPE_FLOW_CFG,4,2       ; @MTK_REG_PPE_FLOW_CFG
	.comm	_MTK_PPE_TB_CFG_UNBD_AGE,4,2    ; @MTK_PPE_TB_CFG_UNBD_AGE
	.comm	_MTK_PPE_TB_CFG_NTU_AGE,4,2     ; @MTK_PPE_TB_CFG_NTU_AGE
	.comm	_MTK_PPE_TB_CFG_FIN_AGE,4,2     ; @MTK_PPE_TB_CFG_FIN_AGE
	.comm	_MTK_PPE_TB_CFG_UDP_AGE,4,2     ; @MTK_PPE_TB_CFG_UDP_AGE
	.comm	_MTK_PPE_TB_CFG_TCP_AGE,4,2     ; @MTK_PPE_TB_CFG_TCP_AGE
	.comm	_MTK_PPE_UNB_AGE_MNP_MASK,4,2   ; @MTK_PPE_UNB_AGE_MNP_MASK
	.comm	_MTK_PPE_UNB_AGE_DLTA_MASK,4,2  ; @MTK_PPE_UNB_AGE_DLTA_MASK
	.comm	_MTK_PPE_UNB_AGE_MNP,4,2        ; @MTK_PPE_UNB_AGE_MNP
	.comm	_MTK_PPE_UNB_AGE_DLTA,4,2       ; @MTK_PPE_UNB_AGE_DLTA
	.comm	_MTK_REG_PPE_UNB_AGE,4,2        ; @MTK_REG_PPE_UNB_AGE
	.comm	_MTK_PPE_BND_AGE0_NTU_DLTA_MASK,4,2 ; @MTK_PPE_BND_AGE0_NTU_DLTA_MASK
	.comm	_MTK_PPE_BND_AGE0_UDP_DLTA_MASK,4,2 ; @MTK_PPE_BND_AGE0_UDP_DLTA_MASK
	.comm	_MTK_PPE_BND_AGE0_NTU_DLTA,4,2  ; @MTK_PPE_BND_AGE0_NTU_DLTA
	.comm	_MTK_PPE_BND_AGE0_UDP_DLTA,4,2  ; @MTK_PPE_BND_AGE0_UDP_DLTA
	.comm	_MTK_REG_PPE_BND_AGE0,4,2       ; @MTK_REG_PPE_BND_AGE0
	.comm	_MTK_PPE_BND_AGE1_FIN_DLTA_MASK,4,2 ; @MTK_PPE_BND_AGE1_FIN_DLTA_MASK
	.comm	_MTK_PPE_BND_AGE1_TCP_DLTA_MASK,4,2 ; @MTK_PPE_BND_AGE1_TCP_DLTA_MASK
	.comm	_MTK_PPE_BND_AGE1_FIN_DLTA,4,2  ; @MTK_PPE_BND_AGE1_FIN_DLTA
	.comm	_MTK_PPE_BND_AGE1_TCP_DLTA,4,2  ; @MTK_PPE_BND_AGE1_TCP_DLTA
	.comm	_MTK_REG_PPE_BND_AGE1,4,2       ; @MTK_REG_PPE_BND_AGE1
	.comm	_MTK_PPE_TB_CFG_KA_MASK,4,2     ; @MTK_PPE_TB_CFG_KA_MASK
	.comm	_MTK_PPE_TB_CFG_KA,4,2          ; @MTK_PPE_TB_CFG_KA
	.comm	_MTK_PPE_KA_UDP,4,2             ; @MTK_PPE_KA_UDP
	.comm	_MTK_PPE_KA_TCP,4,2             ; @MTK_PPE_KA_TCP
	.comm	_MTK_PPE_KA_T,4,2               ; @MTK_PPE_KA_T
	.comm	_MTK_REG_PPE_KA,4,2             ; @MTK_REG_PPE_KA
	.comm	_MTK_REG_PPE_BIND_LMT_0,4,2     ; @MTK_REG_PPE_BIND_LMT_0
	.comm	_MTK_PPE_NTU_KA,4,2             ; @MTK_PPE_NTU_KA
	.comm	_MTK_REG_PPE_BIND_LMT_1,4,2     ; @MTK_REG_PPE_BIND_LMT_1
	.comm	_MTK_PPE_BNDR_RATE_MASK,4,2     ; @MTK_PPE_BNDR_RATE_MASK
	.comm	_MTK_REG_PPE_BNDR,4,2           ; @MTK_REG_PPE_BNDR
	.comm	_MTK_PPE_GLO_CFG_EN,4,2         ; @MTK_PPE_GLO_CFG_EN
	.comm	_MTK_REG_PPE_GLO_CFG,4,2        ; @MTK_REG_PPE_GLO_CFG
	.comm	_MTK_REG_PPE_DFT_CPORT,4,2      ; @MTK_REG_PPE_DFT_CPORT
	.comm	_MTK_PPE_GLO_CFG_TTL0_DROP,4,2  ; @MTK_PPE_GLO_CFG_TTL0_DROP
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"PPE started\n"

	.no_dead_strip	_mtk_ppe_start
.subsections_via_symbols
