	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function rtl_hw_init
_rtl_hw_init:                           ## @rtl_hw_init
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r14
	callq	_to_rtl
	movb	(%r14), %cl
	movl	$1, %r12d
	shll	%cl, %r12d
	movq	%rax, %rbx
	movq	_RTL_REG_VLAN_ENABLE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	xorl	%r15d, %r15d
	movq	%r14, %rdi
	xorl	%edx, %edx
	callq	_rtl_set
	movq	_RTL_REG_VLAN_FILTER@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	xorl	%edx, %edx
	callq	_rtl_set
	movq	_RTL_REG_EN_TRUNK@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	xorl	%edx, %edx
	callq	_rtl_set
	movq	_RTL_REG_TRUNK_PORTSEL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	xorl	%edx, %edx
	callq	_rtl_set
	cmpq	$0, (%rbx)
	movq	_RTL_REG_CPUPORT@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	je	LBB0_1
## %bb.2:
	movl	(%r14), %edx
	movl	$1, %r15d
	jmp	LBB0_3
LBB0_1:
	movl	$7, %edx
LBB0_3:
	movq	%r14, %rdi
	callq	_rtl_set
	movq	_RTL_REG_EN_CPUPORT@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	movl	%r15d, %edx
	callq	_rtl_set
	movq	_RTL_REG_EN_TAG_OUT@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	xorl	%ebx, %ebx
	movq	%r14, %rdi
	xorl	%edx, %edx
	callq	_rtl_set
	movq	_RTL_REG_EN_TAG_IN@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	xorl	%edx, %edx
	callq	_rtl_set
	movq	_RTL_REG_EN_TAG_CLR@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	xorl	%edx, %edx
	callq	_rtl_set
	movq	_RTL8306_NUM_VLANS@GOTPCREL(%rip), %r13
	cmpl	$0, (%r13)
	jle	LBB0_6
## %bb.4:
	movq	_PORTMASK@GOTPCREL(%rip), %r15
	.p2align	4, 0x90
LBB0_5:                                 ## =>This Inner Loop Header: Depth=1
	movq	_VID@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	movl	%ebx, %edi
	callq	_RTL_VLAN_REG
	movq	%r14, %rdi
	movl	%eax, %esi
	movl	%ebx, %edx
	callq	_rtl_set
	movl	(%r15), %esi
	movl	%ebx, %edi
	callq	_RTL_VLAN_REG
	movq	%r14, %rdi
	movl	%eax, %esi
	xorl	%edx, %edx
	callq	_rtl_set
	incl	%ebx
	cmpl	(%r13), %ebx
	jl	LBB0_5
LBB0_6:
	movq	_RTL8306_NUM_PORTS@GOTPCREL(%rip), %r13
	movl	(%r13), %eax
	testl	%eax, %eax
	jle	LBB0_9
## %bb.7:
	xorl	%r15d, %r15d
	.p2align	4, 0x90
LBB0_8:                                 ## =>This Inner Loop Header: Depth=1
	movl	$1, %edx
	movl	%r15d, %ecx
	shll	%cl, %edx
	movl	$-1, %ebx
	movl	%eax, %ecx
	shll	%cl, %ebx
	orl	%r12d, %ebx
	movl	%r12d, %eax
	btsl	%r15d, %eax
	cmpl	%r12d, %edx
	notl	%ebx
	cmovnel	%eax, %ebx
	movq	_PORTMASK@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	%r15d, %edi
	callq	_RTL_VLAN_REG
	movq	%r14, %rdi
	movl	%eax, %esi
	movl	%ebx, %edx
	callq	_rtl_set
	movq	_PVID@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	%r15d, %edi
	callq	_RTL_PORT_REG
	movq	%r14, %rdi
	movl	%eax, %esi
	movl	%r15d, %edx
	callq	_rtl_set
	movq	_NULL_VID_REPLACE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	%r15d, %edi
	callq	_RTL_PORT_REG
	movq	%r14, %rdi
	movl	%eax, %esi
	movl	$1, %edx
	callq	_rtl_set
	movq	_VID_INSERT@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	%r15d, %edi
	callq	_RTL_PORT_REG
	movq	%r14, %rdi
	movl	%eax, %esi
	movl	$1, %edx
	callq	_rtl_set
	movq	_TAG_INSERT@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	%r15d, %edi
	callq	_RTL_PORT_REG
	movq	%r14, %rdi
	movl	%eax, %esi
	movl	$3, %edx
	callq	_rtl_set
	incl	%r15d
	movl	(%r13), %eax
	cmpl	%eax, %r15d
	jl	LBB0_8
LBB0_9:
	movq	%r14, %rdi
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_rtl_hw_apply                   ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_RTL_REG_VLAN_ENABLE,4,2        ## @RTL_REG_VLAN_ENABLE
	.comm	_RTL_REG_VLAN_FILTER,4,2        ## @RTL_REG_VLAN_FILTER
	.comm	_RTL_REG_EN_TRUNK,4,2           ## @RTL_REG_EN_TRUNK
	.comm	_RTL_REG_TRUNK_PORTSEL,4,2      ## @RTL_REG_TRUNK_PORTSEL
	.comm	_RTL_REG_CPUPORT,4,2            ## @RTL_REG_CPUPORT
	.comm	_RTL_REG_EN_CPUPORT,4,2         ## @RTL_REG_EN_CPUPORT
	.comm	_RTL_REG_EN_TAG_OUT,4,2         ## @RTL_REG_EN_TAG_OUT
	.comm	_RTL_REG_EN_TAG_IN,4,2          ## @RTL_REG_EN_TAG_IN
	.comm	_RTL_REG_EN_TAG_CLR,4,2         ## @RTL_REG_EN_TAG_CLR
	.comm	_RTL8306_NUM_VLANS,4,2          ## @RTL8306_NUM_VLANS
	.comm	_VID,4,2                        ## @VID
	.comm	_PORTMASK,4,2                   ## @PORTMASK
	.comm	_RTL8306_NUM_PORTS,4,2          ## @RTL8306_NUM_PORTS
	.comm	_PVID,4,2                       ## @PVID
	.comm	_NULL_VID_REPLACE,4,2           ## @NULL_VID_REPLACE
	.comm	_VID_INSERT,4,2                 ## @VID_INSERT
	.comm	_TAG_INSERT,4,2                 ## @TAG_INSERT
	.no_dead_strip	_rtl_hw_init
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function rtl_hw_init
_rtl_hw_init:                           ; @rtl_hw_init
	.cfi_startproc
; %bb.0:
	stp	x28, x27, [sp, #-96]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 96
	stp	x26, x25, [sp, #16]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #32]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #48]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #64]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #80]             ; 16-byte Folded Spill
	add	x29, sp, #80
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	mov	x19, x0
	bl	_to_rtl
	mov	x20, x0
	ldr	w21, [x19]
Lloh0:
	adrp	x8, _RTL_REG_VLAN_ENABLE@GOTPAGE
Lloh1:
	ldr	x8, [x8, _RTL_REG_VLAN_ENABLE@GOTPAGEOFF]
Lloh2:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #0
	bl	_rtl_set
Lloh3:
	adrp	x8, _RTL_REG_VLAN_FILTER@GOTPAGE
Lloh4:
	ldr	x8, [x8, _RTL_REG_VLAN_FILTER@GOTPAGEOFF]
Lloh5:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #0
	bl	_rtl_set
Lloh6:
	adrp	x8, _RTL_REG_EN_TRUNK@GOTPAGE
Lloh7:
	ldr	x8, [x8, _RTL_REG_EN_TRUNK@GOTPAGEOFF]
Lloh8:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #0
	bl	_rtl_set
Lloh9:
	adrp	x8, _RTL_REG_TRUNK_PORTSEL@GOTPAGE
Lloh10:
	ldr	x8, [x8, _RTL_REG_TRUNK_PORTSEL@GOTPAGEOFF]
Lloh11:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #0
	bl	_rtl_set
	ldr	x8, [x20]
Lloh12:
	adrp	x9, _RTL_REG_CPUPORT@GOTPAGE
Lloh13:
	ldr	x9, [x9, _RTL_REG_CPUPORT@GOTPAGEOFF]
Lloh14:
	ldr	w1, [x9]
	cbz	x8, LBB0_2
; %bb.1:
	ldr	w2, [x19]
	mov	w20, #1
	b	LBB0_3
LBB0_2:
	mov	w20, #0
	mov	w2, #7
LBB0_3:
	mov	x0, x19
	bl	_rtl_set
Lloh15:
	adrp	x8, _RTL_REG_EN_CPUPORT@GOTPAGE
Lloh16:
	ldr	x8, [x8, _RTL_REG_EN_CPUPORT@GOTPAGEOFF]
Lloh17:
	ldr	w1, [x8]
	mov	x0, x19
	mov	x2, x20
	bl	_rtl_set
Lloh18:
	adrp	x8, _RTL_REG_EN_TAG_OUT@GOTPAGE
Lloh19:
	ldr	x8, [x8, _RTL_REG_EN_TAG_OUT@GOTPAGEOFF]
Lloh20:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #0
	bl	_rtl_set
Lloh21:
	adrp	x8, _RTL_REG_EN_TAG_IN@GOTPAGE
Lloh22:
	ldr	x8, [x8, _RTL_REG_EN_TAG_IN@GOTPAGEOFF]
Lloh23:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #0
	bl	_rtl_set
Lloh24:
	adrp	x8, _RTL_REG_EN_TAG_CLR@GOTPAGE
Lloh25:
	ldr	x8, [x8, _RTL_REG_EN_TAG_CLR@GOTPAGEOFF]
Lloh26:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #0
	bl	_rtl_set
Lloh27:
	adrp	x23, _RTL8306_NUM_VLANS@GOTPAGE
Lloh28:
	ldr	x23, [x23, _RTL8306_NUM_VLANS@GOTPAGEOFF]
	ldr	w8, [x23]
Lloh29:
	adrp	x22, _PORTMASK@GOTPAGE
Lloh30:
	ldr	x22, [x22, _PORTMASK@GOTPAGEOFF]
	cmp	w8, #1
	b.lt	LBB0_6
; %bb.4:
	mov	w20, #0
Lloh31:
	adrp	x24, _VID@GOTPAGE
Lloh32:
	ldr	x24, [x24, _VID@GOTPAGEOFF]
LBB0_5:                                 ; =>This Inner Loop Header: Depth=1
	ldr	w1, [x24]
	mov	x0, x20
	bl	_RTL_VLAN_REG
	mov	x1, x0
	mov	x0, x19
	mov	x2, x20
	bl	_rtl_set
	ldr	w1, [x22]
	mov	x0, x20
	bl	_RTL_VLAN_REG
	mov	x1, x0
	mov	x0, x19
	mov	w2, #0
	bl	_rtl_set
	add	w20, w20, #1
	ldr	w8, [x23]
	cmp	w20, w8
	b.lt	LBB0_5
LBB0_6:
Lloh33:
	adrp	x26, _RTL8306_NUM_PORTS@GOTPAGE
Lloh34:
	ldr	x26, [x26, _RTL8306_NUM_PORTS@GOTPAGEOFF]
	ldr	w8, [x26]
	cmp	w8, #1
	b.lt	LBB0_9
; %bb.7:
	mov	w20, #0
	mov	w9, #1
	lsl	w24, w9, w21
Lloh35:
	adrp	x27, _PVID@GOTPAGE
Lloh36:
	ldr	x27, [x27, _PVID@GOTPAGEOFF]
Lloh37:
	adrp	x28, _NULL_VID_REPLACE@GOTPAGE
Lloh38:
	ldr	x28, [x28, _NULL_VID_REPLACE@GOTPAGEOFF]
Lloh39:
	adrp	x23, _VID_INSERT@GOTPAGE
Lloh40:
	ldr	x23, [x23, _VID_INSERT@GOTPAGEOFF]
Lloh41:
	adrp	x25, _TAG_INSERT@GOTPAGE
Lloh42:
	ldr	x25, [x25, _TAG_INSERT@GOTPAGEOFF]
LBB0_8:                                 ; =>This Inner Loop Header: Depth=1
	mov	w9, #1
	lsl	w9, w9, w20
	mov	w10, #-1
	lsl	w8, w10, w8
	orr	w8, w8, w24
	orr	w10, w9, w24
	cmp	w9, w24
	csinv	w21, w10, w8, ne
	ldr	w1, [x22]
	mov	x0, x20
	bl	_RTL_VLAN_REG
	mov	x1, x0
	mov	x0, x19
	mov	x2, x21
	bl	_rtl_set
	ldr	w1, [x27]
	mov	x0, x20
	bl	_RTL_PORT_REG
	mov	x1, x0
	mov	x0, x19
	mov	x2, x20
	bl	_rtl_set
	ldr	w1, [x28]
	mov	x0, x20
	bl	_RTL_PORT_REG
	mov	x1, x0
	mov	x0, x19
	mov	w2, #1
	bl	_rtl_set
	ldr	w1, [x23]
	mov	x0, x20
	bl	_RTL_PORT_REG
	mov	x1, x0
	mov	x0, x19
	mov	w2, #1
	bl	_rtl_set
	ldr	w1, [x25]
	mov	x0, x20
	bl	_RTL_PORT_REG
	mov	x1, x0
	mov	x0, x19
	mov	w2, #3
	bl	_rtl_set
	add	w20, w20, #1
	ldr	w8, [x26]
	cmp	w20, w8
	b.lt	LBB0_8
LBB0_9:
	mov	x0, x19
	ldp	x29, x30, [sp, #80]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #64]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #48]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #32]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #16]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp], #96             ; 16-byte Folded Reload
	b	_rtl_hw_apply
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGot	Lloh29, Lloh30
	.loh AdrpLdrGot	Lloh27, Lloh28
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGot	Lloh31, Lloh32
	.loh AdrpLdrGot	Lloh33, Lloh34
	.loh AdrpLdrGot	Lloh41, Lloh42
	.loh AdrpLdrGot	Lloh39, Lloh40
	.loh AdrpLdrGot	Lloh37, Lloh38
	.loh AdrpLdrGot	Lloh35, Lloh36
	.cfi_endproc
                                        ; -- End function
	.comm	_RTL_REG_VLAN_ENABLE,4,2        ; @RTL_REG_VLAN_ENABLE
	.comm	_RTL_REG_VLAN_FILTER,4,2        ; @RTL_REG_VLAN_FILTER
	.comm	_RTL_REG_EN_TRUNK,4,2           ; @RTL_REG_EN_TRUNK
	.comm	_RTL_REG_TRUNK_PORTSEL,4,2      ; @RTL_REG_TRUNK_PORTSEL
	.comm	_RTL_REG_CPUPORT,4,2            ; @RTL_REG_CPUPORT
	.comm	_RTL_REG_EN_CPUPORT,4,2         ; @RTL_REG_EN_CPUPORT
	.comm	_RTL_REG_EN_TAG_OUT,4,2         ; @RTL_REG_EN_TAG_OUT
	.comm	_RTL_REG_EN_TAG_IN,4,2          ; @RTL_REG_EN_TAG_IN
	.comm	_RTL_REG_EN_TAG_CLR,4,2         ; @RTL_REG_EN_TAG_CLR
	.comm	_RTL8306_NUM_VLANS,4,2          ; @RTL8306_NUM_VLANS
	.comm	_VID,4,2                        ; @VID
	.comm	_PORTMASK,4,2                   ; @PORTMASK
	.comm	_RTL8306_NUM_PORTS,4,2          ; @RTL8306_NUM_PORTS
	.comm	_PVID,4,2                       ; @PVID
	.comm	_NULL_VID_REPLACE,4,2           ; @NULL_VID_REPLACE
	.comm	_VID_INSERT,4,2                 ; @VID_INSERT
	.comm	_TAG_INSERT,4,2                 ; @TAG_INSERT
	.no_dead_strip	_rtl_hw_init
.subsections_via_symbols
