	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function rtl_set_ports
_rtl_set_ports:                         ## @rtl_set_ports
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$24, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, -48(%rbp)                 ## 8-byte Spill
	movl	(%rsi), %eax
	testl	%eax, %eax
	movq	%rsi, -56(%rbp)                 ## 8-byte Spill
	jle	LBB0_1
## %bb.2:
	xorl	%r13d, %r13d
	xorl	%ebx, %ebx
	jmp	LBB0_3
	.p2align	4, 0x90
LBB0_5:                                 ##   in Loop: Header=BB0_3 Depth=1
	movl	%r15d, %edi
LBB0_8:                                 ##   in Loop: Header=BB0_3 Depth=1
	movl	%edx, -64(%rbp)                 ## 4-byte Spill
	movq	_NON_PVID_DISCARD@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_RTL_PORT_REG
	movl	%r15d, %ebx
	movq	%r14, %r15
	movq	-48(%rbp), %r14                 ## 8-byte Reload
	movq	%r14, %rdi
	movl	%eax, %esi
	movl	%r12d, %edx
	callq	_rtl_set
	movl	(%r15,%r13,8), %edi
	movq	_VID_INSERT@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_RTL_PORT_REG
	movq	%r14, %rdi
	movl	%eax, %esi
	movl	%r12d, %edx
	callq	_rtl_set
	movl	(%r15,%r13,8), %edi
	movq	_TAG_INSERT@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_RTL_PORT_REG
	movq	%r14, %rdi
	movl	%ebx, %r15d
	movl	%eax, %esi
	movl	-64(%rbp), %edx                 ## 4-byte Reload
	callq	_rtl_set
	movq	-56(%rbp), %rsi                 ## 8-byte Reload
	movl	(%rsi), %eax
	movl	-60(%rbp), %ebx                 ## 4-byte Reload
LBB0_9:                                 ##   in Loop: Header=BB0_3 Depth=1
	btsl	%r15d, %ebx
	incq	%r13
	movslq	%eax, %rcx
	cmpq	%rcx, %r13
	jge	LBB0_10
LBB0_3:                                 ## =>This Inner Loop Header: Depth=1
	movq	8(%rsi), %r14
	movl	(%r14,%r13,8), %r15d
	movq	-48(%rbp), %rcx                 ## 8-byte Reload
	movl	(%rcx), %ecx
	cmpl	%ecx, %r15d
	je	LBB0_9
## %bb.4:                               ##   in Loop: Header=BB0_3 Depth=1
	movl	$2, %edx
	xorl	%r12d, %r12d
	cmpq	%rcx, %r13
	movl	%ebx, -60(%rbp)                 ## 4-byte Spill
	je	LBB0_5
## %bb.6:                               ##   in Loop: Header=BB0_3 Depth=1
	movl	4(%r14,%r13,8), %eax
	movq	_SWITCH_PORT_FLAG_TAGGED@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	btl	%ecx, %eax
	movl	%r15d, %edi
	jb	LBB0_8
## %bb.7:                               ##   in Loop: Header=BB0_3 Depth=1
	movq	_PVID@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	%r15d, %edi
	callq	_RTL_PORT_REG
	movq	-56(%rbp), %rcx                 ## 8-byte Reload
	movl	4(%rcx), %edx
	movq	-48(%rbp), %rdi                 ## 8-byte Reload
	movl	%eax, %esi
	callq	_rtl_set
	movl	(%r14,%r13,8), %edi
	movl	$1, %r12d
	movl	$1, %edx
	jmp	LBB0_8
LBB0_1:
	xorl	%ebx, %ebx
LBB0_10:
	movl	4(%rsi), %edi
	movq	_PORTMASK@GOTPCREL(%rip), %r14
	movq	%rsi, %r15
	movl	(%r14), %esi
	callq	_RTL_VLAN_REG
	movq	-48(%rbp), %r13                 ## 8-byte Reload
	movq	%r13, %rdi
	movl	%eax, %esi
	callq	_rtl_get
	movl	%eax, %r12d
	movl	4(%r15), %edi
	movl	(%r14), %esi
	callq	_RTL_VLAN_REG
	movq	%r13, %rdi
	movl	%eax, %esi
	movl	%ebx, %edx
	callq	_rtl_set
	movq	_RTL8306_NUM_PORTS@GOTPCREL(%rip), %r14
	cmpl	$0, (%r14)
	jle	LBB0_17
## %bb.11:
	notl	%ebx
	andl	%ebx, %r12d
	xorl	%ebx, %ebx
	movq	_PVID@GOTPCREL(%rip), %r15
	jmp	LBB0_12
	.p2align	4, 0x90
LBB0_16:                                ##   in Loop: Header=BB0_12 Depth=1
	incl	%ebx
	cmpl	(%r14), %ebx
	jge	LBB0_17
LBB0_12:                                ## =>This Inner Loop Header: Depth=1
	btl	%ebx, %r12d
	jae	LBB0_16
## %bb.13:                              ##   in Loop: Header=BB0_12 Depth=1
	movq	-48(%rbp), %rax                 ## 8-byte Reload
	cmpl	(%rax), %ebx
	je	LBB0_16
## %bb.14:                              ##   in Loop: Header=BB0_12 Depth=1
	movl	(%r15), %esi
	movl	%ebx, %edi
	callq	_RTL_PORT_REG
	movq	-48(%rbp), %rdi                 ## 8-byte Reload
	movl	%eax, %esi
	callq	_rtl_get
	movq	-56(%rbp), %rcx                 ## 8-byte Reload
	cmpl	4(%rcx), %eax
	jne	LBB0_16
## %bb.15:                              ##   in Loop: Header=BB0_12 Depth=1
	movl	(%r15), %esi
	movl	%ebx, %edi
	callq	_RTL_PORT_REG
	movq	-48(%rbp), %rdi                 ## 8-byte Reload
	movl	4(%rdi), %edx
	decl	%edx
	movl	%eax, %esi
	callq	_rtl_set
	jmp	LBB0_16
LBB0_17:
	xorl	%eax, %eax
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_SWITCH_PORT_FLAG_TAGGED,4,2    ## @SWITCH_PORT_FLAG_TAGGED
	.comm	_PVID,4,2                       ## @PVID
	.comm	_NON_PVID_DISCARD,4,2           ## @NON_PVID_DISCARD
	.comm	_VID_INSERT,4,2                 ## @VID_INSERT
	.comm	_TAG_INSERT,4,2                 ## @TAG_INSERT
	.comm	_PORTMASK,4,2                   ## @PORTMASK
	.comm	_RTL8306_NUM_PORTS,4,2          ## @RTL8306_NUM_PORTS
	.no_dead_strip	_rtl_set_ports
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function rtl_set_ports
_rtl_set_ports:                         ; @rtl_set_ports
	.cfi_startproc
; %bb.0:
	stp	x28, x27, [sp, #-96]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 96
	stp	x26, x25, [sp, #16]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #32]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #48]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #64]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #80]             ; 16-byte Folded Spill
	add	x29, sp, #80
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	mov	x19, x1
	mov	x20, x0
	ldr	w8, [x1]
	cmp	w8, #1
	b.lt	LBB0_9
; %bb.1:
	mov	x26, #0
	mov	x27, #0
	mov	w21, #0
	mov	w28, #1
	b	LBB0_5
LBB0_2:                                 ;   in Loop: Header=BB0_5 Depth=1
	mov	w24, #0
	mov	w23, #2
	mov	x0, x22
LBB0_3:                                 ;   in Loop: Header=BB0_5 Depth=1
Lloh0:
	adrp	x8, _NON_PVID_DISCARD@GOTPAGE
Lloh1:
	ldr	x8, [x8, _NON_PVID_DISCARD@GOTPAGEOFF]
Lloh2:
	ldr	w1, [x8]
	bl	_RTL_PORT_REG
	mov	x1, x0
	mov	x0, x20
	mov	x2, x24
	bl	_rtl_set
	ldr	w0, [x25, x26]
Lloh3:
	adrp	x8, _VID_INSERT@GOTPAGE
Lloh4:
	ldr	x8, [x8, _VID_INSERT@GOTPAGEOFF]
Lloh5:
	ldr	w1, [x8]
	bl	_RTL_PORT_REG
	mov	x1, x0
	mov	x0, x20
	mov	x2, x24
	bl	_rtl_set
	ldr	w0, [x25, x26]
Lloh6:
	adrp	x8, _TAG_INSERT@GOTPAGE
Lloh7:
	ldr	x8, [x8, _TAG_INSERT@GOTPAGEOFF]
Lloh8:
	ldr	w1, [x8]
	bl	_RTL_PORT_REG
	mov	x1, x0
	mov	x0, x20
	mov	x2, x23
	bl	_rtl_set
	ldr	w8, [x19]
LBB0_4:                                 ;   in Loop: Header=BB0_5 Depth=1
	lsl	w9, w28, w22
	orr	w21, w9, w21
	add	x27, x27, #1
	add	x26, x26, #8
	cmp	x27, w8, sxtw
	b.ge	LBB0_10
LBB0_5:                                 ; =>This Inner Loop Header: Depth=1
	ldr	x25, [x19, #8]
	ldr	w22, [x25, x26]
	ldr	w9, [x20]
	cmp	w22, w9
	b.eq	LBB0_4
; %bb.6:                                ;   in Loop: Header=BB0_5 Depth=1
	cmp	x27, x9
	b.eq	LBB0_2
; %bb.7:                                ;   in Loop: Header=BB0_5 Depth=1
	add	x8, x25, x26
	ldr	w8, [x8, #4]
Lloh9:
	adrp	x9, _SWITCH_PORT_FLAG_TAGGED@GOTPAGE
Lloh10:
	ldr	x9, [x9, _SWITCH_PORT_FLAG_TAGGED@GOTPAGEOFF]
Lloh11:
	ldr	w9, [x9]
	lsr	w8, w8, w9
	tbnz	w8, #0, LBB0_2
; %bb.8:                                ;   in Loop: Header=BB0_5 Depth=1
Lloh12:
	adrp	x8, _PVID@GOTPAGE
Lloh13:
	ldr	x8, [x8, _PVID@GOTPAGEOFF]
Lloh14:
	ldr	w1, [x8]
	mov	x0, x22
	bl	_RTL_PORT_REG
	mov	x1, x0
	ldr	w2, [x19, #4]
	mov	x0, x20
	bl	_rtl_set
	ldr	w0, [x25, x26]
	mov	w24, #1
	mov	w23, #1
	b	LBB0_3
LBB0_9:
	mov	w21, #0
LBB0_10:
	ldr	w0, [x19, #4]
Lloh15:
	adrp	x22, _PORTMASK@GOTPAGE
Lloh16:
	ldr	x22, [x22, _PORTMASK@GOTPAGEOFF]
	ldr	w1, [x22]
	bl	_RTL_VLAN_REG
	mov	x1, x0
	mov	x0, x20
	bl	_rtl_get
	mov	x23, x0
	ldr	w0, [x19, #4]
	ldr	w1, [x22]
	bl	_RTL_VLAN_REG
	mov	x1, x0
	mov	x0, x20
	mov	x2, x21
	bl	_rtl_set
Lloh17:
	adrp	x24, _RTL8306_NUM_PORTS@GOTPAGE
Lloh18:
	ldr	x24, [x24, _RTL8306_NUM_PORTS@GOTPAGEOFF]
	ldr	w8, [x24]
	cmp	w8, #1
Lloh19:
	adrp	x25, _PVID@GOTPAGE
Lloh20:
	ldr	x25, [x25, _PVID@GOTPAGEOFF]
	b.lt	LBB0_17
; %bb.11:
	mov	w22, #0
	bic	w21, w23, w21
	b	LBB0_13
LBB0_12:                                ;   in Loop: Header=BB0_13 Depth=1
	add	w22, w22, #1
	ldr	w8, [x24]
	cmp	w22, w8
	b.ge	LBB0_17
LBB0_13:                                ; =>This Inner Loop Header: Depth=1
	lsr	w8, w21, w22
	tbz	w8, #0, LBB0_12
; %bb.14:                               ;   in Loop: Header=BB0_13 Depth=1
	ldr	w8, [x20]
	cmp	w22, w8
	b.eq	LBB0_12
; %bb.15:                               ;   in Loop: Header=BB0_13 Depth=1
	ldr	w1, [x25]
	mov	x0, x22
	bl	_RTL_PORT_REG
	mov	x1, x0
	mov	x0, x20
	bl	_rtl_get
	ldr	w8, [x19, #4]
	cmp	w0, w8
	b.ne	LBB0_12
; %bb.16:                               ;   in Loop: Header=BB0_13 Depth=1
	ldr	w1, [x25]
	mov	x0, x22
	bl	_RTL_PORT_REG
	mov	x1, x0
	ldr	w8, [x20, #4]
	sub	w2, w8, #1
	mov	x0, x20
	bl	_rtl_set
	b	LBB0_12
LBB0_17:
	mov	w0, #0
	ldp	x29, x30, [sp, #80]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #64]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #48]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #32]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #16]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp], #96             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGot	Lloh19, Lloh20
	.loh AdrpLdrGot	Lloh17, Lloh18
	.loh AdrpLdrGot	Lloh15, Lloh16
	.cfi_endproc
                                        ; -- End function
	.comm	_SWITCH_PORT_FLAG_TAGGED,4,2    ; @SWITCH_PORT_FLAG_TAGGED
	.comm	_PVID,4,2                       ; @PVID
	.comm	_NON_PVID_DISCARD,4,2           ; @NON_PVID_DISCARD
	.comm	_VID_INSERT,4,2                 ; @VID_INSERT
	.comm	_TAG_INSERT,4,2                 ; @TAG_INSERT
	.comm	_PORTMASK,4,2                   ; @PORTMASK
	.comm	_RTL8306_NUM_PORTS,4,2          ; @RTL8306_NUM_PORTS
	.no_dead_strip	_rtl_set_ports
.subsections_via_symbols
