	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function mt7531_core_pll_setup
_mt7531_core_pll_setup:                 ## @mt7531_core_pll_setup
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %rbx
	movq	_TOP_SIG_SR@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_mt753x_reg_read
	movq	_PAD_DUAL_SGMII_EN@GOTPCREL(%rip), %rcx
	testl	%eax, (%rcx)
	je	LBB0_1
LBB0_6:
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_1:
	movq	_HWSTRAP@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_mt753x_reg_read
	movq	_XTAL_FSEL_M@GOTPCREL(%rip), %rcx
	andl	(%rcx), %eax
	movq	_XTAL_FSEL_S@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	sarl	%cl, %eax
	cmpl	$129, %eax
	je	LBB0_2
## %bb.3:
	cmpl	$128, %eax
	jne	LBB0_6
## %bb.4:
	movl	$1638400, %r14d                 ## imm = 0x190000
	jmp	LBB0_5
LBB0_2:
	movl	$1310720, %r14d                 ## imm = 0x140000
LBB0_5:
	movq	_PLLGP_EN@GOTPCREL(%rip), %r15
	movl	(%r15), %esi
	movq	%rbx, %rdi
	callq	_mt753x_reg_read
	movq	_EN_COREPLL@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	notl	%edx
	andl	%eax, %edx
	movl	(%r15), %esi
	movq	%rbx, %rdi
	callq	_mt753x_reg_write
	movl	(%r15), %esi
	movq	%rbx, %rdi
	callq	_mt753x_reg_read
	movq	_SW_CLKSW@GOTPCREL(%rip), %rcx
	orl	(%rcx), %eax
	movl	(%r15), %esi
	movq	%rbx, %rdi
	movl	%eax, %edx
	callq	_mt753x_reg_write
	movq	_PLLGP_CR0@GOTPCREL(%rip), %r13
	movl	(%r13), %esi
	movq	%rbx, %rdi
	callq	_mt753x_reg_read
	movq	_RG_COREPLL_EN@GOTPCREL(%rip), %r12
	movl	(%r12), %edx
	notl	%edx
	andl	%eax, %edx
	movl	(%r13), %esi
	movq	%rbx, %rdi
	callq	_mt753x_reg_write
	movl	(%r15), %esi
	movq	%rbx, %rdi
	callq	_mt753x_reg_read
	movq	_SW_PLLGP@GOTPCREL(%rip), %rcx
	orl	(%rcx), %eax
	movl	(%r15), %esi
	movq	%rbx, %rdi
	movl	%eax, %edx
	callq	_mt753x_reg_write
	movl	(%r13), %esi
	movq	%rbx, %rdi
	callq	_mt753x_reg_read
	movq	_RG_COREPLL_POSDIV_M@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	movq	_RG_COREPLL_POSDIV_S@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	movl	$2, %edx
	shll	%cl, %edx
	notl	%esi
	andl	%eax, %esi
	orl	%esi, %edx
	movl	(%r13), %esi
	movq	%rbx, %rdi
	callq	_mt753x_reg_write
	movl	$25, %edi
	movl	$35, %esi
	callq	_usleep_range
	movl	(%r13), %esi
	movq	%rbx, %rdi
	callq	_mt753x_reg_read
	movq	_RG_COREPLL_SDM_PCW_S@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	movq	_RG_COREPLL_SDM_PCW_M@GOTPCREL(%rip), %rdx
	movl	(%rdx), %edx
	shll	%cl, %r14d
	notl	%edx
	andl	%eax, %edx
	orl	%edx, %r14d
	movl	(%r13), %esi
	movq	%rbx, %rdi
	movl	%r14d, %edx
	callq	_mt753x_reg_write
	movl	(%r13), %esi
	movq	%rbx, %rdi
	callq	_mt753x_reg_read
	movq	_RG_COREPLL_SDM_PCW_CHG@GOTPCREL(%rip), %r14
	orl	(%r14), %eax
	movl	(%r13), %esi
	movq	%rbx, %rdi
	movl	%eax, %edx
	callq	_mt753x_reg_write
	movl	$10, %edi
	movl	$20, %esi
	callq	_usleep_range
	movl	(%r13), %esi
	movq	%rbx, %rdi
	callq	_mt753x_reg_read
	movl	(%r14), %edx
	notl	%edx
	andl	%eax, %edx
	movl	(%r13), %esi
	movq	%rbx, %rdi
	callq	_mt753x_reg_write
	movq	_ANA_PLLGP_CR5@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	movl	$11337728, %edx                 ## imm = 0xAD0000
	callq	_mt753x_reg_write
	movq	_ANA_PLLGP_CR2@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	movl	$83099648, %edx                 ## imm = 0x4F40000
	callq	_mt753x_reg_write
	movl	(%r13), %esi
	movq	%rbx, %rdi
	callq	_mt753x_reg_read
	orl	(%r12), %eax
	movl	(%r13), %esi
	movq	%rbx, %rdi
	movl	%eax, %edx
	callq	_mt753x_reg_write
	movl	(%r15), %esi
	movq	%rbx, %rdi
	callq	_mt753x_reg_read
	movq	_EN_COREPLL@GOTPCREL(%rip), %rcx
	orl	(%rcx), %eax
	movl	(%r15), %esi
	movq	%rbx, %rdi
	movl	%eax, %edx
	callq	_mt753x_reg_write
	movl	$25, %edi
	movl	$35, %esi
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_usleep_range                   ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_TOP_SIG_SR,4,2                 ## @TOP_SIG_SR
	.comm	_PAD_DUAL_SGMII_EN,4,2          ## @PAD_DUAL_SGMII_EN
	.comm	_HWSTRAP,4,2                    ## @HWSTRAP
	.comm	_XTAL_FSEL_M,4,2                ## @XTAL_FSEL_M
	.comm	_XTAL_FSEL_S,4,2                ## @XTAL_FSEL_S
	.comm	_PLLGP_EN,4,2                   ## @PLLGP_EN
	.comm	_EN_COREPLL,4,2                 ## @EN_COREPLL
	.comm	_SW_CLKSW,4,2                   ## @SW_CLKSW
	.comm	_PLLGP_CR0,4,2                  ## @PLLGP_CR0
	.comm	_RG_COREPLL_EN,4,2              ## @RG_COREPLL_EN
	.comm	_SW_PLLGP,4,2                   ## @SW_PLLGP
	.comm	_RG_COREPLL_POSDIV_M,4,2        ## @RG_COREPLL_POSDIV_M
	.comm	_RG_COREPLL_POSDIV_S,4,2        ## @RG_COREPLL_POSDIV_S
	.comm	_RG_COREPLL_SDM_PCW_M,4,2       ## @RG_COREPLL_SDM_PCW_M
	.comm	_RG_COREPLL_SDM_PCW_S,4,2       ## @RG_COREPLL_SDM_PCW_S
	.comm	_RG_COREPLL_SDM_PCW_CHG,4,2     ## @RG_COREPLL_SDM_PCW_CHG
	.comm	_ANA_PLLGP_CR5,4,2              ## @ANA_PLLGP_CR5
	.comm	_ANA_PLLGP_CR2,4,2              ## @ANA_PLLGP_CR2
	.no_dead_strip	_mt7531_core_pll_setup
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function mt7531_core_pll_setup
_mt7531_core_pll_setup:                 ; @mt7531_core_pll_setup
	.cfi_startproc
; %bb.0:
	stp	x24, x23, [sp, #-64]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x19, x0
Lloh0:
	adrp	x8, _TOP_SIG_SR@GOTPAGE
Lloh1:
	ldr	x8, [x8, _TOP_SIG_SR@GOTPAGEOFF]
Lloh2:
	ldr	w1, [x8]
	bl	_mt753x_reg_read
Lloh3:
	adrp	x8, _PAD_DUAL_SGMII_EN@GOTPAGE
Lloh4:
	ldr	x8, [x8, _PAD_DUAL_SGMII_EN@GOTPAGEOFF]
Lloh5:
	ldr	w8, [x8]
	tst	w8, w0
	b.eq	LBB0_2
LBB0_1:
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	ret
LBB0_2:
Lloh6:
	adrp	x8, _HWSTRAP@GOTPAGE
Lloh7:
	ldr	x8, [x8, _HWSTRAP@GOTPAGEOFF]
Lloh8:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_mt753x_reg_read
Lloh9:
	adrp	x8, _XTAL_FSEL_M@GOTPAGE
Lloh10:
	ldr	x8, [x8, _XTAL_FSEL_M@GOTPAGEOFF]
Lloh11:
	ldr	w8, [x8]
	and	w8, w8, w0
Lloh12:
	adrp	x9, _XTAL_FSEL_S@GOTPAGE
Lloh13:
	ldr	x9, [x9, _XTAL_FSEL_S@GOTPAGEOFF]
Lloh14:
	ldr	w9, [x9]
	asr	w8, w8, w9
	cmp	w8, #129
	b.eq	LBB0_5
; %bb.3:
	cmp	w8, #128
	b.ne	LBB0_1
; %bb.4:
	mov	w24, #1638400
	b	LBB0_6
LBB0_5:
	mov	w24, #1310720
LBB0_6:
Lloh15:
	adrp	x20, _PLLGP_EN@GOTPAGE
Lloh16:
	ldr	x20, [x20, _PLLGP_EN@GOTPAGEOFF]
	ldr	w1, [x20]
	mov	x0, x19
	bl	_mt753x_reg_read
Lloh17:
	adrp	x21, _EN_COREPLL@GOTPAGE
Lloh18:
	ldr	x21, [x21, _EN_COREPLL@GOTPAGEOFF]
	ldr	w8, [x21]
	bic	w2, w0, w8
	ldr	w1, [x20]
	mov	x0, x19
	bl	_mt753x_reg_write
	ldr	w1, [x20]
	mov	x0, x19
	bl	_mt753x_reg_read
Lloh19:
	adrp	x8, _SW_CLKSW@GOTPAGE
Lloh20:
	ldr	x8, [x8, _SW_CLKSW@GOTPAGEOFF]
Lloh21:
	ldr	w8, [x8]
	orr	w2, w8, w0
	ldr	w1, [x20]
	mov	x0, x19
	bl	_mt753x_reg_write
Lloh22:
	adrp	x22, _PLLGP_CR0@GOTPAGE
Lloh23:
	ldr	x22, [x22, _PLLGP_CR0@GOTPAGEOFF]
	ldr	w1, [x22]
	mov	x0, x19
	bl	_mt753x_reg_read
Lloh24:
	adrp	x23, _RG_COREPLL_EN@GOTPAGE
Lloh25:
	ldr	x23, [x23, _RG_COREPLL_EN@GOTPAGEOFF]
	ldr	w8, [x23]
	bic	w2, w0, w8
	ldr	w1, [x22]
	mov	x0, x19
	bl	_mt753x_reg_write
	ldr	w1, [x20]
	mov	x0, x19
	bl	_mt753x_reg_read
Lloh26:
	adrp	x8, _SW_PLLGP@GOTPAGE
Lloh27:
	ldr	x8, [x8, _SW_PLLGP@GOTPAGEOFF]
Lloh28:
	ldr	w8, [x8]
	orr	w2, w8, w0
	ldr	w1, [x20]
	mov	x0, x19
	bl	_mt753x_reg_write
	ldr	w1, [x22]
	mov	x0, x19
	bl	_mt753x_reg_read
Lloh29:
	adrp	x8, _RG_COREPLL_POSDIV_M@GOTPAGE
Lloh30:
	ldr	x8, [x8, _RG_COREPLL_POSDIV_M@GOTPAGEOFF]
Lloh31:
	ldr	w8, [x8]
Lloh32:
	adrp	x9, _RG_COREPLL_POSDIV_S@GOTPAGE
Lloh33:
	ldr	x9, [x9, _RG_COREPLL_POSDIV_S@GOTPAGEOFF]
	bic	w8, w0, w8
Lloh34:
	ldr	w9, [x9]
	mov	w10, #2
	lsl	w9, w10, w9
	orr	w2, w9, w8
	ldr	w1, [x22]
	mov	x0, x19
	bl	_mt753x_reg_write
	mov	w0, #25
	mov	w1, #35
	bl	_usleep_range
	ldr	w1, [x22]
	mov	x0, x19
	bl	_mt753x_reg_read
Lloh35:
	adrp	x8, _RG_COREPLL_SDM_PCW_M@GOTPAGE
Lloh36:
	ldr	x8, [x8, _RG_COREPLL_SDM_PCW_M@GOTPAGEOFF]
Lloh37:
	ldr	w8, [x8]
	bic	w8, w0, w8
Lloh38:
	adrp	x9, _RG_COREPLL_SDM_PCW_S@GOTPAGE
Lloh39:
	ldr	x9, [x9, _RG_COREPLL_SDM_PCW_S@GOTPAGEOFF]
Lloh40:
	ldr	w9, [x9]
	lsl	w9, w24, w9
	orr	w2, w9, w8
	ldr	w1, [x22]
	mov	x0, x19
	bl	_mt753x_reg_write
	ldr	w1, [x22]
	mov	x0, x19
	bl	_mt753x_reg_read
Lloh41:
	adrp	x24, _RG_COREPLL_SDM_PCW_CHG@GOTPAGE
Lloh42:
	ldr	x24, [x24, _RG_COREPLL_SDM_PCW_CHG@GOTPAGEOFF]
	ldr	w8, [x24]
	orr	w2, w8, w0
	ldr	w1, [x22]
	mov	x0, x19
	bl	_mt753x_reg_write
	mov	w0, #10
	mov	w1, #20
	bl	_usleep_range
	ldr	w1, [x22]
	mov	x0, x19
	bl	_mt753x_reg_read
	ldr	w8, [x24]
	bic	w2, w0, w8
	ldr	w1, [x22]
	mov	x0, x19
	bl	_mt753x_reg_write
Lloh43:
	adrp	x8, _ANA_PLLGP_CR5@GOTPAGE
Lloh44:
	ldr	x8, [x8, _ANA_PLLGP_CR5@GOTPAGEOFF]
Lloh45:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #11337728
	bl	_mt753x_reg_write
Lloh46:
	adrp	x8, _ANA_PLLGP_CR2@GOTPAGE
Lloh47:
	ldr	x8, [x8, _ANA_PLLGP_CR2@GOTPAGEOFF]
Lloh48:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #83099648
	bl	_mt753x_reg_write
	ldr	w1, [x22]
	mov	x0, x19
	bl	_mt753x_reg_read
	ldr	w8, [x23]
	orr	w2, w8, w0
	ldr	w1, [x22]
	mov	x0, x19
	bl	_mt753x_reg_write
	ldr	w1, [x20]
	mov	x0, x19
	bl	_mt753x_reg_read
	ldr	w8, [x21]
	orr	w2, w8, w0
	ldr	w1, [x20]
	mov	x0, x19
	bl	_mt753x_reg_write
	mov	w0, #25
	mov	w1, #35
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	b	_usleep_range
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh46, Lloh47, Lloh48
	.loh AdrpLdrGotLdr	Lloh43, Lloh44, Lloh45
	.loh AdrpLdrGot	Lloh41, Lloh42
	.loh AdrpLdrGotLdr	Lloh38, Lloh39, Lloh40
	.loh AdrpLdrGotLdr	Lloh35, Lloh36, Lloh37
	.loh AdrpLdrGotLdr	Lloh32, Lloh33, Lloh34
	.loh AdrpLdrGotLdr	Lloh29, Lloh30, Lloh31
	.loh AdrpLdrGotLdr	Lloh26, Lloh27, Lloh28
	.loh AdrpLdrGot	Lloh24, Lloh25
	.loh AdrpLdrGot	Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh19, Lloh20, Lloh21
	.loh AdrpLdrGot	Lloh17, Lloh18
	.loh AdrpLdrGot	Lloh15, Lloh16
	.cfi_endproc
                                        ; -- End function
	.comm	_TOP_SIG_SR,4,2                 ; @TOP_SIG_SR
	.comm	_PAD_DUAL_SGMII_EN,4,2          ; @PAD_DUAL_SGMII_EN
	.comm	_HWSTRAP,4,2                    ; @HWSTRAP
	.comm	_XTAL_FSEL_M,4,2                ; @XTAL_FSEL_M
	.comm	_XTAL_FSEL_S,4,2                ; @XTAL_FSEL_S
	.comm	_PLLGP_EN,4,2                   ; @PLLGP_EN
	.comm	_EN_COREPLL,4,2                 ; @EN_COREPLL
	.comm	_SW_CLKSW,4,2                   ; @SW_CLKSW
	.comm	_PLLGP_CR0,4,2                  ; @PLLGP_CR0
	.comm	_RG_COREPLL_EN,4,2              ; @RG_COREPLL_EN
	.comm	_SW_PLLGP,4,2                   ; @SW_PLLGP
	.comm	_RG_COREPLL_POSDIV_M,4,2        ; @RG_COREPLL_POSDIV_M
	.comm	_RG_COREPLL_POSDIV_S,4,2        ; @RG_COREPLL_POSDIV_S
	.comm	_RG_COREPLL_SDM_PCW_M,4,2       ; @RG_COREPLL_SDM_PCW_M
	.comm	_RG_COREPLL_SDM_PCW_S,4,2       ; @RG_COREPLL_SDM_PCW_S
	.comm	_RG_COREPLL_SDM_PCW_CHG,4,2     ; @RG_COREPLL_SDM_PCW_CHG
	.comm	_ANA_PLLGP_CR5,4,2              ; @ANA_PLLGP_CR5
	.comm	_ANA_PLLGP_CR2,4,2              ; @ANA_PLLGP_CR2
	.no_dead_strip	_mt7531_core_pll_setup
.subsections_via_symbols
