	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function rt3050_fwd_config
_rt3050_fwd_config:                     ## @rt3050_fwd_config
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r14
	pushq	%rbx
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	movq	%rdi, %rbx
	movq	_ralink_soc@GOTPCREL(%rip), %r14
	movq	(%r14), %rax
	movq	_RT305X_SOC_RT3052@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	je	LBB0_2
## %bb.1:
	movq	%rbx, %rdi
	callq	_fe_set_clock_cycle
	testl	%eax, %eax
	jne	LBB0_5
LBB0_2:
	movq	%rbx, %rdi
	callq	_fe_fwd_config
	movq	(%r14), %rax
	movq	_RT305X_SOC_RT3352@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	je	LBB0_4
## %bb.3:
	movq	_FE_PSE_FQFC_CFG_INIT@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_FE_PSE_FQ_CFG@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_fe_w32
LBB0_4:
	movq	%rbx, %rdi
	callq	_fe_csum_config
	xorl	%eax, %eax
LBB0_5:
	popq	%rbx
	popq	%r14
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_ralink_soc,8,3                 ## @ralink_soc
	.comm	_RT305X_SOC_RT3052,8,3          ## @RT305X_SOC_RT3052
	.comm	_RT305X_SOC_RT3352,8,3          ## @RT305X_SOC_RT3352
	.comm	_FE_PSE_FQFC_CFG_INIT,4,2       ## @FE_PSE_FQFC_CFG_INIT
	.comm	_FE_PSE_FQ_CFG,4,2              ## @FE_PSE_FQ_CFG
	.no_dead_strip	_rt3050_fwd_config
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function rt3050_fwd_config
_rt3050_fwd_config:                     ; @rt3050_fwd_config
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x19, x0
Lloh0:
	adrp	x20, _ralink_soc@GOTPAGE
Lloh1:
	ldr	x20, [x20, _ralink_soc@GOTPAGEOFF]
	ldr	x8, [x20]
Lloh2:
	adrp	x9, _RT305X_SOC_RT3052@GOTPAGE
Lloh3:
	ldr	x9, [x9, _RT305X_SOC_RT3052@GOTPAGEOFF]
Lloh4:
	ldr	x9, [x9]
	cmp	x8, x9
	b.eq	LBB0_2
; %bb.1:
	mov	x0, x19
	bl	_fe_set_clock_cycle
	cbnz	w0, LBB0_5
LBB0_2:
	mov	x0, x19
	bl	_fe_fwd_config
	ldr	x8, [x20]
Lloh5:
	adrp	x9, _RT305X_SOC_RT3352@GOTPAGE
Lloh6:
	ldr	x9, [x9, _RT305X_SOC_RT3352@GOTPAGEOFF]
Lloh7:
	ldr	x9, [x9]
	cmp	x8, x9
	b.eq	LBB0_4
; %bb.3:
Lloh8:
	adrp	x8, _FE_PSE_FQFC_CFG_INIT@GOTPAGE
Lloh9:
	ldr	x8, [x8, _FE_PSE_FQFC_CFG_INIT@GOTPAGEOFF]
Lloh10:
	ldr	w0, [x8]
Lloh11:
	adrp	x8, _FE_PSE_FQ_CFG@GOTPAGE
Lloh12:
	ldr	x8, [x8, _FE_PSE_FQ_CFG@GOTPAGEOFF]
Lloh13:
	ldr	w1, [x8]
	bl	_fe_w32
LBB0_4:
	mov	x0, x19
	bl	_fe_csum_config
	mov	w0, #0
LBB0_5:
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.cfi_endproc
                                        ; -- End function
	.comm	_ralink_soc,8,3                 ; @ralink_soc
	.comm	_RT305X_SOC_RT3052,8,3          ; @RT305X_SOC_RT3052
	.comm	_RT305X_SOC_RT3352,8,3          ; @RT305X_SOC_RT3352
	.comm	_FE_PSE_FQFC_CFG_INIT,4,2       ; @FE_PSE_FQFC_CFG_INIT
	.comm	_FE_PSE_FQ_CFG,4,2              ; @FE_PSE_FQ_CFG
	.no_dead_strip	_rt3050_fwd_config
.subsections_via_symbols
