	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_mt753x_apply_vlan_config       ## -- Begin function mt753x_apply_vlan_config
	.p2align	4, 0x90
_mt753x_apply_vlan_config:              ## @mt753x_apply_vlan_config
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$24, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r13
	movq	_MT753X_NUM_PORTS@GOTPCREL(%rip), %r12
	movl	(%r12), %ecx
	testl	%ecx, %ecx
	jle	LBB0_3
## %bb.1:
	xorl	%ebx, %ebx
	movq	_PORT_MATRIX_M@GOTPCREL(%rip), %r14
	movq	_SECURITY_MODE@GOTPCREL(%rip), %r15
	.p2align	4, 0x90
LBB0_2:                                 ## =>This Inner Loop Header: Depth=1
	movl	%ebx, %edi
	callq	_PCR
	movl	(%r15), %edx
	orl	(%r14), %edx
	movq	%r13, %rdi
	movl	%eax, %esi
	callq	_mt753x_reg_write
	incl	%ebx
	movl	(%r12), %ecx
	cmpl	%ecx, %ebx
	jl	LBB0_2
LBB0_3:
	movq	_MT753X_NUM_VLANS@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	testl	%eax, %eax
	jle	LBB0_4
## %bb.27:
	xorl	%r15d, %r15d
	xorl	%r14d, %r14d
	movl	$0, -44(%rbp)                   ## 4-byte Folded Spill
	movq	%r13, -56(%rbp)                 ## 8-byte Spill
	jmp	LBB0_28
	.p2align	4, 0x90
LBB0_36:                                ##   in Loop: Header=BB0_28 Depth=1
	movq	_MT753X_NUM_VLANS@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movq	-56(%rbp), %r13                 ## 8-byte Reload
LBB0_37:                                ##   in Loop: Header=BB0_28 Depth=1
	movq	_MT753X_NUM_PORTS@GOTPCREL(%rip), %r12
	incq	%r15
	movslq	%eax, %rdx
	cmpq	%rdx, %r15
	jge	LBB0_5
LBB0_28:                                ## =>This Loop Header: Depth=1
                                        ##     Child Loop BB0_31 Depth 2
	movq	(%r13), %rdx
	leaq	(%r15,%r15,2), %rsi
	movl	(%rdx,%rsi,4), %r12d
	testl	%r12d, %r12d
	je	LBB0_37
## %bb.29:                              ##   in Loop: Header=BB0_28 Depth=1
	testl	%ecx, %ecx
	jle	LBB0_37
## %bb.30:                              ##   in Loop: Header=BB0_28 Depth=1
	movl	4(%rdx,%rsi,4), %r13d
	xorl	%ebx, %ebx
	jmp	LBB0_31
	.p2align	4, 0x90
LBB0_34:                                ##   in Loop: Header=BB0_31 Depth=2
	orl	%edx, -44(%rbp)                 ## 4-byte Folded Spill
LBB0_35:                                ##   in Loop: Header=BB0_31 Depth=2
	incl	%ebx
	movq	_MT753X_NUM_PORTS@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	cmpl	%ecx, %ebx
	jge	LBB0_36
LBB0_31:                                ##   Parent Loop BB0_28 Depth=1
                                        ## =>  This Inner Loop Header: Depth=2
	movl	%ebx, %edi
	callq	_BIT
	testl	%r12d, %eax
	je	LBB0_35
## %bb.32:                              ##   in Loop: Header=BB0_31 Depth=2
	movl	%ebx, %edi
	callq	_BIT
	movl	$1, %edx
	movl	%ebx, %ecx
	shll	%cl, %edx
	testl	%r13d, %eax
	je	LBB0_34
## %bb.33:                              ##   in Loop: Header=BB0_31 Depth=2
	orl	%edx, %r14d
	jmp	LBB0_35
LBB0_4:
	movl	$0, -44(%rbp)                   ## 4-byte Folded Spill
	xorl	%r14d, %r14d
LBB0_5:
	testl	%ecx, %ecx
	jle	LBB0_12
## %bb.6:
	xorl	%ebx, %ebx
	movq	_VLAN_ATTR_S@GOTPCREL(%rip), %r12
	jmp	LBB0_7
	.p2align	4, 0x90
LBB0_10:                                ##   in Loop: Header=BB0_7 Depth=1
	movl	%ebx, %edi
	callq	_PVC
	movq	%r13, %rdi
	movl	%eax, %esi
	movl	%r15d, %edx
	callq	_mt753x_reg_write
	incl	%ebx
	movq	_MT753X_NUM_PORTS@GOTPCREL(%rip), %rax
	cmpl	(%rax), %ebx
	jge	LBB0_11
LBB0_7:                                 ## =>This Inner Loop Header: Depth=1
	movq	_STAG_VPID_S@GOTPCREL(%rip), %rax
	movzbl	(%rax), %ecx
	movl	$33024, %r15d                   ## imm = 0x8100
	shll	%cl, %r15d
	movl	%ebx, %edi
	callq	_BIT
	testl	%eax, -44(%rbp)                 ## 4-byte Folded Reload
	je	LBB0_10
## %bb.8:                               ##   in Loop: Header=BB0_7 Depth=1
	movl	%ebx, %edi
	callq	_BIT
	testl	%r14d, %eax
	jne	LBB0_10
## %bb.9:                               ##   in Loop: Header=BB0_7 Depth=1
	movq	_STAG_VPID_S@GOTPCREL(%rip), %rax
	movzbl	(%rax), %ecx
	movl	$33024, %eax                    ## imm = 0x8100
	shll	%cl, %eax
	movq	_VA_TRANSPARENT_PORT@GOTPCREL(%rip), %rcx
	movl	(%rcx), %r15d
	movzbl	(%r12), %ecx
	shll	%cl, %r15d
	orl	%eax, %r15d
	jmp	LBB0_10
LBB0_11:
	movq	_MT753X_NUM_VLANS@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movq	_MT753X_NUM_PORTS@GOTPCREL(%rip), %r12
LBB0_12:
	testl	%eax, %eax
	movq	_MT753X_NUM_VLANS@GOTPCREL(%rip), %r15
	jle	LBB0_20
## %bb.13:
	xorl	%ebx, %ebx
	.p2align	4, 0x90
LBB0_14:                                ## =>This Inner Loop Header: Depth=1
	movq	%r13, %rdi
	movl	%ebx, %esi
	movl	%ebx, %edx
	xorl	%ecx, %ecx
	xorl	%r8d, %r8d
	callq	_mt753x_write_vlan_entry
	incl	%ebx
	movl	(%r15), %eax
	cmpl	%eax, %ebx
	jl	LBB0_14
## %bb.15:
	testl	%eax, %eax
	jle	LBB0_20
## %bb.16:
	movl	$8, %ebx
	xorl	%r14d, %r14d
	jmp	LBB0_17
	.p2align	4, 0x90
LBB0_19:                                ##   in Loop: Header=BB0_17 Depth=1
	incq	%r14
	movslq	%eax, %rcx
	addq	$12, %rbx
	cmpq	%rcx, %r14
	jge	LBB0_20
LBB0_17:                                ## =>This Inner Loop Header: Depth=1
	movq	(%r13), %rdx
	movl	-8(%rdx,%rbx), %ecx
	testl	%ecx, %ecx
	je	LBB0_19
## %bb.18:                              ##   in Loop: Header=BB0_17 Depth=1
	movl	-4(%rdx,%rbx), %r8d
	movl	(%rdx,%rbx), %edx
	movq	%r13, %rdi
	movl	%r14d, %esi
	callq	_mt753x_write_vlan_entry
	movl	(%r15), %eax
	jmp	LBB0_19
LBB0_20:
	cmpl	$0, (%r12)
	jle	LBB0_38
## %bb.21:
	xorl	%r15d, %r15d
	movq	_GRP_PORT_VID_M@GOTPCREL(%rip), %r14
	.p2align	4, 0x90
LBB0_22:                                ## =>This Inner Loop Header: Depth=1
	movq	8(%r13), %rcx
	movslq	(%rcx,%r15,4), %rcx
	movl	$0, %r12d
	cmpl	%eax, %ecx
	jge	LBB0_25
## %bb.23:                              ##   in Loop: Header=BB0_22 Depth=1
	movq	(%r13), %rax
	leaq	(%rcx,%rcx,2), %rcx
	cmpl	$0, (%rax,%rcx,4)
	movl	$0, %r12d
	je	LBB0_25
## %bb.24:                              ##   in Loop: Header=BB0_22 Depth=1
	movl	8(%rax,%rcx,4), %r12d
LBB0_25:                                ##   in Loop: Header=BB0_22 Depth=1
	movl	%r15d, %edi
	callq	_PPBV1
	movq	%r13, %rdi
	movl	%eax, %esi
	callq	_mt753x_reg_read
	movl	(%r14), %ebx
	notl	%ebx
	andl	%eax, %ebx
	orl	%r12d, %ebx
	movl	%r15d, %edi
	callq	_PPBV1
	movq	%r13, %rdi
	movl	%eax, %esi
	movl	%ebx, %edx
	callq	_mt753x_reg_write
	incq	%r15
	movq	_MT753X_NUM_PORTS@GOTPCREL(%rip), %rax
	movslq	(%rax), %rax
	cmpq	%rax, %r15
	jge	LBB0_38
## %bb.26:                              ##   in Loop: Header=BB0_22 Depth=1
	movq	_MT753X_NUM_VLANS@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	jmp	LBB0_22
LBB0_38:
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_MT753X_NUM_PORTS,4,2           ## @MT753X_NUM_PORTS
	.comm	_PORT_MATRIX_M,4,2              ## @PORT_MATRIX_M
	.comm	_SECURITY_MODE,4,2              ## @SECURITY_MODE
	.comm	_MT753X_NUM_VLANS,4,2           ## @MT753X_NUM_VLANS
	.comm	_STAG_VPID_S,4,2                ## @STAG_VPID_S
	.comm	_VA_TRANSPARENT_PORT,4,2        ## @VA_TRANSPARENT_PORT
	.comm	_VLAN_ATTR_S,4,2                ## @VLAN_ATTR_S
	.comm	_GRP_PORT_VID_M,4,2             ## @GRP_PORT_VID_M
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_mt753x_apply_vlan_config       ; -- Begin function mt753x_apply_vlan_config
	.p2align	2
_mt753x_apply_vlan_config:              ; @mt753x_apply_vlan_config
	.cfi_startproc
; %bb.0:
	stp	x28, x27, [sp, #-96]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 96
	stp	x26, x25, [sp, #16]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #32]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #48]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #64]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #80]             ; 16-byte Folded Spill
	add	x29, sp, #80
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	mov	x19, x0
Lloh0:
	adrp	x22, _MT753X_NUM_PORTS@GOTPAGE
Lloh1:
	ldr	x22, [x22, _MT753X_NUM_PORTS@GOTPAGEOFF]
	ldr	w9, [x22]
	cmp	w9, #1
	b.lt	LBB0_3
; %bb.1:
	mov	w20, #0
Lloh2:
	adrp	x21, _PORT_MATRIX_M@GOTPAGE
Lloh3:
	ldr	x21, [x21, _PORT_MATRIX_M@GOTPAGEOFF]
Lloh4:
	adrp	x23, _SECURITY_MODE@GOTPAGE
Lloh5:
	ldr	x23, [x23, _SECURITY_MODE@GOTPAGEOFF]
LBB0_2:                                 ; =>This Inner Loop Header: Depth=1
	mov	x0, x20
	bl	_PCR
	mov	x1, x0
	ldr	w8, [x21]
	ldr	w9, [x23]
	orr	w2, w9, w8
	mov	x0, x19
	bl	_mt753x_reg_write
	add	w20, w20, #1
	ldr	w9, [x22]
	cmp	w20, w9
	b.lt	LBB0_2
LBB0_3:
Lloh6:
	adrp	x23, _MT753X_NUM_VLANS@GOTPAGE
Lloh7:
	ldr	x23, [x23, _MT753X_NUM_VLANS@GOTPAGEOFF]
	ldr	w8, [x23]
	cmp	w8, #1
	b.lt	LBB0_12
; %bb.4:
	mov	x21, #0
	mov	w25, #0
	mov	w24, #0
	mov	w11, #12
	mov	w27, #1
	b	LBB0_7
LBB0_5:                                 ;   in Loop: Header=BB0_7 Depth=1
	mov	x23, x26
	ldr	w8, [x26]
	mov	w11, #12
LBB0_6:                                 ;   in Loop: Header=BB0_7 Depth=1
	add	x21, x21, #1
	cmp	x21, w8, sxtw
	b.ge	LBB0_13
LBB0_7:                                 ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_10 Depth 2
	ldr	x10, [x19]
	madd	x10, x21, x11, x10
	ldr	w28, [x10]
	cmp	w28, #0
	ccmp	w9, #1, #8, ne
	b.lt	LBB0_6
; %bb.8:                                ;   in Loop: Header=BB0_7 Depth=1
	mov	x26, x23
	mov	w20, #0
	ldr	w23, [x10, #4]
	b	LBB0_10
LBB0_9:                                 ;   in Loop: Header=BB0_10 Depth=2
	add	w20, w20, #1
	ldr	w9, [x22]
	cmp	w20, w9
	b.ge	LBB0_5
LBB0_10:                                ;   Parent Loop BB0_7 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	mov	x0, x20
	bl	_BIT
	tst	w0, w28
	b.eq	LBB0_9
; %bb.11:                               ;   in Loop: Header=BB0_10 Depth=2
	mov	x0, x20
	bl	_BIT
	tst	w0, w23
	lsl	w8, w27, w20
	orr	w9, w8, w24
	orr	w8, w8, w25
	csel	w24, w9, w24, eq
	csel	w25, w25, w8, eq
	b	LBB0_9
LBB0_12:
	mov	w24, #0
	mov	w25, #0
LBB0_13:
	cmp	w9, #1
	b.lt	LBB0_20
; %bb.14:
	mov	w20, #0
Lloh8:
	adrp	x26, _STAG_VPID_S@GOTPAGE
Lloh9:
	ldr	x26, [x26, _STAG_VPID_S@GOTPAGEOFF]
	mov	w27, #33024
Lloh10:
	adrp	x28, _VLAN_ATTR_S@GOTPAGE
Lloh11:
	ldr	x28, [x28, _VLAN_ATTR_S@GOTPAGEOFF]
	b	LBB0_16
LBB0_15:                                ;   in Loop: Header=BB0_16 Depth=1
	mov	x0, x20
	bl	_PVC
	mov	x1, x0
	mov	x0, x19
	mov	x2, x21
	bl	_mt753x_reg_write
	add	w20, w20, #1
	ldr	w8, [x22]
	cmp	w20, w8
	b.ge	LBB0_19
LBB0_16:                                ; =>This Inner Loop Header: Depth=1
	ldr	w8, [x26]
	lsl	w21, w27, w8
	mov	x0, x20
	bl	_BIT
	tst	w0, w24
	b.eq	LBB0_15
; %bb.17:                               ;   in Loop: Header=BB0_16 Depth=1
	mov	x0, x20
	bl	_BIT
	tst	w0, w25
	b.ne	LBB0_15
; %bb.18:                               ;   in Loop: Header=BB0_16 Depth=1
	ldr	w8, [x26]
	lsl	w8, w27, w8
Lloh12:
	adrp	x9, _VA_TRANSPARENT_PORT@GOTPAGE
Lloh13:
	ldr	x9, [x9, _VA_TRANSPARENT_PORT@GOTPAGEOFF]
Lloh14:
	ldr	w9, [x9]
	ldr	w10, [x28]
	lsl	w9, w9, w10
	orr	w21, w9, w8
	b	LBB0_15
LBB0_19:
	ldr	w8, [x23]
LBB0_20:
	cmp	w8, #1
	b.lt	LBB0_28
; %bb.21:
	mov	w20, #0
LBB0_22:                                ; =>This Inner Loop Header: Depth=1
	mov	x0, x19
	mov	x1, x20
	mov	x2, x20
	mov	w3, #0
	mov	w4, #0
	bl	_mt753x_write_vlan_entry
	add	w20, w20, #1
	ldr	w8, [x23]
	cmp	w20, w8
	b.lt	LBB0_22
; %bb.23:
	cmp	w8, #1
	b.lt	LBB0_28
; %bb.24:
	mov	x21, #0
	mov	x20, #0
	b	LBB0_26
LBB0_25:                                ;   in Loop: Header=BB0_26 Depth=1
	add	x20, x20, #1
	add	x21, x21, #12
	cmp	x20, w8, sxtw
	b.ge	LBB0_28
LBB0_26:                                ; =>This Inner Loop Header: Depth=1
	ldr	x9, [x19]
	ldr	w3, [x9, x21]
	cbz	w3, LBB0_25
; %bb.27:                               ;   in Loop: Header=BB0_26 Depth=1
	add	x8, x9, x21
	ldp	w4, w2, [x8, #4]
	mov	x0, x19
	mov	x1, x20
	bl	_mt753x_write_vlan_entry
	ldr	w8, [x23]
	b	LBB0_25
LBB0_28:
	ldr	w9, [x22]
	cmp	w9, #1
	b.lt	LBB0_36
; %bb.29:
	mov	x20, #0
	mov	w24, #12
Lloh15:
	adrp	x25, _GRP_PORT_VID_M@GOTPAGE
Lloh16:
	ldr	x25, [x25, _GRP_PORT_VID_M@GOTPAGEOFF]
LBB0_30:                                ; =>This Inner Loop Header: Depth=1
	ldr	x9, [x19, #8]
	ldrsw	x9, [x9, x20, lsl #2]
	cmp	w9, w8
	b.ge	LBB0_33
; %bb.31:                               ;   in Loop: Header=BB0_30 Depth=1
	ldr	x8, [x19]
	mul	x10, x9, x24
	ldr	w10, [x8, x10]
	cbz	w10, LBB0_33
; %bb.32:                               ;   in Loop: Header=BB0_30 Depth=1
	madd	x8, x9, x24, x8
	ldr	w21, [x8, #8]
	b	LBB0_34
LBB0_33:                                ;   in Loop: Header=BB0_30 Depth=1
	mov	w21, #0
LBB0_34:                                ;   in Loop: Header=BB0_30 Depth=1
	mov	x0, x20
	bl	_PPBV1
	mov	x1, x0
	mov	x0, x19
	bl	_mt753x_reg_read
	ldr	w8, [x25]
	bic	w8, w0, w8
	orr	w21, w8, w21
	mov	x0, x20
	bl	_PPBV1
	mov	x1, x0
	mov	x0, x19
	mov	x2, x21
	bl	_mt753x_reg_write
	add	x20, x20, #1
	ldrsw	x8, [x22]
	cmp	x20, x8
	b.ge	LBB0_36
; %bb.35:                               ;   in Loop: Header=BB0_30 Depth=1
	ldr	w8, [x23]
	b	LBB0_30
LBB0_36:
	ldp	x29, x30, [sp, #80]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #64]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #48]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #32]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #16]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp], #96             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGot	Lloh4, Lloh5
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpLdrGot	Lloh6, Lloh7
	.loh AdrpLdrGot	Lloh10, Lloh11
	.loh AdrpLdrGot	Lloh8, Lloh9
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGot	Lloh15, Lloh16
	.cfi_endproc
                                        ; -- End function
	.comm	_MT753X_NUM_PORTS,4,2           ; @MT753X_NUM_PORTS
	.comm	_PORT_MATRIX_M,4,2              ; @PORT_MATRIX_M
	.comm	_SECURITY_MODE,4,2              ; @SECURITY_MODE
	.comm	_MT753X_NUM_VLANS,4,2           ; @MT753X_NUM_VLANS
	.comm	_STAG_VPID_S,4,2                ; @STAG_VPID_S
	.comm	_VA_TRANSPARENT_PORT,4,2        ; @VA_TRANSPARENT_PORT
	.comm	_VLAN_ATTR_S,4,2                ; @VLAN_ATTR_S
	.comm	_GRP_PORT_VID_M,4,2             ; @GRP_PORT_VID_M
.subsections_via_symbols
