	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function r_asm_lm32_decode
_r_asm_lm32_decode:                     ## @r_asm_lm32_decode
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r14
	pushq	%rbx
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	movq	%rdi, %r14
	movl	12(%rdi), %edi
	callq	_extract_opcode
	movq	%rax, (%r14)
	movq	_RAsmLm32OpcodeNumber@GOTPCREL(%rip), %rcx
	movl	$-1, %ebx
	cmpq	(%rcx), %rax
	jae	LBB0_32
## %bb.1:
	movq	_RAsmLm32OpcodeList@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rcx
	movl	(%rcx,%rax,4), %eax
	movl	%eax, 56(%r14)
	addl	$-128, %eax
	cmpl	$11, %eax
	ja	LBB0_32
## %bb.2:
	leaq	LJTI0_0(%rip), %rcx
	movslq	(%rcx,%rax,4), %rax
	addq	%rcx, %rax
	jmpq	*%rax
LBB0_12:
	movq	%r14, %rdi
	callq	_is_invalid_two_reg_instr
	testl	%eax, %eax
	jne	LBB0_32
## %bb.13:
	movl	12(%r14), %edi
	callq	_extract_reg_w
	movq	%rax, 32(%r14)
	jmp	LBB0_11
LBB0_14:
	movl	12(%r14), %edi
	callq	_extract_reg_w
	movq	%rax, 32(%r14)
	movl	12(%r14), %edi
	callq	_extract_reg_v
	movq	%rax, 40(%r14)
	movl	12(%r14), %edi
	callq	_extract_reg_u
	movq	%rax, 48(%r14)
	jmp	LBB0_24
LBB0_6:
	movq	%r14, %rdi
	callq	_is_invalid_imm5_instr
	testl	%eax, %eax
	jne	LBB0_32
## %bb.7:
	movl	12(%r14), %edi
	callq	_extract_reg_v
	movq	%rax, 32(%r14)
	movl	12(%r14), %edi
	callq	_extract_reg_u
	movq	%rax, 40(%r14)
	jmp	LBB0_9
LBB0_5:
	movl	12(%r14), %edi
	callq	_extract_reg_v
	movq	%rax, 32(%r14)
	movl	12(%r14), %edi
	callq	_extract_reg_u
	movq	%rax, 40(%r14)
	movl	12(%r14), %edi
	callq	_extract_imm16
	jmp	LBB0_23
LBB0_3:
	movl	12(%r14), %edi
	callq	_extract_reg_v
	movq	%rax, 32(%r14)
	movl	12(%r14), %edi
	callq	_extract_reg_u
	movq	%rax, 40(%r14)
	movq	_RAsmLm32Imm16SignBitPos@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	movl	12(%r14), %edi
	callq	_extract_imm16
	xorl	%edi, %edi
	jmp	LBB0_22
LBB0_4:
	movl	12(%r14), %edi
	callq	_extract_reg_v
	movq	%rax, 32(%r14)
	movl	12(%r14), %edi
	callq	_extract_reg_u
	movq	%rax, 40(%r14)
	movq	_RAsmLm32Imm16SignBitPos@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	movl	12(%r14), %edi
	callq	_extract_imm16
	jmp	LBB0_21
LBB0_15:
	movq	%r14, %rdi
	callq	_is_invalid_wcsr_instr
	testl	%eax, %eax
	jne	LBB0_32
## %bb.16:
	movl	12(%r14), %edi
	callq	_extract_reg_v
	movq	%rax, 40(%r14)
	jmp	LBB0_17
LBB0_8:
	movq	%r14, %rdi
	callq	_is_invalid_imm5_instr
	testl	%eax, %eax
	jne	LBB0_32
LBB0_9:
	movl	12(%r14), %edi
	callq	_extract_imm5
	jmp	LBB0_23
LBB0_10:
	movq	%r14, %rdi
	callq	_is_invalid_one_reg_instr
	testl	%eax, %eax
	jne	LBB0_32
LBB0_11:
	movl	12(%r14), %edi
	callq	_extract_reg_u
	movq	%rax, 40(%r14)
	jmp	LBB0_24
LBB0_20:
	movq	_RAsmLm32Imm26SignBitPos@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	movl	12(%r14), %edi
	callq	_extract_imm26
LBB0_21:
	movl	$2, %edi
LBB0_22:
	movl	%ebx, %esi
	movq	%rax, %rdx
	callq	_shift_and_signextend
LBB0_23:
	movq	%rax, 16(%r14)
LBB0_24:
	movq	%r14, %rdi
	callq	_is_pseudo_instr_ret
	movl	$1, %ebx
	testq	%rax, %rax
	jne	LBB0_31
## %bb.25:
	movq	%r14, %rdi
	callq	_is_pseudo_instr_mv
	testq	%rax, %rax
	jne	LBB0_31
## %bb.26:
	movq	%r14, %rdi
	callq	_is_pseudo_instr_mvhi
	testq	%rax, %rax
	jne	LBB0_31
## %bb.27:
	movq	%r14, %rdi
	callq	_is_pseudo_instr_not
	testq	%rax, %rax
	jne	LBB0_31
## %bb.28:
	movq	%r14, %rdi
	callq	_is_pseudo_instr_mvi
	testq	%rax, %rax
	jne	LBB0_31
## %bb.29:
	movq	%r14, %rdi
	callq	_is_pseudo_instr_nop
	testq	%rax, %rax
	jne	LBB0_31
## %bb.30:
	movq	%r14, %rdi
	callq	_is_pseudo_instr_raise
	xorl	%ebx, %ebx
	testq	%rax, %rax
	setne	%bl
LBB0_31:
	movl	%ebx, 8(%r14)
	xorl	%ebx, %ebx
LBB0_32:
	movl	%ebx, %eax
	popq	%rbx
	popq	%r14
	popq	%rbp
	retq
LBB0_18:
	movq	%r14, %rdi
	callq	_is_invalid_two_reg_instr
	testl	%eax, %eax
	jne	LBB0_32
## %bb.19:
	movl	12(%r14), %edi
	callq	_extract_reg_w
	movq	%rax, 32(%r14)
LBB0_17:
	movl	12(%r14), %edi
	callq	_extract_reg_u
	movq	%rax, 24(%r14)
	jmp	LBB0_24
	.cfi_endproc
	.p2align	2, 0x90
	.data_region jt32
.set L0_0_set_12, LBB0_12-LJTI0_0
.set L0_0_set_14, LBB0_14-LJTI0_0
.set L0_0_set_32, LBB0_32-LJTI0_0
.set L0_0_set_6, LBB0_6-LJTI0_0
.set L0_0_set_5, LBB0_5-LJTI0_0
.set L0_0_set_3, LBB0_3-LJTI0_0
.set L0_0_set_4, LBB0_4-LJTI0_0
.set L0_0_set_15, LBB0_15-LJTI0_0
.set L0_0_set_8, LBB0_8-LJTI0_0
.set L0_0_set_10, LBB0_10-LJTI0_0
.set L0_0_set_20, LBB0_20-LJTI0_0
.set L0_0_set_18, LBB0_18-LJTI0_0
LJTI0_0:
	.long	L0_0_set_12
	.long	L0_0_set_14
	.long	L0_0_set_32
	.long	L0_0_set_6
	.long	L0_0_set_5
	.long	L0_0_set_3
	.long	L0_0_set_4
	.long	L0_0_set_15
	.long	L0_0_set_8
	.long	L0_0_set_10
	.long	L0_0_set_20
	.long	L0_0_set_18
	.end_data_region
                                        ## -- End function
	.comm	_RAsmLm32OpcodeNumber,8,3       ## @RAsmLm32OpcodeNumber
	.comm	_RAsmLm32OpcodeList,8,3         ## @RAsmLm32OpcodeList
	.comm	_RAsmLm32Imm16SignBitPos,4,2    ## @RAsmLm32Imm16SignBitPos
	.comm	_RAsmLm32Imm26SignBitPos,4,2    ## @RAsmLm32Imm26SignBitPos
	.no_dead_strip	_r_asm_lm32_decode
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function r_asm_lm32_decode
_r_asm_lm32_decode:                     ; @r_asm_lm32_decode
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x19, x0
	ldr	w0, [x0, #12]
	bl	_extract_opcode
	str	x0, [x19]
Lloh0:
	adrp	x8, _RAsmLm32OpcodeNumber@GOTPAGE
Lloh1:
	ldr	x8, [x8, _RAsmLm32OpcodeNumber@GOTPAGEOFF]
Lloh2:
	ldr	x8, [x8]
	cmp	x0, x8
	b.hs	LBB0_30
; %bb.1:
Lloh3:
	adrp	x8, _RAsmLm32OpcodeList@GOTPAGE
Lloh4:
	ldr	x8, [x8, _RAsmLm32OpcodeList@GOTPAGEOFF]
Lloh5:
	ldr	x8, [x8]
	ldr	w8, [x8, x0, lsl #2]
	str	w8, [x19, #56]
	mov	w0, #-1
	sub	w8, w8, #128
	cmp	w8, #11
	b.hi	LBB0_31
; %bb.2:
Lloh6:
	adrp	x9, lJTI0_0@PAGE
Lloh7:
	add	x9, x9, lJTI0_0@PAGEOFF
	adr	x10, LBB0_3
	ldrb	w11, [x9, x8]
	add	x10, x10, x11, lsl #2
	br	x10
LBB0_3:
	mov	x0, x19
	bl	_is_invalid_two_reg_instr
	cbnz	w0, LBB0_30
; %bb.4:
	ldr	w0, [x19, #12]
	bl	_extract_reg_w
	str	x0, [x19, #32]
	b	LBB0_16
LBB0_5:
	ldr	w0, [x19, #12]
	bl	_extract_reg_w
	str	x0, [x19, #32]
	ldr	w0, [x19, #12]
	bl	_extract_reg_v
	str	x0, [x19, #40]
	ldr	w0, [x19, #12]
	bl	_extract_reg_u
	str	x0, [x19, #48]
	b	LBB0_21
LBB0_6:
	mov	x0, x19
	bl	_is_invalid_imm5_instr
	cbnz	w0, LBB0_30
; %bb.7:
	ldr	w0, [x19, #12]
	bl	_extract_reg_v
	str	x0, [x19, #32]
	ldr	w0, [x19, #12]
	bl	_extract_reg_u
	str	x0, [x19, #40]
	b	LBB0_14
LBB0_8:
	ldr	w0, [x19, #12]
	bl	_extract_reg_v
	str	x0, [x19, #32]
	ldr	w0, [x19, #12]
	bl	_extract_reg_u
	str	x0, [x19, #40]
	ldr	w0, [x19, #12]
	bl	_extract_imm16
	b	LBB0_20
LBB0_9:
	ldr	w0, [x19, #12]
	bl	_extract_reg_v
	str	x0, [x19, #32]
	ldr	w0, [x19, #12]
	bl	_extract_reg_u
	str	x0, [x19, #40]
Lloh8:
	adrp	x8, _RAsmLm32Imm16SignBitPos@GOTPAGE
Lloh9:
	ldr	x8, [x8, _RAsmLm32Imm16SignBitPos@GOTPAGEOFF]
Lloh10:
	ldr	w20, [x8]
	ldr	w0, [x19, #12]
	bl	_extract_imm16
	mov	x2, x0
	mov	w0, #0
	b	LBB0_19
LBB0_10:
	ldr	w0, [x19, #12]
	bl	_extract_reg_v
	str	x0, [x19, #32]
	ldr	w0, [x19, #12]
	bl	_extract_reg_u
	str	x0, [x19, #40]
Lloh11:
	adrp	x8, _RAsmLm32Imm16SignBitPos@GOTPAGE
Lloh12:
	ldr	x8, [x8, _RAsmLm32Imm16SignBitPos@GOTPAGEOFF]
Lloh13:
	ldr	w20, [x8]
	ldr	w0, [x19, #12]
	bl	_extract_imm16
	b	LBB0_18
LBB0_11:
	mov	x0, x19
	bl	_is_invalid_wcsr_instr
	cbnz	w0, LBB0_30
; %bb.12:
	ldr	w0, [x19, #12]
	bl	_extract_reg_v
	str	x0, [x19, #40]
	b	LBB0_33
LBB0_13:
	mov	x0, x19
	bl	_is_invalid_imm5_instr
	cbnz	w0, LBB0_30
LBB0_14:
	ldr	w0, [x19, #12]
	bl	_extract_imm5
	b	LBB0_20
LBB0_15:
	mov	x0, x19
	bl	_is_invalid_one_reg_instr
	cbnz	w0, LBB0_30
LBB0_16:
	ldr	w0, [x19, #12]
	bl	_extract_reg_u
	str	x0, [x19, #40]
	b	LBB0_21
LBB0_17:
Lloh14:
	adrp	x8, _RAsmLm32Imm26SignBitPos@GOTPAGE
Lloh15:
	ldr	x8, [x8, _RAsmLm32Imm26SignBitPos@GOTPAGEOFF]
Lloh16:
	ldr	w20, [x8]
	ldr	w0, [x19, #12]
	bl	_extract_imm26
LBB0_18:
	mov	x2, x0
	mov	w0, #2
LBB0_19:
	mov	x1, x20
	bl	_shift_and_signextend
LBB0_20:
	str	x0, [x19, #16]
LBB0_21:
	mov	x0, x19
	bl	_is_pseudo_instr_ret
	cbnz	x0, LBB0_27
; %bb.22:
	mov	x0, x19
	bl	_is_pseudo_instr_mv
	cbnz	x0, LBB0_27
; %bb.23:
	mov	x0, x19
	bl	_is_pseudo_instr_mvhi
	cbnz	x0, LBB0_27
; %bb.24:
	mov	x0, x19
	bl	_is_pseudo_instr_not
	cbnz	x0, LBB0_27
; %bb.25:
	mov	x0, x19
	bl	_is_pseudo_instr_mvi
	cbnz	x0, LBB0_27
; %bb.26:
	mov	x0, x19
	bl	_is_pseudo_instr_nop
	cbz	x0, LBB0_34
LBB0_27:
	mov	w8, #1
LBB0_28:
	mov	w0, #0
	str	w8, [x19, #8]
	b	LBB0_31
LBB0_29:
	mov	x0, x19
	bl	_is_invalid_two_reg_instr
	cbz	w0, LBB0_32
LBB0_30:
	mov	w0, #-1
LBB0_31:
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	ret
LBB0_32:
	ldr	w0, [x19, #12]
	bl	_extract_reg_w
	str	x0, [x19, #32]
LBB0_33:
	ldr	w0, [x19, #12]
	bl	_extract_reg_u
	str	x0, [x19, #24]
	b	LBB0_21
LBB0_34:
	mov	x0, x19
	bl	_is_pseudo_instr_raise
	cmp	x0, #0
	cset	w8, ne
	b	LBB0_28
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpAdd	Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh16
	.cfi_endproc
	.section	__TEXT,__const
lJTI0_0:
	.byte	(LBB0_3-LBB0_3)>>2
	.byte	(LBB0_5-LBB0_3)>>2
	.byte	(LBB0_31-LBB0_3)>>2
	.byte	(LBB0_6-LBB0_3)>>2
	.byte	(LBB0_8-LBB0_3)>>2
	.byte	(LBB0_9-LBB0_3)>>2
	.byte	(LBB0_10-LBB0_3)>>2
	.byte	(LBB0_11-LBB0_3)>>2
	.byte	(LBB0_13-LBB0_3)>>2
	.byte	(LBB0_15-LBB0_3)>>2
	.byte	(LBB0_17-LBB0_3)>>2
	.byte	(LBB0_29-LBB0_3)>>2
                                        ; -- End function
	.comm	_RAsmLm32OpcodeNumber,8,3       ; @RAsmLm32OpcodeNumber
	.comm	_RAsmLm32OpcodeList,8,3         ; @RAsmLm32OpcodeList
	.comm	_RAsmLm32Imm16SignBitPos,4,2    ; @RAsmLm32Imm16SignBitPos
	.comm	_RAsmLm32Imm26SignBitPos,4,2    ; @RAsmLm32Imm26SignBitPos
	.no_dead_strip	_r_asm_lm32_decode
.subsections_via_symbols
