	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function init_pdma
_init_pdma:                             ## @init_pdma
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	movq	_PDMA_CFG@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	$1, %edi
	callq	_IFX_REG_W32
	movq	_PDMA_RX_CTX_CFG@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	$535552, %edi                   ## imm = 0x82C00
	callq	_IFX_REG_W32
	movq	_PDMA_TX_CTX_CFG@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	$531200, %edi                   ## imm = 0x81B00
	callq	_IFX_REG_W32
	movq	_PDMA_RX_MAX_LEN_REG@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	$33818116, %edi                 ## imm = 0x2040604
	callq	_IFX_REG_W32
	movq	_PDMA_RX_DELAY_CFG@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	$983103, %edi                   ## imm = 0xF003F
	callq	_IFX_REG_W32
	movq	_SAR_MODE_CFG@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	$17, %edi
	callq	_IFX_REG_W32
	movq	_SAR_RX_CTX_CFG@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	$535040, %edi                   ## imm = 0x82A00
	callq	_IFX_REG_W32
	movq	_SAR_TX_CTX_CFG@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	$536064, %edi                   ## imm = 0x82E00
	callq	_IFX_REG_W32
	movq	_SAR_POLY_CFG_SET0@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	$4129, %edi                     ## imm = 0x1021
	callq	_IFX_REG_W32
	movq	_SAR_POLY_CFG_SET1@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	$517762881, %edi                ## imm = 0x1EDC6F41
	callq	_IFX_REG_W32
	movq	_SAR_POLY_CFG_SET2@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	$79764919, %edi                 ## imm = 0x4C11DB7
	callq	_IFX_REG_W32
	movq	_SAR_CRC_SIZE_CFG@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	$3902, %edi                     ## imm = 0xF3E
	callq	_IFX_REG_W32
	movq	_SAR_PDMA_RX_CMDBUF_CFG@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	$16783616, %edi                 ## imm = 0x1001900
	callq	_IFX_REG_W32
	movq	_SAR_PDMA_TX_CMDBUF_CFG@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	$16783872, %edi                 ## imm = 0x1001A00
	popq	%rbp
	jmp	_IFX_REG_W32                    ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_PDMA_CFG,4,2                   ## @PDMA_CFG
	.comm	_PDMA_RX_CTX_CFG,4,2            ## @PDMA_RX_CTX_CFG
	.comm	_PDMA_TX_CTX_CFG,4,2            ## @PDMA_TX_CTX_CFG
	.comm	_PDMA_RX_MAX_LEN_REG,4,2        ## @PDMA_RX_MAX_LEN_REG
	.comm	_PDMA_RX_DELAY_CFG,4,2          ## @PDMA_RX_DELAY_CFG
	.comm	_SAR_MODE_CFG,4,2               ## @SAR_MODE_CFG
	.comm	_SAR_RX_CTX_CFG,4,2             ## @SAR_RX_CTX_CFG
	.comm	_SAR_TX_CTX_CFG,4,2             ## @SAR_TX_CTX_CFG
	.comm	_SAR_POLY_CFG_SET0,4,2          ## @SAR_POLY_CFG_SET0
	.comm	_SAR_POLY_CFG_SET1,4,2          ## @SAR_POLY_CFG_SET1
	.comm	_SAR_POLY_CFG_SET2,4,2          ## @SAR_POLY_CFG_SET2
	.comm	_SAR_CRC_SIZE_CFG,4,2           ## @SAR_CRC_SIZE_CFG
	.comm	_SAR_PDMA_RX_CMDBUF_CFG,4,2     ## @SAR_PDMA_RX_CMDBUF_CFG
	.comm	_SAR_PDMA_TX_CMDBUF_CFG,4,2     ## @SAR_PDMA_TX_CMDBUF_CFG
	.no_dead_strip	_init_pdma
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function init_pdma
_init_pdma:                             ; @init_pdma
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
Lloh0:
	adrp	x8, _PDMA_CFG@GOTPAGE
Lloh1:
	ldr	x8, [x8, _PDMA_CFG@GOTPAGEOFF]
Lloh2:
	ldr	w1, [x8]
	mov	w0, #1
	bl	_IFX_REG_W32
Lloh3:
	adrp	x8, _PDMA_RX_CTX_CFG@GOTPAGE
Lloh4:
	ldr	x8, [x8, _PDMA_RX_CTX_CFG@GOTPAGEOFF]
Lloh5:
	ldr	w1, [x8]
	mov	w19, #11264
	movk	w19, #8, lsl #16
	mov	w0, #11264
	movk	w0, #8, lsl #16
	bl	_IFX_REG_W32
Lloh6:
	adrp	x8, _PDMA_TX_CTX_CFG@GOTPAGE
Lloh7:
	ldr	x8, [x8, _PDMA_TX_CTX_CFG@GOTPAGEOFF]
Lloh8:
	ldr	w1, [x8]
	mov	w20, #6912
	movk	w20, #8, lsl #16
	mov	w0, #6912
	movk	w0, #8, lsl #16
	bl	_IFX_REG_W32
Lloh9:
	adrp	x8, _PDMA_RX_MAX_LEN_REG@GOTPAGE
Lloh10:
	ldr	x8, [x8, _PDMA_RX_MAX_LEN_REG@GOTPAGEOFF]
Lloh11:
	ldr	w1, [x8]
	mov	w0, #1540
	movk	w0, #516, lsl #16
	bl	_IFX_REG_W32
Lloh12:
	adrp	x8, _PDMA_RX_DELAY_CFG@GOTPAGE
Lloh13:
	ldr	x8, [x8, _PDMA_RX_DELAY_CFG@GOTPAGEOFF]
Lloh14:
	ldr	w1, [x8]
	mov	w0, #63
	movk	w0, #15, lsl #16
	bl	_IFX_REG_W32
Lloh15:
	adrp	x8, _SAR_MODE_CFG@GOTPAGE
Lloh16:
	ldr	x8, [x8, _SAR_MODE_CFG@GOTPAGEOFF]
Lloh17:
	ldr	w1, [x8]
	mov	w0, #17
	bl	_IFX_REG_W32
Lloh18:
	adrp	x8, _SAR_RX_CTX_CFG@GOTPAGE
Lloh19:
	ldr	x8, [x8, _SAR_RX_CTX_CFG@GOTPAGEOFF]
Lloh20:
	ldr	w1, [x8]
	add	w0, w20, #3840
	bl	_IFX_REG_W32
Lloh21:
	adrp	x8, _SAR_TX_CTX_CFG@GOTPAGE
Lloh22:
	ldr	x8, [x8, _SAR_TX_CTX_CFG@GOTPAGEOFF]
Lloh23:
	ldr	w1, [x8]
	orr	w0, w19, #0x200
	bl	_IFX_REG_W32
Lloh24:
	adrp	x8, _SAR_POLY_CFG_SET0@GOTPAGE
Lloh25:
	ldr	x8, [x8, _SAR_POLY_CFG_SET0@GOTPAGEOFF]
Lloh26:
	ldr	w1, [x8]
	mov	w0, #4129
	bl	_IFX_REG_W32
Lloh27:
	adrp	x8, _SAR_POLY_CFG_SET1@GOTPAGE
Lloh28:
	ldr	x8, [x8, _SAR_POLY_CFG_SET1@GOTPAGEOFF]
Lloh29:
	ldr	w1, [x8]
	mov	w0, #28481
	movk	w0, #7900, lsl #16
	bl	_IFX_REG_W32
Lloh30:
	adrp	x8, _SAR_POLY_CFG_SET2@GOTPAGE
Lloh31:
	ldr	x8, [x8, _SAR_POLY_CFG_SET2@GOTPAGEOFF]
Lloh32:
	ldr	w1, [x8]
	mov	w0, #7607
	movk	w0, #1217, lsl #16
	bl	_IFX_REG_W32
Lloh33:
	adrp	x8, _SAR_CRC_SIZE_CFG@GOTPAGE
Lloh34:
	ldr	x8, [x8, _SAR_CRC_SIZE_CFG@GOTPAGEOFF]
Lloh35:
	ldr	w1, [x8]
	mov	w0, #3902
	bl	_IFX_REG_W32
Lloh36:
	adrp	x8, _SAR_PDMA_RX_CMDBUF_CFG@GOTPAGE
Lloh37:
	ldr	x8, [x8, _SAR_PDMA_RX_CMDBUF_CFG@GOTPAGEOFF]
Lloh38:
	ldr	w1, [x8]
	mov	w19, #6400
	movk	w19, #256, lsl #16
	mov	w0, #6400
	movk	w0, #256, lsl #16
	bl	_IFX_REG_W32
Lloh39:
	adrp	x8, _SAR_PDMA_TX_CMDBUF_CFG@GOTPAGE
Lloh40:
	ldr	x8, [x8, _SAR_PDMA_TX_CMDBUF_CFG@GOTPAGEOFF]
Lloh41:
	ldr	w1, [x8]
	add	w0, w19, #256
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	b	_IFX_REG_W32
	.loh AdrpLdrGotLdr	Lloh39, Lloh40, Lloh41
	.loh AdrpLdrGotLdr	Lloh36, Lloh37, Lloh38
	.loh AdrpLdrGotLdr	Lloh33, Lloh34, Lloh35
	.loh AdrpLdrGotLdr	Lloh30, Lloh31, Lloh32
	.loh AdrpLdrGotLdr	Lloh27, Lloh28, Lloh29
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_PDMA_CFG,4,2                   ; @PDMA_CFG
	.comm	_PDMA_RX_CTX_CFG,4,2            ; @PDMA_RX_CTX_CFG
	.comm	_PDMA_TX_CTX_CFG,4,2            ; @PDMA_TX_CTX_CFG
	.comm	_PDMA_RX_MAX_LEN_REG,4,2        ; @PDMA_RX_MAX_LEN_REG
	.comm	_PDMA_RX_DELAY_CFG,4,2          ; @PDMA_RX_DELAY_CFG
	.comm	_SAR_MODE_CFG,4,2               ; @SAR_MODE_CFG
	.comm	_SAR_RX_CTX_CFG,4,2             ; @SAR_RX_CTX_CFG
	.comm	_SAR_TX_CTX_CFG,4,2             ; @SAR_TX_CTX_CFG
	.comm	_SAR_POLY_CFG_SET0,4,2          ; @SAR_POLY_CFG_SET0
	.comm	_SAR_POLY_CFG_SET1,4,2          ; @SAR_POLY_CFG_SET1
	.comm	_SAR_POLY_CFG_SET2,4,2          ; @SAR_POLY_CFG_SET2
	.comm	_SAR_CRC_SIZE_CFG,4,2           ; @SAR_CRC_SIZE_CFG
	.comm	_SAR_PDMA_RX_CMDBUF_CFG,4,2     ; @SAR_PDMA_RX_CMDBUF_CFG
	.comm	_SAR_PDMA_TX_CMDBUF_CFG,4,2     ; @SAR_PDMA_TX_CMDBUF_CFG
	.no_dead_strip	_init_pdma
.subsections_via_symbols
