	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function ath79_set_speed_ge0
_ath79_set_speed_ge0:                   ## @ath79_set_speed_ge0
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -24
	movl	%edi, %ebx
	xorl	%edi, %edi
	movl	%ebx, %esi
	callq	_ath79_get_eth_pll
	movq	_AR71XX_PLL_REG_SEC_CONFIG@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edi
	movq	_AR71XX_PLL_REG_ETH0_INT_CLOCK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	movq	_AR71XX_ETH0_PLL_SHIFT@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	movl	%eax, %edx
	callq	_ath79_set_pll
	movq	_AR71XX_MII_REG_MII0_CTRL@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	%ebx, %esi
	addq	$8, %rsp
	popq	%rbx
	popq	%rbp
	jmp	_ath79_mii_ctrl_set_speed       ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_AR71XX_PLL_REG_SEC_CONFIG,4,2  ## @AR71XX_PLL_REG_SEC_CONFIG
	.comm	_AR71XX_PLL_REG_ETH0_INT_CLOCK,4,2 ## @AR71XX_PLL_REG_ETH0_INT_CLOCK
	.comm	_AR71XX_ETH0_PLL_SHIFT,4,2      ## @AR71XX_ETH0_PLL_SHIFT
	.comm	_AR71XX_MII_REG_MII0_CTRL,4,2   ## @AR71XX_MII_REG_MII0_CTRL
	.no_dead_strip	_ath79_set_speed_ge0
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function ath79_set_speed_ge0
_ath79_set_speed_ge0:                   ; @ath79_set_speed_ge0
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x19, x0
	mov	w0, #0
	mov	x1, x19
	bl	_ath79_get_eth_pll
	mov	x2, x0
Lloh0:
	adrp	x8, _AR71XX_PLL_REG_SEC_CONFIG@GOTPAGE
Lloh1:
	ldr	x8, [x8, _AR71XX_PLL_REG_SEC_CONFIG@GOTPAGEOFF]
Lloh2:
	ldr	w0, [x8]
Lloh3:
	adrp	x8, _AR71XX_PLL_REG_ETH0_INT_CLOCK@GOTPAGE
Lloh4:
	ldr	x8, [x8, _AR71XX_PLL_REG_ETH0_INT_CLOCK@GOTPAGEOFF]
Lloh5:
	ldr	w1, [x8]
Lloh6:
	adrp	x8, _AR71XX_ETH0_PLL_SHIFT@GOTPAGE
Lloh7:
	ldr	x8, [x8, _AR71XX_ETH0_PLL_SHIFT@GOTPAGEOFF]
Lloh8:
	ldr	w3, [x8]
	bl	_ath79_set_pll
Lloh9:
	adrp	x8, _AR71XX_MII_REG_MII0_CTRL@GOTPAGE
Lloh10:
	ldr	x8, [x8, _AR71XX_MII_REG_MII0_CTRL@GOTPAGEOFF]
Lloh11:
	ldr	w0, [x8]
	mov	x1, x19
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	b	_ath79_mii_ctrl_set_speed
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_AR71XX_PLL_REG_SEC_CONFIG,4,2  ; @AR71XX_PLL_REG_SEC_CONFIG
	.comm	_AR71XX_PLL_REG_ETH0_INT_CLOCK,4,2 ; @AR71XX_PLL_REG_ETH0_INT_CLOCK
	.comm	_AR71XX_ETH0_PLL_SHIFT,4,2      ; @AR71XX_ETH0_PLL_SHIFT
	.comm	_AR71XX_MII_REG_MII0_CTRL,4,2   ; @AR71XX_MII_REG_MII0_CTRL
	.no_dead_strip	_ath79_set_speed_ge0
.subsections_via_symbols
