	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function encode_control_status
_encode_control_status:                 ## @encode_control_status
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	movq	_DMA_CTRL_STATUS_PAUSE@GOTPCREL(%rip), %r8
	movq	_DMA_CTRL_STATUS_FAIR_SHARE_ARB@GOTPCREL(%rip), %rcx
	movq	(%rcx), %r9
	movq	_DMA_CTRL_STATUS_SRC_DREQ_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	movq	(%rdi), %rdx
	shlq	%cl, %rdx
	orq	(%r8), %r9
	movq	(%rsi), %rax
	movq	_DMA_CTRL_STATUS_DEST_DREQ_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shlq	%cl, %rax
	movq	8(%rdi), %r10
	orq	%r9, %rdx
	orq	%rdx, %rax
	movq	_DMA_CTRL_STATUS_RESET@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rdx
	notq	%rdx
	andq	%rax, %rdx
	movq	_DMA_CTRL_STATUS_INTR_CLEAR_ENABLE@GOTPCREL(%rip), %rax
	orq	(%rax), %rdx
	movq	_OXNAS_DMA_SIDE_A@GOTPCREL(%rip), %rax
	movq	(%rax), %r11
	movq	16(%rdi), %r9
	movq	_OXNAS_DMA_TRANSFER_MODE_BURST@GOTPCREL(%rip), %rax
	movq	(%rax), %r8
	cmpq	%r11, %r10
	jne	LBB0_3
## %bb.1:
	movq	_DMA_CTRL_STATUS_TRANSFER_MODE_A@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	movq	%rax, %rcx
	orq	%rdx, %rcx
	notq	%rax
	andq	%rdx, %rax
	cmpq	%r8, %r9
	cmoveq	%rcx, %rax
	cmpq	%r10, 8(%rsi)
	jne	LBB0_7
## %bb.2:
	movq	_OXNAS_DMA_A_TO_A@GOTPCREL(%rip), %rcx
	jmp	LBB0_10
LBB0_3:
	movq	_DMA_CTRL_STATUS_TRANSFER_MODE_B@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	movq	%rax, %rcx
	orq	%rdx, %rcx
	notq	%rax
	andq	%rdx, %rax
	cmpq	%r8, %r9
	cmoveq	%rcx, %rax
	cmpq	%r11, 8(%rsi)
	jne	LBB0_9
## %bb.4:
	movq	_OXNAS_DMA_B_TO_A@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rdx
	movq	_DMA_CTRL_STATUS_TRANSFER_MODE_A@GOTPCREL(%rip), %rcx
	jmp	LBB0_5
LBB0_7:
	movq	_OXNAS_DMA_A_TO_B@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rdx
	movq	_DMA_CTRL_STATUS_TRANSFER_MODE_B@GOTPCREL(%rip), %rcx
LBB0_5:
	movq	(%rcx), %rcx
	cmpq	%r8, 16(%rsi)
	jne	LBB0_6
## %bb.8:
	orq	%rcx, %rax
	jmp	LBB0_11
LBB0_9:
	movq	_OXNAS_DMA_B_TO_B@GOTPCREL(%rip), %rcx
LBB0_10:
	movq	(%rcx), %rdx
	jmp	LBB0_11
LBB0_6:
	notq	%rcx
	andq	%rcx, %rax
LBB0_11:
	movq	_DMA_CTRL_STATUS_DIR_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shlq	%cl, %rdx
	orq	%rax, %rdx
	movq	_OXNAS_DMA_MODE_FIXED@GOTPCREL(%rip), %rax
	movq	(%rax), %r8
	movq	_DMA_CTRL_STATUS_SRC_ADR_MODE@GOTPCREL(%rip), %rax
	movq	(%rax), %rcx
	cmpq	%r8, 24(%rdi)
	jne	LBB0_14
## %bb.12:
	notq	%rcx
	andq	%rcx, %rdx
	cmpq	$0, 40(%rdi)
	movq	_DMA_CTRL_STATUS_SOURCE_ADDRESS_FIXED@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	je	LBB0_15
## %bb.13:
	orq	%rdx, %rax
	jmp	LBB0_16
LBB0_14:
	orq	%rdx, %rcx
	movq	_DMA_CTRL_STATUS_SOURCE_ADDRESS_FIXED@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	notq	%rax
	andq	%rcx, %rax
	jmp	LBB0_16
LBB0_15:
	notq	%rax
	andq	%rdx, %rax
LBB0_16:
	movq	_DMA_CTRL_STATUS_DEST_ADR_MODE@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rcx
	cmpq	%r8, 24(%rsi)
	jne	LBB0_19
## %bb.17:
	notq	%rcx
	andq	%rcx, %rax
	cmpq	$0, 40(%rsi)
	movq	_DMA_CTRL_STATUS_DESTINATION_ADDRESS_FIXED@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rdx
	je	LBB0_20
## %bb.18:
	orq	%rax, %rdx
	jmp	LBB0_21
LBB0_19:
	orq	%rax, %rcx
	movq	_DMA_CTRL_STATUS_DESTINATION_ADDRESS_FIXED@GOTPCREL(%rip), %rax
	movq	(%rax), %rdx
	notq	%rdx
	andq	%rcx, %rdx
	jmp	LBB0_21
LBB0_20:
	notq	%rdx
	andq	%rax, %rdx
LBB0_21:
	movq	32(%rdi), %rax
	movq	_DMA_CTRL_STATUS_SRC_WIDTH_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shlq	%cl, %rax
	movq	32(%rsi), %rsi
	movq	_DMA_CTRL_STATUS_DEST_WIDTH_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shlq	%cl, %rsi
	orq	%rdx, %rsi
	orq	%rax, %rsi
	movq	_DMA_CTRL_STATUS_STARVE_LOW_PRIORITY@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	notq	%rax
	andq	%rsi, %rax
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_DMA_CTRL_STATUS_PAUSE,8,3      ## @DMA_CTRL_STATUS_PAUSE
	.comm	_DMA_CTRL_STATUS_FAIR_SHARE_ARB,8,3 ## @DMA_CTRL_STATUS_FAIR_SHARE_ARB
	.comm	_DMA_CTRL_STATUS_SRC_DREQ_SHIFT,8,3 ## @DMA_CTRL_STATUS_SRC_DREQ_SHIFT
	.comm	_DMA_CTRL_STATUS_DEST_DREQ_SHIFT,8,3 ## @DMA_CTRL_STATUS_DEST_DREQ_SHIFT
	.comm	_DMA_CTRL_STATUS_RESET,8,3      ## @DMA_CTRL_STATUS_RESET
	.comm	_DMA_CTRL_STATUS_INTR_CLEAR_ENABLE,8,3 ## @DMA_CTRL_STATUS_INTR_CLEAR_ENABLE
	.comm	_OXNAS_DMA_SIDE_A,8,3           ## @OXNAS_DMA_SIDE_A
	.comm	_OXNAS_DMA_TRANSFER_MODE_BURST,8,3 ## @OXNAS_DMA_TRANSFER_MODE_BURST
	.comm	_DMA_CTRL_STATUS_TRANSFER_MODE_A,8,3 ## @DMA_CTRL_STATUS_TRANSFER_MODE_A
	.comm	_OXNAS_DMA_A_TO_A,8,3           ## @OXNAS_DMA_A_TO_A
	.comm	_OXNAS_DMA_A_TO_B,8,3           ## @OXNAS_DMA_A_TO_B
	.comm	_DMA_CTRL_STATUS_TRANSFER_MODE_B,8,3 ## @DMA_CTRL_STATUS_TRANSFER_MODE_B
	.comm	_OXNAS_DMA_B_TO_A,8,3           ## @OXNAS_DMA_B_TO_A
	.comm	_OXNAS_DMA_B_TO_B,8,3           ## @OXNAS_DMA_B_TO_B
	.comm	_DMA_CTRL_STATUS_DIR_SHIFT,8,3  ## @DMA_CTRL_STATUS_DIR_SHIFT
	.comm	_OXNAS_DMA_MODE_FIXED,8,3       ## @OXNAS_DMA_MODE_FIXED
	.comm	_DMA_CTRL_STATUS_SRC_ADR_MODE,8,3 ## @DMA_CTRL_STATUS_SRC_ADR_MODE
	.comm	_DMA_CTRL_STATUS_SOURCE_ADDRESS_FIXED,8,3 ## @DMA_CTRL_STATUS_SOURCE_ADDRESS_FIXED
	.comm	_DMA_CTRL_STATUS_DEST_ADR_MODE,8,3 ## @DMA_CTRL_STATUS_DEST_ADR_MODE
	.comm	_DMA_CTRL_STATUS_DESTINATION_ADDRESS_FIXED,8,3 ## @DMA_CTRL_STATUS_DESTINATION_ADDRESS_FIXED
	.comm	_DMA_CTRL_STATUS_SRC_WIDTH_SHIFT,8,3 ## @DMA_CTRL_STATUS_SRC_WIDTH_SHIFT
	.comm	_DMA_CTRL_STATUS_DEST_WIDTH_SHIFT,8,3 ## @DMA_CTRL_STATUS_DEST_WIDTH_SHIFT
	.comm	_DMA_CTRL_STATUS_STARVE_LOW_PRIORITY,8,3 ## @DMA_CTRL_STATUS_STARVE_LOW_PRIORITY
	.no_dead_strip	_encode_control_status
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function encode_control_status
_encode_control_status:                 ; @encode_control_status
	.cfi_startproc
; %bb.0:
Lloh0:
	adrp	x8, _DMA_CTRL_STATUS_PAUSE@GOTPAGE
Lloh1:
	ldr	x8, [x8, _DMA_CTRL_STATUS_PAUSE@GOTPAGEOFF]
Lloh2:
	ldr	x8, [x8]
Lloh3:
	adrp	x9, _DMA_CTRL_STATUS_FAIR_SHARE_ARB@GOTPAGE
Lloh4:
	ldr	x9, [x9, _DMA_CTRL_STATUS_FAIR_SHARE_ARB@GOTPAGEOFF]
Lloh5:
	ldr	x9, [x9]
	orr	x8, x9, x8
Lloh6:
	adrp	x9, _DMA_CTRL_STATUS_SRC_DREQ_SHIFT@GOTPAGE
Lloh7:
	ldr	x9, [x9, _DMA_CTRL_STATUS_SRC_DREQ_SHIFT@GOTPAGEOFF]
Lloh8:
	ldr	x9, [x9]
	ldp	x11, x10, [x0]
	lsl	x9, x11, x9
	orr	x8, x8, x9
	ldr	x9, [x1]
Lloh9:
	adrp	x11, _DMA_CTRL_STATUS_DEST_DREQ_SHIFT@GOTPAGE
Lloh10:
	ldr	x11, [x11, _DMA_CTRL_STATUS_DEST_DREQ_SHIFT@GOTPAGEOFF]
Lloh11:
	ldr	x11, [x11]
	lsl	x9, x9, x11
	orr	x8, x8, x9
Lloh12:
	adrp	x9, _DMA_CTRL_STATUS_RESET@GOTPAGE
Lloh13:
	ldr	x9, [x9, _DMA_CTRL_STATUS_RESET@GOTPAGEOFF]
Lloh14:
	ldr	x9, [x9]
	bic	x8, x8, x9
Lloh15:
	adrp	x9, _DMA_CTRL_STATUS_INTR_CLEAR_ENABLE@GOTPAGE
Lloh16:
	ldr	x9, [x9, _DMA_CTRL_STATUS_INTR_CLEAR_ENABLE@GOTPAGEOFF]
Lloh17:
	ldr	x9, [x9]
	orr	x12, x8, x9
Lloh18:
	adrp	x8, _OXNAS_DMA_SIDE_A@GOTPAGE
Lloh19:
	ldr	x8, [x8, _OXNAS_DMA_SIDE_A@GOTPAGEOFF]
Lloh20:
	ldr	x11, [x8]
	ldr	x8, [x0, #16]
Lloh21:
	adrp	x9, _OXNAS_DMA_TRANSFER_MODE_BURST@GOTPAGE
Lloh22:
	ldr	x9, [x9, _OXNAS_DMA_TRANSFER_MODE_BURST@GOTPAGEOFF]
Lloh23:
	ldr	x9, [x9]
	cmp	x10, x11
	b.ne	LBB0_3
; %bb.1:
Lloh24:
	adrp	x11, _DMA_CTRL_STATUS_TRANSFER_MODE_A@GOTPAGE
Lloh25:
	ldr	x11, [x11, _DMA_CTRL_STATUS_TRANSFER_MODE_A@GOTPAGEOFF]
Lloh26:
	ldr	x11, [x11]
	orr	x13, x11, x12
	bic	x11, x12, x11
	cmp	x8, x9
	csel	x8, x13, x11, eq
	ldr	x11, [x1, #8]
	cmp	x11, x10
	b.ne	LBB0_5
; %bb.2:
Lloh27:
	adrp	x9, _OXNAS_DMA_A_TO_A@GOTPAGE
Lloh28:
	ldr	x9, [x9, _OXNAS_DMA_A_TO_A@GOTPAGEOFF]
	b	LBB0_8
LBB0_3:
Lloh29:
	adrp	x10, _DMA_CTRL_STATUS_TRANSFER_MODE_B@GOTPAGE
Lloh30:
	ldr	x10, [x10, _DMA_CTRL_STATUS_TRANSFER_MODE_B@GOTPAGEOFF]
Lloh31:
	ldr	x10, [x10]
	orr	x13, x10, x12
	bic	x10, x12, x10
	cmp	x8, x9
	csel	x8, x13, x10, eq
	ldr	x10, [x1, #8]
	cmp	x10, x11
	b.ne	LBB0_7
; %bb.4:
Lloh32:
	adrp	x10, _OXNAS_DMA_B_TO_A@GOTPAGE
Lloh33:
	ldr	x10, [x10, _OXNAS_DMA_B_TO_A@GOTPAGEOFF]
Lloh34:
	ldr	x10, [x10]
Lloh35:
	adrp	x11, _DMA_CTRL_STATUS_TRANSFER_MODE_A@GOTPAGE
Lloh36:
	ldr	x11, [x11, _DMA_CTRL_STATUS_TRANSFER_MODE_A@GOTPAGEOFF]
	b	LBB0_6
LBB0_5:
Lloh37:
	adrp	x10, _OXNAS_DMA_A_TO_B@GOTPAGE
Lloh38:
	ldr	x10, [x10, _OXNAS_DMA_A_TO_B@GOTPAGEOFF]
Lloh39:
	ldr	x10, [x10]
Lloh40:
	adrp	x11, _DMA_CTRL_STATUS_TRANSFER_MODE_B@GOTPAGE
Lloh41:
	ldr	x11, [x11, _DMA_CTRL_STATUS_TRANSFER_MODE_B@GOTPAGEOFF]
LBB0_6:
	ldr	x12, [x1, #16]
	ldr	x11, [x11]
	bic	x13, x8, x11
	orr	x8, x11, x8
	cmp	x12, x9
	csel	x8, x13, x8, ne
	b	LBB0_9
LBB0_7:
Lloh42:
	adrp	x9, _OXNAS_DMA_B_TO_B@GOTPAGE
Lloh43:
	ldr	x9, [x9, _OXNAS_DMA_B_TO_B@GOTPAGEOFF]
LBB0_8:
	ldr	x10, [x9]
LBB0_9:
Lloh44:
	adrp	x9, _DMA_CTRL_STATUS_DIR_SHIFT@GOTPAGE
Lloh45:
	ldr	x9, [x9, _DMA_CTRL_STATUS_DIR_SHIFT@GOTPAGEOFF]
Lloh46:
	ldr	x9, [x9]
	lsl	x9, x10, x9
	orr	x9, x9, x8
Lloh47:
	adrp	x8, _OXNAS_DMA_MODE_FIXED@GOTPAGE
Lloh48:
	ldr	x8, [x8, _OXNAS_DMA_MODE_FIXED@GOTPAGEOFF]
	ldr	x11, [x0, #24]
Lloh49:
	ldr	x8, [x8]
Lloh50:
	adrp	x10, _DMA_CTRL_STATUS_SRC_ADR_MODE@GOTPAGE
Lloh51:
	ldr	x10, [x10, _DMA_CTRL_STATUS_SRC_ADR_MODE@GOTPAGEOFF]
Lloh52:
	ldr	x10, [x10]
	cmp	x11, x8
	b.ne	LBB0_11
; %bb.10:
	bic	x9, x9, x10
Lloh53:
	adrp	x10, _DMA_CTRL_STATUS_SOURCE_ADDRESS_FIXED@GOTPAGE
Lloh54:
	ldr	x10, [x10, _DMA_CTRL_STATUS_SOURCE_ADDRESS_FIXED@GOTPAGEOFF]
	ldr	x11, [x0, #40]
Lloh55:
	ldr	x10, [x10]
	bic	x12, x9, x10
	orr	x9, x10, x9
	cmp	x11, #0
	csel	x9, x12, x9, eq
	b	LBB0_12
LBB0_11:
	orr	x9, x10, x9
Lloh56:
	adrp	x10, _DMA_CTRL_STATUS_SOURCE_ADDRESS_FIXED@GOTPAGE
Lloh57:
	ldr	x10, [x10, _DMA_CTRL_STATUS_SOURCE_ADDRESS_FIXED@GOTPAGEOFF]
Lloh58:
	ldr	x10, [x10]
	bic	x9, x9, x10
LBB0_12:
	ldr	x11, [x1, #24]
Lloh59:
	adrp	x10, _DMA_CTRL_STATUS_DEST_ADR_MODE@GOTPAGE
Lloh60:
	ldr	x10, [x10, _DMA_CTRL_STATUS_DEST_ADR_MODE@GOTPAGEOFF]
Lloh61:
	ldr	x10, [x10]
	cmp	x11, x8
	b.ne	LBB0_14
; %bb.13:
	bic	x8, x9, x10
Lloh62:
	adrp	x9, _DMA_CTRL_STATUS_DESTINATION_ADDRESS_FIXED@GOTPAGE
Lloh63:
	ldr	x9, [x9, _DMA_CTRL_STATUS_DESTINATION_ADDRESS_FIXED@GOTPAGEOFF]
	ldr	x10, [x1, #40]
Lloh64:
	ldr	x9, [x9]
	bic	x11, x8, x9
	orr	x8, x9, x8
	cmp	x10, #0
	csel	x8, x11, x8, eq
	b	LBB0_15
LBB0_14:
	orr	x8, x10, x9
Lloh65:
	adrp	x9, _DMA_CTRL_STATUS_DESTINATION_ADDRESS_FIXED@GOTPAGE
Lloh66:
	ldr	x9, [x9, _DMA_CTRL_STATUS_DESTINATION_ADDRESS_FIXED@GOTPAGEOFF]
Lloh67:
	ldr	x9, [x9]
	bic	x8, x8, x9
LBB0_15:
	ldr	x9, [x0, #32]
Lloh68:
	adrp	x10, _DMA_CTRL_STATUS_SRC_WIDTH_SHIFT@GOTPAGE
Lloh69:
	ldr	x10, [x10, _DMA_CTRL_STATUS_SRC_WIDTH_SHIFT@GOTPAGEOFF]
Lloh70:
	ldr	x10, [x10]
	lsl	x9, x9, x10
	orr	x8, x9, x8
	ldr	x9, [x1, #32]
Lloh71:
	adrp	x10, _DMA_CTRL_STATUS_DEST_WIDTH_SHIFT@GOTPAGE
Lloh72:
	ldr	x10, [x10, _DMA_CTRL_STATUS_DEST_WIDTH_SHIFT@GOTPAGEOFF]
Lloh73:
	ldr	x10, [x10]
	lsl	x9, x9, x10
	orr	x8, x8, x9
Lloh74:
	adrp	x9, _DMA_CTRL_STATUS_STARVE_LOW_PRIORITY@GOTPAGE
Lloh75:
	ldr	x9, [x9, _DMA_CTRL_STATUS_STARVE_LOW_PRIORITY@GOTPAGEOFF]
Lloh76:
	ldr	x9, [x9]
	bic	x0, x8, x9
	ret
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.loh AdrpLdrGot	Lloh27, Lloh28
	.loh AdrpLdrGotLdr	Lloh29, Lloh30, Lloh31
	.loh AdrpLdrGot	Lloh35, Lloh36
	.loh AdrpLdrGotLdr	Lloh32, Lloh33, Lloh34
	.loh AdrpLdrGot	Lloh40, Lloh41
	.loh AdrpLdrGotLdr	Lloh37, Lloh38, Lloh39
	.loh AdrpLdrGot	Lloh42, Lloh43
	.loh AdrpLdrGotLdr	Lloh50, Lloh51, Lloh52
	.loh AdrpLdrGotLdr	Lloh47, Lloh48, Lloh49
	.loh AdrpLdrGotLdr	Lloh44, Lloh45, Lloh46
	.loh AdrpLdrGotLdr	Lloh53, Lloh54, Lloh55
	.loh AdrpLdrGotLdr	Lloh56, Lloh57, Lloh58
	.loh AdrpLdrGotLdr	Lloh59, Lloh60, Lloh61
	.loh AdrpLdrGotLdr	Lloh62, Lloh63, Lloh64
	.loh AdrpLdrGotLdr	Lloh65, Lloh66, Lloh67
	.loh AdrpLdrGotLdr	Lloh74, Lloh75, Lloh76
	.loh AdrpLdrGotLdr	Lloh71, Lloh72, Lloh73
	.loh AdrpLdrGotLdr	Lloh68, Lloh69, Lloh70
	.cfi_endproc
                                        ; -- End function
	.comm	_DMA_CTRL_STATUS_PAUSE,8,3      ; @DMA_CTRL_STATUS_PAUSE
	.comm	_DMA_CTRL_STATUS_FAIR_SHARE_ARB,8,3 ; @DMA_CTRL_STATUS_FAIR_SHARE_ARB
	.comm	_DMA_CTRL_STATUS_SRC_DREQ_SHIFT,8,3 ; @DMA_CTRL_STATUS_SRC_DREQ_SHIFT
	.comm	_DMA_CTRL_STATUS_DEST_DREQ_SHIFT,8,3 ; @DMA_CTRL_STATUS_DEST_DREQ_SHIFT
	.comm	_DMA_CTRL_STATUS_RESET,8,3      ; @DMA_CTRL_STATUS_RESET
	.comm	_DMA_CTRL_STATUS_INTR_CLEAR_ENABLE,8,3 ; @DMA_CTRL_STATUS_INTR_CLEAR_ENABLE
	.comm	_OXNAS_DMA_SIDE_A,8,3           ; @OXNAS_DMA_SIDE_A
	.comm	_OXNAS_DMA_TRANSFER_MODE_BURST,8,3 ; @OXNAS_DMA_TRANSFER_MODE_BURST
	.comm	_DMA_CTRL_STATUS_TRANSFER_MODE_A,8,3 ; @DMA_CTRL_STATUS_TRANSFER_MODE_A
	.comm	_OXNAS_DMA_A_TO_A,8,3           ; @OXNAS_DMA_A_TO_A
	.comm	_OXNAS_DMA_A_TO_B,8,3           ; @OXNAS_DMA_A_TO_B
	.comm	_DMA_CTRL_STATUS_TRANSFER_MODE_B,8,3 ; @DMA_CTRL_STATUS_TRANSFER_MODE_B
	.comm	_OXNAS_DMA_B_TO_A,8,3           ; @OXNAS_DMA_B_TO_A
	.comm	_OXNAS_DMA_B_TO_B,8,3           ; @OXNAS_DMA_B_TO_B
	.comm	_DMA_CTRL_STATUS_DIR_SHIFT,8,3  ; @DMA_CTRL_STATUS_DIR_SHIFT
	.comm	_OXNAS_DMA_MODE_FIXED,8,3       ; @OXNAS_DMA_MODE_FIXED
	.comm	_DMA_CTRL_STATUS_SRC_ADR_MODE,8,3 ; @DMA_CTRL_STATUS_SRC_ADR_MODE
	.comm	_DMA_CTRL_STATUS_SOURCE_ADDRESS_FIXED,8,3 ; @DMA_CTRL_STATUS_SOURCE_ADDRESS_FIXED
	.comm	_DMA_CTRL_STATUS_DEST_ADR_MODE,8,3 ; @DMA_CTRL_STATUS_DEST_ADR_MODE
	.comm	_DMA_CTRL_STATUS_DESTINATION_ADDRESS_FIXED,8,3 ; @DMA_CTRL_STATUS_DESTINATION_ADDRESS_FIXED
	.comm	_DMA_CTRL_STATUS_SRC_WIDTH_SHIFT,8,3 ; @DMA_CTRL_STATUS_SRC_WIDTH_SHIFT
	.comm	_DMA_CTRL_STATUS_DEST_WIDTH_SHIFT,8,3 ; @DMA_CTRL_STATUS_DEST_WIDTH_SHIFT
	.comm	_DMA_CTRL_STATUS_STARVE_LOW_PRIORITY,8,3 ; @DMA_CTRL_STATUS_STARVE_LOW_PRIORITY
	.no_dead_strip	_encode_control_status
.subsections_via_symbols
