	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_set_ddr_timing                 ## -- Begin function set_ddr_timing
	.p2align	4, 0x90
_set_ddr_timing:                        ## @set_ddr_timing
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%esi, -44(%rbp)                 ## 4-byte Spill
	movl	%edi, %r15d
	movq	_DDR_PHY_TIMING_W_RST@GOTPCREL(%rip), %r14
	movq	_DDR_PHY_TIMING_I_RST@GOTPCREL(%rip), %rbx
	movl	(%rbx), %edi
	orl	(%r14), %edi
	movq	_DDR_PHY_TIMING@GOTPCREL(%rip), %r12
	movl	(%r12), %esi
	callq	_writel
	movl	(%rbx), %edi
	orl	(%r14), %edi
	movq	_DDR_PHY_TIMING_CK@GOTPCREL(%rip), %rax
	orl	(%rax), %edi
	movl	(%r12), %esi
	callq	_writel
	movl	(%rbx), %edi
	orl	(%r14), %edi
	movl	(%r12), %esi
	callq	_writel
	cmpl	$16, %r15d
	jne	LBB0_1
LBB0_5:
	movl	-44(%rbp), %r13d                ## 4-byte Reload
	cmpl	$32, %r13d
	jne	LBB0_6
LBB0_10:
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_1:
	movl	$16, %r13d
	movq	_DDR_PHY_TIMING_W_CE@GOTPCREL(%rip), %r14
	jmp	LBB0_2
	.p2align	4, 0x90
LBB0_4:                                 ##   in Loop: Header=BB0_2 Depth=1
	movb	%cl, %al
	leal	-1(%r13,%rax,2), %r13d
	movl	(%r14), %edi
	orl	%ebx, %edi
	movl	(%r12), %esi
	callq	_writel
	movq	_DDR_PHY_TIMING_CK@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	orl	%ebx, %edi
	orl	(%r14), %edi
	movl	(%r12), %esi
	callq	_writel
	orl	(%r14), %ebx
	movl	(%r12), %esi
	movl	%ebx, %edi
	callq	_writel
	cmpl	%r15d, %r13d
	je	LBB0_5
LBB0_2:                                 ## =>This Inner Loop Header: Depth=1
	xorl	%ebx, %ebx
	xorl	%eax, %eax
	cmpl	%r15d, %r13d
	setb	%cl
	jae	LBB0_4
## %bb.3:                               ##   in Loop: Header=BB0_2 Depth=1
	movq	_DDR_PHY_TIMING_INC@GOTPCREL(%rip), %rdx
	movl	(%rdx), %ebx
	jmp	LBB0_4
LBB0_6:
	movl	$32, %r15d
	movq	_DDR_PHY_TIMING_I_CE@GOTPCREL(%rip), %r14
	jmp	LBB0_7
	.p2align	4, 0x90
LBB0_9:                                 ##   in Loop: Header=BB0_7 Depth=1
	movb	%cl, %al
	leal	(%r15,%rax,2), %r15d
	decl	%r15d
	movl	(%r14), %edi
	orl	%ebx, %edi
	movl	(%r12), %esi
	callq	_writel
	movq	_DDR_PHY_TIMING_CK@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	orl	%ebx, %edi
	orl	(%r14), %edi
	movl	(%r12), %esi
	callq	_writel
	orl	(%r14), %ebx
	movl	(%r12), %esi
	movl	%ebx, %edi
	callq	_writel
	cmpl	%r13d, %r15d
	je	LBB0_10
LBB0_7:                                 ## =>This Inner Loop Header: Depth=1
	xorl	%ebx, %ebx
	xorl	%eax, %eax
	cmpl	%r13d, %r15d
	setb	%cl
	jae	LBB0_9
## %bb.8:                               ##   in Loop: Header=BB0_7 Depth=1
	movq	_DDR_PHY_TIMING_INC@GOTPCREL(%rip), %rdx
	movl	(%rdx), %ebx
	jmp	LBB0_9
	.cfi_endproc
                                        ## -- End function
	.comm	_DDR_PHY_TIMING_W_RST,4,2       ## @DDR_PHY_TIMING_W_RST
	.comm	_DDR_PHY_TIMING_I_RST,4,2       ## @DDR_PHY_TIMING_I_RST
	.comm	_DDR_PHY_TIMING,4,2             ## @DDR_PHY_TIMING
	.comm	_DDR_PHY_TIMING_CK,4,2          ## @DDR_PHY_TIMING_CK
	.comm	_DDR_PHY_TIMING_INC,4,2         ## @DDR_PHY_TIMING_INC
	.comm	_DDR_PHY_TIMING_W_CE,4,2        ## @DDR_PHY_TIMING_W_CE
	.comm	_DDR_PHY_TIMING_I_CE,4,2        ## @DDR_PHY_TIMING_I_CE
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_set_ddr_timing                 ; -- Begin function set_ddr_timing
	.p2align	2
_set_ddr_timing:                        ; @set_ddr_timing
	.cfi_startproc
; %bb.0:
	stp	x26, x25, [sp, #-80]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	mov	x19, x1
	mov	x20, x0
Lloh0:
	adrp	x23, _DDR_PHY_TIMING_W_RST@GOTPAGE
Lloh1:
	ldr	x23, [x23, _DDR_PHY_TIMING_W_RST@GOTPAGEOFF]
Lloh2:
	adrp	x24, _DDR_PHY_TIMING_I_RST@GOTPAGE
Lloh3:
	ldr	x24, [x24, _DDR_PHY_TIMING_I_RST@GOTPAGEOFF]
	ldr	w8, [x23]
	ldr	w9, [x24]
	orr	w0, w9, w8
Lloh4:
	adrp	x21, _DDR_PHY_TIMING@GOTPAGE
Lloh5:
	ldr	x21, [x21, _DDR_PHY_TIMING@GOTPAGEOFF]
	ldr	w1, [x21]
	bl	_writel
	ldr	w8, [x23]
	ldr	w9, [x24]
	orr	w8, w9, w8
Lloh6:
	adrp	x22, _DDR_PHY_TIMING_CK@GOTPAGE
Lloh7:
	ldr	x22, [x22, _DDR_PHY_TIMING_CK@GOTPAGEOFF]
	ldr	w9, [x22]
	orr	w0, w8, w9
	ldr	w1, [x21]
	bl	_writel
	ldr	w8, [x23]
	ldr	w9, [x24]
	orr	w0, w9, w8
	ldr	w1, [x21]
	bl	_writel
Lloh8:
	adrp	x23, _DDR_PHY_TIMING_INC@GOTPAGE
Lloh9:
	ldr	x23, [x23, _DDR_PHY_TIMING_INC@GOTPAGEOFF]
	cmp	w20, #16
	b.eq	LBB0_3
; %bb.1:
	mov	w24, #16
Lloh10:
	adrp	x25, _DDR_PHY_TIMING_W_CE@GOTPAGE
Lloh11:
	ldr	x25, [x25, _DDR_PHY_TIMING_W_CE@GOTPAGEOFF]
LBB0_2:                                 ; =>This Inner Loop Header: Depth=1
	ldr	w8, [x23]
	sub	w9, w24, #1
	cmp	w24, w20
	csel	w26, w8, wzr, lo
	csinc	w24, w9, w24, hs
	ldr	w8, [x25]
	orr	w0, w8, w26
	ldr	w1, [x21]
	bl	_writel
	ldr	w8, [x22]
	ldr	w9, [x25]
	orr	w8, w8, w26
	orr	w0, w8, w9
	ldr	w1, [x21]
	bl	_writel
	ldr	w8, [x25]
	orr	w0, w8, w26
	ldr	w1, [x21]
	bl	_writel
	cmp	w24, w20
	b.ne	LBB0_2
LBB0_3:
	cmp	w19, #32
	b.eq	LBB0_6
; %bb.4:
	mov	w20, #32
Lloh12:
	adrp	x24, _DDR_PHY_TIMING_I_CE@GOTPAGE
Lloh13:
	ldr	x24, [x24, _DDR_PHY_TIMING_I_CE@GOTPAGEOFF]
LBB0_5:                                 ; =>This Inner Loop Header: Depth=1
	ldr	w8, [x23]
	sub	w9, w20, #1
	cmp	w20, w19
	csel	w25, w8, wzr, lo
	csinc	w20, w9, w20, hs
	ldr	w8, [x24]
	orr	w0, w8, w25
	ldr	w1, [x21]
	bl	_writel
	ldr	w8, [x22]
	ldr	w9, [x24]
	orr	w8, w8, w25
	orr	w0, w8, w9
	ldr	w1, [x21]
	bl	_writel
	ldr	w8, [x24]
	orr	w0, w8, w25
	ldr	w1, [x21]
	bl	_writel
	cmp	w20, w19
	b.ne	LBB0_5
LBB0_6:
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp], #80             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGot	Lloh8, Lloh9
	.loh AdrpLdrGot	Lloh6, Lloh7
	.loh AdrpLdrGot	Lloh4, Lloh5
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGot	Lloh10, Lloh11
	.loh AdrpLdrGot	Lloh12, Lloh13
	.cfi_endproc
                                        ; -- End function
	.comm	_DDR_PHY_TIMING_W_RST,4,2       ; @DDR_PHY_TIMING_W_RST
	.comm	_DDR_PHY_TIMING_I_RST,4,2       ; @DDR_PHY_TIMING_I_RST
	.comm	_DDR_PHY_TIMING,4,2             ; @DDR_PHY_TIMING
	.comm	_DDR_PHY_TIMING_CK,4,2          ; @DDR_PHY_TIMING_CK
	.comm	_DDR_PHY_TIMING_INC,4,2         ; @DDR_PHY_TIMING_INC
	.comm	_DDR_PHY_TIMING_W_CE,4,2        ; @DDR_PHY_TIMING_W_CE
	.comm	_DDR_PHY_TIMING_I_CE,4,2        ; @DDR_PHY_TIMING_I_CE
.subsections_via_symbols
