	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function ar7240sw_reset
_ar7240sw_reset:                        ## @ar7240sw_reset
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r12
	movq	(%rdi), %r15
	movq	_AR7240_NUM_PORTS@GOTPCREL(%rip), %r14
	cmpl	$0, (%r14)
	jle	LBB0_3
## %bb.1:
	xorl	%ebx, %ebx
	.p2align	4, 0x90
LBB0_2:                                 ## =>This Inner Loop Header: Depth=1
	movq	%r12, %rdi
	movl	%ebx, %esi
	callq	_ar7240sw_disable_port
	incl	%ebx
	cmpl	(%r14), %ebx
	jl	LBB0_2
LBB0_3:
	movq	%r12, -48(%rbp)                 ## 8-byte Spill
	movl	$2000, %edi                     ## imm = 0x7D0
	movl	$3000, %esi                     ## imm = 0xBB8
	callq	_usleep_range
	movq	_AR7240_REG_MASK_CTRL@GOTPCREL(%rip), %r14
	movl	(%r14), %esi
	movq	_AR7240_MASK_CTRL_SOFT_RESET@GOTPCREL(%rip), %rbx
	movl	(%rbx), %edx
	movq	%r15, %rdi
	callq	_ar7240sw_reg_write
	movl	(%r14), %esi
	movl	(%rbx), %edx
	xorl	%ebx, %ebx
	movq	%r15, %rdi
	xorl	%ecx, %ecx
	movl	$1000, %r8d                     ## imm = 0x3E8
	callq	_ar7240sw_reg_wait
	movq	_AR7240_NUM_PHYS@GOTPCREL(%rip), %r13
	cmpl	$0, (%r13)
	jle	LBB0_6
## %bb.4:
	movq	_BMCR_RESET@GOTPCREL(%rip), %r12
	movq	_BMCR_ANENABLE@GOTPCREL(%rip), %r14
	.p2align	4, 0x90
LBB0_5:                                 ## =>This Inner Loop Header: Depth=1
	movq	_MII_ADVERTISE@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	movq	_ADVERTISE_PAUSE_CAP@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	movq	_ADVERTISE_ALL@GOTPCREL(%rip), %rsi
	orl	(%rsi), %ecx
	movq	_ADVERTISE_PAUSE_ASYM@GOTPCREL(%rip), %rsi
	orl	(%rsi), %ecx
	movq	%r15, %rdi
	movl	%ebx, %esi
	callq	_ar7240sw_phy_write
	movq	_MII_BMCR@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movl	(%r14), %ecx
	orl	(%r12), %ecx
	movq	%r15, %rdi
	movl	%ebx, %esi
	callq	_ar7240sw_phy_write
	incl	%ebx
	cmpl	(%r13), %ebx
	jl	LBB0_5
LBB0_6:
	movq	%r15, %rdi
	callq	_ar7240sw_phy_poll_reset
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	LBB0_8
## %bb.7:
	movq	-48(%rbp), %rdi                 ## 8-byte Reload
	callq	_ar7240sw_setup
LBB0_8:
	movl	%ebx, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_AR7240_NUM_PORTS,4,2           ## @AR7240_NUM_PORTS
	.comm	_AR7240_REG_MASK_CTRL,4,2       ## @AR7240_REG_MASK_CTRL
	.comm	_AR7240_MASK_CTRL_SOFT_RESET,4,2 ## @AR7240_MASK_CTRL_SOFT_RESET
	.comm	_AR7240_NUM_PHYS,4,2            ## @AR7240_NUM_PHYS
	.comm	_MII_ADVERTISE,4,2              ## @MII_ADVERTISE
	.comm	_ADVERTISE_ALL,4,2              ## @ADVERTISE_ALL
	.comm	_ADVERTISE_PAUSE_CAP,4,2        ## @ADVERTISE_PAUSE_CAP
	.comm	_ADVERTISE_PAUSE_ASYM,4,2       ## @ADVERTISE_PAUSE_ASYM
	.comm	_MII_BMCR,4,2                   ## @MII_BMCR
	.comm	_BMCR_RESET,4,2                 ## @BMCR_RESET
	.comm	_BMCR_ANENABLE,4,2              ## @BMCR_ANENABLE
	.no_dead_strip	_ar7240sw_reset
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function ar7240sw_reset
_ar7240sw_reset:                        ; @ar7240sw_reset
	.cfi_startproc
; %bb.0:
	stp	x28, x27, [sp, #-96]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 96
	stp	x26, x25, [sp, #16]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #32]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #48]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #64]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #80]             ; 16-byte Folded Spill
	add	x29, sp, #80
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	mov	x19, x0
	ldr	x20, [x0]
Lloh0:
	adrp	x22, _AR7240_NUM_PORTS@GOTPAGE
Lloh1:
	ldr	x22, [x22, _AR7240_NUM_PORTS@GOTPAGEOFF]
	ldr	w8, [x22]
	cmp	w8, #1
	b.lt	LBB0_3
; %bb.1:
	mov	w21, #0
LBB0_2:                                 ; =>This Inner Loop Header: Depth=1
	mov	x0, x19
	mov	x1, x21
	bl	_ar7240sw_disable_port
	add	w21, w21, #1
	ldr	w8, [x22]
	cmp	w21, w8
	b.lt	LBB0_2
LBB0_3:
	mov	w0, #2000
	mov	w1, #3000
	bl	_usleep_range
Lloh2:
	adrp	x21, _AR7240_REG_MASK_CTRL@GOTPAGE
Lloh3:
	ldr	x21, [x21, _AR7240_REG_MASK_CTRL@GOTPAGEOFF]
	ldr	w1, [x21]
Lloh4:
	adrp	x22, _AR7240_MASK_CTRL_SOFT_RESET@GOTPAGE
Lloh5:
	ldr	x22, [x22, _AR7240_MASK_CTRL_SOFT_RESET@GOTPAGEOFF]
	ldr	w2, [x22]
	mov	x0, x20
	bl	_ar7240sw_reg_write
	ldr	w1, [x21]
	ldr	w2, [x22]
	mov	x0, x20
	mov	w3, #0
	mov	w4, #1000
	bl	_ar7240sw_reg_wait
Lloh6:
	adrp	x23, _AR7240_NUM_PHYS@GOTPAGE
Lloh7:
	ldr	x23, [x23, _AR7240_NUM_PHYS@GOTPAGEOFF]
	ldr	w8, [x23]
	cmp	w8, #1
	b.lt	LBB0_6
; %bb.4:
	mov	w21, #0
Lloh8:
	adrp	x24, _ADVERTISE_ALL@GOTPAGE
Lloh9:
	ldr	x24, [x24, _ADVERTISE_ALL@GOTPAGEOFF]
Lloh10:
	adrp	x25, _ADVERTISE_PAUSE_CAP@GOTPAGE
Lloh11:
	ldr	x25, [x25, _ADVERTISE_PAUSE_CAP@GOTPAGEOFF]
Lloh12:
	adrp	x26, _ADVERTISE_PAUSE_ASYM@GOTPAGE
Lloh13:
	ldr	x26, [x26, _ADVERTISE_PAUSE_ASYM@GOTPAGEOFF]
Lloh14:
	adrp	x27, _MII_BMCR@GOTPAGE
Lloh15:
	ldr	x27, [x27, _MII_BMCR@GOTPAGEOFF]
Lloh16:
	adrp	x28, _BMCR_RESET@GOTPAGE
Lloh17:
	ldr	x28, [x28, _BMCR_RESET@GOTPAGEOFF]
Lloh18:
	adrp	x22, _BMCR_ANENABLE@GOTPAGE
Lloh19:
	ldr	x22, [x22, _BMCR_ANENABLE@GOTPAGEOFF]
LBB0_5:                                 ; =>This Inner Loop Header: Depth=1
Lloh20:
	adrp	x8, _MII_ADVERTISE@GOTPAGE
Lloh21:
	ldr	x8, [x8, _MII_ADVERTISE@GOTPAGEOFF]
Lloh22:
	ldr	w2, [x8]
	ldr	w8, [x24]
	ldr	w9, [x25]
	orr	w8, w9, w8
	ldr	w9, [x26]
	orr	w3, w8, w9
	mov	x0, x20
	mov	x1, x21
	bl	_ar7240sw_phy_write
	ldr	w2, [x27]
	ldr	w8, [x28]
	ldr	w9, [x22]
	orr	w3, w9, w8
	mov	x0, x20
	mov	x1, x21
	bl	_ar7240sw_phy_write
	add	w21, w21, #1
	ldr	w8, [x23]
	cmp	w21, w8
	b.lt	LBB0_5
LBB0_6:
	mov	x0, x20
	bl	_ar7240sw_phy_poll_reset
	mov	x20, x0
	cbnz	w0, LBB0_8
; %bb.7:
	mov	x0, x19
	bl	_ar7240sw_setup
LBB0_8:
	mov	x0, x20
	ldp	x29, x30, [sp, #80]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #64]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #48]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #32]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #16]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp], #96             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGot	Lloh6, Lloh7
	.loh AdrpLdrGot	Lloh4, Lloh5
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpLdrGot	Lloh18, Lloh19
	.loh AdrpLdrGot	Lloh16, Lloh17
	.loh AdrpLdrGot	Lloh14, Lloh15
	.loh AdrpLdrGot	Lloh12, Lloh13
	.loh AdrpLdrGot	Lloh10, Lloh11
	.loh AdrpLdrGot	Lloh8, Lloh9
	.loh AdrpLdrGotLdr	Lloh20, Lloh21, Lloh22
	.cfi_endproc
                                        ; -- End function
	.comm	_AR7240_NUM_PORTS,4,2           ; @AR7240_NUM_PORTS
	.comm	_AR7240_REG_MASK_CTRL,4,2       ; @AR7240_REG_MASK_CTRL
	.comm	_AR7240_MASK_CTRL_SOFT_RESET,4,2 ; @AR7240_MASK_CTRL_SOFT_RESET
	.comm	_AR7240_NUM_PHYS,4,2            ; @AR7240_NUM_PHYS
	.comm	_MII_ADVERTISE,4,2              ; @MII_ADVERTISE
	.comm	_ADVERTISE_ALL,4,2              ; @ADVERTISE_ALL
	.comm	_ADVERTISE_PAUSE_CAP,4,2        ; @ADVERTISE_PAUSE_CAP
	.comm	_ADVERTISE_PAUSE_ASYM,4,2       ; @ADVERTISE_PAUSE_ASYM
	.comm	_MII_BMCR,4,2                   ; @MII_BMCR
	.comm	_BMCR_RESET,4,2                 ; @BMCR_RESET
	.comm	_BMCR_ANENABLE,4,2              ; @BMCR_ANENABLE
	.no_dead_strip	_ar7240sw_reset
.subsections_via_symbols
