	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function ag71xx_dump_regs
_ag71xx_dump_regs:                      ## @ag71xx_dump_regs
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$24, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %rbx
	movq	(%rdi), %rax
	movl	(%rax), %eax
	movl	%eax, -44(%rbp)                 ## 4-byte Spill
	movq	_AG71XX_REG_MAC_CFG1@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_ag71xx_rr
	movl	%eax, %r15d
	movq	_AG71XX_REG_MAC_CFG2@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_ag71xx_rr
	movl	%eax, %r12d
	movq	_AG71XX_REG_MAC_IPG@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_ag71xx_rr
	movl	%eax, %r13d
	movq	_AG71XX_REG_MAC_HDX@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_ag71xx_rr
	movl	%eax, %r14d
	movq	_AG71XX_REG_MAC_MFL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_ag71xx_rr
	movl	%eax, (%rsp)
	leaq	L_.str(%rip), %rdi
	movl	-44(%rbp), %esi                 ## 4-byte Reload
	movl	%r15d, %edx
	movl	%r12d, %ecx
	movl	%r13d, %r8d
	movl	%r14d, %r9d
	xorl	%eax, %eax
	callq	_DBG
	movq	(%rbx), %rax
	movl	(%rax), %r14d
	movq	_AG71XX_REG_MAC_IFCTL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_ag71xx_rr
	movl	%eax, %r15d
	movq	_AG71XX_REG_MAC_ADDR1@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_ag71xx_rr
	movl	%eax, %r12d
	movq	_AG71XX_REG_MAC_ADDR2@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_ag71xx_rr
	leaq	L_.str.1(%rip), %rdi
	movl	%r14d, %esi
	movl	%r15d, %edx
	movl	%r12d, %ecx
	movl	%eax, %r8d
	xorl	%eax, %eax
	callq	_DBG
	movq	(%rbx), %rax
	movl	(%rax), %r14d
	movq	_AG71XX_REG_FIFO_CFG0@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_ag71xx_rr
	movl	%eax, %r15d
	movq	_AG71XX_REG_FIFO_CFG1@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_ag71xx_rr
	movl	%eax, %r12d
	movq	_AG71XX_REG_FIFO_CFG2@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_ag71xx_rr
	leaq	L_.str.2(%rip), %rdi
	movl	%r14d, %esi
	movl	%r15d, %edx
	movl	%r12d, %ecx
	movl	%eax, %r8d
	xorl	%eax, %eax
	callq	_DBG
	movq	(%rbx), %rax
	movl	(%rax), %r14d
	movq	_AG71XX_REG_FIFO_CFG3@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_ag71xx_rr
	movl	%eax, %r15d
	movq	_AG71XX_REG_FIFO_CFG4@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_ag71xx_rr
	movl	%eax, %r12d
	movq	_AG71XX_REG_FIFO_CFG5@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_ag71xx_rr
	leaq	L_.str.3(%rip), %rdi
	movl	%r14d, %esi
	movl	%r15d, %edx
	movl	%r12d, %ecx
	movl	%eax, %r8d
	xorl	%eax, %eax
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_DBG                            ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"%s: mac_cfg1=%08x, mac_cfg2=%08x, ipg=%08x, hdx=%08x, mfl=%08x\n"

	.comm	_AG71XX_REG_MAC_CFG1,4,2        ## @AG71XX_REG_MAC_CFG1
	.comm	_AG71XX_REG_MAC_CFG2,4,2        ## @AG71XX_REG_MAC_CFG2
	.comm	_AG71XX_REG_MAC_IPG,4,2         ## @AG71XX_REG_MAC_IPG
	.comm	_AG71XX_REG_MAC_HDX,4,2         ## @AG71XX_REG_MAC_HDX
	.comm	_AG71XX_REG_MAC_MFL,4,2         ## @AG71XX_REG_MAC_MFL
L_.str.1:                               ## @.str.1
	.asciz	"%s: mac_ifctl=%08x, mac_addr1=%08x, mac_addr2=%08x\n"

	.comm	_AG71XX_REG_MAC_IFCTL,4,2       ## @AG71XX_REG_MAC_IFCTL
	.comm	_AG71XX_REG_MAC_ADDR1,4,2       ## @AG71XX_REG_MAC_ADDR1
	.comm	_AG71XX_REG_MAC_ADDR2,4,2       ## @AG71XX_REG_MAC_ADDR2
L_.str.2:                               ## @.str.2
	.asciz	"%s: fifo_cfg0=%08x, fifo_cfg1=%08x, fifo_cfg2=%08x\n"

	.comm	_AG71XX_REG_FIFO_CFG0,4,2       ## @AG71XX_REG_FIFO_CFG0
	.comm	_AG71XX_REG_FIFO_CFG1,4,2       ## @AG71XX_REG_FIFO_CFG1
	.comm	_AG71XX_REG_FIFO_CFG2,4,2       ## @AG71XX_REG_FIFO_CFG2
L_.str.3:                               ## @.str.3
	.asciz	"%s: fifo_cfg3=%08x, fifo_cfg4=%08x, fifo_cfg5=%08x\n"

	.comm	_AG71XX_REG_FIFO_CFG3,4,2       ## @AG71XX_REG_FIFO_CFG3
	.comm	_AG71XX_REG_FIFO_CFG4,4,2       ## @AG71XX_REG_FIFO_CFG4
	.comm	_AG71XX_REG_FIFO_CFG5,4,2       ## @AG71XX_REG_FIFO_CFG5
	.no_dead_strip	_ag71xx_dump_regs
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function ag71xx_dump_regs
_ag71xx_dump_regs:                      ; @ag71xx_dump_regs
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #80
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x19, x0
	ldr	x8, [x0]
	ldr	w20, [x8]
Lloh0:
	adrp	x8, _AG71XX_REG_MAC_CFG1@GOTPAGE
Lloh1:
	ldr	x8, [x8, _AG71XX_REG_MAC_CFG1@GOTPAGEOFF]
Lloh2:
	ldr	w1, [x8]
	bl	_ag71xx_rr
	mov	x21, x0
Lloh3:
	adrp	x8, _AG71XX_REG_MAC_CFG2@GOTPAGE
Lloh4:
	ldr	x8, [x8, _AG71XX_REG_MAC_CFG2@GOTPAGEOFF]
Lloh5:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_ag71xx_rr
	mov	x22, x0
Lloh6:
	adrp	x8, _AG71XX_REG_MAC_IPG@GOTPAGE
Lloh7:
	ldr	x8, [x8, _AG71XX_REG_MAC_IPG@GOTPAGEOFF]
Lloh8:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_ag71xx_rr
	mov	x23, x0
Lloh9:
	adrp	x8, _AG71XX_REG_MAC_HDX@GOTPAGE
Lloh10:
	ldr	x8, [x8, _AG71XX_REG_MAC_HDX@GOTPAGEOFF]
Lloh11:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_ag71xx_rr
	mov	x24, x0
Lloh12:
	adrp	x8, _AG71XX_REG_MAC_MFL@GOTPAGE
Lloh13:
	ldr	x8, [x8, _AG71XX_REG_MAC_MFL@GOTPAGEOFF]
Lloh14:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_ag71xx_rr
                                        ; kill: def $w0 killed $w0 def $x0
Lloh15:
	adrp	x8, l_.str@PAGE
Lloh16:
	add	x8, x8, l_.str@PAGEOFF
	stp	x24, x0, [sp]
	mov	x0, x8
	mov	x1, x20
	mov	x2, x21
	mov	x3, x22
	mov	x4, x23
	bl	_DBG
	ldr	x8, [x19]
	ldr	w20, [x8]
Lloh17:
	adrp	x8, _AG71XX_REG_MAC_IFCTL@GOTPAGE
Lloh18:
	ldr	x8, [x8, _AG71XX_REG_MAC_IFCTL@GOTPAGEOFF]
Lloh19:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_ag71xx_rr
	mov	x21, x0
Lloh20:
	adrp	x8, _AG71XX_REG_MAC_ADDR1@GOTPAGE
Lloh21:
	ldr	x8, [x8, _AG71XX_REG_MAC_ADDR1@GOTPAGEOFF]
Lloh22:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_ag71xx_rr
	mov	x22, x0
Lloh23:
	adrp	x8, _AG71XX_REG_MAC_ADDR2@GOTPAGE
Lloh24:
	ldr	x8, [x8, _AG71XX_REG_MAC_ADDR2@GOTPAGEOFF]
Lloh25:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_ag71xx_rr
	mov	x4, x0
Lloh26:
	adrp	x0, l_.str.1@PAGE
Lloh27:
	add	x0, x0, l_.str.1@PAGEOFF
	mov	x1, x20
	mov	x2, x21
	mov	x3, x22
	bl	_DBG
	ldr	x8, [x19]
	ldr	w20, [x8]
Lloh28:
	adrp	x8, _AG71XX_REG_FIFO_CFG0@GOTPAGE
Lloh29:
	ldr	x8, [x8, _AG71XX_REG_FIFO_CFG0@GOTPAGEOFF]
Lloh30:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_ag71xx_rr
	mov	x21, x0
Lloh31:
	adrp	x8, _AG71XX_REG_FIFO_CFG1@GOTPAGE
Lloh32:
	ldr	x8, [x8, _AG71XX_REG_FIFO_CFG1@GOTPAGEOFF]
Lloh33:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_ag71xx_rr
	mov	x22, x0
Lloh34:
	adrp	x8, _AG71XX_REG_FIFO_CFG2@GOTPAGE
Lloh35:
	ldr	x8, [x8, _AG71XX_REG_FIFO_CFG2@GOTPAGEOFF]
Lloh36:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_ag71xx_rr
	mov	x4, x0
Lloh37:
	adrp	x0, l_.str.2@PAGE
Lloh38:
	add	x0, x0, l_.str.2@PAGEOFF
	mov	x1, x20
	mov	x2, x21
	mov	x3, x22
	bl	_DBG
	ldr	x8, [x19]
	ldr	w20, [x8]
Lloh39:
	adrp	x8, _AG71XX_REG_FIFO_CFG3@GOTPAGE
Lloh40:
	ldr	x8, [x8, _AG71XX_REG_FIFO_CFG3@GOTPAGEOFF]
Lloh41:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_ag71xx_rr
	mov	x21, x0
Lloh42:
	adrp	x8, _AG71XX_REG_FIFO_CFG4@GOTPAGE
Lloh43:
	ldr	x8, [x8, _AG71XX_REG_FIFO_CFG4@GOTPAGEOFF]
Lloh44:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_ag71xx_rr
	mov	x22, x0
Lloh45:
	adrp	x8, _AG71XX_REG_FIFO_CFG5@GOTPAGE
Lloh46:
	ldr	x8, [x8, _AG71XX_REG_FIFO_CFG5@GOTPAGEOFF]
Lloh47:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_ag71xx_rr
Lloh48:
	adrp	x8, l_.str.3@PAGE
Lloh49:
	add	x8, x8, l_.str.3@PAGEOFF
	mov	x4, x0
	mov	x0, x8
	mov	x1, x20
	mov	x2, x21
	mov	x3, x22
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #80
	b	_DBG
	.loh AdrpAdd	Lloh48, Lloh49
	.loh AdrpLdrGotLdr	Lloh45, Lloh46, Lloh47
	.loh AdrpLdrGotLdr	Lloh42, Lloh43, Lloh44
	.loh AdrpLdrGotLdr	Lloh39, Lloh40, Lloh41
	.loh AdrpAdd	Lloh37, Lloh38
	.loh AdrpLdrGotLdr	Lloh34, Lloh35, Lloh36
	.loh AdrpLdrGotLdr	Lloh31, Lloh32, Lloh33
	.loh AdrpLdrGotLdr	Lloh28, Lloh29, Lloh30
	.loh AdrpAdd	Lloh26, Lloh27
	.loh AdrpLdrGotLdr	Lloh23, Lloh24, Lloh25
	.loh AdrpLdrGotLdr	Lloh20, Lloh21, Lloh22
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh19
	.loh AdrpAdd	Lloh15, Lloh16
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"%s: mac_cfg1=%08x, mac_cfg2=%08x, ipg=%08x, hdx=%08x, mfl=%08x\n"

	.comm	_AG71XX_REG_MAC_CFG1,4,2        ; @AG71XX_REG_MAC_CFG1
	.comm	_AG71XX_REG_MAC_CFG2,4,2        ; @AG71XX_REG_MAC_CFG2
	.comm	_AG71XX_REG_MAC_IPG,4,2         ; @AG71XX_REG_MAC_IPG
	.comm	_AG71XX_REG_MAC_HDX,4,2         ; @AG71XX_REG_MAC_HDX
	.comm	_AG71XX_REG_MAC_MFL,4,2         ; @AG71XX_REG_MAC_MFL
l_.str.1:                               ; @.str.1
	.asciz	"%s: mac_ifctl=%08x, mac_addr1=%08x, mac_addr2=%08x\n"

	.comm	_AG71XX_REG_MAC_IFCTL,4,2       ; @AG71XX_REG_MAC_IFCTL
	.comm	_AG71XX_REG_MAC_ADDR1,4,2       ; @AG71XX_REG_MAC_ADDR1
	.comm	_AG71XX_REG_MAC_ADDR2,4,2       ; @AG71XX_REG_MAC_ADDR2
l_.str.2:                               ; @.str.2
	.asciz	"%s: fifo_cfg0=%08x, fifo_cfg1=%08x, fifo_cfg2=%08x\n"

	.comm	_AG71XX_REG_FIFO_CFG0,4,2       ; @AG71XX_REG_FIFO_CFG0
	.comm	_AG71XX_REG_FIFO_CFG1,4,2       ; @AG71XX_REG_FIFO_CFG1
	.comm	_AG71XX_REG_FIFO_CFG2,4,2       ; @AG71XX_REG_FIFO_CFG2
l_.str.3:                               ; @.str.3
	.asciz	"%s: fifo_cfg3=%08x, fifo_cfg4=%08x, fifo_cfg5=%08x\n"

	.comm	_AG71XX_REG_FIFO_CFG3,4,2       ; @AG71XX_REG_FIFO_CFG3
	.comm	_AG71XX_REG_FIFO_CFG4,4,2       ; @AG71XX_REG_FIFO_CFG4
	.comm	_AG71XX_REG_FIFO_CFG5,4,2       ; @AG71XX_REG_FIFO_CFG5
	.no_dead_strip	_ag71xx_dump_regs
.subsections_via_symbols
