	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function vs_2_srcreg
_vs_2_srcreg:                           ## @vs_2_srcreg
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$24, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rsi, %r13
	movq	%rdi, %r15
	movl	(%rsi), %esi
	leal	-132(%rsi), %eax
	cmpl	$11, %eax
	ja	LBB0_7
## %bb.1:
	movq	%rdx, %rbx
	leaq	LJTI0_0(%rip), %rcx
	movslq	(%rcx,%rax,4), %rax
	addq	%rcx, %rax
	jmpq	*%rax
LBB0_2:
	leaq	L_.str(%rip), %rdi
                                        ## kill: def $esi killed $esi killed $rsi
	callq	_FIXME
	movl	(%r13), %esi
LBB0_3:
	movq	%rbx, -56(%rbp)                 ## 8-byte Spill
	movq	%r15, -48(%rbp)                 ## 8-byte Spill
	movl	%esi, %edi
	callq	_d3d9_register
	movl	24(%r13), %esi
	movl	%eax, %edi
LBB0_4:
	callq	_d3dsp_register
LBB0_5:
	movl	%eax, %r12d
	movl	20(%r13), %edi
	callq	_d3d9_swizzle
	movl	%eax, %ebx
	movq	_D3DVS_SWIZZLE_MASK@GOTPCREL(%rip), %rax
	andl	(%rax), %ebx
	movl	16(%r13), %edi
	callq	_d3d9_srcmod
	movl	%eax, %r14d
	movq	_D3DVS_ADDRMODE_RELATIVE@GOTPCREL(%rip), %r15
	movq	_D3DVS_ADDRESSMODE_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	andl	(%r15), %eax
	xorl	%ecx, %ecx
	cmpq	$0, 8(%r13)
	cmovnel	%eax, %ecx
	orl	%r12d, %r14d
	orl	%ebx, %r14d
	orl	%ecx, %r14d
	orl	$-2147483648, %r14d             ## imm = 0x80000000
	movq	-56(%rbp), %rbx                 ## 8-byte Reload
	movq	%rbx, %rdi
	movl	%r14d, %esi
	callq	_put_dword
	testl	%r14d, (%r15)
	je	LBB0_18
## %bb.6:
	movq	8(%r13), %rsi
	movq	-48(%rbp), %rdi                 ## 8-byte Reload
	movq	%rbx, %rdx
	callq	_vs_2_srcreg
	jmp	LBB0_18
LBB0_7:
	leaq	L_.str.4(%rip), %rdi
	jmp	LBB0_17
LBB0_8:
	movl	8(%r15), %r14d
	movl	$2, %edi
	movl	$1, %esi
	callq	_BWRITERVS_VERSION
	cmpl	%eax, %r14d
	jne	LBB0_16
## %bb.9:
	cmpl	$0, 24(%r13)
	jle	LBB0_20
## %bb.10:
	leaq	L_.str.3(%rip), %rdi
	jmp	LBB0_17
LBB0_11:
	movl	20(%r13), %eax
	addl	$-128, %eax
	cmpl	$3, %eax
	movq	%rbx, -56(%rbp)                 ## 8-byte Spill
	ja	LBB0_22
## %bb.12:
	leaq	LJTI0_1(%rip), %rcx
	movslq	(%rcx,%rax,4), %rax
	addq	%rcx, %rax
	jmpq	*%rax
LBB0_13:
	movq	_BWRITERSP_WRITEMASK_2@GOTPCREL(%rip), %rax
	jmp	LBB0_26
LBB0_14:
	cmpl	$0, 24(%r13)
	je	LBB0_19
## %bb.15:
	leaq	L_.str.1(%rip), %rdi
	jmp	LBB0_17
LBB0_16:
	leaq	L_.str.2(%rip), %rdi
LBB0_17:
	callq	_WARN
	movq	_E_INVALIDARG@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	movq	%rax, (%r15)
LBB0_18:
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_19:
	movq	%rbx, -56(%rbp)                 ## 8-byte Spill
	movq	%r15, -48(%rbp)                 ## 8-byte Spill
	movq	_D3DSPR_LOOP@GOTPCREL(%rip), %rax
	jmp	LBB0_21
LBB0_20:
	movq	%rbx, -56(%rbp)                 ## 8-byte Spill
	movq	%r15, -48(%rbp)                 ## 8-byte Spill
	movq	_D3DSPR_PREDICATE@GOTPCREL(%rip), %rax
LBB0_21:
	movl	(%rax), %edi
	xorl	%esi, %esi
	jmp	LBB0_4
LBB0_22:
	xorl	%edx, %edx
	jmp	LBB0_27
LBB0_23:
	movq	_BWRITERSP_WRITEMASK_1@GOTPCREL(%rip), %rax
	jmp	LBB0_26
LBB0_24:
	movq	_BWRITERSP_WRITEMASK_0@GOTPCREL(%rip), %rax
	jmp	LBB0_26
LBB0_25:
	movq	_BWRITERSP_WRITEMASK_3@GOTPCREL(%rip), %rax
LBB0_26:
	movl	(%rax), %edx
LBB0_27:
	movl	24(%r13), %esi
	leaq	-60(%rbp), %rcx
	movq	%r15, -48(%rbp)                 ## 8-byte Spill
	movq	%r15, %rdi
	callq	_map_vs_output
	jmp	LBB0_5
	.cfi_endproc
	.p2align	2, 0x90
	.data_region jt32
.set L0_0_set_3, LBB0_3-LJTI0_0
.set L0_0_set_2, LBB0_2-LJTI0_0
.set L0_0_set_8, LBB0_8-LJTI0_0
.set L0_0_set_11, LBB0_11-LJTI0_0
.set L0_0_set_14, LBB0_14-LJTI0_0
LJTI0_0:
	.long	L0_0_set_3
	.long	L0_0_set_2
	.long	L0_0_set_8
	.long	L0_0_set_11
	.long	L0_0_set_14
	.long	L0_0_set_3
	.long	L0_0_set_3
	.long	L0_0_set_3
	.long	L0_0_set_3
	.long	L0_0_set_3
	.long	L0_0_set_2
	.long	L0_0_set_3
.set L0_1_set_13, LBB0_13-LJTI0_1
.set L0_1_set_23, LBB0_23-LJTI0_1
.set L0_1_set_24, LBB0_24-LJTI0_1
.set L0_1_set_25, LBB0_25-LJTI0_1
LJTI0_1:
	.long	L0_1_set_13
	.long	L0_1_set_23
	.long	L0_1_set_24
	.long	L0_1_set_25
	.end_data_region
                                        ## -- End function
	.comm	_BWRITERSP_WRITEMASK_0,4,2      ## @BWRITERSP_WRITEMASK_0
	.comm	_BWRITERSP_WRITEMASK_1,4,2      ## @BWRITERSP_WRITEMASK_1
	.comm	_BWRITERSP_WRITEMASK_2,4,2      ## @BWRITERSP_WRITEMASK_2
	.comm	_BWRITERSP_WRITEMASK_3,4,2      ## @BWRITERSP_WRITEMASK_3
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"Unexpected register type %u\n"

L_.str.1:                               ## @.str.1
	.asciz	"Only regnum 0 is supported for the loop index register in vs_2_0\n"

	.comm	_E_INVALIDARG,8,3               ## @E_INVALIDARG
	.comm	_D3DSPR_LOOP,4,2                ## @D3DSPR_LOOP
L_.str.2:                               ## @.str.2
	.asciz	"Predicate register is allowed only in vs_2_x\n"

L_.str.3:                               ## @.str.3
	.asciz	"Only predicate register 0 is supported\n"

	.comm	_D3DSPR_PREDICATE,4,2           ## @D3DSPR_PREDICATE
L_.str.4:                               ## @.str.4
	.asciz	"Invalid register type for 2.0 vshader\n"

	.comm	_D3DVS_SWIZZLE_MASK,4,2         ## @D3DVS_SWIZZLE_MASK
	.comm	_D3DVS_ADDRMODE_RELATIVE,4,2    ## @D3DVS_ADDRMODE_RELATIVE
	.comm	_D3DVS_ADDRESSMODE_MASK,4,2     ## @D3DVS_ADDRESSMODE_MASK
	.no_dead_strip	_vs_2_srcreg
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function vs_2_srcreg
_vs_2_srcreg:                           ; @vs_2_srcreg
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #80
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x21, x1
	mov	x19, x0
	ldr	w1, [x1]
	sub	w8, w1, #132
	cmp	w8, #11
	b.hi	LBB0_7
; %bb.1:
	mov	x20, x2
Lloh0:
	adrp	x9, lJTI0_0@PAGE
Lloh1:
	add	x9, x9, lJTI0_0@PAGEOFF
	adr	x10, LBB0_2
	ldrb	w11, [x9, x8]
	add	x10, x10, x11, lsl #2
	br	x10
LBB0_2:
Lloh2:
	adrp	x0, l_.str@PAGE
Lloh3:
	add	x0, x0, l_.str@PAGEOFF
	bl	_FIXME
	ldr	w1, [x21]
LBB0_3:
	mov	x0, x1
	bl	_d3d9_register
	ldr	w1, [x21, #24]
LBB0_4:
	bl	_d3dsp_register
LBB0_5:
	mov	x22, x0
	ldr	w0, [x21, #20]
	bl	_d3d9_swizzle
Lloh4:
	adrp	x8, _D3DVS_SWIZZLE_MASK@GOTPAGE
Lloh5:
	ldr	x8, [x8, _D3DVS_SWIZZLE_MASK@GOTPAGEOFF]
Lloh6:
	ldr	w8, [x8]
	and	w23, w8, w0
	ldr	w0, [x21, #16]
	bl	_d3d9_srcmod
Lloh7:
	adrp	x24, _D3DVS_ADDRMODE_RELATIVE@GOTPAGE
Lloh8:
	ldr	x24, [x24, _D3DVS_ADDRMODE_RELATIVE@GOTPAGEOFF]
	ldr	x8, [x21, #8]
	ldr	w9, [x24]
Lloh9:
	adrp	x10, _D3DVS_ADDRESSMODE_MASK@GOTPAGE
Lloh10:
	ldr	x10, [x10, _D3DVS_ADDRESSMODE_MASK@GOTPAGEOFF]
Lloh11:
	ldr	w10, [x10]
	and	w9, w10, w9
	cmp	x8, #0
	csel	w8, wzr, w9, eq
	orr	w9, w22, w23
	orr	w9, w9, w0
	orr	w8, w9, w8
	orr	w22, w8, #0x80000000
	mov	x0, x20
	mov	x1, x22
	bl	_put_dword
	ldr	w8, [x24]
	tst	w22, w8
	b.eq	LBB0_18
; %bb.6:
	ldr	x1, [x21, #8]
	mov	x0, x19
	mov	x2, x20
	bl	_vs_2_srcreg
	b	LBB0_18
LBB0_7:
Lloh12:
	adrp	x0, l_.str.4@PAGE
Lloh13:
	add	x0, x0, l_.str.4@PAGEOFF
	b	LBB0_17
LBB0_8:
	ldr	w22, [x19, #8]
	mov	w0, #2
	mov	w1, #1
	bl	_BWRITERVS_VERSION
	cmp	w22, w0
	b.ne	LBB0_16
; %bb.9:
	ldr	w8, [x21, #24]
	cmp	w8, #1
	b.lt	LBB0_20
; %bb.10:
Lloh14:
	adrp	x0, l_.str.3@PAGE
Lloh15:
	add	x0, x0, l_.str.3@PAGEOFF
	b	LBB0_17
LBB0_11:
	ldr	w8, [x21, #20]
	sub	w8, w8, #128
	cmp	w8, #3
	b.hi	LBB0_22
; %bb.12:
Lloh16:
	adrp	x9, lJTI0_1@PAGE
Lloh17:
	add	x9, x9, lJTI0_1@PAGEOFF
	adr	x10, LBB0_13
	ldrb	w11, [x9, x8]
	add	x10, x10, x11, lsl #2
	br	x10
LBB0_13:
Lloh18:
	adrp	x8, _BWRITERSP_WRITEMASK_2@GOTPAGE
Lloh19:
	ldr	x8, [x8, _BWRITERSP_WRITEMASK_2@GOTPAGEOFF]
	b	LBB0_26
LBB0_14:
	ldr	w8, [x21, #24]
	cbz	w8, LBB0_19
; %bb.15:
Lloh20:
	adrp	x0, l_.str.1@PAGE
Lloh21:
	add	x0, x0, l_.str.1@PAGEOFF
	b	LBB0_17
LBB0_16:
Lloh22:
	adrp	x0, l_.str.2@PAGE
Lloh23:
	add	x0, x0, l_.str.2@PAGEOFF
LBB0_17:
	bl	_WARN
Lloh24:
	adrp	x8, _E_INVALIDARG@GOTPAGE
Lloh25:
	ldr	x8, [x8, _E_INVALIDARG@GOTPAGEOFF]
Lloh26:
	ldr	x8, [x8]
	str	x8, [x19]
LBB0_18:
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #80
	ret
LBB0_19:
Lloh27:
	adrp	x8, _D3DSPR_LOOP@GOTPAGE
Lloh28:
	ldr	x8, [x8, _D3DSPR_LOOP@GOTPAGEOFF]
	b	LBB0_21
LBB0_20:
Lloh29:
	adrp	x8, _D3DSPR_PREDICATE@GOTPAGE
Lloh30:
	ldr	x8, [x8, _D3DSPR_PREDICATE@GOTPAGEOFF]
LBB0_21:
	ldr	w0, [x8]
	mov	w1, #0
	b	LBB0_4
LBB0_22:
	mov	w2, #0
	b	LBB0_27
LBB0_23:
Lloh31:
	adrp	x8, _BWRITERSP_WRITEMASK_1@GOTPAGE
Lloh32:
	ldr	x8, [x8, _BWRITERSP_WRITEMASK_1@GOTPAGEOFF]
	b	LBB0_26
LBB0_24:
Lloh33:
	adrp	x8, _BWRITERSP_WRITEMASK_0@GOTPAGE
Lloh34:
	ldr	x8, [x8, _BWRITERSP_WRITEMASK_0@GOTPAGEOFF]
	b	LBB0_26
LBB0_25:
Lloh35:
	adrp	x8, _BWRITERSP_WRITEMASK_3@GOTPAGE
Lloh36:
	ldr	x8, [x8, _BWRITERSP_WRITEMASK_3@GOTPAGEOFF]
LBB0_26:
	ldr	w2, [x8]
LBB0_27:
	ldr	w1, [x21, #24]
	add	x3, sp, #12
	mov	x0, x19
	bl	_map_vs_output
	b	LBB0_5
	.loh AdrpAdd	Lloh0, Lloh1
	.loh AdrpAdd	Lloh2, Lloh3
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGot	Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh4, Lloh5, Lloh6
	.loh AdrpAdd	Lloh12, Lloh13
	.loh AdrpAdd	Lloh14, Lloh15
	.loh AdrpAdd	Lloh16, Lloh17
	.loh AdrpLdrGot	Lloh18, Lloh19
	.loh AdrpAdd	Lloh20, Lloh21
	.loh AdrpAdd	Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.loh AdrpLdrGot	Lloh27, Lloh28
	.loh AdrpLdrGot	Lloh29, Lloh30
	.loh AdrpLdrGot	Lloh31, Lloh32
	.loh AdrpLdrGot	Lloh33, Lloh34
	.loh AdrpLdrGot	Lloh35, Lloh36
	.cfi_endproc
	.section	__TEXT,__const
lJTI0_0:
	.byte	(LBB0_3-LBB0_2)>>2
	.byte	(LBB0_2-LBB0_2)>>2
	.byte	(LBB0_8-LBB0_2)>>2
	.byte	(LBB0_11-LBB0_2)>>2
	.byte	(LBB0_14-LBB0_2)>>2
	.byte	(LBB0_3-LBB0_2)>>2
	.byte	(LBB0_3-LBB0_2)>>2
	.byte	(LBB0_3-LBB0_2)>>2
	.byte	(LBB0_3-LBB0_2)>>2
	.byte	(LBB0_3-LBB0_2)>>2
	.byte	(LBB0_2-LBB0_2)>>2
	.byte	(LBB0_3-LBB0_2)>>2
lJTI0_1:
	.byte	(LBB0_13-LBB0_13)>>2
	.byte	(LBB0_23-LBB0_13)>>2
	.byte	(LBB0_24-LBB0_13)>>2
	.byte	(LBB0_25-LBB0_13)>>2
                                        ; -- End function
	.comm	_BWRITERSP_WRITEMASK_0,4,2      ; @BWRITERSP_WRITEMASK_0
	.comm	_BWRITERSP_WRITEMASK_1,4,2      ; @BWRITERSP_WRITEMASK_1
	.comm	_BWRITERSP_WRITEMASK_2,4,2      ; @BWRITERSP_WRITEMASK_2
	.comm	_BWRITERSP_WRITEMASK_3,4,2      ; @BWRITERSP_WRITEMASK_3
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"Unexpected register type %u\n"

l_.str.1:                               ; @.str.1
	.asciz	"Only regnum 0 is supported for the loop index register in vs_2_0\n"

	.comm	_E_INVALIDARG,8,3               ; @E_INVALIDARG
	.comm	_D3DSPR_LOOP,4,2                ; @D3DSPR_LOOP
l_.str.2:                               ; @.str.2
	.asciz	"Predicate register is allowed only in vs_2_x\n"

l_.str.3:                               ; @.str.3
	.asciz	"Only predicate register 0 is supported\n"

	.comm	_D3DSPR_PREDICATE,4,2           ; @D3DSPR_PREDICATE
l_.str.4:                               ; @.str.4
	.asciz	"Invalid register type for 2.0 vshader\n"

	.comm	_D3DVS_SWIZZLE_MASK,4,2         ; @D3DVS_SWIZZLE_MASK
	.comm	_D3DVS_ADDRMODE_RELATIVE,4,2    ; @D3DVS_ADDRMODE_RELATIVE
	.comm	_D3DVS_ADDRESSMODE_MASK,4,2     ; @D3DVS_ADDRESSMODE_MASK
	.no_dead_strip	_vs_2_srcreg
.subsections_via_symbols
