title: Garlic content: garlic are produced when the plant's cells are damaged. When a cell is broken by chopping, chewing, or crushing, enzymes stored in cell vacuoles trigger the breakdown of several sulfur-containing compounds stored in the cell fluids (cytosol). The resultant compounds are responsible for the sharp or hot taste and strong smell of garlic. Some of the compounds are unstable and continue to react over time. Among the members of the onion family, garlic has by far the highest concentrations of initial reaction products, making garlic much more potent than onion, shallot, or leeks. Although many humans enjoy the taste of


title: Garlic content: garlic, these compounds are believed to have evolved as a defensive mechanism, deterring animals such as birds, insects, and worms from eating the plant. Because of this, people throughout history have used garlic to keep away insects such as mosquitoes and slugs. A large number of sulfur compounds contribute to the smell and taste of garlic. Allicin has been found to be the compound most responsible for the "hot" sensation of raw garlic. This chemical opens thermo-transient receptor potential channels that are responsible for the burning sense of heat in foods. The process of cooking garlic removes allicin, thus mellowing


title: Garlic content: its spiciness. Allicin, along with its decomposition products diallyl disulfide and diallyl trisulfide, are major contributors to the characteristic odor of garlic, with other allicin-derived compounds, such as vinyldithiins and ajoene. Because of its strong odor, garlic is sometimes called the "stinking rose". When eaten in quantity, garlic may be strongly evident in the diner's sweat and garlic breath the following day. This is because garlic's strong-smelling sulfur compounds are metabolized, forming allyl methyl sulfide. Allyl methyl sulfide (AMS) cannot be digested and is passed into the blood. It is carried to the lungs and the skin, where it is


title: Garlic content: excreted. Since digestion takes several hours, and release of AMS several hours more, the effect of eating garlic may be present for a long time. The well-known phenomenon of "garlic breath" is allegedly alleviated by eating fresh parsley. The herb is, therefore, included in many garlic recipes, such as "pistou", "persillade", and the garlic butter spread used in garlic bread. Because of the AMS in the bloodstream, it is believed by some to act as a mosquito repellent, but no clinically reported evidence suggests it is actually effective. Abundant sulfur compounds in garlic are also responsible for turning garlic green


title: Garlic content: or blue during pickling and cooking. Under these conditions ("i.e." acidity, heat) the sulfur-containing compound alliinase react with common amino acids to make pyrroles, clusters of carbon-nitrogen rings. These rings can be linked together into polypyrrole molecules. Ring structures absorb particular wavelengths of light and thus appear colored. The two-pyrrole molecule looks red, the three-pyrrole molecule looks blue and the four-pyrrole molecule looks green (like chlorophyll, a tetrapyrrole). Like chlorophyll, the pyrrole pigments are safe to eat. Upon cutting, similar to a color change in onion caused by reactions of amino acids with sulfur compounds, garlic can turn green. Garlic


title: Enchilada content: Enchilada An enchilada (, ) is a corn tortilla rolled around a filling and covered with a chili pepper sauce. Enchiladas can be filled with a variety of ingredients, including various meats, cheese, beans, potatoes, vegetables or combinations. Originating in Mexico, enchiladas are a popular dish throughout Mexico and the American Southwest. The Real Academia Española defines the word "enchilada", as used in Mexico, as a rolled maize tortilla stuffed with meat and covered with a tomato and chili sauce. "Enchilada" is the past participle of Spanish "enchilar", "to add chili pepper to", literally to "season (or decorate) with chili".


title: Enchilada content: The idiomatic American English phrase "the whole enchilada" means "the whole thing". Enchiladas originated in Mexico, where the practice of rolling tortillas around other food dates back at least to Mayan times. The people living in the lake region of the Valley of Mexico traditionally ate corn tortillas folded or rolled around small fish. Writing at the time of the Spanish conquistadors, Bernal Díaz del Castillo documented a feast enjoyed by Europeans hosted by Hernán Cortés in Coyoacán, which included foods served in corn tortillas. (Note that the native Nahuatl name for the flat corn bread used was "tlaxcalli"; the


title: Enchilada content: Spanish gave it the name "tortilla".) The Nahuatl word for enchilada is "chīllapītzalli" which is formed of the Nahuatl word for "chili", "chīlli" and the Nahuatl word for "flute", "tlapītzalli" . In the 19th century, as Mexican cuisine was being memorialized, enchiladas were mentioned in the first Mexican cookbook, "El cocinero mexicano" (""The Mexican Chef""), published in 1831, and in Mariano Galvan Rivera's "Diccionario de Cocina", published in 1845. Mexican cooking authority Diana Kennedy cites an early reference from an American traveler from 1883 who remarked, "Enchiladas, a greasy tortilla sandwich containing chiles and a number of other uninviting looking


title: Enchilada content: compounds and other nasty messes, are sold everywhere, filling the air with a pungent, nauseous smell." Kennedy goes on to heartily disagree with that characterization, likely brought on by culture shock. Another early mention, in English, is a 1914 recipe found in "California Mexican-Spanish Cookbook", by Bertha Haffner Ginger. In their original form as Mexican street food, enchiladas were simply corn tortillas dipped in chili sauce and eaten without fillings. There are now many varieties, which are distinguished primarily by their sauces, fillings and, in one instance, by their form. Various adjectives may be used to describe the recipe content


title: Enchilada content: or origin, e.g. "enchilada tapatia" would be a recipe from Jalisco. Varieties include: Fillings include meat (e.g. beef, poultry, pork, seafood) or cheese, potatoes, vegetables, beans and any combination of these. Enchiladas are commonly topped or garnished with cheese, sour cream, lettuce, olives, chopped onions, chili peppers, salsa, or fresh cilantro. Enchilada An enchilada (, ) is a corn tortilla rolled around a filling and covered with a chili pepper sauce. Enchiladas can be filled with a variety of ingredients, including various meats, cheese, beans, potatoes, vegetables or combinations. Originating in Mexico, enchiladas are a popular dish throughout Mexico and


title: "Oakland, California" content: by any city in California. On October 10, 2011, protesters and civic activists began "Occupy Oakland" demonstrations at Frank Ogawa Plaza in Downtown Oakland. Oakland is in the eastern region of the San Francisco Bay. In 1991 the City Hall tower was at (NAD83). (The building still exists, but like the rest of the Bay Area, it has shifted northwest perhaps 0.6 meters in the last twenty years.) The United States Census Bureau says the city's total area is , including of land and (28.48 percent) of water. Oakland's highest point is near Grizzly Peak Blvd, east of Berkeley, just


title: Zooplankton content: zooplankton play a role in aquatic food webs, as a resource for consumers on higher trophic levels (including fish), and as a conduit for packaging the organic material in the biological pump. Since they are typically small, zooplankton can respond rapidly to increases in phytoplankton abundance, for instance, during the spring bloom. Zooplankton can also act as a disease reservoir. Crustacean zooplankton have been found to house the bacterium "Vibrio cholerae", which causes cholera, by allowing the cholera vibrios to attach to their chitinous exoskeletons. This symbiotic relationship enhances the bacterium's ability to survive in an aquatic environment, as the


title: Sucrose content: raises blood glucose can cause problems for people suffering from defective glucose metabolism, such as persons with hypoglycemia or diabetes mellitus. Sucrose can contribute to the development of metabolic syndrome. In an experiment with rats that were fed a diet one-third of which was sucrose, the sucrose first elevated blood levels of triglycerides, which induced visceral fat and ultimately resulted in insulin resistance. Another study found that rats fed sucrose-rich diets developed high triglycerides, hyperglycemia, and insulin resistance. A 2004 study recommended that the consumption of sucrose-containing drinks should be limited due to the growing number of people with obesity


title: "Flash memory" content: Flash memory Flash memory is an electronic (solid-state) non-volatile computer storage medium that can be electrically erased and reprogrammed. Toshiba developed flash memory from EEPROM (electrically erasable programmable read-only memory) in the early 1980s and introduced it to the market in 1984. The two main types of flash memory are named after the NAND and NOR logic gates. The individual flash memory cells exhibit internal characteristics similar to those of the corresponding gates. While EPROMs had to be completely erased before being rewritten, NAND-type flash memory may be written and read in blocks (or pages) which are generally much smaller


title: "Flash memory" content: than the entire device. NOR-type flash allows a single machine word (byte) to be written to an erased location or read independently. The NAND type operates primarily in memory cards, USB flash drives, solid-state drives (those produced in 2009 or later), and similar products, for general storage and transfer of data. NAND or NOR flash memory is also often used to store configuration data in numerous digital products, a task previously made possible by EEPROM or battery-powered static RAM. One key disadvantage of flash memory is that it can only endure a relatively small number of write cycles in a


title: "Flash memory" content: specific block. Example applications of both types of flash memory include personal computers, PDAs, digital audio players, digital cameras, mobile phones, synthesizers, video games, scientific instrumentation, industrial robotics, and medical electronics. In addition to being non-volatile, flash memory offers fast read access times, although not as fast as static RAM or ROM. Its mechanical shock resistance helps explain its popularity over hard disks in portable devices, as does its high durability, ability to withstand high pressure, temperature and immersion in water, etc. Although flash memory is technically a type of EEPROM, the term "EEPROM" is generally used to refer specifically


title: "Flash memory" content: to non-flash EEPROM which is erasable in small blocks, typically bytes. Because erase cycles are slow, the large block sizes used in flash memory erasing give it a significant speed advantage over non-flash EEPROM when writing large amounts of data. As of 2013, flash memory costs much less than byte-programmable EEPROM and had become the dominant memory type wherever a system required a significant amount of non-volatile solid-state storage. Flash memory (both NOR and NAND types) was invented by Fujio Masuoka while working for Toshiba circa 1980. According to Toshiba, the name "flash" was suggested by Masuoka's colleague, Shōji Ariizumi,


title: "Flash memory" content: because the erasure process of the memory contents reminded him of the flash of a camera. Masuoka and colleagues presented the invention at the "IEEE 1987 International Electron Devices Meeting" (IEDM) held in San Francisco. Intel Corporation introduced the first commercial NOR type flash chip in 1988. NOR-based flash has long erase and write times, but provides full address and data buses, allowing random access to any memory location. This makes it a suitable replacement for older read-only memory (ROM) chips, which are used to store program code that rarely needs to be updated, such as a computer's BIOS or


title: "Flash memory" content: the firmware of set-top boxes. Its endurance may be from as little as 100 erase cycles for an on-chip flash memory, to a more typical 10,000 or 100,000 erase cycles, up to 1,000,000 erase cycles. NOR-based flash was the basis of early flash-based removable media; CompactFlash was originally based on it, though later cards moved to less expensive NAND flash. NAND flash has reduced erase and write times, and requires less chip area per cell, thus allowing greater storage density and lower cost per bit than NOR flash; it also has up to 10 times the endurance of NOR flash.


title: "Flash memory" content: However, the I/O interface of NAND flash does not provide a random-access external address bus. Rather, data must be read on a block-wise basis, with typical block sizes of hundreds to thousands of bits. This makes NAND flash unsuitable as a drop-in replacement for program ROM, since most microprocessors and microcontrollers require byte-level random access. In this regard, NAND flash is similar to other secondary data storage devices, such as hard disks and optical media, and is thus highly suitable for use in mass-storage devices, such as memory cards. The first NAND-based removable media format was SmartMedia in 1995, and


title: "Flash memory" content: many others have followed, including: A new generation of memory card formats, including RS-MMC, miniSD and microSD, feature extremely small form factors. For example, the microSD card has an area of just over 1.5 cm, with a thickness of less than 1 mm. As of August 2017 microSD cards with capacity up to 400 GB (400 billion bytes) are available. Flash memory stores information in an array of memory cells made from floating-gate transistors. In single-level cell (SLC) devices, each cell stores only one bit of information. Multi-level cell (MLC) devices, including triple-level cell (TLC) devices, can store more than


title: "Flash memory" content: one bit per cell. The floating gate may be conductive (typically polysilicon in most kinds of flash memory) or non-conductive (as in SONOS flash memory). In flash memory, each memory cell resembles a standard metal-oxide-semiconductor field-effect transistor (MOSFET) except that the transistor has two gates instead of one. The cells can be seen as an electrical switch in which current flows between two terminals (source and drain) and is controlled by a floating gate (FG) and a control gate (CG). The CG is similar to the gate in other MOS transistors, but below this, there is the FG insulated all


title: "Flash memory" content: around by an oxide layer. The FG is interposed between the CG and the MOSFET channel. Because the FG is electrically isolated by its insulating layer, electrons placed on it are trapped. When the FG is charged with electrons, this charge screens the electric field from the CG, thus, increasing the threshold voltage (V) of the cell. This means that now a higher voltage (V) must be applied to the CG to make the channel conductive. In order to read a value from the transistor, an intermediate voltage between the threshold voltages (V & V) is applied to the CG.


title: "Flash memory" content: If the channel conducts at this intermediate voltage, the FG must be uncharged (if it was charged, we would not get conduction because the intermediate voltage is less than V), and hence, a logical "1" is stored in the gate. If the channel does not conduct at the intermediate voltage, it indicates that the FG is charged, and hence, a logical "0" is stored in the gate. The presence of a logical "0" or "1" is sensed by determining whether there is current flowing through the transistor when the intermediate voltage is asserted on the CG. In a multi-level cell


title: "Flash memory" content: device, which stores more than one bit per cell, the amount of current flow is sensed (rather than simply its presence or absence), in order to determine more precisely the level of charge on the FG. The process of moving electrons from the control gate and into the floating gate is called the Fowler-Nordheim tunneling effect, and it fundamentally changes the characteristics of the cell by increasing the MOSFET’s threshold voltage. This, in turn, changes the drain-source current that flows through the transistor for a given gate voltage, which is ultimately used to encode a binary value. The Fowler-Nordheim tunneling


title: "Flash memory" content: effect is reversible, so electrons can be added to or removed from the floating gate, processes traditionally known as writing and erasing. Despite the need for relatively high programming and erasing voltages, virtually all flash chips today require only a single supply voltage and produce the high voltages using on-chip charge pumps. Over half the energy used by a 1.8 V NAND flash chip is lost in the charge pump itself. Since boost converters are inherently more efficient than charge pumps, researchers developing low-power SSDs have proposed returning to the dual Vcc/Vpp supply voltages used on all the early flash


title: "Flash memory" content: chips, driving the high Vpp voltage for all flash chips in a SSD with a single shared external boost converter. In spacecraft and other high-radiation environments, the on-chip charge pump is the first part of the flash chip to fail, although flash memories will continue to work in read-only mode at much higher radiation levels. In NOR flash, each cell has one end connected directly to ground, and the other end connected directly to a bit line. This arrangement is called "NOR flash" because it acts like a NOR gate: when one of the word lines (connected to the cell's


title: "Flash memory" content: CG) is brought high, the corresponding storage transistor acts to pull the output bit line low. NOR flash continues to be the technology of choice for embedded applications requiring a discrete non-volatile memory device. The low read latencies characteristic of NOR devices allow for both direct code execution and data storage in a single memory product. A single-level NOR flash cell in its default state is logically equivalent to a binary "1" value, because current will flow through the channel under application of an appropriate voltage to the control gate, so that the bitline voltage is pulled down. A NOR


title: "Flash memory" content: flash cell can be programmed, or set to a binary "0" value, by the following procedure: To erase a NOR flash cell (resetting it to the "1" state), a large voltage "of the opposite polarity" is applied between the CG and source terminal, pulling the electrons off the FG through quantum tunneling. Modern NOR flash memory chips are divided into erase segments (often called blocks or sectors). The erase operation can be performed only on a block-wise basis; all the cells in an erase segment must be erased together. Programming of NOR cells, however, generally can be performed one byte


title: "Flash memory" content: or word at a time. NAND flash also uses floating-gate transistors, but they are connected in a way that resembles a NAND gate: several transistors are connected in series, and the bit line is pulled low only if all the word lines are pulled high (above the transistors' V). These groups are then connected via some additional transistors to a NOR-style bit line array in the same way that single transistors are linked in NOR flash. Compared to NOR flash, replacing single transistors with serial-linked groups adds an extra level of addressing. Whereas NOR flash might address memory by page


title: "Flash memory" content: then word, NAND flash might address it by page, word and bit. Bit-level addressing suits bit-serial applications (such as hard disk emulation), which access only one bit at a time. Execute-in-place applications, on the other hand, require every bit in a word to be accessed simultaneously. This requires word-level addressing. In any case, both bit and word addressing modes are possible with either NOR or NAND flash. To read data, first the desired group is selected (in the same way that a single transistor is selected from a NOR array). Next, most of the word lines are pulled up above


title: "Flash memory" content: the V of a programmed bit, while one of them is pulled up to just over the V of an erased bit. The series group will conduct (and pull the bit line low) if the selected bit has not been programmed. Despite the additional transistors, the reduction in ground wires and bit lines allows a denser layout and greater storage capacity per chip. (The ground wires and bit lines are actually much wider than the lines in the diagrams.) In addition, NAND flash is typically permitted to contain a certain number of faults (NOR flash, as is used for a


title: "Flash memory" content: BIOS ROM, is expected to be fault-free). Manufacturers try to maximize the amount of usable storage by shrinking the size of the transistors. NAND flash uses tunnel injection for writing and tunnel release for erasing. NAND flash memory forms the core of the removable USB storage devices known as USB flash drives, as well as most memory card formats and solid-state drives available today. The architecture of NAND Flash means that data can be read and programmed in pages, typically between 4 KB and 16 KB in size, but can only be erased at the level of entire blocks consisting


title: "Flash memory" content: of multiple pages and MB in size. When a block is erased all the cells are logically set to 1. Data can only be programmed in one pass to a page in a block that was erased. Any cells that have been set to 0 by programming can only be reset to 1 by erasing the entire block. This means that before new data can be programmed into a page that already contains data, the current contents of the page plus the new data must be copied to a new, erased page. If a suitable page is available, the data


title: "Flash memory" content: can be written to it immediately. If no erased page is available, a block must be erased before copying the data to a page in that block. The old page is then marked as invalid and is available for erasing and reuse. Vertical NAND (V-NAND) memory stacks memory cells vertically and uses a charge trap flash architecture. The vertical layers allow larger areal bit densities without requiring smaller individual cells. V-NAND uses a charge trap flash geometry (pioneered in 2002 by AMD) that stores charge on an embedded silicon nitride film. Such a film is more robust against point defects


title: "Flash memory" content: and can be made thicker to hold larger numbers of electrons. V-NAND wraps a planar charge trap cell into a cylindrical form. The hierarchical structure of NAND Flash starts at a cell level which establishes strings, then pages, blocks, planes and ultimately a die. A string is a series of connected NAND cells in which the source of one cell is connected to the drain of the next one. Depending on the NAND technology, a string typically consists of 32 to 128 NAND cells. Strings are organised into pages which are then organised into blocks in which each string is


title: "Flash memory" content: connected to a separate line called a bitline (BL) All cells with the same position in the string are connected through the control gates by a wordline (WL) A plane contains a certain number of blocks that are connected through the same BL. A Flash die consists of one or more planes, and the peripheral circuitry that is needed to perform all the read/ write/ erase operations. An individual memory cell is made up of one planar polysilicon layer containing a hole filled by multiple concentric vertical cylinders. The hole's polysilicon surface acts as the gate electrode. The outermost silicon


title: "Flash memory" content: dioxide cylinder acts as the gate dielectric, enclosing a silicon nitride cylinder that stores charge, in turn enclosing a silicon dioxide cylinder as the tunnel dielectric that surrounds a central rod of conducting polysilicon which acts as the conducting channel. Memory cells in different vertical layers do not interfere with each other, as the charges cannot move vertically through the silicon nitride storage medium, and the electric fields associated with the gates are closely confined within each layer. The vertical collection is electrically identical to the serial-linked groups in which conventional NAND flash memory is configured. Growth of a group


title: "Flash memory" content: of V-NAND cells begins with an alternating stack of conducting (doped) polysilicon layers and insulating silicon dioxide layers. The next step is to form a cylindrical hole through these layers. In practice, a 128 Gibit V-NAND chip with 24 layers of memory cells requires about 2.9 billion such holes. Next the hole's inner surface receives multiple coatings, first silicon dioxide, then silicon nitride, then a second layer of silicon dioxide. Finally, the hole is filled with conducting (doped) polysilicon. As of 2013, V-NAND flash architecture allows read and write operations twice as fast as conventional NAND and can last up


title: "Flash memory" content: to 10 times as long, while consuming 50 percent less power. They offer comparable physical bit density using 10-nm lithography, but may be able to increase bit density by up to two orders of magnitude. One limitation of flash memory is that, although it can be read or programmed a byte or a word at a time in a random access fashion, it can be erased only a block at a time. This generally sets all bits in the block to 1. Starting with a freshly erased block, any location within that block can be programmed. However, once a bit


title: "Flash memory" content: has been set to 0, only by erasing the entire block can it be changed back to 1. In other words, flash memory (specifically NOR flash) offers random-access read and programming operations, but does not offer arbitrary random-access rewrite or erase operations. A location can, however, be rewritten as long as the new value's 0 bits are a superset of the over-written values. For example, a nibble value may be erased to 1111, then written as 1110. Successive writes to that nibble can change it to 1010, then 0010, and finally 0000. Essentially, erasure sets all bits to 1, and


title: "Flash memory" content: programming can only clear bits to 0. Some file systems designed for flash devices make use of this rewrite capability, for example Yaffs1, to represent sector metadata. Other flash file systems, such as YAFFS2, never make use of this "rewrite" capability -- they do a lot of extra work to meet a "write once rule". Although data structures in flash memory cannot be updated in completely general ways, this allows members to be "removed" by marking them as invalid. This technique may need to be modified for multi-level cell devices, where one memory cell holds more than one bit. Common


title: "Flash memory" content: flash devices such as USB flash drives and memory cards provide only a block-level interface, or flash translation layer (FTL), which writes to a different cell each time to wear-level the device. This prevents incremental writing within a block; however, it does help the device from being prematurely worn out by intensive write patterns. Another limitation is that flash memory has a finite number of program erase cycles (typically written as P/E cycles). Most commercially available flash products are guaranteed to withstand around 100,000 P/E cycles before the wear begins to deteriorate the integrity of the storage. Micron Technology and


title: "Flash memory" content: Sun Microsystems announced an SLC NAND flash memory chip rated for 1,000,000 P/E cycles on 17 December 2008. The guaranteed cycle count may apply only to block zero (as is the case with TSOP NAND devices), or to all blocks (as in NOR). This effect is mitigated in some chip firmware or file system drivers by counting the writes and dynamically remapping blocks in order to spread write operations between sectors; this technique is called wear leveling. Another approach is to perform write verification and remapping to spare sectors in case of write failure, a technique called bad block management


title: "Flash memory" content: (BBM). For portable consumer devices, these wearout management techniques typically extend the life of the flash memory beyond the life of the device itself, and some data loss may be acceptable in these applications. For high reliability data storage, however, it is not advisable to use flash memory that would have to go through a large number of programming cycles. This limitation is meaningless for 'read-only' applications such as thin clients and routers, which are programmed only once or at most a few times during their lifetimes. In December 2012, Taiwanese engineers from Macronix revealed their intention to announce at


title: "Flash memory" content: the 2012 IEEE International Electron Devices Meeting that they had figured out how to improve NAND flash storage read/write cycles from 10,000 to 100 million cycles using a "self-healing" process that used a flash chip with "onboard heaters that could anneal small groups of memory cells." The built-in thermal annealing was to replace the usual erase cycle with a local high temperature process that not only erased the stored charge, but also repaired the electron-induced stress in the chip, giving write cycles of at least 100 million. The result was to be a chip that could be erased and rewritten


title: "Flash memory" content: over and over, even when it should theoretically break down. As promising as Macronix’s breakthrough might have been for the mobile industry, however, there were no plans for a commercial product to be released any time in the near future. The method used to read NAND flash memory can cause nearby cells in the same memory block to change over time (become programmed). This is known as read disturb. The threshold number of reads is generally in the hundreds of thousands of reads between intervening erase operations. If reading continually from one cell, that cell will not fail but rather


title: "Flash memory" content: one of the surrounding cells on a subsequent read. To avoid the read disturb problem the flash controller will typically count the total number of reads to a block since the last erase. When the count exceeds a target limit, the affected block is copied over to a new block, erased, then released to the block pool. The original block is as good as new after the erase. If the flash controller does not intervene in time, however, a read disturb error will occur with possible data loss if the errors are too numerous to correct with an error-correcting code.


title: "Flash memory" content: Most flash ICs come in ball grid array (BGA) packages, and even the ones that do not are often mounted on a PCB next to other BGA packages. After PCB Assembly, boards with BGA packages are often X-rayed to see if the balls are making proper connections to the proper pad, or if the BGA needs rework. These X-rays can erase programmed bits in a flash chip (convert programmed "0" bits into erased "1" bits). Erased bits ("1" bits) are not affected by X-rays. Some manufacturers are now making X-ray proof SD and USB memory devices. The low-level interface to


title: "Flash memory" content: flash memory chips differs from those of other memory types such as DRAM, ROM, and EEPROM, which support bit-alterability (both zero to one and one to zero) and random access via externally accessible address buses. NOR memory has an external address bus for reading and programming. For NOR memory, reading and programming are random-access, and unlocking and erasing are block-wise. For NAND memory, reading and programming are page-wise, and unlocking and erasing are block-wise. Reading from NOR flash is similar to reading from random-access memory, provided the address and data bus are mapped correctly. Because of this, most microprocessors can


title: "Flash memory" content: use NOR flash memory as execute in place (XIP) memory, meaning that programs stored in NOR flash can be executed directly from the NOR flash without needing to be copied into RAM first. NOR flash may be programmed in a random-access manner similar to reading. Programming changes bits from a logical one to a zero. Bits that are already zero are left unchanged. Erasure must happen a block at a time, and resets all the bits in the erased block back to one. Typical block sizes are 64, 128, or 256 KiB. Bad block management is a relatively new feature


title: "Flash memory" content: in NOR chips. In older NOR devices not supporting bad block management, the software or device driver controlling the memory chip must correct for blocks that wear out, or the device will cease to work reliably. The specific commands used to lock, unlock, program, or erase NOR memories differ for each manufacturer. To avoid needing unique driver software for every device made, special Common Flash Memory Interface (CFI) commands allow the device to identify itself and its critical operating parameters. Besides its use as random-access ROM, NOR flash can also be used as a storage device, by taking advantage of


title: "Flash memory" content: random-access programming. Some devices offer read-while-write functionality so that code continues to execute even while a program or erase operation is occurring in the background. For sequential data writes, NOR flash chips typically have slow write speeds, compared with NAND flash. Typical NOR flash does not need an error correcting code. NAND flash architecture was introduced by Toshiba in 1989. These memories are accessed much like block devices, such as hard disks. Each block consists of a number of pages. The pages are typically 512 or 2,048 or 4,096 bytes in size. Associated with each page are a few bytes


title: "Flash memory" content: (typically 1/32 of the data size) that can be used for storage of an error correcting code (ECC) checksum. Typical block sizes include: While reading and programming is performed on a page basis, erasure can only be performed on a block basis. NAND devices also require bad block management by the device driver software, or by a separate controller chip. SD cards, for example, include controller circuitry to perform bad block management and wear leveling. When a logical block is accessed by high-level software, it is mapped to a physical block by the device driver or controller. A number of


title: "Flash memory" content: blocks on the flash chip may be set aside for storing mapping tables to deal with bad blocks, or the system may simply check each block at power-up to create a bad block map in RAM. The overall memory capacity gradually shrinks as more blocks are marked as bad. NAND relies on ECC to compensate for bits that may spontaneously fail during normal device operation. A typical ECC will correct a one-bit error in each 2048 bits (256 bytes) using 22 bits of ECC, or a one-bit error in each 4096 bits (512 bytes) using 24 bits of ECC. If


title: "Flash memory" content: the ECC cannot correct the error during read, it may still detect the error. When doing erase or program operations, the device can detect blocks that fail to program or erase and mark them bad. The data is then written to a different, good block, and the bad block map is updated. Hamming codes are the most commonly used ECC for SLC NAND flash. Reed-Solomon codes and Bose-Chaudhuri-Hocquenghem codes are commonly used ECC for MLC NAND flash. Some MLC NAND flash chips internally generate the appropriate BCH error correction codes. Most NAND devices are shipped from the factory with some


title: "Flash memory" content: bad blocks. These are typically marked according to a specified bad block marking strategy. By allowing some bad blocks, the manufacturers achieve far higher yields than would be possible if all blocks had to be verified good. This significantly reduces NAND flash costs and only slightly decreases the storage capacity of the parts. When executing software from NAND memories, virtual memory strategies are often used: memory contents must first be paged or copied into memory-mapped RAM and executed there (leading to the common combination of NAND + RAM). A memory management unit (MMU) in the system is helpful, but this


title: "Flash memory" content: can also be accomplished with overlays. For this reason, some systems will use a combination of NOR and NAND memories, where a smaller NOR memory is used as software ROM and a larger NAND memory is partitioned with a file system for use as a non-volatile data storage area. NAND sacrifices the random-access and execute-in-place advantages of NOR. NAND is best suited to systems requiring high capacity data storage. It offers higher densities, larger capacities, and lower cost. It has faster erases, sequential writes, and sequential reads. A group called the Open NAND Flash Interface Working Group (ONFI) has developed


title: "Flash memory" content: a standardized low-level interface for NAND flash chips. This allows interoperability between conforming NAND devices from different vendors. The ONFI specification version 1.0 was released on 28 December 2006. It specifies: The ONFI group is supported by major NAND flash manufacturers, including Hynix, Intel, Micron Technology, and Numonyx, as well as by major manufacturers of devices incorporating NAND flash chips. Two major flash device manufacturers, Toshiba and Samsung, have chosen to use an interface of their own design known as Toggle Mode (and now Toggle V2.0). This interface isn't pin-to-pin compatible with the ONFI specification. The result is a product


title: "Flash memory" content: designed for one vendor's devices may not be able to use another vendor's devices. A group of vendors, including Intel, Dell, and Microsoft, formed a Non-Volatile Memory Host Controller Interface (NVMHCI) Working Group. The goal of the group is to provide standard software and hardware programming interfaces for nonvolatile memory subsystems, including the "flash cache" device connected to the PCI Express bus. NOR and NAND flash differ in two important ways: These two are linked by the design choices made in the development of NAND flash. A goal of NAND flash development was to reduce the chip area required to


title: "Flash memory" content: implement a given capacity of flash memory, and thereby to reduce cost per bit and increase maximum chip capacity so that flash memory could compete with magnetic storage devices like hard disks. NOR and NAND flash get their names from the structure of the interconnections between memory cells. In NOR flash, cells are connected in parallel to the bit lines, allowing cells to be read and programmed individually. The parallel connection of cells resembles the parallel connection of transistors in a CMOS NOR gate. In NAND flash, cells are connected in series, resembling a CMOS NAND gate. The series connections


title: "Flash memory" content: consume less space than parallel ones, reducing the cost of NAND flash. It does not, by itself, prevent NAND cells from being read and programmed individually. Each NOR flash cell is larger than a NAND flash cell 10 F vs 4 F even when using exactly the same semiconductor device fabrication and so each transistor, contact, etc. is exactly the same size because NOR flash cells require a separate metal contact for each cell. When NOR flash was developed, it was envisioned as a more economical and conveniently rewritable ROM than contemporary EPROM and EEPROM memories. Thus random-access reading circuitry


title: "Flash memory" content: was necessary. However, it was expected that NOR flash ROM would be read much more often than written, so the write circuitry included was fairly slow and could erase only in a block-wise fashion. On the other hand, applications that use flash as a replacement for disk drives do not require word-level write address, which would only add to the complexity and cost unnecessarily. Because of the series connection and removal of wordline contacts, a large grid of NAND flash memory cells will occupy perhaps only 60% of the area of equivalent NOR cells (assuming the same CMOS process resolution,


title: "Flash memory" content: for example, 130 nm, 90 nm, or 65 nm). NAND flash's designers realized that the area of a NAND chip, and thus the cost, could be further reduced by removing the external address and data bus circuitry. Instead, external devices could communicate with NAND flash via sequential-accessed command and data registers, which would internally retrieve and output the necessary data. This design choice made random-access of NAND flash memory impossible, but the goal of NAND flash was to replace mechanical hard disks, not to replace ROMs. The write endurance of SLC floating-gate NOR flash is typically equal to or greater


title: "Flash memory" content: than that of NAND flash, while MLC NOR and NAND flash have similar endurance capabilities. Examples of endurance cycle ratings listed in datasheets for NAND and NOR flash, as well as in storage devices using flash memory, are provided. However, by applying certain algorithms and design paradigms such as wear leveling and memory over-provisioning, the endurance of a storage system can be tuned to serve specific requirements. In order to compute the longevity of the NAND flash, one must account for the size of the memory chip, the type of memory (e.g. SLC/MLC/TLC), and use pattern. Because of the particular


title: "Flash memory" content: characteristics of flash memory, it is best used with either a controller to perform wear leveling and error correction or specifically designed flash file systems, which spread writes over the media and deal with the long erase times of NOR flash blocks. The basic concept behind flash file systems is the following: when the flash store is to be updated, the file system will write a new copy of the changed data to a fresh block, remap the file pointers, then erase the old block later when it has time. In practice, flash file systems are used only for memory


title: "Flash memory" content: technology devices (MTDs), which are embedded flash memories that do not have a controller. Removable flash memory cards and USB flash drives have built-in controllers to perform wear leveling and error correction so use of a specific flash file system does not add any benefit. Multiple chips are often arrayed to achieve higher capacities for use in consumer electronic devices such as multimedia players or GPSs. The capacity of flash chips generally follows Moore's Law because they are manufactured with many of the same integrated circuits techniques and equipment. Consumer flash storage devices typically are advertised with usable sizes expressed


title: "Flash memory" content: as a small integer power of two (2, 4, 8, etc.) and a designation of megabytes (MB) or gigabytes (GB); e.g., 512 MB, 8 GB. This includes SSDs marketed as hard drive replacements, in accordance with traditional hard drives, which use decimal prefixes. Thus, an SSD marked as “64 GB” is at least bytes (64 GB). Most users will have slightly less capacity than this available for their files, due to the space taken by file system metadata. The flash memory chips inside them are sized in strict binary multiples, but the actual total capacity of the chips is not


title: "Flash memory" content: usable at the drive interface. It is considerably larger than the advertised capacity in order to allow for distribution of writes (wear leveling), for sparing, for error correction codes, and for other metadata needed by the device's internal firmware. In 2005, Toshiba and SanDisk developed a NAND flash chip capable of storing 1 GB of data using multi-level cell (MLC) technology, capable of storing two bits of data per cell. In September 2005, Samsung Electronics announced that it had developed the world’s first 2 GB chip. In March 2006, Samsung announced flash hard drives with a capacity of 4 GB,


title: "Flash memory" content: essentially the same order of magnitude as smaller laptop hard drives, and in September 2006, Samsung announced an 8 GB chip produced using a 40 nm manufacturing process. In January 2008, SanDisk announced availability of their 16 GB MicroSDHC and 32 GB SDHC Plus cards. More recent flash drives (as of 2012) have much greater capacities, holding 64, 128, and 256 GB. A joint development at Intel and Micron will allow the production of 32-layer 3.5 terabyte (TB) NAND flash sticks and 10 TB standard-sized SSDs. The device includes 5 packages of 16 × 48 GB TLC dies, using a


title: "Flash memory" content: floating gate cell design. Flash chips continue to be manufactured with capacities under or around 1 MB, e.g., for BIOS-ROMs and embedded applications. In July 2016, Samsung announced the 4TB Samsung 850 EVO which utilizes their 256 Gb 48-layer TLC 3D V-NAND. In August 2016, Samsung announced a 32 TB 2.5-inch SAS SSD based on their 512 Gb 64-layer TLC 3D V-NAND. Further, Samsung expects to unveil SSDs with up to 100 TB of storage by 2020. Flash memory devices are typically much faster at reading than writing. Performance also depends on the quality of storage controllers which become more


title: "Flash memory" content: critical when devices are partially full. Even when the only change to manufacturing is die-shrink, the absence of an appropriate controller can result in degraded speeds. Serial flash is a small, low-power flash memory that provides only serial access to the data - rather than addressing individual bytes, the user reads or writes large contiguous groups of bytes in the address space serially. Serial Peripheral Interface Bus (SPI) is a typical protocol for accessing the device. When incorporated into an embedded system, serial flash requires fewer wires on the PCB than parallel flash memories, since it transmits and receives data


title: "Flash memory" content: one bit at a time. This may permit a reduction in board space, power consumption, and total system cost. There are several reasons why a serial device, with fewer external pins than a parallel device, can significantly reduce overall cost: There are two major SPI flash types. The first type is characterized by small pages and one or more internal SRAM page buffers allowing a complete page to be read to the buffer, partially modified, and then written back (for example, the Atmel AT45 "DataFlash" or the Micron Technology Page Erase NOR Flash). The second type has larger sectors. The


title: "Flash memory" content: smallest sectors typically found in an SPI flash are 4 kB, but they can be as large as 64 kB. Since the SPI flash lacks an internal SRAM buffer, the complete page must be read out and modified before being written back, making it slow to manage. "SPI flash" is cheaper than "DataFlash" and is therefore a good choice when the application is code shadowing. The two types are not easily exchangeable, since they do not have the same pinout, and the command sets are incompatible. Most FPGAs are based on SRAM configuration cells and require an external configuration device,


title: "Flash memory" content: often a serial flash chip, to reload the configuration bitstream every power cycle. With the increasing speed of modern CPUs, parallel flash devices are often much slower than the memory bus of the computer they are connected to. Conversely, modern SRAM offers access times below 10 ns, while DDR2 SDRAM offers access times below 20 ns. Because of this, it is often desirable to shadow code stored in flash into RAM; that is, the code is copied from flash into RAM before execution, so that the CPU may access it at full speed. Device firmware may be stored in a


title: "Flash memory" content: serial flash device, and then copied into SDRAM or SRAM when the device is powered-up. Using an external serial flash device rather than on-chip flash removes the need for significant process compromise (a process that is good for high-speed logic is generally not good for flash and vice versa). Once it is decided to read the firmware in as one big block it is common to add compression to allow a smaller flash chip to be used. Typical applications for serial flash include storing firmware for hard drives, Ethernet controllers, DSL modems, wireless network devices, etc. One more recent application


title: "Flash memory" content: for flash memory is as a replacement for hard disks. Flash memory does not have the mechanical limitations and latencies of hard drives, so a solid-state drive (SSD) is attractive when considering speed, noise, power consumption, and reliability. Flash drives are gaining traction as mobile device secondary storage devices; they are also used as substitutes for hard drives in high-performance desktop computers and some servers with RAID and SAN architectures. There remain some aspects of flash-based SSDs that make them unattractive. The cost per gigabyte of flash memory remains significantly higher than that of hard disks. Also flash memory has


title: "Flash memory" content: a finite number of P/E cycles, but this seems to be currently under control since warranties on flash-based SSDs are approaching those of current hard drives. In addition, deleted files on SSDs can remain for an indefinite period of time before being overwritten by fresh data; erasure or shred techniques or software that work well on magnetic hard disk drives have no effect on SSDs, compromising security and forensic examination. For relational databases or other systems that require ACID transactions, even a modest amount of flash storage can offer vast speedups over arrays of disk drives. In May 2006, Samsung


title: "Flash memory" content: Electronics announced two flash-memory based PCs, the Q1-SSD and Q30-SSD were expected to become available in June 2006, both of which used 32 GB SSDs, and were at least initially available only in South Korea. The Q1-SSD and Q30-SSD launch was delayed and finally shipped in late August 2006. The first flash-memory based PC to become available was the Sony Vaio UX90, announced for pre-order on 27 June 2006 and began shipping in Japan on 3 July 2006 with a 16Gb flash memory hard drive. In late September 2006 Sony upgraded the flash-memory in the Vaio UX90 to 32Gb. A


title: "Flash memory" content: solid-state drive was offered as an option with the first MacBook Air introduced in 2008, and from 2010 onwards, all models shipped with an SSD. Starting in late 2011, as part of Intel's Ultrabook initiative, an increasing number of ultra-thin laptops are being shipped with SSDs standard. There are also hybrid techniques such as hybrid drive and ReadyBoost that attempt to combine the advantages of both technologies, using flash as a high-speed non-volatile cache for files on the disk that are often referenced, but rarely modified, such as application and operating system executable files. As of 2012, there are attempts


title: "Flash memory" content: to use flash memory as the main computer memory, DRAM. It is unclear how long flash memory will persist under archival conditions i.e., benign temperature and humidity with infrequent access with or without prophylactic rewrite. Anecdotal evidence suggests that the technology is reasonably robust on the scale of years. Datasheets of Atmel's flash-based "ATmega" microcontrollers typically promise retention times of 20 years at 85 °C (185 °F) and 100 years at 25 °C (77 °F). An article from CMU in 2015 writes that "Today's flash devices, which do not require flash refresh, have a typical retention age of 1 year


title: "Flash memory" content: at room temperature." And that temperature can lower the retention time exponentially. The phenomenon can be modeled by Arrhenius law. Some FPGAs are based on flash configuration cells that are used directly as (programmable) switches to connect internal elements together, using the same kind of floating-gate transistor as the flash data storage cells in data storage devices. One source states that, in 2008, the flash memory industry includes about US$9.1 billion in production and sales. Other sources put the flash memory market at a size of more than US$20 billion in 2006, accounting for more than eight percent of the


title: "Flash memory" content: overall semiconductor market and more than 34 percent of the total semiconductor memory market. In 2012, the market was estimated at $26.8 billion. Due to its relatively simple structure and high demand for higher capacity, NAND flash memory is the most aggressively scaled technology among electronic devices. The heavy competition among the top few manufacturers only adds to the aggressiveness in shrinking the design rule or process technology node. While the expected shrink timeline is a factor of two every three years per original version of Moore's law, this has recently been accelerated in the case of NAND flash to


title: "Flash memory" content: a factor of two every two years. As the feature size of flash memory cells reaches the 15-16 nm minimum limit, further flash density increases will be driven by TLC (3 bits/cell) combined with vertical stacking of NAND memory planes. The decrease in endurance and increase in uncorrectable bit error rates that accompany feature size shrinking can be compensated by improved error correction mechanisms. Even with these advances, it may be impossible to economically scale flash to smaller and smaller dimensions as the number of electron holding capacity reduces. Many promising new technologies (such as FeRAM, MRAM, PMC, PCM, ReRAM,


title: "Flash memory" content: and others) are under investigation and development as possible more scalable replacements for flash. Flash memory Flash memory is an electronic (solid-state) non-volatile computer storage medium that can be electrically erased and reprogrammed. Toshiba developed flash memory from EEPROM (electrically erasable programmable read-only memory) in the early 1980s and introduced it to the market in 1984. The two main types of flash memory are named after the NAND and NOR logic gates. The individual flash memory cells exhibit internal characteristics similar to those of the corresponding gates. While EPROMs had to be completely erased before being rewritten, NAND-type flash memory


title: "Cystic fibrosis" content: produce proteins that do not use energy (in the form of ATP) normally, do not allow chloride, iodide, and thiocyanate to cross the membrane appropriately, and degrade at a faster rate than normal. Mutations may also lead to fewer copies of the CFTR protein being produced. The protein created by this gene is anchored to the outer membrane of cells in the sweat glands, lungs, pancreas, and all other remaining exocrine glands in the body. The protein spans this membrane and acts as a channel connecting the inner part of the cell (cytoplasm) to the surrounding fluid. This channel is


title: "Sequoiadendron giganteum" content: Sequoiadendron giganteum Sequoiadendron giganteum (giant sequoia; also known as giant redwood, Sierra redwood, Sierran redwood, Wellingtonia or simply Big Treea nickname used by John Muir) is the sole living species in the genus "Sequoiadendron", and one of three species of coniferous trees known as redwoods, classified in the family Cupressaceae in the subfamily Sequoioideae, together with "Sequoia sempervirens" (coast redwood) and "Metasequoia glyptostroboides" (dawn redwood). Giant sequoia specimens are the most massive trees on Earth. The common use of the name "sequoia" generally refers to "Sequoiadendron giganteum", which occurs naturally only in groves on the western slopes of the Sierra


title: "Sequoiadendron giganteum" content: Nevada Mountains of California. The etymology of the genus name has been presumedinitially in "The Yosemite Book" by Josiah Whitney in 1868to be in honor of Sequoyah (1767–1843), who was the inventor of the Cherokee syllabary. An etymological study published in 2012, however, concluded that the name was more likely to have originated from the Latin "sequi" (meaning "to follow") since the number of seeds per cone in the newly-classified genus fell in mathematical sequence with the other four genera in the suborder. Giant sequoia specimens are the most massive individual trees in the world. They grow to an average


title: "Sequoiadendron giganteum" content: height of with trunk diameters ranging from . Record trees have been measured at tall. Trunk diameters of have been claimed via research figures taken out of context. The specimen known to have the greatest diameter at breast height is the General Grant tree at . Between 2014 and 2016, specimens of coast redwood were found to have greater trunk diameters than all known giant sequoias. The trunks of coast redwoods taper at lower heights than those of giant sequoias which have more columnar trunks that maintain larger diameters to greater heights. The oldest known giant sequoia is 3,500 years


title: "Sequoiadendron giganteum" content: old based on dendrochronology. Giant sequoias are among the oldest living organisms on Earth. Giant sequoia bark is fibrous, furrowed, and may be thick at the base of the columnar trunk. The bark provides significant protection from fire damage. The leaves are evergreen, awl-shaped, long, and arranged spirally on the shoots. The giant sequoia regenerates by seed. The seed cones are long and mature in 18–20 months, though they typically remain green and closed for as long as 20 years. Each cone has 30–50 spirally arranged scales, with several seeds on each scale, giving an average of 230 seeds per


title: "Sequoiadendron giganteum" content: cone. Seeds are dark brown, long, and broad, with a wide, yellow-brown wing along each side. Some seeds shed when the cone scales shrink during hot weather in late summer, but most are liberated by insect damage or when the cone dries from the heat of fire. Young trees start to bear cones after 12 years. Trees may produce sprouts from their stumps subsequent to injury, until about 20 years old; however, shoots do not form on the stumps of mature trees as they do on coast redwoods. Giant sequoias of all ages may sprout from their boles when branches


title: "Sequoiadendron giganteum" content: are lost to fire or breakage. A large tree may have as many as 11,000 cones. Cone production is greatest in the upper portion of the canopy. A mature giant sequoia disperses an estimated 300–400 thousand seeds annually. The winged seeds may fly as far as from the parent tree. Lower branches die readily from being shaded, but trees younger than 100 years retain most of their dead branches. Trunks of mature trees in groves are generally free of branches to a height of , but solitary trees retain lower branches. Because of its size, the tree has been studied


title: "Sequoiadendron giganteum" content: for its water pull. Water from the roots can be pushed up only a few meters by osmotic pressure but can reach extreme heights by using a system of branching capillarity (capillary action) in the tree's xylem (the water tubules) and sub-pressure from evaporating water at the leaves. Sequoias supplement water from the soil with fog, taken up through air roots, at heights to where the root water cannot be pulled. The natural distribution of giant sequoias is restricted to a limited area of the western Sierra Nevada, California. They occur in scattered groves, with a total of 68 groves


title: "Sequoiadendron giganteum" content: (see list of sequoia groves for a full inventory), comprising a total area of only . Nowhere does it grow in pure stands, although in a few small areas, stands do approach a pure condition. The northern two-thirds of its range, from the American River in Placer County southward to the Kings River, has only eight disjunct groves. The remaining southern groves are concentrated between the Kings River and the Deer Creek Grove in southern Tulare County. Groves range in size from with 20,000 mature trees, to small groves with only six living trees. Many are protected in Sequoia and


title: "Sequoiadendron giganteum" content: Kings Canyon National Parks and Giant Sequoia National Monument. The giant sequoia is usually found in a humid climate characterized by dry summers and snowy winters. Most giant sequoia groves are on granitic-based residual and alluvial soils. The elevation of the giant sequoia groves generally ranges from in the north, to to the south. Giant sequoias generally occur on the south-facing sides of northern mountains, and on the northern faces of more southerly slopes. High levels of reproduction are not necessary to maintain the present population levels. Few groves, however, have sufficient young trees to maintain the present density of


title: "Sequoiadendron giganteum" content: mature giant sequoias for the future. The majority of giant sequoias are currently undergoing a gradual decline in density since European settlement. While the present day distribution of this species is limited to a small area of California, it was once much more widely distributed in prehistoric times, and was a reasonably common species in North American and Eurasian coniferous forests until its range was greatly reduced by the last ice age. Older fossil specimens reliably identified as giant sequoia have been found in Cretaceous era sediments from a number of sites in North America and Europe, and even as


title: "Sequoiadendron giganteum" content: far afield as New Zealand and Australia. A group of sequoias was planted and is naturally propagating on Mount San Jacinto in Riverside County, southern California. The trees were planted by the United States Forest Service after a 1974 wildfire. Giant sequoias are in many ways adapted to forest fires. Their bark is unusually fire resistant, and their cones will normally open immediately after a fire. The giant sequoias are having difficulty reproducing in their original habitat (and very rarely reproduce in cultivation) due to the seeds only being able to grow successfully in full sun and in mineral-rich soils,


title: "Sequoiadendron giganteum" content: free from competing vegetation. Although the seeds can germinate in moist needle humus in the spring, these seedlings will die as the duff dries in the summer. They therefore require periodic wildfire to clear competing vegetation and soil humus before successful regeneration can occur. Without fire, shade-loving species will crowd out young sequoia seedlings, and sequoia seeds will not germinate. When fully grown, these trees typically require large amounts of water and are therefore often concentrated near streams. Fires also bring hot air high into the canopy via convection, which in turn dries and opens the cones. The subsequent release


title: "Sequoiadendron giganteum" content: of large quantities of seeds coincides with the optimal postfire seedbed conditions. Loose ground ash may also act as a cover to protect the fallen seeds from ultraviolet radiation damage. Due to fire suppression efforts and livestock grazing during the early and mid 20th century, low-intensity fires no longer occurred naturally in many groves, and still do not occur in some groves today. The suppression of fires leads to ground fuel build-up and the dense growth of fire-sensitive white fir, which increases the risk of more intense fires that can use the firs as ladders to threaten mature giant sequoia


title: "Sequoiadendron giganteum" content: crowns. Natural fires may also be important in keeping carpenter ants in check. In 1970, the National Park Service began controlled burns of its groves to correct these problems. Current policies also allow natural fires to burn. One of these untamed burns severely damaged the second-largest tree in the world, the Washington tree, in September 2003, 45 days after the fire started. This damage made it unable to withstand the snowstorm of January 2005, leading to the collapse of over half the trunk. In addition to fire, two animal agents also assist giant sequoia seed release. The more significant of


title: "Sequoiadendron giganteum" content: the two is a longhorn beetle ("Phymatodes nitidus") that lays eggs on the cones, into which the larvae then bore holes. Reduction of the vascular water supply to the cone scales allows the cones to dry and open for the seeds to fall. Cones damaged by the beetles during the summer will slowly open over the next several months. Some research indicates many cones, particularly higher in the crowns, may need to be partially dried by beetle damage before fire can fully open them. The other agent is the Douglas squirrel ("Tamiasciurus douglasi") that gnaws on the fleshy green scales


title: "Sequoiadendron giganteum" content: of younger cones. The squirrels are active year round, and some seeds are dislodged and dropped as the cone is eaten. The giant sequoia was well known to Native American tribes living in its area. Native American names for the species include "wawona", "toos-pung-ish" and "hea-mi-withic", the latter two in the language of the Tule River Tribe. The first reference to the giant sequoia by Europeans is in 1833, in the diary of the explorer J. K. Leonard; the reference does not mention any locality, but his route would have taken him through the Calaveras Grove. This discovery was not


title: "Sequoiadendron giganteum" content: publicized. The next European to see the species was John M. Wooster, who carved his initials in the bark of the 'Hercules' tree in the Calaveras Grove in 1850; again, this received no publicity. Much more publicity was given to the "discovery" by Augustus T. Dowd of the Calaveras Grove in 1852, and this is commonly cited as the species' discovery. The tree found by Dowd, christened the 'Discovery Tree', was felled in 1853. The first scientific naming of the species was by John Lindley in December 1853, who named it "Wellingtonia gigantea", without realizing this was an invalid name


title: "Sequoiadendron giganteum" content: under the botanical code as the name "Wellingtonia" had already been used earlier for another unrelated plant ("Wellingtonia arnottiana" in the family Sabiaceae). The name "Wellingtonia" has persisted in England as a common name. The following year, Joseph Decaisne transferred it to the same genus as the coast redwood, naming it "Sequoia gigantea", but again this name was invalid, having been applied earlier (in 1847, by Endlicher) to the coast redwood. The name "Washingtonia californica" was also applied to it by Winslow in 1854, though this too is invalid, belonging to the palm genus "Washingtonia". In 1907, it was placed


title: "Sequoiadendron giganteum" content: by Carl Ernst Otto Kuntze in the otherwise fossil genus "Steinhauera", but doubt as to whether the giant sequoia is related to the fossil originally so named makes this name invalid. The nomenclatural oversights were finally corrected in 1939 by J. Buchholz, who also pointed out the giant sequoia is distinct from the coast redwood at the genus level and coined the name "Sequoiadendron giganteum" for it. The etymology of the genus name has been presumedinitially in "The Yosemite Book" by Josiah Whitney in 1868to be in honor of Sequoyah (1767–1843), who was the inventor of the Cherokee syllabary. An


title: "Sequoiadendron giganteum" content: etymological study published in 2012, however, concluded that the name was more likely to have originated from the Latin "sequi" (meaning "to follow") since the number of seeds per cone in the newly-classified genus fell in mathematical sequence with the other four genera in the suborder. John Muir wrote of the species in about 1870: "Do behold the King in his glory, King Sequoia! Behold! Behold! seems all I can say. Some time ago I left all for Sequoia and have been and am at his feet, fasting and praying for light, for is he not the greatest light in


title: "Sequoiadendron giganteum" content: the woods, in the world? Where are such columns of sunshine, tangible, accessible, terrestrialized?' Wood from mature giant sequoias is highly resistant to decay, but due to being fibrous and brittle, it is generally unsuitable for construction. From the 1880s through the 1920s, logging took place in many groves in spite of marginal commercial returns. The Hume-Bennett Lumber Company was the last to harvest giant sequoia, going out of business in 1924. Due to their weight and brittleness, trees would often shatter when they hit the ground, wasting much of the wood. Loggers attempted to cushion the impact by digging


title: "Sequoiadendron giganteum" content: trenches and filling them with branches. Still, as little as 50% of the timber is estimated to have made it from groves to the mill. The wood was used mainly for shingles and fence posts, or even for matchsticks. Pictures of the once majestic trees broken and abandoned in formerly pristine groves, and the thought of the giants put to such modest use, spurred the public outcry that caused most of the groves to be preserved as protected land. The public can visit an example of 1880s clear-cutting at Big Stump Grove near General Grant Grove. As late as the


title: "Sequoiadendron giganteum" content: 1980s, some immature trees were logged in Sequoia National Forest, publicity of which helped lead to the creation of Giant Sequoia National Monument. The wood from immature trees is less brittle, with recent tests on young plantation-grown trees showing it similar to coast redwood wood in quality. This is resulting in some interest in cultivating giant sequoia as a very high-yielding timber crop tree, both in California and also in parts of western Europe, where it may grow more efficiently than coast redwoods. In the northwest United States, some entrepreneurs have also begun growing giant sequoias for Christmas trees. Besides


title: "Sequoiadendron giganteum" content: these attempts at tree farming, the principal economic uses for giant sequoia today are tourism and horticulture. Giant sequoia is a very popular ornamental tree in many areas. It is successfully grown in most of western and southern Europe, the Pacific Northwest of North America north to southwest British Columbia, the southern United States, southeast Australia, New Zealand and central-southern Chile. It is also grown, though less successfully, in parts of eastern North America. Trees can withstand temperatures of −31 °C (−25 °F) or colder for short periods of time, provided the ground around the roots is insulated with either


title: "Sequoiadendron giganteum" content: heavy snow or mulch. Outside its natural range, the foliage can suffer from damaging windburn. A wide range of horticultural varieties have been selected, especially in Europe, including blue, compact blue, powder blue, hazel smith, pendulumor weepingvarieties, and grafted cultivars. The tallest giant sequoia ever measured outside of the United States is a specimen planted near Ribeauvillé in France in 1856 and measured in 2014 at a height between and at age 158 years. The giant sequoia was first brought into cultivation in Britain in 1853 by the horticulturist Patrick Matthew of Perthshire from seeds sent by his botanist son


title: "Sequoiadendron giganteum" content: John in California. A much larger shipment of seed collected from the Calaveras Grove by William Lobb, acting for the Veitch Nursery near Exeter, arrived in England in December 1853; seed from this batch was widely distributed throughout Europe. Growth in Britain is very fast, with the tallest tree, at Benmore in southwest Scotland, reaching in 2014 at age 150 years, and several others from tall; the stoutest is around in girth and in diameter, in Perthshire. The Royal Botanic Gardens at Kew in London also contains a large specimen. Biddulph Grange Garden in Staffordshire holds a fine collection of


title: "Sequoiadendron giganteum" content: both "Sequoiadendron giganteum" and also "Sequoia sempervirens" (Coast Redwood). The General Sherman of California has a volume of ; by way of comparison, the largest giant sequoias in Great Britain have volumes no greater than , one example being the specimen in the New Forest. "Sequoiadendron giganteum" has gained the Royal Horticultural Society’s Award of Garden Merit. Numerous giant sequoia were planted in Italy from 1860 through 1905. Several regions contain specimens that range from in height. The largest tree is in Roccavione, in the Piedmont, with a basal circumference of . One notable tree survived a tall flood wave


title: "Sequoiadendron giganteum" content: in 1963 that was caused by a landslide at Vajont Dam. There are numerous giant sequoia in parks and reserves. Growth rates in some areas of Europe are remarkable. One young tree in Italy reached tall and trunk diameter in 17 years (Mitchell, 1972). Growth further northeast in Europe is limited by winter cold. In Denmark, where extreme winters can reach , the largest tree was tall and diameter in 1976 and is bigger today. One in Poland has purportedly survived temperatures down to with heavy snow cover. Two members of the German Dendrology Society, E. J. Martin and Illa


title: "Sequoiadendron giganteum" content: Martin, introduced the giant sequoia into German forestry at the Sequoiafarm Kaldenkirchen in 1952. Twenty-nine giant sequoias, measuring around in height, grow in Belgrade's municipality of Lazarevac in Serbia. The oldest "sequoiadendron" in the Czech Republic, at , grows in Ratměřice u Votic castle garden. Giant sequoias are grown successfully in the Pacific Northwest and southern US, and less successfully in eastern North America. Giant sequoia cultivation is very successful in the Pacific Northwest from western Oregon north to southwest British Columbia, with fast growth rates. In Washington and Oregon, it is common to find giant sequoias that have been


title: "Sequoiadendron giganteum" content: successfully planted in both urban and rural areas. In the Seattle area, large specimens exceeding are fairly common and exist in several city parks and many private yards (especially east Seattle including Capitol Hill, Washington Park, & Leschi/Madrona, as well as Tacoma's Jefferson Park). In the northeastern US there has been some limited success in growing the species, but growth is much slower there, and it is prone to "Cercospora" and "Kabatina" fungal diseases due to the hot, humid summer climate there. A tree at Blithewold Gardens, in Bristol, Rhode Island is reported to be tall, reportedly the tallest in


title: "Sequoiadendron giganteum" content: the New England states. The tree at the Tyler Arboretum in Delaware County, Pennsylvania at may be the tallest in the northeast. Specimens also grow in the Arnold Arboretum in Boston, Massachusetts (planted 1972, 18 m tall in 1998), at Longwood Gardens near Wilmington, Delaware, in the New Jersey State Botanical Garden at Skylands in Ringwood State Park, Ringwood, New Jersey, and in the Finger Lakes region of New York. Private plantings of giant sequoias around the Middle Atlantic States are not uncommon, and other publicly accessible specimens can be visited at the U.S. National Arboretum in Washington, D.C. A


title: "Sequoiadendron giganteum" content: few trees have been established in Colorado as well. Additionally, numerous sequoias have been planted with success in the state of Michigan. A cold-tolerant cultivar 'Hazel Smith' selected in about 1960 is proving more successful in the northeastern US. This clone was the sole survivor of several hundred seedlings grown at a nursery in New Jersey. The U.S. National Arboretum has a specimen grown from a cutting in 1970 that can be seen in the Gotelli Conifer Collection. The Ballarat Botanical Gardens contain a significant collection, many of them about 150 years old. Jubilee Park and the Hepburn Mineral Springs


title: "Sequoiadendron giganteum" content: Reserve in Daylesford, Cook Park in Orange, New South Wales and Carisbrook's Deep Creek park in Victoria both have specimens. Jamieson Township in the Victorian high country has 2 specimens which were planted in the early 1860s. In Tasmania specimens are to be seen in private and public gardens, as they were popular in the mid Victorian era. The Westbury Village Green has mature specimens with more in Deloraine. The Tasmanian Arboretum contains young wild collected material. The National Arboretum Canberra has begun a grove. They also grow in the abandoned arboretum at Mount Banda Banda in New South Wales.


title: "Sequoiadendron giganteum" content: Several impressive specimens of "Sequoiadendron giganteum" can be found in the South Island of New Zealand. Notable examples include a set of trees in a public park of Picton, as well as robust specimens in the public and botanical parks of Christchurch and Queenstown. There are also several in private gardens in Wanaka. There is also a tree at Rangiora High School, which was planted for Queen Victoria's Golden Jubilee and is thus over 125 years old. Some sequoias, such as the Mother of the Forest, were undoubtedly far larger than any living tree today. However, as of 2009, the


title: "Sequoiadendron giganteum" content: top ten largest giant sequoias sorted by volume of their trunks are: Sequoiadendron giganteum Sequoiadendron giganteum (giant sequoia; also known as giant redwood, Sierra redwood, Sierran redwood, Wellingtonia or simply Big Treea nickname used by John Muir) is the sole living species in the genus "Sequoiadendron", and one of three species of coniferous trees known as redwoods, classified in the family Cupressaceae in the subfamily Sequoioideae, together with "Sequoia sempervirens" (coast redwood) and "Metasequoia glyptostroboides" (dawn redwood). Giant sequoia specimens are the most massive trees on Earth. The common use of the name "sequoia" generally refers to "Sequoiadendron giganteum", which


title: "Texas Longhorn" content: Texas Longhorn The Texas Longhorn is a breed of cattle known for its characteristic horns, which can extend to over tip to tip for bulls, and up to tip to tip for steers and exceptional cows. The longhorn with the longest recorded horn total horn length marks in at 129.5 in and belongs to longhorn M Arrow Cha-Ching. This longhorn is owned by Richard Flip who lives near Fayetteville, Texas. The second longest on record is 3S Danica of Tallgrass Cattle Company, who measured at 100 in tip to tip on September 13, 2018. They are descendants of the first


title: "Texas Longhorn" content: cattle in the New World, brought by Christopher Columbus and the Spanish colonists, and have a high drought-stress tolerance. Texas Longhorns are known for their diverse coloring, and can be any color or mix of colors, but dark red and white color mixes are the most dominant. Registries for the breed include the Texas Longhorn Breeders Association of America, founded in 1964 by the Kerr County rancher Charles Schreiner, III; the International Texas Longhorn Association, and the Cattlemen's Texas Longhorn Registry. The online National Texas Longhorn Museum displays the diversity of horns found in the breed, stories about notable individual


title: "Texas Longhorn" content: cattle of the breed, as well as a gallery of furniture made out of horns from the animal. Due to their innate gentle disposition and intelligence, Texas Longhorns are increasingly being trained for steer riding. Genetic analyses show that the Texas Longhorn originated from an Iberian hybrid of two ancient cattle lineages: "taurine", descending from the domestication of the wild aurochs in the Middle East, and "indicine", descending from the domestication of the aurochs in India, 85% and 15% respectively by proportion. The Texas Longhorns are direct descendants of the first cattle in the New World. The ancestral cattle were


title: "Texas Longhorn" content: first brought over by Christopher Columbus in 1493 to the Caribbean island of Hispaniola. Between 1493 and 1512, Spanish colonists brought additional cattle in subsequent expeditions. The cattle consisted of three different breeds; "Barrenda", "Retinto" and "Grande Pieto". Over the next two centuries the Spanish moved the cattle north, arriving in the area that would become Texas near the end of the 17th century. The cattle escaped or were turned loose on the open range, where they remained mostly feral for the next two centuries. Over several generations, descendants of these cattle evolved high feed- and drought-stress tolerance and other


title: "Texas Longhorn" content: "hardy" characteristics that have gained Longhorns reputation. Early US settlers in Texas obtained feral Mexican cattle from the borderland between the Nueces River and the Rio Grande and mixed them with their own eastern cattle. The result was a tough, rangy animal with long legs and long horns extending up to seven feet. Although this interbreeding was of little consequence to the makeup of a Longhorn, it did alter color. The varieties of color ranged from bluish-grey, and various yellowish hues, to browns, black, ruddy and white, both cleanly bright and dirty-speckled. Portuguese cattle breeds, such as Alentejana and Mertolenga,


title: "Texas Longhorn" content: are the closest relatives of Texas Longhorns. As Texas became more heavily settled following annexation by the US, the frontier gave way to established farms and ranch lands. The leaner beef of the Texas Longhorn was not as attractive in an era where tallow was highly prized, and the breed's ability to survive on the poor vegetation of the open range was no longer as much of an issue. Other breeds demonstrated traits more highly valued by the modern rancher, such as the ability to gain weight quickly. The Texas Longhorn stock slowly dwindled, until in 1927, when the breed


title: "Texas Longhorn" content: was saved from near extinction by enthusiasts from the United States Forest Service, who collected a small herd of stock to breed on the Wichita Mountains Wildlife Refuge in Lawton, Oklahoma. The breed also received significant attention after a Texas Longhorn named "Bevo" was adopted as the mascot of The University of Texas at Austin in 1917, and an image of the animal became commonly associated with the school's sports teams, known as the Texas Longhorns. A few years later, J. Frank Dobie and others gathered small herds to keep in Texas state parks. Oilman Sid W. Richardson helped finance


title: "Texas Longhorn" content: the project. They were cared for largely as curiosities, but the stock's longevity, resistance to disease and ability to thrive on marginal pastures quickly revived the breed as beef stock and for their link to Texas history. Texas Longhorns with elite genetics can often sell for $40,000 or more at auction, with the record of $380,000 on March 18, 2017 for a cow 3S Danica and heifer calf at side during the Legacy XIII sale in Fort Worth, Texas. Commercial ranchers cross-breed Texas Longhorns with other breeds for increasing hybrid vigor and easy calving characteristics. Smaller birth weights reduce dystocia


title: "Texas Longhorn" content: for first-calf heifers. Texas Longhorn The Texas Longhorn is a breed of cattle known for its characteristic horns, which can extend to over tip to tip for bulls, and up to tip to tip for steers and exceptional cows. The longhorn with the longest recorded horn total horn length marks in at 129.5 in and belongs to longhorn M Arrow Cha-Ching. This longhorn is owned by Richard Flip who lives near Fayetteville, Texas. The second longest on record is 3S Danica of Tallgrass Cattle Company, who measured at 100 in tip to tip on September 13, 2018. They are descendants


title: "Laser printing" content: Laser printing Laser printing is an electrostatic digital printing process. It produces high-quality text and graphics (and moderate-quality photographs) by repeatedly passing a laser beam back and forth over a negatively charged cylinder called a "drum" to define a differentially charged image. The drum then selectively collects electrically charged powdered ink (toner), and transfers the image to paper, which is then heated in order to permanently fuse the text, imagery, or both. As with digital photocopiers, laser printers employ a xerographic printing process. However, laser printing differs from analog photocopiers in that the image is produced by the direct scanning


title: "Laser printing" content: of the medium across the printer's photoreceptor. This enables laser printing to copy images more quickly than most photocopiers. Invented at Xerox PARC in the 1970s, laser printers were introduced for the office and then home markets in subsequent years by IBM, Canon, Xerox, Apple, Hewlett-Packard and many others. Over the decades, quality and speed have increased as price has fallen, and the once cutting-edge printing devices are now ubiquitous. In the 1960s, the Xerox Corporation held a dominant position in the photocopier market. In 1969, Gary Starkweather, who worked in Xerox's product development department, had the idea of using


title: "Laser printing" content: a laser beam to "draw" an image of what was to be copied directly onto the copier drum. After transferring to the recently formed Palo Alto Research Center (Xerox PARC) in 1971, Starkweather adapted a Xerox 7000 copier to create SLOT (Scanned Laser Output Terminal). In 1972, Starkweather worked with Butler Lampson and Ronald Rider to add a control system and character generator, resulting in a printer called EARS (Ethernet, Alto Research character generator, Scanned laser output terminal)—which later became the Xerox 9700 laser printer. A laser beam (typically, an aluminium gallium arsenide (AlGaAs) semiconductor laser) projects an image of


title: "Laser printing" content: the page to be printed onto an electrically charged, selenium-coated, rotating, cylindrical drum (or, more commonly in subsequent versions, a drum called an organic photoconductor made of N-vinylcarbazole, an organic monomer). Photoconductivity allows the charged electrons to fall away from the areas exposed to light. Powdered ink (toner) particles are then electrostatically attracted to the charged areas of the drum that have not been laser-beamed. The drum then transfers the image onto paper (which is passed through the machine) by direct contact. Finally the paper is passed onto a finisher, which uses intense heat to instantly fuse the toner/image onto


title: "Laser printing" content: the paper. There are typically seven steps involved in the process: The document to be printed is encoded in a page description language such as PostScript, Printer Command Language (PCL), or Open XML Paper Specification (OpenXPS). The raster image processor converts the page description into a bitmap which is stored in the printer's raster memory. Each horizontal strip of dots across the page is known as a raster line or scan line. Laser printing differs from other printing technologies in that each page is always rendered in a single continuous process without any pausing in the middle, while other technologies


title: "Laser printing" content: like inkjet can pause every few lines. To avoid a buffer underrun (where the laser reaches a point on the page before it has the dots to draw there), a laser printer typically needs enough raster memory to hold the bitmap image of an entire page. Memory requirements increase with the square of the dots per inch, so 600 dpi requires a minimum of 4 megabytes for monochrome, and 16 megabytes for color (still at 600 dpi). For fully graphical output using a page description language, a minimum of 1 megabyte of memory is needed to store an entire monochrome


title: "Laser printing" content: letter/A4 sized page of dots at 300 dpi. At 300 dpi, there are 90,000 dots per square inch (300 dots per linear inch). A typical 8.5 × 11 sheet of paper has margins, reducing the printable area to , or 84 square inches. 84 sq/in × 90,000 dots per sq/in = 7,560,000 dots. 1 megabyte = 1,048,576 bytes, or 8,388,608 bits, which is just large enough to hold the entire page at 300 dpi, leaving about 100 kilobytes to spare for use by the raster image processor. In a color printer, each of the four CMYK toner layers is stored


title: "Laser printing" content: as a separate bitmap, and all four layers are typically preprocessed before printing begins, so a minimum of 4 megabytes is needed for a full-color letter-size page at 300 dpi. During the 1980s, memory chips were still very expensive, which is why entry-level laser printers in that era always came with four-digit suggested retail prices in US dollars. Memory prices later plunged, and 1200 dpi printers have been widely available in the consumer market since 2008. 2400 dpi electrophotographic printing plate makers, essentially laser printers that print on plastic sheets, are also available. In older printers, a corona wire positioned


title: "Laser printing" content: parallel to the drum or, in more recent printers, a primary charge roller, projects an electrostatic charge onto the photoreceptor (otherwise named the photo conductor unit), a revolving photosensitive drum or belt, which is capable of holding an electrostatic charge on its surface while it is in the dark. An AC bias voltage is applied to the primary charge roller to remove any residual charges left by previous images. The roller will also apply a DC bias on the drum surface to ensure a uniform negative potential. Numerous patents describe the photosensitive drum coating as a silicon sandwich with a


title: "Laser printing" content: photocharging layer, a charge leakage barrier layer, as well as a surface layer. One version uses amorphous silicon containing hydrogen as the light receiving layer, Boron nitride as a charge leakage barrier layer, as well as a surface layer of doped silicon, notably silicon with oxygen or nitrogen which at sufficient concentration resembles machining silicon nitride. A laser printer uses a laser because lasers are able to form highly focused, precise, and intense beams of light, especially over the short distances inside of a printer. The laser is aimed at a rotating polygonal mirror which directs the light beam through


title: "Laser printing" content: a system of lenses and mirrors onto the photoreceptor drum, writing pixels at rates up to sixty five million times per second. The drum continues to rotate during the sweep, and the angle of sweep is canted very slightly to compensate for this motion. The stream of rasterized data held in the printer's memory rapidly turns the laser on and off as it sweeps. The laser beam neutralizes (or reverses) the charge on the surface of the drum, leaving a static electric negative image on the drum's surface which will repel the negatively charged toner particles. The areas on the


title: "Laser printing" content: drum which were struck by the laser, however, momentarily have no charge, and the toner being pressed against the drum by the toner-coated developer roll in the next step moves from the roll's rubber surface to the charged portions of the surface of the drum. Some non-laser printers (LED printers) use an array of light-emitting diodes spanning the width of the page to generate an image, rather than using a laser. "Exposing" is also known as "writing" in some documentation. As the drums rotate, toner is continuously applied in a 15-micron-thick layer to the "developer roll". The surface of the


title: "Laser printing" content: photoreceptor with the latent image is exposed to the toner-covered developer roll. Toner consists of fine particles of dry plastic powder mixed with carbon black or coloring agents. The toner particles are given a negative charge inside the toner cartridge, and as they emerge onto the developer drum they are electrostatically attracted to the photoreceptor's latent image (the areas on the surface of the drum which had been struck by the laser). Because negative charges repel each other, the negatively charged toner particles will not adhere to the drum where the negative charge (imparted previously by the charge roller) remains.


title: "Laser printing" content: A sheet of paper is then rolled under the photoreceptor drum, which has been coated with a pattern of toner particles in the exact places where the laser struck it moments before. The toner particles have a very weak attraction to both the drum and the paper, but the bond to the drum is weaker and the particles transfer once again, this time from the drum's surface to the paper's surface. Some machines also use a positively charged "transfer roller" on the back side of the paper to help pull the negatively charged toner from the photoreceptor drum to the


title: "Laser printing" content: paper. The paper passes through rollers in the fuser assembly, where temperatures up to and pressure are used to permanently bond the toner to the paper. One roller is usually a hollow tube (heat roller) and the other is a rubber backed roller (pressure roller). A radiant heat lamp is suspended in the centre of the hollow tube, and its infrared energy uniformly heats the roller from the inside. For proper bonding of the toner, the fuser roller must be uniformly hot. Some printers use a very thin flexible metal foil roller, so there is less thermal mass to be


title: "Laser printing" content: heated and the fuser can more quickly reach operating temperature. If paper moves through the fuser more slowly, there is more roller contact time for the toner to melt, and the fuser can operate at a lower temperature. Smaller, inexpensive laser printers typically print slowly, due to this energy-saving design, compared to large high speed printers where paper moves more rapidly through a high-temperature fuser with a very short contact time. As the drum completes a revolution, it is exposed to an electrically neutral soft plastic blade which cleans any remaining toner from the photoreceptor drum and deposits it into


title: "Laser printing" content: a waste reservoir. A charge roller then re-establishes a uniform negative charge on the surface of the now clean drum, readying it to be struck again by the laser. Once the raster image generation is complete, all steps of the printing process can occur one after the other in rapid succession. This permits the use of a very small and compact unit, where the photoreceptor is charged, rotates a few degrees and is scanned, rotates a few more degrees and is developed, and so forth. The entire process can be completed before the drum completes one revolution. Different printers implement


title: "Laser printing" content: these steps in distinct ways. LED printers use a linear array of light-emitting diodes to "write" the light on the drum. The toner is based on either wax or plastic, so that when the paper passes through the fuser assembly, the particles of toner melt. The paper may or may not be oppositely charged. The fuser can be an infrared oven, a heated pressure roller, or (on some very fast, expensive printers) a xenon flash lamp. The warmup process that a laser printer goes through when power is initially applied to the printer consists mainly of heating the fuser element.


title: "Laser printing" content: The mechanism inside a laser printer is somewhat delicate and, once damaged, often impossible to repair. The drum in particular is a critical component: it must not be left exposed to ambient light for more than a few hours, as light is what causes it to lose its charge and will eventually wear it out. Anything that interferes with the operation of the laser such as a scrap of torn paper may prevent the laser from discharging some portion of the drum, causing those areas to appear as white vertical streaks. If the neutral wiper blade fails to remove residual


title: "Laser printing" content: toner from the drum's surface, that toner may circulate on the drum a second time, causing smears on the printed page with each revolution. If the charge roller becomes damaged or does not have enough power, it may fail to adequately negatively charge the surface of the drum, allowing the drum to pick up excessive toner on the next revolution from the developer roll and causing a repeated but fainter image from the previous revolution to appear down the page. If the toner doctor blade does not ensure that a smooth, even layer of toner is applied to the developer


title: "Laser printing" content: roll, the resulting printout may have white streaks from this in places where the blade has scraped off too much toner. Alternatively if the blade allows too much toner to remain on the developer roll, the toner particles might come loose as the roll turns, precipitate onto the paper below, and become bonded to the paper during the fusing process. This will result in a general darkening of the printed page in broad vertical stripes with very soft edges. If the fuser roller does not reach a high enough temperature or if the ambient humidity is too high, the toner


title: "Laser printing" content: will not fuse well to the paper and may flake off after printing. If the fuser is too hot, the plastic component of the toner may smear, causing the printed text to look like it is wet or smudged, or may cause the melted toner to soak through the paper to the back side. Different manufacturers claim that their toners are specifically developed for their printers, and that other toner formulations may not match the original specifications in terms of either tendency to accept a negative charge, to move to the discharged areas of the photoreceptor drum from the developer


title: "Laser printing" content: roll, to fuse appropriately to the paper, or to come off the drum cleanly in each revolution. As with most electronic devices, the cost of laser printers has fallen markedly over the years. In 1984, the HP LaserJet sold for $3500, had trouble with even small, low resolution graphics, and weighed . , low-end monochrome laser printers can sell for less than $75. These printers tend to lack onboard processing and rely on the host computer to generate a raster image, but outperform the 1984 LaserJet in nearly all situations. Laser printer speed can vary widely, and depends on many


title: "Laser printing" content: factors, including the graphic intensity of the job being processed. The fastest models can print over 200 monochrome pages per minute (12,000 pages per hour). The fastest color laser printers can print over 100 pages per minute (6000 pages per hour). Very high-speed laser printers are used for mass mailings of personalized documents, such as credit card or utility bills, and are competing with lithography in some commercial applications. The cost of this technology depends on a combination of factors, including the cost of paper, toner, drum replacement, as well as the replacement of other items such as the fuser