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the spin field effect transistor ( spinfet ) proposed by datta and das @xcite and its various clones ( see , for example , @xcite ) all operate on the principle of modulating the transmission of electrons through the device by controlling the spin orbit interaction strength in the channel with a gate potential . here , we describe a different type of spinfet where the gate potential modulates transmission resonances in the channel , instead of the spin orbit interaction . by changing the gate potential
, we can move the fermi level in the device from regions of maximum transmission ( pass bands ) to regions of minimum transmission ( stop bands ) , thus modulating the device conductance .
an immediate benefit of this approach is a much reduced switching voltage .
spin orbit interactions in technologically important semiconductors are typically weak and weakly sensitive to external potentials @xcite . as a result , a large swing in the gate potential ( few volts ) is often required to turn a short channel spinfet of the traditional type on or off @xcite .
that results in considerable dynamic energy dissipation during switching .
in contrast , our strategy is to modulate transmission resonances ( ramsauer and fano - type resonances ) that occur in the channel of traditional spinfets @xcite with a gate potential .
since the resonance widths ( in energy ) are very small , a few mv change in the gate potential can take the device from on - resonance to off - resonance and switch it on or off .
this approach results in a very small switching voltage ( a few mv instead of the few volts required in traditional spinfets ) resulting in much reduced dynamic energy dissipation @xcite .
the downside of this strategy is that the temperature of operation must be low so that the thermal broadening in the electron energy remains much smaller than the widths of the transmission resonances .
typically , this limits the temperature of operation to @xmath0 1 k for realistic device parameters @xcite . here
, we show that this problem can be somewhat mitigated by using a dual - gate configuration ( inter - digitated gate ) which allows us to apply two different gate biases on different regions of the channel
. this will allow us to engineer the conduction band profile within the channel in a way that will broaden the transmission resonances and extend the temperature of operation to higher temperatures .
two additional benefits are : ( 1 ) the ratio of on - to - off conductance remains large over an extended temperature range , and ( 2 ) the device exhibits sharp turn - on or turn - off characteristics , making it ideal for application as an inverter . the inverter type behavior is much sought after in boolean logic circuits .
the proposed spinfet with the dual - gate configuration is shown in fig .
the structure consists of one or several quantum wires in parallel ( each with the lowest subband occupied ) sandwiched between two half - metallic ferromagnetic contacts .
the use of parallel channels increases the overall conductance of the device .
the potential on the outer gate ( @xmath1 ) is selected such that underneath this gate , the conduction band edge in the channel is at a location @xmath2 above the bottom of the majority spin band in the ferromagnets ( see fig .
the bias on the inner gate ( @xmath3 ) is varied to modulate the conduction band edge underneath this gate by an amount @xmath4 around the quiescent value .
accordingly , the conduction band profile @xmath5 along the channel will form the basic unit of a superlattice along the direction of current flow as shown in fig .
the source and drain ferromagnets are magnetized along the channel ( x - direction ) and their magnetization vectors point in the same direction ( parallel magnetization ) .
the superlattice potential causes miniband formation for majority spins entering from the source and exiting at the drain .
when the fermi level is inside a miniband , the transmission through the device is relatively large and the transistor is on . by changing @xmath6 , one can move the miniband away from the fermi level ( or vice versa ) , thereby decreasing the transmission probability and turning the transistor off .
the optimal device will require minimal change @xmath6 to turn the transistor on or off .
furthermore , in order to reduce fabrication complexity , we also prefer fewest repetitions of the superlattice unit ( as few inter - digitated gates as possible ) . here , we show that even a single period of the superlattice unit , implemented with just a single pair of gates , is sufficient to yield a very low switching voltage of about 2.6 mv , and yet a large conductance on / off ratio of about 60 , up to a temperature of 10 k. the analysis described here can be easily extended to the case of multiple periods .
use of multiple periods can enhance device performance by extending the temperature of operation to higher temperatures .    for simplicity
, the conduction band diagram along the direction of current flow is modeled as shown in fig .
the contact potentials are approximated by two positive delta - scatterers of strength @xmath7 at the contact / channel interfaces .
this model is fairly accurate for heavy doping in the channel when the schottky barriers at the contact / channel interfaces become very narrow .
the energy bands in the ferromagnets are modeled after the stoner - wohlfarth model which assumes that the majority and minority spin bands are split by an exchange energy @xmath8 .
the fermi level is below the bottom of the minority spin band , so that the ferromagnets are 100% spin polarized at low temperatures ( i.e. they are half metallic ) .
there is a rashba spin orbit interaction in the channel because of the symmetry breaking electric field at the heterointerface , but we assume that it is independent of the gate potential since the latter is never varied by more than a few mv and the spin orbit interaction strength is weakly sensitive to gate potentials @xcite .
we calculate the conductance through the device using the ballistic model for spin transport developed in refs . @xcite .
the @xmath9- and @xmath10-components of the wavefunction in the channel will be slightly different under the two gates for non - zero values of @xmath11 , but this subtlety is neglected here since @xmath12 is never any more than just a few mev , as we show later . for the same reason ,
any difference between the rashba - spin orbit coupling constants under the two gates is ignored .
to calculate the linear response conductance of the spinfet under various gate biases , we first calculate the spin dependent transmission probability of an electron through the device following the recipe of refs .
this technique is fairly involved and the reader is referred to refs . @xcite for the details .
the results presented here are based on the assumption of the device parameters listed in table i.    fig .
3 is a plot of the zero temperature conductance ( in units of @xmath13 ) for the two following biasing configurations : ( a ) the curve labeled `` 1 '' corresponds to the case when the bias on the inner gate is fixed at @xmath14 = 4192 mev ( which corresponds to a transmission resonance when all gates are biased at the same potential ) , while the bias on the outer gate is varied by @xmath15 around the quiescent value of 4192 mev ; ( b ) the curve labeled `` 2 '' corresponds to the second biasing configuration when the bias on the outer gate is kept fixed at @xmath14 = 4192 mev and the bias on the inner gate is varied by @xmath15 around the quiescent value .
a comparison of the curves labeled `` 1 '' and `` 2 '' reveals that it is advantageous to operate the device with @xmath16 = 2.58 mev , indicated by a vertical arrow in fig .
3 . with this value of @xmath16 , switching from the biasing configuration `` 1 '' ( @xmath17 ) to `` 2 '' ( @xmath18 ) switches the device from on ( @xmath19 ) to off ( @xmath20 ) .
4 is a plot of the energy dependence of the transmission coefficient @xmath21 in the two biasing configurations discussed above .
hereafter , we label these two configurations `` on '' and `` off '' since they correspond to on and off states of the transistor .
both in the on and off states , @xmath21 contains several peaks and troughs due to ramsauer and fano resonances in the conductance of the channel , features which we have analyzed thoroughly in the past @xcite . in the energy range [ 4198.5 - 4200.5 ]
mev , the transmission coefficient reaches unity several times when the spinfet is biased in the on configuration but is close to zero when biased in the complementary scheme .
therefore , the energy range [ 4198.5 - 4200.5 ] mev constitutes the `` pass band '' in the on configuration and also the `` stop band '' in the off configuration .
consequently , if we place the fermi level within this energy range ( by appropriate channel doping , or even using a back gate ) , then we can switch the device on or off by going from the one gate biasing scheme to the other . since this requires changing the bias on any gate by at most 2.58 mv ,
the effective switching voltage @xmath22 is only 2.58 mv .
we can estimate the dynamic energy dissipated during switching .
assuming that the gate capacitance @xmath23 ( including interconnects ) is about 1 ff , the maximum energy dissipated during a switching event is @xmath24 = 3.3 @xmath25 10@xmath26 joules , which is 4 - 5 orders of magnitude smaller than what a typical transistor dissipates in the pentium iv chip today @xcite .    the full width at half maximum ( fwhm ) for @xmath21 in the on configuration ( distance between points @xmath27 and @xmath28 in fig .
4 ) is roughly 1.5 mev .
this is the effective width of the pass band .
it is about three times the distance between the points @xmath29 and @xmath30 , which is the fwhm of the transmission coefficient versus energy curve when the inner and outer gates are biased at the _ same _ potential ( corresponding to @xmath31 under both gates ) .
therefore , the use of a dual gate , as opposed to a single gate , has broadened the transmission resonance by a factor of 3 .
5 shows the transfer characteristic of the device ( conductance versus gate voltage ) at zero temperature .
this plot displays the change in the conductance as the potential on the inner gate is gradually increased from 4192 mev to 4192 + @xmath32 mev while simultaneously reducing the potential on the outer gate from 4192 + 2.58 mev to 4192 + 2.58 - @xmath32 mev .
we see that transistor has a fairly sharp switching characteristic  the transition width is only about 2 mv  which is the hallmark of a good inverter .
the transistor performance obviously degrades at high temperatures because of thermal averaging over electron energy .
thermal averaging can be viewed as a convolution of @xmath21 with a function of width roughly equal to 4 @xmath33 @xcite .
therefore , the device performance is not expected to deteriorate substantially until @xmath34 , which is the distance between the points @xmath27 and @xmath28 in fig .
4 . setting @xmath35 = 1.5 mev , we find that the upper limit on the temperature is about 5 k. over the energy range of 1.5 mev , the conductance in the off state stays very close to zero since @xmath21 remains approximately zero in this energy range .
therefore , the dual - gate spinfet will retain a large on to off conductance ratio up to a temperature of at least 5 k.    the temperature dependence is shown in fig .
6 where the conductance of the device is plotted as a function of temperature for the two biasing configurations discussed above .
table ii lists the values of the conductance on / off ratio calculated as a function of temperature for @xmath16 = 6 mev .
the on / off ratio is about 60 at @xmath36 .
this is comparable to what is typically obtained today with carbon nanotube transistors .
one deleterious effect of high temperatures is that the maximum on conductance has dropped to @xmath37 .
this can be remedied by using multiple parallel channels to increase the total device conductance , while still maintaining a large conductance on / off ratio .
in conclusion , we have shown that using a dual gate configuration , it is possible to realize short - channel spinfets with large conductance on / off ratio at temperatures above that of liquid helium .
these spinfets possess excellent inverter characteristics , making them ideal for low power logic circuits .
the sharp turn - off behavior is conducive to good noise margin and restoration of logic levels at circuit nodes @xcite for fault - tolerant computing and signal processing .
the very small power dissipation will also allow extremely high integration density .
* figure 1 * : ( top ) cross - sectional view of the spinfet composed of two interdigitated gates controlling the current flowing between two half metallic contacts .
( bottom ) top view of the dual - gate spinfet consisting of an array of parallel quasi one - dimensional channels ( dotted lines ) .
the magnetization in the contacts is assumed to be in the direction ( @xmath38 ) of current flow .
.1 in * figure 2 * : energy band diagram along the direction of one of the channels of the spinfet .
in the half - metallic contacts , the exchange energy @xmath8 is large enough that the bottom of the minority spin band is above the fermi level , so that the spin polarization in the ferromagnet is 100% .
the minority spins are evanescent in the channel .
the energy bands in the ferromagnets are modeled using the stoner - wohlfarth model .
the barrier height @xmath39 under each gate is controlled by the applied bias . in the calculations , @xmath39 is assumed to include the effects of the quantum confinement in the y- and z - directions .
the contact potentials at the ferromagnet / semiconductor interface are modeled as simple one - dimensional delta - potentials .
@xmath39 is set equal to @xmath40 = 4.192 ev under one of the gates and varied by @xmath41 in either direction under the other gate .
.1 in * figure 4 * : transmission coefficient versus energy of majority spins in the on and off biasing configurations .
the dot - dash curve corresponds to the case where the same potential is applied to both gates such that @xmath39 = @xmath40 = 4.192 ev .
.1 in * figure 5 * : zero temperature inverter characteristic of the spinfet .
the conductance is plotted as a function of the incremental bias @xmath32 on either gate assuming a quiescent gate bias of 4.192 v.
we propose and analyze a novel dual - gate spin field effect transistor ( spinfet ) with half - metallic ferromagnetic source and drain contacts . 
 the transistor has two gate pads that can be biased independently . 
 it can be switched on or off with a few mv change in the differential bias between the two pads , resulting in extremely low dynamic power dissipation during switching . 
 the ratio of on to off conductance remains fairly large ( @xmath0 60 ) up to a temperature of 10 k. this device also has excellent inverter characteristics , making it attractive for applications in low power and high density boolean logic circuits .    
 spintronics , spin field effect transistors , spin transport 85.75.hh , 72.25.dc , 71.70.ej