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Paper text:
the hybrid pixel detectors in operation at the lhc today @xcite and installed around 2007 represent a great achievement in particle physics instrumentation , but have limitations in rate capability , radiation hardness , power and mass , imposed by the technology that was available at the time of their design .
work within the atlas collaboration has since focused on developing new technology rather than on a specific detector design .
the developments discussed here are a new readout integrated circuit called fe - i4 , new sensor developments , mechanical structures based on a new type of high thermal conductivity carbon foam , and electro - mechanical integrated structures .
the technology developments follow a road - map inspired by the requirements of a future high luminosity lhc upgrade , but has the generic goals of reducing mass and cost while increasing rate capacity and radiation tolerance . as individual technologies mature , they can be deploy as soon as the need or opportunity arises . the `` insertable b - layer '' ( ibl ) upgrade  @xcite will deploy in 2013 the fe - i4 integrated circuit , high thermal conductivity carbon foam , `` slim edge '' planar sensors , and 3d sensors .
other near term upgrades are being considered that would also deploy the fe - i4 integrated circuit along with diamond sensors ( a beam luminosity monitor ) and 3d sensors ( a far forward pixel detector ) . together with further new technologies ( on - stave power conversion , high speed data transmission , etc . )
, all the technologies described in this paper would be available for deployment on a 2018 time scale and this possibility is under consideration .
photograph of the fe - i4 readout chip ( left ) and fe - i3 ( right ) .
the width and height as shown are 20.3 mm by 19.2 mm for fe - i4 and 7.4 mm by 11.0 mm for fe - i3,width=302 ]    the fe - i4 pixel readout integrated circuit has been developed with the generic goals of increasing rate capability and radiation tolerance and reducing system cost  @xcite .
cost reduction is mainly achieved by making the integrated circuit area as large as possible , since flip chip bump bonding cost scales approximately with the number of chips processed rather than with area processed , and until now bump bonding has been the main cost driver .
fe - i4 is therefore the largest pixel readout ic produced to date : fig  [ fig : chips ] shows a photograph of fe - i4 next to the present atlas pixel readout chip called fe - i3 .
bump bonding cost reduction is not critical for the ibl project because the total active area is small ( 0.15m@xmath0 ) .
however , the large format of fe - i4 is critical to fitting the tight radial envelope constraints of ibl .
additionally , only 10% of the fe - i4 area is devoted to periphery ( compared to 30% for fe - i3 ) and this is again critical for the ibl geometry .    the small fe - i4 periphery is a secondary benefit of a new readout architecture  @xcite .
the reduced periphery is achieved because all hit storage is within the pixel matrix itself .
the primary purpose of this new architecture is to achieve much higher rate capability than previous chips .
this is critical for ibl ( due to higher hit rate at smaller radius ) .
the new readout stores hit charge and timing locally within a 4-pixel region until selected by an external trigger .
this was possible by taking advantage of the high digital circuit density in the 130 nm feature size cmos process used .
increased radiation tolerance is also achieved by the 130 nm process .
each fe - i4 chip has 26,880 pixels 50@xmath1 m wide by 250@xmath1 m long .
pixel sensor development has been ongoing in several large collaborations  @xcite . within atlas
the ibl project provided a significant boost to pixel sensor prototyping and characterization .
a planar n - in - n ibl sensor design is based on the sensors used in the present atlas pixel detector  @xcite , adapted to the ibl needs by reducing the pixel size to match fe - i4 granularity and the sensor wafer thickness to 200@xmath1 m . a new guard ring design maximizes the possible operation voltage and minimizes the inactive edge .
the so - called``slim - edge '' design , uses 13 guard rings on the bias side of the sensor to manage the potential drop between bias contact and physical sensor edge .
the distance from the last guard to the dicing edge is 100@xmath1 m .
the edge pixels on the electrode side of the sensor overlap the guard ring area to collect charge from as close as possible to the physical edge .
further details can be found in  @xcite .
a `` double sided ''
3d sensor ibl design has the measuring and biasing electrodes etched into the p - type silicon bulk from opposite sides , penetrating most of the thickness , but not all the way through .
this makes processing and bias connection simpler .
the sensor bulk is laterally depleted between n@xmath2-type measuring electrodes and p@xmath2-type biasing electrodes .
3d sensors allow for high field strength and good charge collection after heavy irradiation with relatively low bias voltages .
the ibl 3d design uses two n@xmath2 electrodes per pixel , surrounded by six p@xmath2 biasing electrodes , to provide good charge collection without excessive capacitance  @xcite .
the sensors are 230@xmath1 m thick and have an inactive guard ring area 225@xmath1 m wide .
two guard ring variants have been developed using combinations of n@xmath2 columns and p@xmath2 columns forming fences around the active area .
thermal conductivity vs. density for new carbon foam .
finite element calculates ( squares and triangles ) are compared with sample measurements ( circles).,width=302 ]    a new type of all - carbon thermally conductive foam has been developed for silicon pixel and strip mechanical supports  @xcite .
the foam is readily machinable and has low radiation length , yet thermal conductivity two orders of magnitude higher than conventional foams of the same density .
[ fig : foamk ] shows finite element analysis predicted foam conductivities compared to sample measurements .
the foam is produced using a reticulated vitreous carbon ( rvc ) foam precursor and increasing the thermal conductivity through combination of chemical vapor deposition and heat treatment .
a standard fabrication has been developed producing blocks 2.5 cm thick and @xmath3cm@xmath0 .
a common basic concept uses a small coolant tube glued to foam , coupled with high stiffness carbon facings to form rigid , lightweight structures supporting modules and their electrical connections . due to the high foam conductivity , such structures efficiently couple heat for small tubes typical of co@xmath5 evaporative cooling
this is the atlas baseline for all future pixel support structures ( including ibl ) and also a candidate for silicon strip supports .
the reliability of such foam - based structures has been validated by extensive thermal cycling and repeated shock , before and after irradiation up to 1grad .
three types of pixel structures have been prototyped , all based on evaporative co@xmath5 cooling in ti tubes coupled to the surfaces with thermally conductive carbon foam .
these are the ibl stave , box beam stave , and `` i - beam '' coupled layer structures .
box beams have been made up to 1.4 m long by 4 cm wide , including embedded electrical cables .
also demonstrator bent sections have been made , which can be used to increase pseudorapidity coverage of barrel sections improving the transition to forward coverage .
i - beam coupled layers have been made up to 1 m long . by radially coupling two measurements layers ,
a very stiff structure can be made , thereby saving mass in support frame structures- even long i - beams can be end - supported .
[ fig : staves ] shows a 1.4 m long box beam prototype with embedded cables next to a 1 m long i - beam prototype fig .
[ fig : iblstave ] shows detail views of one end of a 2 cm wide ibl stave .
stave cable designs have been produced compatible with serial powering of all modules on a stave , using aluminum conductors .
the fe - i4 chip contains so called `` shunt - ldo '' voltage regulators  @xcite designed to support serial power distribution . in ibl
these regulators are used to permit safe operation with point - to - point power over resistive cables ( the voltage drop in the cables is comparable to the load ) .
photograph of a 1.4 m long box beam stave prototype ( bottom ) and a 1 m long i - beam stave prototype ( top).,width=510 ]     photographs of an end of an ibl stave .
the width is 2cm.,width=302 ]
the insertable b - layer ( ibl ) is the first planned upgrade to the atlas inner tracker .
it consists of new barrel layer of pixels to be mounted inside the existing detector , without altering it .
the present atlas pixel inner layer has approximately a 1 cm gap to the outer envelope of the beam pipe , and additional room will be created by replacing the existing beam pipe with a new one of reduced diameter . in the context of new technology development , it is interesting to recall that the original atlas pixel technical design report  @xcite called for a smaller radius , smaller pixel size inner layer than was eventually implemented .
the reason for the change was lack of sufficiently advanced technology- a smaller pixel size chip could not be designed in the cmos process used at the time , and the radiation and rate tolerance requirements could not be met at the desired small radius . in this sense ,
the new technology that is being deployed in ibl can finally achieve the original atlas design goals .
[ fig : iblphotos ] shows a photograph of the present detector exactly as it is mounted around the beam pipe , as well as cross sections view of barrel layers and the ibl .
the ibl is approximately 64 cm long at a mean radius of 3.2 cm .
thanks to the small radius , a single barrel covers the full pseudorapidity range of the atlas tracking system .
it is made up of 14 staves with 32 fe - i4 chips each .
the ibl mass target in the active region is 1.5% of a radiation length at normal incidence .
the additional high precision measurement , at smaller radius and with low mass translates into a significant improvement in the performance of he atlas detector : the purity of b - quark jets identified by the presence of a displaced vertex can be increased by nearly a factor of two  @xcite .
the full detector is expected to degrade due to radiation damage , random failures , and inefficiency at high interaction rate . even after such degradation
, simulations show that the presence of the radiation hard , high rate capable ibl translates into better performance than is achieved today , before degradation , but without ibl
.     left : photograph of the present pixel detector as it is mounted around the beam pipe .
three disks are in the foreground , with the end of the barrel leaving a roughly 1 cm gap to the beam pipe in the background .
center : section view of the three barrel layers on approximately the same scale as the photograph , together with the ibl and new beam pipe section inside .
right : detail showing only the inner layer of the present detector ( gray ) , and ibl and new beam pipe inside . the black line separating the ibl from the present inner layer is a carbon fiber tube that will support and guide insertion of the ibl.,width=302 ]    while ibl is a near term upgrade already in progress , eventually the full atlas tracker must be replaced to cope with a machine luminosity upgrade , and the technology development aims at this goal .
however , if technology matures on a faster timescale than strictly needed for this ultimate replacement , it may be advantageous to advance the upgrade of certain elements .
this early availability of new technology is precisely what has made the ibl upgrade possible on the 2013 time scale .
atlas is now studying the potential advantages of upgrading the full pixel detector ( the part outside ibl ) before the lhc high luminosity upgrade .
the new detector would have lower mass , higher granularity , bigger lever arm for track finding , and would already meet the rate and radiation requirements of the high luminosity lhc .
the merits of such an upgrade will be assessed on two fronts : performance studies using monte carlo simulation to evaluate possible gains in physics reach , and projections of expected degradation of the existing detector , including random failures , radiation damage , and efficiency loss at high rate .
[ fig : newpix ] compares the barrel section of the present detector with ibl to a possible upgrade layout keeping the same ibl .
this new pixel layout is based on mechanical structures already prototyped ( box beam staves , bent sections , and i - beams ) and on modules made with 4 fe - i4 chips .
such modules are presently under development .
the new detector would contain approximately 250 million pixels in just over 3m@xmath0 of silicon , compared to 80 million pixels in under 2m@xmath0 for the present detector ( the pixels are smaller , but also the outer layer radius is larger ) .
comparison of barrel cross sections for present detector with ibl and ( a ) potential replacement on 2018 timescale .
( b ) model view of replacement detector having barrel cross section ( a).,width=510 ]
development of new technologies has been made a priority of atlas pixel r&d , with the result that several advances are ready today and will be deployed in the ibl upgrade ( 2013 ) .
these include the new fe - i4 readout chip , new sensors , and low mass foam .
further items are being developed and will be ready for 2018 deployment if needed .
these include low mass i - beam and bent box beam stave structures with integrated services , lower cost per unit area ( large format of fe - i4 chip , sensors on 6 inch wafers , faster bump bonding ) , low mass cables , and on - stave power conversion . other items that will be ready for 2018 deployment , but were not covered include low mass multi ghz signal cables , high speed data transmission chips , and data acquisition .
atlas is studying the benefits of a potential 2018 pixel upgrade taking advantage of the above new technologies .
still further advances are in early stages of development and will likely not mature for deployment before 2020 .
these include a further chip generation beyond fe - i4 ( higher rate and radiation ) even more radiation hard sensors , and very high speed communication .
the atlas experiment pixel detector upgrade plans are focused on development of new technology , including the fe - i4 readout integrated circuit . 
 the first upgrade project to make use of this new technology is an `` insertable b - layer '' ( ibl ) pixel detector to be installed on a replacement beam pipe in 2013 . 
 the ibl will fit inside and not alter the existing atlas pixel detector . 
 however , the possibility is being studied to replace the pixel whole detector in 2018 with a lower mass , higher performance instrument based on the fe - i4 chip and new mechanical structures .