//! Helpers to program the task state segment.
//! See Intel 3a, Chapter 7, Section 7

use VirtualAddress;

/// In 64-bit mode the TSS holds information that is not
/// directly related to the task-switch mechanism,
/// but is used for finding kernel level stack
/// if interrupts arrive while in kernel mode.
#[derive(Debug)]
#[repr(C, packed)]
pub struct TaskStateSegment {
    reserved_1: u32,
    /// The full 64-bit canonical forms of the stack pointers (RSP) for privilege levels 0-2.
    pub privilege_stack_table: [VirtualAddress; 3],
    reserved_2: u64,
    /// The full 64-bit canonical forms of the interrupt stack table (IST) pointers.
    pub interrupt_stack_table: [VirtualAddress; 7],
    reserved_3: u64,
    reserved_4: u16,
    /// The 16-bit offset to the I/O permission bit map from the 64-bit TSS base.
    pub iomap_base: u16,
}

impl TaskStateSegment {
    /// Creates a new TSS with zeroed privilege and interrupt stack table and a zero
    /// `iomap_base`.
    pub const fn new() -> TaskStateSegment {
        TaskStateSegment {
            privilege_stack_table: [VirtualAddress(0); 3],
            interrupt_stack_table: [VirtualAddress(0); 7],
            iomap_base: 0,
            reserved_1: 0,
            reserved_2: 0,
            reserved_3: 0,
            reserved_4: 0,
        }
    }
}

//! Helpers to program the task state segment.
//! See Intel 3a, Chapter 7, Section 7

use segmentation;

/// In 64-bit mode the TSS holds information that is not
/// directly related to the task-switch mechanism,
/// but is used for finding kernel level stack
/// if interrupts arrive while in kernel mode.
#[derive(Debug)]
#[repr(C, packed)]
pub struct TaskStateSegment {
    pub reserved: u32,
    /// The full 64-bit canonical forms of the stack pointers (RSP) for privilege levels 0-2.
    pub rsp: [u64; 3],
    pub reserved2: u64,
    /// The full 64-bit canonical forms of the interrupt stack table (IST) pointers.
    pub ist: [u64; 7],
    pub reserved3: u64,
    pub reserved4: u16,
    /// The 16-bit offset to the I/O permission bit map from the 64-bit TSS base.
    pub iomap_base: u16,
}

impl TaskStateSegment {
    pub const fn new() -> TaskStateSegment {
        TaskStateSegment {
            reserved: 0,
            rsp: [0; 3],
            reserved2: 0,
            ist: [0; 7],
            reserved3: 0,
            reserved4: 0,
            iomap_base: 0,
        }
    }
}

--- 
+++ 
@@ -1,7 +1,7 @@
 //! Helpers to program the task state segment.
 //! See Intel 3a, Chapter 7, Section 7
 
-use segmentation;
+use VirtualAddress;
 
 /// In 64-bit mode the TSS holds information that is not
 /// directly related to the task-switch mechanism,
@@ -10,28 +10,30 @@
 #[derive(Debug)]
 #[repr(C, packed)]
 pub struct TaskStateSegment {
-    pub reserved: u32,
+    reserved_1: u32,
     /// The full 64-bit canonical forms of the stack pointers (RSP) for privilege levels 0-2.
-    pub rsp: [u64; 3],
-    pub reserved2: u64,
+    pub privilege_stack_table: [VirtualAddress; 3],
+    reserved_2: u64,
     /// The full 64-bit canonical forms of the interrupt stack table (IST) pointers.
-    pub ist: [u64; 7],
-    pub reserved3: u64,
-    pub reserved4: u16,
+    pub interrupt_stack_table: [VirtualAddress; 7],
+    reserved_3: u64,
+    reserved_4: u16,
     /// The 16-bit offset to the I/O permission bit map from the 64-bit TSS base.
     pub iomap_base: u16,
 }
 
 impl TaskStateSegment {
+    /// Creates a new TSS with zeroed privilege and interrupt stack table and a zero
+    /// `iomap_base`.
     pub const fn new() -> TaskStateSegment {
         TaskStateSegment {
-            reserved: 0,
-            rsp: [0; 3],
-            reserved2: 0,
-            ist: [0; 7],
-            reserved3: 0,
-            reserved4: 0,
+            privilege_stack_table: [VirtualAddress(0); 3],
+            interrupt_stack_table: [VirtualAddress(0); 7],
             iomap_base: 0,
+            reserved_1: 0,
+            reserved_2: 0,
+            reserved_3: 0,
+            reserved_4: 0,
         }
     }
 }
Rename TSS fields and use Virtual addresses for stack table entries
