평판표시장치 및 그의 제조방법을 제공한다. It provides a flat panel display device and a process for producing the same. 상기 평판표시장치는 기판, 상기 기판 상에 매트릭스 형태로 배열된 신호선들, 상기 신호선들의 교차에 의해 한정되고 화소구동회로영역과 발광영역을 갖는 단위화소영역을 포함한다. And the flat panel display device comprises a unit pixel area with the substrate, of the array in a matrix form on the substrate a signal line, is defined by the intersection of the signal line and the light-emitting region area to the pixel driving circuit. 상기 화소구동회로영역에 반도체층 및 상기 반도체층의 소정부분에 대응되고 상기 신호선들과 동일층에 형성된 게이트 전극을 구비하는 화소구동 박막트랜지스터가 위치한다. Corresponding to a predetermined portion of the semiconductor layer and the semiconductor layer in the region the pixel driving circuit to the pixel, and the driving thin film transistor having a gate electrode formed on the signal line and the same floor location. 상기 화소구동 박막트랜지스터에 전기적으로 연결된 화소전극이 상기 발광영역에 위치한다. A pixel electrode electrically connected to the pixel-driving thin-film transistor is located in said light emitting region.
도 1은 종래의 능동 매트릭스 유기전계발광표시장치를 설명하기 위한 평면도이다. 1 is a plan view for illustrating a conventional active matrix organic electroluminescent display device.
도 2는 도 1의 절단선 I-I'를 따라 취해진 종래기술에 따른 유기전계발광표시장치의 제조방법을 설명하기 위한 단면도이다. 2 is a cross-sectional view for explaining a production method of an organic light emitting display device according to the prior art taken along line I-I 'of FIG.
도 3은 본 발명의 제 1 및 제 2 실시예에 따른 유기전계발광표시장치를 나타낸 평면도이다. Figure 3 is a plan view showing an organic light emitting display according to the first and second embodiments of the present invention.
도 4a 및 도 4b는 도 3의 절단선 I-I'를 따라 취해진 본 발명의 제 1 실시예에 따른 유기전계발광표시장치의 제조방법을 설명하기 위한 단면도들이다. Figures 4a and 4b are sectional views illustrating a method of manufacturing an organic light emitting display device according to a first embodiment of the present invention taken along line I-I 'of FIG.
도 5a 및 도 5b는 도 3의 절단선 Ⅱ-Ⅱ'를 따라 취해진 본 발명의 제 1 실시예에 따른 유기전계발광표시장치의 제조방법을 설명하기 위한 단면도들이다. Figures 5a and 5b are sectional views illustrating a method of manufacturing an organic light emitting display device according to a first embodiment of the present invention taken along section line Ⅱ-Ⅱ 'of Fig.
도 6a 및 도 6b는 도 3의 절단선 I-I'를 따라 취해진 본 발명의 제 2 실시예에 따른 유기전계발광표시장치의 제조방법을 설명하기 위한 단면도들이다. Figures 6a and 6b are cross-sectional views for explaining the manufacturing method of the organic light emitting display device according to a second embodiment of the present invention taken along line I-I 'of FIG.
도 7a 및 도 7b는 도 3의 절단선 Ⅱ-Ⅱ'를 따라 취해진 본 발명의 제 2 실시예에 따른 유기전계발광표시장치의 제조방법을 설명하기 위한 단면도들이다. Figures 7a and 7b are cross-sectional views for explaining the manufacturing method of the organic light emitting display device according to a second embodiment of the present invention taken along line Ⅱ-Ⅱ 'of Fig.
본 발명은 평판표시장치에 관한 것으로, 더욱 자세하게는 유기전계발광표시장치에 관한 것이다. The present invention relates to that, more specifically an organic light emitting display apparatus of the flat panel display.
일반적으로 유기전계발광표시장치(organic electroluminescence display)는 형광성 유기화합물을 전기적으로 여기시켜 발광하게 하는 자발광형 표시장치로서, 매트릭스 형태로 배치된 N×M 개의 화소들을 구동하는 방식에 따라 수동 매트릭스(passive matrix)방식과 능동 매트릭스(active matrix)방식으로 나뉘어지는데, 상기 능동 매트릭스 방식의 유기전계발광표시장치는 상기 수동 매트릭스 방식에 비해 전력소모가 적어 대면적 구현에 적합하며 고해상도를 갖는 장점이 있다. In general, an organic light emitting display device (organic electroluminescence display) are passive matrix according to the method for driving a light emitting display device who emit light excites a fluorescent organic compound electrically, the N × M pixels arranged in a matrix form ( passive matrix) divided in such a manner and an active matrix (active matrix) system, an organic light emitting display device of the active matrix system is, and the power consumption down for appropriate to the area implemented as compared to the passive matrix type has the advantage of having a high resolution.
도 1은 종래의 능동 매트릭스 유기전계발광표시장치를 설명하기 위한 평면도로서 단위화소영역에 한정하여 나타낸 도면이다. 1 is a view illustrating a unit pixel area defined by a plan view for illustrating a conventional active matrix organic electroluminescent display device.
도 1을 참고하면, 일방향으로 배열된 스캔 라인(125), 상기 스캔 라인(125)과 서로 절연되면서 교차하는 데이터 라인(135) 및 상기 스캔 라인(125)과 서로 절연되면서 교차하고 상기 데이터 라인(135)에는 평행한 공통 전원라인(131)이 위치한다. Referring to FIG 1, the scan lines arranged in one direction 125 and the scan lines 125 and data lines crossing as isolated from each other 135 and the scan lines 125 and the insulation while crossing said data lines to each other ( 135), it is parallel to the common power line 131 position.
상기 각 단위화소영역에는 상기 스캔 라인(125)에 인가된 신호에 따라 상기 데이터 라인(135)에 인가된 데이터 신호를 스위칭하는 스위칭 박막트랜지스터(140), 상기 스위칭 박막트랜지스터(140)를 통해 인가되는 데이터 신호를 일정기간 유지하기 위한 캐패시터(145) 및 상기 스위칭 박막트랜지스터(140)를 통해 인가되는 데이터 신호에 의해 화소전극(170)으로 전류를 흘려주는 화소구동 박막트랜지스터(150)가 위치한다. Each of the unit pixel area, which is applied via the switching thin film transistor 140, the switching thin film transistor 140 for switching the data signal supplied to the data line 135 according to a signal applied to the scan line 125, the pixel-driving thin-film transistor 150 to flow a current to the pixel electrode 170 by the data signal applied to the data signal, via the capacitor 145 and the switching thin film transistor 140 for maintaining a period of time and location. 상기 화소전극(170) 상에는 발광층(미도시)이 위치하고, 상기 발광층 상에는 대향전극(미도시)이 위치한다. (Not shown), the light-emitting layer formed on the pixel electrode 170 is located, the light emitting layer is an opposite electrode (not shown) overlying. 상기 화소전극(370), 상기 발광층 및 상기 대향전극은 유기전계발광다이오드를 구성한다. The pixel electrode 370, the light-emitting layer and the opposite electrode constitute the organic light emitting diode.
도 2를 참조하면, 기판(100) 상에 버퍼층(105)을 형성한다. Referring to Figure 2, to form a buffer layer 105 on a substrate 100. 상기 버퍼층(105) 상에 제 1 마스크를 사용하여 반도체층(110)을 형성한다. Using a first mask on the buffer layer 105 to form the semiconductor layer 110. 상기 반도체층(110)을 포함한 기판 전면에 게이트 절연막(115)을 형성하고, 상기 게이트 절연막(115) 상에 제 2 마스크를 사용하여 게이트 전극(120)을 형성한다. To form the semiconductor layer 110, the gate electrode 120 using a second mask over the gate insulating film 115 on the phase, the gate insulating film 115 to form a substrate including.
이어서, 상기 게이트 전극(120)를 포함한 기판 전면에 층간절연막(125)을 형성하고, 제 3 마스크를 사용하여 상기 층간절연막(125) 내에 상기 반도체층(110)의 양측 단부를 각각 노출시키는 소오스/드레인 콘택홀들(125a)을 형성한다. Then, a source / of each exposing both ends of the semiconductor layer 110 in the substrate surface including the gate electrode 120, and an interlayer insulating film 125, using the third mask, the interlayer insulating film 125, to form a drain contact holes (125a). 그리고 나서, 제 4 마스크를 사용하여 상기 층간절연막(125) 상에 상기 소오스/드레인 콘택홀들(125a)을 통해 상기 반도체층(110)의 양측 단부에 각각 연결되는 소오스/드 레인 전극들(130a)을 형성한다. Then, the first source / drain electrode through the source / drain contact holes (125a) using a fourth mask on the interlayer insulation film 125 are respectively connected to both ends of the semiconductor layer (110) (130a ) to form.
이어서, 상기 소오스/드레인 전극들(130a)을 포함하는 기판 전면에 비아홀 절연막(160)을 형성하고, 상기 비아홀 절연막(160) 내에 제 5 마스크를 사용하여 상기 소오스/드레인 전극들(130a) 중 어느 하나를 노출시키는 비아홀(160b)을 형성한다. Of then, the source / drain electrodes (130a) forming a via hole insulating layer 160 over the entire surface of the substrate, and including the via hole insulating layer 160 and in the use of a fifth mask, the source / drain electrodes (130a) which to form a via hole (160b) for exposing one. 그리고 나서, 상기 비아홀 절연막(160) 상에 상기 비아홀(160b)을 통해 노출된 상기 소오스/드레인 전극(130a)에 연결된 화소전극(170)을 제 6 마스크를 사용하여 형성한다. Then, a pixel electrode 170 connected to the the source / drain electrodes (130a) exposed through the via hole (160b) on said insulating layer via hole 160 using a sixth mask. 그리고 나서, 상기 화소전극(170)을 덮는 화소정의막(175)을 형성하고, 제 7 마스크를 사용하여 상기 화소정의막(175) 내에 상기 화소전극(170)을 노출시키는 개구부(175a)를 형성한다. Then, an opening (175a) exposing the pixel electrode 170 in the form a pixel defining film 175 covering the pixel electrode 170, using a seventh mask, the pixel defining layer (175) do.
이어서, 상기 개구부(175a)내에 노출된 화소전극(170)을 포함하는 기판 전면에 유기발광층(200)을 형성하고, 상기 유기발광층(200) 상에 대향전극(opposite electrode; 220)을 형성함으로써, 유기전계발광표시장치를 제조한다. Then, the opening (175a) of the pixel counter electrode on the organic emission layer 200, the formation, and the organic light-emitting layer 200 over the entire surface of the substrate including the electrode 170 is exposed in the; by forming the (opposite electrode 220), to produce an organic light emitting display device.
이와 같이, 종래기술에 따라 유기전계발광표시장치를 제조함에 있어서는 총 7 매의 마스크가 필요하며, 상기 화소전극(170)과 상기 소오스/드레인 전극(130a)를 연결시키기 위한 비아홀과 상기 비아홀이 위치한 비아홀 절연막의 형성단계가 필요하다. In this way, conventional according to the technology In the production of an organic electroluminescent display device requires a total of 7 sheets of the mask, and a via hole for connecting the pixel electrode 170 and the source / drain electrodes (130a) and the via hole is located the forming of the via hole insulating film is necessary. 이는 마스크 제작비용 및 공정프로세스 복잡화에 따른 생산원가 상승을 초래한다. This results in the production cost increases due to the mask manufacturing process costs and process complexity.
본 발명이 이루고자 하는 기술적 과제는 상기한 종래기술의 문제점을 해결하기 위한 것으로 제조를 위해 필요한 마스크 수가 감소되고 공정프로세스가 단순화 된 유기전계발광표시장치 및 그의 제조방법을 제공하고자 한다. This aspect of the invention is to provide a reduced number of masks and display process is a simplified process, the organic light emitting device and a method of producing the necessary for the production to be to solve the problems of the prior art.
상기 기술적 과제를 이루기 위하여 본 발명은 평판표시장치를 제공한다. The present invention to achieve the above aspect there is provided a flat panel display device. 상기 평판표시장치는 기판, 상기 기판 상에 매트릭스 형태로 배열된 신호선들, 상기 신호선들의 교차에 의해 한정되고 화소구동회로영역과 발광영역을 갖는 단위화소영역을 포함한다. And the flat panel display device comprises a unit pixel area with the substrate, of the array in a matrix form on the substrate a signal line, is defined by the intersection of the signal line and the light-emitting region area to the pixel driving circuit. 상기 화소구동회로영역에 반도체층 및 상기 반도체층의 소정부분에 대응되고 상기 신호선들과 동일층에 형성된 게이트 전극을 구비하는 화소구동 박막트랜지스터가 위치한다. Corresponding to a predetermined portion of the semiconductor layer and the semiconductor layer in the region the pixel driving circuit to the pixel, and the driving thin film transistor having a gate electrode formed on the signal line and the same floor location. 상기 화소구동 박막트랜지스터에 전기적으로 연결된 화소전극이 상기 발광영역에 위치한다. A pixel electrode electrically connected to the pixel-driving thin-film transistor is located in said light emitting region.
상기 화소전극은 상기 화소구동회로영역으로 연장되어 상기 반도체층의 일측 단부에 접하는 것이 바람직하다. The pixel electrode may be extended to a region in the pixel driving circuit in contact with one end of the semiconductor layer. 더 나아가서, 상기 화소구동 박막트랜지스터는 상기 반도체층의 타측 단부와 상기 신호선들중 어느 하나에 동시에 접하는 소오스/드레인 전극을 더욱 포함하는 것이 바람직하다. Furthermore, the pixel-driving thin-film transistor, it is preferable to further include a source / drain electrode in contact with at the same time in any one of the other side end portion and the signal line of the semiconductor layer. 이 경우, 상기 화소전극과 상기 소오스/드레인 전극은 동일물질로 이루어진 것이 바람직하다. In this case, the pixel electrode and the source / drain electrodes are preferably made of the same material. 또한, 상기 화소전극과 상기 소오스/드레인 전극은 적어도 한 층의 전도성막 적층구조를 갖는 것이 바람직하다. Further, the pixel electrode and the source / drain electrode may be conducting film having a laminated structure of at least one layer.
이와는 달리, 상기 화소구동 박막트랜지스터는 상기 반도체층의 일측 단부 및 상기 화소전극에 동시에 접하는 저저항전극을 더욱 포함하는 것이 바람직하다. Alternatively, the pixel-driving thin-film transistor is preferably further comprises a low-resistance contact electrode at the same time at one end and the pixel electrode of the semiconductor layer. 더 나아가서, 상기 화소구동 박막트랜지스터는 상기 반도체층의 타측 단부와 상기 신호선들중 어느 하나에 동시에 접하는 소오스/드레인 전극을 더욱 포함하는 것이 바람직하다. Furthermore, the pixel-driving thin-film transistor, it is preferable to further include a source / drain electrode in contact with at the same time in any one of the other side end portion and the signal line of the semiconductor layer. 이 경우, 상기 저저항전극 및 상기 소오스/드레인 전극은 알루미늄, 알루미늄합금, 몰리브덴 및 몰리브덴합금으로 이루어진 군에서 선택되는 하나로 이루어진 것이 바람직하다. In this case, the low-resistance electrode and the source / drain electrode may be made of one selected from the group consisting of aluminum, aluminum alloys, molybdenum and molybdenum alloys.
상기 평판표시장치는 상기 반도체층을 덮는 게이트 절연막과 상기 게이트 절연막 상에 위치하여 상기 게이트 전극 및 상기 신호선들을 덮는 층간절연막을 더욱 포함하는 것이 바람직하다. The flat panel display device preferably further includes an interlayer insulating film covering the gate electrode and the signal line located on the gate insulating film and the gate insulating film which covers the semiconductor layer. 상기 층간절연막은 유기막, 무기막 또는 유·무기복합막인 것이 바람직하다. The interlayer insulating film is preferably an organic film, inorganic film or an organic-inorganic composite film. 한편, 상기 층간절연막은 무기막 및 상기 무기막 상에 적층된 유기막을 구비하는 것이 바람직하다. On the other hand, the interlayer insulating film is preferably provided stacked on the inorganic film and the inorganic film an organic film. 상기 무기막은 실리콘 산화막 또는 실리콘 질화막인 것이 바람직하다. That the said inorganic film is a silicon oxide film or silicon nitride film is preferable. 상기 유기막은 BCB(benzocyclobutene)막인 것이 바람직하다. That the organic film BCB (benzocyclobutene) membrane is preferred.
상기 평판표시장치는 상기 반도체층을 덮는 게이트 절연막, 상기 게이트 절연막 상에 위치하여 상기 게이트 전극 및 상기 신호선들을 덮는 층간절연막 및 상기 게이트 절연막과 상기 층간절연막 내에 위치하여 상기 반도체층의 일측단부를 노출시키는 제 1 소오스/드레인 콘택홀들을 더욱 포함하고, 상기 화소전극은 상기 발광영역의 층간절연막 상에 위치하되, 상기 화소구동회로영역으로 연장되어 상기 반도체층의 일측 단부에 상기 제 1 소오스/드레인 콘택홀을 통해 접하는 것이 바람직하다. The flat panel display apparatus for exposing the one end portion of the semiconductor layer to positions located on the gate insulating film, the gate insulating film which covers the semiconductor layer in the gate electrode and the interlayer insulating film and the gate insulating film and the interlayer insulating layer covering the signal line a first source / drain contact, and further includes a hole, wherein the pixel electrode, but is located in the interlayer of the light emitting region the insulating film, extending in the region to the pixel driving circuit wherein the one end of the semiconductor layer, a first source / drain contact hole, is a contact via is preferred.
이와는 달리 평판표시장치는 상기 반도체층을 덮는 게이트 절연막, 상기 게이트 절연막 상에 위치하여 상기 게이트 전극 및 상기 신호선들을 덮는 층간절연막, 상기 게이트 절연막과 상기 층간절연막 내에 위치하여 상기 반도체층의 일측 단부를 노출시키는 제 1 소오스/드레인 콘택홀 및 상기 층간절연막 상에 위치하여 상기 제 1 소오스/드레인 콘택홀을 통해 상기 반도체층의 일측 단부에 접하는 저저항전극을 더욱 포함하고, 상기 화소전극은 상기 층간절연막 상에서 상기 저저항전극에 접하는 것이 바람직하다. The flat panel display device Alternatively exposes one end of the semiconductor layer located in the interlayer located on the gate insulating film, the gate insulating film which covers the semiconductor layer covering the gate electrode and the signal line insulating film, the gate insulating film and the interlayer insulating film a first source / drain contact hole and located on the interlayer insulating film, and further comprising a low-resistance electrode in contact with one end of the semiconductor layer on the first source / drain contact hole, wherein the pixel electrode on the interlayer insulating layer to is in contact with the low-resistance electrode is preferred.
다른 한편, 상기 신호선들의 교차지점에 있어서, 어느 한 신호선은 나머지 다른 신호선 양측에 위치하여 서로 분리된 신호선 패턴들과 상기 신호선패턴들에 각각 접하면서 상기 다른 신호선과는 절연된 연결배선을 포함하는 것이 바람직하다. On the other hand, to include in the intersection of the signal lines, one signal line is insulated connection and located on the other signal lines on both sides, while each contact on the signal line pattern with one another separate signal line pattern wherein the other signal line wiring desirable.
상기 평판표시장치는 상기 반도체층과 동일층에 위치하는 하부전극 및 상기 게이트 전극과 동일층에 위치하는 상부전극을 구비하는 캐패시터를 더욱 포함하는 것이 바람직하다. The flat panel display device preferably further includes a capacitor having an upper electrode disposed on the lower electrode and the gate electrode in the same layer located on the semiconductor layer and the same layer. 또한, 상기 평판표시장치는 상기 화소전극 상에 위치하고 적어도 유기발광층을 구비하는 유기기능막을 더욱 포함하는 것이 바람직하다. In addition, the flat display device preferably further comprises an organic functional film including at least an organic emission layer positioned on the pixel electrode.
상기 기술적 과제를 이루기 위하여 본 발명은 평판표시장치의 제조방법을 제공한다. The present invention to achieve the above aspect there is provided a method of manufacturing a flat panel display device. 상기 제조방법은 매트릭스 형태로 배치된 신호선들의 교차에 의해 단위화소영역이 정의되는 평판표시장치의 제조방법에 있어서, 상기 단위화소영역 및 상기 단위화소영역 내에 화소구동회로영역과 발광영역을 갖는 기판을 제공하고, 상기 기판 상의 화소구동회로영역에 반도체층을 형성하고, 상기 반도체층을 덮는 게이트 절연막을 형성하고, 상기 게이트 절연막 상에 게이트 전극물질을 적층하고 이를 패터닝하여 상기 반도체층의 소정부분에 대응하는 게이트 전극을 형성함과 동시에 상기 신호선들을 형성하는 것을 포함한다. The manufacturing method for a substrate having an area and the light-emitting region to the pixel drive circuit in the method, the unit pixel area and the unit pixel area, the manufacturing method of the flat panel display device to which the unit pixel area defined by the intersection of the signal lines arranged in matrix form provided, and by forming a semiconductor layer in the region the pixel drive circuit on the substrate, forming a gate insulating film covering the semiconductor layer, and depositing a gate electrode material on the gate insulating film and patterned to correspond to the predetermined portion of the semiconductor layer, a gate electrode at the same time as forming includes forming the signal line.
상기 제조방법은 상기 게이트 전극과 상기 신호선들을 덮는 층간절연막을 형성하고; The manufacturing method to form an interlayer insulating film covering the gate electrode and the signal line; 상기 층간절연막 및 상기 게이트 절연막 내에 상기 반도체층의 양측 단부를 각각 노출시키는 제 1 및 제 2 소오스/드레인 콘택홀들을 형성하고; Forming the interlayer insulating film and the first and second source / drain contact hole that exposes the respective side end portions of the semiconductor layer in said gate insulating film; 상기 콘택홀들을 포함한 기판 상에 화소전극물질을 적층하고 이를 패터닝하여 상기 발광영역의 층간절연막 상에 위치하고, 상기 화소구동회로영역의 층간절연막 상으로 연장되어 상기 제 1 소오스/드레인 콘택홀을 통해 상기 반도체층의 일측단부에 접하는 화소전극을 형성함과 동시에 상기 제 2 소오스/드레인 콘택홀을 통해 상기 반도체층의 타측단부에 접하는 소오스/드레인 전극을 형성하는 것을 더욱 포함하는 것이 바람직하다. The positioned on the contact by stacking a pixel electrode material on a substrate, including, and patterning the light emitting hole area interlayer insulating film, is extended to the pixel driving circuit with an interlayer of a region the insulating film over the first source / drain contact hole, and simultaneously forming a pixel electrode in contact with one end of the semiconductor layer is preferable to further include forming a source / drain electrode in contact with the other end of the semiconductor layer on the second source / drain contact holes.
이와는 달리, 상기 제조방법은 상기 게이트 전극과 상기 신호선들을 덮는 층간절연막을 형성하고; Alternatively, the manufacturing method is to form an interlayer insulating film covering the gate electrode and the signal line; 상기 층간절연막 및 상기 게이트 절연막 내에 상기 반도체층의 양측 단부를 각각 노출시키는 제 1 및 제 2 소오스/드레인 콘택홀들을 형성하고; Forming the interlayer insulating film and the first and second source / drain contact hole that exposes the respective side end portions of the semiconductor layer in said gate insulating film; 상기 콘택홀들을 포함한 기판 상에 소오스/드레인 전극물질을 적층하고 이를 패터닝하여 상기 화소구동회로영역의 층간절연막 상에 위치하여 상기 제 1 소오스/드레인 콘택홀을 통해 상기 반도체층의 일측단부에 접하는 저저항전극을 형성함과 동시에 상기 제 2 소오스/드레인 콘택홀을 통해 상기 반도체층의 타측단부에 접하는 소오스/드레인 전극을 형성하고; That by laminating a source / drain electrode material on a substrate including the contact holes and patterned to position on the interlayer insulation film in the region to the pixel driving circuit it through the first source / drain contact holes in contact with the one end of the semiconductor layer, at the same time as forming the ohmic electrode to form a source / drain electrode in contact with the other end of the semiconductor layer on the second source / drain contact holes; 상기 발광영역의 층간절연막 상에 위치하여 상기 저저항전극에 접하는 화소전극을 형성하는 것을 더욱 포함하는 것이 바람직하다. To further include the position on the interlayer insulating film of the light emitting region to form the pixel electrode in contact with the low-resistance electrode is preferred.
이하, 본 발명을 보다 구체적으로 설명하기 위하여 본 발명에 따른 바람직한 실시예를 첨부된 도면을 참조하여 보다 상세하게 설명한다. With reference to the accompanying drawings a preferred embodiment according to the present invention in order to illustrate the present invention and more specifically will be described in detail. 그러나, 본 발명은 여기서 설명되어지는 실시예에 한정되지 않고 다른 형태로 구체화될 수도 있다. However, the invention is not limited to the embodiments set forth herein may be embodied in different forms. 오히려 여기서 소개되는 실시예는 개시된 내용이 철저하고 완전해질 수 있도록 그리고 당업자에게 본 발명의 사상이 충분히 전달될 수 있도록 하기 위해 제공되어지는 것이다. Rather, embodiments that are presented here for example is being provided to make this disclosure to be thorough and complete, and to be delivered the spirit of the invention fully to those skilled in the art. 도면들에 있어서, 층이 다른 층 또는 기판 "상"에 있다고 언급되어지는 경우에 그것은 다른 층 또는 기판 상에 직접 형성될 수 있거나 또는 그들 사이에 제 3의 층이 개재될 수도 있다. In the drawings, the layers are to be mentioned is that in case the other layer or substrate "a" between it can be formed directly on the other layer or substrate, or they may be interposed in the third layer. 명세서 전체에 걸쳐서 동일한 참조번호들은 동일한 구성요소를 나타낸다. The same reference numerals throughout the specification denote like components.
도 3은 본 발명의 제 1 및 제 2 실시예에 따른 유기전계발광표시장치를 나타낸 평면도로서, 단위화소영역에 한정하여 나타낸 도면이다. Figure 3 is a plan view showing an organic light emitting display according to the first and second embodiments of the present invention, the view showing the confines of a unit pixel area.
도 3을 참조하면, 기판 상에 매트릭스 형태로 배열된 신호선들에 의해 단위화소영역이 정의된다. Referring to Figure 3, a unit pixel is defined by the area of the signal lines arranged in a matrix form on the substrate. 상기 신호선들은 일방향으로 배열된 데이터라인(325), 상기 데이터라인(325)에 소정간격 이격되어 위치하고 상기 데이터라인(325)과 평행한 공통전원라인(327) 및 상기 데이터라인(325)과 상기 공통전원라인(327)에 교차하는 스캔라인을 포함한다. The signal lines are the common and data lines 325 arranged in one direction, the data lines 325, common power line 327 and the data lines 325 a located the predetermined distance apart parallel to the data line 325 to the It includes scan lines crossing the power line 327. 상기 스캔라인은 상기 데이터라인(325) 또는 상기 공통전원라인(327)과의 교차지점에 있어서, 상기 데이터라인(325) 또는 상기 공통전원라인(327) 양측에 위치하여 서로 분리된 스캔라인패턴들(329) 및 상기 스캔라인패턴들(329)에 배선콘택홀들(330d)을 통해 각각 접하면서 상기 데이터라인(325) 또는 상기 공통전원라인(327)과는 절연된 연결배선(347)을 포함한다. The scan line is in the point of intersection with the data line 325 or the common power line 327, the data lines 325, or the common power line 327 located on both sides are separated from each other scan line pattern and 329 and while in contact, respectively through a wiring contact hole, the (330d) to the scan line pattern 329, the data line 325 or the common power supply line 327 comprises an insulated connection wire (347) do. 상기 스캔라인은 구동할 단위화소를 선택하며, 상기 데이터 라인(325)은 상기 선택된 단위화소에 전압을 인가한다. The scan line is selected to drive the unit pixel, the data lines 325 and applies a voltage to the selected pixel unit.
상기 단위화소영역은 발광영역(a) 및 화소구동회로영역(b)으로 구분되며, 상기 발광영역(a)에는 유기전계발광다이오드(447)가 위치한다. The unit pixel area is divided into a region (b) a light emitting region (a) and a pixel drive circuit, the light emitting region (a), where the organic light emitting diode (447). 또한, 상기 화소구동회로영역(b)에는 상기 스캔라인에 인가된 신호에 따라 상기 데이터라인(325)에 인가된 데이터신호를 스위칭하는 스위칭 박막트랜지스터(445), 상기 스위칭 박막트랜지스터(445)를 통해 인가되는 데이터 신호를 일정기간 유지하기 위한 캐패시터(443) 및 상기 스위칭 박막트랜지스터(445)를 통해 인가되는 데이터 신호에 의해 상기 유기전계발광다이오드(447)에 전류를 인가하는 화소구동 박막트랜지스터(441)가 위치한다. In addition, through the switching TFT 445, the switching thin film transistor 445 for switching the data signal supplied to the data line 325, the pixel driving circuit, the region (b) in accordance with a signal applied to the scan line a capacitor for holding a data signal applied to a given time period (443) and a pixel driving thin film transistor 441, by the data signal applied via the switching thin film transistor 445, applying a current to the organic light emitting diode (447) It is located.
상기 유기전계발광다이오드(447)는 화소전극(350), 상기 화소전극(350) 상에 위치한 유기발광층을 포함한 유기기능막(미도시) 및 대향전극(미도시)을 포함한다. The organic light emitting diode 447 includes a pixel electrode 350, the pixel electrode (not shown), an organic functional layer including an organic emission layer positioned on the (350) and the counter electrode (not shown). 상기 화소구동 박막트랜지스터(441)는 반도체층(310), 게이트 전극(320) 및 소오스/드레인 전극(345)을 포함하고, 상기 화소전극(350)은 상기 화소구동회로영역으로 연장되어 제 1 소오스/드레인 콘택홀(330a)을 통해 상기 반도체층(310)의 일측 단부에 접한다. The pixel driving thin film transistor 441 includes a semiconductor layer 310, gate electrode 320 and source / drain electrodes 345, and includes the pixel electrode 350 extends in the region to the pixel drive circuit a first source through / drain contact hole (330a) abuts against one end of the semiconductor layer 310. 또한, 상기 소오스/드레인 전극(345)은 연결콘택홀(330c)을 통해 상기 공통전원라인(327)에 접함과 동시에 제 2 소오스/드레인 콘택홀(330b)을 통해 상기 반도체층(310)의 타측 단부에 접한다. Further, the source / drain electrode 345 of connecting the contact holes (330c) of the semiconductor layer 310 through the second source / drain contact hole (330b) at the same time as facing the common power line 327 through the other side tangent to the end.
이와는 달리, 상기 화소구동 박막트랜지스터(441)는 상기 반도체층(310), 상기 게이트 전극(320), 저저항전극(미도시) 및 상기 소오스/드레인 전극(345)을 구비할 수 있다. Alternatively, the pixel-driving thin-film transistor 441 may include the semiconductor layer 310, the gate electrode 320, a low-resistance electrode (not shown) and the source / drain electrode 345. 이 경우, 상기 저저항전극은 상기 반도체층(310)의 일측 단부 및 상 기 화소전극(350)에 동시에 접한다. In this case, the low-resistance electrode touches at the same time at one end and a group pixel electrode 350 of the semiconductor layer (310).
상기 캐패시터(443)는 상기 화소구동 박막트랜지스터(441)의 게이트 전극(320)에 연결된 상부전극(321) 및 하부전극(311)을 구비한다. The capacitor 443 has an upper electrode 321 and lower electrode 311 connected to the gate electrode 320 of the pixel-driving thin-film transistor 441. 상기 하부전극(311)은 콘택홀들 및 캐패시터 연결배선(341)에 의해 상기 공통전원라인(327)과 전기적으로 연결된다. The lower electrode 311 is electrically connected to the common power line 327 by the contact hole and connected to the capacitor wiring 341. 상기 스위칭 박막트랜지스터(445)는 상기 스캔라인과 연결된 게이트 전극(323), 반도체층(313), 상기 캐패시터(443)의 상부전극(321)과 상기 반도체층(313)의 일측 단부에 콘택홀들을 통해 각각 접하는 소오스/드레인 전극(349) 및 상기 데이터라인(325)과 상기 반도체층(313)의 타측 단부에 콘택홀들을 통해 각각 접하는 소오스/드레인 전극(348)을 포함한다. The switching thin film transistor 445 is a contact hole at one end of the gate electrode 323, a semiconductor layer 313, an upper portion of the capacitor (443) electrode 321 and the semiconductor layer 313 that is associated with the scan lines through each contact includes a source / drain electrode 349 and the data line 325 and the source / drain electrode 348 in contact respectively with the contact hole on the other end of the semiconductor layer 313.
도 4a 및 도 4b는 도 3의 절단선 I-I'를 따라 취해지고, 도 5a 및 도 5b는 도 3의 절단선 Ⅱ-Ⅱ'를 따라 취해진 본 발명의 제 1 실시예에 따른 유기전계발광표시장치의 제조방법을 설명하기 위한 단면도들이다. Figures 4a and 4b are an organic light emitting according to a first embodiment of the present invention taken along the road "cutting line Ⅱ-Ⅱ a is taken along, Figures 5a and 5b Fig. 3, the cutting line I-I of 3 They are sectional views illustrating a method of manufacturing the display device.
도 4a 및 도 5a를 참조하면, 발광영역(a), 화소구동회로영역(b) 및 이들을 제외한 배선영역을 갖는 기판(300)을 제공한다. When FIG. 4a and FIG. 5a, provides a light emitting region (a), the pixel drive circuit regions (b) and these substrate 300 having a wiring region, excluding. 상기 기판(300)은 유리 또는 플라스틱 기판 일 수 있다. The substrate 300 may be a glass or plastic substrate. 상기 기판(300) 상에 버퍼층(305)을 형성한다. To form a buffer layer 305 on the substrate 300. 상기 버퍼층(305)은 상기 기판(300)으로부터 유출되는 알칼리 이온과 같은 불순물로부터 후속하는 공정에서 형성되는 박막트랜지스터를 보호하기 위한 층으로, 실리콘 산화막 또는 실리콘 질화막으로 형성할 수 있다. The buffer layer 305 is a layer for protecting a TFT formed in the subsequent step of from impurities such as alkali ions leaked from the substrate 300 can be formed of a silicon oxide film or silicon nitride film.
상기 화소구동회로영역(b)의 버퍼층(305)상에 비정질 실리콘막을 적층하고, 이를 결정화하여 다결정 실리콘막을 형성하는 것이 바람직하다. The pixel driving circuit of the laminated amorphous silicon layer on the buffer layer 305 in the area (b), and it is preferable to form a polycrystalline silicon film which was crystallized. 상기 다결정 실리 콘막을 제 1 마스크를 사용하여 패터닝함으로써, 양측 단부(310a, 310b)를 갖는 반도체층(310) 및 하부전극(311)을 형성한다. By patterning by using the polycrystalline silicon film a first mask to form a semiconductor layer having a side end portions (310a, 310b), (310) and the lower electrode 311. 그리고 나서, 상기 반도체층(310) 및 상기 하부전극(311)을 포함한 기판 전면에 게이트 절연막(315)을 형성한다. Then, a gate insulating film 315 over the entire surface of the substrate including the semiconductor layer 310 and the lower electrode 311. 상기 비정질 실리콘 막을 결정화하는 것은 ELA(Excimer Laser Annealing), SLS(Sequential Lateral Solidification), MIC(Metal Induced Crystallization) 또는 MILC(Matal Induced Lateral Crystallization)법을 사용하여 수행할 수 있다. The crystallization of the amorphous silicon film may be carried out using the ELA (Excimer Laser Annealing), SLS (Sequential Lateral Solidification), MIC (Metal Induced Crystallization) or MILC (Matal Induced Lateral Crystallization) method.
이어서, 상기 게이트 절연막(315) 상에 게이트 전극물질을 적층하고 이를 제 2 마스크를 사용하여 패터닝함으로써, 상기 반도체층(310)의 소정부분에 대응하는 게이트 전극(320)을 형성한다. Then, by laminating a gate electrode material on the gate insulating film 315 and patterning it using a second mask to form a gate electrode 320 corresponding to a predetermined portion of the semiconductor layer 310. 상기 게이트 전극(320)을 형성함과 동시에 상기 하부전극(311)에 대응되는 상부전극(321)을 형성하고, 상기 배선영역 상에 데이터라인(325), 공통전원라인(327) 및 스캔라인패턴(329)을 형성한다. Forming the gate electrode 320, and at the same time, the upper electrode 321, the formation, on the wiring area, the data lines 325, common power line 327 and the scan line pattern corresponding to the lower electrode 311 to form 329. 상기 게이트 전극물질은 알루미늄(Al), 알루미늄 합금(Al alloy), 몰리브덴(Mo), 몰리브덴 합금(Mo alloy)으로 이루어진 군에서 선택되는 하나인 것이 바람직하다. The gate electrode material is preferably one selected from the group consisting of aluminum (Al), aluminum alloy (Al alloy), molybdenum (Mo), molybdenum alloy (Mo alloy). 더욱 바람직하게는 상기 게이트 전극물질은 몰리브덴-텅스텐 합금이다. More preferably the gate electrode material is molybdenum-tungsten alloy.
이어서, 상기 게이트 전극(320), 상부전극(321), 데이터라인(325), 공통전원라인(327) 및 스캔라인패턴(329)을 덮는 층간절연막(330)을 형성한다. Then, to form the gate electrode 320, an upper electrode 321, the data lines 325, common power line 327 and the interlayer insulating layer 330 covering the scan line pattern 329. 상기 층간절연막(330)은 유기막, 무기막 또는 유·무기복합막으로 형성할 수 있다. The interlayer insulating layer 330 may be formed of an organic film, inorganic film or an organic-inorganic composite film. 상기 층간절연막(330)을 유기막 및 무기막의 복합막으로 형성하는 것은 무기막 상에 유기막을 적층함으로써 수행하는 것이 바람직하다. The formation of the interlayer insulating film 330, an organic layer and an inorganic layer compound film is preferably carried out by laminating an organic film on the inorganic film. 상기 유기막은 BCB(benzocyclobutene) 막인 것이 바람직하고, 상기 무기막은 실리콘 산화막 또는 실리콘 질화막인 것이 바람직하다. It is the organic film BCB (benzocyclobutene) is preferable, and a film, wherein the inorganic film is a silicon oxide film or silicon nitride film is preferable.
이어서, 제 3 마스크를 사용하여 상기 층간절연막(330) 및 상기 게이트 절연막(315) 내에 상기 반도체층(310)의 양측 단부(310a, 310b)를 각각 노출시키는 제 1 소오스/드레인 콘택홀(330a) 및 제 2 소오스/드레인 콘택홀(330b)을 형성한다. A first source / drain contact hole (330a) is then, using a third mask for each exposing respective side end portions (310a, 310b) of the semiconductor layer 310 in the interlayer insulating film 330 and the gate insulating film 315 and second to form a source / drain contact hole (330b). 이와 동시에 상기 층간절연막(330) 내에 상기 배선영역의 공통전원라인(327)을 노출시키는 연결콘택홀(330c) 및 상기 데이터라인(325)의 양측에 위치한 상기 스캔라인패턴들(329)을 각각 노출시키는 배선콘택홀들(330d)을 형성한다. At the same time, expose the connection contact hole (330c) and the scan line patterns (329) located at both sides of the data line (325) for exposing the common power line 327 of the wiring region in the interlayer insulating film 330, respectively, to form wiring contact holes (330d) of.
이어서, 상기 콘택홀들(330a, 330b, 330c, 330d)들이 형성된 기판 상에 화소전극물질을 적층하고 이를 제 4 마스크를 사용하여 패터닝함으로써, 화소전극(350), 소오스/드레인 전극(345) 및 연결배선(347)을 형성한다. Then, each of the contact holes (330a, 330b, 330c, 330d) are, by patterning by using the pixel electrode material laminated to this, a fourth mask for the image formed substrate, the pixel electrode 350, source / drain electrodes 345 and to form the connection wiring 347. 상기 화소전극(350)은 상기 발광영역(a)의 층간절연막(330) 상에 위치하고 상기 화소구동회로영역(b)으로 연장되어 상기 제 1 소오스/드레인 콘택홀(330a)을 통해 상기 반도체층(310)의 일측 단부(310a)에 접하도록 형성된다. The pixel electrode 350 of the semiconductor layer located on the interlayer insulating layer 330 of the light emitting region (a) extends in the area (b) in the pixel drive circuit via the first source / drain contact hole (330a) ( 310) is formed in contact with the one end (310a). 상기 소오스/드레인 전극(345)은 상기 화소구동회로영역(b)의 층간절연막(330) 상에 위치하여 상기 제 2 소오스/드레인 콘택홀(330b)을 통해 상기 반도체층(310)의 타측 단부(310b)에 접함과 동시에 상기 배선영역으로 연장되어 상기 연결콘택홀(330c)을 통해 상기 공통전원라인(327)에 접하도록 형성된다. The other end of the semiconductor layer 310, the source / drain electrodes 345 are positioned on the interlayer insulating film 330 of the region (b), the pixel driving circuit via the second source / drain contact hole (330b) ( At the same time the tangent on 310b) extends in the wiring region is formed in contact with the common power line 327 through the connection contact hole (330c). 이로써, 상기 반도체층(310), 상기 게이트 전극(320), 상기 화소구동회로영역(b)의 화소전극(330) 및 소오스/드레인 전극(335)을 구비하는 화소구동 박막트랜지스터를 형성한다. Thus, to form a pixel-driving thin-film transistor having the semiconductor layer 310, the gate electrode 320, the pixel electrode 330 and source / drain electrodes 335 of the region (b), the pixel driving circuit.
한편, 상기 연결배선(347)은 상기 배선영역 상의 층간절연막(330) 상에 상기 데이터라인(325)에 절연되면서 위치하고, 상기 배선콘택홀들(330c)을 통해 상기 스캔라인패턴들(329)에 각각 접한다. On the other hand, to the connection wiring 347 is the scan line pattern through on the dielectric interlayer 330 is positioned as isolated in the data lines 325, each of the wiring contact holes (330c) on the wiring region 329 abut each.
상기 화소전극물질은 ITO(Indium Tin Oxide) 또는 IZO(Indium Zinc Oxide)일 수 있다. The pixel electrode material may be ITO (Indium Tin Oxide) or IZO (Indium Zinc Oxide). 이와는 달리, 상기 화소전극물질은 Mg, Ca, Al, Ag, Ba 또는 이들의 합금일 수 있다. In contrast may be different, the pixel electrode material is Mg, Ca, Al, Ag, Ba or an alloy thereof. 이 경우, 화소전극(350)과 소오스/드레인 전극(345)은 한층의 전도성막 적층구조를 갖도록 형성된다. In this case, the pixel electrode 350 and the source / drain electrode 345 is formed to have a stacked structure of the conductive film further. 한편, 상기 화소전극물질은 제 1 화소전극물질과 상기 제 1 화소전극물질 상에 적층된 제 2 화소전극물질을 포함할 수 있다. On the other hand, the pixel electrode material may include a second pixel electrode material is deposited on the first pixel electrode material as that of the first pixel electrode material. 이 경우, 상기 화소전극(350) 및 상기 소오스/드레인 전극(345)은 두층의 전도성막 적층구조를 갖도록 형성된다. In this case, the pixel electrode 350 and the source / drain electrode 345 is formed to have a conductive film laminated structure of two layers. 상기 제 1 화소전극물질은 ITO(Indium Tin Oxide) 또는 IZO(Indium Zinc Oxide)인 것이 바람직하고, 상기 제 2 화소전극물질은 알루미늄-네오디늄(AlNd)인 것이 바람직하다. The first pixel electrode materials are ITO (Indium Tin Oxide) or IZO (Indium Zinc Oxide) is preferably, and the second pixel electrode material is aluminum - preferably a neodymium (AlNd).
도 4b 및 도 5b를 참조하면, 상기 화소전극(350), 상기 소오스/드레인 전극(345) 및 상기 연결배선(347)을 덮는 화소정의막(375)을 형성하는 것이 바람직하다. 4b there is shown with reference to Figure 5b, it is desirable to form the pixel electrode 350, the source / drain electrodes 345 and the pixel defining layer (375) covering the connection wiring (347). 상기 화소정의막(375)은 BCB(benzocyclobutene), 아크릴계 고분자 및 폴리이미드(polyimide)로 이루어진 군에서 선택되는 하나를 사용하여 형성할 수 있다. The pixel defining layer 375 may be formed using one selected from the group consisting of BCB (benzocyclobutene), acryl polymer, and polyimide (polyimide).
이어서, 제 5 마스크를 사용하여 상기 화소정의막(375)내에 상기 발광영역(a)의 화소전극(350)을 노출시키는 개구부(375a)를 형성한다. Then, by using a fifth mask to form an opening (375a) exposing the pixel electrode 350 of the light emitting region (a) in the pixel defining layer (375). 그리고 나서, 상기 개구부(375a)내에 노출된 화소전극(350) 상에 적어도 유기발광층을 구비하는 유기기능막(400)을 형성한다. Then, to form the opening the organic functional film (400) having at least an organic emission layer on the exposed pixel electrode 350 in a (375a). 상기 유기기능막(400)은 정공주입층(HIL), 정공수송층(HTL), 정공저지층(HBL), 전자수송층(ETL) 및 전자주입층(EIL)로 이루어진 군에서 선택되는 하나 이상을 더욱 포함하는 것이 바람직하다. The organic function layer 400 is further at least one selected from the group consisting of a hole injection layer (HIL), a hole transport layer (HTL), a hole blocking layer (HBL), an electron transport layer (ETL) and an electron injection layer (EIL) to include preferred. 그리고 나서, 상기 유기기능막(400) 상에 대향전극(420)을 형성한다. Then, to form the opposite electrode 420 on the organic functional film (400). 이로써, 상기 화소전극(330), 상기 대향전극(420) 및 그 사이에 개재된 유기기능막(400)으로 이루어진 유기전계발광다이오드를 형성한다. Thus, to form an organic light emitting diode composed of the pixel electrode 330, the opposite electrode 420 and the organic functional film 400 interposed therebetween.
본 실시예에 있어서는 총 5매의 마스크를 사용하여 유기전계발광표시장치를 제조하였다. In the present embodiment by using a mask of 5 of the sheet was produced an organic light emitting display device. 또한, 상기 화소전극(350)을 상기 제 1 소오스/드레인 콘택홀(330a)을 통해 화소구동 박막트랜지스터의 반도체층(310)에 직접 접하도록 형성함으로써, 비아홀(도 2의 160a)의 형성공정 및 상기 비아홀(도 2의 160a)이 위치한 비아홀 절연막(160)의 형성공정을 줄일 수 있다. In addition, the process and the formation of the pixel electrode 350, the first source / drain contact hole (330a), the pixel drive formed so as to directly contact with the semiconductor layer 310 of the thin film transistor, via holes (160a in FIG. 2) through wherein the via hole (Fig. 160a in Fig. 2) it is possible to reduce the step of forming the via hole in the insulating film 160.
도 6a 및 도 6b는 도 3의 절단선 I-I'를 따라 취해지고, 도 7a 및 도 7b는 도 3의 절단선 Ⅱ-Ⅱ'를 따라 취해진 본 발명의 제 2 실시예에 따른 유기전계발광표시장치의 제조방법을 설명하기 위한 단면도들이다. Figures 6a and 6b are an organic light emitting according to a second embodiment of the present invention taken along the road "cutting line Ⅱ-Ⅱ a is taken along, and Fig. 7a and 7b 3 'section line I-I of 3 They are sectional views illustrating a method of manufacturing the display device.
도 6a 및 도 7a를 참조하면, 발광영역(a), 화소구동회로영역(b) 및 이들을 제외한 배선영역을 갖는 기판(300)을 제공한다. 6a, there is shown, see Figure 7a, and provides a light emitting region (a), the pixel drive circuit regions (b) and these substrate 300 having a wiring region, excluding. 상기 기판(300)은 유리 또는 플라스틱 기판 일 수 있다. The substrate 300 may be a glass or plastic substrate. 상기 기판(300) 상에 버퍼층(305)을 형성한다. To form a buffer layer 305 on the substrate 300. 상기 버퍼층(305)은 상기 기판(300)으로부터 유출되는 알칼리 이온과 같은 불순물로부터 후속하는 공정에서 형성되는 박막트랜지스터를 보호하기 위한 층으로, 실리콘 산화막 또는 실리콘 질화막으로 형성할 수 있다. The buffer layer 305 is a layer for protecting a TFT formed in the subsequent step of from impurities such as alkali ions leaked from the substrate 300 can be formed of a silicon oxide film or silicon nitride film.
이어서, 상기 콘택홀들(330a, 330b, 330c, 330d)들이 형성된 기판 상에 소오스/드레인 전극물질을 적층하고 이를 제 4 마스크를 사용하여 패터닝함으로써, 저저항전극(346), 소오스/드레인 전극(345) 및 연결배선(347)을 형성한다. Then, the contact holes (330a, 330b, 330c, 330d) are stacked with the source / drain electrode material on a substrate is formed, and by patterning it by using a fourth mask, a low-resistance electrode 346, source / drain electrodes ( 345) and to form a connection wiring 347. 상기 저저항전극(346)은 상기 화소구동회로영역(b)의 층간절연막 상에 위치하여 상기 제 1 소오스/드레인 콘택홀(330a)을 통해 상기 반도체층(310)의 일측 단부(310a)에 접한다. The low-resistance electrode 346 touches the one end (310a) of the semiconductor layer 310 through the first source / drain contact holes (330a) located on the interlayer insulating film of the region (b) in the pixel driver . 이와는 달리, 상기 저저항전극(346)은 상기 발광영역(a)의 층간절연막(330) 상으로 연장되도록 형성할 수도 있다. Alternatively, the low resistance electrode 346 may be formed to extend onto the interlayer insulating film 330 of the light emitting region (a). 상기 소오스/드레인 전극(345)은 상기 화소구동회로영역(b)의 층간절연막(330) 상에 위치하여 상기 제 2 소오스/드레인 콘택홀(330b)을 통해 상기 반도체층(310)의 타측 단부(310b)에 접함과 동시에 상기 배선영역으로 연장되어 상기 연결콘택홀(330c)을 통해 상기 공통전원라인(327)에 접한다. The other end of the semiconductor layer 310, the source / drain electrodes 345 are positioned on the interlayer insulating film 330 of the region (b), the pixel driving circuit via the second source / drain contact hole (330b) ( At the same time the tangent on 310b) extends in the wiring region abuts on the common power line 327 through the connection contact hole (330c). 이로써, 상기 반도체층(310), 상기 게이트 전극(320), 상기 저저항전극(346) 및 소오스/드레인 전극(335)을 구비하는 화소구동 박막트랜지스터를 형성한다. Thus, to form a pixel-driving thin-film transistor having the semiconductor layer 310, the gate electrode 320, the low-resistance electrode 346 and source / drain electrode 335.
한편, 상기 연결배선(347)은 상기 배선영역 상의 층간절연막(330) 상에 상기 데이터라인(325)에 절연되면서 위치하고, 상기 배선콘택홀들(330d)을 통해 상기 스캔라인패턴들(329)에 각각 접한다. On the other hand, to the connection wiring 347 is the scan line pattern through on the dielectric interlayer 330 is positioned as isolated in the data lines 325, each of the wiring contact hole (330d) on the wiring region 329 abut each.
상기 소오스/드레인 전극물질은 알루미늄(Al), 알루미늄 합금(Al alloy), 몰리브덴(Mo), 몰리브덴 합금(Mo alloy)으로 이루어진 군에서 선택되는 하나인 것이 바람직하다. The source / drain electrode material is preferably one selected from the group consisting of aluminum (Al), aluminum alloy (Al alloy), molybdenum (Mo), molybdenum alloy (Mo alloy). 더욱 바람직하게는 상기 소오스/드레인 전극물질은 몰리브덴-텅스텐 합금이다. More preferably, the source / drain electrode material is molybdenum-tungsten alloy. 상기 소오스/드레인 전극물질은 전도성이 높은 물질이다. The source / drain electrode material is a highly conductive material. 따라서, 상기 저저항전극(346), 소오스/드레인 전극(345) 및 연결배선(347)을 상기 소오스/드레인 전극물질을 사용하여 형성함으로써, 제 1 실시예에 비해 콘택저항 및 배선저항을 낮출 수 있다. Therefore, the low-resistance electrode 346, source / drain electrodes 345 and the connection wiring 347, the source / formed with the drain electrode material, the comparison with the first embodiment can reduce the contact resistance and the wiring resistance have. 상기 저저항전극(346)이라 함은 ITO(indium tin oxide) 보다 저항이 낮은 물질로 이루어진 전극을 말한다. As the low-resistance electrode 346 means a lower electrode made of the resistance material (indium tin oxide), ITO.
이어서, 상기 발광영역(a)의 층간절연막(330) 상에 화소전극(350)을 제 5 마스크를 사용하여 형성한다. Then, to form a pixel electrode 350 on the interlayer insulating layer 330 of the light emitting region (a) by using a fifth mask. 상기 화소전극(350)을 형성하는 것은 섀도우 마스크(제 5 마스크)를 사용하여 화소전극 물질을 진공증착함으로써 수행하거나, 기판 전면에 상기 화소전극 물질을 적층하고 이를 포토마스크(제 5 마스크)를 사용하여 패터닝함으로써 수행할 수 있다. The formation of the pixel electrode 350, using a shadow mask (Fifth mask) the pixel electrode material a carried out by vacuum deposition, or laminating the pixel electrode material over the entire surface of the substrate, and this photomask using (Fifth mask) and it may be carried out by patterning. 상기 화소전극(350)은 상기 층간절연막(330) 상에서 상기 저저항전극(346)에 접하도록 형성된다. The pixel electrode 350 is formed in contact with the low-resistance electrode 346 on the interlayer insulating layer 330. The 상기 저저항전극(346)이 상기 발광영역(a)으로 연장된 경우는 상기 화소전극(350)은 상기 저저항전극(346) 상에 형성되는 것이 바람직하다. If the low-resistance electrode 346 is extended to the light emitting region (a) it is preferable that the pixel electrode 350 is formed on the low resistance electrode 346.
상기 화소전극물질은 ITO(Indium Tin Oxide) 또는 IZO(Indium Zinc Oxide)일 수 있다. The pixel electrode material may be ITO (Indium Tin Oxide) or IZO (Indium Zinc Oxide). 이와는 달리, 상기 화소전극물질은 Mg, Ca, Al, Ag, Ba 또는 이들의 합금일 수 있다. In contrast may be different, the pixel electrode material is Mg, Ca, Al, Ag, Ba or an alloy thereof. 이 경우, 화소전극(350)은 한층의 전도성막 적층구조를 갖도록 형성된다. In this case, the pixel electrode 350 is formed to have a stacked structure of the conductive film further. 한편, 상기 화소전극물질은 제 1 화소전극 물질과 상기 제 1 화소전극 물질 상에 적층된 제 2 화소전극 물질을 포함할 수 있다. On the other hand, the pixel electrode material may include a second pixel electrode material is deposited on the first pixel electrode material as that of the first pixel electrode material. 이 경우, 상기 화소전극(350)은 두층의 전도성막 적층구조를 갖도록 형성된다. In this case, the pixel electrode 350 is formed to have a conductive film laminated structure of two layers. 상기 제 1 화소전극 물질은 ITO(Indium Tin Oxide) 또는 IZO(Indium Zinc Oxide)인 것이 바람직하고, 상기 제 2 화소전극 물질은 알루미늄-네오디늄(AlNd)인 것이 바람직하다. The first pixel electrode materials are ITO (Indium Tin Oxide) or IZO (Indium Zinc Oxide) is preferably, and the second pixel electrode material is aluminum - preferably a neodymium (AlNd).
도 6b 및 도 7b를 참조하면, 상기 화소전극(350), 상기 저저항전극(346), 상기 소오스/드레인 전극(345) 및 상기 연결배선(347)을 덮는 화소정의막(375)을 형성하는 것이 바람직하다. When Figure 6b with reference to Figure 7b, forming the pixel electrode 350, the low-resistance electrode 346, the source / drain electrodes 345 and the pixel defining layer (375) covering the connection wiring 347 it is desirable. 상기 화소정의막(375)은 BCB(benzocyclobutene), 아크릴계 고분자 및 폴리이미드(polyimide)로 이루어진 군에서 선택되는 하나를 사용하여 형성할 수 있다. The pixel defining layer 375 may be formed using one selected from the group consisting of BCB (benzocyclobutene), acryl polymer, and polyimide (polyimide).
이어서, 제 6 마스크를 사용하여 상기 화소정의막(375)내에 상기 발광영역(a)의 화소전극(350)을 노출시키는 개구부(375a)를 형성한다. Then, using a sixth mask to form an opening (375a) exposing the pixel electrode 350 of the light emitting region (a) in the pixel defining layer (375). 그리고 나서, 상기 개구부(375a)내에 노출된 화소전극(350) 상에 적어도 유기발광층을 구비하는 유기기능막(400)을 형성한다. Then, to form the opening the organic functional film (400) having at least an organic emission layer on the exposed pixel electrode 350 in a (375a). 상기 유기기능막(400)은 정공주입층(HIL), 정공수송층(HTL), 정공저지층(HBL), 전자수송층(ETL) 및 전자주입층(EIL)로 이루어진 군에서 선택되는 하나 이상을 더욱 포함하는 것이 바람직하다. The organic function layer 400 is further at least one selected from the group consisting of a hole injection layer (HIL), a hole transport layer (HTL), a hole blocking layer (HBL), an electron transport layer (ETL) and an electron injection layer (EIL) to include preferred. 그리고 나서, 상기 유기기능막(400) 상에 대향전극(420)을 형성한다. Then, to form the opposite electrode 420 on the organic functional film (400). 이로써, 상기 화소전극(330), 상기 대향전극(420) 및 그 사이에 개재된 유기기능막(400)으로 이루어진 유기전계발 광다이오드를 형성한다. Thus, to form the organic EL light diode consisting of the pixel electrode 330, the opposite electrode 420 and the organic functional film 400 interposed therebetween.
본 실시예에 있어서는 총 6매의 마스크를 사용하여 유기전계발광표시장치를 제조하였다. In the present embodiment by using a mask of a total of 6 sheets it was produced an organic light emitting display device. 또한, 상기 화소전극(350)을 상기 층간절연막(330) 상에서 상기 저저항전극(346)과 접하도록 형성함으로써, 비아홀(도 2의 160a)의 형성공정 및 상기 비아홀(도 2의 160a)이 위치한 비아홀 절연막(도 2의 160)의 형성공정을 줄일 수 있다. Further, by forming so as to be in contact with the low-resistance electrode 346 to the pixel electrode 350 on the interlayer insulating layer 330, the forming step and the via hole (Fig. 160a 2) of the via hole (160a in FIG. 2) in a via hole formation process of the insulating film can be reduced (FIG. 2 at 160).
상술한 바와 같이 본 발명에 따르면, 제조에 필요한 마스크 개수가 감소되고, 화소전극과 화소구동 박막트랜지스터를 전기적으로 연결하기 위한 비아홀의 형성공정 및 상기 비아홀이 위치한 비아홀 절연막의 형성공정이 줄어든 평판표시장치를 얻을 수 있다. According to the invention as described above, a mask count necessary for production is reduced, and reduced the process of forming the pixel electrodes and the forming of the via-hole process for electrically connecting the pixel-driving thin-film transistor and the via hole in the via hole insulating flat panel display the can get.
상기 화소구동 박막트랜지스터에 전기적으로 연결되고, 상기 발광영역에 위치하는 화소전극을 포함하는 것을 특징으로 하는 평판표시장치. It is electrically coupled to the pixel driving thin film transistor, a flat panel display device comprises a pixel electrode disposed on the light emitting region.
상기 화소전극은 상기 화소구동회로영역으로 연장되어 상기 반도체층의 일측 단부에 접하는 것을 특징으로 하는 평판표시장치. The pixel electrode is a flat panel display device, characterized in that extending in the region to the pixel driving circuit in contact with one end of the semiconductor layer.
상기 화소구동 박막트랜지스터는 상기 반도체층의 타측 단부와 상기 신호선들중 어느 하나에 동시에 접하는 소오스/드레인 전극을 더 포함하는 것을 특징으로 하는 평판표시장치. The pixel driving thin film transistor flat panel display device further comprises a source / drain electrode in contact with at the same time in any one of the other side end portion and the signal line of the semiconductor layer.
상기 화소전극과 상기 소오스/드레인 전극은 동일물질로 이루어진 것을 특징으로 하는 평판표시장치. The pixel electrode and the source / drain electrodes is a flat panel display device, characterized in that made up of the same material.
상기 화소전극과 상기 소오스/드레인 전극은 적어도 한 층의 전도성막 적층구조를 갖는 것을 특징으로 하는 평판표시장치. The pixel electrode and the source / drain electrodes is a flat panel display device comprising the conductive film laminated structure of at least one layer.
상기 화소구동 박막트랜지스터는 상기 반도체층의 일측 단부 및 상기 화소전극에 동시에 접하는 저저항전극을 더 포함하는 것을 특징으로 하는 평판표시장치. The pixel driving thin film transistor flat panel display device further comprises a low-resistance contact electrode at the same time at one end and the pixel electrode of the semiconductor layer.
상기 저저항전극 및 상기 소오스/드레인 전극은 알루미늄, 알루미늄합금, 몰리브덴 및 몰리브덴합금으로 이루어진 군에서 선택되는 어느 하나로 이루어진 것을 특징으로 하는 평판표시장치. The low-resistance electrode and a flat panel display device characterized in that is made by any one the source / drain electrodes are selected from the group consisting of aluminum, aluminum alloys, molybdenum and molybdenum alloys.
상기 게이트 절연막 상에 위치하여 상기 게이트 전극 및 상기 신호선들을 덮는 층간절연막을 더 포함하는 것을 특징으로 하는 평판표시장치. The flat panel display according to claim positioned on the gate insulating film further comprising an interlayer insulating film covering the gate electrode and the signal line.
상기 층간절연막은 유기막, 무기막 및 유·무기복합막 중 어느 하나로 이루어진 것을 특징으로 하는 평판표시장치. The interlayer insulating film is a flat panel display device, characterized in that made by any of the organic film, an inorganic film and an organic-inorganic composite film.
상기 층간절연막은 무기막 및 상기 무기막 상에 적층된 유기막을 구비하는 것을 특징으로 하는 평판표시장치. The interlayer insulating film is a flat panel display device comprising the laminated on the inorganic film and the inorganic film an organic film.
상기 무기막은 실리콘 산화막 또는 실리콘 질화막인 것을 특징으로 하는 평판표시장치. The flat panel display device, characterized in that the inorganic film is silicon oxide or silicon nitride.
상기 유기막은 BCB(benzocyclobutene)막인 것을 특징으로 하는 평판표시장치. The flat panel display device, characterized in that the organic film BCB (benzocyclobutene) film.
상기 화소전극은 상기 발광영역의 층간절연막 상에 위치하되, 상기 화소구동회로영역으로 연장되어 상기 반도체층의 일측 단부에 상기 제 1 소오스/드레인 콘택홀을 통해 접하는 것을 특징으로 하는 평판표시장치. The pixel electrode is a flat panel display device, it characterized in, but placed on the inter-layer insulating film of the light emitting area, and extend in the region to the pixel driving circuit to the one end of the semiconductor layer in contact with the first source / drain contact holes.
상기 화소전극은 상기 층간절연막 상에서 상기 저저항전극에 접하는 것을 특징으로 하는 평판표시장치. The pixel electrode is a flat panel display device, characterized in that in contact with the low-resistance electrode on the interlayer insulating film.
상기 반도체층과 동일층에 위치하는 하부전극 및 상기 게이트 전극과 동일층에 위치하는 상부전극을 구비하는 캐패시터를 더 포함하는 것을 특징으로 하는 평판표시장치. The flat panel display according to claim 1, further comprising a capacitor having a lower electrode and an upper electrode disposed on the gate electrode in the same layer located on the semiconductor layer and the same layer.
어느 한 신호선은 나머지 다른 신호선 양측에 위치하여 서로 분리된 신호선 패턴들과 상기 신호선패턴들에 각각 접하면서 상기 다른 신호선과는 절연된 연결배선을 포함하는 것을 특징으로 하는 평판표시장치. Any one of the signal line is a flat panel display device comprising the rest of the other signal lines located on both sides and in contact with each of said signal line pattern with one another separate signal line patterns are insulated and connected to the other signal line wiring.
상기 화소전극 상에 위치하고 적어도 유기발광층을 구비하는 유기기능막을 더 포함하는 것을 특징으로 하는 평판표시장치. The flat panel display is located on the pixel electrode, it characterized in that it further comprises an organic film having a function of at least an organic emission layer.
상기 게이트 절연막 상에 게이트 전극물질을 적층하고 이를 패터닝하여 상기 반도체층의 소정부분에 대응하는 게이트 전극을 형성함과 동시에 상기 신호선들을 형성하는 것을 포함하는 것을 특징으로 하는 평판표시장치의 제조방법. Method of manufacturing a flat panel display device characterized in that it comprises at the same time as laminating the gate electrode material on the gate insulating film and by patterning it to form a gate electrode corresponding to a predetermined portion of the semiconductor layer to form the signal line.
상기 콘택홀들을 포함한 기판 상에 화소전극물질을 적층하고 이를 패터닝하여 상기 발광영역의 층간절연막 상에 위치하고, 상기 화소구동회로영역의 층간절연막 상으로 연장되어 상기 제 1 소오스/드레인 콘택홀을 통해 상기 반도체층의 일측단부에 접하는 화소전극을 형성함과 동시에 상기 제 2 소오스/드레인 콘택홀을 통해 상기 반도체층의 타측단부에 접하는 소오스/드레인 전극을 형성하는 것을 더 포함하는 평판표시장치의 제조방법. The positioned on the contact by stacking a pixel electrode material on a substrate, including, and patterning the light emitting hole area interlayer insulating film, is extended to the pixel driving circuit with an interlayer of a region the insulating film over the first source / drain contact hole, the method of simultaneously forming a pixel electrode in contact with one end of the semiconductor layer the flat panel display further comprising forming a source / drain electrode in contact with the other end of the semiconductor layer on the second source / drain contact holes.
상기 발광영역의 층간절연막 상에 위치하여 상기 저저항전극에 접하는 화소전극을 형성하는 것을 더 포함하는 평판표시장치의 제조방법. Method of manufacturing a flat panel display device further comprises located on the interlayer insulating film of the light emitting region to form the pixel electrode in contact with the low-resistance electrodes.


text:
US government wants to know why the hell Tesla owners can play videogames while driving now
By Andy Chalk published 9 December 21
If this seems incredibly dangerous, it's probably because it is incredibly dangerous.
(Image credit: Tesla)
We said in January that we were impressed by the gaming PC built into the 2021 Tesla Model S, which company chief Elon Musk said is powerful enough to play Cyberpunk 2077. It's accessible from any seat in the car via a wireless controller, and it seems like a nice way to spend time while your car's charging. We assumed, though, that it wouldn't be playable from the driver's seat while the car was moving.
It turns out our hopes were misplaced. The New York Times reported earlier this week that it is now actually possible to play some games on a Tesla dashboard screen while the car is in motion: Not Cyberpunk 2077 (as far as I know, anyway), but games added via software updates including Sky Force Reloaded, The Battle of Polytopia: Moonrise, and the timeless classic Solitaire, which arrived in an update released in late 2020.
The ability to game while driving went unnoticed for almost a full year (which is really a tremendous stroke of good luck) but following the Times report, the US National Highway Traffic Safety Administration said that it's looking into the situation.
"We are aware of driver concerns and are discussing the feature with the manufacturer," the agency said in a statement sent to Bloomberg. "The Vehicle Safety Act prohibits manufacturers from selling vehicles with design defects posing unreasonable risks to safety."
It's possible that the unrestricted access to the games is in fact a defect, as the Times report notes that prior to these newer additions, Tesla's built-in games could only be played while the car is in park. But it seems intentional: A message that pops up when Solitaire launches warns that "playing while the car is in motion is only for passengers," clearly indicating that Tesla knows full well that the game runs while the car is rolling. It's necessary to tap the screen before playing to affirm that you are a passenger and not a driver, but it's also necessary to read EULAs and be 18 or over to access various websites, and we all know how that goes.
Here it is in action—skip to the 1-minute mark for the relevant bit:
To be blunt, this is dangerous. Dicking around with a big touchscreen while you're piloting 4,000 pounds of steel and glass down a residential side street is a monumentally stupid idea no matter what you're doing, but at least conventional apps like GPSes and audio players aren't designed to be played with on an ongoing basis. (Which, for the record, is no justification for fiddling with them while you're driving. Pull your ass over and then figure out where you are.) Games, on the other hand, are meant to grab and hold your attention, which is absolutely what you do not want to be happening while you're behind the wheel.
It's also very illegal in some jurisdictions. 24 US states prohibit all drivers from using hand-held cellphones while driving, and the NHTSA has a whole section on the dangers of distracted driving, which killed more than 3,100 people in the US in 2019; in the Canadian province of Ontario, where I live, getting busted for distracted driving can result in hefty fines and license suspensions. And that can be for something as simple as picking up your mobile to check the time—imagine playing a bullet hell while you're blasting down the freeway at 65 mph.
Tesla hasn't yet commented publicly on this potentially murderous new feature/bug. I've reached out to the comment for more information and will update if I receive a reply.
Andy Chalk
Andy has been gaming on PCs from the very beginning, starting as a youngster with text adventures and primitive action games on a cassette-based TRS80. From there he graduated to the glory days of Sierra Online adventures and Microprose sims, ran a local BBS, learned how to build PCs, and developed a longstanding love of RPGs, immersive sims, and shooters. He began writing videogame news in 2007 for The Escapist and somehow managed to avoid getting fired until 2014, when he joined the storied ranks of PC Gamer. He covers all aspects of the industry, from new game announcements and patch notes to legal disputes, Twitch beefs, esports, and Henry Cavill. Lots of Henry Cavill.

redpajama_set_name: RedPajamaCommonCrawl


Philosophy: Engagement sessions are about establishing a working relationship with my couple, and helping them to outwardly express their personalities and love for each other. Most people start the session by saying "we're so awkward" or "we have no idea what to do!" By the end, my couple say "this is actually really fun!" or "I can't believe I was dreading this--what an amazing experience". P.S. I'm not making that up. I work hard to make you feel comfortable and at ease, checking in throughout to amp my posing help, or back off and let you two do your thing.


Today's post introduces a new monthly feature for "Recovering Shopaholic." Each month, I will post photos of my favorite outfits from the previous month.
Why post my outfit photos? This is not really a fashion blog, but I will periodically include photos of my outfits to illustrate style concepts or demonstrate the power of remixing wardrobe items. The outfit photos I post will usually be more educational than artistic or aspirational, but my monthly favorite outfit posts will serve a different purpose.
Create a more manageable and minimalist wardrobe filled only with items I love and wear.
Define and express a personal sense of style that resonates well with who I am and where I am in life.
Capturing and proudly posting photos of my favorite outfits each month will support both of these goals. Seeing the outfits that I love will help me to better appreciate what I have, which I hope will decrease my desire to shop for more.
Also, my favorite outfits will highlight the types of styles which resonate most for me. This will assist me in creating other similar ensembles, as well as inform me about the types of clothing and accessories to look for in making future purchases.
Each month, I will identify the common themes I noticed in my favorite outfits in terms of colors, styles, silhouettes, and other features. As time goes on, I will better understand my unique sense of style and what works best for my lifestyle.
Buy only items that I truly love and cannot wait to wear.
Buy for the lifestyle I have, not an imagined or wished-for life.
Shop for the right reasons instead of to fill a void inside of me.
As I mentioned on my "About" page, I have a personal wardrobe consulting business. Part of my work with clients involves helping them to identify and express a sense of personal style that resonates with their body, lifestyle, and personality. While you may think it would be easy for me to also do this for myself, a number of "blind spots" which have gotten in my way, including body image issues, emotional shopping, and low self-esteem. I will definitely examine these issues (and more) in future posts, as I know they are common among compulsive shoppers.
More to come on "blind spots" and compulsive shopping, but now it's time for the outfits! Here are my favorite outfits from January 2013.
I mostly like to wear classic styles of clothing, but I also enjoy adding color and shine to my ensembles. My favorite neutral colors are black and grey. We'll see if any other common themes emerge in my favorite February outfits (which I will post in early March).
I am enjoying "shopping my closet" and unleashing the power of what I own to create fun and stylish outfits. My life is fairly casual, but I like to dress my best for all occasions, even if I'm just heading out to run a few errands. I am learning that I already have many great items in my wardrobe and I don't need to keep buying more and more in order to be happy with what I wear. That's definitely a step in the right direction!
I love how you look in the last two bright coats outfits! They really complement your dark hair and fair skin. I found your blog when I was reading something on Twitter and I liked your idea of minimizing in the sense that you only have what you really use (but you're not paring down to 30 items – egad!). And while my walk in closet is not even full, I have also been trying to minimize and only wear the pieces that make me look and feel great (doing the turn-around hanger thing and using the tags to figure out bench-warmers!). I am still learning what is most appropriate for my age and body type as I let some well-kept/worn pieces go, but I am also feeling the excitement of only wearing what's fun and loves me back:). I am not sure that I can limit myself to one clothing item/accessory a month…I do love a challenge! Gonna try the outfit photos, now, too. Thanks for the inspiration!
Thanks for your compliment on my coat outfits. I love my bright coats and they are good colors for my skin tone and hair color.
I suggested the "hanger trick" in response to your other comment, but now I see that you're already doing it. Good for you! It is really helpful and you'll learn a lot! I will have an update on my "benchwarmer project" next week. I'm trying to work through them faster, as it annoys me to see so many of them in my closet.


How large is Martha's Vineyard?
Martha's Vineyard is 100 square miles, roughly triangular in shape, 25 miles east to west, and 9 miles north to south.
Is Martha's Vineyard one big town?
No, in fact there are 6 distinctive towns on the Vineyard, each with its own character, flare, attractions, dining, lodging and more. Vineyard Haven (also known as Tisbury), Oak Bluffs and Edgartown are vibrant communities, unique from one another, representing the artists, the music and historical aspects of the Vineyard. The up-Island towns of West Tisbury, Chilmark and Aquinnah offer a more pastoral landscape, dotted with small farms, cozy shopping and galleries in a rural environment. For more information click here.
How many people live on Martha's Vineyard?
The Vineyard is home to 15,000 year-round residents. During the summer months the population increases to 125,000.
How do I get to Martha's Vineyard?
The Island of Martha's Vineyard can be reached by sea or by air; there are no land routes, bridges or tunnels connecting it to the mainland. Most travelers arrive via our harbors on ferry, with a growing number using the airport as a point of entry. For more information click here.
Martha's Vineyard is a shopper's paradise! Although you won't find a mall or chain store on the Island, the Vineyard is home to exclusive shops and boutiques offering antiques, handcrafts, whimsical gifts and designer label clothing.
For art collectors, the Island has more than 50 art galleries showing the best in traditional and contemporary art. Hand-blown glass, metalwork sculpture, one-of-a-kind jewelry and just about every other medium you can think of. You'll find work by locally and nationally recognized artists represented. Look for more information on the Vineyard Artisan Festivals on the Calendar of Events Members of the Wampanoag Tribe operate shops at the Gay Head Cliffs in Aquinnah, specializing in Native American crafts and souvenirs. You'll find plenty of Martha's Vineyard gear in the shops on the main thoroughfares in Vineyard Haven, Oak Bluffs and Edgartown.
Antique stores are plentiful on the Vineyard. While some specialize in maritime pieces and scrimshaw, every period and taste is on hand.
Whether you're shopping with a particular item in mind, or just looking for something out-of-the-ordinary, shoppers will leave the Vineyard loaded with treasures.
The best kept secret is Martha's Vineyard in the off-season! Late spring, autumn and early winter are wonderful months to experience this brilliant paradise. A temperate climate keeps us warm through the fall, and most Vineyarders enjoy the natural beauty of the Island year-round. Birders, cyclers, golfers, kayakers, hikers and fisherman will love the brilliant weather that allows some much outdoor activity. Festivals abound in the off-season, including the Lighthouse Challenge, Restaurant Week and Harbor Festival and Summer Solstice in June, the International Film Festival, Tivoli Day and the Fishing Derby in September, the Food and Wine Festival in October, the Artisan Festival in November, the Last Night/First Day celebration in December and the Annual Chili Festival in January are just a sampling of off-season reasons to visit the Vineyard. Bounty from local farms and the sea make dining in the off-season a true delight for palates hungry for locally grown fare slow cooked to perfection.


After collecting traffic and signalization data, Bartlett & West worked with the Kansas Department of Transportation to integrate the data into the City of Topeka's 2040 MPO traffic model. Through a phased approach, Bartlett & West reconfigured the Wanamaker Road corridor through a series of six improvement projects.
The Kansas Avenue corridor now has more streamlined, efficient traffic flow and is prepared to accommodate the anticipated 2040 traffic volume.


"We will be involved in long-term recovery after the cameras go away." — The Rev. Kathy James on the South Carolina Conference flood recovery efforts.
COLUMBIA, S. C. (UMNS) — Weeks after catastrophic flooding, South Carolina United Methodists are working to help the thousands hurt by the storm — a process that could take as long as three years. The conference has set up a hotline to take requests for help and offers of assistance. Jessica Brodie reports for the Advocate.
LOS ANGELES — Protesters disrupted an Oct. 19 forum at Holman United Methodist Church featuring Los Angeles Mayor Eric Garcetti. The Rev. Kelvin Sauls, pastor, decided against a return visit by the mayor. Emily Alpert Reyes reports for the Los Angeles Times.
COLORADO SPRINGS, Colo. (UMNS) — Reaching the millennial generation through "classic church" worship combined with a theology of love and grace was the subject of the Rev. Jana Childers' recent address at the Rocky Mountain Conference's Preaching Academy. The Rev. Kerry Greenhill reports.
BRADENTON, Fla. (UMNS) — With an aging congregation, Christ United Methodist Church faced the sad prospect of shuttering its sanctuary and disbanding. Enter Harvest United Methodist, Lakewood Ranch, which was growing steadily. With the encouragement of the Florida Conference and the Gulf Central District, leaders of the two churches agreed to join forces as one congregation with two campuses. Susan Green has the story for the Florida Conference.
GENEVA (WCC) — Faith groups are building awareness of the importance of reaching a binding and ambitious agreement at the upcoming United Nations Climate Change Conference in Paris. Climate pilgrims walking more than 1,000 kilometers from Flensburg, Germany, to Paris reached the halfway point in Wuppertal recently, where many Protestant and Roman Catholic leaders welcomed them.
HOUSTON (UMNS) — El Mesias United Methodist Church here has found new vitality through a partnership with the Association for the Advancement of Mexican Americans. The church's facilities are being used for English classes and a charter school, and it hosted a well-attended National Night Out event. The Texas Conference reports.
2015 Halstead Lecture — 7:30 p.m. EDT. John Dominic Crossan will deliver a lecture on "The Historical Jesus and Divine Violence: How to Read the New Testament and Still Be a Christian" at the Concert Hall at Drew University's Young Center for the Arts. Crossan is one of the best-known New Testament scholars in the world. His "How to Read the Bible and Still Be a Christian: Struggling with Divine Violence from Genesis through Revelation" has recently been released, and his Halstead lecture will be adapted from it. Admission is free and the event will be livestreamed. Register online.
Fall Admissions Weekend at Candler School of Theology, Emory University — Candler is hosting a weekend open house for prospective students to explore resources and opportunities the school offers, featuring seminars with Candler faculty, dinner and conversation with current students, and tours of Emory's Atlanta campus and surrounding areas. Limited hotel reservations are available for out-of-town guests on a first-come, first-served basis. Details.


text:
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<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN"
          "DTD/xhtml1-transitional.dtd">

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        Package QGIS-AIMS-Plugin ::
        Package AIMSDataManager ::
        Module AddressFactory ::
        Class AddressChangeFactory

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[frames] | no frames]

Class AddressChangeFactory

source code

                   object --+
                            |
FeatureFactory.FeatureFactory --+
                                |
                   AddressFactory --+
                                    |
                   AddressFeedFactory --+
                                        |
                                       AddressChangeFactory

        Instance Methods
        [hide private]

          __init__(self,
        ref)

      x.__init__(...) initializes x; see help(type(x)) for signature

            source code

Inherited from AddressFeedFactory:
      convertAddress

Inherited from AddressFeedFactory (private):
      _assign,
      _convert

Inherited from AddressFactory:
      __str__,
      cast,
      getAddress

Inherited from AddressFactory (private):
      _readAddress

Inherited from FeatureFactory.FeatureFactory (private):
      _delNull

Inherited from object:
      __delattr__,
      __format__,
      __getattribute__,
      __hash__,
      __new__,
      __reduce__,
      __reduce_ex__,
      __repr__,
      __setattr__,
      __sizeof__,
      __subclasshook__

        Static Methods
        [hide private]

Inherited from FeatureFactory.FeatureFactory:
      filterPI,
      getInstance,
      readTemplate

        Class Variables
        [hide private]

        AFFT = FeedType.CHANGEFEED

        DEF_REF = FeedType.reverse [AFFT]

        addrtype = AddressChange

        reqtype = ActionType

Inherited from AddressFactory:
      PBRANCH,
      aimslog

Inherited from FeatureFactory.FeatureFactory:
      RP

        Properties
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Inherited from object:
      __class__

        Method Details
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__init__(self,
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text:
Last Updated: Friday, 8 August, 2003, 08:47 GMT 09:47 UK
Indonesia's Muslim militants
The Muslim militant group Jemaah Islamiah, which some foreign governments suspect played a part in the deadly bombing of a Bali nightclub, is one of several radical groups in Indonesia.
Jemaah Islamiah
Islamic Defenders' Front (FPI)
Darul Islam
Laskar Jihad
Governments and some security analysts believe Jemaah Islamiah (JI) as the most likely Indonesian group to have planned the October 2002 Bali bombings, as well as more recent attacks.
The Indonesian Government has linked the group, which means "Islamic community", with Osama Bin Laden's al-Qaeda network.
Mr Ba'asyir says he is a simple preacher
JI is a shadowy group believed to want a pan-Islamic state covering Malaysia, Indonesia, Singapore and the southern Philippines island of Mindanao.
The man believed to be the group's spiritual leader, Abu Bakar Ba'asyir, has praised Osama Bin Laden as a "true Islamic warrior" but denies any links with him or with al-Qaeda.
Mr Ba'asyir is currently on trial for plotting to overthrow the Jakarta Government and turn Indonesia into an Islamic state, for which he could be imprisoned for life.
The charges relate to a series of church bombings on Christmas Eve 2000, which killed 19 people.
He has not been named as a suspect in the Bali bomb.
One of his key associates is thought to be Riduan Isamuddin, also known as Hambali, who fought the Soviets in Afghanistan.
Hambali, thought to be the brains behind the group's operations, is in hiding, with reports of his whereabouts ranging from Indonesia to Pakistan.
Evidence to link JI to the Bali bomb is circumstantial. Analysts say it is the only group with the capacity to carry out such an attack, though some believe it would still have needed outside help.
The Indonesian authorities have arrested more than 30 people with links to JI since the Bali attacks.
Malaysia and Singapore have arrested almost 100 people it says are linked to JI.
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The FPI, which has a reputation for raiding bars and nightclubs, announced in early November that it was suspending its activities indefinitely.
However the group, which has several thousand members, said it was not disbanding.
Unlike other groups it is not fighting for an Islamic state, but it does want to establish strict Sharia law.
Its supporters are concerned with local issues, acting within their communities against what they see as being against Islamic law.
The Islamic Defenders' Front has held anti-US demonstrations
Many members are young and believe that Muslims in Jakarta, and all over Indonesia, have erred from Islamic teachings.
In 2001, the group threatened to attack Westerners in retaliation for US-led bombing of Afghanistan, but the threats were not carried out.
This group emerged during the 1997 economic and financial crisis. Its leader Habib Rizieq Shihab is on trial on charges of inciting his followers to make violent raids on various social establishments.
He could face up to seven years in jail.
Although it has been accused of raiding nightclubs, analysts do not think the FPI was involved in the Bali attack. Nor have they used explosives before.
Darul Islam, which means "abode of Islam", sent volunteers to Afghanistan to help fight the US, but any links with al-Qaeda would be difficult to prove.
Darul Islam has been in Indonesia since the 1930s or 1940s, long before al-Qaeda was established.
It emerged in the aftermath of Indonesia's successful guerrilla war against the Dutch, and has fought for an Islamic state, but only within Indonesian boundaries.
It was also prominent in the 1950s, when it led rebellions in Aceh, South Sulawesi and West Java.
The paramilitary group became known for fighting a "holy war" against Christians in the Moluccan islands and central Sulawesi.
From 2000, the group, which was based in Yogyakarta in southern Java, sent thousands of men to go to the troubled regions to lead Muslim villagers against their neighbours.
Militant Activity
12 October 2002 - Bomb at a nightclub kills about 200 people
2002 - Series of raids on nightclubs by the Islamic Defenders' Front
2001 - Laskar Jihad militants start leading attacks against Christians
2000 - Laskar Jihad militants arrive to help Muslims fight Christians
Soon after the Bali bombing, the group announced it was disbanding. But it has denied its decision was linked to the bomb.
Its commander, Jafar Umar Thalib, is on trial accused of inciting religious violence, so analysts say the decision to disband could be an attempt to avoid a prison sentence.
The group says its mission is to forge a spiritual form of jihad through preaching, not fighting. It runs a school and hospital near Ambon, in the Moluccas.
Mr Thalib fought with the Afghan Mujahideen against occupying Soviet forces. He denies any links with al-Qaeda but met Osama Bin Laden in Pakistan in 1987.
Analysts say Laskar Jihad has a domestic agenda and does not have convincing links with international networks.
It does have informal ties with some Muslim politicians, however.
In May 2002 Vice-President Hamzah Haz, who leads Indonesia's largest Muslim political party, the United Development Party (PPP), controversially visited Mr Thalib in prison.
He said he was visiting only on a humanitarian basis and was not interfering in the case. Since then, several Islamic figures have also visited, but not formally on behalf of the parties.
Some analysts believe Laskar Jihad was set up with the backing of elements in the Indonesian military.
BALI BOMBING
Indonesia executes Bali bombers
Relief and emptiness
Risk of making martyrs
Relatives deplore Bali executions
Bali bombers' final appeal fails
The Bali bombing plot
Timeline: Bali bomb trials
The main suspects
Profile: Hambali
Profile: Abu Bakar Ba'asyir
Full report: Bali terror attack
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Q: jQuery Click function working in Firefox but not Chrome/Safari I have a button that adjusts a div's margin. I have a function that converts a progress bar's width into a percentage. Then based on that bar percentage when next or previous buttons is clicked the appropriate margin is applied.
This is working fine in Firefox with no errors being thrown however in Safari and Chrome it's not workign at all other than recognising the click has been made. The progress bar won't move so It seems like an issue with the widthPerc function as it's not getting past the condition. I didn't write the function (can be found here - jQuery if width is equal to percentage)
My own click is function as follows -
$.fn.widthPerc = function() {
    var parent = this.parent();
    return ~~((this.width() / parent.width()) * 100) + '%';
};
$('.next-q').not('.two-questions .next-q').click(function() {
    var container = $(this).parents().eq(2);
    var questions = container.find('.questions');
    var progress = container.find('.form-progress .bar');
    var prev = container.find('.prev-q');
    var prevone = container.find('.question-steps.questions-one .prev-q');
    var prevs = container.find('.prev-s');
    var complete = container.find('.complete-q, .next-s');
    if (progress.widthPerc() === '66.66%') {
        progress.animate({
            width: '-=33.33%',
        }, 400);
        questions.css({
            'margin-left': '-100%'
        });
        prevs.fadeOut('400', function() {
            prev.fadeIn('400');
        });
        prevone.fadeIn('400');
    } else if (progress.widthPerc() === '33.33%') {
        progress.animate({
            width: '-=33.33%',
        }, 400);
        questions.css({
            'margin-left': '-200%'
        });
        $(this).fadeOut('400', function() {
            complete.fadeIn('400');
        });
    }
});

A: It's likely that your widthPerc function is returning a floating point number with more precision than two decimal places, so perhaps something like 66.666667%. When doing comparisons of width percentages, try using actual numbers instead of strings, and try rounding the numbers to account for slight discrepancies in precision. For example:
$.fn.widthPerc = function() {
    var parent = this.parent();
    return Math.round10(this.width() / parent.width() * 100, -2);
};

Then do the following comparison:
if (progress.widthPerc() >= 33.33) {
    // do stuff
}

A: Solved the issue. Chrome and Safari were rounding the value to 66% or 33% and removing the decimals. Changed condition to progress.widthPerc() >= '66%'

redpajama_set_name: RedPajamaStackExchange


Wireless sensor networks (WSNs) consist of a large number of sensor nodes that measure properties of interests of their local environment. The sensor nodes communicate and share information with neighbor nodes in order to enhance their limited measurement or decision capabilities. WSNs have been considered for various monitoring and control applications such as target detection, recognition, localization, biomedical applications, home and office applications , and structural health monitoring. These applications require in common a capability to efficiently process the distributed information, utilizing the restricted resource. We investigate efficient learning algorithms for WSNs that can accurately estimate quantities of interests despite a large amount of data, limited communication capacity, and low computation power.


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By Ask Roz AU | September 26, 2019
Immerse the kids in nature these school holidays with Take Flight and Native Animal Encounter, events exclusive to Scenic World.
Take Flight is a free, entertaining and educational bird show that will inspire kids and adults alike with wonder for Australia's unique bird species.
Held in the ancient rainforest of the Jamison Valley at Scenic World, audiences can expect to be wowed as birds fly closely over and around them during the show. This is a special opportunity to behold some of Australia's amazing birds within the surrounds of their native habitat in the Blue Mountains.
In addition, the all-new Scenic World experience, Native Animal Encounter, will give visitors the opportunity to meet some of the Blue Mountains' favourite native animals in a closed-group setting, within their natural environment.
Native Animal Encounter is an intimate and interactive session with three animals that call the Blue Mountains home – the sugar glider, sooty owl and diamond python.
Both these events will highlight the uniqueness of Australia's fauna, leaving children inspired with a better understanding of the conservation issues that face Australia's native animals.
"As passionate advocates for the environment, Scenic World is excited to present Take Flight and Native Animal Encounter", said Amanda Byrne, Chief Experience Officer at Scenic World.
"Two stars of these events, Curly the Bush Stone-curlew and Terry the Red-tailed Black Cockatoo are threatened species, so the opportunity to see them up close and personal is definitely one for the school holidays to-do list".
The host of Take Flight and Native Animal Encounter, Ravi Wasan, is the founder of Feathered Friends, an organisation dedicated to the care and conservation of avian species worldwide.
"We want to provide an entertaining and transformative experience that touches on topics such as conservation and sustainability, inspiring audiences to make active change," he said.
As a passionate educator and advocate for environmental conservation, Ravi says that the rainforest of the Jamison Valley is an ideal location for Take Flight and Native Animal Encounter.
"Not only is it the native habitat for many of these animals, but the valley is a natural amphitheatre and the perfect place to see the amazing birds from the show in full flight."
Mark it in the diary for these school holidays and take the world's steepest passenger train, the Scenic Railway, down to the valley floor for animal adventures like no other.
Need to know details:
Take Flight and Native Animal Encounter will be at Scenic World running on these dates of the NSW school holidays:
Saturday 28 September–Friday 4 October
Tuesday 8 October–Sunday 13 October
Scenic World presents Take Flight and Native Animal Encounter in partnership with Feathered Friends, an organisation dedicated to the conservation of avian species worldwide.
Take Flight shows run twice daily at 11am and 1pm.
Take Flight is a free event for Scenic World visitors, tickets to the show are strictly limited and only available onsite on a first come, first served basis.
Native Animal Encounter runs daily at 2pm for approximately 30 minutes.
Native Animal Encounter is a paid event, tickets are available online, please note that session numbers are strictly limited.
https://www.facebook.com/AskRozBlueMountains/
Category: Ask Roz Australia Ask Roz Blue Mountains Tourism Visit Blue Mountains Visit Katoomba Wildlife Tags: Scenic World Take Flight
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Read Next Former Straitjacket Fits Guitarist Andrew Brough Has Passed Away
Song You Need to Know: Chymes, 'Black Hole Friend'
A cathartic "f*** you to all the bitches who hurt me", "Black Hole Friend" is the first taste of Chymes' forthcoming EP, Karma.
Just a couple of months after the release of the Jack Newsome-featuring "F It ILY", Aussie alt-pop artist Chymes has continued her stunning run of singles, with "Black Hole Friend" appearing recently.
A cathartic piece of dark-pop that is bolstered by slick instrumentation, subtle grooves, and Chymes' gorgeous vocals, "Black Hole Friend" is effectively a a self-described "fuck you" to all of those that fall into the titular category.
"This song was so much fun to write," explains Chymes. "It's about that one friend who is so beyond toxic they are just a huge black hole that sucks all your energy out and leaves you with nothing. I've had so many 'black hole' friendships that were awful, manipulative, needy and probably narcissistic, so it was so therapeutic to finally say a big f*** you to all the bitches who hurt me.
"It hurts so much when you've poured all your love and energy into someone, never get anything in return, and in the end, they stab you in the back. This song really goes through that realisation period and ends up in a euphoric, fun chant 'here's to my black hole friend, you'll never see me again!' I love it."
In addition to the track, "Black Hole Friend" also comes accompanied by a smooth visual, directed by Sophia de Vries, which sees a defiant Chymes performing the track with the sort of self-assured confidence that assures any of these 'black hole friends' that she's living her best life.
"Black Hole Friend" also serves as the first track taken from her new EP, with Karma set to be released on May 13th.
"This EP feels like it's my Taylor Swift Reputation era – I'm calling out the people who hurt me and the friends who did me wrong and I feel like I've never been more explicit in my story telling, it's super personal," explains Chymes.
"It's a therapeutic EP about shitty friendships and relationships I've had, and the journey of going from feeling crazy, heartbroken and lost and then healing from it all and cutting those toxic people from my life."
Chymes' "Black Hole Friend" is out now, while her Karma EP will be released on May 13th.
In This Article: CHYMES


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The Hillside mine is a proposed mine located in southern Australia in South Australia. It is being developed by Rex Minerals  south of Ardrossan on Yorke Peninsula. It will be near the current intersection of the Yorke Highway and St Vincent Highway. The mine is proposed to focus initially on copper, but it is licensed to produce copper, gold and iron ore.

Mine approvals and development
The mining lease was granted on 16 September 2014 for a term of 21 years. Mining will not start until after the approval of a Program for Environment Protection and Rehabilitation (PEPR) which was required to be submitted before 16 September 2015. In July 2015, Rex requested and received a 12-month extension, revising the due date for submission of the PEPR and Social Management Plan (SMP) to 16 September 2016. This was extended again in August 2016 to make the new deadline 16 September 2017. The Social Management Plan was submitted to the government in September 2017. A further extension was sought for the PEPR, to 26 February 2018. The 2,500 page PEPR was submitted to the government on 2 February 2018. It proposes a 13-year mine life and Rex stated that it intended to start construction of the mine within 12 months of receiving approval.

References

Copper mines in South Australia
Gold mines in South Australia
Mining in South Australia
Yorke Peninsula

redpajama_set_name: RedPajamaWikipedia


The terms hospice care and palliative care are used interchangeably in many conversations about terminally ill patients and end-of-life decisions. However, while they both involve treating and managing illnesses that will ultimately limit the patient's life, there are important core differences. If you or a family member are considering palliative care or hospice care, learning about your options ahead of time will ease the decision-making process as the illness progresses.
Patients can receive palliative care at any time during treatment for a terminal or chronic disease. It's most commonly provided in a setting like a hospital, long-term care facility or nursing home. The palliative care team consists of doctors, nurses and other caregivers who are focused on treating the patient's symptoms and making them feel comfortable. It looks at the patient holistically – providing relief for physical pain and support for emotional and spiritual well-being.
An important distinction in palliative care is that the patient does not have to be dying and can receive life-prolonging treatments for their disease. For instance, a person who learns they have terminal cancer can immediately start palliative care while also receiving treatment designed to prolong their life.
Dr. Gross recommends that the entire family be involved in palliative care. It can help them resolve differences about treatment for their loved one, so that difficult decisions are easier to make in the future.
Hospice care is reserved for terminally ill patients who will no longer benefit from treatment. It's offered when the person has six months or less to live, assuming the disease progresses as expected. After 90 days in hospice care, the patient will be reevaluated to see if they continue to show decline; if they have not, they may be removed from the program.
Hospice care usually occurs in the patient's home, or sometimes in a nursing home. The only care the patient will receive is designed to help relieve pain, reduce their unpleasant symptoms and keep them comfortable. They will no longer receive treatment to prolong their life or fight their disease, since these treatments are no longer working.
Like palliative care, patients can always change their mind about hospice care at any point in their treatment. Doctors will support the patient's decision and provide the level of care the patient desires.
Palliative care and hospice care not only treat the patient, but the entire family as well. Bereavement services and counseling are available to help family members adjust to life without their loved one.
If you or a loved one would benefit from palliative care or hospice care, talk to your doctor to learn more about the programs available.


Rickie Roo is an agility dog, a service dog and a roving reporter for the United States Dog Agility Association. She is well known in the sport of agility and in the rat terrier community. On October 12th, 2013, Roo unfortunately had to have emergency surgery because of a luxated lens in her left eye. Primary Lens Luxation, or PLL, is a condition that can happen in many breeds including American Eskimo dog, American hairless terrier, Australian cattle dog, border collie, bull terrier, Chinese crested, Jack Russell terrier, jagdterrier, Lakeland terrier, Lancashire heeler, miniature bull terrier, Norwich terrier, Parson Russell terrier, Patterdale terrier, rat terrier, Russell terrier, Sealyham terrier, Teddy Roosevelt terrier, Tenterfield terrier, Tibetan terrier, toy fox terrier, Volpino Italiano, Welsh terrier, wire fox terrier, Yorkshire terrier.


Close Realty can (if provided) integrate Washington County Board of Realtors®, Saint George's IDX/MLS or VOW solution. Washington County Board of Realtors®, Saint George will provide you with a link (they may charge a fee for this service), which could be simply placed in your control panel. The MLS Listings of the entire board will be displayed within your website with your Picture, Compamy Logo, Contact Information displayed at the top.
Washington County Board of Realtors is located in SAINT GEORGE, UT in WASHINGTON County, UT and is part of metro area. Close Realty provides the following for SAINT GEORGE, UT real estate agents, SAINT GEORGE, UT teams of realtors, SAINT GEORGE, UT realty offices: real estate websites, idx, real estate email marketing, internet marketing for realtors.


Available from major wholesalers and your favorite booksellers. Or order direct online at MilitaryFamilyBooks.com, or by phone, 651-357-8770.
Constant change … drama … stress … Have the demands of military life become overwhelming?
You may feel powerless right now, but every challenge and sacrifice you rise above helps you grow into the person you want to be!
A guide at the back of the book to create your own personalized "Right Side Up Plan" with the tips and techniques from each chapter that you find most helpful for your life.
Book Club Kits include 10 books and a discussion guide.
Judy Davis is a speaker, lifestyle blogger, military life consultant, and the author of Right Side Up: Find Your Way When Military Life Turns You Upside Down.


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Build-to-rent model a 'win-win' in challenging conditions
18 February 2019 Tim Neary
The build-to-rent model is a "win-win" for both property owners and tenants, one expert has said, because rental income can be earned from the start and tenants are lined up and ready to go.
The Property Investors Alliance has said that the model holds "significant" opportunity for property developers in today's "challenging" market, while also providing a solution for housing supply.
PIA founder and managing director Justin Wang said that it is a viable system that will work effectively in Australia.
"It's not the panacea for affordable housing, but it is a solution for the current state of play in the development industry, as well as addressing social housing and tenant welfare," he said.
Mr Wang said that the asset is built to be tenanted, and therefore owned by a single or multiple investors.
He said that there is a "considerable" opportunity for the model.
"The build-to-rent model also offers an excellent investment proposition for developers and institutional investors as it provides a secure and stable model which works in both the tenant and the investors' favour."
He said that the model minimises risks in the property development landscape for all involved — the developer, the financier, the occupier and even the government — by providing more affordable housing options.
A build-to-rent model was launched in Greater Western Sydney late last year, following established similar models in both the US and Europe.
Head of property and investments at Kanebridge, who undertook the development, Michael Martin, said at the time that the model had been established to provide affordable modern housing for those unable to purchase property of their own.
"Multifamily build-to-rent has the advantage of providing consistency to tenants, both in terms of rent in the latest amenities."
Mr Martin said that the development offered tenants a "vast array" of benefits and inclusions.
"Each lease will give tenants an option to upgrade or downgrade to an apartment in another development as changes in their personal circumstances may dictate, without incurring punitive charges."
Tim Neary