def _translate_sar(self, tb, instruction):
        # Flags Affected
        # The CF flag contains the value of the last bit shifted out
        # of the destination operand; it is undefined for SHL and SHR
        # instructions where the count is greater than or equal to the
        # size (in bits) of the destination operand. The OF flag is
        # affected only for 1-bit shifts (see "Description" above);
        # otherwise, it is undefined. The SF, ZF, and PF flags are set
        # according to the result. If the count is 0, the flags are
        # not affected. For a non-zero count, the AF flag is
        # undefined.

        # TODO: Fix flag translation.

        oprnd0 = tb.read(instruction.operands[0])
        oprnd1 = tb.read(instruction.operands[1])

        imm0 = tb.immediate(2**(oprnd0.size-1), oprnd0.size)
        imm1 = tb.immediate(1, oprnd0.size)
        imm2 = tb.immediate(-1, oprnd0.size)

        tmp0 = tb.temporal(oprnd0.size)
        tmp1 = tb.temporal(oprnd0.size)
        tmp2 = tb.temporal(oprnd0.size)
        tmp6 = tb.temporal(oprnd0.size)
        tmp3 = tb.temporal(oprnd0.size)
        tmp4 = tb.temporal(oprnd0.size)
        tmp5 = tb.temporal(oprnd0.size)
        tmp6 = tb.temporal(oprnd0.size)

        # Create labels.
        loop_lbl = tb.label('loop')

        # Initialize counter
        tb.add(self._builder.gen_str(oprnd1, tmp0))

        # Copy operand to temporal register
        tb.add(self._builder.gen_str(oprnd0, tmp1))

        # Filter sign bit
        tb.add(self._builder.gen_and(oprnd0, imm0, tmp2))

        tb.add(loop_lbl)

        # Filter lsb bit
        tb.add(self._builder.gen_and(oprnd0, imm1, tmp6))
        tb.add(self._builder.gen_str(tmp6, self._flags["cf"]))

        # Shift right
        tb.add(self._builder.gen_bsh(tmp1, imm2, tmp3))

        # Propagate sign bit
        tb.add(self._builder.gen_or(tmp3, tmp2, tmp1))

        # Decrement counter
        tb.add(self._builder.gen_sub(tmp0, imm1, tmp0))

        # Compare counter to zero
        tb.add(self._builder.gen_bisz(tmp0, tmp4))

        # Invert stop flag
        tb.add(self._builder.gen_xor(tmp4, imm1, tmp5))

        # Iterate
        tb.add(self._builder.gen_jcc(tmp5, loop_lbl))

        # Save result
        tb.add(self._builder.gen_str(tmp1, tmp6))

        if self._translation_mode < FULL_TRANSLATION:
            # Flags : OF
            # TODO: Implement translation for OF flag.

            # Flags : SF, ZF, PF
            self._update_sf(tb, oprnd0, oprnd0, tmp6)
            self._update_zf(tb, oprnd0, oprnd0, tmp6)
            self._update_pf(tb, oprnd0, oprnd0, tmp6)

            # Flags : AF
            self._undefine_flag(tb, self._flags["af"])

        tb.write(instruction.operands[0], tmp6)
dataset/ETHPy150Open programa-stic/barf-project/barf/barf/arch/x86/x86translator.py/X86Translator._translate_sar/operator `==` -> `<`