Ethernet is nice, but who wants to be tied down? Meet the ESP8266 – an inexpensive WiFi chip that’s taking the IoT hobbyist community by storm.
However, the ESP8266 has critical shortcomings that prevent it from being useful as a main system microcontroller for Reclone’s project. (We’ll define the project in more detail once more of its proof-of-concept activities are complete.)
In my mind, the ESP8266’s major shortcomings are:
- Lack of USB Host interface. A primary goal of Reclone hardware is to be able to clone computer and gaming systems, so we want to be able to connect USB mice, keyboards, gamepads, hubs, and other devices. Many microcontrollers include a built-in USB On-The-Go peripheral, but the ESP8266 does not.
- Lack of an external parallel memory bus interface. When interfacing with an FPGA, a parallel bus interface can allow a microcontroller to access memory and registers on the FPGA, as if there are custom peripherals or extra RAM mapped onto the micro’s address space. Transfers over a parallel bus are fast (especially when using DMA) and simple to code. However, the ESP8266 does not provide an external parallel memory bus interface, and SPI or another serial interface it does support would perform much slower.
- Relatively limited RAM available to the application. Current versions of the ESP8266 SDK only allow for 32K RAM available to the application. We have big plans for this project – plans that require lots of memory.
- Closed-source portions of the ESP8266 SDK. Besides being contrary to the free software “spirit”, these black boxes present real obstacles when something goes wrong at a low level, or when trying to maximize efficiency or minimize latency. When designing a new embedded project, I’d prefer to have as much access to the low-level driver code as possible (even when I don’t have a complete understanding of those driver layers).
Our choice for a main system microcontroller is the ST Microelectronics STM32F4 – an ARM Cortex M4 chip with attitude. It sports 1MB of integrated Flash, 192KB of RAM, clock speeds of up to 168MHz, two USB OTG interfaces, and a Flexible Static Memory Controller (FSMC) for connecting to PSRAM or parallel Flash. While there are many dev boards using this chip, we’re using the trusty STM32F4-Discovery, which has been out for a few years and has excellent community, vendor, and toolchain support.
Even though the ESP8266 is not suitable as a main system controller on Reclone’s current project, it does provide a very inexpensive and integrated way to add WiFi connectivity to the STM32F4. Typically, people with Arduinos will connect a serial UART to the ESP8266, and communicate with it using AT commands. This may work for simple projects, but really the AT command interface isn’t sufficient for even moderately complex projects involving more than one TCP connection at a time. With a maximum UART baud of about 1 to 3 Mbit/sec, the best you can hope for is bursts of 100 to 200 KByte/sec, and under realistic conditions it will be a lot slower.
Fortunately, there’s an alternative! One enterprising individual (followed by several others) figured out how to connect an ESP8266 module to the Raspberry Pi Zero via an SDIO interface. Open-source drivers for a nearly identical chip, the ESP8089, let the Pi connect to WiFi.
The STM32F4 also has an SDIO master interface, too, but to my knowledge there aren’t yet any SDIO WiFi drivers written for a non-Linux microcontroller platform. Well, Reclone Labs will make that happen.
Our prototyping setup is very simple and inexpensive, and consists of:
- An STM32F4-Discovery board (less than US$20)
- An ESP-12F (US$3 ESP8266 module) soldered onto an eBay PCB with some pin headers
- 9 female-female jumper wires connecting the two boards
- A mini USB cable for power supply, programming, and debugging
The length and contacts of the jumper wires will limit the max reliable SDIO frequency to roughly 5-10 MHz, but that’s fine for prototyping purposes. At 4 bits per clock, that’s a burst transfer speed of 20-40 Mbit/sec, or 2.5-5 MByte/sec… already a LOT faster than the ESP8266 UART, and SDIO clock speeds can improve to 24 or 48 MHz with a properly designed PCB.
Our plan of attack:
- Establish basic polling SDIO connectivity between the STM32F4 (master) and ESP8266 (slave) to verify connections and get some sign of life
- Implement interrupts and efficient direct memory access (DMA) transfers for multi-byte reads and writes
- Program firmware onto the ESP8266 (borrowed from the ESP8089 driver, OSS under Apache license)
- Figure out how to scan and connect to wireless networks
- Figure out how to send and receive packets and other good stuff
- Achieve operational WiFi by hooking up the lwIP TCP/IP stack and doing some basic tests
Wish us luck!