Inductively coupled plasma (ICP) etching is a promising dry etching process. It is widely used in semiconductor manufacturing due to the high ion density and low operating pressure, which can yield high etching rates and better etching uniformity across the wafers. Furthermore, in an ICP system, there are two independent plasma power sources that provide almost independent control of ion density and ion energy. Ion density is controlled by ICP source power alone. Increasing ICP source power increases ion density. Meanwhile, ion energy is affected by both ICP source power and radio frequency (RF) chuck power. In particular, increasing ICP power decreases induced dc bias (i.e., ion energy), while increasing RF chuck power raises dc bias on the chuck. Therefore, the ICP source power increases ion density but decreases ion energy. Since an ICP system provides one more process parameter than a reactive ion etching system for plasma control, it is more flexible in etching processes optimization, such as selective (etching GaAs over stop etching layer) versus nonselective etching; isotropic versus vertical etching; and low or no plasma damage etching processes.12.3.–4
Recently, our group advanced an optical design, the resonator–quantum well infrared photodetectors (R-QWIP), that uses resonances to increase the quantum efficiency (QE).56.7.–8 An R-QWIP consists of an active QW layer, a GaAs bottom contact layer, and a top GaAs contact layer. On the top contact layer, there is an array of diffractive elements (DEs) that are covered with ohmic metal and gold layers. Figure 1(a) shows the designed R-QWIP structure, and Fig. 1(b) shows the material layer structure. The mesa is surrounded by a low-index material, such as epoxy, and the substrate underneath the ground contact layer is completely removed. When light is illuminated from the bottom side of the detector, it is scattered by the DEs back to the detector volume, and the subsequent angles of incidence are larger than the critical angles for total internal reflection at all detector boundaries. The light is therefore trapped inside the pixel. By designing a proper-sized detector volume, the trapped light forms a constructive interference pattern, with which the internal optical intensity is greatly increased, thereby yielding a large QE.
To achieve the expected resonances, the substrate has to be removed to prevent the escape of unabsorbed light from the detector. After being scattered by the DEs, the light usually travels at an angle larger than the critical angle for total internal reflection at the bottom semiconductor/air interface. Without the substrate, the light can then be reflected back by the bottom layer and still stay inside the same detector. Therefore, removing the substrate is an essential step in producing an R-QWIP. Since this detector relies on constructive interference between the incident light and the reflected light, the designed detector dimensions have to be produced accurately. To ensure proper phase relationship for constructive interference, the active material thickness and the height of the DEs have to be fabricated to within of the electromagnetic (EM) design specification in order to yield a QE that stays within 10% of the designed value.
To achieve this accuracy, we applied two optimized ICP etching processes (selective and nonselective) to fabricate test detectors and the first R-QWIP focal plane array (FPA).910.11.–12 The selective etching process could yield a very high selectivity of etching GaAs over () and a fast GaAs etching rate (). The etching surface was perfectly smooth and mirror-like after processing. In addition to its simplicity, the process is also highly reproducible and shows no damage to the detector material. For nonselective etching process, we optimized the gases ratio, RF and ICP powers, and operating pressure to yield a highly anisotropic etching profile (88 deg), high etching rate (), and ion damage free process.
Fabrication of Resonator–Quantum Well Infrared Photodetector Focal Plane Array
We have collaborated with NASA Goddard Space Flight Center, MIT Lincoln Laboratory, DRS Technologies Inc., L-3 Cincinnati Electronics, and FLIR Systems to develop different FPA formats and pixel sizes for different applications. Our FPA wafer fabrication process requires five mask layers. First, we need to create an array of rings as the DEs on wafers to diffract normal incident light into nearly parallel propagation. A standard photolithography process was utilized to pattern the 4-in. material wafers. A -thick AZ5214 photoresist was coated on the wafer by using an EVG 120 resist processing cluster. The resist was baked at 110°C for 1 min in the system. The DEs were formed by using our optimized selective ICP etching process to etch down to the 15 Å top etching stop layer, which is shown in Fig. 1(b). The etching depth is 4000 to 5000 Å. The optimized etching parameters were , , ; ; ; ; and . Before the ICP etching, one minute oxygen plasma was used to clean the etching surface. The etching process was conducted in a Unaxis VLR 700 Etch System. The tool uses a 2 MHz RF inductively coupled coil to generate high-density plasma. Ion energy at the wafer surface is independently controlled by a 13.56 MHz RF bias applied to the cathode. Wafer temperature is maintained through the use of a fluid cooled cathode in conjunction with electrostatic clamping and helium backside cooling. Since the selective etching process has a very high selectivity ( for ), 15-Å-thick stop etching layer is sufficient to define the DE height. The stop etching layer is also important for etching uniformity across the wafer as the etching rate is higher near the wafer edge. Figure 2 is an SEM image of the dies after first selective ICP etching. The etching is uniform, and the etching surface is clean and smooth.
The second masking step defines the ground contact area located outside the pixel area. Our nonselective ICP etching recipe was used to reach the common ground contact layer. The optimized etching parameters were , ; ; ; , and . In this step, a finite RF power was necessary to create a vertical sidewall. We nevertheless minimized the power to avoid the possible plasma damage. The RF power needed for the creation of the plasma also induces a dc voltage on the chuck, which accelerates the ions toward the etching material. By using a low RF power and a high ICP power, the dc voltage on the chuck is only 120 V. Therefore, the physical impact of these ions on the detector material can be reduced. Figure 3 was taken after ground contact etching of a FPA. The surrounding dark stripes are ground contact areas of FPAs.
We used the third mask to define the lift-off areas for the deposition of Pd (50 Å)/Ge (200 Å)/Au (300 Å)/Pd (50 Å)/Au (5000 Å) metal, and it was followed by a furnace annealing at 350°C for 25 min. After this process, the DEs were covered with an ohmic metal layer and a gold layer. The gold layer is used to reflect the incident light and DEs are used to convert the polarization of the incident light from horizontal to vertical through diffraction.
We used the fourth mask to define the pixels. We opened the pixel areas while other areas were covered with photoresist. In the pixel areas, the metal squares were used as etching masks and nonselective ICP etching was utilized to create individual pixels. The fifth mask is indium bump mask. We coated -thick positive photoresist (AZ9245) and deposited -tall indium bumps on the wafer using a thermal evaporator. Figure 4 shows microscope pictures taken after metallization, pixel mesa etching, and indium bump deposition. After we finished the wafer process, the wafers were diced into FPAs. The candidates were hybridized to readout integrated circuits (ROIC). The backsides of the FPAs were then filled with low-viscosity epoxy.
Substrate Removal of Resonator–Quantum Well Infrared Photodetector Focal Plane Arrays
Thinned QWIP FPAs offer several advantages over unthinned FPAs. First, the thermal mass of the FPAs is reduced to lessen the detector cooling time and power consumption. The thinned FPAs also are easier to adapt to the thermal expansion mismatch between GaAs and the silicon readout circuit. Optical crosstalk among pixels is suppressed by better optical confinement. Besides these general benefits, substrate removal is specifically required for R-QWIP. The thinned R-QWIP FPAs enhance the resonant effects, and the QE can increase by a factor of 3 to 4 according to EM modeling.
The substrate removal process includes two simple steps, which are mechanical lapping and selective ICP etching. The substrates of the test device and FPAs were first mechanically lapped, using calcined aluminum oxide lapping medium, to within . The edges of the test devices and FPAs were then hand painted with a surface coating. After baking the FPAs in an oven for 1 h at 95°C, the FPAs were introduced into the Unaxis VLR700Etch System for of etching. After ICP etching, solvents and Q-tips were used to clean the etching surface and remove the surface coating on the backside and edges of the FPAs. Figure 5 shows two pictures, one was taken after lapping but before ICP etching, and another was taken after etching. As seen in these pictures, the surface of the die is uniform, smooth, and mirror-like after etching. The etching surface is close enough to the pixels such that the pixels on the other side can be seen under a microscope by adjusting the focus of the microscope.
Test Results of Resonator–Quantum Well Infrared Photodetector Focal Plane Arrays
For R-QWIP single detectors, we demonstrated QEs and the experimental results agree with the predictions satisfactorily.78.–9 For FPAs, however, the QEs are in the range of 30 to 40%, as shown in Fig. 6. Although these QEs are significantly higher than the typical QWIP FPAs, they are however less than the expected QE of for 21 QWs and doping. We traced the lower QE to three separate issues. One is related to fabrication. We found that the size of the diffractive rings is thinner at the center of the wafer, which reduces the QE. We solved this problem by using stepper projection (ASML 5000 Stepper), which offers better resolution and pattern uniformity across the wafers. It also enables almost perfect alignment between layers compared with our contact mask aligner (Karl Suss MA/BA6 Contact Aligner). The second issue is the lower material’s intrinsic absorption coefficient because of inaccurate material growth. We worked with the crystal grower to improve the material absorption specification. The third is the imprecise knowledge of the material refractive index. We fabricated DEs with different scaling factors to create different resonant wavelengths, from which the precise value of the index is obtained. If we take all these factors into account, the theoretical QE agrees with the observation, as shown for FPA #3. The operability and uniformity of FPA #1 are 99.5 and 3%, respectively. The dark current and photocurrent densities of FPA #2 and #3 are plotted in Fig. 7. From Fig. 7, the photocurrent to dark current ratio is at unity at under positive substrate bias.
The image on the left of Fig. 8 is taken from a most recent FPA using L-3’s ROIC. The cutoff wavelength is and the operating temperature is 61 K. The integration time is 3.06 ms at . The preliminary test shows that the operability of the FPA is 99.5% and is expected to improve at a lower temperature. The image shown only received a 1-point correction, which testifies the FPA intrinsic uniformity. With a lower operating temperature and better uniformity corrections, the image quality will be improved further. Experimental work is ongoing, and a full report will be published elsewhere. The image on the right of Fig. 8 is taken from another more recent FPA using a digital ROIC from MIT Lincoln Lab. The pixel pitch is . Noise equivalent temperature difference () was measured to be 12 mK at 10 ms integration time. The test results of the FPAs indicate no plasma damage to the detector material during wafer fabrication and substrate thinning.
Optimized selective and nonselective ICP etching processes were developed and applied to fabricate R-QWIP FPAs of different formats and pixel sizes. Our selective ICP etching process has an optimized composition and shows a nearly infinite etching selectivity for etching GaAs over the etch-stop layer. We used it to create the uniform height diffractive elements in the R-QWIP structures and thin the substrate completely. Meanwhile, the nonselective ICP etching process was used to perform vertical sidewall, damage-free ground contact etching and pixel mesa etching. The QEs of the preliminary R-QWIP FPAs were observed between 30 and 40%. These QEs are significantly larger than the typical 5% for grating coupled FPAs. We expect the R-QWIP QE can be improved with further developments such as tighter control of material growth, more refined FPA fabrication, and more accurate detector design. New theoretical and experimental effort to optimize the R-QWIP performance is underway.
The authors would like to thank the support of focal plane array processing, testing, and demonstration at NASA Goddard Space Flight Center, MIT Lincoln Laboratory, DRS Technologies Inc., and L-3 Cincinnati Electronics.
Jason Sun is a physicist at the U.S. Army Research Lab, Adelphi, Maryland. He has experiences in a wide range of optoelectronic and RF device physics and fabrication. He has many years of experience in research on conventional and high critical temperature (Tc) superconductors and expertise in high Tc superconductor epitaxial thin film growth and characteristic. His current interest is QWIP FPA research and fabrication.