Having reviewed the documentation supplied with the 0.01 release, one thing that isn't clear is the way in which expressions are supported within the VFP/SIMD syntax. This will be corrected in the next release.
Register numbers are a special case where the register type must be specified. So where an ARM register can be simply specified as a number from 0-15, a Single/Double/Quad register must be prefixed by S,D or Q, and then a # followed by the expression. For example Q#FNregister or D#(A%+B%)
The same as for the standard ARM assembler, subject to encoding limitations as specified in ARM. For a full 32bit or 64bit number, an 8bit constant can be shifted around and duplicated in 9 different ways. For example #&FF, #&FF00, and #&FF00FF00 will encode for VMOV where as #&10F will not.
Immediate floating point or 64bit integers
The special constructors take a number from 0-255 from <expression> and pass it through in raw form to the instruction encoding. This is not particularly useful but completes the syntax. We would recommend using other methods to define constants of these types.
Hopefully that helps to explain how things work. Good luck to anyone who is testing the assembler and we look forward to some feedback in due course.