BRANCH ON COUNT INSTRUCTION
This instruction allows a program to loop through a
routine a given number of times.
A general register holds the count of the number of
times the loop is to be executed. Each time the Branch
on Count is executed, the register is decremented by
one (binary count). When
has been decremented to
zero, the branch address is ignored and the next se-
quential instruction is executed.
In the following section of a program the routine EDTB
is to be executed seven times before proceeding on
to the next routine CONT.
Prior to entering the routine (EDTB), General Reg-
ister 9 was loaded with a binary value of six (see
LOAD MULTIPLE Instruction in this section).
The routine (EDTB) is executed once and repeated the
number of times specified by the binary count in
General Register 9. When the count is decremented
to zero the Branch Address is ignored and the next
sequential instruction (CONT) is executed.
SET P2 REGISTER (STP2) INSTRUCTION
This instruction transfers control from the Interrupt
State to the Processing State.
sets the P2 Register
with the desired value and transfers to the address
contained in the PI Register (Reserved Locations 40
The Condition Code Indicator is also reset to the Con-
dition Code that existed at the time the Processing
State was interrupted. In addition, the hardware in-
terrupt register is reset by the interrupt mask in
Assume the following values are stored in HSM im-
mediately before execution of the instruction,
and that ENTR had been assigned a value of 3800 10
by the Assembler.
The following instruction transfers control to the PI
state, and stores 3800
in the P2 counter.
General Register one contains 0000
TRANSFER CONTROl:, TO 2300 10
CODE RESET TO 3
USing the memory layout above, indicate which Con-
dition Code would be set after execution of the fol-
BAL (3), UNIT + 1 (2)
VAL (3), COST (3)
AMT (3), NUM (4)