Given that many tasks should be performed at the same time, multi-processor and multi-core systems are employed not only for computers, but also for consumer electronics as well as game consoles. Unfortunately, tailoring applications to take advantage of multi-threading is not a simple task, it consumes time and money. But NEC claims it has developed a technology, which can even be implemented using a programmable logic chip, that automatically parallelizes the software.
Parallelization with conventional multi-processor technology requires the manual modification of application source programs. Manual labor increases the development and verification cost for software development, which is in turn made more complex by the growing size and complexity of the software itself. Therefore, multi-processor technology, which can automatically parallelize application programs without manual modification, has been long sought after in this field.
The new technology of NEC is a compiler that can be implemented on a field programmable logic array (FPGA) and that handles parallelization better than software compilers designed for the same type of work. NEC claims that an application that was tailored for execution on a 4 processor machine manually for 4 months runs only 95% faster compared to the same application without optimizations on a computer with 1 processor, whereas the same application parallelized automatically in less than 3 minutes gives 183% performance gain over single-processor machine.
The distinctive feature of the new technology is the ability of the automatic parallelizing compiler that utilizes profile (execution history) information to aggressively exploit parallelization patterns, which are effective for accelerating the speed of application programs. In addition, although the parallelization is speculative, the speculation is almost always completely accurate, according to NEC. The speculation hardware works as a safety net by handling any rare misses, guaranteeing the correctness of the execution. This ensures that the compiler is not conservative in decisions concerned with these cases, resulting in an increase in the amount of parallelism exploited. The parallelism exploitation is supported by the speculative execution hardware that realizes efficient handling of detection of incorrect execution orders caused by the parallel execution of the program parts, cancellation of the incorrectly executed part, and re-execution of it.
NEC did not indicate which program languages the new compiler technology supports and whether there are any other peculiarities, such as tailoring the compiler for particular processor architecture.