Extreme ultraviolet (EUV) lithography has struggled to become a tool for IC production despite the problems facing deep ultraviolet (DUV) tools as they turn to OPC and resolution enhancement technologies.
In 1988,chipmaking could have made a big leap that promised to secure its future all the way down to process technologies not due to appear until 2020.
The industry had just begun to look at shifting to lasers to draw increasingly fine structures on the surface of silicon wafers. The old lithography machines - termed steppers for the way that they lit up a small portion of the wafer and then stepped across to the next position - used mercury arc lamps.
As far as the 1.5m process, 436nm wavelength light served chipmakers' needs just fine. But if they were to go to 1m and beyond, they would need shorter wavelengths to avoid problems caused by diffraction. Light bending around the features on the mask used to define features on the surface would make the lines fuzzy and ill-defined, leading to performance problems for the resulting transistors.
Extreme ultraviolet illumination (EUV) represented an enormous potential improvement in resolution, using wavelengths around the 15nm point. But the technology had big problems and the industry opted for evolution rather than revolution. For the next ten years, 365nm light sources were pressed into action even though the minimum feature size would drop to below the wavelength of the light itself.
By time the industry shifted to laser-based lithography, the minimum feature was already below the optical wavelength. The result is that, for the past 15 years, the chipmakers have relied on ways to tweak masks and light sources to overcome the blurring effects of diffraction.
Techniques such as optical proximity correction (OPC) have become a staple of the industry - adding dummy shapes to masks to coax the light into drawing the intended shapes. Those techniques have become more and more sophisticated, reaching the point where it is now possible to use 193nm deep ultraviolet lasers to draw features that are just 40nm across.
Every time so far that the industry has faced the jump to EUV, it has backed away in favour of applying tweaks to existing systems. Using water to increase the refraction index of the system or incredibly computationally intensive OPC has won out over EUV. But deep ultraviolet illumination is reaching the end of the road.
One of the key techniques to get to below 40nm is double patterning. This splits the pattern between two separately exposed masks. When the results are combined, you get features at the target resolution. But there is a critical economic problem with double patterning, although it has been used successfully by Intel on 45nm-generation chips to avoid problems caused by water immersion. You halve the throughput of wafers through the fab or you have to buy twice as much equipment.
When individual lithography tools cost millions of dollars in an environment where the largest cost of any new fab is the depreciation of that expensive kit, having to buy even more equipment is not a popular option.
Economics of EUV
EUV has its own cost problems. Shang-yi Chiang, senior vice president of research and development for foundry TSMC told customers at the company's recent technology conference in Japan: 'It will cost [around] $80m for just one tool. I was shocked to sign a...$1.9m purchase order for a clamp. This clamp is a custom-made clamp only for EUV. We have to mount a special clamp on the ceiling and this clamp will be used to lift the EUV tool when we install the machine and when we do the maintenance.'
The EUV tool is so heavy, says Chiang, that it needs this specialised clamp even though it costs what a lithography tool itself would have in 1994. 'It's really shocking,' says Chiang, adding that, without work to improve the economics, 'Moore's Law will be ended very soon.'
Chiang says: 'Nobody will go to the new generation. It's not because of physics, it's because of cost. So, TSMC will work very hard with our vendor partners and hope to find all the possible ways we can control this cost.'
One option for TSMC, Chiang says, is to move to larger wafers - 450mm in diameter rather than 300mm - to push the cost per chip down.
Intel is expecting a move to EUV but when that happens is, as yet, unspecified. 'EUV is something we are looking at very hard,' says Rob Willoner, technology analyst at Intel. 'When it's ready and cost effective we will use it. But today there is no light source that can generate the necessary power. The photoresist is another issue and that has not been resolved.'
EUV is now highly unlikely to be in place for the upcoming 22nm process. 'The 22nm process is already very well-defined. Most of the tools are in place for it. We have already demonstrated a 22nm static RAM and we are on track for introduction in late 2011,' says Willoner.
Willoner says the effort to get EUV production 'has been likened to putting a man on the Moon. It is a very complex issue. I don't think it will be ready at the beginning of 22nm. At one time, there was a hope it would be ready in the middle of 22nm. But maybe it will be ready for the next generation after that.'
Cost is a concern for Intel, especially if the price per tool hits $100m. 'But it may not be an issue if we can get the number of wafers through per hour high enough,' says Willoner.
The problem is getting the throughput up. That relies on a powerful EUV source able to expose the wafer in a matter of seconds rather than minutes. This has been the major problem with EUV since the late 1990s.
Cymer is one of the companies working on a light source for EUV, in its case using lasers to excite a plasma into producing the necessary wavelength of light. In April, the company shipped its first pilot source to ASML, the Dutch maker of lithography equipment. 'It is ultimately destined for a chipmaker's fab,' claimed Bob Akins, CEO of Cymer on an analyst conference call.
The company claimed to have reached pulsed outputs of close to 100W last year but the race is on to improve this and to increase the ability of the source to sustain a full eight-hour shift's production.
'We are increasing power to support ASML's throughput roadmap,' says Akins. 'And we are planning to deliver additional lithography sources by the end of the year. There will be a total of six in 2010. The primary challenge in EUV is to demonstrate that it is a less-expensive option than using other tricks. Power levels are approaching those that will show break-even operation and you will see us push on that power output.'
Akins ruefully sums up the problem: 'Mother Nature has wonderously arranged things that the shorter you go in wavelength, the more challenging things become. But the market has arranged that the opportunity is commensurate with that difficulty.'