Last Edit Ocober 10, 1996; July 9, 2001
The very simplest microprogrammed controller is constructed from
a PROM (assume that this means ROM or PROM) and a register, as shown
in Figure 2-1. The load enable on the register is connected
to the clock signals. The register outputs an address to the PROM
memory, and this address is used to fetch the next microinstruction
that is to be executed. No next-address logic is included or required.
After a time delay equal to that needed fopr stabilizing the reegister
outputs plus the read access time of the memory, the memory outputs
both the control signals to the rest of the system and the next
address to be loaded into the register. The PROM meory is also refferred
to as the control memory. The output from the memory must be stable
before the next clock pulse (Cp):
Cp = tread access of memory + t register
Cp to output + t setup time for register
Figure 2-1 The Simplest Implementation of a Sequential Machine
The size of the memory is 2n words, with each word M
bits long. The M bits are formed from the C control bits plus the
n address bits required to specify the next instruction:
word width equals the number of control bits plus the number of
The programmer is free to place microinstructions anywhere in any
order as long as each one references the next execuatable addess.
This system will run from clock power-up until clock power-down.
Assume on power-up that the register is cleared and the first address
executed is address 0. Since no address logic is provided, only
one sequence is possible. This controller is suitable for process
control (repetitive looping of a sequence).
A reduction in required PROM memory is possible by removing the
requirement of the next-address field. This is reasonable because
the microprogram can be loaded into PROM in its executed order as
one long sequential routine, as diagrammed in Figure 2-2.
In this case, the next microinstruction address is always equal
to zero on startup.
Figure 2-2 Sequential Control
The clock pulse width is determined by:
Cp = tread access + t counter Cp
which is approximately the same as before, since:
tread access >>TCp to output
To derive the control protion of the microcode for with of the
two control units described so far, assume a timing diagram exists.
By digitizing the timing signals using the clock step and assuming
all changes correspond to the rising edge of the clock, the microprogram
control field is simply the binary word at each time slice. The
procedure is shown in Figure 2-3.
Figure 2-3 Sample Sequential Microcode (A) Desired Control.
Assume that this is the desired control for some system. (B) Microcode
and Flow. This is then the microcode for sequential execution.
The controller may be made to execute multiple sequences by adding
one control bit to the word width, the load control bit. This bit
connects to the load control line of the loadable counter, as shown
in Figure 2-4.
Figure 2-4 Multiple Sequence Controller (A) Controller Block
Figure 2-4 Multiple Sequence Controller (B) Microword Format
The data inputs to the counter receive the start address. The new
start address is gated into the counter when the load control bit
equals "1". The counter operates as a counter as long as the load
control bit equals "0". Each microroutine or microinstruction sequence
would contain a "1" in the load control field only in the last microinstruction
of the sequence with a "0" in the load control filed in all other
microinstructions of the sequence.
The size of the PROM memory is determined by the total number of
microinstructions it must store. Since PROM memories come in only
certain sizes, a "ballpark" estimate of the size is sufficient to
make a selection. The smallest sizes (in the 1970's) were 32x8 (nonregistered)
and 512x18 (registered PROM). The number of address bits and the
size of the counter are determined by the amount of memory that
is used or that is anticipated to be used in later, planned enhancements
to the system. Worst-case sizing estimates must be made in these