This set of Digital Circuits Multiple Choice Questions & Answers (MCQs) focuses on “Logic Gates and Networks – 1″.
1. The code where all successive numbers differ from their preceding number by single bit is __________
a) Alphanumeric Code
c) Excess 3
2. The following switching functions are to be implemented using a decoder:
f1 = ∑m(1, 2, 4, 8, 10, 14) f2 = ∑m(2, 5, 9, 11) f3 = ∑m(2, 4, 5, 6, 7)
The minimum configuration of decoder will be __________
a) 2 to 4 line
b) 3 to 8 line
c) 4 to 16 line
d) 5 to 32 line
3. The output of a logic gate is 1 when all the input are at logic 0 as shown below:
The gate is either _________
a) A NAND or an EX-OR
b) An OR or an EX-NOR
c) An AND or an EX-OR
d) A NOR or an EX-NOR
4. How many AND gates are required to realize Y = CD + EF + G?
5. How many two-input AND and OR gates are required to realize Y = CD+EF+G?
a) 2, 2
b) 2, 3
c) 3, 3
d) 3, 2
6. A full adder logic circuit will have __________
a) Two inputs and one output
b) Three inputs and three outputs
c) Two inputs and two outputs
d) Three inputs and two outputs
7. The NOR gate output will be high if the two inputs are __________
8. A universal logic gate is one which can be used to generate any logic function. Which of the following is a universal logic gate?
9. How many two input AND gates and two input OR gates are required to realize Y = BD + CE + AB?
a) 3, 2
b) 4, 2
c) 1, 1
d) 2, 3
10. The gates required to build a half adder are __________
a) EX-OR gate and NOR gate
b) EX-OR gate and OR gate
c) EX-OR gate and AND gate
d) EX-NOR gate and AND gate
11. Which of the following are known as universal gates?
a) NAND & NOR
b) AND & OR
c) XOR & OR
d) EX-NOR & XOR