Interrupts on the MOS 6502
How far in the past can one look at CPU architectures while still finding reliable documentations on interrupt management ? Well, it seems that even chips from the 70s still have some reliable doc on the internet. So here’s how interrupts work on the MOS Technology 6502 processor, used in early products from Commodore (PET, VIC-20), Apple (I, II), Atari (2600) and Nintendo (NES/Famicon). I use the doc from this website, which proved to be pretty clear and understandable.
- The 6502 has only one interrupt pin with one single vector associated to it (if you ignore NMI, that is), so one has to use external interrupt controllers to deal with multiple external interrupt sources and talk to them to know which interrupt has occured, just like on the ARM chips discussed earlier.
- An interrupt vector is here the address of some code to run, with no added information like on x86 or code like on ARM and SPARC.
- In the event of an interrupt, the 6502 pushes address of previously running code and previous status register on the stack, and disables interrupt.
- The 6502 then loads the vector from a pair of fixed, known memory addresses ($FFFE-$FFFF) and jumps to it.