Relevance of the Project
Edge detection is a very complex process affected by deterioration due to different level of noise. A number of operators are defined to solve the problem of edge detection. They are effective for certain classes of images, but not suitable for others. Edge detection is a crucial step in digital image processing. It has found application in artificial intelligence systems, forensic science and also in digital multimedia for creating image dazzling effect. Currently the image processing algorithms has been limited to software implementation which is slower due to the limited processor speed. So a dedicated hardware for edge detection has been required which was not possible until the advancements in VLSI technology.
Edge detection becomes a more complicated task when using much improved edge detection masks. Moreover the process becomes lengthier when it operates on an image of very high resolution. Most hardware implementations are faster than its corresponding software implementations. So implementing edge detection in hardware will be more efficient. Since FPGA have got the added feature of parallelism, the edge detection can be effectively implemented.
During the recent years, field programmable gate arrays (FPGA) have become the dominant form of programmable logic. In comparison to previous programmable devices like programmable array logic (PAL) and complex programmable logic devices (CPLD), FPGA can implement far larger logic functions. FPGA supports sufficient logic to implement complete systems and sub-systems. FPGA provides designers with reconfigurable logic that can be reprogrammed on application-specific basis. This drastically increases flexibility in the design process.
Any edge detection masks when operated on a group on 9 pixels, there will be 12 multiplications. So while processing an image of size n x n, there will be a total of 12 x (n-2)2 multiplications. The total number of multiplications can be reduced to 2 x (n-2)2 (ie. reduced about 6 times) by using Sobel edge detection operator because it has got mask values ‘1’ which does not require any multiplication at all. Moreover the multiplication by 2 can be implemented easily using a shift operation instead of implementing a multiplier.
The choice of Sobel edge detection operator is also motivated by the fact that they incorporate both the edge detection as well as smoothing operator so that they have good edge detection capability in noisy conditions. Sobel operator is less deteriorated in high levels of noise.
Tags: Sobel , Edge Detection , FPGA , VLSI ,