I'm trying to understand the difference in
clock cycles and
states within a 68000 processor.
According to the user manual,
A bus cycle consists of eight states...
Lets assume the 68K has a CLK signal that is 8 MHz (based on an 8 MHz crystal oscillator attached to the CLK pin). That, I believe, is a "CPU Clock" or just "Clock". It's the fastest clock signal the 68K is aware of.
So each of the two phases of that signal (LOW and HIGH) would be 62.5ns. Both the low and high phase of that clock would be one clock cycle.
Now, referring back to the user manual, a bus cycle would be 8 clock cycles in length. Basically, 16 "ticks" or phase changes of the crystal oscillator.
Next, that bus cycle is broken into 8 states. Each of those states would be two ticks of the crystal oscillator. Which means each state is equivalent to a full cycle of the crystal oscillator. Which would be 62.5ns x 2 in this example.
After reading all of that, is my logic and understanding correct? The user manual seems to toss around bus cycles, clock cycles, etc. and I want to make sure I understand their meanings.