Most embedded devices in today’s day and age are stand-alone devices powered by advanced battery technologies. These limited sources of energy put a lot of constraints on the developer as they have to find a trade-off between performance and optimum energy usage.
To handle this issue, the MCS-51 microcontroller (aka OG 8051) by Intel offered two power conserving modes. Namely Idle mode and power-down mode. Over the years, the demand for low power microcontrollers has gone up exponentially due and there are many low-power microcontrollers to choose from.
The companies that still manufacture controllers using the 8051 cores have also stepped up to take the two power saving modes of the 8051 up a notch by introducing many new features in their variants.
In this article, we will be studying in-depth about the power saving modes on the OG 8051 microcontroller. We will also look at other newer low power microcontrollers with 8051 IP cores and how they offer greater power saving options compared to the older MCS-51.
Need for power-saving mode
A microcontroller might look like a single entity, but in reality, its an amalgamation of several components. In the case of the 8051, these include timers, a serial communication module, interrupts, I/O ports, and a CPU. For most applications, it is necessary to use all these resources in tandem and also manage their power demands efficiently. Thus, the power that a microcontroller needs for a certain application is irregular. However, when some of the features of the resulting embedded systems are not in use, the systems can enter these power-saving modes offered by the microcontroller.
IoT devices are a prime example of devices that absolutely need power saving features. They operate in low power modes for long times and only get into an active mode when necessary.
Let us now look at the two power-saving modes in 8051 to understand them better.
Power down mode
When it comes to saving power, the power-down mode is the more effective option. This mode stops the on-chip oscillator, which freezes the clock stopping all the functions of the microcontroller. The data in SFRs and RAM space are held as it is, and port pins output the values stored in their SFRs. ALE and PSEN’ output lows. In terms of power requirements, the power-down mode reduces the current usage to 60 microamperes and the voltage requirement to 2v. The VCC of the 8051 should be reduced to 2v only when it is in power-down mode, and it should be shifted to 5v when it operates in normal modes.
The only way to wake up this sleepy microcontroller is by using the hardware reset. This redefines the values of the SFRs but doesn’t affect the values of the on-chip RAM. The hardware reset requirement to exit the power-down mode is a real bummer for programmers. However, there are some modern 8051 variants that allow the programmer to exit the power-down mode using interrupts too.
In the case of the idle mode, the most power-hungry unit, the CPU of the microcontroller, is turned off. All the other peripherals like the timer, serial communication, and interrupts keep functioning normally. Also, the statuses of the CPU, Accumulator, and the stack pointer remain as it is. ALE and PSEN’ output high signals. Due to the functioning of peripherals, the current consumption is relatively higher then Power-down mode. There is no exact figure of the current consumption as it depends on the number of peripherals working, but it is in the range of 6 to 7 Milliamperes.
There are two ways to pull the 8051 microcontroller out from the idle mode.
- If any enabled interrupt occurs during the idle mode, it resets the IDL bit of the PCON register
- Hardware reset
As the clock is already running in the case of the idle mode, the reset pin should be held active for two clock cycles. The reset clears the IDL bit, and the CPU resumes operation from where it left off; that is the instruction after the one that invoked the IDL mode.
Difference between Power down and Idle modes
|Parameter||Power Down Mode||Idle Mode|
|Initialized by setting||PCON.1||PCON.0|
|Terminated By||By Hardware Reset Only||
Any Enabled Interrupt or Hardware Reset
SFRs after Exit
|Condition of Internal RAM||Unchanged||Unchanged|
|Condition of Ports during Sleep||Unchanged||Unchanged|
PCON register and power mode selection
The PCON register in the SFR space selects the power-saving mode in 8051. It is placed at memory location 87H and is not bit addressable. To select IDLE mode, the 0th bit in the PCON register (IDL) is set t0 1, and for power-down mode, bit 1 (PD) is set to 1. If both the bits are set to 1, then power down is given precedence.
Now that we have understood the power modes of MCS-51 let us look at other power-saving microcontrollers with 8051 IP cores.
C8051F96x low power microcontroller by silicon labs
Compared to the MCS-51 the C8051F96x has six different power modes:
- Normal mode- All the components of the microcontroller are running.
- IDLE mode- Similar to the Idle mode of MCS-51.
- Stop mode-Similar to power down mode of MCS-51.
- Low power idle- Uses clock gating to save more power.
- Suspend mode- Similar to stop mode but has faster wake uptime.
- Sleep– Ultra-low-power saving with multiple wake up options.
ML51 low power microcontroller by Nuvoton
Compared to the MCS-51 the C8051F96x has four different power modes:
- Normal mode- All the components of the microcontroller are running.
- Low power run mode– It is similar to the normal mode but saves power by reducing the clock frequency.
- Low power idle mode– Similar to the idle mode of MCS-51.
- Power down mode- Similar to power down mode of MCS-51.
Companion between AT89S51, C8051F96x series, MCS 51, and ML51 series
|Operating Oscillator Frequency||Current required in Normal mode||Current required in Idle mode||Current required in Power Down mode|
|MCS 51||12 MHz||25mA||6.5mA||50uA|
An example to use timers with idle mode
ORG 0000H; starting address for the microcontroller LJMP MAIN; used to bypass the memory which store the interrupt service routine ORG 001BH; memory location which holds the interrupt service routine for TF1 RETI; used to exit the interrupt subroutine ORG 0030H; Memory location where the program code (i.e MAIN) is kept MAIN:MOV TMOD,# 10H; selects timer 1 mode 1 MOV TL1, #00H; loads 00H into the TL1 register of timer 1 MOV TH1, #00H; loads 00H into the TH1 register of timer 1 MOV IE, #1000 1000B; enables interrupt for timer 1 SETB TR1; starts the timer MOV PCON,#0000 0001B; puts the 8051 in idle mode(CPU stops working) MOV A, #30H; moves 30H into the accumulator MOV R0,#20H; moves 20H into R0 ADD A, R0; Adds the value stored in the accumulator and R0 and stores the result in R0
The program starts execution from 0000 0000H memory location in the memory. After this, it encounters the LJMP instruction. This transfers control to 0030H memory location. This is where the MAIN label is stored.
The memory location 001BH contains the interrupt service routine. The interrupt service routine(ISR) is a small memory area that is assigned to each interrupt of 8051. When an interrupt occurs, the control is taken to the ISR and then returned to the program code by the RETI instruction.
So once the control is transferred to 0030H (MAIN), we select the timer mode, assign values are to registers TL1, and TH1, and then the interrupts are enabled. Once all this is done, the timer starts, and the next instruction turns on the idle mode. The CPU stops working, and the only operation happening in the microcontroller at the moment is the up counting of pulses by the timer.
Once the timer reaches FFFFH, the TF1 flag is raised. This enables the interrupt, which takes the microcontroller out of the idle mode. The RETI command transfers the control to the instruction that comes after the instruction that was used to set the 8051 in Idle mode. Thus, as soon as the 8051 exits the Idle mode the MOV A, #30H instruction executes.
We hope that reading this article helped you gain insights into the power saving modes of the 8051. If you have any issues feel free to ask questions in the comments section and we will get back to you in a jiffy