I had a thought today while reading through some of the ChipGeek blurbs and reader responses. They set my mind down a path that led to an interesting idea: has anyone ever considered what kind of CPU could be designed if heat, energy used, and required resources were not issues? I realize it's a purely hypothetical endeavor; however, history is replete with real-world examples of these kinds of exercises: a humble mathematician working alone on the impossibly complex world of the binary nearly 100 years before there was ever any need for it (i.e., before the digital computer was invented); a quaint Italian who designed (what would probably have been) a working helicopter about 500 years before the internal combustion engine was invented (providing the necessary power to make it work). Many precedents are out there. So, I guess I'm asking this: has anyone heard of a paper or book which describes this “ultimate computer” where heat, used energy, and required resources are not an issue? Where just the simplified, raw thoughts behind what makes it work are laid out? Never mind the mechanics of how it gets done, just what does it/can it do? What would that design consist of? How would it process data? What would the interface be for users/other computers? I'm trying to envision it in my mind, but there are so many variables. I think it would take a great deal of thought to sort it all out. Still, any thoughts?
Rob Note: One thing I can think of is packing those transistors much more densely right off. There's no worry about heat, so no worry about electromigration. Why not make the trace lengths very tiny? Then throw a few double-pumped ALUs in there like Intel's Pentium 4 ALU … that's a start.
USER COMMENTS 17 comment(s)
|Even your brain (11:26am EST Fri Jun 14 2002)
produces heat. I'd write more, but just thinking about this article requires me to go soak my head right now.
- by DeafDude
|Johny bla-bla (11:51am EST Fri Jun 14 2002)
Ever looked at a Nueral network. $get about diagonal imagine a node or single chip core (Rick's 386 x50 cores on chip) that had conectors in all directions like a pin-cussion directly to pertinent other nodes like the inside of a corporation with it's pods, nodes, ganglia, and exec's. then the main core could be a monster deligator. it would probably be quite large though but heat could better be disipated. especially if the indiv cores spread out as heat raised and compressed as it decreased. - by geek
|Yeas, but (11:53am EST Fri Jun 14 2002)
your brain produces the same heat whether you're watching a TV soap opera or inventing a time machine. That is quite mysterious: a brain is a computing machine which does not generate any more heat when it works many times harder. - by mz
|Um No, mz (12:24pm EST Fri Jun 14 2002)
Actually, the brain generates more heat under some circumstances than others. The fact that visual processing is highly resource intensive should come as not surprise to anyone. It just so happens that liquid cooling is very efficient so folks don't burn off any hair. - by PC Police
|zero energy computing (4:36pm EST Fri Jun 14 2002)
Prof. Fredkin from MIT spent a lot of
time on this very subject (I don't know
if the idea is originally his). The
observation is that destroying
information is what requires energy,
so Fredkin's zero energy computing is
completely reversible. The basic gate
has a control that either reverses
its two inputs or passes them straight
Fredkin gave one model of how such
- by ek
|ek (5:40pm EST Fri Jun 14 2002)
- by Rick C. Hodgin
|make the chip bigger (8:57pm EST Fri Jun 14 2002)
IM far from knowledgeable in this feild
but whay not leave the 300mm waffel as one big thing and print the whole montherboard and intergrated graphics and ram and solid state storage and wiresles connects, (network, monitor, mouse, keyboard printer, everything wireless)on to this huge chip and then what you do is connect this sold brick to the wall and the place all your devises near it and they all work.
or maybe just make the 300mm waffer a huge proceesor jam packed with transistor all on a 90nm proccess.
since i have no actuakl technical knowledge maye this is not even possible using todays technology.
|typos (9:01pm EST Fri Jun 14 2002)
i know i made sevral, waffel=waffer
wiresles=wireless devises=devices proceesor=processor actuakl=actual maye=maybe
i think thats them.
|Duh (9:33am EST Sat Jun 15 2002)
“Why not make the trace lengths very tiny? Then, throw a few double-pumped ALUs in there like Intel's Pentium 4 ALU… and that's a start.”
50 or 100 stage pipeline? If it's the heat nor computational power I would throw a 10.000-stage long pipeline.
However it could continue producing heat. Quanta is quanta. - by Askheart
|PC POlice (11:51am EST Sat Jun 15 2002)
Actually, you're right that stressful episode are more heat potent than TV watching. The note here is stress.
The human brain doen't see a quantum physics equation meditation harder than planning your next trip to Las Vegas.
Different people develop diferent abilities. Each has it's facilities that are easily exploited through habit.
I think Neural Networks are the way to go. Much like your 386 multi cpu. THe principle is closer to the brain than a P4.
Closer to the brain is better.
Because, the brain is the ultimate computing tool in that it can achieve pretty much anything -albeit at a slow rate. - by DA
|Forget about it… (8:59pm EST Sat Jun 15 2002)
10000-stage pipe. How many electrons are needed to walk through it, do imagine a working FET's of that.
100's of the pipe stages just for load functions! It should be centred on TLB's. A 64 or 512-way set associative data TLB's coupled with a multitude of connections to the pipeline. First stage load control, load the instruction, perform the TLB scan through the subsequent stages… , should be efficient but it would generate too much heat. No way. - by Askheart
|No heat (5:45am EST Sun Jun 16 2002)
Reverse the process so you take the result away the result from the question and you no longer need to clear the pipe (the bit that genarates the heat) - by MAD RAB
|Ya know – BIG numbah Pipeline discussions just flog me (10:20am EST Sun Jun 16 2002)
Come on, goats. Get a grip. The number of pipeline stages has nothing to do with a PARTICULAR number, but to the irreducable number of atomic operations necessary to transform a chunk of code into the execution of its operator against operands, and returning the results to storage.
Now GEEKS… understand that 'as an exercise', I just pulled those stages out of thin air. I would have a DARN difficult time coming up with more than 25 or 30 stages of execution for a hypothetical deep-pipe CPU. Think that's because I'm putting on airs as a synthetic chip designer/analyst without the credentials? Ahem. Its true, but in the end it doesn't take genius to understand the internal model of a CPU. After all, we goatgeeks pride ourselves in knowing such arcana in excruciating detail – although it doesn't make a scintilla of a difference in our daily lives.
So, to the 10,000 pipeline stage arguers – I make a challenge: come up with a list of atomic ops that would benefit – indeed require – 100 pipeline stages. I'd bet multiple bags of reasonably fresh donuts to the first person that CAN describe a CPU execution chart that benefits from 100 non-redundant exeuction stages.
Grrrr rrr rr rrrr
- by GoatGuy
|Right there goat (12:14pm EST Sun Jun 16 2002)
I did mention a 64-way set associative TLB with the data prefetch workload into the pipeline in mind.
It was useless to largely split the TLB associativity for these reasons:
- If there are few entries it's useless
- If there are too many entries the TLB scanning will become too slow
My solution is to integrate a scan-per-set into several stages of the pipeline.
Each stage has a full-associativity rule with a specific TLB set (might access it easily – but comparatively faster than – as a direct read memory transaction between cpu & dram).
It works this way
…scan tlb set #0
The next stage and scan goes always after the precedent pass through the previous TLB set, the meaning is to give best data sampling width for branch prediction (it should increase accuracy greatly), which would allow for much less pipe stalls, and… longer pipelines (more MHz!)
“Think that's because I'm putting on airs as a synthetic chip designer/analyst without the credentials?”
Feel confident :) I ain't too :D - by Askheart
|No heat computing … (1:28pm EST Mon Jun 17 2002)
This is not possible, actually.
Here is the reasoning:
1. Any gate will have to produce heat for the logic (unless it is a 0 heat gate, i.e., a Fredkin gate). Why? Its in the entropy. Combining 2 logical signals into 1 looses entropy that has to go somewhere. Physical entropy is typically associated with the logical channels and this argument still holds.
Fredkin gates just sort out the signals into a proper signal and the garbage. This permits to make the gate reversible and theoretically using no energy, except the part that makes the switching go forward in one direction.
2. Energy actually drives the speed of the switching process. The more energy, the faster.
3. The most energy efficient computer would use reversible gates. The only energy expended would be in the readout of the results (you want to know what you got), and the energy to drive the computation forward with a certain speed (getting over kT noise as well). Tun the computation backwards after the readout to recover energy still in your gates.
Papers: Check on Feynman, he has some. Check papers from Fredkin and others about the link between entropy and energy in switching gates.
|hmmm… (1:33am EST Tue Jun 18 2002)
256 – 5Terahertz CPU's
512 terrahertz of ram
999,999,999 RPM 10 exabyte hard drive with a terabyte cache that sends at o… say… 500 terrabytes/second
thast just the beggining of osmething i could dream of… o and i would have to have my 1.44 MB floppy drive… - by Hentai[Q[
|im dumb* (1:34am EST Tue Jun 18 2002)
512 terrabytes of ram * - by Hentai[Q]