Before starting a mobile wireless design, you need to determine the data-converter performance requirements in your baseband-sampling radio architectures.
Mobile broadband wireless communication systems employ several techniques for improving spectral efficiency. To achieve high data rates, yield optimal system capacity, and ensure reliable quality-of-service, modern communication systems use wide variable channel bandwidths (BW = 1.25 MHz to 20 MHz), high-order modulation (16QAM to 64QAM), code-division or orthogonal multiple-access (CDMA, OFDMA), and scalable smart-antenna technology (MIMO, spatial diversity).
3GPP standards including UMTS, TD-SCDMA, and Long-Term Evolution (LTE) as well as others like IEEE 802.16e and IEEE 802.11n are examples of systems using these techniques. As an example, 4G systems like LTE using 64QAM modulation with subcarrier = 2048 OFDM, 20-MHz wide channel bandwidth and 2×2 MIMO architecture can achieve data rates greater than 100 Mbits/s with robust performance.
High-order modulation with OFDM, wide channel bandwidths, and MIMO architectures all conspire to demand higher performance from the receiver analog-to-digital converters (RX-ADCs) and transmitter digital-to-analog converters (TX-DAC). The data-converter requirements include faster sample rates, better dynamic range , improved spectral performance, and multiple channels. Furthermore, since the end-product communication equipment is mobile and battery-powered, the data converters must be low in cost and power with small footprints.
Because mobile wireless products are size, power, and cost sensitive, the preferred radio architecture is direct-conversion zero intermediate frequency (ZIF). Compared to heterodyne radios, t he ZIF architecture eliminates multiple IF components such as the mixer, LO synthesizer, and image reject filter, and that lowers cost and reduces size. Furthermore, in applications with variable channel bandwidth, like WiMAX and LTE, the ZIF architecture lends itself to programmable baseband filtering.
Figure 1 shows a typical ZIF radio lineup for a UMTS-WCDMA handset or data card application. The ZIF radio architecture requires a dual-channel RX-ADC and dual-channel TX-DAC used for in-phase and quadrature (I-Q) baseband signal sampling and construction. Other low-speed converters are used for RF front-end gain control and ancillary analog-signal measurements like temperature and transmitter power. The converter’s digital bus interfaces with an FPGA, DSP, or ASIC digital baseband processor. The digital baseband performs signal-processing functions like channel coding, modulation, and digital filtering. A single-mode WCDMA ZIF radio may require eight data- converter channels.
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Enter The High-Speed AFE
The high-speed and low-speed data converters can be combined into a single device to meet size, cost, and power targets for consumer mobile products. The integrated converter solution may be referred to as a high-speed analog front end (AFE). One such AFE is the MAX19712, shown in a system context in Figure 1. The AFE integrates all data converters needed to interface with a radio front end.
A high-speed AFE has applications in multi-mode designs such as a dual-mode smart-phone supporting UMTS plus Wi-Fi or MIMO-based designs like LTE, WiMAX, and 802.11n, which require multiple radios and multiple converter channels. There is a 4:1 ratio between converter channels and radio transceivers. For every radio transceiver added, the data-converter density increases by four times. The 4:1 relationship between high-speed data converters and radios makes the AFE an attractive solution for FPGA-based and DSP-based designs.
Because the standalone DSP and FPGA often are pure digital devices, they don’t integrate mixed-signal data-converter functionality. A high-speed AFE fulfills the data-converter requirements and ideally does the job with a low power drain and a small footprint. Another advantage to the AFE partition is scalability. As a given design scales from 1×1 SISO to 2×2 MIMO or 4×4 MIMO, the AFE can be bolted on as needed. A standalone AFE partition provides design flexibility and scalability. However, fully understanding the system requirements is a key factor in executing a successful AFE partition.
When selecting a high-speed analog front end for wireless communications systems, the target air-interface channel bandwidth, modulation, and desired symbol-error-rate must be identified. Also, all data-converter functions as related to the radio front end must be identified. The converter cost and power targets must be identified. And, the converter dynamic performance requirements and tradeoffs must be understood.
Understanding the high-speed converter performance requirements is critical for several reasons. Primarily, the converter’s dynamic performance establishes the radio’s performance level. The RX-ADC and TX-DAC must faithfully digitize and synthesize receiver and transmitter signals without degrading system signal-to-noise ratio (SNR) and symbol-error-rate (SER).
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Additionally, over-specifying the converters results in a higher-power and higher-cost solution. To minimize system size and reduce total cost, the analog and digital physical interface must work seamlessly with the radio and digital baseband. A seamless physical interface eliminates external discrete devices needed for level shifting, gain setting, and offset adjustments.
High-Speed Converter Resolution And Sample Rate
System-level requirements for modulation order, desired symbol error rate, high-level undesired interference levels, spurious emission levels, and access coding determine the RX-ADC and TX-DAC dynamic specifications. Signals that use high-order modulation require more quantization levels.
In such systems, channel bandwidth determines converter sample rate, the peak-to-average power ratio (PAPR) dictates dynamic range, and the system spurious emission levels determine output spectral purity. In mobile wireless terminals, the resolution and conversion rate of the RX-ADC or TX-DAC can range from 4 bits used in quadrature phase-shift keying (QPSK) to 12 bits used in 64QAM and 5-Msample/s to 80-Msample/s conversion rates for channel bandwidths from 1.25 to 40 MHz.
High-Speed Converter Sample Rate
The Nyquist criterion dictates that the converter sampling frequency must be at least twice the highest-frequency component of interest or information will be lost. For example, in an 802.11g wireless local-area network (WLAN) radio, the channel bandwidth is 16.25 MHz. At baseband, the I-Q frequency components are each 8.125 MHz. So theoretically, the RX-ADC and TX-DAC must sample at least 16.25 Msamples/s (FCLK = 16.25 MHz).
This sample rate requires a “brick wall” filter (a high-order filter) that attenuates the out-of-band frequency components to prevent aliasing by the receiver ADC or spurious emissions in the DAC transmit path. When the sample rate is increased by four times or eight times, the baseband I-Q filter order requirement can be relaxed because alias and image frequencies are moved beyond the first Nyquist region.
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Also, attenuation due to the TX-DAC sin(x)/x response can be minimized by increasing FCLK. The normalized TX-DAC output amplitude is given by the following equation:
Ao = sin (πFo/Fc) × (πFo/Fc)-1
Fo = output frequency
Fc = clock frequency
The normalized output amplitude equation shows that for FOUT = FCLK/8, the sin(x)/x attenuation is reduced to 0.22 dB. Process gain is an added benefit to oversampling since the converter SNR improves by 3 dB with a twofold increase in FCLK.
As air-interface channel bandwidths increase, likewise, the data- converter sample rate must increase. A minimum 2 x over sampling rate is desirable to reduce base band filter requirements, improve SNR, and minimize sin(x)/x effects. To address 4G variable channel bandwidths covering 1.4 MHz up to 20 MHz, the high-speed data converter minimum 2x over sampling rate ranges from 2.8 Msamples/s to 40 Msamples/s.
RX-ADC: How Many Bits?
The RX-ADC dynamic-performance requirements can be calculated using the RX-ADC SNR budget analysis shown in Figure 2. The analysis determines the required RX-ADC dynamic range for reliable signal recovery. In baseband sampling applications, the important ADC parameter is signal-to-noise-and-distortion (SINAD), which translates to effective-number-of-bits (ENOB). Dynamic performance represented as ENOB is the key parameter, not absolute resolution in bits. ENOB and SINAD are related by the following equation:
The SINAD parameter accounts for noise and distortion within the Nyquist band and process gain due to oversampling. RF front-end sensitivity, noise figure, and filtering are selected to meet the baseband demodulation signal processing requirement for a desired symbol-error-rate.
It is the primary job of the RX-ADC to quantize the ZIF receiver I-Q analog output signals without significantly degrading signal SNR. Furthermore, the RX-ADC cannot introduce distortion products that inhibit reliable signal recovery.
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Figure 2 analysis uses 64QAM modulation with OFDM, channel bandwidth = 5 MHz, 1e-5 symbol-error-rate and accounts for ADC SNR degradation, ADC gain/offset error, RF front-end automatic gain control (AGC) error. The analysis is applicable to any air-interface standard including WiMAX, LTE, and 802.11a/b/g/n. The RX-ADC SNR budget involves several factors:
• Modulation SNR: For 64QAM modulation with SER = 1e-5 (symbol error rate), the digital demodulator requires 18-dB SNR. This is based on known symbol error probability theory (Fig. 3).
• SNR margin: Since an ADC has internal noise sources, it does not behave like an ideal quantizer. The ADC inherently adds noise and distortion to the input signal. The design objective is to select an ADC with noise and distortion at an acceptable level meeting the digital demodulator SNR requirements. Typically, a good figure-of-merit is 0.6-dB degradation. This means the ADC will not degrade the input SNR by more than 0.6 dB. Therefore, the ADC must have 8.86 dB better SNR than the input signal SNR level. In other words, if the input signal has an 18.6-dB SNR, then the ADC needs 27.46-dB SNR to prevent degrading the input by more than 0.6 to 18 dB. The following equation calculates system SNR:
System SNR = –20log (10-SNRa/10 + 10-SNRb/10 +......10-SNRn/10)1/2
PAPR: For 2N-carrier (subcarriers = 256, 512, 2048) OFDM signaling, the peak-to-average power ratio (PAPR) is 8 to 12 dB. This means the ADC input must be backed off by 12 dB to prevent clipping during peaks. ADC clipping should be avoided since it creates distortion that degrades SER performance.
• Gain and offset error: The major contributor to gain error for an ADC is the internal voltage reference. The internal reference can have ±5% tolerance over temperature. Offset is residual from the internal ADC amplifier voltage offsets. Gain and offset errors are important considerations in the ADC error budget because they reduce the usable dynamic range. If the gain error and offset error are each 10% of full scale, then each contributes a 1-dB reduction in dynamic range. Because of this error, the ADC must be backed off 1 dB to prevent input clipping and another 1 dB backed off to account for limited dynamic range. Using the internal ADC voltage reference saves cost and size, and it eliminates an extra component in inventory. So, accounting for the reduction in dynamic range by adding 2dB is a reasonable cost-size tradeoff.
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• AGC error: A typical ZIF receiver integrates AGC to set baseband analog I-Q output-voltage signal levels. The AGC level can have a 20% (±10%) accuracy error due to variations over process, temperature, and supply voltage. This translates to an error of 2 dB in the AGC. To maintain desired SNR level and PAPR back-off at the RX-ADC input, the AGC error should be considered in an SNR budget analysis. For example, if the actual AGC setting is 2 dB lower from the expected setting, then SNR will be 2 dB lower.
• Channel filter: There are circumstances where the RF receiver cannot sufficiently filter undesirable adjacent-channel interferers. In such a case, the RX-ADC must have adequate dynamic range to handle the blocker signal level plus the desired signal while maintaining the required SINAD for digital demodulation of the desired signal. Additional dynamic range is used to digitally filter the undesired interferer. Or to lower cost and die size, the baseband analog filter order can be reduced and additional filtering can be done digitally. A dB-for-dB relationship exists between the analog and digital filter order, so a 6-dB reduction in analog filtering must be made up by boosting the RX-ADC’s dynamic range by 6 dB. For this example, 12-dB blocker attenuation is assumed.
• Process gain: Assume the RX-ADC is 2× oversampling the baseband analog I-Q signal. Since the baseband signal BW = 2.5 MHz and FCLK = 10 MHz, the resulting process gain is 3 dB. The process gain improves SNR by 3 dB, which can be subtracted from the required RX-ADC SNR.
The above analysis concludes that an RX-ADC with SINAD = 51.86 dB at FCLK = 10 Msamples/s ensures digital demodulator signal recovery of a 5-MHz, 64QAM, OFDM signal at SER = 1e-5.
TX-DAC: How Many Bits?
The TX-DAC dynamic performance requirements can be calculated using the example TX-DAC SNR budget analysis in Figure 4. The analysis is based on the error vector magnitude (EVM) specification for a ZIF transmitter lineup. EVM is a modulation quality metric used in many air-interface standards (3G, 4G, and 802.11a/b/g/n) and is defined as the ratio of RMS constellation error magnitude to peak constellation symbol magnitude. Expressed as a percent, it is a measure of total transmitter performance including impairments such as gain/phase error, symbol error, and in-channel spurious. EVM is related to SNR by the following equation so it can be related to SER:
SNR = –20log (EVM/100%)
The performance budget analysis in Figure 4 is based on a 16QAM modulation with OFDMA, 1e-6 symbol-error-rate (SER), channel bandwidth = 8.75 MHz, and allowances for TX-DAC degradation, DAC gain/offset error, and PAPR. The analysis uses the Wi-Bro air-interface standard as an example but is applicable to any wireless broadband standard. Several factors summarize the TX-DAC SNR budget:
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• Modulation EVM: A given air-interface reference design such as Wi-Bro using the MAX2837 provides a 3.5% transmit EVM for 16QAM, three-quarters forward error correction (3/4-FEC) coded signal with a POUT = +23 dBm. The EVM spec is antenna referenced and includes RF modulator and power-amplifier (PA) impairments. The 3.5% EVM performance translates to –29.1-dB SNR.
• SNR margin: Assume the TX-DAC cannot degrade system SNR by more than 0.6 dB, which translates to a TX EVM degradation of 0.25%. Overall TX EVM including the TX-DAC contribution must be 3.75% (3.5% + 0.25%) or 28.5-dB SNR. The modulator and PA yield 29.1-dB SNR based on 16QAM modulation. Consequently, the TX-DAC must have 8.86-dB better SNR to yield 0.6-dB degradation. The TX-DAC requires 37.96-dB SNR (29.1 dB + 8.86 dB).
• PAPR: For 2N-carrier (subcarriers = 256, 512, 2048) OFDMA signaling, the peak-to-average power ratio is 8 to 12 dB. This means the TX-DAC output must be backed off –12 dB to prevent clipping during peaks. DAC clipping creates signal distortion, resulting in spurious emissions that degrade SER performance.
• Gain and offset error: The major contributor to gain error for a DAC is the internal voltage reference. The internal reference can have ±5% tolerance over temperature. Offset is residual from the internal DAC amplifier voltage offsets. Gain and offset errors are important considerations in the DAC error budget because they reduce the usable dynamic range. If the gain error and offset error are each 10% of full scale, then each contributes a 1-dB reduction in dynamic range. Because of this error, the DAC must be backed off 1 dB to prevent output clipping and another 1 dB must be accounted for in the limited dynamic range.
• SIN(x)/x correction: The SIN(x)/x frequency response at 4× oversampling results in –0.91-dB attenuation at FOUT = FCLK/4. A finite-impulse-response filter implemented in digital baseband can correct for this. Alternatively, if this roll-off is acceptable, then a +0.91-dB margin can be added to the SNR budget that accounts for –0.91-dB SNR degradation at FOUT = FCLK/4.
The above analysis concludes that a TX-DAC with SNR = 52.87 dB at FCLK = 35 Msamples/s can synthesize an 8.75-MHz, 16QAM, OFDMA Wi-Bro signal spectrum at SER = 1e-6.
The auxiliary DAC channels are primarily used for gain control functions like AGC and VGA. Factors influencing auxiliary DAC resolution and conversion rate include gain control voltage levels, gain range, gain step size, and settling time. Typical ZIF radios have approximately a 60-dB receiver AGC baseband gain range with 0.5-dB step size, a 50-dB transmitter VGA range with 1-dB step size, and 30-dB AFC range. The auxiliary functions typically have 2-V full-scale range and 100-ms settling time. To calculate auxiliary DAC resolution, the AGC function provides 60-dB gain range/0.5-dB step size = 120 steps. Therefore, 2n = 120 and n = 6.9 bits.
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The DAC channels need to be guaranteed monotonic with less than ±2-LSB integral non-linearity. Absolute accuracy is not required because the DAC channels are used in a closed loop system. However, guaranteed monotonicity is important to maintain loop stability. To ensure system linearity, INL over a specified usable code range is adequate.
The auxiliary ADC parameters are primarily determined by input signal level and accuracy. But in some applications such as 802.11a, a fast RSSI conversion (T < 5µs) is needed. Measurements such as PA power level, voltage standing-wave ratio (VSWR), and temperature sensing aren’t speed-critical. A typical power detector, like the MAX2208 and competitive solutions, have an analog output voltage range at RF = 1880 MHz of 50 mV (PIN = +6 dBm) to 700 mV (PIN = +30 dBm) with ±1.3 dB variation. A typical temperature sensor, like the MAX6613, has an analog output range of 400 mV to 2 V with ±4°C accuracy. The resolution and conversion rate of the general-purpose converters typically range from 8- to 10-bit resolution and a 50- to 300-ksample/s conversion rate.
The following data-converter parameters interfacing with appropriate ZIF radio can support 64QAM downlink and 16QAM uplink with OFDM and channel bandwidth ranging from 1.25 to 5 MHz at x8 oversampling or up to 10 MHz with x4 oversampling:
• Dual, 10-bit, 40-Msample/s high-speed ADC (RX), SINAD = 51.86 dB
• Dual, 10-bit, 40-Msample/s high-speed DAC (TX), SNR = 52.87 dB
• Triple, 8- to 10-bit, low-speed DAC with serial interface
• 8- to 10-bit, low-speed ADC with 2:1 multiplexer and serial interface
A single integrated high-speed AFE device such as the MAX19713 or similar devices from other vendors can meet the above system requirements and provide the following features:
• Dual, 10-bit, 40-Msample/s high-speed ADC (RX)
• Dual, 10-bit, 40-Msample/s high-speed DAC (TX)
• Triple, 10-bit, low-speed DAC with serial interface
• 10-bit, low-speed ADC with 2:1 multiplexer and serial interface
• TX-DAC common-mode adjust, TX-DAC I/Q-offset adjust, RX-ADC wide input common-mode range
• Production tested over temperature
The author would like to thank Scott Anderson, MTS Applications in Maxim’s Wireless Business Unit, for contributing Figure 3 data.
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4. WiBro Reference Design with MAX2837, Application Note 4274, Maxim Integrated Products, 2008.
5. WiMAX Concepts and RF Measurements, 5989-2027EN, Agilent Technologies, 2005.