CASS
Collection
Large-scale dataset and model suite for cross-architecture GPU code transpilation between CUDA and HIP at both source and assembly levels
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2 items
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filename
stringlengths 40
40
| cuda_source
stringlengths 11
9.01M
| cuda_host
stringlengths 1.53k
6.65M
| cuda_device
stringlengths 17
97.4M
| hip_source
stringlengths 29
9.01M
| hip_host
stringlengths 407
13.3M
| hip_device
stringlengths 650
11.7M
|
|---|---|---|---|---|---|---|
b3a15a78d50007e98c8062c16758b9532d1808fd
|
#include "includes.h"
__global__ void vecProductKernel(float *d_z, const float *d_x, const float *d_y, unsigned int N)
{
int idx = blockIdx.x * blockDim.x + threadIdx.x;
if (idx < N) {
d_z[idx] = d_x[idx] * d_y[idx];
}
}
|
.file "tmpxft_0034da48_00000000-6_vecProductKernel.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2010:
.cfi_startproc
endbr64
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
jmp __cudaUnregisterFatBinary@PLT
.cfi_endproc
.LFE2010:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z43__device_stub__Z16vecProductKernelPfPKfS1_jPfPKfS1_j
.type _Z43__device_stub__Z16vecProductKernelPfPKfS1_jPfPKfS1_j, @function
_Z43__device_stub__Z16vecProductKernelPfPKfS1_jPfPKfS1_j:
.LFB2032:
.cfi_startproc
endbr64
subq $152, %rsp
.cfi_def_cfa_offset 160
movq %rdi, 24(%rsp)
leaq 56(%rsp), %rdi
movq %rsi, 16(%rsp)
leaq 68(%rsp), %rsi
movq %rdx, 8(%rsp)
leaq 40(%rsp), %rdx
movl %ecx, 4(%rsp)
leaq 48(%rsp), %rcx
movq %fs:40, %rax
movq %rax, 136(%rsp)
xorl %eax, %eax
leaq 24(%rsp), %rax
movl $1, 64(%rsp)
movq %rax, 104(%rsp)
leaq 16(%rsp), %rax
movq %rax, 112(%rsp)
leaq 8(%rsp), %rax
movq %rax, 120(%rsp)
leaq 4(%rsp), %rax
movq %rax, 128(%rsp)
movabsq $4294967297, %rax
movq %rax, 56(%rsp)
movq %rax, 68(%rsp)
movl $1, 76(%rsp)
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
jne .L2
pushq 48(%rsp)
.cfi_def_cfa_offset 168
leaq _Z16vecProductKernelPfPKfS1_j(%rip), %rdi
pushq 48(%rsp)
.cfi_def_cfa_offset 176
movq 84(%rsp), %rcx
movl 92(%rsp), %r8d
movq 72(%rsp), %rsi
movl 80(%rsp), %edx
leaq 120(%rsp), %r9
call cudaLaunchKernel@PLT
popq %rax
.cfi_def_cfa_offset 168
popq %rdx
.cfi_def_cfa_offset 160
.L2:
movq 136(%rsp), %rax
subq %fs:40, %rax
je .L4
call __stack_chk_fail@PLT
.L4:
addq $152, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2032:
.size _Z43__device_stub__Z16vecProductKernelPfPKfS1_jPfPKfS1_j, .-_Z43__device_stub__Z16vecProductKernelPfPKfS1_jPfPKfS1_j
.globl _Z16vecProductKernelPfPKfS1_j
.type _Z16vecProductKernelPfPKfS1_j, @function
_Z16vecProductKernelPfPKfS1_j:
.LFB2033:
.cfi_startproc
endbr64
jmp _Z43__device_stub__Z16vecProductKernelPfPKfS1_jPfPKfS1_j
.cfi_endproc
.LFE2033:
.size _Z16vecProductKernelPfPKfS1_j, .-_Z16vecProductKernelPfPKfS1_j
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "_Z16vecProductKernelPfPKfS1_j"
.section .text.startup,"ax",@progbits
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2035:
.cfi_startproc
endbr64
pushq %rax
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
pushq $0
.cfi_def_cfa_offset 24
xorl %r9d, %r9d
orl $-1, %r8d
pushq $0
.cfi_def_cfa_offset 32
leaq .LC0(%rip), %rdx
movq %rax, %rdi
leaq _Z16vecProductKernelPfPKfS1_j(%rip), %rsi
pushq $0
.cfi_def_cfa_offset 40
movq %rdx, %rcx
pushq $0
.cfi_def_cfa_offset 48
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
call __cudaRegisterFunction@PLT
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
addq $32, %rsp
.cfi_def_cfa_offset 16
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
popq %rdx
.cfi_def_cfa_offset 8
jmp atexit@PLT
.cfi_endproc
.LFE2035:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
|
code for sm_89
Function : _Z16vecProductKernelPfPKfS1_j
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R6, SR_CTAID.X ; /* 0x0000000000067919 */
/* 0x000e280000002500 */
/*0020*/ S2R R3, SR_TID.X ; /* 0x0000000000037919 */
/* 0x000e240000002100 */
/*0030*/ IMAD R6, R6, c[0x0][0x0], R3 ; /* 0x0000000006067a24 */
/* 0x001fca00078e0203 */
/*0040*/ ISETP.GE.U32.AND P0, PT, R6, c[0x0][0x178], PT ; /* 0x00005e0006007a0c */
/* 0x000fda0003f06070 */
/*0050*/ @P0 EXIT ; /* 0x000000000000094d */
/* 0x000fea0003800000 */
/*0060*/ MOV R7, 0x4 ; /* 0x0000000400077802 */
/* 0x000fe20000000f00 */
/*0070*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fc80000000a00 */
/*0080*/ IMAD.WIDE R4, R6, R7, c[0x0][0x170] ; /* 0x00005c0006047625 */
/* 0x000fc800078e0207 */
/*0090*/ IMAD.WIDE R2, R6.reuse, R7.reuse, c[0x0][0x168] ; /* 0x00005a0006027625 */
/* 0x0c0fe400078e0207 */
/*00a0*/ LDG.E R4, [R4.64] ; /* 0x0000000404047981 */
/* 0x000ea8000c1e1900 */
/*00b0*/ LDG.E R3, [R2.64] ; /* 0x0000000402037981 */
/* 0x000ea2000c1e1900 */
/*00c0*/ IMAD.WIDE R6, R6, R7, c[0x0][0x160] ; /* 0x0000580006067625 */
/* 0x000fe200078e0207 */
/*00d0*/ FMUL R9, R4, R3 ; /* 0x0000000304097220 */
/* 0x004fca0000400000 */
/*00e0*/ STG.E [R6.64], R9 ; /* 0x0000000906007986 */
/* 0x000fe2000c101904 */
/*00f0*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0100*/ BRA 0x100; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0110*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0120*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0130*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0140*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0150*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0160*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0170*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0180*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0190*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01a0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01b0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01c0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
..........
|
#include <hip/hip_runtime.h>
#include "includes.h"
__global__ void vecProductKernel(float *d_z, const float *d_x, const float *d_y, unsigned int N)
{
int idx = blockIdx.x * blockDim.x + threadIdx.x;
if (idx < N) {
d_z[idx] = d_x[idx] * d_y[idx];
}
}
|
.text
.file "vecProductKernel.hip"
.globl _Z31__device_stub__vecProductKernelPfPKfS1_j # -- Begin function _Z31__device_stub__vecProductKernelPfPKfS1_j
.type _Z31__device_stub__vecProductKernelPfPKfS1_j,@function
_Z31__device_stub__vecProductKernelPfPKfS1_j: # @_Z31__device_stub__vecProductKernelPfPKfS1_j
.cfi_startproc
# %bb.0:
pushq %r15
.cfi_def_cfa_offset 16
pushq %r14
.cfi_def_cfa_offset 24
pushq %r13
.cfi_def_cfa_offset 32
pushq %r12
.cfi_def_cfa_offset 40
pushq %rbx
.cfi_def_cfa_offset 48
subq $112, %rsp
.cfi_def_cfa_offset 160
.cfi_offset %rbx, -48
.cfi_offset %r12, -40
.cfi_offset %r13, -32
.cfi_offset %r14, -24
.cfi_offset %r15, -16
leaq 40(%rsp), %rax
movq %rdi, (%rax)
leaq 32(%rsp), %rdi
movq %rsi, (%rdi)
leaq 24(%rsp), %rsi
movq %rdx, (%rsi)
leaq 4(%rsp), %rdx
movl %ecx, (%rdx)
leaq 80(%rsp), %rbx
movq %rax, (%rbx)
movq %rdi, 8(%rbx)
movq %rsi, 16(%rbx)
movq %rdx, 24(%rbx)
leaq 64(%rsp), %r14
leaq 48(%rsp), %r15
leaq 16(%rsp), %r12
leaq 8(%rsp), %r13
movq %r14, %rdi
movq %r15, %rsi
movq %r12, %rdx
movq %r13, %rcx
callq __hipPopCallConfiguration
movq (%r14), %rsi
movl 8(%r14), %edx
movq (%r15), %rcx
movl 8(%r15), %r8d
movl $_Z16vecProductKernelPfPKfS1_j, %edi
movq %rbx, %r9
pushq (%r13)
.cfi_adjust_cfa_offset 8
pushq (%r12)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $128, %rsp
.cfi_adjust_cfa_offset -128
popq %rbx
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
retq
.Lfunc_end0:
.size _Z31__device_stub__vecProductKernelPfPKfS1_j, .Lfunc_end0-_Z31__device_stub__vecProductKernelPfPKfS1_j
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
jne .LBB1_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, %rdi
movq %rax, __hip_gpubin_handle(%rip)
.LBB1_2:
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z16vecProductKernelPfPKfS1_j, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end1:
.size __hip_module_ctor, .Lfunc_end1-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB2_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB2_2:
retq
.Lfunc_end2:
.size __hip_module_dtor, .Lfunc_end2-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z16vecProductKernelPfPKfS1_j,@object # @_Z16vecProductKernelPfPKfS1_j
.section .rodata,"a",@progbits
.globl _Z16vecProductKernelPfPKfS1_j
.p2align 3, 0x0
_Z16vecProductKernelPfPKfS1_j:
.quad _Z31__device_stub__vecProductKernelPfPKfS1_j
.size _Z16vecProductKernelPfPKfS1_j, 8
.type .L__unnamed_1,@object # @0
.section .rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
.asciz "_Z16vecProductKernelPfPKfS1_j"
.size .L__unnamed_1, 30
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z31__device_stub__vecProductKernelPfPKfS1_j
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z16vecProductKernelPfPKfS1_j
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_
|
.text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z16vecProductKernelPfPKfS1_j ; -- Begin function _Z16vecProductKernelPfPKfS1_j
.globl _Z16vecProductKernelPfPKfS1_j
.p2align 8
.type _Z16vecProductKernelPfPKfS1_j,@function
_Z16vecProductKernelPfPKfS1_j: ; @_Z16vecProductKernelPfPKfS1_j
; %bb.0:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x2c
s_load_b32 s3, s[0:1], 0x18
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
s_mov_b32 s2, exec_lo
v_cmpx_gt_u32_e64 s3, v1
s_cbranch_execz .LBB0_2
; %bb.1:
s_clause 0x1
s_load_b128 s[4:7], s[0:1], 0x0
s_load_b64 s[0:1], s[0:1], 0x10
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[1:2]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v2, vcc_lo, s6, v0
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v3, vcc_lo, s7, v1, vcc_lo
v_add_co_u32 v4, vcc_lo, s0, v0
v_add_co_ci_u32_e32 v5, vcc_lo, s1, v1, vcc_lo
v_add_co_u32 v0, vcc_lo, s4, v0
global_load_b32 v2, v[2:3], off
global_load_b32 v3, v[4:5], off
v_add_co_ci_u32_e32 v1, vcc_lo, s5, v1, vcc_lo
s_waitcnt vmcnt(0)
v_mul_f32_e32 v2, v2, v3
global_store_b32 v[0:1], v2, off
.LBB0_2:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z16vecProductKernelPfPKfS1_j
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 288
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 6
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z16vecProductKernelPfPKfS1_j, .Lfunc_end0-_Z16vecProductKernelPfPKfS1_j
; -- End function
.section .AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 184
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object ; @__hip_cuid_
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0 ; 0x0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 16
.size: 8
.value_kind: global_buffer
- .offset: 24
.size: 4
.value_kind: by_value
- .offset: 32
.size: 4
.value_kind: hidden_block_count_x
- .offset: 36
.size: 4
.value_kind: hidden_block_count_y
- .offset: 40
.size: 4
.value_kind: hidden_block_count_z
- .offset: 44
.size: 2
.value_kind: hidden_group_size_x
- .offset: 46
.size: 2
.value_kind: hidden_group_size_y
- .offset: 48
.size: 2
.value_kind: hidden_group_size_z
- .offset: 50
.size: 2
.value_kind: hidden_remainder_x
- .offset: 52
.size: 2
.value_kind: hidden_remainder_y
- .offset: 54
.size: 2
.value_kind: hidden_remainder_z
- .offset: 72
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 80
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 88
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 96
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 288
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z16vecProductKernelPfPKfS1_j
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z16vecProductKernelPfPKfS1_j.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 6
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata
|
911ae2b5f984789fb3d2dd2176af9455423191b9
|
#include "includes.h"
__global__ void STREAM_Triad_double(double *a, double *b, double *c, double scalar, size_t len)
{
size_t idx = threadIdx.x + blockIdx.x * blockDim.x;
while (idx < len) {
c[idx] = a[idx]+scalar*b[idx];
idx += blockDim.x * gridDim.x;
}
}
|
.file "tmpxft_0023237f_00000000-6_STREAM_Triad_double.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2010:
.cfi_startproc
endbr64
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
jmp __cudaUnregisterFatBinary@PLT
.cfi_endproc
.LFE2010:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z45__device_stub__Z19STREAM_Triad_doublePdS_S_dmPdS_S_dm
.type _Z45__device_stub__Z19STREAM_Triad_doublePdS_S_dmPdS_S_dm, @function
_Z45__device_stub__Z19STREAM_Triad_doublePdS_S_dmPdS_S_dm:
.LFB2032:
.cfi_startproc
endbr64
subq $168, %rsp
.cfi_def_cfa_offset 176
movq %rdi, 40(%rsp)
leaq 64(%rsp), %rdi
movq %rsi, 32(%rsp)
leaq 76(%rsp), %rsi
movq %rdx, 24(%rsp)
leaq 48(%rsp), %rdx
movq %rcx, 8(%rsp)
leaq 56(%rsp), %rcx
movsd %xmm0, 16(%rsp)
movq %fs:40, %rax
movq %rax, 152(%rsp)
xorl %eax, %eax
leaq 40(%rsp), %rax
movl $1, 72(%rsp)
movq %rax, 112(%rsp)
leaq 32(%rsp), %rax
movq %rax, 120(%rsp)
leaq 24(%rsp), %rax
movq %rax, 128(%rsp)
leaq 16(%rsp), %rax
movq %rax, 136(%rsp)
leaq 8(%rsp), %rax
movq %rax, 144(%rsp)
movabsq $4294967297, %rax
movq %rax, 64(%rsp)
movq %rax, 76(%rsp)
movl $1, 84(%rsp)
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
jne .L2
pushq 56(%rsp)
.cfi_def_cfa_offset 184
leaq _Z19STREAM_Triad_doublePdS_S_dm(%rip), %rdi
pushq 56(%rsp)
.cfi_def_cfa_offset 192
movq 92(%rsp), %rcx
movl 100(%rsp), %r8d
movq 80(%rsp), %rsi
movl 88(%rsp), %edx
leaq 128(%rsp), %r9
call cudaLaunchKernel@PLT
popq %rax
.cfi_def_cfa_offset 184
popq %rdx
.cfi_def_cfa_offset 176
.L2:
movq 152(%rsp), %rax
subq %fs:40, %rax
je .L4
call __stack_chk_fail@PLT
.L4:
addq $168, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2032:
.size _Z45__device_stub__Z19STREAM_Triad_doublePdS_S_dmPdS_S_dm, .-_Z45__device_stub__Z19STREAM_Triad_doublePdS_S_dmPdS_S_dm
.globl _Z19STREAM_Triad_doublePdS_S_dm
.type _Z19STREAM_Triad_doublePdS_S_dm, @function
_Z19STREAM_Triad_doublePdS_S_dm:
.LFB2033:
.cfi_startproc
endbr64
jmp _Z45__device_stub__Z19STREAM_Triad_doublePdS_S_dmPdS_S_dm
.cfi_endproc
.LFE2033:
.size _Z19STREAM_Triad_doublePdS_S_dm, .-_Z19STREAM_Triad_doublePdS_S_dm
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "_Z19STREAM_Triad_doublePdS_S_dm"
.section .text.startup,"ax",@progbits
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2035:
.cfi_startproc
endbr64
pushq %rax
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
pushq $0
.cfi_def_cfa_offset 24
xorl %r9d, %r9d
orl $-1, %r8d
pushq $0
.cfi_def_cfa_offset 32
leaq .LC0(%rip), %rdx
movq %rax, %rdi
leaq _Z19STREAM_Triad_doublePdS_S_dm(%rip), %rsi
pushq $0
.cfi_def_cfa_offset 40
movq %rdx, %rcx
pushq $0
.cfi_def_cfa_offset 48
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
call __cudaRegisterFunction@PLT
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
addq $32, %rsp
.cfi_def_cfa_offset 16
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
popq %rdx
.cfi_def_cfa_offset 8
jmp atexit@PLT
.cfi_endproc
.LFE2035:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
|
code for sm_89
Function : _Z19STREAM_Triad_doublePdS_S_dm
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */
/* 0x000e280000002500 */
/*0020*/ S2R R3, SR_TID.X ; /* 0x0000000000037919 */
/* 0x000e240000002100 */
/*0030*/ IMAD R0, R0, c[0x0][0x0], R3 ; /* 0x0000000000007a24 */
/* 0x001fca00078e0203 */
/*0040*/ ISETP.GE.U32.AND P0, PT, R0, c[0x0][0x180], PT ; /* 0x0000600000007a0c */
/* 0x000fc80003f06070 */
/*0050*/ ISETP.GE.U32.AND.EX P0, PT, RZ, c[0x0][0x184], PT, P0 ; /* 0x00006100ff007a0c */
/* 0x000fda0003f06100 */
/*0060*/ @P0 EXIT ; /* 0x000000000000094d */
/* 0x000fea0003800000 */
/*0070*/ IMAD.MOV.U32 R11, RZ, RZ, RZ ; /* 0x000000ffff0b7224 */
/* 0x000fe200078e00ff */
/*0080*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fe20000000a00 */
/*0090*/ IMAD.MOV.U32 R10, RZ, RZ, c[0x0][0x0] ; /* 0x00000000ff0a7624 */
/* 0x000fe400078e00ff */
/*00a0*/ IMAD.SHL.U32 R8, R0.reuse, 0x8, RZ ; /* 0x0000000800087824 */
/* 0x041fe200078e00ff */
/*00b0*/ SHF.L.U64.HI R9, R0, 0x3, R11 ; /* 0x0000000300097819 */
/* 0x000fc8000001020b */
/*00c0*/ IADD3 R4, P1, R8.reuse, c[0x0][0x160], RZ ; /* 0x0000580008047a10 */
/* 0x040fe40007f3e0ff */
/*00d0*/ IADD3 R6, P0, R8, c[0x0][0x168], RZ ; /* 0x00005a0008067a10 */
/* 0x000fe40007f1e0ff */
/*00e0*/ IADD3.X R5, R9.reuse, c[0x0][0x164], RZ, P1, !PT ; /* 0x0000590009057a10 */
/* 0x040fe40000ffe4ff */
/*00f0*/ IADD3.X R7, R9, c[0x0][0x16c], RZ, P0, !PT ; /* 0x00005b0009077a10 */
/* 0x000fc800007fe4ff */
/*0100*/ LDG.E.64 R4, [R4.64] ; /* 0x0000000404047981 */
/* 0x000ea8000c1e1b00 */
/*0110*/ LDG.E.64 R2, [R6.64] ; /* 0x0000000406027981 */
/* 0x000ea2000c1e1b00 */
/*0120*/ IADD3 R8, P0, R8, c[0x0][0x170], RZ ; /* 0x00005c0008087a10 */
/* 0x000fe20007f1e0ff */
/*0130*/ IMAD R13, R10, c[0x0][0xc], RZ ; /* 0x000003000a0d7a24 */
/* 0x000fc600078e02ff */
/*0140*/ IADD3.X R9, R9, c[0x0][0x174], RZ, P0, !PT ; /* 0x00005d0009097a10 */
/* 0x000fe400007fe4ff */
/*0150*/ IADD3 R0, P0, R13, R0, RZ ; /* 0x000000000d007210 */
/* 0x000fca0007f1e0ff */
/*0160*/ IMAD.X R11, RZ, RZ, R11, P0 ; /* 0x000000ffff0b7224 */
/* 0x000fe200000e060b */
/*0170*/ ISETP.GE.U32.AND P0, PT, R0, c[0x0][0x180], PT ; /* 0x0000600000007a0c */
/* 0x000fc80003f06070 */
/*0180*/ ISETP.GE.U32.AND.EX P0, PT, R11, c[0x0][0x184], PT, P0 ; /* 0x000061000b007a0c */
/* 0x000fe20003f06100 */
/*0190*/ DFMA R2, R2, c[0x0][0x178], R4 ; /* 0x00005e0002027a2b */
/* 0x004e0e0000000004 */
/*01a0*/ STG.E.64 [R8.64], R2 ; /* 0x0000000208007986 */
/* 0x0011ea000c101b04 */
/*01b0*/ @!P0 BRA 0xa0 ; /* 0xfffffee000008947 */
/* 0x000fea000383ffff */
/*01c0*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*01d0*/ BRA 0x1d0; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*01e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0200*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0210*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0220*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0230*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0240*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0250*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0260*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0270*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
..........
|
#include <hip/hip_runtime.h>
#include "includes.h"
__global__ void STREAM_Triad_double(double *a, double *b, double *c, double scalar, size_t len)
{
size_t idx = threadIdx.x + blockIdx.x * blockDim.x;
while (idx < len) {
c[idx] = a[idx]+scalar*b[idx];
idx += blockDim.x * gridDim.x;
}
}
|
.text
.file "STREAM_Triad_double.hip"
.globl _Z34__device_stub__STREAM_Triad_doublePdS_S_dm # -- Begin function _Z34__device_stub__STREAM_Triad_doublePdS_S_dm
.type _Z34__device_stub__STREAM_Triad_doublePdS_S_dm,@function
_Z34__device_stub__STREAM_Triad_doublePdS_S_dm: # @_Z34__device_stub__STREAM_Triad_doublePdS_S_dm
.cfi_startproc
# %bb.0:
pushq %r15
.cfi_def_cfa_offset 16
pushq %r14
.cfi_def_cfa_offset 24
pushq %r13
.cfi_def_cfa_offset 32
pushq %r12
.cfi_def_cfa_offset 40
pushq %rbx
.cfi_def_cfa_offset 48
subq $144, %rsp
.cfi_def_cfa_offset 192
.cfi_offset %rbx, -48
.cfi_offset %r12, -40
.cfi_offset %r13, -32
.cfi_offset %r14, -24
.cfi_offset %r15, -16
leaq 56(%rsp), %rax
movq %rdi, (%rax)
leaq 48(%rsp), %rdi
movq %rsi, (%rdi)
leaq 40(%rsp), %rsi
movq %rdx, (%rsi)
leaq 32(%rsp), %rdx
movsd %xmm0, (%rdx)
leaq 24(%rsp), %r8
movq %rcx, (%r8)
leaq 96(%rsp), %rbx
movq %rax, (%rbx)
movq %rdi, 8(%rbx)
movq %rsi, 16(%rbx)
movq %rdx, 24(%rbx)
movq %r8, 32(%rbx)
leaq 80(%rsp), %r14
leaq 64(%rsp), %r15
leaq 16(%rsp), %r12
leaq 8(%rsp), %r13
movq %r14, %rdi
movq %r15, %rsi
movq %r12, %rdx
movq %r13, %rcx
callq __hipPopCallConfiguration
movq (%r14), %rsi
movl 8(%r14), %edx
movq (%r15), %rcx
movl 8(%r15), %r8d
movl $_Z19STREAM_Triad_doublePdS_S_dm, %edi
movq %rbx, %r9
pushq (%r13)
.cfi_adjust_cfa_offset 8
pushq (%r12)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $160, %rsp
.cfi_adjust_cfa_offset -160
popq %rbx
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
retq
.Lfunc_end0:
.size _Z34__device_stub__STREAM_Triad_doublePdS_S_dm, .Lfunc_end0-_Z34__device_stub__STREAM_Triad_doublePdS_S_dm
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
jne .LBB1_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, %rdi
movq %rax, __hip_gpubin_handle(%rip)
.LBB1_2:
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z19STREAM_Triad_doublePdS_S_dm, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end1:
.size __hip_module_ctor, .Lfunc_end1-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB2_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB2_2:
retq
.Lfunc_end2:
.size __hip_module_dtor, .Lfunc_end2-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z19STREAM_Triad_doublePdS_S_dm,@object # @_Z19STREAM_Triad_doublePdS_S_dm
.section .rodata,"a",@progbits
.globl _Z19STREAM_Triad_doublePdS_S_dm
.p2align 3, 0x0
_Z19STREAM_Triad_doublePdS_S_dm:
.quad _Z34__device_stub__STREAM_Triad_doublePdS_S_dm
.size _Z19STREAM_Triad_doublePdS_S_dm, 8
.type .L__unnamed_1,@object # @0
.section .rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
.asciz "_Z19STREAM_Triad_doublePdS_S_dm"
.size .L__unnamed_1, 32
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z34__device_stub__STREAM_Triad_doublePdS_S_dm
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z19STREAM_Triad_doublePdS_S_dm
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_
|
.text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z19STREAM_Triad_doublePdS_S_dm ; -- Begin function _Z19STREAM_Triad_doublePdS_S_dm
.globl _Z19STREAM_Triad_doublePdS_S_dm
.p2align 8
.type _Z19STREAM_Triad_doublePdS_S_dm,@function
_Z19STREAM_Triad_doublePdS_S_dm: ; @_Z19STREAM_Triad_doublePdS_S_dm
; %bb.0:
s_clause 0x1
s_load_b32 s6, s[0:1], 0x34
s_load_b64 s[2:3], s[0:1], 0x20
s_add_u32 s4, s0, 40
s_addc_u32 s5, s1, 0
s_waitcnt lgkmcnt(0)
s_and_b32 s12, s6, 0xffff
s_mov_b32 s6, exec_lo
v_mad_u64_u32 v[1:2], null, s15, s12, v[0:1]
v_mov_b32_e32 v2, 0
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_u64_e64 s[2:3], v[1:2]
s_cbranch_execz .LBB0_3
; %bb.1: ; %.lr.ph
s_load_b32 s13, s[4:5], 0x0
s_load_b256 s[4:11], s[0:1], 0x0
v_lshlrev_b64 v[3:4], 3, v[1:2]
s_waitcnt lgkmcnt(0)
s_mul_i32 s12, s13, s12
s_mov_b32 s13, 0
s_delay_alu instid0(SALU_CYCLE_1)
s_lshl_b64 s[14:15], s[12:13], 3
.LBB0_2: ; =>This Inner Loop Header: Depth=1
s_delay_alu instid0(VALU_DEP_1)
v_add_co_u32 v5, vcc_lo, s4, v3
v_add_co_ci_u32_e32 v6, vcc_lo, s5, v4, vcc_lo
v_add_co_u32 v7, vcc_lo, s6, v3
v_add_co_ci_u32_e32 v8, vcc_lo, s7, v4, vcc_lo
v_add_co_u32 v1, vcc_lo, v1, s12
global_load_b64 v[5:6], v[5:6], off
global_load_b64 v[7:8], v[7:8], off
v_add_co_ci_u32_e32 v2, vcc_lo, 0, v2, vcc_lo
s_waitcnt vmcnt(0)
v_fma_f64 v[5:6], v[7:8], s[10:11], v[5:6]
v_add_co_u32 v7, vcc_lo, s8, v3
v_add_co_ci_u32_e32 v8, vcc_lo, s9, v4, vcc_lo
v_cmp_le_u64_e32 vcc_lo, s[2:3], v[1:2]
v_add_co_u32 v3, s0, v3, s14
s_delay_alu instid0(VALU_DEP_1)
v_add_co_ci_u32_e64 v4, s0, s15, v4, s0
s_or_b32 s13, vcc_lo, s13
global_store_b64 v[7:8], v[5:6], off
s_and_not1_b32 exec_lo, exec_lo, s13
s_cbranch_execnz .LBB0_2
.LBB0_3: ; %._crit_edge
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z19STREAM_Triad_doublePdS_S_dm
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 296
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 9
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z19STREAM_Triad_doublePdS_S_dm, .Lfunc_end0-_Z19STREAM_Triad_doublePdS_S_dm
; -- End function
.section .AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 252
; NumSgprs: 18
; NumVgprs: 9
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 9
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object ; @__hip_cuid_
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0 ; 0x0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 16
.size: 8
.value_kind: global_buffer
- .offset: 24
.size: 8
.value_kind: by_value
- .offset: 32
.size: 8
.value_kind: by_value
- .offset: 40
.size: 4
.value_kind: hidden_block_count_x
- .offset: 44
.size: 4
.value_kind: hidden_block_count_y
- .offset: 48
.size: 4
.value_kind: hidden_block_count_z
- .offset: 52
.size: 2
.value_kind: hidden_group_size_x
- .offset: 54
.size: 2
.value_kind: hidden_group_size_y
- .offset: 56
.size: 2
.value_kind: hidden_group_size_z
- .offset: 58
.size: 2
.value_kind: hidden_remainder_x
- .offset: 60
.size: 2
.value_kind: hidden_remainder_y
- .offset: 62
.size: 2
.value_kind: hidden_remainder_z
- .offset: 80
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 88
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 96
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 104
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 296
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z19STREAM_Triad_doublePdS_S_dm
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z19STREAM_Triad_doublePdS_S_dm.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 9
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata
|
837521e6a806e32fd987356451e54b90b08cc7e9
|
#include <iostream>
#include "sys/time.h"
using namespace std;
double timeInSeconds (timeval& starttime, timeval& stopstime) {
return 1e-6*(1e6*(stopstime.tv_sec - starttime.tv_sec) + (stopstime.tv_usec - starttime.tv_usec));
}
__device__ double* dev_vector1 = 0;
__device__ double* dev_vector2 = 0;
__device__ double* dev_results = 0;
__global__ void device_vector_mult () {
// IMPLEMENT ME 6: Multiply the threadIdx.x element of dev_vector1 by the
// corresponding element of dev_vector2, and store in dev_results.
}
int main (int argc, char** argv) {
int sizeOfVector = 100;
if (argc > 1) sizeOfVector = atoi(argv[1]);
// Declare and fill host-side arrays of doubles.
double* vector1 = new double[sizeOfVector];
double* vector2 = new double[sizeOfVector];
double* results = new double[sizeOfVector];
srand(42);
for (int i = 0; i < sizeOfVector; ++i) {
vector1[i] = rand() % 100;
vector2[i] = rand() % 100;
results[i] = 0;
}
timeval startTime;
timeval interTime;
timeval stopsTime;
gettimeofday(&startTime, NULL);
// Use the CPU for this part.
// IMPLEMENT ME 1: Multiply each element of vector1 by the corresponding
// element in vector2 and store in results.
for (int i = 0; i < sizeOfVector; ++i) {
results[i] = vector1[i] * vector2[i];
}
gettimeofday(&interTime, NULL);
double total = 0;
// IMPLEMENT ME 2: Sum the results array and store the sum in total.
for (int i = 0; i < sizeOfVector; +i) {
total += results[i];
}
gettimeofday(&stopsTime, NULL);
cout << "Dot product is : " << total << endl;
// IMPLEMENT ME 3: Time the above operations together and separately
// using 'gettimeofday'.
cout << "Time for multiplication (seconds): " << timeInSeconds(startTime, interTime) << endl;
cout << "Time for addition (seconds): " << timeInSeconds(interTime, stopsTime) << endl;
cout << "Overall time (seconds): " << timeInSeconds(startTime, stopsTime) << endl;
// Now on to the GPU!
// IMPLEMENT ME 4: Use cudaMalloc to allocate space for the three device vectors.
// IMPLEMENT ME 5: Use cudaMemcpy to initialise dev_vector1 and dev_vector2 to have
// the same content as the host-side arrays.
// IMPLEMENT ME 6: Put in the function body for device_vector_mult, above.
// IMPLEMENT ME 7: Launch a kernel that runs device_vector_mult.
// IMPLEMENT ME 8: Use cudaMemcpy to copy back dev_results into results.
// IMPLEMENT ME 9: Calculate the dot product by summing over results, same
// as above.
// IMPLEMENT ME 10: Take the time for the kernel launch and the addition,
// and print out the results (including the dot product) as you did for the CPU.
// IMPLEMENT ME 11: Write a reduction kernel that sums over dev_results, and launch it.
// Time this operation and compare with the code that first moves the transformed data
// to the host, then sums over it.
return 0;
}
|
.file "tmpxft_00306950_00000000-6_ex1.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3639:
.cfi_startproc
endbr64
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
jmp __cudaUnregisterFatBinary@PLT
.cfi_endproc
.LFE3639:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z13timeInSecondsR7timevalS0_
.type _Z13timeInSecondsR7timevalS0_, @function
_Z13timeInSecondsR7timevalS0_:
.LFB3635:
.cfi_startproc
endbr64
movq (%rsi), %rax
subq (%rdi), %rax
cvtsi2sdq %rax, %xmm0
movq 8(%rsi), %rax
mulsd .LC0(%rip), %xmm0
subq 8(%rdi), %rax
cvtsi2sdq %rax, %xmm1
addsd %xmm1, %xmm0
mulsd .LC1(%rip), %xmm0
ret
.cfi_endproc
.LFE3635:
.size _Z13timeInSecondsR7timevalS0_, .-_Z13timeInSecondsR7timevalS0_
.section .rodata.str1.1,"aMS",@progbits,1
.LC3:
.string "Dot product is : "
.LC4:
.string "Time for multiplication (seconds): "
.LC5:
.string "Time for addition (seconds): "
.LC6:
.string "Overall time (seconds): "
.section .text.startup,"ax",@progbits
.globl main
.type main, @function
main:
.LFB3636:
.cfi_startproc
endbr64
pushq %r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
pushq %r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
pushq %r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
pushq %r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
pushq %rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
pushq %rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
subq $72, %rsp
.cfi_def_cfa_offset 128
movq %fs:40, %rax
movq %rax, 56(%rsp)
xorl %eax, %eax
decl %edi
jle .L14
movq 8(%rsi), %rdi
call atoi@PLT
movslq %eax, %rdi
movabsq $1152921504606846975, %rax
movq %rdi, %rbx
cmpq %rdi, %rax
jnb .L4
jmp .L18
.L14:
movl $100, %edi
movl $100, %ebx
.L4:
movslq %ebx, %rbp
salq $3, %rdi
movl $100, %r15d
call _Znam@PLT
salq $3, %rbp
movq %rbp, %rdi
movq %rax, %r12
call _Znam@PLT
movq %rbp, %rdi
xorl %ebp, %ebp
movq %rax, %r13
call _Znam@PLT
movl $42, %edi
movq %rax, %r14
call srand@PLT
jmp .L6
.L18:
movq 56(%rsp), %rax
subq %fs:40, %rax
jne .L16
call __cxa_throw_bad_array_new_length@PLT
.L6:
cmpl %ebp, %ebx
jle .L19
call rand@PLT
cltd
idivl %r15d
cvtsi2sdl %edx, %xmm0
movsd %xmm0, (%r12,%rbp,8)
call rand@PLT
movq $0x000000000, (%r14,%rbp,8)
cltd
idivl %r15d
cvtsi2sdl %edx, %xmm0
movsd %xmm0, 0(%r13,%rbp,8)
incq %rbp
jmp .L6
.L19:
leaq 8(%rsp), %rbp
xorl %esi, %esi
movq %rbp, %rdi
call gettimeofday@PLT
xorl %eax, %eax
.L9:
cmpl %eax, %ebx
jle .L20
movsd (%r12,%rax,8), %xmm0
mulsd 0(%r13,%rax,8), %xmm0
movsd %xmm0, (%r14,%rax,8)
incq %rax
jmp .L9
.L20:
leaq 24(%rsp), %r13
xorl %esi, %esi
movq %r13, %rdi
call gettimeofday@PLT
testl %ebx, %ebx
je .L11
.L12:
jmp .L12
.L11:
leaq 40(%rsp), %r12
leaq _ZSt4cout(%rip), %rbx
xorl %esi, %esi
movq %r12, %rdi
call gettimeofday@PLT
leaq .LC3(%rip), %rsi
movq %rbx, %rdi
call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
xorps %xmm0, %xmm0
movq %rax, %rdi
call _ZNSo9_M_insertIdEERSoT_@PLT
movq %rax, %rdi
call _ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
leaq .LC4(%rip), %rsi
movq %rbx, %rdi
call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
movq %r13, %rsi
movq %rbp, %rdi
movq %rax, %rdx
call _Z13timeInSecondsR7timevalS0_
movq %rdx, %rdi
call _ZNSo9_M_insertIdEERSoT_@PLT
movq %rax, %rdi
call _ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
leaq .LC5(%rip), %rsi
movq %rbx, %rdi
call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
movq %r12, %rsi
movq %r13, %rdi
movq %rax, %rdx
call _Z13timeInSecondsR7timevalS0_
movq %rdx, %rdi
call _ZNSo9_M_insertIdEERSoT_@PLT
movq %rax, %rdi
call _ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
leaq .LC6(%rip), %rsi
movq %rbx, %rdi
call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
movq %r12, %rsi
movq %rbp, %rdi
movq %rax, %rdx
call _Z13timeInSecondsR7timevalS0_
movq %rdx, %rdi
call _ZNSo9_M_insertIdEERSoT_@PLT
movq %rax, %rdi
call _ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
movq 56(%rsp), %rax
subq %fs:40, %rax
je .L13
.L16:
call __stack_chk_fail@PLT
.L13:
addq $72, %rsp
.cfi_def_cfa_offset 56
xorl %eax, %eax
popq %rbx
.cfi_def_cfa_offset 48
popq %rbp
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3636:
.size main, .-main
.text
.globl _Z37__device_stub__Z18device_vector_multvv
.type _Z37__device_stub__Z18device_vector_multvv, @function
_Z37__device_stub__Z18device_vector_multvv:
.LFB3661:
.cfi_startproc
endbr64
subq $88, %rsp
.cfi_def_cfa_offset 96
movq %fs:40, %rax
movq %rax, 72(%rsp)
movabsq $4294967297, %rax
leaq 8(%rsp), %rcx
movq %rsp, %rdx
leaq 28(%rsp), %rsi
leaq 16(%rsp), %rdi
movl $1, 24(%rsp)
movl $1, 36(%rsp)
movq %rax, 16(%rsp)
movq %rax, 28(%rsp)
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
jne .L21
pushq 8(%rsp)
.cfi_def_cfa_offset 104
leaq _Z18device_vector_multv(%rip), %rdi
pushq 8(%rsp)
.cfi_def_cfa_offset 112
movq 44(%rsp), %rcx
movl 52(%rsp), %r8d
movq 32(%rsp), %rsi
movl 40(%rsp), %edx
leaq 80(%rsp), %r9
call cudaLaunchKernel@PLT
popq %rax
.cfi_def_cfa_offset 104
popq %rdx
.cfi_def_cfa_offset 96
.L21:
movq 72(%rsp), %rax
subq %fs:40, %rax
je .L23
call __stack_chk_fail@PLT
.L23:
addq $88, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3661:
.size _Z37__device_stub__Z18device_vector_multvv, .-_Z37__device_stub__Z18device_vector_multvv
.globl _Z18device_vector_multv
.type _Z18device_vector_multv, @function
_Z18device_vector_multv:
.LFB3662:
.cfi_startproc
endbr64
jmp _Z37__device_stub__Z18device_vector_multvv
.cfi_endproc
.LFE3662:
.size _Z18device_vector_multv, .-_Z18device_vector_multv
.section .rodata.str1.1
.LC7:
.string "_Z18device_vector_multv"
.LC8:
.string "dev_vector1"
.LC9:
.string "dev_vector2"
.LC10:
.string "dev_results"
.section .text.startup
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3664:
.cfi_startproc
endbr64
pushq %rbx
.cfi_def_cfa_offset 16
.cfi_offset 3, -16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
pushq $0
.cfi_def_cfa_offset 24
xorl %r9d, %r9d
orl $-1, %r8d
pushq $0
.cfi_def_cfa_offset 32
leaq .LC7(%rip), %rdx
movq %rax, %rdi
movq %rax, %rbx
pushq $0
.cfi_def_cfa_offset 40
movq %rdx, %rcx
leaq _Z18device_vector_multv(%rip), %rsi
pushq $0
.cfi_def_cfa_offset 48
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq %rbx, %rdi
xorl %r8d, %r8d
pushq $0
.cfi_def_cfa_offset 24
leaq .LC8(%rip), %rdx
movl $8, %r9d
leaq _ZL11dev_vector1(%rip), %rsi
pushq $0
.cfi_def_cfa_offset 32
movq %rdx, %rcx
call __cudaRegisterVar@PLT
popq %rax
.cfi_def_cfa_offset 24
popq %rdx
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
leaq .LC9(%rip), %rdx
movq %rbx, %rdi
xorl %r8d, %r8d
movq %rdx, %rcx
movl $8, %r9d
leaq _ZL11dev_vector2(%rip), %rsi
call __cudaRegisterVar@PLT
popq %rcx
.cfi_def_cfa_offset 24
popq %rsi
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
leaq .LC10(%rip), %rdx
movq %rbx, %rdi
xorl %r8d, %r8d
movl $8, %r9d
movq %rdx, %rcx
leaq _ZL11dev_results(%rip), %rsi
call __cudaRegisterVar@PLT
popq %rdi
.cfi_def_cfa_offset 24
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
popq %r8
.cfi_def_cfa_offset 16
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
popq %rbx
.cfi_def_cfa_offset 8
jmp atexit@PLT
.cfi_endproc
.LFE3664:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.local _ZL11dev_results
.comm _ZL11dev_results,8,8
.local _ZL11dev_vector2
.comm _ZL11dev_vector2,8,8
.local _ZL11dev_vector1
.comm _ZL11dev_vector1,8,8
.section .rodata.cst8,"aM",@progbits,8
.align 8
.LC0:
.long 0
.long 1093567616
.align 8
.LC1:
.long -1598689907
.long 1051772663
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
|
code for sm_89
Function : _Z18device_vector_multv
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0020*/ BRA 0x20; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0030*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0040*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0050*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0060*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0070*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0080*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0090*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*00a0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*00b0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*00c0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*00d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*00e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*00f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
..........
|
#include <hip/hip_runtime.h>
#include <iostream>
#include "sys/time.h"
using namespace std;
double timeInSeconds (timeval& starttime, timeval& stopstime) {
return 1e-6*(1e6*(stopstime.tv_sec - starttime.tv_sec) + (stopstime.tv_usec - starttime.tv_usec));
}
__device__ double* dev_vector1 = 0;
__device__ double* dev_vector2 = 0;
__device__ double* dev_results = 0;
__global__ void device_vector_mult () {
// IMPLEMENT ME 6: Multiply the threadIdx.x element of dev_vector1 by the
// corresponding element of dev_vector2, and store in dev_results.
}
int main (int argc, char** argv) {
int sizeOfVector = 100;
if (argc > 1) sizeOfVector = atoi(argv[1]);
// Declare and fill host-side arrays of doubles.
double* vector1 = new double[sizeOfVector];
double* vector2 = new double[sizeOfVector];
double* results = new double[sizeOfVector];
srand(42);
for (int i = 0; i < sizeOfVector; ++i) {
vector1[i] = rand() % 100;
vector2[i] = rand() % 100;
results[i] = 0;
}
timeval startTime;
timeval interTime;
timeval stopsTime;
gettimeofday(&startTime, NULL);
// Use the CPU for this part.
// IMPLEMENT ME 1: Multiply each element of vector1 by the corresponding
// element in vector2 and store in results.
for (int i = 0; i < sizeOfVector; ++i) {
results[i] = vector1[i] * vector2[i];
}
gettimeofday(&interTime, NULL);
double total = 0;
// IMPLEMENT ME 2: Sum the results array and store the sum in total.
for (int i = 0; i < sizeOfVector; +i) {
total += results[i];
}
gettimeofday(&stopsTime, NULL);
cout << "Dot product is : " << total << endl;
// IMPLEMENT ME 3: Time the above operations together and separately
// using 'gettimeofday'.
cout << "Time for multiplication (seconds): " << timeInSeconds(startTime, interTime) << endl;
cout << "Time for addition (seconds): " << timeInSeconds(interTime, stopsTime) << endl;
cout << "Overall time (seconds): " << timeInSeconds(startTime, stopsTime) << endl;
// Now on to the GPU!
// IMPLEMENT ME 4: Use cudaMalloc to allocate space for the three device vectors.
// IMPLEMENT ME 5: Use cudaMemcpy to initialise dev_vector1 and dev_vector2 to have
// the same content as the host-side arrays.
// IMPLEMENT ME 6: Put in the function body for device_vector_mult, above.
// IMPLEMENT ME 7: Launch a kernel that runs device_vector_mult.
// IMPLEMENT ME 8: Use cudaMemcpy to copy back dev_results into results.
// IMPLEMENT ME 9: Calculate the dot product by summing over results, same
// as above.
// IMPLEMENT ME 10: Take the time for the kernel launch and the addition,
// and print out the results (including the dot product) as you did for the CPU.
// IMPLEMENT ME 11: Write a reduction kernel that sums over dev_results, and launch it.
// Time this operation and compare with the code that first moves the transformed data
// to the host, then sums over it.
return 0;
}
|
.text
.file "ex1.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.section .rodata.cst8,"aM",@progbits,8
.p2align 3, 0x0 # -- Begin function _Z13timeInSecondsR7timevalS0_
.LCPI0_0:
.quad 0x412e848000000000 # double 1.0E+6
.LCPI0_1:
.quad 0x3eb0c6f7a0b5ed8d # double 9.9999999999999995E-7
.text
.globl _Z13timeInSecondsR7timevalS0_
.type _Z13timeInSecondsR7timevalS0_,@function
_Z13timeInSecondsR7timevalS0_: # @_Z13timeInSecondsR7timevalS0_
.cfi_startproc
# %bb.0:
movq (%rsi), %rax
movq 8(%rsi), %rcx
subq (%rdi), %rax
cvtsi2sd %rax, %xmm1
mulsd .LCPI0_0(%rip), %xmm1
subq 8(%rdi), %rcx
cvtsi2sd %rcx, %xmm0
addsd %xmm1, %xmm0
mulsd .LCPI0_1(%rip), %xmm0
retq
.Lfunc_end0:
.size _Z13timeInSecondsR7timevalS0_, .Lfunc_end0-_Z13timeInSecondsR7timevalS0_
.cfi_endproc
# -- End function
.globl _Z33__device_stub__device_vector_multv # -- Begin function _Z33__device_stub__device_vector_multv
.type _Z33__device_stub__device_vector_multv,@function
_Z33__device_stub__device_vector_multv: # @_Z33__device_stub__device_vector_multv
.cfi_startproc
# %bb.0:
pushq %r15
.cfi_def_cfa_offset 16
pushq %r14
.cfi_def_cfa_offset 24
pushq %r12
.cfi_def_cfa_offset 32
pushq %rbx
.cfi_def_cfa_offset 40
subq $56, %rsp
.cfi_def_cfa_offset 96
.cfi_offset %rbx, -40
.cfi_offset %r12, -32
.cfi_offset %r14, -24
.cfi_offset %r15, -16
leaq 40(%rsp), %rbx
leaq 24(%rsp), %r14
leaq 16(%rsp), %r15
leaq 8(%rsp), %r12
movq %rbx, %rdi
movq %r14, %rsi
movq %r15, %rdx
movq %r12, %rcx
callq __hipPopCallConfiguration
movq (%rbx), %rsi
movl 8(%rbx), %edx
movq (%r14), %rcx
movl 8(%r14), %r8d
movq %rsp, %r9
movl $_Z18device_vector_multv, %edi
pushq (%r12)
.cfi_adjust_cfa_offset 8
pushq (%r15)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $72, %rsp
.cfi_adjust_cfa_offset -72
popq %rbx
.cfi_def_cfa_offset 32
popq %r12
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
retq
.Lfunc_end1:
.size _Z33__device_stub__device_vector_multv, .Lfunc_end1-_Z33__device_stub__device_vector_multv
.cfi_endproc
# -- End function
.section .rodata.cst8,"aM",@progbits,8
.p2align 3, 0x0 # -- Begin function main
.LCPI2_0:
.quad 0x412e848000000000 # double 1.0E+6
.LCPI2_1:
.quad 0x3eb0c6f7a0b5ed8d # double 9.9999999999999995E-7
.text
.globl main
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r13
.cfi_def_cfa_offset 40
pushq %r12
.cfi_def_cfa_offset 48
pushq %rbx
.cfi_def_cfa_offset 56
subq $56, %rsp
.cfi_def_cfa_offset 112
.cfi_offset %rbx, -56
.cfi_offset %r12, -48
.cfi_offset %r13, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
cmpl $1, %edi
jle .LBB2_1
# %bb.2: # %.thread
movq 8(%rsi), %rdi
callq atoi
movl %eax, %ebx
movl $42, %edi
callq srand
testl %ebx, %ebx
jg .LBB2_3
# %bb.6: # %._crit_edge.thread
leaq 24(%rsp), %r14
movq %r14, %rdi
xorl %esi, %esi
callq gettimeofday
leaq 8(%rsp), %r15
movq %r15, %rdi
xorl %esi, %esi
callq gettimeofday
leaq 40(%rsp), %rbx
movq %rbx, %rdi
xorl %esi, %esi
callq gettimeofday
movl $_ZSt4cout, %edi
movl $.L.str, %esi
movl $17, %edx
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
movl $_ZSt4cout, %edi
xorps %xmm0, %xmm0
callq _ZNSo9_M_insertIdEERSoT_
movq %rax, %r12
movq (%rax), %rax
movq -24(%rax), %rdi
addq %r12, %rdi
movl $10, %esi
callq _ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
movsbl %al, %esi
movq %r12, %rdi
callq _ZNSo3putEc
movq %rax, %rdi
callq _ZNSo5flushEv
movl $_ZSt4cout, %edi
movl $.L.str.1, %esi
movl $35, %edx
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
movq (%r15), %rbp
movq 8(%r15), %r13
movq (%r14), %r12
movq 8(%r14), %r15
movq %rbp, %rax
subq %r12, %rax
cvtsi2sd %rax, %xmm1
movq %r13, %rax
subq %r15, %rax
xorps %xmm0, %xmm0
cvtsi2sd %rax, %xmm0
mulsd .LCPI2_0(%rip), %xmm1
addsd %xmm1, %xmm0
mulsd .LCPI2_1(%rip), %xmm0
movl $_ZSt4cout, %edi
callq _ZNSo9_M_insertIdEERSoT_
movq %rax, %r14
movq (%rax), %rax
movq -24(%rax), %rdi
addq %r14, %rdi
movl $10, %esi
callq _ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
movsbl %al, %esi
movq %r14, %rdi
callq _ZNSo3putEc
movq %rax, %rdi
callq _ZNSo5flushEv
movl $_ZSt4cout, %edi
movl $.L.str.2, %esi
movl $35, %edx
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
movq (%rbx), %r14
movq %r14, %rax
subq %rbp, %rax
xorps %xmm1, %xmm1
cvtsi2sd %rax, %xmm1
movq 8(%rbx), %rbp
mulsd .LCPI2_0(%rip), %xmm1
movq %rbp, %rax
subq %r13, %rax
xorps %xmm0, %xmm0
cvtsi2sd %rax, %xmm0
addsd %xmm1, %xmm0
mulsd .LCPI2_1(%rip), %xmm0
movl $_ZSt4cout, %edi
callq _ZNSo9_M_insertIdEERSoT_
movq %rax, %rbx
movq (%rax), %rax
movq -24(%rax), %rdi
addq %rbx, %rdi
movl $10, %esi
callq _ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
movsbl %al, %esi
movq %rbx, %rdi
callq _ZNSo3putEc
movq %rax, %rdi
callq _ZNSo5flushEv
movl $_ZSt4cout, %edi
movl $.L.str.3, %esi
movl $35, %edx
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
subq %r12, %r14
xorps %xmm1, %xmm1
cvtsi2sd %r14, %xmm1
mulsd .LCPI2_0(%rip), %xmm1
subq %r15, %rbp
xorps %xmm0, %xmm0
cvtsi2sd %rbp, %xmm0
addsd %xmm1, %xmm0
mulsd .LCPI2_1(%rip), %xmm0
movl $_ZSt4cout, %edi
callq _ZNSo9_M_insertIdEERSoT_
movq %rax, %rbx
movq (%rax), %rax
movq -24(%rax), %rdi
addq %rbx, %rdi
movl $10, %esi
callq _ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
movsbl %al, %esi
movq %rbx, %rdi
callq _ZNSo3putEc
movq %rax, %rdi
callq _ZNSo5flushEv
xorl %eax, %eax
addq $56, %rsp
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.LBB2_1: # %.thread.thread
.cfi_def_cfa_offset 112
movl $42, %edi
callq srand
movl $100, %ebx
.LBB2_3: # %.lr.ph.preheader
movl %ebx, %ebx
.LBB2_4: # %.lr.ph
# =>This Inner Loop Header: Depth=1
callq rand
callq rand
decq %rbx
jne .LBB2_4
# %bb.5: # %._crit_edge
leaq 24(%rsp), %rdi
xorl %esi, %esi
callq gettimeofday
leaq 8(%rsp), %rdi
xorl %esi, %esi
callq gettimeofday
.Lfunc_end2:
.size main, .Lfunc_end2-main
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
pushq %rbx
.cfi_def_cfa_offset 16
.cfi_offset %rbx, -16
movq __hip_gpubin_handle(%rip), %rbx
testq %rbx, %rbx
jne .LBB3_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, %rbx
movq %rax, __hip_gpubin_handle(%rip)
.LBB3_2:
subq $32, %rsp
.cfi_adjust_cfa_offset 32
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z18device_vector_multv, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movq %rbx, %rdi
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
addq $32, %rsp
.cfi_adjust_cfa_offset -32
movl $dev_vector1, %esi
movl $.L__unnamed_2, %edx
movl $.L__unnamed_2, %ecx
movl $8, %r9d
movq %rbx, %rdi
xorl %r8d, %r8d
pushq $0
.cfi_adjust_cfa_offset 8
pushq $0
.cfi_adjust_cfa_offset 8
callq __hipRegisterVar
addq $16, %rsp
.cfi_adjust_cfa_offset -16
movl $dev_vector2, %esi
movl $.L__unnamed_3, %edx
movl $.L__unnamed_3, %ecx
movl $8, %r9d
movq %rbx, %rdi
xorl %r8d, %r8d
pushq $0
.cfi_adjust_cfa_offset 8
pushq $0
.cfi_adjust_cfa_offset 8
callq __hipRegisterVar
addq $16, %rsp
.cfi_adjust_cfa_offset -16
movl $dev_results, %esi
movl $.L__unnamed_4, %edx
movl $.L__unnamed_4, %ecx
movl $8, %r9d
movq %rbx, %rdi
xorl %r8d, %r8d
pushq $0
.cfi_adjust_cfa_offset 8
pushq $0
.cfi_adjust_cfa_offset 8
callq __hipRegisterVar
addq $16, %rsp
.cfi_adjust_cfa_offset -16
movl $__hip_module_dtor, %edi
popq %rbx
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end3:
.size __hip_module_ctor, .Lfunc_end3-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB4_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB4_2:
retq
.Lfunc_end4:
.size __hip_module_dtor, .Lfunc_end4-__hip_module_dtor
.cfi_endproc
# -- End function
.type dev_vector1,@object # @dev_vector1
.local dev_vector1
.comm dev_vector1,8,8
.type dev_vector2,@object # @dev_vector2
.local dev_vector2
.comm dev_vector2,8,8
.type dev_results,@object # @dev_results
.local dev_results
.comm dev_results,8,8
.type _Z18device_vector_multv,@object # @_Z18device_vector_multv
.section .rodata,"a",@progbits
.globl _Z18device_vector_multv
.p2align 3, 0x0
_Z18device_vector_multv:
.quad _Z33__device_stub__device_vector_multv
.size _Z18device_vector_multv, 8
.type .L.str,@object # @.str
.section .rodata.str1.1,"aMS",@progbits,1
.L.str:
.asciz "Dot product is : "
.size .L.str, 18
.type .L.str.1,@object # @.str.1
.L.str.1:
.asciz "Time for multiplication (seconds): "
.size .L.str.1, 36
.type .L.str.2,@object # @.str.2
.L.str.2:
.asciz "Time for addition (seconds): "
.size .L.str.2, 36
.type .L.str.3,@object # @.str.3
.L.str.3:
.asciz "Overall time (seconds): "
.size .L.str.3, 36
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_Z18device_vector_multv"
.size .L__unnamed_1, 24
.type .L__unnamed_2,@object # @1
.L__unnamed_2:
.asciz "dev_vector1"
.size .L__unnamed_2, 12
.type .L__unnamed_3,@object # @2
.L__unnamed_3:
.asciz "dev_vector2"
.size .L__unnamed_3, 12
.type .L__unnamed_4,@object # @3
.L__unnamed_4:
.asciz "dev_results"
.size .L__unnamed_4, 12
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z33__device_stub__device_vector_multv
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym dev_vector1
.addrsig_sym dev_vector2
.addrsig_sym dev_results
.addrsig_sym _Z18device_vector_multv
.addrsig_sym _ZSt4cout
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_
|
.text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z18device_vector_multv ; -- Begin function _Z18device_vector_multv
.globl _Z18device_vector_multv
.p2align 8
.type _Z18device_vector_multv,@function
_Z18device_vector_multv: ; @_Z18device_vector_multv
; %bb.0:
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z18device_vector_multv
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 0
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 0
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 1
.amdhsa_next_free_sgpr 1
.amdhsa_reserve_vcc 0
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z18device_vector_multv, .Lfunc_end0-_Z18device_vector_multv
; -- End function
.section .AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 4
; NumSgprs: 0
; NumVgprs: 0
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 0
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 1
; NumVGPRsForWavesPerEU: 1
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.protected dev_vector1 ; @dev_vector1
.type dev_vector1,@object
.section .bss,"aw",@nobits
.globl dev_vector1
.p2align 3, 0x0
dev_vector1:
.quad 0
.size dev_vector1, 8
.protected dev_vector2 ; @dev_vector2
.type dev_vector2,@object
.globl dev_vector2
.p2align 3, 0x0
dev_vector2:
.quad 0
.size dev_vector2, 8
.protected dev_results ; @dev_results
.type dev_results,@object
.globl dev_results
.p2align 3, 0x0
dev_results:
.quad 0
.size dev_results, 8
.type __hip_cuid_,@object ; @__hip_cuid_
.globl __hip_cuid_
__hip_cuid_:
.byte 0 ; 0x0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args: []
.group_segment_fixed_size: 0
.kernarg_segment_align: 4
.kernarg_segment_size: 0
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z18device_vector_multv
.private_segment_fixed_size: 0
.sgpr_count: 0
.sgpr_spill_count: 0
.symbol: _Z18device_vector_multv.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 0
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata
|
ff0fbb2295732037aa8a3a9db2fe5cd1aff64643
|
/******************************************************************************
*cr
*cr (C) Copyright 2010 The Board of Trustees of the
*cr University of Illinois
*cr All Rights Reserved
*cr
******************************************************************************/
#include <stdio.h>
#define TILE_SIZE 10
__global__ void mysgemm(int m, int n, int k, const float *A, const float *B, float* C) {
/********************************************************************
*
* Compute C = A x B
* where A is a (m x k) matrix
* where B is a (k x n) matrix
* where C is a (m x n) matrix
*
* Use shared memory for tiling
*
********************************************************************/
int bx = blockIdx.x;
int by = blockIdx.y;
int tx = threadIdx.x;
int ty = threadIdx.y;
int right_boundary = k*TILE_SIZE*by + k;
float Sum = 0;
for (int a=k*TILE_SIZE*by, b=bx*TILE_SIZE; a<right_boundary; a+=TILE_SIZE,b+=(TILE_SIZE*n))
{
__shared__ float Acache[TILE_SIZE][TILE_SIZE];
__shared__ float Bcache[TILE_SIZE][TILE_SIZE];
Acache[ty][tx] = A[a + k * ty + tx];
Bcache[ty][tx] = B[b + n * ty + tx];
__syncthreads();
for (int i=0; i<TILE_SIZE; i++) {
Sum += Acache[ty][i] * Bcache[i][tx];
}
__syncthreads();
}
// INSERT KERNEL CODE HERE
int c = n * TILE_SIZE * by + TILE_SIZE * bx;
C[c + n * ty + tx] = Sum;
}
void basicSgemm(char transa, char transb, int m, int n, int k, float alpha, const float *A, int lda, const float *B, int ldb, float beta, float *C, int ldc)
{
if ((transa != 'N') && (transa != 'n')) {
printf("unsupported value of 'transa'\n");
return;
}
if ((transb != 'N') && (transb != 'n')) {
printf("unsupported value of 'transb'\n");
return;
}
if ((alpha - 1.0f > 1e-10) || (alpha - 1.0f < -1e-10)) {
printf("unsupported value of alpha\n");
return;
}
if ((beta - 0.0f > 1e-10) || (beta - 0.0f < -1e-10)) {
printf("unsupported value of beta\n");
return;
}
// Initialize thread block and kernel grid dimensions ---------------------
const unsigned int BLOCK_SIZE = TILE_SIZE;
//INSERT CODE HERE
dim3 dimBlock(BLOCK_SIZE, BLOCK_SIZE);
dim3 dimGrid(n / dimBlock.x, m / dimBlock.y);
mysgemm<<<dimGrid, dimBlock>>>(m, n, k, A, B, C);
// Invoke CUDA kernel -----------------------------------------------------
}
|
.file "tmpxft_0027dfad_00000000-6_kernel.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
.cfi_startproc
endbr64
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
jmp __cudaUnregisterFatBinary@PLT
.cfi_endproc
.LFE2030:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z35__device_stub__Z7mysgemmiiiPKfS0_PfiiiPKfS0_Pf
.type _Z35__device_stub__Z7mysgemmiiiPKfS0_PfiiiPKfS0_Pf, @function
_Z35__device_stub__Z7mysgemmiiiPKfS0_PfiiiPKfS0_Pf:
.LFB2052:
.cfi_startproc
endbr64
subq $184, %rsp
.cfi_def_cfa_offset 192
movl %edi, 44(%rsp)
leaq 72(%rsp), %rdi
movl %esi, 40(%rsp)
leaq 84(%rsp), %rsi
movl %edx, 36(%rsp)
leaq 56(%rsp), %rdx
movq %rcx, 24(%rsp)
leaq 64(%rsp), %rcx
movq %r8, 16(%rsp)
movq %r9, 8(%rsp)
movq %fs:40, %rax
movq %rax, 168(%rsp)
xorl %eax, %eax
leaq 44(%rsp), %rax
movl $1, 80(%rsp)
movq %rax, 120(%rsp)
leaq 40(%rsp), %rax
movq %rax, 128(%rsp)
leaq 36(%rsp), %rax
movq %rax, 136(%rsp)
leaq 24(%rsp), %rax
movq %rax, 144(%rsp)
leaq 16(%rsp), %rax
movq %rax, 152(%rsp)
leaq 8(%rsp), %rax
movq %rax, 160(%rsp)
movabsq $4294967297, %rax
movq %rax, 72(%rsp)
movq %rax, 84(%rsp)
movl $1, 92(%rsp)
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
jne .L2
pushq 64(%rsp)
.cfi_def_cfa_offset 200
leaq _Z7mysgemmiiiPKfS0_Pf(%rip), %rdi
pushq 64(%rsp)
.cfi_def_cfa_offset 208
movq 100(%rsp), %rcx
movl 108(%rsp), %r8d
movq 88(%rsp), %rsi
movl 96(%rsp), %edx
leaq 136(%rsp), %r9
call cudaLaunchKernel@PLT
popq %rax
.cfi_def_cfa_offset 200
popq %rdx
.cfi_def_cfa_offset 192
.L2:
movq 168(%rsp), %rax
subq %fs:40, %rax
je .L4
call __stack_chk_fail@PLT
.L4:
addq $184, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2052:
.size _Z35__device_stub__Z7mysgemmiiiPKfS0_PfiiiPKfS0_Pf, .-_Z35__device_stub__Z7mysgemmiiiPKfS0_PfiiiPKfS0_Pf
.globl _Z7mysgemmiiiPKfS0_Pf
.type _Z7mysgemmiiiPKfS0_Pf, @function
_Z7mysgemmiiiPKfS0_Pf:
.LFB2053:
.cfi_startproc
endbr64
jmp _Z35__device_stub__Z7mysgemmiiiPKfS0_PfiiiPKfS0_Pf
.cfi_endproc
.LFE2053:
.size _Z7mysgemmiiiPKfS0_Pf, .-_Z7mysgemmiiiPKfS0_Pf
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "unsupported value of 'transa'\n"
.LC1:
.string "unsupported value of 'transb'\n"
.LC5:
.string "unsupported value of alpha\n"
.LC6:
.string "unsupported value of beta\n"
.text
.globl _Z10basicSgemmcciiifPKfiS0_ifPfi
.type _Z10basicSgemmcciiifPKfiS0_ifPfi, @function
_Z10basicSgemmcciiifPKfiS0_ifPfi:
.LFB2027:
.cfi_startproc
endbr64
pushq %r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
andl $-33, %edi
pushq %r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
pushq %r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
pushq %r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
pushq %rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
pushq %rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
subq $40, %rsp
.cfi_def_cfa_offset 96
movq 104(%rsp), %r14
movq 120(%rsp), %r15
cmpb $78, %dil
je .L9
leaq .LC0(%rip), %rsi
jmp .L21
.L9:
movl %esi, %eax
andl $-33, %eax
cmpb $78, %al
je .L10
leaq .LC1(%rip), %rsi
.L21:
addq $40, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 56
movl $2, %edi
xorl %eax, %eax
popq %rbx
.cfi_def_cfa_offset 48
popq %rbp
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
jmp __printf_chk@PLT
.L10:
.cfi_restore_state
subss .LC2(%rip), %xmm0
movsd .LC3(%rip), %xmm3
cvtss2sd %xmm0, %xmm0
comisd %xmm3, %xmm0
ja .L11
movsd .LC4(%rip), %xmm2
comisd %xmm0, %xmm2
jbe .L18
.L11:
leaq .LC5(%rip), %rsi
jmp .L21
.L18:
cvtss2sd %xmm1, %xmm1
comisd %xmm3, %xmm1
ja .L14
comisd %xmm1, %xmm2
jbe .L19
.L14:
leaq .LC6(%rip), %rsi
jmp .L21
.L19:
movl %ecx, %ebp
movl %edx, %ebx
movl $10, %ecx
xorl %edx, %edx
movl %ebp, %eax
movl %r8d, %r12d
movq %r9, %r13
xorl %r8d, %r8d
divl %ecx
xorl %edx, %edx
xorl %r9d, %r9d
movl $1, %esi
movl %eax, 20(%rsp)
movl %ebx, %eax
divl %ecx
movabsq $42949672970, %rdx
movl $1, %ecx
movl %eax, 24(%rsp)
movq 20(%rsp), %rdi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
jne .L8
addq $40, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 56
movq %r15, %r9
movq %r14, %r8
movq %r13, %rcx
movl %r12d, %edx
movl %ebp, %esi
movl %ebx, %edi
popq %rbx
.cfi_def_cfa_offset 48
popq %rbp
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
jmp _Z35__device_stub__Z7mysgemmiiiPKfS0_PfiiiPKfS0_Pf
.L8:
.cfi_restore_state
addq $40, %rsp
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %rbp
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2027:
.size _Z10basicSgemmcciiifPKfiS0_ifPfi, .-_Z10basicSgemmcciiifPKfiS0_ifPfi
.section .rodata.str1.1
.LC7:
.string "_Z7mysgemmiiiPKfS0_Pf"
.section .text.startup,"ax",@progbits
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2055:
.cfi_startproc
endbr64
pushq %rax
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
pushq $0
.cfi_def_cfa_offset 24
xorl %r9d, %r9d
orl $-1, %r8d
pushq $0
.cfi_def_cfa_offset 32
leaq .LC7(%rip), %rdx
movq %rax, %rdi
leaq _Z7mysgemmiiiPKfS0_Pf(%rip), %rsi
pushq $0
.cfi_def_cfa_offset 40
movq %rdx, %rcx
pushq $0
.cfi_def_cfa_offset 48
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
call __cudaRegisterFunction@PLT
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
addq $32, %rsp
.cfi_def_cfa_offset 16
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
popq %rdx
.cfi_def_cfa_offset 8
jmp atexit@PLT
.cfi_endproc
.LFE2055:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.section .rodata.cst4,"aM",@progbits,4
.align 4
.LC2:
.long 1065353216
.section .rodata.cst8,"aM",@progbits,8
.align 8
.LC3:
.long -640172613
.long 1037794527
.align 8
.LC4:
.long -640172613
.long -1109689121
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
|
code for sm_89
Function : _Z7mysgemmiiiPKfS0_Pf
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2UR UR4, SR_CTAID.Y ; /* 0x00000000000479c3 */
/* 0x000e220000002600 */
/*0020*/ S2R R0, SR_TID.X ; /* 0x0000000000007919 */
/* 0x000e620000002100 */
/*0030*/ MOV R2, c[0x0][0x168] ; /* 0x00005a0000027a02 */
/* 0x000fe20000000f00 */
/*0040*/ ULDC.64 UR8, c[0x0][0x118] ; /* 0x0000460000087ab9 */
/* 0x000fe20000000a00 */
/*0050*/ MOV R11, RZ ; /* 0x000000ff000b7202 */
/* 0x000fe20000000f00 */
/*0060*/ S2R R17, SR_TID.Y ; /* 0x0000000000117919 */
/* 0x000ea20000002200 */
/*0070*/ ISETP.GE.AND P0, PT, R2, 0x1, PT ; /* 0x000000010200780c */
/* 0x000fe40003f06270 */
/*0080*/ S2UR UR6, SR_CTAID.X ; /* 0x00000000000679c3 */
/* 0x000ee20000002500 */
/*0090*/ UIMAD UR4, UR4, 0xa, URZ ; /* 0x0000000a040478a4 */
/* 0x001fe4000f8e023f */
/*00a0*/ UIMAD UR6, UR6, 0xa, URZ ; /* 0x0000000a060678a4 */
/* 0x008fd0000f8e023f */
/*00b0*/ @!P0 BRA 0x990 ; /* 0x000008d000008947 */
/* 0x000fea0003800000 */
/*00c0*/ ULDC UR7, c[0x0][0x168] ; /* 0x00005a0000077ab9 */
/* 0x006fe20000000800 */
/*00d0*/ IMAD R19, R17, 0x28, RZ ; /* 0x0000002811137824 */
/* 0x000fe200078e02ff */
/*00e0*/ UIMAD UR5, UR4, UR7, URZ ; /* 0x00000007040572a4 */
/* 0x000fe2000f8e023f */
/*00f0*/ MOV R11, RZ ; /* 0x000000ff000b7202 */
/* 0x000fc60000000f00 */
/*0100*/ LEA R16, R0, R19, 0x2 ; /* 0x0000001300107211 */
/* 0x000fe400078e10ff */
/*0110*/ MOV R23, UR5 ; /* 0x0000000500177c02 */
/* 0x000fe20008000f00 */
/*0120*/ UIADD3 UR5, UR5, UR7, URZ ; /* 0x0000000705057290 */
/* 0x000fc6000fffe03f */
/*0130*/ IADD3 R2, R23, 0xa, RZ ; /* 0x0000000a17027810 */
/* 0x000fe20007ffe0ff */
/*0140*/ UMOV UR7, UR6 ; /* 0x0000000600077c82 */
/* 0x000fe20008000000 */
/*0150*/ LOP3.LUT R4, RZ, R23, RZ, 0x33, !PT ; /* 0x00000017ff047212 */
/* 0x000fe400078e33ff */
/*0160*/ IMNMX R3, R2, UR5, !PT ; /* 0x0000000502037c17 */
/* 0x000fc8000f800200 */
/*0170*/ IADD3 R6, R3, R4, RZ ; /* 0x0000000403067210 */
/* 0x000fc80007ffe0ff */
/*0180*/ ISETP.GE.U32.AND P1, PT, R6.reuse, 0xa, PT ; /* 0x0000000a0600780c */
/* 0x040fe20003f26070 */
/*0190*/ IMAD.WIDE.U32 R4, R6, -0x33333333, RZ ; /* 0xcccccccd06047825 */
/* 0x000fca00078e00ff */
/*01a0*/ SHF.R.U32.HI R3, RZ, 0x3, R5 ; /* 0x00000003ff037819 */
/* 0x000fc80000011605 */
/*01b0*/ LOP3.LUT R3, R3, 0x1, RZ, 0xc0, !PT ; /* 0x0000000103037812 */
/* 0x000fc800078ec0ff */
/*01c0*/ ISETP.NE.U32.AND P0, PT, R3, 0x1, PT ; /* 0x000000010300780c */
/* 0x000fc80003f05070 */
/*01d0*/ ISETP.NE.U32.AND.EX P0, PT, RZ, RZ, PT, P0 ; /* 0x000000ffff00720c */
/* 0x000fda0003f05100 */
/*01e0*/ @!P0 BRA 0x480 ; /* 0x0000029000008947 */
/* 0x000fea0003800000 */
/*01f0*/ IMAD R4, R17.reuse, c[0x0][0x168], R0.reuse ; /* 0x00005a0011047a24 */
/* 0x140fe200078e0200 */
/*0200*/ MOV R6, 0x4 ; /* 0x0000000400067802 */
/* 0x000fe20000000f00 */
/*0210*/ IMAD R3, R17, c[0x0][0x164], R0 ; /* 0x0000590011037a24 */
/* 0x000fc600078e0200 */
/*0220*/ IADD3 R4, R23, R4, RZ ; /* 0x0000000417047210 */
/* 0x000fe40007ffe0ff */
/*0230*/ IADD3 R3, R3, UR6, RZ ; /* 0x0000000603037c10 */
/* 0x000fc6000fffe0ff */
/*0240*/ IMAD.WIDE R4, R4, R6, c[0x0][0x170] ; /* 0x00005c0004047625 */
/* 0x000fc800078e0206 */
/*0250*/ IMAD.WIDE R6, R3, R6, c[0x0][0x178] ; /* 0x00005e0003067625 */
/* 0x000fe200078e0206 */
/*0260*/ LDG.E R11, [R4.64] ; /* 0x00000008040b7981 */
/* 0x000eaa000c1e1900 */
/*0270*/ LDG.E R7, [R6.64] ; /* 0x0000000806077981 */
/* 0x000ee2000c1e1900 */
/*0280*/ ULDC UR7, c[0x0][0x164] ; /* 0x0000590000077ab9 */
/* 0x000fe40000000800 */
/*0290*/ UIMAD UR7, UR7, 0xa, UR6 ; /* 0x0000000a070778a4 */
/* 0x000fe2000f8e0206 */
/*02a0*/ STS [R16], R11 ; /* 0x0000000b10007388 */
/* 0x004fe80000000800 */
/*02b0*/ STS [R16+0x190], R7 ; /* 0x0001900710007388 */
/* 0x008fe80000000800 */
/*02c0*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fec0000010000 */
/*02d0*/ LDS R3, [R0.X4+0x190] ; /* 0x0001900000037984 */
/* 0x000fe80000004800 */
/*02e0*/ LDS.64 R12, [R19] ; /* 0x00000000130c7984 */
/* 0x000e280000000a00 */
/*02f0*/ LDS R15, [R0.X4+0x1b8] ; /* 0x0001b800000f7984 */
/* 0x000e680000004800 */
/*0300*/ LDS R14, [R0.X4+0x1e0] ; /* 0x0001e000000e7984 */
/* 0x000fe80000004800 */
/*0310*/ LDS.64 R8, [R19+0x8] ; /* 0x0000080013087984 */
/* 0x000ea80000000a00 */
/*0320*/ LDS R21, [R0.X4+0x208] ; /* 0x0002080000157984 */
/* 0x000ee80000004800 */
/*0330*/ LDS R18, [R0.X4+0x230] ; /* 0x0002300000127984 */
/* 0x000fe80000004800 */
/*0340*/ LDS.64 R4, [R19+0x10] ; /* 0x0000100013047984 */
/* 0x000f280000000a00 */
/*0350*/ LDS R23, [R0.X4+0x258] ; /* 0x0002580000177984 */
/* 0x000f680000004800 */
/*0360*/ LDS R20, [R0.X4+0x280] ; /* 0x0002800000147984 */
/* 0x000fe80000004800 */
/*0370*/ LDS.64 R6, [R19+0x18] ; /* 0x0000180013067984 */
/* 0x000f680000000a00 */
/*0380*/ LDS R25, [R0.X4+0x2a8] ; /* 0x0002a80000197984 */
/* 0x000f620000004800 */
/*0390*/ FFMA R12, R3, R12, RZ ; /* 0x0000000c030c7223 */
/* 0x001fc600000000ff */
/*03a0*/ LDS R22, [R0.X4+0x2d0] ; /* 0x0002d00000167984 */
/* 0x000fe20000004800 */
/*03b0*/ FFMA R13, R15, R13, R12 ; /* 0x0000000d0f0d7223 */
/* 0x002fc6000000000c */
/*03c0*/ LDS.64 R10, [R19+0x20] ; /* 0x00002000130a7984 */
/* 0x000e280000000a00 */
/*03d0*/ LDS R27, [R0.X4+0x2f8] ; /* 0x0002f800001b7984 */
/* 0x000e620000004800 */
/*03e0*/ FFMA R8, R14, R8, R13 ; /* 0x000000080e087223 */
/* 0x004fc8000000000d */
/*03f0*/ FFMA R9, R21, R9, R8 ; /* 0x0000000915097223 */
/* 0x008fc80000000008 */
/*0400*/ FFMA R4, R18, R4, R9 ; /* 0x0000000412047223 */
/* 0x010fc80000000009 */
/*0410*/ FFMA R5, R23, R5, R4 ; /* 0x0000000517057223 */
/* 0x020fe20000000004 */
/*0420*/ MOV R23, R2 ; /* 0x0000000200177202 */
/* 0x000fc60000000f00 */
/*0430*/ FFMA R6, R20, R6, R5 ; /* 0x0000000614067223 */
/* 0x000fc80000000005 */
/*0440*/ FFMA R7, R25, R7, R6 ; /* 0x0000000719077223 */
/* 0x000fc80000000006 */
/*0450*/ FFMA R10, R22, R10, R7 ; /* 0x0000000a160a7223 */
/* 0x001fc80000000007 */
/*0460*/ FFMA R11, R27, R11, R10 ; /* 0x0000000b1b0b7223 */
/* 0x002fe2000000000a */
/*0470*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fec0000010000 */
/*0480*/ @!P1 BRA 0x990 ; /* 0x0000050000009947 */
/* 0x000fea0003800000 */
/*0490*/ IADD3 R2, R23, R0, RZ ; /* 0x0000000017027210 */
/* 0x000fe40007ffe0ff */
/*04a0*/ IADD3 R22, R0, UR7, RZ ; /* 0x0000000700167c10 */
/* 0x000fe4000fffe0ff */
/*04b0*/ IADD3 R5, R17.reuse, 0xa, RZ ; /* 0x0000000a11057810 */
/* 0x040fe20007ffe0ff */
/*04c0*/ IMAD R2, R17, c[0x0][0x168], R2 ; /* 0x00005a0011027a24 */
/* 0x000fe200078e0202 */
/*04d0*/ MOV R25, 0x4 ; /* 0x0000000400197802 */
/* 0x000fc60000000f00 */
/*04e0*/ IMAD R18, R5, c[0x0][0x164], R22 ; /* 0x0000590005127a24 */
/* 0x000fe400078e0216 */
/*04f0*/ IMAD.WIDE R2, R2, R25, c[0x0][0x170] ; /* 0x00005c0002027625 */
/* 0x000fc800078e0219 */
/*0500*/ IMAD R22, R17, c[0x0][0x164], R22 ; /* 0x0000590011167a24 */
/* 0x000fc800078e0216 */
/*0510*/ IMAD.WIDE R4, R22, R25.reuse, c[0x0][0x178] ; /* 0x00005e0016047625 */
/* 0x080fe200078e0219 */
/*0520*/ LDG.E R7, [R2.64] ; /* 0x0000000802077981 */
/* 0x000eaa000c1e1900 */
/*0530*/ LDG.E R5, [R4.64] ; /* 0x0000000804057981 */
/* 0x000ee2000c1e1900 */
/*0540*/ IMAD.WIDE R20, R18, R25, c[0x0][0x178] ; /* 0x00005e0012147625 */
/* 0x000fc600078e0219 */
/*0550*/ STS [R16], R7 ; /* 0x0000000710007388 */
/* 0x004fe80000000800 */
/*0560*/ STS [R16+0x190], R5 ; /* 0x0001900510007388 */
/* 0x008fe80000000800 */
/*0570*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fec0000010000 */
/*0580*/ LDS R10, [R0.X4+0x190] ; /* 0x00019000000a7984 */
/* 0x000fe80000004800 */
/*0590*/ LDS R30, [R0.X4+0x1b8] ; /* 0x0001b800001e7984 */
/* 0x000fe80000004800 */
/*05a0*/ LDS R35, [R0.X4+0x1e0] ; /* 0x0001e00000237984 */
/* 0x000fe80000004800 */
/*05b0*/ LDS R32, [R0.X4+0x208] ; /* 0x0002080000207984 */
/* 0x000fe80000004800 */
/*05c0*/ LDS R33, [R0.X4+0x230] ; /* 0x0002300000217984 */
/* 0x000fe80000004800 */
/*05d0*/ LDS R28, [R0.X4+0x258] ; /* 0x00025800001c7984 */
/* 0x000fe80000004800 */
/*05e0*/ LDS R31, [R0.X4+0x280] ; /* 0x00028000001f7984 */
/* 0x000fe80000004800 */
/*05f0*/ LDS R26, [R0.X4+0x2a8] ; /* 0x0002a800001a7984 */
/* 0x000fe80000004800 */
/*0600*/ LDS R27, [R0.X4+0x2d0] ; /* 0x0002d000001b7984 */
/* 0x000fe80000004800 */
/*0610*/ LDS R24, [R0.X4+0x2f8] ; /* 0x0002f80000187984 */
/* 0x000fe80000004800 */
/*0620*/ LDS.64 R14, [R19] ; /* 0x00000000130e7984 */
/* 0x000e280000000a00 */
/*0630*/ LDS.64 R12, [R19+0x8] ; /* 0x00000800130c7984 */
/* 0x000e680000000a00 */
/*0640*/ LDS.64 R8, [R19+0x10] ; /* 0x0000100013087984 */
/* 0x000ea80000000a00 */
/*0650*/ LDS.64 R4, [R19+0x18] ; /* 0x0000180013047984 */
/* 0x000ee80000000a00 */
/*0660*/ LDS.64 R6, [R19+0x20] ; /* 0x0000200013067984 */
/* 0x000f280000000a00 */
/*0670*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fec0000010000 */
/*0680*/ LDG.E R20, [R20.64] ; /* 0x0000000814147981 */
/* 0x000f68000c1e1900 */
/*0690*/ LDG.E R34, [R2.64+0x28] ; /* 0x0000280802227981 */
/* 0x000562000c1e1900 */
/*06a0*/ FFMA R37, R10, R14, R11 ; /* 0x0000000e0a257223 */
/* 0x001fc8000000000b */
/*06b0*/ FFMA R14, R30, R15, R37 ; /* 0x0000000f1e0e7223 */
/* 0x000fc80000000025 */
/*06c0*/ FFMA R35, R35, R12, R14 ; /* 0x0000000c23237223 */
/* 0x002fc8000000000e */
/*06d0*/ FFMA R32, R32, R13, R35 ; /* 0x0000000d20207223 */
/* 0x000fc80000000023 */
/*06e0*/ FFMA R35, R33, R8, R32 ; /* 0x0000000821237223 */
/* 0x004fc80000000020 */
/*06f0*/ FFMA R8, R28, R9, R35 ; /* 0x000000091c087223 */
/* 0x000fc80000000023 */
/*0700*/ FFMA R35, R31, R4, R8 ; /* 0x000000041f237223 */
/* 0x008fc80000000008 */
/*0710*/ FFMA R4, R26, R5, R35 ; /* 0x000000051a047223 */
/* 0x000fc80000000023 */
/*0720*/ FFMA R35, R27, R6, R4 ; /* 0x000000061b237223 */
/* 0x010fc80000000004 */
/*0730*/ FFMA R24, R24, R7, R35 ; /* 0x0000000718187223 */
/* 0x000fe20000000023 */
/*0740*/ IADD3 R23, R23, 0x14, RZ ; /* 0x0000001417177810 */
/* 0x000fc80007ffe0ff */
/*0750*/ ISETP.GE.AND P0, PT, R23, UR5, PT ; /* 0x0000000517007c0c */
/* 0x000fe4000bf06270 */
/*0760*/ MOV R7, c[0x0][0x164] ; /* 0x0000590000077a02 */
/* 0x000fe40000000f00 */
/*0770*/ IADD3 R2, P1, R2, 0x50, RZ ; /* 0x0000005002027810 */
/* 0x000fc60007f3e0ff */
/*0780*/ IMAD R22, R7.reuse, 0x14, R22 ; /* 0x0000001407167824 */
/* 0x040fe200078e0216 */
/*0790*/ IADD3.X R3, RZ, R3, RZ, P1, !PT ; /* 0x00000003ff037210 */
/* 0x000fe20000ffe4ff */
/*07a0*/ IMAD R18, R7, 0x14, R18 ; /* 0x0000001407127824 */
/* 0x000fe200078e0212 */
/*07b0*/ STS [R16+0x190], R20 ; /* 0x0001901410007388 */
/* 0x020fe80000000800 */
/*07c0*/ STS [R16], R34 ; /* 0x0000002210007388 */
/* 0x000fe80000000800 */
/*07d0*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fec0000010000 */
/*07e0*/ LDS R29, [R0.X4+0x190] ; /* 0x00019000001d7984 */
/* 0x000fe80000004800 */
/*07f0*/ LDS.64 R10, [R19] ; /* 0x00000000130a7984 */
/* 0x000e280000000a00 */
/*0800*/ LDS R30, [R0.X4+0x1b8] ; /* 0x0001b800001e7984 */
/* 0x000e680000004800 */
/*0810*/ LDS R21, [R0.X4+0x1e0] ; /* 0x0001e00000157984 */
/* 0x000fe80000004800 */
/*0820*/ LDS.64 R14, [R19+0x8] ; /* 0x00000800130e7984 */
/* 0x000ea80000000a00 */
/*0830*/ LDS R20, [R0.X4+0x208] ; /* 0x0002080000147984 */
/* 0x000ee80000004800 */
/*0840*/ LDS R33, [R0.X4+0x230] ; /* 0x0002300000217984 */
/* 0x000fe80000004800 */
/*0850*/ LDS.64 R12, [R19+0x10] ; /* 0x00001000130c7984 */
/* 0x000f280000000a00 */
/*0860*/ LDS R28, [R0.X4+0x258] ; /* 0x00025800001c7984 */
/* 0x000f680000004800 */
/*0870*/ LDS R31, [R0.X4+0x280] ; /* 0x00028000001f7984 */
/* 0x000fe80000004800 */
/*0880*/ LDS.64 R8, [R19+0x18] ; /* 0x0000180013087984 */
/* 0x000f680000000a00 */
/*0890*/ LDS R26, [R0.X4+0x2a8] ; /* 0x0002a800001a7984 */
/* 0x000f680000004800 */
/*08a0*/ LDS R27, [R0.X4+0x2d0] ; /* 0x0002d000001b7984 */
/* 0x000fe80000004800 */
/*08b0*/ LDS.64 R4, [R19+0x20] ; /* 0x0000200013047984 */
/* 0x000f680000000a00 */
/*08c0*/ LDS R6, [R0.X4+0x2f8] ; /* 0x0002f80000067984 */
/* 0x000f620000004800 */
/*08d0*/ FFMA R29, R29, R10, R24 ; /* 0x0000000a1d1d7223 */
/* 0x001fc80000000018 */
/*08e0*/ FFMA R30, R30, R11, R29 ; /* 0x0000000b1e1e7223 */
/* 0x002fc8000000001d */
/*08f0*/ FFMA R21, R21, R14, R30 ; /* 0x0000000e15157223 */
/* 0x004fc8000000001e */
/*0900*/ FFMA R20, R20, R15, R21 ; /* 0x0000000f14147223 */
/* 0x008fc80000000015 */
/*0910*/ FFMA R33, R33, R12, R20 ; /* 0x0000000c21217223 */
/* 0x010fc80000000014 */
/*0920*/ FFMA R28, R28, R13, R33 ; /* 0x0000000d1c1c7223 */
/* 0x020fc80000000021 */
/*0930*/ FFMA R31, R31, R8, R28 ; /* 0x000000081f1f7223 */
/* 0x000fc8000000001c */
/*0940*/ FFMA R26, R26, R9, R31 ; /* 0x000000091a1a7223 */
/* 0x000fc8000000001f */
/*0950*/ FFMA R27, R27, R4, R26 ; /* 0x000000041b1b7223 */
/* 0x000fc8000000001a */
/*0960*/ FFMA R11, R6, R5, R27 ; /* 0x00000005060b7223 */
/* 0x000fe2000000001b */
/*0970*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fec0000010000 */
/*0980*/ @!P0 BRA 0x510 ; /* 0xfffffb8000008947 */
/* 0x000fea000383ffff */
/*0990*/ IADD3 R17, R17, UR4, RZ ; /* 0x0000000411117c10 */
/* 0x006fe4000fffe0ff */
/*09a0*/ IADD3 R0, R0, UR6, RZ ; /* 0x0000000600007c10 */
/* 0x000fe4000fffe0ff */
/*09b0*/ MOV R3, 0x4 ; /* 0x0000000400037802 */
/* 0x000fc60000000f00 */
/*09c0*/ IMAD R0, R17, c[0x0][0x164], R0 ; /* 0x0000590011007a24 */
/* 0x000fc800078e0200 */
/*09d0*/ IMAD.WIDE R2, R0, R3, c[0x0][0x180] ; /* 0x0000600000027625 */
/* 0x000fca00078e0203 */
/*09e0*/ STG.E [R2.64], R11 ; /* 0x0000000b02007986 */
/* 0x000fe2000c101908 */
/*09f0*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0a00*/ BRA 0xa00; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0a10*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0a20*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0a30*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0a40*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0a50*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0a60*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0a70*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0a80*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0a90*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0aa0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0ab0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0ac0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0ad0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0ae0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0af0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
..........
|
/******************************************************************************
*cr
*cr (C) Copyright 2010 The Board of Trustees of the
*cr University of Illinois
*cr All Rights Reserved
*cr
******************************************************************************/
#include <hip/hip_runtime.h>
#include <stdio.h>
#define TILE_SIZE 10
__global__ void mysgemm(int m, int n, int k, const float *A, const float *B, float* C) {
/********************************************************************
*
* Compute C = A x B
* where A is a (m x k) matrix
* where B is a (k x n) matrix
* where C is a (m x n) matrix
*
* Use shared memory for tiling
*
********************************************************************/
int bx = blockIdx.x;
int by = blockIdx.y;
int tx = threadIdx.x;
int ty = threadIdx.y;
int right_boundary = k*TILE_SIZE*by + k;
float Sum = 0;
for (int a=k*TILE_SIZE*by, b=bx*TILE_SIZE; a<right_boundary; a+=TILE_SIZE,b+=(TILE_SIZE*n))
{
__shared__ float Acache[TILE_SIZE][TILE_SIZE];
__shared__ float Bcache[TILE_SIZE][TILE_SIZE];
Acache[ty][tx] = A[a + k * ty + tx];
Bcache[ty][tx] = B[b + n * ty + tx];
__syncthreads();
for (int i=0; i<TILE_SIZE; i++) {
Sum += Acache[ty][i] * Bcache[i][tx];
}
__syncthreads();
}
// INSERT KERNEL CODE HERE
int c = n * TILE_SIZE * by + TILE_SIZE * bx;
C[c + n * ty + tx] = Sum;
}
void basicSgemm(char transa, char transb, int m, int n, int k, float alpha, const float *A, int lda, const float *B, int ldb, float beta, float *C, int ldc)
{
if ((transa != 'N') && (transa != 'n')) {
printf("unsupported value of 'transa'\n");
return;
}
if ((transb != 'N') && (transb != 'n')) {
printf("unsupported value of 'transb'\n");
return;
}
if ((alpha - 1.0f > 1e-10) || (alpha - 1.0f < -1e-10)) {
printf("unsupported value of alpha\n");
return;
}
if ((beta - 0.0f > 1e-10) || (beta - 0.0f < -1e-10)) {
printf("unsupported value of beta\n");
return;
}
// Initialize thread block and kernel grid dimensions ---------------------
const unsigned int BLOCK_SIZE = TILE_SIZE;
//INSERT CODE HERE
dim3 dimBlock(BLOCK_SIZE, BLOCK_SIZE);
dim3 dimGrid(n / dimBlock.x, m / dimBlock.y);
mysgemm<<<dimGrid, dimBlock>>>(m, n, k, A, B, C);
// Invoke CUDA kernel -----------------------------------------------------
}
|
.text
.file "kernel.hip"
.globl _Z22__device_stub__mysgemmiiiPKfS0_Pf # -- Begin function _Z22__device_stub__mysgemmiiiPKfS0_Pf
.type _Z22__device_stub__mysgemmiiiPKfS0_Pf,@function
_Z22__device_stub__mysgemmiiiPKfS0_Pf: # @_Z22__device_stub__mysgemmiiiPKfS0_Pf
.cfi_startproc
# %bb.0:
pushq %r15
.cfi_def_cfa_offset 16
pushq %r14
.cfi_def_cfa_offset 24
pushq %r13
.cfi_def_cfa_offset 32
pushq %r12
.cfi_def_cfa_offset 40
pushq %rbx
.cfi_def_cfa_offset 48
subq $144, %rsp
.cfi_def_cfa_offset 192
.cfi_offset %rbx, -48
.cfi_offset %r12, -40
.cfi_offset %r13, -32
.cfi_offset %r14, -24
.cfi_offset %r15, -16
leaq 20(%rsp), %rax
movl %edi, (%rax)
leaq 16(%rsp), %rdi
movl %esi, (%rdi)
leaq 12(%rsp), %rsi
movl %edx, (%rsi)
leaq 56(%rsp), %rdx
movq %rcx, (%rdx)
leaq 48(%rsp), %rcx
movq %r8, (%rcx)
leaq 40(%rsp), %r8
movq %r9, (%r8)
leaq 96(%rsp), %rbx
movq %rax, (%rbx)
movq %rdi, 8(%rbx)
movq %rsi, 16(%rbx)
movq %rdx, 24(%rbx)
movq %rcx, 32(%rbx)
movq %r8, 40(%rbx)
leaq 80(%rsp), %r14
leaq 64(%rsp), %r15
leaq 32(%rsp), %r12
leaq 24(%rsp), %r13
movq %r14, %rdi
movq %r15, %rsi
movq %r12, %rdx
movq %r13, %rcx
callq __hipPopCallConfiguration
movq (%r14), %rsi
movl 8(%r14), %edx
movq (%r15), %rcx
movl 8(%r15), %r8d
movl $_Z7mysgemmiiiPKfS0_Pf, %edi
movq %rbx, %r9
pushq (%r13)
.cfi_adjust_cfa_offset 8
pushq (%r12)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $160, %rsp
.cfi_adjust_cfa_offset -160
popq %rbx
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
retq
.Lfunc_end0:
.size _Z22__device_stub__mysgemmiiiPKfS0_Pf, .Lfunc_end0-_Z22__device_stub__mysgemmiiiPKfS0_Pf
.cfi_endproc
# -- End function
.section .rodata.cst4,"aM",@progbits,4
.p2align 2, 0x0 # -- Begin function _Z10basicSgemmcciiifPKfiS0_ifPfi
.LCPI1_0:
.long 0xbf800000 # float -1
.section .rodata.cst8,"aM",@progbits,8
.p2align 3, 0x0
.LCPI1_1:
.quad 0x3ddb7cdfd9d7bdbb # double 1.0E-10
.LCPI1_2:
.quad 0xbddb7cdfd9d7bdbb # double -1.0E-10
.text
.globl _Z10basicSgemmcciiifPKfiS0_ifPfi
.type _Z10basicSgemmcciiifPKfiS0_ifPfi,@function
_Z10basicSgemmcciiifPKfiS0_ifPfi: # @_Z10basicSgemmcciiifPKfiS0_ifPfi
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r13
.cfi_def_cfa_offset 40
pushq %r12
.cfi_def_cfa_offset 48
pushq %rbx
.cfi_def_cfa_offset 56
pushq %rax
.cfi_def_cfa_offset 64
.cfi_offset %rbx, -56
.cfi_offset %r12, -48
.cfi_offset %r13, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
andb $-33, %dil
cmpb $78, %dil
jne .LBB1_1
# %bb.3:
andb $-33, %sil
cmpb $78, %sil
jne .LBB1_4
# %bb.5:
addss .LCPI1_0(%rip), %xmm0
cvtss2sd %xmm0, %xmm2
ucomisd .LCPI1_1(%rip), %xmm2
ja .LBB1_7
# %bb.6:
movsd .LCPI1_2(%rip), %xmm0 # xmm0 = mem[0],zero
ucomisd %xmm2, %xmm0
ja .LBB1_7
# %bb.8:
cvtss2sd %xmm1, %xmm1
ucomisd .LCPI1_1(%rip), %xmm1
ja .LBB1_10
# %bb.9:
ucomisd %xmm1, %xmm0
ja .LBB1_10
# %bb.11:
movq %r9, %rbx
movl %r8d, %ebp
movl %ecx, %r14d
movl %edx, %r15d
movq 88(%rsp), %r12
movq 72(%rsp), %r13
movl %ecx, %eax
movl $3435973837, %ecx # imm = 0xCCCCCCCD
imulq %rcx, %rax
shrq $35, %rax
movl %edx, %edx
imulq %rcx, %rdx
shrq $3, %rdx
movabsq $2305843004918726656, %rdi # imm = 0x1FFFFFFF00000000
andq %rdx, %rdi
orq %rax, %rdi
movabsq $42949672970, %rdx # imm = 0xA0000000A
movl $1, %esi
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
je .LBB1_13
# %bb.12:
addq $8, %rsp
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.LBB1_1:
.cfi_def_cfa_offset 64
movl $.Lstr.3, %edi
jmp .LBB1_2
.LBB1_4:
movl $.Lstr.2, %edi
jmp .LBB1_2
.LBB1_7:
movl $.Lstr.1, %edi
jmp .LBB1_2
.LBB1_10:
movl $.Lstr, %edi
.LBB1_2:
addq $8, %rsp
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
jmp puts@PLT # TAILCALL
.LBB1_13:
.cfi_def_cfa_offset 64
movl %r15d, %edi
movl %r14d, %esi
movl %ebp, %edx
movq %rbx, %rcx
movq %r13, %r8
movq %r12, %r9
addq $8, %rsp
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
jmp _Z22__device_stub__mysgemmiiiPKfS0_Pf # TAILCALL
.Lfunc_end1:
.size _Z10basicSgemmcciiifPKfiS0_ifPfi, .Lfunc_end1-_Z10basicSgemmcciiifPKfiS0_ifPfi
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
jne .LBB2_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, %rdi
movq %rax, __hip_gpubin_handle(%rip)
.LBB2_2:
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z7mysgemmiiiPKfS0_Pf, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end2:
.size __hip_module_ctor, .Lfunc_end2-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB3_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB3_2:
retq
.Lfunc_end3:
.size __hip_module_dtor, .Lfunc_end3-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z7mysgemmiiiPKfS0_Pf,@object # @_Z7mysgemmiiiPKfS0_Pf
.section .rodata,"a",@progbits
.globl _Z7mysgemmiiiPKfS0_Pf
.p2align 3, 0x0
_Z7mysgemmiiiPKfS0_Pf:
.quad _Z22__device_stub__mysgemmiiiPKfS0_Pf
.size _Z7mysgemmiiiPKfS0_Pf, 8
.type .L__unnamed_1,@object # @0
.section .rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
.asciz "_Z7mysgemmiiiPKfS0_Pf"
.size .L__unnamed_1, 22
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.type .Lstr,@object # @str
.section .rodata.str1.1,"aMS",@progbits,1
.Lstr:
.asciz "unsupported value of beta"
.size .Lstr, 26
.type .Lstr.1,@object # @str.1
.Lstr.1:
.asciz "unsupported value of alpha"
.size .Lstr.1, 27
.type .Lstr.2,@object # @str.2
.Lstr.2:
.asciz "unsupported value of 'transb'"
.size .Lstr.2, 30
.type .Lstr.3,@object # @str.3
.Lstr.3:
.asciz "unsupported value of 'transa'"
.size .Lstr.3, 30
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z22__device_stub__mysgemmiiiPKfS0_Pf
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z7mysgemmiiiPKfS0_Pf
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_
|
.text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z7mysgemmiiiPKfS0_Pf ; -- Begin function _Z7mysgemmiiiPKfS0_Pf
.globl _Z7mysgemmiiiPKfS0_Pf
.p2align 8
.type _Z7mysgemmiiiPKfS0_Pf,@function
_Z7mysgemmiiiPKfS0_Pf: ; @_Z7mysgemmiiiPKfS0_Pf
; %bb.0:
s_clause 0x2
s_load_b64 s[2:3], s[0:1], 0x4
s_load_b128 s[4:7], s[0:1], 0x10
s_load_b64 s[0:1], s[0:1], 0x20
v_and_b32_e32 v1, 0x3ff, v0
v_bfe_u32 v0, v0, 10, 10
s_mul_i32 s8, s15, 10
s_mul_i32 s9, s14, 10
s_waitcnt lgkmcnt(0)
s_cmp_lt_i32 s3, 1
s_cbranch_scc1 .LBB0_5
; %bb.1: ; %.lr.ph
v_mad_u64_u32 v[2:3], null, v0, s3, v[1:2]
v_lshlrev_b32_e32 v7, 2, v1
v_mul_u32_u24_e32 v6, 40, v0
s_mul_i32 s10, s8, s3
s_mul_i32 s11, s2, 10
s_add_i32 s3, s10, s3
s_mov_b32 s12, s9
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_2)
v_mad_u64_u32 v[3:4], null, v0, s2, v[1:2]
v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v5, 0x190, v7
v_mad_u32_u24 v7, v0, 40, v7
v_mad_u32_u24 v8, v0, 40, v5
.LBB0_2: ; =>This Loop Header: Depth=1
; Child Loop BB0_3 Depth 2
v_add_nc_u32_e32 v9, s10, v2
v_add_nc_u32_e32 v11, s12, v3
s_mov_b32 s13, 0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_ashrrev_i32_e32 v10, 31, v9
v_ashrrev_i32_e32 v12, 31, v11
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_lshlrev_b64 v[9:10], 2, v[9:10]
v_lshlrev_b64 v[11:12], 2, v[11:12]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_u32 v9, vcc_lo, s4, v9
v_add_co_ci_u32_e32 v10, vcc_lo, s5, v10, vcc_lo
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
v_add_co_u32 v11, vcc_lo, s6, v11
v_add_co_ci_u32_e32 v12, vcc_lo, s7, v12, vcc_lo
global_load_b32 v10, v[9:10], off
global_load_b32 v11, v[11:12], off
v_mov_b32_e32 v9, v5
s_waitcnt vmcnt(1)
ds_store_b32 v7, v10
s_waitcnt vmcnt(0)
ds_store_b32 v8, v11
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
.LBB0_3: ; Parent Loop BB0_2 Depth=1
; => This Inner Loop Header: Depth=2
v_add_nc_u32_e32 v10, s13, v6
s_add_i32 s13, s13, 4
ds_load_b32 v11, v9
ds_load_b32 v10, v10
v_add_nc_u32_e32 v9, 40, v9
s_cmp_eq_u32 s13, 40
s_waitcnt lgkmcnt(0)
v_fmac_f32_e32 v4, v10, v11
s_cbranch_scc0 .LBB0_3
; %bb.4: ; in Loop: Header=BB0_2 Depth=1
s_add_i32 s10, s10, 10
s_add_i32 s12, s12, s11
s_cmp_ge_i32 s10, s3
s_barrier
buffer_gl0_inv
s_cbranch_scc0 .LBB0_2
s_branch .LBB0_6
.LBB0_5:
v_mov_b32_e32 v4, 0
.LBB0_6: ; %Flow68
v_add_nc_u32_e32 v0, s8, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_lo_u32 v0, v0, s2
v_add3_u32 v0, s9, v1, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v1, 31, v0
v_lshlrev_b64 v[0:1], 2, v[0:1]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v0, vcc_lo, s0, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
global_store_b32 v[0:1], v4, off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z7mysgemmiiiPKfS0_Pf
.amdhsa_group_segment_fixed_size 800
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 40
.amdhsa_user_sgpr_count 14
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 1
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 1
.amdhsa_next_free_vgpr 13
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z7mysgemmiiiPKfS0_Pf, .Lfunc_end0-_Z7mysgemmiiiPKfS0_Pf
; -- End function
.section .AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 428
; NumSgprs: 18
; NumVgprs: 13
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 800 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 13
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object ; @__hip_cuid_
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0 ; 0x0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .offset: 0
.size: 4
.value_kind: by_value
- .offset: 4
.size: 4
.value_kind: by_value
- .offset: 8
.size: 4
.value_kind: by_value
- .address_space: global
.offset: 16
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 24
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 32
.size: 8
.value_kind: global_buffer
.group_segment_fixed_size: 800
.kernarg_segment_align: 8
.kernarg_segment_size: 40
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z7mysgemmiiiPKfS0_Pf
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z7mysgemmiiiPKfS0_Pf.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 13
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata
|
6ad19a04ecd9335b5f4fb7ef26924dd9c65416e3
|
///*
// * LinearSysSolver.cpp
// *
// * Created on: Jul 8, 2013
// * Author: adm85
// */
//
//#include <vector>
//#include <iostream>
//#include <time.h>
//#include "LinearSysSolver.h"
//#include "cublas_v2.h"
//#include "cula.h"
//
//
//LinearSysSolver::LinearSysSolver()
//{
// // TODO Auto-generated constructor stub
//
//}
//
//LinearSysSolver::~LinearSysSolver()
//{
// // TODO Auto-generated destructor stub
//}
//
///**
// * Solves A*x=B for x. The result is stored in the vector pointed to by B.
// */
//void LinearSysSolver::solveSystem(cuComplex* A, int M_A, int N_A, cuComplex* B, int M_B, int N_B) {
// //Get the LU Factorization
// cuComplex* LUMat = new cuComplex[M_A*N_A];
// int ipivLength = N_A;
// int* ipiv = new int[ipivLength];
// getLUDecomposition(A, M_A, N_A, LUMat, ipiv, ipivLength);
//
// //Calculate P*b
// swapPivotRows(B, M_B, N_B, ipiv, ipivLength);
//
// //Solve the system. The result will be stored in B
// cublasSolveLinearSystem(LUMat, M_A, N_A, B, M_B, N_B);
//
// // DEBUG CODE -------
// //cuComplex* test = multiplyMatrices(xTxInv, N, N, xTx, N, N);
// cuComplex* test = multiplyMatrices(A, M_A, N_A, B, M_B, N_B);
// cout << endl << "X * XInv" << endl;
// columnMajorPrintArray(test, M_A, N_B);
// delete [] test;
// // END DEBUG CODE ---
//
// delete [] LUMat;
// delete [] ipiv;
//}
//
//
///**
// * Uses the CULA library to get the LU decomposition of the matrix.
// */
//void LinearSysSolver::getLUDecomposition(cuComplex* x, int M, int N, cuComplex* LUMat, int* ipiv, int ipivLength) {
//
// culaDeviceFloatComplex* devxTx;
// culaDeviceInt* devIPIV;
//
// cudaMalloc(&devxTx, M*N*sizeof(culaDeviceFloatComplex));
// cudaMalloc(&devIPIV, ipivLength*sizeof(culaDeviceInt));
// cudaMemcpy(devxTx, x, M*N*sizeof(culaDeviceFloatComplex), cudaMemcpyHostToDevice);
//
// culaStatus culaStat;
// culaInitialize();
//
// culaStat = culaDeviceCgetrf(M, N, devxTx, M, devIPIV);
// if(culaStat != culaNoError) {
// cout << "Cula Cgetrf failure" << endl;
// }
//
// culaShutdown();
//
// //LUMat = new cuComplex[M*N];
// cudaMemcpy(LUMat, devxTx, M*N*sizeof(culaDeviceFloatComplex), cudaMemcpyDeviceToHost);
// cudaMemcpy(ipiv, devIPIV, ipivLength*sizeof(culaDeviceInt), cudaMemcpyDeviceToHost);
//
//// getL(L, LUMat, M, N);
////
// cout << "LUMat Inside:" << endl;
// columnMajorPrintArray(LUMat, M, N);
////
//// getU(U, LUMat, M, N);
//// cout << endl << "U" << endl;
//// columnMajorPrintArray(U, M, N);
//
// cudaFree(devxTx);
// cudaFree(devIPIV);
//}
//
///**
// * Using the information from the CULA generated IPIF array,
// * this function swaps rows as appropriate.
// */
//void LinearSysSolver::swapPivotRows(cuComplex* x, int M, int N, int* ipiv, int ipivLength) {
// //Temporary row vector
// cuComplex rowVec[N];
//
// //We use index 1 based ordering because this is what CULA returns
// for(int i=1; i <= ipivLength; i++) {
// //Check to see if the row swaps. This happens when element x of the ipif
// //array is not equal to x. When element x is different, it means that row x
// //and the row specified in element x swap places.
// if(ipiv[i-1] != i) {
// int startIndex = i-1;
// //Copy the current row into the temporary row vector
// for(int j = 0; j < N; j++) {
// rowVec[j].x = x[startIndex+j*M].x;
// rowVec[j].y = x[startIndex+j*M].y;
// }
//
// //Copy the specified row into the current row
// int specRowStart = ipiv[i-1]-1;
// for(int j=0; j < N; j++) {
// x[startIndex+j*M].x = x[specRowStart+j*M].x;
// x[startIndex+j*M].y = x[specRowStart+j*M].y;
// }
//
// //Copy the temp row into the specified row
// for(int j=0; j < N; j++) {
// x[specRowStart+j*M].x = rowVec[j].x;
// x[specRowStart+j*M].y = rowVec[j].y;
// }
// }
// }
//
//}
//
//void LinearSysSolver::cublasSolveLinearSystem(cuComplex* A, int M, int N, cuComplex* B, int M_B, int N_B) {
// cuComplex* xInv = new cuComplex[M*N_B];
//
// //Now put L, U, and the I matrix on the GPU
// cublasStatus_t stat;
// cublasHandle_t handle;
//
// cuComplex* devA;
// cuComplex* devB;
// cudaMalloc(&devA, M*N*sizeof(cuComplex));
// cudaMalloc(&devB, M_B*N_B*sizeof(cuComplex));
//
// stat = cublasCreate(&handle);
// if(stat != CUBLAS_STATUS_SUCCESS) {
// cout << "Error in solver" << endl;
// }
// stat = cublasSetMatrix(M, N, sizeof(cuComplex), A, M, devA, M);
// if(stat != CUBLAS_STATUS_SUCCESS) {
// cout << "Error in solver" << endl;
// }
// stat = cublasSetMatrix(M_B, N_B, sizeof(cuComplex), B, M_B, devB, M_B);
// if(stat != CUBLAS_STATUS_SUCCESS) {
// cout << "Error in solver" << endl;
// }
//
// //Set up Alpha
// cuComplex alpha;
// alpha.x = 1;
// alpha.y = 0;
//
// //First solve L*y = P*b
// stat = cublasCtrsm(handle, CUBLAS_SIDE_LEFT, CUBLAS_FILL_MODE_LOWER, CUBLAS_OP_N, CUBLAS_DIAG_UNIT, M, N, &alpha, devA, M, devB, M_B);
// if(stat != CUBLAS_STATUS_SUCCESS) {
// cout << "Error solving for y" << endl;
// }
//
// //Then solve U*x = y
// stat = cublasCtrsm(handle, CUBLAS_SIDE_LEFT, CUBLAS_FILL_MODE_UPPER, CUBLAS_OP_N, CUBLAS_DIAG_NON_UNIT, M, N, &alpha, devA, M, devB, M_B);
// if(stat != CUBLAS_STATUS_SUCCESS) {
// cout << "Error solving for x" << endl;
// }
//
// //Get results, and store them in matrix B
// cudaMemcpy(B, devB, M*N_B*sizeof(cuComplex), cudaMemcpyDeviceToHost);
//
// //Free resources
// cublasDestroy(handle);
// cudaFree(devA);
// cudaFree(devB);
//}
//
///**
// * Multiplies two matrices together. Result is stored in B on exit.
// */
//cuComplex* LinearSysSolver::multiplyMatrices(cuComplex* A, int M_A, int N_A, cuComplex* B, int M_B, int N_B) {
// cudaError_t cudaStat;
// cublasStatus_t stat;
// cublasHandle_t handle;
//
// cuComplex* devA;
// cuComplex* devB;
// cuComplex* devC;
// cuComplex* alpha = new cuComplex;
// cuComplex* beta = new cuComplex;
// cuComplex* hostC = new cuComplex[M_A*N_B];
// alpha->x = 1;
// alpha->y = 0;
// beta->x = 0;
// beta->y = 0;
//
// cudaStat = cudaMalloc(&devA, M_A*N_A*sizeof(cuComplex));
// cudaStat = cudaMalloc(&devB, M_B*N_B*sizeof(cuComplex));
// cudaStat = cudaMalloc(&devC, M_A*N_B*sizeof(cuComplex));
// if(cudaStat != cudaSuccess) {
// cout << "Horrible failure!" << endl;
// }
//
// stat = cublasCreate(&handle);
//
// stat = cublasSetMatrix(M_A, N_A, sizeof(cuComplex), A, M_A, devA, M_A);
// if (stat != CUBLAS_STATUS_SUCCESS) {
// cout << "Data download A failed" << endl;
// }
// stat = cublasSetMatrix(M_B, N_B, sizeof(cuComplex), B, M_B, devB, M_B);
// if (stat != CUBLAS_STATUS_SUCCESS) {
// cout << "Data download B failed" << endl;
// }
//
// //Perform the multiply.
// stat = cublasCgemm(handle, CUBLAS_OP_N, CUBLAS_OP_N, M_A, N_B, N_A, alpha, devA, M_A, devB, M_B, beta, devC, M_A);
//
// stat = cublasGetMatrix(M_A, N_B, sizeof(cuComplex), devC, M_A, hostC, M_A);
// if (stat != CUBLAS_STATUS_SUCCESS) {
// cout << "Failed to get devC to hostC" << endl;
// cout << stat << endl;
// }
//
// cudaFree(devA);
// cudaFree(devB);
// cudaFree(devC);
// cublasDestroy(handle);
//
// delete alpha;
// delete beta;
// return hostC;
//
//}
//
///**
// * Prints out an array that is stored in column-major order in memory.
// */
//void LinearSysSolver::columnMajorPrintArray(cuComplex* x, int M, int N) {
// int realIndex;
// cout << "------------------------------------------------------" << endl;
// cout << " Printing Column Order Matrix " << endl;
// cout << "------------------------------------------------------" << endl;
// for(int i=0; i < M; i++) {
// cout << "Row: " << (i+1) << " ";
// for(int j=0; j < N; j++) {
// realIndex = (M*j)+i;
// cout << x[realIndex].x;
// if(x[realIndex].y >= 0) {
// cout << "+";
// }
// cout << x[realIndex].y << "i ";
// }
// cout << endl;
// }
//}
|
.file "tmpxft_0031dd2a_00000000-6_LinearSysSolver.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2010:
.cfi_startproc
endbr64
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
jmp __cudaUnregisterFatBinary@PLT
.cfi_endproc
.LFE2010:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.section .text.startup,"ax",@progbits
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2033:
.cfi_startproc
endbr64
pushq %rax
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
popq %rdx
.cfi_def_cfa_offset 8
jmp atexit@PLT
.cfi_endproc
.LFE2033:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
|
code for sm_89
|
#include <hip/hip_runtime.h>
///*
// * LinearSysSolver.cpp
// *
// * Created on: Jul 8, 2013
// * Author: adm85
// */
//
//#include <vector>
//#include <iostream>
//#include <time.h>
//#include "LinearSysSolver.h"
//#include "cublas_v2.h"
//#include "cula.h"
//
//
//LinearSysSolver::LinearSysSolver()
//{
// // TODO Auto-generated constructor stub
//
//}
//
//LinearSysSolver::~LinearSysSolver()
//{
// // TODO Auto-generated destructor stub
//}
//
///**
// * Solves A*x=B for x. The result is stored in the vector pointed to by B.
// */
//void LinearSysSolver::solveSystem(cuComplex* A, int M_A, int N_A, cuComplex* B, int M_B, int N_B) {
// //Get the LU Factorization
// cuComplex* LUMat = new cuComplex[M_A*N_A];
// int ipivLength = N_A;
// int* ipiv = new int[ipivLength];
// getLUDecomposition(A, M_A, N_A, LUMat, ipiv, ipivLength);
//
// //Calculate P*b
// swapPivotRows(B, M_B, N_B, ipiv, ipivLength);
//
// //Solve the system. The result will be stored in B
// cublasSolveLinearSystem(LUMat, M_A, N_A, B, M_B, N_B);
//
// // DEBUG CODE -------
// //cuComplex* test = multiplyMatrices(xTxInv, N, N, xTx, N, N);
// cuComplex* test = multiplyMatrices(A, M_A, N_A, B, M_B, N_B);
// cout << endl << "X * XInv" << endl;
// columnMajorPrintArray(test, M_A, N_B);
// delete [] test;
// // END DEBUG CODE ---
//
// delete [] LUMat;
// delete [] ipiv;
//}
//
//
///**
// * Uses the CULA library to get the LU decomposition of the matrix.
// */
//void LinearSysSolver::getLUDecomposition(cuComplex* x, int M, int N, cuComplex* LUMat, int* ipiv, int ipivLength) {
//
// culaDeviceFloatComplex* devxTx;
// culaDeviceInt* devIPIV;
//
// cudaMalloc(&devxTx, M*N*sizeof(culaDeviceFloatComplex));
// cudaMalloc(&devIPIV, ipivLength*sizeof(culaDeviceInt));
// cudaMemcpy(devxTx, x, M*N*sizeof(culaDeviceFloatComplex), cudaMemcpyHostToDevice);
//
// culaStatus culaStat;
// culaInitialize();
//
// culaStat = culaDeviceCgetrf(M, N, devxTx, M, devIPIV);
// if(culaStat != culaNoError) {
// cout << "Cula Cgetrf failure" << endl;
// }
//
// culaShutdown();
//
// //LUMat = new cuComplex[M*N];
// cudaMemcpy(LUMat, devxTx, M*N*sizeof(culaDeviceFloatComplex), cudaMemcpyDeviceToHost);
// cudaMemcpy(ipiv, devIPIV, ipivLength*sizeof(culaDeviceInt), cudaMemcpyDeviceToHost);
//
//// getL(L, LUMat, M, N);
////
// cout << "LUMat Inside:" << endl;
// columnMajorPrintArray(LUMat, M, N);
////
//// getU(U, LUMat, M, N);
//// cout << endl << "U" << endl;
//// columnMajorPrintArray(U, M, N);
//
// cudaFree(devxTx);
// cudaFree(devIPIV);
//}
//
///**
// * Using the information from the CULA generated IPIF array,
// * this function swaps rows as appropriate.
// */
//void LinearSysSolver::swapPivotRows(cuComplex* x, int M, int N, int* ipiv, int ipivLength) {
// //Temporary row vector
// cuComplex rowVec[N];
//
// //We use index 1 based ordering because this is what CULA returns
// for(int i=1; i <= ipivLength; i++) {
// //Check to see if the row swaps. This happens when element x of the ipif
// //array is not equal to x. When element x is different, it means that row x
// //and the row specified in element x swap places.
// if(ipiv[i-1] != i) {
// int startIndex = i-1;
// //Copy the current row into the temporary row vector
// for(int j = 0; j < N; j++) {
// rowVec[j].x = x[startIndex+j*M].x;
// rowVec[j].y = x[startIndex+j*M].y;
// }
//
// //Copy the specified row into the current row
// int specRowStart = ipiv[i-1]-1;
// for(int j=0; j < N; j++) {
// x[startIndex+j*M].x = x[specRowStart+j*M].x;
// x[startIndex+j*M].y = x[specRowStart+j*M].y;
// }
//
// //Copy the temp row into the specified row
// for(int j=0; j < N; j++) {
// x[specRowStart+j*M].x = rowVec[j].x;
// x[specRowStart+j*M].y = rowVec[j].y;
// }
// }
// }
//
//}
//
//void LinearSysSolver::cublasSolveLinearSystem(cuComplex* A, int M, int N, cuComplex* B, int M_B, int N_B) {
// cuComplex* xInv = new cuComplex[M*N_B];
//
// //Now put L, U, and the I matrix on the GPU
// cublasStatus_t stat;
// cublasHandle_t handle;
//
// cuComplex* devA;
// cuComplex* devB;
// cudaMalloc(&devA, M*N*sizeof(cuComplex));
// cudaMalloc(&devB, M_B*N_B*sizeof(cuComplex));
//
// stat = cublasCreate(&handle);
// if(stat != CUBLAS_STATUS_SUCCESS) {
// cout << "Error in solver" << endl;
// }
// stat = cublasSetMatrix(M, N, sizeof(cuComplex), A, M, devA, M);
// if(stat != CUBLAS_STATUS_SUCCESS) {
// cout << "Error in solver" << endl;
// }
// stat = cublasSetMatrix(M_B, N_B, sizeof(cuComplex), B, M_B, devB, M_B);
// if(stat != CUBLAS_STATUS_SUCCESS) {
// cout << "Error in solver" << endl;
// }
//
// //Set up Alpha
// cuComplex alpha;
// alpha.x = 1;
// alpha.y = 0;
//
// //First solve L*y = P*b
// stat = cublasCtrsm(handle, CUBLAS_SIDE_LEFT, CUBLAS_FILL_MODE_LOWER, CUBLAS_OP_N, CUBLAS_DIAG_UNIT, M, N, &alpha, devA, M, devB, M_B);
// if(stat != CUBLAS_STATUS_SUCCESS) {
// cout << "Error solving for y" << endl;
// }
//
// //Then solve U*x = y
// stat = cublasCtrsm(handle, CUBLAS_SIDE_LEFT, CUBLAS_FILL_MODE_UPPER, CUBLAS_OP_N, CUBLAS_DIAG_NON_UNIT, M, N, &alpha, devA, M, devB, M_B);
// if(stat != CUBLAS_STATUS_SUCCESS) {
// cout << "Error solving for x" << endl;
// }
//
// //Get results, and store them in matrix B
// cudaMemcpy(B, devB, M*N_B*sizeof(cuComplex), cudaMemcpyDeviceToHost);
//
// //Free resources
// cublasDestroy(handle);
// cudaFree(devA);
// cudaFree(devB);
//}
//
///**
// * Multiplies two matrices together. Result is stored in B on exit.
// */
//cuComplex* LinearSysSolver::multiplyMatrices(cuComplex* A, int M_A, int N_A, cuComplex* B, int M_B, int N_B) {
// cudaError_t cudaStat;
// cublasStatus_t stat;
// cublasHandle_t handle;
//
// cuComplex* devA;
// cuComplex* devB;
// cuComplex* devC;
// cuComplex* alpha = new cuComplex;
// cuComplex* beta = new cuComplex;
// cuComplex* hostC = new cuComplex[M_A*N_B];
// alpha->x = 1;
// alpha->y = 0;
// beta->x = 0;
// beta->y = 0;
//
// cudaStat = cudaMalloc(&devA, M_A*N_A*sizeof(cuComplex));
// cudaStat = cudaMalloc(&devB, M_B*N_B*sizeof(cuComplex));
// cudaStat = cudaMalloc(&devC, M_A*N_B*sizeof(cuComplex));
// if(cudaStat != cudaSuccess) {
// cout << "Horrible failure!" << endl;
// }
//
// stat = cublasCreate(&handle);
//
// stat = cublasSetMatrix(M_A, N_A, sizeof(cuComplex), A, M_A, devA, M_A);
// if (stat != CUBLAS_STATUS_SUCCESS) {
// cout << "Data download A failed" << endl;
// }
// stat = cublasSetMatrix(M_B, N_B, sizeof(cuComplex), B, M_B, devB, M_B);
// if (stat != CUBLAS_STATUS_SUCCESS) {
// cout << "Data download B failed" << endl;
// }
//
// //Perform the multiply.
// stat = cublasCgemm(handle, CUBLAS_OP_N, CUBLAS_OP_N, M_A, N_B, N_A, alpha, devA, M_A, devB, M_B, beta, devC, M_A);
//
// stat = cublasGetMatrix(M_A, N_B, sizeof(cuComplex), devC, M_A, hostC, M_A);
// if (stat != CUBLAS_STATUS_SUCCESS) {
// cout << "Failed to get devC to hostC" << endl;
// cout << stat << endl;
// }
//
// cudaFree(devA);
// cudaFree(devB);
// cudaFree(devC);
// cublasDestroy(handle);
//
// delete alpha;
// delete beta;
// return hostC;
//
//}
//
///**
// * Prints out an array that is stored in column-major order in memory.
// */
//void LinearSysSolver::columnMajorPrintArray(cuComplex* x, int M, int N) {
// int realIndex;
// cout << "------------------------------------------------------" << endl;
// cout << " Printing Column Order Matrix " << endl;
// cout << "------------------------------------------------------" << endl;
// for(int i=0; i < M; i++) {
// cout << "Row: " << (i+1) << " ";
// for(int j=0; j < N; j++) {
// realIndex = (M*j)+i;
// cout << x[realIndex].x;
// if(x[realIndex].y >= 0) {
// cout << "+";
// }
// cout << x[realIndex].y << "i ";
// }
// cout << endl;
// }
//}
|
.text
.file "LinearSysSolver.hip"
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
|
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object ; @__hip_cuid_
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0 ; 0x0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.amdgpu_metadata
---
amdhsa.kernels: []
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata
|
6e60409b809a9b3d95af04fb128c548d6f031439
| "// Each thread calculates fitness for one individual\n// Result: vector of fitness\n\nextern \"C\"\(...TRUNCATED)
| "\t.file\t\"tmpxft_003203be_00000000-6_GPU_fitness_kernel.cudafe1.cpp\"\n\t.text\n#APP\n\n#NO_APP\n\(...TRUNCATED)
| "\n\tcode for sm_89\n\t\tFunction : fitness_kernel\n\t.headerflags\t@\"EF_CUDA_TEXMODE_UNIFIED EF_CU(...TRUNCATED)
| "\n#include <hip/hip_runtime.h>\n// Each thread calculates fitness for one individual\n// Result: ve(...TRUNCATED)
| "\t.text\n\t.file\t\"GPU_fitness_kernel.hip\"\n\t.globl\t__device_stub__fitness_kernel # -- Begin (...TRUNCATED)
| "\t.text\n\t.amdgcn_target \"amdgcn-amd-amdhsa--gfx1100\"\n\t.protected\tfitness_kernel ; -(...TRUNCATED)
|
4fb84d8d748d067ce16f552a25fc264ef479af55
| "#include \"cuda_runtime.h\"\n#include <cstdio>\n#include \"time.h\"\n\nconstexpr int segment_size =(...TRUNCATED)
| "\t.file\t\"tmpxft_00216443_00000000-6_kernel_malloc.cudafe1.cpp\"\n\t.text\n#APP\n\n#NO_APP\n\t.typ(...TRUNCATED)
| "\n\tcode for sm_89\n\t\tFunction : _Z4freePPi\n\t.headerflags\t@\"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_6(...TRUNCATED)
| "#include \"hip/hip_runtime.h\"\n#include <cstdio>\n#include \"time.h\"\n\nconstexpr int segment_siz(...TRUNCATED)
| "\t.text\n\t.file\t\"kernel_malloc.hip\"\n\t.globl\t_Z20__device_stub__allocPPi # -- Begin funct(...TRUNCATED)
| "\t.text\n\t.amdgcn_target \"amdgcn-amd-amdhsa--gfx1100\"\n\t.protected\t_Z5allocPPi ; -(...TRUNCATED)
|
358cbb1e423d31571cadb665a77ecc827a29f38b
| "#include <algorithm>\n#include <iostream>\n#include <vector>\n\nstd::vector<double> add(std::vector(...TRUNCATED)
| "\t.file\t\"tmpxft_00394f43_00000000-6_test_add_integ.cudafe1.cpp\"\n\t.text\n#APP\n\t.globl _ZSt21i(...TRUNCATED)
|
code for sm_89
| "\n#include <hip/hip_runtime.h>\n#include <algorithm>\n#include <iostream>\n#include <vector>\n\nstd(...TRUNCATED)
| "\t.text\n\t.file\t\"test_add_integ.hip\"\n # Start of file s(...TRUNCATED)
| "\t.text\n\t.p2alignl 7, 3214868480\n\t.fill 96, 4, 3214868480\n\t.type\t__hip_cuid_,@object (...TRUNCATED)
|
5004448f7e4cb8218f1846ad45e3e67a5df0639a
| "#include \"Output_Layer_GPU_Kernels.cuh\"\n\n__constant__ float anchors_416[10] = { 1.08, 1.19, 3.(...TRUNCATED)
| "\t.file\t\"tmpxft_0021bb74_00000000-6_Output_Layer_GPU_Kernels.cudafe1.cpp\"\n\t.text\n#APP\n\n#NO_(...TRUNCATED)
| "\n\tcode for sm_89\n\t\tFunction : _Z14Softmax_KernelPfiii\n\t.headerflags\t@\"EF_CUDA_TEXMODE_UNIF(...TRUNCATED)
| "#pragma once\n#include<hip/hip_runtime.h>\n\n#include <math.h>\n\n__device__ const int downsampleFa(...TRUNCATED)
| "\t.text\n\t.file\t\"Output_Layer_GPU_Kernels.hip\"\n\t.type\t__hip_cuid_,@object # @__h(...TRUNCATED)
| "\t.text\n\t.p2alignl 7, 3214868480\n\t.fill 96, 4, 3214868480\n\t.type\t__hip_cuid_,@object (...TRUNCATED)
|
e3a34ffb3f88017edee47d15f3c3892ccf7a7e11
| "#include <stdio.h>\n#include <cuda_runtime.h>\n#include <assert.h>\n\nint main(int argc, char **arg(...TRUNCATED)
| "\t.file\t\"tmpxft_002f4d06_00000000-6_lab7.1.cudafe1.cpp\"\n\t.text\n#APP\n\n#NO_APP\n\t.type\t_ZL2(...TRUNCATED)
|
code for sm_89
| "#include <stdio.h>\n#include <hip/hip_runtime.h>\n#include <assert.h>\n\nint main(int argc, char **(...TRUNCATED)
| "\t.text\n\t.file\t\"lab7.1.hip\"\n\t.globl\tmain # -- Begin function mai(...TRUNCATED)
| "\t.text\n\t.p2alignl 7, 3214868480\n\t.fill 96, 4, 3214868480\n\t.type\t__hip_cuid_,@object (...TRUNCATED)
|
End of preview. Expand
in Data Studio
💻 CASS: CUDA–AMD Assembly and Source Mapping
CASS is the first large-scale dataset for cross-architecture GPU transpilation, providing semantically aligned CUDA–HIP source pairs and their corresponding host/device assemblies for NVIDIA (SASS) and AMD (RDNA3) platforms. It enables research in:
- 🔁 Source-to-source translation (CUDA ↔ HIP)
- ⚙️ Assembly-level translation (SASS ↔ RDNA3)
- 🧠 LLM-guided GPU code transpilation
📚 Dataset Structure
Each sample contains the following fields:
| Field | Description |
|---|---|
filename |
Sample ID or file name |
cuda_source |
Original CUDA source code |
cuda_host |
Compiled x86 host-side assembly from CUDA |
cuda_device |
Compiled SASS (Nvidia GPU) device assembly |
hip_source |
Transpiled HIP source code (via HIPIFY) |
hip_host |
Compiled x86 host-side assembly from HIP |
hip_device |
Compiled RDNA3 (AMD GPU) device assembly |
🔀 Dataset Splits
| Split | Description | # Examples |
|---|---|---|
train |
Union of synth, stack, and opencl |
70,694 |
synth |
LLM-synthesized CUDA programs | 40,591 |
stack |
Scraped and filtered CUDA from StackV2 | 24,170 |
bench |
40 curated eval tasks from 16 GPU domains | 40 |
📦 How to Load
from datasets import load_dataset
# 🧠 Load the full dataset (default config with all splits)
cass = load_dataset("MBZUAI/cass", name="default")
# Access a specific split
train_data = cass["train"] # train = stack + synth + opencl
stack_data = cass["stack"]
synth_data = cass["synth"]
bench_data = cass["bench"]
📈 Benchmark and Evaluation
The bench split includes 40 samples across 16 domains like:
- 🧪 Physics Simulation
- 📊 Data Structures
- 📸 Image Processing
- 🧮 Linear Algebra
All samples have been manually verified for semantic equivalence across CUDA and HIP and come with executable device/host binaries.
📄 License
Released under the MIT license.
🔗 Useful Links
- 🤗 Hugging Face Collection: CASS on Hugging Face
- 📂 Code & Tools: GitHub Repository
- Paper: Arxiv CASS
- Downloads last month
- 292
Size of the auto-converted Parquet files (First 5GB per split):
2.99 GB
Number of rows (First 5GB per split):
58,880
Estimated number of rows:
134,825